Commit Graph

15 Commits

Author SHA1 Message Date
Greg Hewgill
9ff2dbb70e add --pc switch for starting run at specific program counter 2012-04-18 07:43:19 +12:00
James Tauber
c9ecb5f31e Merge pull request #15 from ghewgill/control
Control channel as HTTP/REST/JSON server
2011-08-22 10:51:03 -07:00
Greg Hewgill
6782a1d268 implement post to /memory in control requests 2011-08-21 18:29:42 +12:00
Greg Hewgill
80e95d114b control channel is now HTTP/REST/JSON 2011-08-20 21:46:14 +12:00
James Tauber
fad0de8cc9 Merge pull request #13 from ghewgill/socket
Change comms to use sockets instead of stdio
2011-08-20 01:50:43 -07:00
Greg Hewgill
0604bd1515 add fileno() method to ControlHandler for better compatiblity with select() 2011-08-20 18:22:33 +12:00
Greg Hewgill
0b86a8693f disassemble show instruction bytes 2011-08-20 15:37:55 +12:00
Greg Hewgill
29b1342a47 reincarnate disassembler on control channel 2011-08-20 14:23:51 +12:00
Greg Hewgill
aee0bba7aa add dump memory command 2011-08-20 13:59:36 +12:00
Greg Hewgill
8b62860152 refactor control command processing 2011-08-20 13:59:22 +12:00
Greg Hewgill
19693bc905 start of cpu core control channel
Currently this listens on TCP port 6502 on localhost. The protocol
is a simple text protocol, type "help" for a list of commands.
2011-08-19 21:48:46 +12:00
Greg Hewgill
15e174c02a rename --ui switch to --bus 2011-08-19 20:30:55 +12:00
Greg Hewgill
9ffbf63716 open memory files in binary mode 2011-08-18 21:21:42 +12:00
Greg Hewgill
cd692af6f3 use sockets for comms instead of stdio 2011-08-18 21:04:11 +12:00
Greg Hewgill
c9c609be1d Separate CPU core and UI processes
This is a first step toward separating the CPU core and UI.  The UI program
starts the CPU core as a subprocess and communicates through its standard input
and output. The protocol is deliberately simple at this point. Each bus request
from the core is exactly eight bytes:

    +-------------------------+
    | cpu cycle counter high  |
    +-------------------------+
    | cpu cycle counter       |
    +-------------------------+
    | cpu cycle counter       |
    +-------------------------+
    | cpu cycle counter low   |
    +-------------------------+
    | 0x00=read / 0x01=write  |
    +-------------------------+
    | address high            |
    +-------------------------+
    | address low             |
    +-------------------------+
    | value (unused for read) |
    +-------------------------+

A single-byte response from the UI is required for a read request, and a
response must not be sent for a write request.

The above protocol is expected to change. For example:

    - the UI should tell the CPU core which address ranges are of interest
    - needs ability to send memory images to the core (both ROM and RAM)

The stream communications is currently buggy because it expects that all eight
bytes will be read when requested (that is, partial reads are not handled). In
practice, this seems to work okay for the moment.

To improve portability, it may be better to communicate over TCP sockets
instead of stdin/stdout.
2011-08-16 12:54:23 +12:00