Add more 65C02 instructions, fix BRK on 65C02
This commit is contained in:
Brad Grantham
parent
0666038298
commit
6e2e54e2be
151
cpu6502.h
151
cpu6502.h
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@ -26,7 +26,7 @@
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#include <stdlib.h>
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#include <assert.h>
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#define SUPPORT_65C02 1
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#define EMULATE_65C02 1
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template<class CLK, class BUS>
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struct CPU6502
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@ -205,6 +205,9 @@ struct CPU6502
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stack_push((pc + 1) & 0xFF);
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stack_push(p | B2 | B); // | B says the Synertek 6502 reference
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p |= I;
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#if EMULATE_65C02
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p &= ~D;
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#endif /* EMULATE_65C02 */
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uint8_t low = bus.read(0xFFFE);
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uint8_t high = bus.read(0xFFFF);
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pc = low + high * 256;
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@ -1618,7 +1621,7 @@ struct CPU6502
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break;
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}
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#if SUPPORT_65C02
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#if EMULATE_65C02
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// 65C02 instructions
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case 0x0F: case 0x1F: case 0x2F: case 0x3F:
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@ -1626,8 +1629,8 @@ struct CPU6502
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int whichbit = (inst >> 4) & 0x7;
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uint8_t zpg = read_pc_inc();
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uint8_t m = bus.read(zpg);
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int32_t rel = (read_pc_inc() + 128) % 256 - 128;
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if(!(m & (1 << whichbit))) {
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int32_t rel = (read_pc_inc() + 128) % 256 - 128;
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// if((pc + rel) / 256 != pc / 256)
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// clk.add_cpu_cycles(1); // XXX ???
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pc += rel;
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@ -1640,8 +1643,8 @@ struct CPU6502
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int whichbit = (inst >> 4) & 0x7;
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uint8_t zpg = read_pc_inc();
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uint8_t m = bus.read(zpg);
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int32_t rel = (read_pc_inc() + 128) % 256 - 128;
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if(m & (1 << whichbit)) {
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int32_t rel = (read_pc_inc() + 128) % 256 - 128;
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// if((pc + rel) / 256 != pc / 256)
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// clk.add_cpu_cycles(1); // XXX ???
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pc += rel;
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@ -1779,7 +1782,113 @@ struct CPU6502
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set_flags(N | Z, m = a - m);
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break;
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}
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#endif // SUPPORT_65C02
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case 0x1C: { // TRB abs
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uint8_t low = read_pc_inc();
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uint8_t high = read_pc_inc();
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uint16_t addr = low + high * 256;
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m = bus.read(addr);
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set_flags(Z, m & a);
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bus.write(addr, m & ~a);
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break;
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}
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case 0x14: { // TRB zpg
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uint8_t zpgaddr = read_pc_inc();
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m = bus.read(zpgaddr);
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set_flags(Z, m & a);
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bus.write(zpgaddr, m & ~a);
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break;
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}
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case 0x0C: { // TSB abs
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uint8_t low = read_pc_inc();
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uint8_t high = read_pc_inc();
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uint16_t addr = low + high * 256;
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m = bus.read(addr);
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set_flags(Z, m & a);
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bus.write(addr, m | a);
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break;
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}
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case 0x04: { // TRB zpg
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uint8_t zpgaddr = read_pc_inc();
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m = bus.read(zpgaddr);
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set_flags(Z, m & a);
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bus.write(zpgaddr, m | a);
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break;
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}
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case 0x02: case 0x22: case 0x42: case 0x62: case 0x82: case 0xC2: case 0xE2: { // two-byte NOP, 2 cycles
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uint8_t ignored = read_pc_inc();
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(void)ignored;
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break;
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}
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case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
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case 0x83: case 0x93: case 0xA3: case 0xB3: case 0xC3: case 0xD3: case 0xE3: case 0xF3: { // one-byte NOP, 1 cycle
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break;
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}
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case 0x0B: case 0x1B: case 0x2B: case 0x3B: case 0x4B: case 0x5B: case 0x6B: case 0x7B:
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case 0x8B: case 0x9B: case 0xAB: case 0xBB: case 0xCB: case 0xDB: case 0xEB: case 0xFB: { // one-byte NOP, 1 cycle
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break;
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}
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case 0x44: { // two-byte NOP, 3 cycles
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uint8_t ignored = read_pc_inc();
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(void)ignored;
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break;
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}
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case 0x54: case 0xD4: case 0xF4: { // two-byte NOP, 4 cycles
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uint8_t ignored = read_pc_inc();
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(void)ignored;
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break;
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}
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case 0x5C: { // three-byte NOP, 8 cycles
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uint8_t ignored1 = read_pc_inc();
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(void)ignored1;
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uint8_t ignored2 = read_pc_inc();
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(void)ignored2;
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break;
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}
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case 0xDC: case 0xFC: { // three-byte NOP, 4 cycles
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uint8_t ignored1 = read_pc_inc();
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(void)ignored1;
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uint8_t ignored2 = read_pc_inc();
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(void)ignored2;
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break;
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}
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case 0x7C: { // JMP (ind, X)
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uint8_t low = read_pc_inc();
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uint8_t high = read_pc_inc();
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uint16_t addr = low + high * 256 + x;
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uint8_t addrl = bus.read(addr);
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uint8_t addrh = bus.read(addr + 1);
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addr = addrl + addrh * 256;
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pc = addr;
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break;
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}
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case 0x89: { // BIT imm
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m = read_pc_inc();
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flag_change(Z, (a & m) == 0);
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break;
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}
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case 0x9E: { // STZ abs, X
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uint8_t low = read_pc_inc();
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uint8_t high = read_pc_inc();
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uint16_t addr = low + high * 256;
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bus.write(addr + x, 0);
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break;
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}
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#endif // EMULATE_65C02
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default:
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printf("unhandled instruction %02X at %04X\n", inst, pc - 1);
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@ -1794,22 +1903,22 @@ struct CPU6502
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template<class CLK, class BUS>
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const int32_t CPU6502<CLK, BUS>::cycles[256] =
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{
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/* 0x0- */ 7, 6, -1, -1, -1, 3, 5, -1, 3, 2, 2, -1, -1, 4, 6, 5,
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/* 0x1- */ 2, 5, 5, -1, -1, 4, 6, -1, 2, 4, 2, -1, -1, 4, 7, 5,
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/* 0x2- */ 6, 6, -1, -1, 3, 3, 5, -1, 4, 2, 2, -1, 4, 4, 6, 5,
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/* 0x3- */ 2, 5, -1, -1, -1, 4, 6, -1, 2, 4, 2, -1, -1, 4, 7, 5,
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/* 0x4- */ 6, 6, -1, -1, -1, 3, 5, -1, 3, 2, 2, -1, 3, 4, 6, 5,
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/* 0x5- */ 2, 5, -1, -1, -1, 4, 6, -1, 2, 4, 3, -1, -1, 4, 7, 5,
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/* 0x6- */ 6, 6, -1, -1, 3, 3, 5, -1, 4, 2, 2, -1, 5, 4, 6, 5,
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/* 0x7- */ 2, 5, 5, -1, -1, 4, 6, -1, 2, 4, 4, -1, -1, 4, 7, 5,
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/* 0x8- */ 2, 6, -1, -1, 3, 3, 3, -1, 2, -1, 2, -1, 4, 4, 4, 5,
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/* 0x9- */ 2, 6, 5, -1, 4, 4, 4, -1, 2, 5, 2, -1, 4, 5, -1, 5,
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/* 0xA- */ 2, 6, 2, -1, 3, 3, 3, -1, 2, 2, 2, -1, 4, 4, 4, 5,
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/* 0xB- */ 2, 5, 5, -1, 4, 4, 4, -1, 2, 4, 2, -1, 4, 4, 4, 5,
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/* 0xC- */ 2, 6, -1, -1, 3, 3, 5, -1, 2, 2, 2, -1, 4, 4, 3, 5,
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/* 0xD- */ 2, 5, 5, -1, -1, 4, 6, -1, 2, 4, 3, -1, -1, 4, 7, 5,
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/* 0xE- */ 2, 6, -1, -1, 3, 3, 5, -1, 2, 2, 2, -1, 4, 4, 6, 5,
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/* 0xF- */ 2, 5, -1, -1, -1, 4, 6, -1, 2, 4, 4, -1, -1, 4, 7, 5,
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/* 0x0- */ 7, 6, 2, 1, 5, 3, 5, 0, 3, 2, 2, 1, 6, 4, 6, 5,
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/* 0x1- */ 2, 5, 5, 1, 5, 4, 6, 0, 2, 4, 2, 1, 6, 4, 7, 5,
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/* 0x2- */ 6, 6, 2, 1, 3, 3, 5, 0, 4, 2, 2, 1, 4, 4, 6, 5,
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/* 0x3- */ 2, 5, 0, 1, 0, 4, 6, 0, 2, 4, 2, 1, 0, 4, 7, 5,
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/* 0x4- */ 6, 6, 2, 1, 3, 3, 5, 0, 3, 2, 2, 1, 3, 4, 6, 5,
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/* 0x5- */ 2, 5, 0, 1, 4, 4, 6, 0, 2, 4, 3, 1, 8, 4, 7, 5,
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/* 0x6- */ 6, 6, 2, 1, 3, 3, 5, 0, 4, 2, 2, 1, 5, 4, 6, 5,
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/* 0x7- */ 2, 5, 5, 1, 0, 4, 6, 0, 2, 4, 4, 1, 6, 4, 7, 5,
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/* 0x8- */ 2, 6, 2, 1, 3, 3, 3, 0, 2, 2, 2, 1, 4, 4, 4, 5,
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/* 0x9- */ 2, 6, 5, 1, 4, 4, 4, 0, 2, 5, 2, 1, 4, 5, 5, 5,
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/* 0xA- */ 2, 6, 2, 1, 3, 3, 3, 0, 2, 2, 2, 1, 4, 4, 4, 5,
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/* 0xB- */ 2, 5, 5, 1, 4, 4, 4, 0, 2, 4, 2, 1, 4, 4, 4, 5,
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/* 0xC- */ 2, 6, 2, 1, 3, 3, 5, 0, 2, 2, 2, 1, 4, 4, 3, 5,
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/* 0xD- */ 2, 5, 5, 1, 4, 4, 6, 0, 2, 4, 3, 1, 4, 4, 7, 5,
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/* 0xE- */ 2, 6, 2, 1, 3, 3, 5, 0, 2, 2, 2, 1, 4, 4, 6, 5,
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/* 0xF- */ 2, 5, 0, 1, 4, 4, 6, 0, 2, 4, 4, 1, 4, 4, 7, 5,
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};
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#endif // CPU6502_H
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