mirror of https://github.com/digarok/gsplus.git
replace the old disassembler tables
This commit is contained in:
Kelvin Sherlock
parent
63275ee4ea
commit
25f5593a81
192
src/debug.c
192
src/debug.c
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@ -1267,163 +1267,75 @@ int do_dis_json(char *buf, word32 kpc, int accsize, int xsize, int op_provided,
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}
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switch(type) {
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case ABS:
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if(args != 2) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s $%04x",out,val);
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break;
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case ABSX:
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if(args != 2) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s $%04x,X",out,val);
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break;
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case ABSY:
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if(args != 2) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s $%04x,Y",out,val);
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break;
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case ABSLONG:
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if(args != 3) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s $%06x",out,val);
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break;
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case ABSLONGX:
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if(args != 3) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s $%06x,X",out,val);
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break;
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case ABSIND:
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if(args != 2) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s ($%04x)",out,val);
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break;
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case ABSXIND:
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if(args != 2) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s ($%04x,X)",out,val);
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break;
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case IMPLY:
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if(args != 0) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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case IMPLIED:
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sprintf(buf_disasm,"%s",out);
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break;
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case ACCUM:
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if(args != 0) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s",out);
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break;
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case IMMED:
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if(args == 1) {
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sprintf(buf_disasm,"%s #$%02x",out,val);
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} else if(args == 2) {
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sprintf(buf_disasm,"%s #$%04x",out,val);
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} else {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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break;
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case JUST8:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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case DP:
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case INTERRUPT:
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sprintf(buf_disasm,"%s $%02x",out,val);
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break;
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case DLOC:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s $%02x",out,val);
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break;
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case DLOCX:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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case DP_X:
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sprintf(buf_disasm,"%s $%02x,X",out,val);
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break;
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case DLOCY:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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case DP_Y:
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sprintf(buf_disasm,"%s $%02x,Y",out,val);
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break;
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case DLOCIND:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s ($%02x)",out,val);
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case ABS:
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sprintf(buf_disasm,"%s $%04x",out,val);
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break;
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case DLOCINDY:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s ($%02x),Y",out,val);
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case ABS_X:
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sprintf(buf_disasm,"%s $%04x,X",out,val);
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break;
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case DLOCXIND:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s ($%02x,X)",out,val);
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case ABS_Y:
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sprintf(buf_disasm,"%s $%04x,Y",out,val);
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break;
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case DLOCBRAK:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s [$%02x]",out,val);
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case ABS_LONG:
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sprintf(buf_disasm,"%s $%06x",out,val);
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break;
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case DLOCBRAKY:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s [$%02x],y",out,val);
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case ABS_LONG_X:
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sprintf(buf_disasm,"%s $%06x,X",out,val);
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break;
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case DISP8:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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signed_val = (signed char)val;
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case INDIR:
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sprintf(buf_disasm,"%s ($%0*x)",out,args*2,val);
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break;
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case INDIR_X:
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sprintf(buf_disasm,"%s ($%0*x,X)",out,args*2,val);
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break;
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case INDIR_Y:
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sprintf(buf_disasm,"%s ($%0*x),Y",out,args*2,val);
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break;
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case INDIR_LONG:
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sprintf(buf_disasm,"%s [$%0*x]",out,args*2,val);
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break;
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case INDIR_LONG_Y:
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sprintf(buf_disasm,"%s [$%0*x],Y",out,args*2,val);
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break;
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case IMMED:
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sprintf(buf_disasm,"%s #$%0*x",out, args*2, val);
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break;
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case SR:
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sprintf(buf_disasm,"%s $%02x,S",out,val);
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break;
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case SR_Y:
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sprintf(buf_disasm,"%s ($%02x,S),Y",out,val);
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break;
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case RELATIVE:
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signed_val = args == 1 ? (signed char)val : (signed short)val;
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sprintf(buf_disasm,"%s $%04x",out,
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(word32)(kpc+(signed_val)) & 0xffff);
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break;
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case DISP8S:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s $%02x,S",out,(word32)(byte)(val));
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break;
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case DISP8SINDY:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s ($%02x,S),Y",out,(word32)(byte)(val));
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break;
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case DISP16:
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if(args != 2) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s $%04x", out,
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(word32)(kpc+(signed)(word16)(val)) & 0xffff);
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break;
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case MVPMVN:
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if(args != 2) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s $%02x,$%02x",out,val&0xff,val>>8);
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break;
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case SEPVAL:
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case REPVAL:
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if(args != 1) {
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printf("arg # mismatch for opcode %x\n", opcode);
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}
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sprintf(buf_disasm,"%s #$%02x",out,val);
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case BLOCK:
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sprintf(buf_disasm,"%s $%02x,$%02x",out,val>>8, val&0xff);
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break;
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default:
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printf("argument type: %d unexpected\n", type);
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break;
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@ -479,13 +479,14 @@ static const char *get_inline_debug_name(word32 address) {
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word32 do_list(word32 address, int lines) {
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unsigned char buffer2[32];
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char buffer3[32];
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char buffer[32];
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const char *opcode_string;
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const char *comment;
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unsigned opcode;
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unsigned dtype;
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unsigned mode;
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unsigned operand;
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word32 pc;
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@ -500,8 +501,8 @@ word32 do_list(word32 address, int lines) {
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pc = address;
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opcode = get_memory_c(address++, 0);
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dtype = disasm_types[opcode];
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args = dtype >> 8;
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mode = disasm_types[opcode];
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args = mode >> 8;
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buffer2[bsize++] = opcode;
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opcode_string = disasm_opcodes[opcode];
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@ -536,89 +537,87 @@ word32 do_list(word32 address, int lines) {
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address += args;
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buffer[0] = 0;
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switch(dtype & 0xff) {
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uint32_t ea = 0;
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switch(mode & 0xff) {
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case ABS:
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sprintf(buffer, "$%04x", operand);
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break;
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case ABSX:
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case ABS_X:
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sprintf(buffer, "$%04x,x", operand);
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break;
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case ABSY:
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case ABS_Y:
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sprintf(buffer, "$%04x,y", operand);
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break;
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case ABSIND:
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sprintf(buffer,"($%04x)",operand );
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break;
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case ABSXIND:
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sprintf(buffer,"($%04x,x)",operand );
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break;
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case IMPLY:
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break;
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case ACCUM:
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break;
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case IMMED:
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sprintf(buffer,"#$%0*x",args * 2, operand);
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break;
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case JUST8:
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case DP:
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sprintf(buffer,"$%02x",operand);
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break;
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case DLOC:
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sprintf(buffer,"$%02x",operand);
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break;
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case DLOCX:
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case DP_X:
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sprintf(buffer,"$%02x,x",operand);
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break;
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case DLOCY:
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case DP_Y:
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sprintf(buffer,"$%02x,y",operand);
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break;
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case ABSLONG:
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sprintf(buffer,"$%06x",operand);
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bank = operand >> 16;
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if (bank == 0xe0 || bank == 0xe1 || bank == 0x01 || bank == 0xff)
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comment = debug_tool_name(operand & 0xffff, bank);
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case ABS_LONG:
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sprintf(buffer, "$%06x", operand);
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break;
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case ABSLONGX:
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sprintf(buffer,"$%06x,x",operand);
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bank = operand >> 16;
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if (bank == 0xe0 || bank == 0xe1 || bank == 0x01 || bank == 0xff)
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comment = debug_tool_name(operand & 0xffff, bank);
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case ABS_LONG_X:
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sprintf(buffer, "$%06x,x", operand);
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break;
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case DLOCIND:
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sprintf(buffer,"($%02x)",operand);
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case ABS_LONG_Y:
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sprintf(buffer, "$%06x,y", operand);
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break;
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case DLOCINDY:
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sprintf(buffer,"($%02x),y",operand);
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case INDIR:
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sprintf(buffer,"($%0*x)", args * 2, operand );
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break;
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case DLOCXIND:
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sprintf(buffer,"($%02x,x)",operand);
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case INDIR_X:
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sprintf(buffer,"($%0*x,x)", args * 2, operand );
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break;
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case DLOCBRAK:
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sprintf(buffer,"[$%02x]",operand);
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case INDIR_Y:
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sprintf(buffer,"($%0*x),y", args * 2, operand );
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break;
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case DLOCBRAKY:
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sprintf(buffer,"[$%02x],y",operand);
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case INDIR_LONG:
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sprintf(buffer,"[$%0*x]", args * 2, operand );
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break;
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case DISP8:
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sprintf(buffer,"$%04x",
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(address+(int8_t)operand) & 0xffff);
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case INDIR_LONG_X:
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sprintf(buffer,"[$%0*x,x]", args * 2, operand );
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break;
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case DISP8S:
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sprintf(buffer,"$%02x,s",operand);
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case INDIR_LONG_Y:
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sprintf(buffer,"[$%0*x],y", args * 2, operand );
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break;
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case DISP8SINDY:
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sprintf(buffer,"($%02x,s),y",operand);
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case SR:
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sprintf(buffer,"$%02x,s", operand );
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break;
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case DISP16:
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sprintf(buffer,"$%04x",
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(address+(int16_t)(operand)) & 0xffff);
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case SR_Y:
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sprintf(buffer,"($%02x,s),y", operand );
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break;
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case MVPMVN:
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case IMMEDIATE:
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sprintf(buffer,"#$%0*x",args * 2, operand);
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break;
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case INTERRUPT:
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sprintf(buffer,"$%02x",operand);
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break;
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case BLOCK:
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sprintf(buffer,"$%02x,$%02x",operand >> 8, operand & 0xff);
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break;
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case SEPVAL:
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case REPVAL:
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sprintf(buffer,"#$%02x",operand);
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case RELATIVE:
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ea = address;
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if (args == 1) ea += (int8_t)operand;
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else ea += (int16_t)operand;
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ea &= 0xffff;
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sprintf(buffer,"$%04x", ea);
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if (opcode == 0x62) ea = 0; /* per */
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else ea |= pc & 0xff0000;
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break;
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}
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@ -628,7 +627,6 @@ word32 do_list(word32 address, int lines) {
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comment = debug_tool_name(pc & 0xffff, bank);
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}
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uint32_t ea = 0;
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switch (opcode) {
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case 0xe2: /* sep */
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g_disasm_psr|= operand;
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@ -666,6 +664,7 @@ word32 do_list(word32 address, int lines) {
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break;
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#endif
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case 0x22: /* jsl */
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ea = operand;
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if (operand == 0xe100a8) {
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/* inline GS/OS call? */
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unsigned num = get_memory16_c(address, 0);
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@ -680,12 +679,11 @@ word32 do_list(word32 address, int lines) {
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buffer2[bsize++] = get_memory_c(address++, 0);
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}
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}
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} else {
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ea = operand;
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}
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break;
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case 0x20: /* jsr */
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if (operand == 0xbf00) {
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ea = (operand | (address & 0xff0000));
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if (ea == 0x00bf00) {
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unsigned num = get_memory_c(address, 0);
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const char *name = debug_tool_name(num, operand);
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if (name) {
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@ -697,34 +695,10 @@ word32 do_list(word32 address, int lines) {
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buffer2[bsize++] = get_memory_c(address++, 0);
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}
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}
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} else {
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ea = (operand | (address & 0xff0000));
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}
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break;
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/* relative ops have ea set above */
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case 0x82: {
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ea = address + (int16_t)operand;
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ea &= 0xffff;
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ea |= pc & 0xff0000;
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const char *name = get_inline_debug_name(pc);
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/* start of an inline debug name? */
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if (name) {
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opcode_string = name;
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buffer[0] = 0;
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/* include the 0x77 71 magic bytes */
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for (i = 0; i < 2; ++i) {
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buffer2[bsize++] = get_memory_c(address++, 0);
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}
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address = ea;
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ea = 0;
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}
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break;
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}
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case 0x80: {
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ea = address + (int8_t)operand;
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ea &= 0xffff;
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ea |= pc & 0xff0000;
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const char *name = get_inline_debug_name(pc);
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/* start of an inline debug name? */
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@ -743,41 +717,24 @@ word32 do_list(word32 address, int lines) {
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}
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case 0x10:
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case 0x30:
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case 0x50:
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case 0x70:
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case 0x90:
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case 0xb0:
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case 0xd0:
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case 0xf0: {
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ea = address + (int8_t)operand;
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ea &= 0xffff;
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ea |= pc & 0xff0000;
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break;
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}
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}
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if (opcode == 0xc2 || opcode == 0xe2) {
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if (!comment) {
|
||||
comment = buffer3;
|
||||
snprintf(buffer3, sizeof(buffer3), "e=%d m=%d x=%d",
|
||||
g_disasm_psr & 0x0100 ? 1 : 0,
|
||||
g_disasm_psr & 0x0020 ? 1 : 0,
|
||||
g_disasm_psr & 0x0010 ? 1 : 0
|
||||
);
|
||||
}
|
||||
}
|
||||
|
||||
if (ea && !comment) {
|
||||
comment = get_inline_debug_name(ea);
|
||||
}
|
||||
|
||||
#if 0
|
||||
|
||||
n = printf("%02x/%04x: %s %s",
|
||||
pc >> 16, pc & 0xffff,
|
||||
opcode_string, buffer);
|
||||
for(; n < 40; ++n) putchar(' ');
|
||||
|
||||
for(i = 0; i < bsize; ++i) {
|
||||
n += printf(" %02x", buffer2[i]);
|
||||
}
|
||||
if (comment) {
|
||||
printf("%*s; %s", 60 - n, "", comment);
|
||||
}
|
||||
|
||||
#else
|
||||
/* 12/3456: 01 23 45 LDA #1 ; comment */
|
||||
n = printf("%02x/%04x:",
|
||||
pc >> 16, pc & 0xffff);
|
||||
|
|
@ -791,7 +748,7 @@ word32 do_list(word32 address, int lines) {
|
|||
while (n < 65) { fputc(' ', stdout); ++n; }
|
||||
printf("; %s", comment);
|
||||
}
|
||||
#endif
|
||||
|
||||
fputc('\n', stdout);
|
||||
|
||||
}
|
||||
|
|
@ -820,8 +777,8 @@ word32 next_pc(void) {
|
|||
unsigned opcode = get_memory_c(pc++, 0);
|
||||
unsigned operand = 0;
|
||||
|
||||
unsigned dtype = disasm_types[opcode];
|
||||
unsigned args = dtype >> 8;
|
||||
unsigned mode = disasm_types[opcode];
|
||||
unsigned args = mode >> 8;
|
||||
|
||||
switch (args) {
|
||||
case 4:
|
||||
|
|
@ -1451,8 +1408,8 @@ static int parse_command(const char *cp) {
|
|||
"%pc++" eol {
|
||||
/* todo */
|
||||
unsigned opcode = get_memory_c(engine.kpc, 0);
|
||||
unsigned dtype = disasm_types[opcode];
|
||||
unsigned args = dtype >> 8;
|
||||
unsigned mode = disasm_types[opcode];
|
||||
unsigned args = mode >> 8;
|
||||
word32 tmp;
|
||||
|
||||
switch (args) {
|
||||
|
|
|
|||
167
src/disasm.c
167
src/disasm.c
|
|
@ -1,169 +1,16 @@
|
|||
|
||||
#include "disasm.h"
|
||||
|
||||
|
||||
const char * const disasm_opcodes[256] = {
|
||||
"BRK", "ORA", "COP", "ORA", "TSB", "ORA", "ASL", "ORA", /* 00-07 */
|
||||
"PHP", "ORA", "ASL", "PHD", "TSB", "ORA", "ASL", "ORA", /* 08-0f */
|
||||
"BPL", "ORA", "ORA", "ORA", "TRB", "ORA", "ASL", "ORA", /* 10-17 */
|
||||
"CLC", "ORA", "INC", "TCS", "TRB", "ORA", "ASL", "ORA", /* 18-1f */
|
||||
"JSR", "AND", "JSL", "AND", "BIT", "AND", "ROL", "AND", /* 20-27 */
|
||||
"PLP", "AND", "ROL", "PLD", "BIT", "AND", "ROL", "AND", /* 28-2f */
|
||||
"BMI", "AND", "AND", "AND", "BIT", "AND", "ROL", "AND", /* 30-37 */
|
||||
"SEC", "AND", "DEC", "TSC", "BIT", "AND", "ROL", "AND", /* 38-3f */
|
||||
"RTI", "EOR", "WDM", "EOR", "MVP", "EOR", "LSR", "EOR", /* 40-47 */
|
||||
"PHA", "EOR", "LSR", "PHK", "JMP", "EOR", "LSR", "EOR", /* 48-4f */
|
||||
"BVC", "EOR", "EOR", "EOR", "MVN", "EOR", "LSR", "EOR", /* 50-57 */
|
||||
"CLI", "EOR", "PHY", "TCD", "JMP", "EOR", "LSR", "EOR", /* 58-5f */
|
||||
"RTS", "ADC", "PER", "ADC", "STZ", "ADC", "ROR", "ADC", /* 60-67 */
|
||||
"PLA", "ADC", "ROR", "RTL", "JMP", "ADC", "ROR", "ADC", /* 68-6f */
|
||||
"BVS", "ADC", "ADC", "ADC", "STZ", "ADC", "ROR", "ADC", /* 70-77 */
|
||||
"SEI", "ADC", "PLY", "TDC", "JMP", "ADC", "ROR", "ADC", /* 78-7f */
|
||||
"BRA", "STA", "BRL", "STA", "STY", "STA", "STX", "STA", /* 80-87 */
|
||||
"DEY", "BIT", "TXA", "PHB", "STY", "STA", "STX", "STA", /* 88-8f */
|
||||
"BCC", "STA", "STA", "STA", "STY", "STA", "STX", "STA", /* 90-97 */
|
||||
"TYA", "STA", "TXS", "TXY", "STZ", "STA", "STZ", "STA", /* 98-9f */
|
||||
"LDY", "LDA", "LDX", "LDA", "LDY", "LDA", "LDX", "LDA", /* a0-a7 */
|
||||
"TAY", "LDA", "TAX", "PLB", "LDY", "LDA", "LDX", "LDA", /* a8-af */
|
||||
"BCS", "LDA", "LDA", "LDA", "LDY", "LDA", "LDX", "LDA", /* b0-b7 */
|
||||
"CLV", "LDA", "TSX", "TYX", "LDY", "LDA", "LDX", "LDA", /* b8-bf */
|
||||
"CPY", "CMP", "REP", "CMP", "CPY", "CMP", "DEC", "CMP", /* c0-c7 */
|
||||
"INY", "CMP", "DEX", "WAI", "CPY", "CMP", "DEC", "CMP", /* c8-cf */
|
||||
"BNE", "CMP", "CMP", "CMP", "PEI", "CMP", "DEC", "CMP", /* d0-d7 */
|
||||
"CLD", "CMP", "PHX", "STP", "JML", "CMP", "DEC", "CMP", /* d8-df */
|
||||
"CPX", "SBC", "SEP", "SBC", "CPX", "SBC", "INC", "SBC", /* e0-e7 */
|
||||
"INX", "SBC", "NOP", "XBA", "CPX", "SBC", "INC", "SBC", /* e8-ef */
|
||||
"BEQ", "SBC", "SBC", "SBC", "PEA", "SBC", "INC", "SBC", /* f0-f7 */
|
||||
"SED", "SBC", "PLX", "XCE", "JSR", "SBC", "INC", "SBC", /* f8-ff */
|
||||
#define x(a,b,c,d) #a,
|
||||
#include "opcodes.x"
|
||||
#undef x
|
||||
};
|
||||
|
||||
|
||||
const unsigned disasm_types[256] = {
|
||||
JUST8+0x100, DLOCXIND+0x100, /* 00-01 */
|
||||
JUST8+0x100, DISP8S+0x100, /* 02-03 */
|
||||
DLOC+0x100, DLOC+0x100, /* 04-05 */
|
||||
DLOC+0x100, DLOCBRAK+0x100, /* 06-07 */
|
||||
IMPLY+0x000, IMMED+0x400, /* 08-9 */
|
||||
ACCUM+0x000, IMPLY+0x000, /* 0a-b */
|
||||
ABS+0x200, ABS+0x200, /* c-d */
|
||||
ABS+0x200, ABSLONG+0x300, /* e-f */
|
||||
DISP8+0x100, DLOCINDY+0x100, /* 10-11 */
|
||||
DLOCIND+0x100, DISP8SINDY+0x100, /* 12-13 */
|
||||
DLOC+0x100, DLOCX+0x100, /* 14-15 */
|
||||
DLOCX+0x100, DLOCBRAKY+0x100, /* 16-17 */
|
||||
IMPLY+0x000, ABSY+0x200, /* 18-19 */
|
||||
ACCUM+0x000, IMPLY+0x000, /* 1a-1b */
|
||||
ABS+0x200, ABSX+0x200, /* 1c-1d */
|
||||
ABSX+0x200, ABSLONGX+0x300, /* 1e-1f */
|
||||
ABS+0x200, DLOCXIND+0x100, /* 20-21 */
|
||||
ABSLONG+0x300, DISP8S+0x100, /* 22-23 */
|
||||
DLOC+0x100, DLOC+0x100, /* 24-25 */
|
||||
DLOC+0x100, DLOCBRAK+0x100, /* 26-27 */
|
||||
IMPLY+0x000, IMMED+0x400, /* 28-29 */
|
||||
ACCUM+0x000, IMPLY+0x000, /* 2a-2b */
|
||||
ABS+0x200, ABS+0x200, /* 2c-2d */
|
||||
ABS+0x200, ABSLONG+0x300, /* 2e-2f */
|
||||
DISP8+0x100, DLOCINDY+0x100, /* 30-31 */
|
||||
DLOCIND+0x100, DISP8SINDY+0x100, /* 32-33 */
|
||||
DLOCX+0x100, DLOCX+0x100, /* 34-35 */
|
||||
DLOCX+0x100, DLOCBRAKY+0x100, /* 36-37 */
|
||||
IMPLY+0x000, ABSY+0x200, /* 38-39 */
|
||||
ACCUM+0x000, IMPLY+0x000, /* 3a-3b */
|
||||
ABSX+0x200, ABSX+0x200, /* 3c-3d */
|
||||
ABSX+0x200, ABSLONGX+0x300, /* 3e-3f */
|
||||
IMPLY+0x000, DLOCXIND+0x100, /* 40-41 */
|
||||
JUST8+0x100, DISP8S+0x100, /* 42-43 */
|
||||
MVPMVN+0x200, DLOC+0x100, /* 44-45 */
|
||||
DLOC+0x100, DLOCBRAK+0x100, /* 46-47 */
|
||||
IMPLY+0x000, IMMED+0x400, /* 48-49 */
|
||||
ACCUM+0x000, IMPLY+0x000, /* 4a-4b */
|
||||
ABS+0x200, ABS+0x200, /* 4c-4d */
|
||||
ABS+0x200, ABSLONG+0x300, /* 4e-4f */
|
||||
DISP8+0x100, DLOCINDY+0x100, /* 50-51 */
|
||||
DLOCIND+0x100, DISP8SINDY+0x100, /* 52-53 */
|
||||
MVPMVN+0x200, DLOCX+0x100, /* 54-55 */
|
||||
DLOCX+0x100, DLOCBRAKY+0x100, /* 56-57 */
|
||||
IMPLY+0x000, ABSY+0x200, /* 58-59 */
|
||||
IMPLY+0x000, IMPLY+0x000, /* 5a-5b */
|
||||
ABSLONG+0x300, ABSX+0x200, /* 5c-5d */
|
||||
ABSX+0x200, ABSLONGX+0x300, /* 5e-5f */
|
||||
IMPLY+0x000, DLOCXIND+0x100, /* 60-61 */
|
||||
DISP16+0x200, DISP8S+0x100, /* 62-63 */
|
||||
DLOC+0x100, DLOC+0x100, /* 64-65 */
|
||||
DLOC+0x100, DLOCBRAK+0x100, /* 66-67 */
|
||||
IMPLY+0x000, IMMED+0x400, /* 68-69 */
|
||||
ACCUM+0x000, IMPLY+0x000, /* 6a-6b */
|
||||
ABSIND+0x200, ABS+0x200, /* 6c-6d */
|
||||
ABS+0x200, ABSLONG+0x300, /* 6e-6f */
|
||||
DISP8+0x100, DLOCINDY+0x100, /* 70-71 */
|
||||
DLOCIND+0x100, DISP8SINDY+0x100, /* 72-73 */
|
||||
DLOCX+0x100, DLOCX+0x100, /* 74-75 */
|
||||
DLOCX+0x100, DLOCBRAKY+0x100, /* 76-77 */
|
||||
IMPLY+0x000, ABSY+0x200, /* 78-79 */
|
||||
IMPLY+0x000, IMPLY+0x000, /* 7a-7b */
|
||||
ABSXIND+0x200, ABSX+0x200, /* 7c-7d */
|
||||
ABSX+0x200, ABSLONGX+0x300, /* 7e-7f */
|
||||
DISP8+0x100, DLOCXIND+0x100, /* 80-81 */
|
||||
DISP16+0x200, DISP8S+0x100, /* 82-83 */
|
||||
DLOC+0x100, DLOC+0x100, /* 84-85 */
|
||||
DLOC+0x100, DLOCBRAK+0x100, /* 86-87 */
|
||||
IMPLY+0x000, IMMED+0x400, /* 88-89 */
|
||||
IMPLY+0x000, IMPLY+0x000, /* 8a-8b */
|
||||
ABS+0x200, ABS+0x200, /* 8c-8d */
|
||||
ABS+0x200, ABSLONG+0x300, /* 8e-8f */
|
||||
DISP8+0x100, DLOCINDY+0x100, /* 90-91 */
|
||||
DLOCIND+0x100, DISP8SINDY+0x100, /* 92-93 */
|
||||
DLOCX+0x100, DLOCX+0x100, /* 94-95 */
|
||||
DLOCY+0x100, DLOCBRAKY+0x100, /* 96-97 */
|
||||
IMPLY+0x000, ABSY+0x200, /* 98-99 */
|
||||
IMPLY+0x000, IMPLY+0x000, /* 9a-9b */
|
||||
ABS+0x200, ABSX+0x200, /* 9c-9d */
|
||||
ABSX+0x200, ABSLONGX+0x300, /* 9e-9f */
|
||||
IMMED+0x500, DLOCXIND+0x100, /* a0-a1 */
|
||||
IMMED+0x500, DISP8S+0x100, /* a2-a3 */
|
||||
DLOC+0x100, DLOC+0x100, /* a4-a5 */
|
||||
DLOC+0x100, DLOCBRAK+0x100, /* a6-a7 */
|
||||
IMPLY+0x000, IMMED+0x400, /* a8-a9 */
|
||||
IMPLY+0x000, IMPLY+0x000, /* aa-ab */
|
||||
ABS+0x200, ABS+0x200, /* ac-ad */
|
||||
ABS+0x200, ABSLONG+0x300, /* ae-af */
|
||||
DISP8+0x100, DLOCINDY+0x100, /* b0-b1 */
|
||||
DLOCIND+0x100, DISP8SINDY+0x100, /* b2-b3 */
|
||||
DLOCX+0x100, DLOCX+0x100, /* b4-b5 */
|
||||
DLOCY+0x100, DLOCBRAKY+0x100, /* b6-b7 */
|
||||
IMPLY+0x000, ABSY+0x200, /* b8-b9 */
|
||||
IMPLY+0x000, IMPLY+0x000, /* ba-bb */
|
||||
ABSX+0x200, ABSX+0x200, /* bc-bd */
|
||||
ABSY+0x200, ABSLONGX+0x300, /* be-bf */
|
||||
IMMED+0x500, DLOCXIND+0x100, /* c0-c1 */
|
||||
REPVAL+0x100, DISP8S+0x100, /* c2-c3 */
|
||||
DLOC+0x100, DLOC+0x100, /* c4-c5 */
|
||||
DLOC+0x100, DLOCBRAK+0x100, /* c6-c7 */
|
||||
IMPLY+0x000, IMMED+0x400, /* c8-c9 */
|
||||
IMPLY+0x000, IMPLY+0x000, /* ca-cb */
|
||||
ABS+0x200, ABS+0x200, /* cc-cd */
|
||||
ABS+0x200, ABSLONG+0x300, /* ce-cf */
|
||||
DISP8+0x100, DLOCINDY+0x100, /* d0-d1 */
|
||||
DLOCIND+0x100, DISP8SINDY+0x100, /* d2-d3 */
|
||||
DLOC+0x100, DLOCX+0x100, /* d4-d5 */
|
||||
DLOCX+0x100, DLOCBRAKY+0x100, /* d6-d7 */
|
||||
IMPLY+0x000, ABSY+0x200, /* d8-d9 */
|
||||
IMPLY+0x000, IMPLY+0x000, /* da-db */
|
||||
ABSIND+0x200, ABSX+0x200, /* dc-dd */
|
||||
ABSX+0x200, ABSLONGX+0x300, /* de-df */
|
||||
IMMED+0x500, DLOCXIND+0x100, /* e0-e1 */
|
||||
SEPVAL+0x100, DISP8S+0x100, /* e2-e3 */
|
||||
DLOC+0x100, DLOC+0x100, /* e4-e5 */
|
||||
DLOC+0x100, DLOCBRAK+0x100, /* e6-e7 */
|
||||
IMPLY+0x000, IMMED+0x400, /* e8-e9 */
|
||||
IMPLY+0x000, IMPLY+0x000, /* ea-eb */
|
||||
ABS+0x200, ABS+0x200, /* ec-ed */
|
||||
ABS+0x200, ABSLONG+0x300, /* ee-ef */
|
||||
DISP8+0x100, DLOCINDY+0x100, /* f0-f1 */
|
||||
DLOCIND+0x100, DISP8SINDY+0x100, /* f2-f3 */
|
||||
IMMED+0x200, DLOCX+0x100, /* f4-f5 */
|
||||
DLOCX+0x100, DLOCBRAKY+0x100, /* f6-f7 */
|
||||
IMPLY+0x000, ABSY+0x200, /* f8-f9 */
|
||||
IMPLY+0x000, IMPLY+0x000, /* fa-fb */
|
||||
ABSXIND+0x200, ABSX+0x200, /* fc-fd */
|
||||
ABSX+0x200, ABSLONGX+0x300, /* fe-ff */
|
||||
#define x(a,b,c,d) b + (d << 8),
|
||||
#include "opcodes.x"
|
||||
#undef x
|
||||
};
|
||||
|
|
|
|||
37
src/disasm.h
37
src/disasm.h
|
|
@ -6,32 +6,17 @@
|
|||
*/
|
||||
|
||||
enum {
|
||||
ABS = 1,
|
||||
ABSX,
|
||||
ABSY,
|
||||
ABSIND,
|
||||
ABSXIND,
|
||||
IMPLY,
|
||||
ACCUM,
|
||||
IMMED,
|
||||
JUST8,
|
||||
DLOC,
|
||||
DLOCX,
|
||||
DLOCY,
|
||||
ABSLONG,
|
||||
ABSLONGX,
|
||||
DLOCIND,
|
||||
DLOCINDY,
|
||||
DLOCXIND,
|
||||
DLOCBRAK,
|
||||
DLOCBRAKY,
|
||||
DISP8,
|
||||
DISP8S,
|
||||
DISP8SINDY,
|
||||
DISP16,
|
||||
MVPMVN,
|
||||
REPVAL,
|
||||
SEPVAL
|
||||
IMPLIED,
|
||||
DP, DP_X, DP_Y,
|
||||
ABS, ABS_X, ABS_Y,
|
||||
ABS_LONG, ABS_LONG_X, ABS_LONG_Y,
|
||||
INDIR, INDIR_X, INDIR_Y,
|
||||
INDIR_LONG, INDIR_LONG_X, INDIR_LONG_Y,
|
||||
SR, SR_Y,
|
||||
IMMEDIATE,
|
||||
RELATIVE,
|
||||
INTERRUPT,
|
||||
BLOCK,
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,256 @@
|
|||
x(BRK, INTERRUPT , 0x00, 1)
|
||||
x(ORA, INDIR_X , 0x01, 1)
|
||||
x(COP, INTERRUPT , 0x02, 1)
|
||||
x(ORA, SR , 0x03, 1)
|
||||
x(TSB, DP , 0x04, 1)
|
||||
x(ORA, DP , 0x05, 1)
|
||||
x(ASL, DP , 0x06, 1)
|
||||
x(ORA, INDIR_LONG , 0x07, 1)
|
||||
x(PHP, IMPLIED , 0x08, 0)
|
||||
x(ORA, IMMEDIATE , 0x09, 4)
|
||||
x(ASL, IMPLIED , 0x0a, 0)
|
||||
x(PHD, IMPLIED , 0x0b, 0)
|
||||
x(TSB, ABS , 0x0c, 2)
|
||||
x(ORA, ABS , 0x0d, 2)
|
||||
x(ASL, ABS , 0x0e, 2)
|
||||
x(ORA, ABS_LONG , 0x0f, 3)
|
||||
x(BPL, RELATIVE , 0x10, 1)
|
||||
x(ORA, INDIR_Y , 0x11, 1)
|
||||
x(ORA, INDIR , 0x12, 1)
|
||||
x(ORA, SR_Y , 0x13, 1)
|
||||
x(TRB, DP , 0x14, 1)
|
||||
x(ORA, DP_X , 0x15, 1)
|
||||
x(ASL, DP_X , 0x16, 1)
|
||||
x(ORA, INDIR_LONG_Y, 0x17, 1)
|
||||
x(CLC, IMPLIED , 0x18, 0)
|
||||
x(ORA, ABS_Y , 0x19, 2)
|
||||
x(INC, IMPLIED , 0x1a, 0)
|
||||
x(TCS, IMPLIED , 0x1b, 0)
|
||||
x(TRB, ABS , 0x1c, 2)
|
||||
x(ORA, ABS_X , 0x1d, 2)
|
||||
x(ASL, ABS_X , 0x1e, 2)
|
||||
x(ORA, ABS_LONG_X , 0x1f, 3)
|
||||
x(JSR, ABS , 0x20, 2)
|
||||
x(AND, INDIR_X , 0x21, 1)
|
||||
x(JSL, ABS_LONG , 0x22, 3)
|
||||
x(AND, SR , 0x23, 1)
|
||||
x(BIT, DP , 0x24, 1)
|
||||
x(AND, DP , 0x25, 1)
|
||||
x(ROL, DP , 0x26, 1)
|
||||
x(AND, INDIR_LONG , 0x27, 1)
|
||||
x(PLP, IMPLIED , 0x28, 0)
|
||||
x(AND, IMMEDIATE , 0x29, 4)
|
||||
x(ROL, IMPLIED , 0x2a, 0)
|
||||
x(PLD, IMPLIED , 0x2b, 0)
|
||||
x(BIT, ABS , 0x2c, 2)
|
||||
x(AND, ABS , 0x2d, 2)
|
||||
x(ROL, ABS , 0x2e, 2)
|
||||
x(AND, ABS_LONG , 0x2f, 3)
|
||||
x(BMI, RELATIVE , 0x30, 1)
|
||||
x(AND, INDIR_Y , 0x31, 1)
|
||||
x(AND, INDIR , 0x32, 1)
|
||||
x(AND, SR_Y , 0x33, 1)
|
||||
x(BIT, DP_X , 0x34, 1)
|
||||
x(AND, DP_X , 0x35, 1)
|
||||
x(ROL, DP_X , 0x36, 1)
|
||||
x(AND, INDIR_LONG_Y, 0x37, 1)
|
||||
x(SEC, IMPLIED , 0x38, 0)
|
||||
x(AND, ABS_Y , 0x39, 2)
|
||||
x(DEC, IMPLIED , 0x3a, 0)
|
||||
x(TSC, IMPLIED , 0x3b, 0)
|
||||
x(BIT, ABS_X , 0x3c, 2)
|
||||
x(AND, ABS_X , 0x3d, 2)
|
||||
x(ROL, ABS_X , 0x3e, 2)
|
||||
x(AND, ABS_LONG_X , 0x3f, 3)
|
||||
x(RTI, IMPLIED , 0x40, 0)
|
||||
x(EOR, INDIR_X , 0x41, 1)
|
||||
x(WDM, INTERRUPT , 0x42, 1)
|
||||
x(EOR, SR , 0x43, 1)
|
||||
x(MVP, BLOCK , 0x44, 2)
|
||||
x(EOR, DP , 0x45, 1)
|
||||
x(LSR, DP , 0x46, 1)
|
||||
x(EOR, INDIR_LONG , 0x47, 1)
|
||||
x(PHA, IMPLIED , 0x48, 0)
|
||||
x(EOR, IMMEDIATE , 0x49, 4)
|
||||
x(LSR, IMPLIED , 0x4a, 0)
|
||||
x(PHK, IMPLIED , 0x4b, 0)
|
||||
x(JMP, ABS , 0x4c, 2)
|
||||
x(EOR, ABS , 0x4d, 2)
|
||||
x(LSR, ABS , 0x4e, 2)
|
||||
x(EOR, ABS_LONG , 0x4f, 3)
|
||||
x(BVC, RELATIVE , 0x50, 1)
|
||||
x(EOR, INDIR_Y , 0x51, 1)
|
||||
x(EOR, INDIR , 0x52, 1)
|
||||
x(EOR, SR_Y , 0x53, 1)
|
||||
x(MVN, BLOCK , 0x54, 2)
|
||||
x(EOR, DP_X , 0x55, 1)
|
||||
x(LSR, DP_X , 0x56, 1)
|
||||
x(EOR, INDIR_LONG_Y, 0x57, 1)
|
||||
x(CLI, IMPLIED , 0x58, 0)
|
||||
x(EOR, ABS_Y , 0x59, 2)
|
||||
x(PHY, IMPLIED , 0x5a, 0)
|
||||
x(TCD, IMPLIED , 0x5b, 0)
|
||||
x(JML, ABS_LONG , 0x5c, 3)
|
||||
x(EOR, ABS_X , 0x5d, 2)
|
||||
x(LSR, ABS_X , 0x5e, 2)
|
||||
x(EOR, ABS_LONG_X , 0x5f, 3)
|
||||
x(RTS, IMPLIED , 0x60, 0)
|
||||
x(ADC, INDIR_X , 0x61, 1)
|
||||
x(PER, RELATIVE , 0x62, 2)
|
||||
x(ADC, SR , 0x63, 1)
|
||||
x(STZ, DP , 0x64, 1)
|
||||
x(ADC, DP , 0x65, 1)
|
||||
x(ROR, DP , 0x66, 1)
|
||||
x(ADC, INDIR_LONG , 0x67, 1)
|
||||
x(PLA, IMPLIED , 0x68, 0)
|
||||
x(ADC, IMMEDIATE , 0x69, 4)
|
||||
x(ROR, IMPLIED , 0x6a, 0)
|
||||
x(RTL, IMPLIED , 0x6b, 0)
|
||||
x(JMP, INDIR , 0x6c, 2)
|
||||
x(ADC, ABS , 0x6d, 2)
|
||||
x(ROR, ABS , 0x6e, 2)
|
||||
x(ADC, ABS_LONG , 0x6f, 3)
|
||||
x(BVS, RELATIVE , 0x70, 1)
|
||||
x(ADC, INDIR_Y , 0x71, 1)
|
||||
x(ADC, INDIR , 0x72, 1)
|
||||
x(ADC, SR_Y , 0x73, 1)
|
||||
x(STZ, DP_X , 0x74, 1)
|
||||
x(ADC, DP_X , 0x75, 1)
|
||||
x(ROR, DP_X , 0x76, 1)
|
||||
x(ADC, INDIR_LONG_Y, 0x77, 1)
|
||||
x(SEI, IMPLIED , 0x78, 0)
|
||||
x(ADC, ABS_Y , 0x79, 2)
|
||||
x(PLY, IMPLIED , 0x7a, 0)
|
||||
x(TDC, IMPLIED , 0x7b, 0)
|
||||
x(JMP, INDIR_X , 0x7c, 2)
|
||||
x(ADC, ABS_X , 0x7d, 2)
|
||||
x(ROR, ABS_X , 0x7e, 2)
|
||||
x(ADC, ABS_LONG_X , 0x7f, 3)
|
||||
x(BRA, RELATIVE , 0x80, 1)
|
||||
x(STA, INDIR_X , 0x81, 1)
|
||||
x(BRL, RELATIVE , 0x82, 2)
|
||||
x(STA, SR , 0x83, 1)
|
||||
x(STY, DP , 0x84, 1)
|
||||
x(STA, DP , 0x85, 1)
|
||||
x(STX, DP , 0x86, 1)
|
||||
x(STA, INDIR_LONG , 0x87, 1)
|
||||
x(DEY, IMPLIED , 0x88, 0)
|
||||
x(BIT, IMMEDIATE , 0x89, 4)
|
||||
x(TXA, IMPLIED , 0x8a, 0)
|
||||
x(PHB, IMPLIED , 0x8b, 0)
|
||||
x(STY, ABS , 0x8c, 2)
|
||||
x(STA, ABS , 0x8d, 2)
|
||||
x(STX, ABS , 0x8e, 2)
|
||||
x(STA, ABS_LONG , 0x8f, 3)
|
||||
x(BCC, RELATIVE , 0x90, 1)
|
||||
x(STA, INDIR_Y , 0x91, 1)
|
||||
x(STA, INDIR , 0x92, 1)
|
||||
x(STA, SR_Y , 0x93, 1)
|
||||
x(STY, DP_X , 0x94, 1)
|
||||
x(STA, DP_X , 0x95, 1)
|
||||
x(STX, DP_Y , 0x96, 1)
|
||||
x(STA, INDIR_LONG_Y, 0x97, 1)
|
||||
x(TYA, IMPLIED , 0x98, 0)
|
||||
x(STA, ABS_Y , 0x99, 2)
|
||||
x(TXS, IMPLIED , 0x9a, 0)
|
||||
x(TXY, IMPLIED , 0x9b, 0)
|
||||
x(STZ, ABS , 0x9c, 2)
|
||||
x(STA, ABS_X , 0x9d, 2)
|
||||
x(STZ, ABS_X , 0x9e, 2)
|
||||
x(STA, ABS_LONG_X , 0x9f, 3)
|
||||
x(LDY, IMMEDIATE , 0xa0, 5)
|
||||
x(LDA, INDIR_X , 0xa1, 1)
|
||||
x(LDX, IMMEDIATE , 0xa2, 5)
|
||||
x(LDA, SR , 0xa3, 1)
|
||||
x(LDY, DP , 0xa4, 1)
|
||||
x(LDA, DP , 0xa5, 1)
|
||||
x(LDX, DP , 0xa6, 1)
|
||||
x(LDA, INDIR_LONG , 0xa7, 1)
|
||||
x(TAY, IMPLIED , 0xa8, 0)
|
||||
x(LDA, IMMEDIATE , 0xa9, 4)
|
||||
x(TAX, IMPLIED , 0xaa, 0)
|
||||
x(PLB, IMPLIED , 0xab, 0)
|
||||
x(LDY, ABS , 0xac, 2)
|
||||
x(LDA, ABS , 0xad, 2)
|
||||
x(LDX, ABS , 0xae, 2)
|
||||
x(LDA, ABS_LONG , 0xaf, 3)
|
||||
x(BCS, RELATIVE , 0xb0, 1)
|
||||
x(LDA, INDIR_Y , 0xb1, 1)
|
||||
x(LDA, INDIR , 0xb2, 1)
|
||||
x(LDA, SR_Y , 0xb3, 1)
|
||||
x(LDY, DP_X , 0xb4, 1)
|
||||
x(LDA, DP_X , 0xb5, 1)
|
||||
x(LDX, DP_Y , 0xb6, 1)
|
||||
x(LDA, INDIR_LONG_Y, 0xb7, 1)
|
||||
x(CLV, IMPLIED , 0xb8, 0)
|
||||
x(LDA, ABS_Y , 0xb9, 2)
|
||||
x(TSX, IMPLIED , 0xba, 0)
|
||||
x(TYX, IMPLIED , 0xbb, 0)
|
||||
x(LDY, ABS_X , 0xbc, 2)
|
||||
x(LDA, ABS_X , 0xbd, 2)
|
||||
x(LDX, ABS_Y , 0xbe, 2)
|
||||
x(LDA, ABS_LONG_X , 0xbf, 3)
|
||||
x(CPY, IMMEDIATE , 0xc0, 5)
|
||||
x(CMP, INDIR_X , 0xc1, 1)
|
||||
x(REP, IMMEDIATE , 0xc2, 1)
|
||||
x(CMP, SR , 0xc3, 1)
|
||||
x(CPY, DP , 0xc4, 1)
|
||||
x(CMP, DP , 0xc5, 1)
|
||||
x(DEC, DP , 0xc6, 1)
|
||||
x(CMP, INDIR_LONG , 0xc7, 1)
|
||||
x(INY, IMPLIED , 0xc8, 0)
|
||||
x(CMP, IMMEDIATE , 0xc9, 4)
|
||||
x(DEX, IMPLIED , 0xca, 0)
|
||||
x(WAI, IMPLIED , 0xcb, 0)
|
||||
x(CPY, ABS , 0xcc, 2)
|
||||
x(CMP, ABS , 0xcd, 2)
|
||||
x(DEC, ABS , 0xce, 2)
|
||||
x(CMP, ABS_LONG , 0xcf, 3)
|
||||
x(BNE, RELATIVE , 0xd0, 1)
|
||||
x(CMP, INDIR_Y , 0xd1, 1)
|
||||
x(CMP, INDIR , 0xd2, 1)
|
||||
x(CMP, SR_Y , 0xd3, 1)
|
||||
x(PEI, INDIR , 0xd4, 1)
|
||||
x(CMP, DP_X , 0xd5, 1)
|
||||
x(DEC, DP_X , 0xd6, 1)
|
||||
x(CMP, INDIR_LONG_Y, 0xd7, 1)
|
||||
x(CLD, IMPLIED , 0xd8, 0)
|
||||
x(CMP, ABS_Y , 0xd9, 2)
|
||||
x(PHX, IMPLIED , 0xda, 0)
|
||||
x(STP, IMPLIED , 0xdb, 0)
|
||||
x(JML, INDIR_LONG , 0xdc, 2)
|
||||
x(CMP, ABS_X , 0xdd, 2)
|
||||
x(DEC, ABS_X , 0xde, 2)
|
||||
x(CMP, ABS_LONG_X , 0xdf, 3)
|
||||
x(CPX, IMMEDIATE , 0xe0, 5)
|
||||
x(SBC, INDIR_X , 0xe1, 1)
|
||||
x(SEP, IMMEDIATE , 0xe2, 1)
|
||||
x(SBC, SR , 0xe3, 1)
|
||||
x(CPX, DP , 0xe4, 1)
|
||||
x(SBC, DP , 0xe5, 1)
|
||||
x(INC, DP , 0xe6, 1)
|
||||
x(SBC, INDIR_LONG , 0xe7, 1)
|
||||
x(INX, IMPLIED , 0xe8, 0)
|
||||
x(SBC, IMMEDIATE , 0xe9, 4)
|
||||
x(NOP, IMPLIED , 0xea, 0)
|
||||
x(XBA, IMPLIED , 0xeb, 0)
|
||||
x(CPX, ABS , 0xec, 2)
|
||||
x(SBC, ABS , 0xed, 2)
|
||||
x(INC, ABS , 0xee, 2)
|
||||
x(SBC, ABS_LONG , 0xef, 3)
|
||||
x(BEQ, RELATIVE , 0xf0, 1)
|
||||
x(SBC, INDIR_Y , 0xf1, 1)
|
||||
x(SBC, INDIR , 0xf2, 1)
|
||||
x(SBC, SR_Y , 0xf3, 1)
|
||||
x(PEA, ABS , 0xf4, 2)
|
||||
x(SBC, DP_X , 0xf5, 1)
|
||||
x(INC, DP_X , 0xf6, 1)
|
||||
x(SBC, INDIR_LONG_Y, 0xf7, 1)
|
||||
x(SED, IMPLIED , 0xf8, 0)
|
||||
x(SBC, ABS_Y , 0xf9, 2)
|
||||
x(PLX, IMPLIED , 0xfa, 0)
|
||||
x(XCE, IMPLIED , 0xfb, 0)
|
||||
x(JSR, INDIR_X , 0xfc, 2)
|
||||
x(SBC, ABS_X , 0xfd, 2)
|
||||
x(INC, ABS_X , 0xfe, 2)
|
||||
x(SBC, ABS_LONG_X , 0xff, 3)
|
||||
Loading…
Reference in New Issue