mirror of
https://github.com/ivanizag/izapple2.git
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88 lines
2.8 KiB
Go
88 lines
2.8 KiB
Go
package izapple2
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import (
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"fmt"
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)
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/*
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Profile card for Apple II Interface.
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The firmware source code for 5MB is available at: https://bitsavers.org/pdf/apple/disk/profile/appleII_interface/AII_Profile_Boot_Prom_198402.pdf
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See also:
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https://bitsavers.org/pdf/apple/disk/profile/072-0116_Profile_Level_II_Service_Manual_Oct84.pdf
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https://bitsavers.org/pdf/apple/disk/profile/Profile_Communication_Protocol.pdf
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https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Hard%20Disk%20Drive%20Controllers/Apple%20II%20ProFile%20Interface%20Card/
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Softswitches:
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W0: WR_PORT, write to Z8 RAM (byte at a time)
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R1: RD_PORT, read from Z8 RAM (byte at a time)
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R2: BUSY, Z8 not ready
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bit 0 off is drive present and connected to card
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bit 6 is parity error
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bit 7 on is ready and online
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W2: RSTAT?
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W3: CLR PARITY, clear any previous parity error
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*/
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// CardProfile represents the Apple II Profile interface card
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type CardProfile struct {
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cardBase
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}
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func newCardProfileBuilder() *cardBuilder {
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return &cardBuilder{
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name: "Apple II Profile interface card",
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description: "Profile interface card - not implemented",
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hide: true,
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defaultParams: &[]paramSpec{
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{"rom", "ROM file to load", "<internal>/Apple II Interface 341-0271-A ROM 2716 for 5MB Profile.bin"},
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//{"rom", "ROM file to load", "<internal>/Apple II Interface 341-0299-B ROM 2716 for 10MB Profile.bin"},
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},
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buildFunc: func(params map[string]string) (Card, error) {
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var c CardProfile
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romFile := paramsGetPath(params, "rom")
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err := c.loadRomFromResource(romFile, cardRomUpperEnd)
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if err != nil {
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return nil, err
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}
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return &c, nil
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},
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}
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}
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func (c *CardProfile) assign(a *Apple2, slot int) {
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// WR_PORT, write to Z8 RAM (byte at a time)
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c.addCardSoftSwitchW(0, func(value uint8) {
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fmt.Printf("[cardProfile] WR_PORT: Write to Z8 RAM, value 0x%02x\n", value)
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}, "PROFILE_WR_PORT")
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// RD_PORT, read from Z8 RAM (byte at a time)
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c.addCardSoftSwitchR(1, func() uint8 {
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fmt.Printf("[cardProfile] RD_PORT: Read from Z8 RAM\n")
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return 0x00 // Return dummy data for now
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}, "PROFILE_RD_PORT")
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// BUSY, Z8 not ready
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c.addCardSoftSwitchR(2, func() uint8 {
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fmt.Printf("[cardProfile] BUSY: Z8 status check\n")
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// Return 0x80 (bit 7 on) to indicate ready and online
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// bit 0 off indicates drive present
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return 0x80
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}, "PROFILE_BUSY")
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// RSTAT?
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c.addCardSoftSwitchW(2, func(value uint8) {
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fmt.Printf("[cardProfile] RSTAT: Write status, value 0x%02x\n", value)
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}, "PROFILE_RSTAT")
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// CLR PARITY, clear any previous parity error
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c.addCardSoftSwitchW(3, func(value uint8) {
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fmt.Printf("[cardProfile] CLR_PARITY: Clear parity error, value 0x%02x\n", value)
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}, "PROFILE_CLR_PARITY")
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// Call base assignment to setup ROM and other card functionality
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c.cardBase.assign(a, slot)
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}
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