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MiniMemoryTester
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fix RAM detection code and SCB text colorizer

This commit is contained in:
Dagen Brock 2018-10-30 13:08:08 -05:00
parent 178e17b1bf
commit dba1ce9a42
3 changed files with 38 additions and 28 deletions
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2
brun
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@ -6,4 +6,4 @@ if [ $? -ne 0 ]; then
exit 1 exit 1
fi fi
./gsport ./gsplus

33
src/misc.s
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@ -61,40 +61,51 @@ MiniWait nop
mx %11 mx %11
ColorizeMenu ColorizeMenu
lda #6 lda #6
ldx #$A0 ; green ldx #$A0 ; lt gray
jsr WaitScanline jsr WaitScanline
lda #7 lda #7
ldx #$c0 ; green ldx #$A0 ; lt gray
jsr WaitScanline
lda #8
ldx #$C0 ; green
jsr WaitScanline jsr WaitScanline
lda #9 lda #9
ldx #$d0 ; yello ldx #$C0 ; green
jsr WaitScanline jsr WaitScanline
lda #10 lda #10
ldx #$90 ; orange ldx #$C0 ; green
jsr WaitScanline jsr WaitScanline
lda #11 lda #11
ldx #$10 ; red ldx #$d0 ; yello
jsr WaitScanline jsr WaitScanline
lda #12 lda #12
ldx #$90 ; orange
jsr WaitScanline
lda #13
ldx #$10 ; red
jsr WaitScanline
lda #14
ldx #$30 ; purple ldx #$30 ; purple
jsr WaitScanline jsr WaitScanline
lda #13 lda #15
ldx #$70 ; bblue ldx #$70 ; bblue
jsr WaitScanline jsr WaitScanline
lda #16
lda #15
ldx #$50 ; grey ldx #$50 ; grey
jsr WaitScanline jsr WaitScanline
lda #16 lda #17
ldx #$f0 ; white ldx #$f0 ; white
jsr WaitScanline jsr WaitScanline
rts rts
@ -103,9 +114,9 @@ ColorizeMenu
WaitScanline ;jmp WaitSCB WaitScanline ;jmp WaitSCB
sta :val+1 sta :val+1
:waitloop lda $c02f :waitloop ldal $e0c02f
asl asl
lda $c02e ldal $e0c02e
rol rol
:val cmp #$00 :val cmp #$00
bne :waitloop bne :waitloop

31
src/mmt.s
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@ -1786,7 +1786,6 @@ DetectRam
lda #BankROMUsed lda #BankROMUsed
sta BankMap+$FE ;bank FE sta BankMap+$FE ;bank FE
sta BankMap+$FF ;bank FF sta BankMap+$FF ;bank FF
lda GSROM lda GSROM
cmp #3 ;check for ROM3 IIgs cmp #3 ;check for ROM3 IIgs
bne :rom0or1 bne :rom0or1
@ -1799,15 +1798,15 @@ DetectRam
lda #BankROMUsed ;ROM 3 is 256KB, so 4 banks (2 additional) lda #BankROMUsed ;ROM 3 is 256KB, so 4 banks (2 additional)
sta BankMap+$FC ; sta BankMap+$FC ;
sta BankMap+$FD ; sta BankMap+$FD ;
ldx #$10 ;ROM3 starts scan at bank 10 ldx #$FB ;ROM3 starts scan at bank FC
txy txy
bra :writeloop bra :writeloop
:rom0or1 ;no additional mappings :rom0or1 ;no additional mappings
lda #$FE ;ROM1 end bank FE lda #$02 ;ROM1 end bank FE
sta :endbankscan+1 ;but change our max scan bank sta :endbankscan+1 ;but change our min scan bank
sta :endbankscan2+1 ;but change our max scan bank sta :endbankscan2+1 ;but change our min scan bank
ldx #$02 ;ROM0/1 starts scan at bank 02 ldx #$FE ;ROM0/1 starts scan at bank FE
txy txy
@ -1816,12 +1815,12 @@ DetectRam
eor #$FF ;INVERT eor #$FF ;INVERT
:writer stal $000000 ;should overwrite first byte :writer stal $000000 ;should overwrite first byte
inx dex
cpx #$E0 cpx #$EF
bne :endbankscan bne :endbankscan
ldx #$F0 ;skip to bank F0 (skip banks E0-EF) ldx #$DF ;skip to bank DF (skip banks E0-EF)
:endbankscan cpx #$FC ;ROM3 end bank (default) :endbankscan cpx #$10 ;ROM3 end bank (default)
bcc :writeloop ;blt bcs :writeloop ;blt
tyx ;restore start bank tyx ;restore start bank
@ -1835,13 +1834,13 @@ DetectRam
inc BankExpansionRam ;TotalMB++ inc BankExpansionRam ;TotalMB++
lda #BankRAMFastExpansion ;store mapping lda #BankRAMFastExpansion ;store mapping
sta BankMap,x sta BankMap,x
:continue inx :continue dex
cpx #$E0 cpx #$EF
bne :endbankscan2 bne :endbankscan2
ldx #$F0 ;skip to bank F0 (skip banks E0-EF) ldx #$DF ;skip to bank F0 (skip banks E0-EF)
:endbankscan2 cpx #$FC ;ROM3 end bank (default) :endbankscan2 cpx #$10 ;ROM3 end bank (default)
bcc :detectloopread ;blt bcs :detectloopread ;blt