Implement unary negation and bitwise complement for 64-bit types.

This commit is contained in:
Stephen Heumann 2021-01-30 13:49:06 -06:00
parent abb0fa0fc1
commit 2e44c36c59
6 changed files with 56 additions and 2 deletions

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@ -142,9 +142,11 @@
{ }
{ pc_bnt - bitwise negation }
{ pc_bnl - long bitwise negation }
{ pc_bnq - long long bitwise negation }
{ }
{ Gen0(pc_bnt) cgByte,cgUByte,cgWord,cgUWord }
{ Gen0(pc_bnl) cgLong,cgULong }
{ Gen0(pc_bnq) cgQuad,cgUQuad }
{ }
{ The value on the top of the evaluation stack is removed, }
{ exclusive ored with $FFFF, and replaced. (One's compliment.)}
@ -490,10 +492,12 @@
{ }
{ pc_ngi - integer negation }
{ pc_ngl - long negation }
{ pc_ngq - long long negation }
{ pc_ngr - real negation }
{ }
{ Gen0(pc_ngi) cgByte,cgUByte,cgWord,cgUWord }
{ Gen0(pc_ngl) cgLong,cgULong }
{ Gen0(pc_ngq) cgQuad,cgUQuad }
{ Gen0(pc_ngr) cgReal,cgDouble,cgComp,cgExtended }
{ }
{ The value on the top of the evaluation stack is removed, }

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@ -119,6 +119,8 @@ opt[pc_nop] := 'nop';
opt[pc_bqr] := 'bqr';
opt[pc_bqx] := 'bqx';
opt[pc_baq] := 'baq';
opt[pc_bnq] := 'bnq';
opt[pc_ngq] := 'ngq';
end; {InitWriteCode}

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@ -229,7 +229,7 @@ type
dc_sym,pc_lnd,pc_lor,pc_vsr,pc_uml,pc_udl,pc_ulm,pc_pop,pc_gil,
pc_gli,pc_gdl,pc_gld,pc_cpi,pc_tri,pc_lbu,pc_lbf,pc_sbf,pc_cbf,dc_cns,
dc_prm,pc_nat,pc_bno,pc_nop,pc_psh,pc_ili,pc_iil,pc_ild,pc_idl,
pc_bqr,pc_bqx,pc_baq);
pc_bqr,pc_bqx,pc_baq,pc_bnq,pc_ngq);
{intermediate code}
{-----------------}

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@ -4926,7 +4926,7 @@ case code^.opcode of
pc_bnt, pc_bnl, pc_cnv, pc_dec, pc_inc, pc_ind, pc_lbf, pc_lbu,
pc_ngi, pc_ngl, pc_ngr, pc_not, pc_stk, pc_cop, pc_cpo, pc_tl1,
pc_sro, pc_str, pc_fjp, pc_tjp, pc_xjp, pc_cup, pc_pop, pc_iil,
pc_ili, pc_idl, pc_ild:
pc_ili, pc_idl, pc_ild, pc_bnq, pc_ngq:
begin
code^.left := Pop;
Push(code);

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@ -3597,6 +3597,8 @@ case tree^.token.kind of
Gen0(pc_ngi);
cgLong,cgULong:
Gen0(pc_ngl);
cgQuad,cgUQuad:
Gen0(pc_ngq);
cgExtended:
Gen0(pc_ngr);
otherwise:
@ -3613,6 +3615,8 @@ case tree^.token.kind of
Gen0(pc_bnt);
cgLong,cgULong:
Gen0(pc_bnl);
cgQuad,cgUQuad:
Gen0(pc_bnq);
otherwise:
error(66);
end; {case}

44
Gen.pas
View File

@ -3932,6 +3932,49 @@ gLong.where := onStack; {the result is on the stack}
end; {GenUnaryLong}
procedure GenUnaryQuad (op: icptr);
{ generate a pc_bnq or pc_ngq }
begin {GenUnaryQuad}
GenTree(op^.left);
case op^.opcode of {do the operation}
pc_bnq: begin
GenNative(m_lda_s, direct, 1, nil, 0);
GenNative(m_eor_imm, immediate, $FFFF, nil, 0);
GenNative(m_sta_s, direct, 1, nil, 0);
GenNative(m_lda_s, direct, 3, nil, 0);
GenNative(m_eor_imm, immediate, $FFFF, nil, 0);
GenNative(m_sta_s, direct, 3, nil, 0);
GenNative(m_lda_s, direct, 5, nil, 0);
GenNative(m_eor_imm, immediate, $FFFF, nil, 0);
GenNative(m_sta_s, direct, 5, nil, 0);
GenNative(m_lda_s, direct, 7, nil, 0);
GenNative(m_eor_imm, immediate, $FFFF, nil, 0);
GenNative(m_sta_s, direct, 7, nil, 0);
end; {case pc_bnq}
pc_ngq: begin
GenImplied(m_sec);
GenNative(m_ldy_imm, immediate, 0, nil, 0);
GenImplied(m_tya);
GenNative(m_sbc_s, direct, 1, nil, 0);
GenNative(m_sta_s, direct, 1, nil, 0);
GenImplied(m_tya);
GenNative(m_sbc_s, direct, 3, nil, 0);
GenNative(m_sta_s, direct, 3, nil, 0);
GenImplied(m_tya);
GenNative(m_sbc_s, direct, 5, nil, 0);
GenNative(m_sta_s, direct, 5, nil, 0);
GenImplied(m_tya);
GenNative(m_sbc_s, direct, 7, nil, 0);
GenNative(m_sta_s, direct, 7, nil, 0);
end; {case pc_ngq}
end; {case}
end; {GenUnaryQuad}
procedure GenTree {op: icptr};
{ generate code for op and its children }
@ -5718,6 +5761,7 @@ case op^.opcode of
pc_uml,pc_vsr: GenBinLong(op);
pc_bqr,pc_bqx,pc_baq: GenBinQuad(op);
pc_bnl,pc_ngl: GenUnaryLong(op);
pc_bnq,pc_ngq: GenUnaryQuad(op);
pc_bno: GenBno(op);
pc_bnt,pc_ngi,pc_not: GenBntNgiNot(op);
pc_cnv: GenCnv(op);