sim.asm:

- did a 'setcom 60' to catch the weird formatting
	- created a dummy routine to go in the .root file.
	- this file didn't originally compile due to unresolved
	  references to ExtVect2.  Looking at the source it appears that
	  someone had started to modify it to allow a second interrupt
	  vector, but handn't finished the job.  I commented out the
	  initialization and checking of ExtVect2.
simlib.asm:
	- did a 'setcom 60' to catch the weird formatting
	- created a dummy routine to go in the .root file.
Makefile:
	- complete overhaul to fit into the GNO base builds

sys/sim/Makefile

@@ -1,17 +1,52 @@
-sim.root: sim.asm sim.mac simequates.equ
+#
-  compile sim.asm keep=sim
+# $Id: Makefile,v 1.2 1999/02/08 05:53:37 gdr-ftp Exp $
+#
 
-sim: sim.root
+.INCLUDE: /src/gno/paths.mk
-  link sim keep=sim
+.INCLUDE: /src/gno/lib/const.mk
-  chtyp -t \$B6 sim
 
-simlib.root: simlib.asm simlib.mac simequates.equ
+SIM	= $(OBJ_DIR)SIM
-  compile simlib.asm keep=simlib
+LIBSIM	= $(OBJ_DIR)libsim
 
-libsim: simlib.root
+build:	$(OBJ_DIR) $(LIBSIM) $(SIM)
-  rm -f libsim
-  makelib libsim +simlib.root +simlib.a
 
-test: test.c libsim
+$(OBJ_DIR):
-  compile test.c keep=test
+	$(INSTALL) -d $@
-  link test libsim keep=test
+
+# The 182 on the chtyp sets it to file type 0xB6; a PIF.
+$(SIM):		sim.o sim.r
+	$(CC) -o $@ $(OBJ_DIR)sim.o
+	$(CATREZ) -d $@ $(OBJ_DIR)sim.r
+	chtyp -t 182 $@
+
+$(LIBSIM):	simlib.o simlib.r
+	$(RM) -f $@
+	$(MAKELIB) $(MAKELIBFLAGS) -l $@ $(OBJ_DIR)simlib.o
+	$(CATREZ) -d $@ $(OBJ_DIR)simlib.r
+
+release:
+	$(INSTALL) -d $(RELEASE_DIR)/usr/lib $(RELEASE_DIR)/System/System.Setup
+	$(INSTALL) $(LIBSIM) $(RELEASE_DIR)/usr/lib
+	$(INSTALL) $(SIM) $(RELEASE_DIR)/System/System.Setup
+
+install:
+	$(INSTALL) -d /usr/lib
+	$(INSTALL) $(LIBSIM) /usr/lib
+
+# Implicit rule to handle Rez source on case sensitive Appleshare servers
+.IF $(APPLESHARE_CASE_SENSITIVE) != $(NULL)
+
+.IMPORT .IGNORE: TMPDIR
+.IF $(TMPDIR) == $(NULL)
+TMPDIR		= 14
+.END
+
+%.r : %.rez
+	$(INSTALL) $< $(TMPDIR)/$<
+	$(REZ) -o $@ -c $(REZFLAGS) $(TMPDIR)/$<
+	$(RM) -f $(TMPDIR)/$<
+.END
+
+# Additional dependencies
+simlib.o:	simlib.asm simlib.mac simequates.equ
+sim.o:		sim.asm sim.mac simequates.equ

sys/sim/sim.asm

@@ -1,8 +1,11 @@
 * Serial Interrupt Manager Permanent INIT file
-
+	setcom 60
 	case	on
 	mcopy	sim.mac
 
+dummysim2 start				; ends up in .root
+	end
+
 ************************************************************************
 
 * Global Firmware Equates
@@ -57,8 +60,10 @@ SIMINIT	START
 	sta	IntVectModem+2
                sta	ExtVect1
                sta	ExtVect1+2
-               sta	ExtVect2
+* gdr:	commented out because it seems that the ExtVect2 code was never
-               sta	ExtVect2+2
+*	finished.
+*	sta	ExtVect2
+*	sta	ExtVect2+2
 	sta	ourSerFlag	no SCC interrupts are handled
 
 * Turn off interrupts while we do the dirty deed
@@ -697,13 +702,14 @@ checkExternal	START
 * check first external vector
 	lda	>ExtVect1
 	ora	>ExtVect1+2
-	beq	checksecond
+*	beq	checksecond			; originally beq checksecond
-	jsl	ExtVect1
+	beq	neither				; rather than beq neither,
-	bcs	gotit
+	jsl	ExtVect1			; but the ExtVect2 code seems
-checksecond	lda	>ExtVect2
+	bcs	gotit				; not to have been finished
-	ora	>ExtVect2+2
+*checksecond	lda	>ExtVect2
-	beq	neither
+*	ora	>ExtVect2+2
-	jsl	ExtVect2
+*	beq	neither
+*	jsl	ExtVect2
 gotit	rts
 neither	clc
 	rts

sys/sim/sim.rez

@@ -0,0 +1,34 @@
+/*
+ * Resources for version and comment
+ *
+ * $Id: sim.rez,v 1.1 1999/02/08 05:53:38 gdr-ftp Exp $
+ */
+
+#define PROG "sim"
+#define DESC "Serial Interrupt Manager\n"
+              
+#include "Types.rez"
+#include "builddate.rez"
+
+/*
+ * Version
+ */
+resource rVersion (1, purgeable3) {
+	{ 1, 0, 0,	/* Version  */
+	  release,	/* development|alpha|beta|final|release */
+	  0 },		/* non-final release number */
+	verUS,		/* Country */
+	PROG,		/* Program name */
+        DESC
+        BUILD_DATE
+};
+
+
+/*
+ * Comment
+ */
+resource rComment (1, purgeable3) {
+	PROG "\n"
+	DESC
+	BUILD_DATE
+};

sys/sim/simlib.asm

@@ -1,6 +1,10 @@
+	setcom 60
 	mcopy	simlib.mac
 	copy	simequates.equ
 
+dummysim1 start				; ends up in .root
+	end
+
 * High-level access library for SIM tool
 
 InstallIntVect	START

sys/sim/simlib.rez

@@ -0,0 +1,34 @@
+/*
+ * Resources for version and comment
+ *
+ * $Id: simlib.rez,v 1.1 1999/02/08 05:53:38 gdr-ftp Exp $
+ */
+#define LIB     "libsim"
+#define DESC    "Serial Interrupt Manager library.\n"
+#define GNO_VER "GNO v2.0.6\n"
+
+#include "Types.rez"
+#include "builddate.rez"
+
+/*
+ * Version
+ */
+resource rVersion (1, purgeable3) {
+	{ 1, 0, 0,	/* Version 1.0.0 */
+	  release,	/* development|alpha|beta|final|release */
+	  0 },		/* non-final release number */
+	verUS,	/* Country */
+	LIB,	/* Program name */
+        DESC GNO_VER
+        BUILD_DATE
+};
+
+
+/*
+ * Comment
+ */
+resource rComment (1, purgeable3) {
+	LIB " v1.0\n"
+	DESC GNO_VER
+	BUILD_DATE
+};