2022-06-20 20:55:09 +00:00
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; Collection of render function used when the engine is in "FAST" mode. In this mode
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; there are no dynamic tile or two layer tiles enabled, so all of the tiles are comprised
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; of PEA opcodes. These functions take advantage of this as the fact that masks are
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; not needed to improve rendering speed.
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;
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; The following functions are defined here
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;
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; GenericOverAFast : Places data from tmp_sprite_data on top of the TileStore's tile
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; GenericUnderAFast : Places the TileStore's tile on top of tmp_sprite_data
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GenericOverAFast
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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lda TileStore+TS_TILE_ADDR,x
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tax
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plb
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]line equ 0
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lup 8
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ldal tiledata+{]line*4},x
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and tmp_sprite_mask+{]line*4}
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ora tmp_sprite_data+{]line*4}
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sta: $0004+{]line*$1000},y
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ldal tiledata+{]line*4}+2,x
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and tmp_sprite_mask+{]line*4}+2
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ora tmp_sprite_data+{]line*4}+2
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sta: $0001+{]line*$1000},y
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]line equ ]line+1
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--^
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plb
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rts
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GenericOverVFast
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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lda TileStore+TS_TILE_ADDR,x
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tax
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plb
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]src equ 7
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]dest equ 0
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lup 8
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ldal tiledata+{]src*4},x
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and tmp_sprite_mask+{]line*4}
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ora tmp_sprite_data+{]line*4}
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sta: $0004+{]line*$1000},y
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ldal tiledata+{]src*4}+2,x
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and tmp_sprite_mask+{]line*4}+2
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ora tmp_sprite_data+{]line*4}+2
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sta: $0001+{]line*$1000},y
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]src equ ]src-1
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]dest equ ]dest+1
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--^
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plb
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rts
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GenericOverZero
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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plb
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]line equ 0
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lup 8
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lda tmp_sprite_data+{]line*4}
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sta: $0004+{]line*$1000},y
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lda tmp_sprite_data+{]line*4}+2
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sta: $0001+{]line*$1000},y
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]line equ ]line+1
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--^
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plb
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rts
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GenericUnderAFast
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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lda TileStore+TS_TILE_ADDR,x
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tax
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plb
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]line equ 0
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lup 8
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lda tmp_sprite_data+{]line*4}
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andl tiledata+{]line*4}+32,x
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2022-06-21 16:23:06 +00:00
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oral tiledata+{]line*4},x
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2022-06-20 20:55:09 +00:00
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sta: $0004+{]line*$1000},y
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lda tmp_sprite_data+{]line*4}+2
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andl tiledata+{]line*4}+32+2,x
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2022-06-21 16:23:06 +00:00
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oral tiledata+{]line*4}+2,x
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2022-06-20 20:55:09 +00:00
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sta: $0001+{]line*$1000},y
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]line equ ]line+1
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--^
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plb
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rts
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GenericUnderVFast
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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lda TileStore+TS_TILE_ADDR,x
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tax
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plb
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]src equ 7
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]dest equ 0
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lup 8
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lda tmp_sprite_data+{]line*4}
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andl tiledata+{]src*4}+32,x
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2022-06-21 16:23:06 +00:00
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oral tiledata+{]src*4},x
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2022-06-20 20:55:09 +00:00
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sta: $0004+{]line*$1000},y
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lda tmp_sprite_data+{]line*4}+2
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andl tiledata+{]src*4}+32+2,x
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2022-06-21 16:23:06 +00:00
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oral tiledata+{]src*4}+2,x
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2022-06-20 20:55:09 +00:00
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sta: $0001+{]line*$1000},y
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]src equ ]src-1
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]dest equ ]dest+1
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--^
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plb
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rts
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GenericUnderZero
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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plb
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lda #0
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]line equ 0
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lup 8
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sta: $0004+{]line*$1000},y
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sta: $0001+{]line*$1000},y
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]line equ ]line+1
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--^
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plb
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rts
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2022-06-21 12:29:18 +00:00
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; Simple pair of routines that copies just the tile data to the direct page workspace. Data Bank
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; must be set to the TileData bank in entry.
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;
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; Preserves the X-register
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FastCopyTileDataA
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ldy TileStore+TS_TILE_ADDR,x ; load the tile address
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pei DP2_TILEDATA_AND_TILESTORE_BANKS
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plb ; set to the tiledata bank
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]line equ 0
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lup 8
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lda tiledata+{]line*4},y
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sta tmp_tile_data+{]line*4}
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lda tiledata+{]line*4}+2,y
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sta tmp_tile_data+{]line*4}+2
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]line equ ]line+1
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--^
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plb
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rts
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FastCopyTileDataV
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ldy TileStore+TS_TILE_ADDR,x ; load the tile address
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pei DP2_TILEDATA_AND_TILESTORE_BANKS
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plb ; set to the tiledata bank
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]src equ 7
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]dest equ 0
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lup 8
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lda tiledata+{]src*4},y
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sta tmp_tile_data+{]dest*4}
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lda tiledata+{]src*4}+2,y
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sta tmp_tile_data+{]dest*4}+2
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]src equ ]src-1
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]dest equ ]dest+1
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--^
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plb
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rts
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2022-06-21 15:06:17 +00:00
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FastCopyTileDataAndMaskA
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ldy TileStore+TS_TILE_ADDR,x ; load the tile address
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pei DP2_TILEDATA_AND_TILESTORE_BANKS
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plb ; set to the tiledata bank
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]line equ 0
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lup 8
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lda tiledata+{]line*4},y
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sta tmp_tile_data+{]line*4}
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lda tiledata+{]line*4}+32,y
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sta tmp_tile_mask+{]line*4}
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lda tiledata+{]line*4}+2,y
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sta tmp_tile_data+{]line*4}+2
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lda tiledata+{]line*4}+32+2,y
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sta tmp_tile_mask+{]line*4}+2
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]line equ ]line+1
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--^
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plb
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rts
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FastCopyTileDataAndMaskV
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ldy TileStore+TS_TILE_ADDR,x ; load the tile address
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pei DP2_TILEDATA_AND_TILESTORE_BANKS
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plb ; set to the tiledata bank
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]src equ 7
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]dest equ 0
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lup 8
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lda tiledata+{]src*4},y
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sta tmp_tile_data+{]dest*4}
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lda tiledata+{]src*4}+32,y
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sta tmp_tile_mask+{]dest*4}
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lda tiledata+{]src*4}+2,y
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sta tmp_tile_data+{]dest*4}+2
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lda tiledata+{]src*4}+32+2,y
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sta tmp_tile_mask+{]dest*4}+2
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]src equ ]src-1
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]dest equ ]dest+1
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--^
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plb
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rts
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