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27 lines
2.2 KiB
Plaintext
27 lines
2.2 KiB
Plaintext
@N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":6:7:6:14|Synthesizing work.bus68030.behavioral
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@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":105:7:105:15|Signal clk_030_d is undriven
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Post processing for work.bus68030.behavioral
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":176:2:176:3|Pruning register CLK_REF(1 downto 0)
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":111:32:111:34|Pruning register cpu_est_d(3 downto 0)
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":110:32:110:34|Pruning register CLK_000_D5
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":109:32:109:34|Pruning register CLK_000_D4
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":108:32:108:34|Pruning register CLK_000_D3
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":107:32:107:34|Pruning register CLK_000_D2
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@W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":102:52:102:55|Optimizing register bit DSACK_INT(0) to a constant 1
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@W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":102:52:102:55|Pruning register bit 0 of DSACK_INT(1 downto 0)
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@W: CL189 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":120:2:120:3|Register bit CLK_CNT(1) is always 0, optimizing ...
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@W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":120:2:120:3|Pruning register bit 1 of CLK_CNT(1 downto 0)
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@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":111:32:111:34|Trying to extract state machine for register cpu_est
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@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":176:2:176:3|Trying to extract state machine for register SM_AMIGA
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Extracted state machine for register SM_AMIGA
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State machine has 8 reachable states with original encodings of:
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000
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001
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010
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011
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100
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101
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110
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111
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@W: CL249 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":176:2:176:3|Initial value is not supported on state machine SM_AMIGA
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