68030tk/Logic/68030_TK.syn
MHeinrichs aa7f8b7632 Reset-Problem solved
The AMiga was not able to recover from a reste, because the e-clock was
not generated properly during reste.
2015-03-15 13:50:46 +01:00

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JDF B
// Created by Version 1.8
PROJECT 68030_TK
DESIGN 68030_tk Normal
DEVKIT M4A5-128/64-10VC
ENTRY Pure VHDL
MODULE 68030-68000-bus.vhd
MODSTYLE BUS68030 Normal
SYNTHESIS_TOOL Synplify
SIMULATOR_TOOL ActiveHDL
TOPMODULE BUS68030