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SCSI Phase handling improved for SCSI-2

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This commit is contained in:
Troy 2022-07-03 22:13:25 -04:00
parent 54500e18b8
commit e5d78139de
1 changed files with 27 additions and 26 deletions
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53
src/BlueSCSI.cpp
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@ -1484,19 +1484,37 @@ void loop()
m_lun = 0xff; m_lun = 0xff;
SCSI_DEVICE *dev = (SCSI_DEVICE *)0; // HDD image for current SCSI-ID, LUN SCSI_DEVICE *dev = (SCSI_DEVICE *)0; // HDD image for current SCSI-ID, LUN
// Wait until RST = H, BSY = H, SEL = L do {} while( !SCSI_IN(vBSY) || SCSI_IN(vRST));
// We're in ARBITRATION
//LOG(" A:"); LOGHEX(readIO()); LOG(" ");
do {} while( SCSI_IN(vBSY) || !SCSI_IN(vSEL) || SCSI_IN(vRST)); do {} while( SCSI_IN(vBSY) || !SCSI_IN(vSEL) || SCSI_IN(vRST));
//LOG(" S:"); LOGHEX(readIO()); LOG(" ");
// BSY+ SEL- // We're in SELECTION
// If the ID to respond is not driven, wait for the next
//byte db = readIO();
//byte scsiid = db & scsi_id_mask;
byte scsiid = readIO() & scsi_id_mask; byte scsiid = readIO() & scsi_id_mask;
if((scsiid) == 0) { if(SCSI_IN(vIO) || (scsiid) == 0) {
delayMicroseconds(1); delayMicroseconds(1);
return; return;
} }
LOGN("Selection"); // We've been selected
#ifdef XCVR
// Reconfigure target pins to output mode, after resetting their values
GPIOB->regs->BSRR = 0x000000E8; // MSG, CD, REQ, IO
// GPIOA->regs->BSRR = 0x00000200; // BSY
#endif
SCSI_TARGET_ACTIVE() // (BSY), REQ, MSG, CD, IO output turned on
// Set BSY to-when selected
SCSI_BSY_ACTIVE(); // Turn only BSY output ON, ACTIVE
// Wait until SEL becomes inactive
while(isHigh(gpio_read(SEL))) {}
// Ask for a TARGET-ID to respond
m_id = 31 - __builtin_clz(scsiid);
m_isBusReset = false; m_isBusReset = false;
if (setjmp(m_resetJmpBuf) == 1) { if (setjmp(m_resetJmpBuf) == 1) {
LOGN("Reset, going to BusFree"); LOGN("Reset, going to BusFree");
@ -1504,24 +1522,7 @@ void loop()
} }
enableResetJmp(); enableResetJmp();
// Set BSY to-when selected // In SCSI-2 this is mandatory, but in SCSI-1 it's optional
SCSI_BSY_ACTIVE(); // Turn only BSY output ON, ACTIVE
// Ask for a TARGET-ID to respond
m_id = 31 - __builtin_clz(scsiid);
// Wait until SEL becomes inactive
while(isHigh(gpio_read(SEL)) && isLow(gpio_read(BSY))) {
}
#ifdef XCVR
// Reconfigure target pins to output mode, after resetting their values
GPIOB->regs->BSRR = 0x000000E8; // MSG, CD, REQ, IO
// GPIOA->regs->BSRR = 0x00000200; // BSY
#endif
SCSI_TARGET_ACTIVE() // (BSY), REQ, MSG, CD, IO output turned on
//
if(isHigh(gpio_read(ATN))) { if(isHigh(gpio_read(ATN))) {
SCSI_PHASE_CHANGE(SCSI_PHASE_MESSAGEOUT); SCSI_PHASE_CHANGE(SCSI_PHASE_MESSAGEOUT);
// Bus settle delay 400ns. Following code was measured at 350ns before REQ asserted. Added another 50ns. STM32F103. // Bus settle delay 400ns. Following code was measured at 350ns before REQ asserted. Added another 50ns. STM32F103.