94 lines
3.8 KiB
HTML
94 lines
3.8 KiB
HTML
<html>
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<head>
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<title>Garrett's Workshop - NuBus-ESP32 Documentation</title>
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<style type="text/css">
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ul {
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margin-top: 0;
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}
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h3 {
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margin-bottom: 0;
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}
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h2, h4 {
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margin-bottom: 3px;
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}
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h3 + h4 {
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margin-top:6px;
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}
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p {
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margin-top:0;
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}
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ul li {
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padding-top: 3px;
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}
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ul li sup {
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line-height: 0;
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}
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</style>
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<script src="https://cdnjs.cloudflare.com/ajax/libs/wavedrom/2.6.8/skins/default.js" type="text/javascript"></script>
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<script src="https://cdnjs.cloudflare.com/ajax/libs/wavedrom/2.6.8/wavedrom.min.js" type="text/javascript"></script>
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</head>
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<body onload="WaveDrom.ProcessAll()">
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<h1>Garrett's Workshop - NuBus-ESP32 Documentation</h1>
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<h3>0. NuBus Transfer Acknowledgement</h3>
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<script type="WaveDrom">
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{signal: [
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{name: 'CLK', wave: '101..01..01..01..0', period: 0.5, phase: 0.15},
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{name: '/START', wave: '1x0x1....', period: 1, phase: 0.15},
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{name: 'TM[1:0]', wave: 'x.2z.x0xz', period: 1, phase: 0.15},
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{name: '/ACK', wave: '1....x0xu', period: 1, phase: 0.15},
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{name: 'ACK-2', wave: '0..1.0....', period: 1, phase: 0.50},
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{name: 'ACK-1', wave: '0....1.0..', period: 1, phase: 0.50},
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{name: 'ACK', wave: '0....1.0.', period: 1, phase: 0.00},
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]}
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</script>
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<p>
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Here we show the desired cycle termination behavior on the NuBus. To be begin a transfer, a the Mac (or other NuBus master) drives /START low and puts valid data on the address bus and TM[1:0] transfer. <br/>
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Notice how the NuBus clock has a 75% duty cycle. All signal transitions occur after the rising edge of CLK and all data is latched at the falling edge of CLK. The 75% duty cycle gives extra propagation delay and setup tiem after the clock rises before data is to be latched at the falling edge. <br/>
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TM[1] high means write. TM[1] low means read. TM[0] and A[1:0] indicate the operation size and are not relevant for this application. <br/>
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At each falling edge, NuBus slave devices check AD[31:28] and /START. If AD[31:28] matches the slave's card ID and /START is low, the card is supposed to recognize that a NuBus cycle has begun with the card as its target. <br/>
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Once the slave device has completed the read/write operation, it responds with /ACK low and TM[1:0] high, indicating a successful transfer. Other values of TM[1:0] can be used to signal a bus error or retry condition. We aren't using those features. <br/>
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</p>
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<h3>1. Address Latch</h3>
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<script type="WaveDrom">
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{signal: [
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{name: 'CLK', wave: '101..01..01..01..0', period: 0.5, phase: 0.15},
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{name: '/START', wave: '1x0x1....', period: 1, phase: 0.15},
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{name: 'TM[1:0]', wave: 'x.2z.x1xz', period: 1, phase: 0.15},
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{name: 'AD[31:0] (RD)', wave: 'x.2z.x2z.', period: 1, phase: 0.15},
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{name: 'AD[31:0] (WR)', wave: 'x.2x2..z.', period: 1, phase: 0.15},
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{name: 'ACLK', wave: '0..1.0...', period: 1, phase: 0.50},
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{name: 'LA[21:0], LTM[1:0]',wave: '2..2.....', period: 1, phase: 0.35},
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{name: '/ACK', wave: '1....x0xu', period: 1, phase: 0.15},
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{name: 'ACK-2', wave: '0..1.0...', period: 1, phase: 0.50},
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{name: 'ACK-1', wave: '0....1.0.', period: 1, phase: 0.50},
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{name: 'ACK', wave: '0....1.0.', period: 1, phase: 0.00},
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]}
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</script>
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<p>
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</p>
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<h3>2. Read/Write Signals</h3>
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<script type="WaveDrom">
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{signal: [
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{name: 'CLK', wave: '101..01..01..01..0', period: 0.5, phase: 0.15},
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{name: '/START', wave: '1x0x1....', period: 1, phase: 0.15},
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{name: 'TM[1:0]', wave: 'x.2z.x1xz', period: 1, phase: 0.15},
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{name: '/ACK', wave: '1....x0xu', period: 1, phase: 0.15},
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{name: '/ROMOE, /REGOE', wave: '1.........0....1...', period: 0.5, phase: 0.50},
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{name: '/ROMWE, /REGWE', wave: '1....0.1.', period: 1, phase: 0.50},
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{name: 'ACK-2', wave: '0..1.0...', period: 1, phase: 0.50},
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{name: 'ACK-1', wave: '0....1.0.', period: 1, phase: 0.50},
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{name: 'ACK', wave: '0....1.0.', period: 1, phase: 0.00},
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]}
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</script>
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<p>
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</p>
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</body>
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</html>
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