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NuBusFPGA
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Romain Dolbeau 2022-07-14 18:24:06 +02:00
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@ -6,8 +6,8 @@ The goal of this repository is to be able to interface a modern (2021 era) [FPGA
## Current status
First prototype is working in a Quadra 650. It implements a basic single-resolution, depth-switchable (1/2/4/8/16/32 bits) framebuffer over HDMI. The framebuffer can be used as secondary/primary/only framebuffer in the machine running OS8.1. QEmu tests indicate this should work with 7.1 & 7.5/7.6 as well.
First prototype is working in a Quadra 650. It implements a basic single-resolution, depth-switchable (1/2/4/8/16/32 bits) framebuffer over HDMI. The framebuffer can be used as secondary/primary/only framebuffer in the machine running OS8.1. Qemu tests indicate this should work with 7.1 & 7.5/7.6 as well.
Some basic acceleration now exists for 8/16/32 bits, doing rectangle screen-to-screen blits and pattern rectangle fills.
Some basic acceleration now exists for 8/16/32 bits, doing rectangle screen-to-screen blits and pattern rectangle fills. 1/2/4 bits also has some acceleration, ut only for byte-aligned cases.
There's also a basic RAM Disk using the 248 MiB of SDRAM not used by the framebuffer.
There's also a basic RAM Disk using the 248 MiB of SDRAM not used by the framebuffer. So far this is by 32-bits accesses from the host; DMA using 1x block mode is still TBD.