NuBusFPGA/nubus-to-ztex-gateware/nubus_cpld.ucf
2022-01-09 17:57:34 +01:00

50 lines
1.7 KiB
Plaintext

#PINLOCK_BEGIN
#Sun Jan 9 15:29:44 2022
NET "arb" LOC = "S:PIN56";
NET "arb_n_5v<0>" LOC = "S:PIN33";
NET "arb_n_5v<1>" LOC = "S:PIN35";
NET "arb_n_5v<2>" LOC = "S:PIN27";
NET "arb_n_5v<3>" LOC = "S:PIN24";
NET "clk_n_5v" LOC = "S:PIN16";
NET "clk2x_n_5v" LOC = "S:PIN17";
NET "fpga_to_cpld_clk" LOC = "S:PIN15";
NET "fpga_to_cpld_signal" LOC = "S:PIN6";
NET "id_n_5v<0>" LOC = "S:PIN20";
NET "id_n_5v<1>" LOC = "S:PIN19";
NET "id_n_5v<2>" LOC = "S:PIN18";
NET "id_n_5v<3>" LOC = "S:PIN8";
NET "nubus_master_dir" LOC = "S:PIN49";
NET "nubus_oe" LOC = "S:PIN46";
NET "reset_n_5v" LOC = "S:PIN45";
NET "rqst_n_5v" LOC = "S:PIN10";
NET "tmoen" LOC = "S:PIN51";
NET "ack_n_3v3" LOC = "S:PIN5";
NET "ack_n_5v" LOC = "S:PIN11";
NET "arb_o<0>" LOC = "S:PIN34";
NET "arb_o<1>" LOC = "S:PIN36";
NET "arb_o<2>" LOC = "S:PIN32";
NET "arb_o<3>" LOC = "S:PIN31";
NET "clk_n_3v3" LOC = "S:PIN47";
NET "clk2x_n_3v3" LOC = "S:PIN60";
NET "fpga_to_cpld_signal_2" LOC = "S:PIN50";
NET "grant" LOC = "S:PIN57";
NET "id_n_3v3<0>" LOC = "S:PIN61";
NET "id_n_3v3<1>" LOC = "S:PIN62";
NET "id_n_3v3<2>" LOC = "S:PIN63";
NET "id_n_3v3<3>" LOC = "S:PIN64";
NET "reset_n_3v3" LOC = "S:PIN48";
NET "rqst_n_3v3" LOC = "S:PIN4";
NET "rqst_o" LOC = "S:PIN9";
NET "start_n_3v3" LOC = "S:PIN7";
NET "start_n_5v" LOC = "S:PIN12";
NET "tm0_n_3v3" LOC = "S:PIN2";
NET "tm0_n_5v" LOC = "S:PIN44";
NET "tm1_n_3v3" LOC = "S:PIN1";
NET "tm1_n_5v" LOC = "S:PIN43";
NET "tm2_n_3v3" LOC = "S:PIN59";
NET "tm2_n_5v" LOC = "S:PIN22";
#PINLOCK_END