Macintosh-HW/NuBusFPGA
1
0
Fork 0
mirror of https://github.com/rdolbeau/NuBusFPGA.git synced 2024-12-23 01:30:32 +00:00
Code Issues Projects Releases Wiki Activity
Stuff to put a FPGA in a NuBus Macintosh
44 Commits 2 Branches 0 Tags 53 MiB
Python 40.2%
C 26.3%
Verilog 12.9%
SystemVerilog 9.9%
Tcl 7.1%
Other 3.6%
d70ba3e434
Go to file
Romain Dolbeau d70ba3e434 rename blit to blit_goblin
2022-07-23 12:58:13 +02:00
nubus-to-ztex fix messed up timing... 2022-07-14 08:54:23 +02:00
nubus-to-ztex-gateware rename blit to blit_goblin 2022-07-23 12:58:13 +02:00
Pictures
.gitignore accel in 16/32 ; includes adding MUL to Vex & fixing a FIFO overrun in NuBus in 32 bits mode 2022-06-04 14:55:40 +02:00
README.md update README 2022-07-14 18:24:06 +02:00

README.md

A FPGA on a NuBus card...

Goal

The goal of this repository is to be able to interface a modern (2021 era) FPGA with a NuBus host, specifically Apple's Macintosh II and Macintosh Quadra.

Current status

First prototype is working in a Quadra 650. It implements a basic single-resolution, depth-switchable (1/2/4/8/16/32 bits) framebuffer over HDMI. The framebuffer can be used as secondary/primary/only framebuffer in the machine running OS8.1. Qemu tests indicate this should work with 7.1 & 7.5/7.6 as well.

Some basic acceleration now exists for 8/16/32 bits, doing rectangle screen-to-screen blits and pattern rectangle fills. 1/2/4 bits also has some acceleration, ut only for byte-aligned cases.

There's also a basic RAM Disk using the 248 MiB of SDRAM not used by the framebuffer. So far this is by 32-bits accesses from the host; DMA using 1x block mode is still TBD.