mirror of
https://github.com/garrettsworkshop/RAMSIMM-30.git
synced 2025-01-13 19:29:48 +00:00
changed a lot
This commit is contained in:
Zane Kaminski
parent
703ab3aa6f
commit
73e859a61e
24
.gitignore
vendored
Normal file
24
.gitignore
vendored
Normal file
@ -0,0 +1,24 @@
|
||||
# For PCBs designed using KiCad: http://www.kicad-pcb.org/
|
||||
# Format documentation: http://kicad-pcb.org/help/file-formats/
|
||||
|
||||
# Temporary files
|
||||
*.000
|
||||
*.bak
|
||||
*.bck
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||||
*.kicad_pcb-bak
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||||
*~
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||||
_autosave-*
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||||
*.tmp
|
||||
*-rescue.lib
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||||
*-save.pro
|
||||
*-save.kicad_pcb
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||||
fp-info-cache
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||||
|
||||
# Netlist files (exported from Eeschema)
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||||
*.net
|
||||
|
||||
# Autorouter files (exported from Pcbnew)
|
||||
*.dsn
|
||||
*.ses
|
||||
|
||||
*.DS_Store
|
||||
@ -1,3 +1,3 @@
|
||||
(fp_lib_table
|
||||
(lib (name stdpads)(type KiCad)(uri "/Users/zane/Library/Mobile Documents/com~apple~CloudDocs/Repos/stdpads.pretty")(options "")(descr ""))
|
||||
(lib (name stdpads)(type KiCad)(uri "$(KIPRJMOD)/../stdpads.pretty")(options "")(descr ""))
|
||||
)
|
||||
|
||||
@ -1,192 +0,0 @@
|
||||
EESchema-LIBRARY Version 2.4
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||||
#encoding utf-8
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||||
#
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||||
# Connector_Generic_Conn_01x30
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||||
#
|
||||
DEF Connector_Generic_Conn_01x30 J 0 40 Y N 1 F N
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||||
F0 "J" 0 1500 50 H V C CNN
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||||
F1 "Connector_Generic_Conn_01x30" 0 -1600 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
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||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
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||||
Connector*:*_1x??_*
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||||
$ENDFPLIST
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||||
DRAW
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||||
S -50 -1495 0 -1505 1 1 6 N
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||||
S -50 -1395 0 -1405 1 1 6 N
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||||
S -50 -1295 0 -1305 1 1 6 N
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||||
S -50 -1195 0 -1205 1 1 6 N
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||||
S -50 -1095 0 -1105 1 1 6 N
|
||||
S -50 -995 0 -1005 1 1 6 N
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||||
S -50 -895 0 -905 1 1 6 N
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||||
S -50 -795 0 -805 1 1 6 N
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||||
S -50 -695 0 -705 1 1 6 N
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||||
S -50 -595 0 -605 1 1 6 N
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||||
S -50 -495 0 -505 1 1 6 N
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||||
S -50 -395 0 -405 1 1 6 N
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||||
S -50 -295 0 -305 1 1 6 N
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||||
S -50 -195 0 -205 1 1 6 N
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||||
S -50 -95 0 -105 1 1 6 N
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||||
S -50 5 0 -5 1 1 6 N
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||||
S -50 105 0 95 1 1 6 N
|
||||
S -50 205 0 195 1 1 6 N
|
||||
S -50 305 0 295 1 1 6 N
|
||||
S -50 405 0 395 1 1 6 N
|
||||
S -50 505 0 495 1 1 6 N
|
||||
S -50 605 0 595 1 1 6 N
|
||||
S -50 705 0 695 1 1 6 N
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||||
S -50 805 0 795 1 1 6 N
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||||
S -50 905 0 895 1 1 6 N
|
||||
S -50 1005 0 995 1 1 6 N
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||||
S -50 1105 0 1095 1 1 6 N
|
||||
S -50 1205 0 1195 1 1 6 N
|
||||
S -50 1305 0 1295 1 1 6 N
|
||||
S -50 1405 0 1395 1 1 6 N
|
||||
S -50 1450 50 -1550 1 1 10 f
|
||||
X Pin_1 1 -200 1400 150 R 50 50 1 1 P
|
||||
X Pin_10 10 -200 500 150 R 50 50 1 1 P
|
||||
X Pin_11 11 -200 400 150 R 50 50 1 1 P
|
||||
X Pin_12 12 -200 300 150 R 50 50 1 1 P
|
||||
X Pin_13 13 -200 200 150 R 50 50 1 1 P
|
||||
X Pin_14 14 -200 100 150 R 50 50 1 1 P
|
||||
X Pin_15 15 -200 0 150 R 50 50 1 1 P
|
||||
X Pin_16 16 -200 -100 150 R 50 50 1 1 P
|
||||
X Pin_17 17 -200 -200 150 R 50 50 1 1 P
|
||||
X Pin_18 18 -200 -300 150 R 50 50 1 1 P
|
||||
X Pin_19 19 -200 -400 150 R 50 50 1 1 P
|
||||
X Pin_2 2 -200 1300 150 R 50 50 1 1 P
|
||||
X Pin_20 20 -200 -500 150 R 50 50 1 1 P
|
||||
X Pin_21 21 -200 -600 150 R 50 50 1 1 P
|
||||
X Pin_22 22 -200 -700 150 R 50 50 1 1 P
|
||||
X Pin_23 23 -200 -800 150 R 50 50 1 1 P
|
||||
X Pin_24 24 -200 -900 150 R 50 50 1 1 P
|
||||
X Pin_25 25 -200 -1000 150 R 50 50 1 1 P
|
||||
X Pin_26 26 -200 -1100 150 R 50 50 1 1 P
|
||||
X Pin_27 27 -200 -1200 150 R 50 50 1 1 P
|
||||
X Pin_28 28 -200 -1300 150 R 50 50 1 1 P
|
||||
X Pin_29 29 -200 -1400 150 R 50 50 1 1 P
|
||||
X Pin_3 3 -200 1200 150 R 50 50 1 1 P
|
||||
X Pin_30 30 -200 -1500 150 R 50 50 1 1 P
|
||||
X Pin_4 4 -200 1100 150 R 50 50 1 1 P
|
||||
X Pin_5 5 -200 1000 150 R 50 50 1 1 P
|
||||
X Pin_6 6 -200 900 150 R 50 50 1 1 P
|
||||
X Pin_7 7 -200 800 150 R 50 50 1 1 P
|
||||
X Pin_8 8 -200 700 150 R 50 50 1 1 P
|
||||
X Pin_9 9 -200 600 150 R 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Connector_Generic_Conn_02x13_Counter_Clockwise
|
||||
#
|
||||
DEF Connector_Generic_Conn_02x13_Counter_Clockwise J 0 40 Y N 1 F N
|
||||
F0 "J" 50 700 50 H V C CNN
|
||||
F1 "Connector_Generic_Conn_02x13_Counter_Clockwise" 50 -700 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
Connector*:*_2x??_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -50 -595 0 -605 1 1 6 N
|
||||
S -50 -495 0 -505 1 1 6 N
|
||||
S -50 -395 0 -405 1 1 6 N
|
||||
S -50 -295 0 -305 1 1 6 N
|
||||
S -50 -195 0 -205 1 1 6 N
|
||||
S -50 -95 0 -105 1 1 6 N
|
||||
S -50 5 0 -5 1 1 6 N
|
||||
S -50 105 0 95 1 1 6 N
|
||||
S -50 205 0 195 1 1 6 N
|
||||
S -50 305 0 295 1 1 6 N
|
||||
S -50 405 0 395 1 1 6 N
|
||||
S -50 505 0 495 1 1 6 N
|
||||
S -50 605 0 595 1 1 6 N
|
||||
S -50 650 150 -650 1 1 10 f
|
||||
S 150 -595 100 -605 1 1 6 N
|
||||
S 150 -495 100 -505 1 1 6 N
|
||||
S 150 -395 100 -405 1 1 6 N
|
||||
S 150 -295 100 -305 1 1 6 N
|
||||
S 150 -195 100 -205 1 1 6 N
|
||||
S 150 -95 100 -105 1 1 6 N
|
||||
S 150 5 100 -5 1 1 6 N
|
||||
S 150 105 100 95 1 1 6 N
|
||||
S 150 205 100 195 1 1 6 N
|
||||
S 150 305 100 295 1 1 6 N
|
||||
S 150 405 100 395 1 1 6 N
|
||||
S 150 505 100 495 1 1 6 N
|
||||
S 150 605 100 595 1 1 6 N
|
||||
X Pin_1 1 -200 600 150 R 50 50 1 1 P
|
||||
X Pin_10 10 -200 -300 150 R 50 50 1 1 P
|
||||
X Pin_11 11 -200 -400 150 R 50 50 1 1 P
|
||||
X Pin_12 12 -200 -500 150 R 50 50 1 1 P
|
||||
X Pin_13 13 -200 -600 150 R 50 50 1 1 P
|
||||
X Pin_14 14 300 -600 150 L 50 50 1 1 P
|
||||
X Pin_15 15 300 -500 150 L 50 50 1 1 P
|
||||
X Pin_16 16 300 -400 150 L 50 50 1 1 P
|
||||
X Pin_17 17 300 -300 150 L 50 50 1 1 P
|
||||
X Pin_18 18 300 -200 150 L 50 50 1 1 P
|
||||
X Pin_19 19 300 -100 150 L 50 50 1 1 P
|
||||
X Pin_2 2 -200 500 150 R 50 50 1 1 P
|
||||
X Pin_20 20 300 0 150 L 50 50 1 1 P
|
||||
X Pin_21 21 300 100 150 L 50 50 1 1 P
|
||||
X Pin_22 22 300 200 150 L 50 50 1 1 P
|
||||
X Pin_23 23 300 300 150 L 50 50 1 1 P
|
||||
X Pin_24 24 300 400 150 L 50 50 1 1 P
|
||||
X Pin_25 25 300 500 150 L 50 50 1 1 P
|
||||
X Pin_26 26 300 600 150 L 50 50 1 1 P
|
||||
X Pin_3 3 -200 400 150 R 50 50 1 1 P
|
||||
X Pin_4 4 -200 300 150 R 50 50 1 1 P
|
||||
X Pin_5 5 -200 200 150 R 50 50 1 1 P
|
||||
X Pin_6 6 -200 100 150 R 50 50 1 1 P
|
||||
X Pin_7 7 -200 0 150 R 50 50 1 1 P
|
||||
X Pin_8 8 -200 -100 150 R 50 50 1 1 P
|
||||
X Pin_9 9 -200 -200 150 R 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_C_Small
|
||||
#
|
||||
DEF Device_C_Small C 0 10 N N 1 F N
|
||||
F0 "C" 10 70 50 H V L CNN
|
||||
F1 "Device_C_Small" 10 -80 50 H V L CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 13 -60 -20 60 -20 N
|
||||
P 2 0 1 12 -60 20 60 20 N
|
||||
X ~ 1 0 100 80 D 50 50 1 1 P
|
||||
X ~ 2 0 -100 80 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+5V
|
||||
#
|
||||
DEF power_+5V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+5V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +5V 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
@ -1,4 +1,4 @@
|
||||
(kicad_pcb (version 20171130) (host pcbnew "(5.0.1-3-g963ef8bb5)")
|
||||
(kicad_pcb (version 20171130) (host pcbnew "(5.1.2-1)-1")
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||||
|
||||
(general
|
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(thickness 1.6)
|
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@ -48,8 +48,6 @@
|
||||
(zone_clearance 0.1524)
|
||||
(zone_45_only no)
|
||||
(trace_min 0.127)
|
||||
(segment_width 0.2)
|
||||
(edge_width 0.15)
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||||
(via_size 0.508)
|
||||
(via_drill 0.2)
|
||||
(via_min_size 0.508)
|
||||
@ -60,6 +58,8 @@
|
||||
(uvias_allowed no)
|
||||
(uvia_min_size 0.2)
|
||||
(uvia_min_drill 0.1)
|
||||
(edge_width 0.15)
|
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(segment_width 0.2)
|
||||
(pcb_text_width 0.3)
|
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(pcb_text_size 1.5 1.5)
|
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(mod_edge_width 0.15)
|
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@ -69,7 +69,7 @@
|
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(pad_drill 0.762)
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(pad_to_mask_clearance 0.0762)
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(solder_mask_min_width 0.1524)
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(pad_to_paste_clearance -0.1)
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(pad_to_paste_clearance -0.0381)
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(aux_axis_origin 0 0)
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(visible_elements FFFFFF7F)
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(pcbplotparams
|
||||
@ -874,15 +874,6 @@
|
||||
(segment (start 108.077 78.11) (end 108.077 80.772) (width 0.127) (layer F.Cu) (net 3))
|
||||
(segment (start 108.077 80.772) (end 108.966 81.661) (width 0.127) (layer F.Cu) (net 3))
|
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(segment (start 108.966 81.661) (end 114.427 81.661) (width 0.127) (layer F.Cu) (net 3))
|
||||
(segment (start 109.347 77.36) (end 109.347 80.666776) (width 0.127) (layer F.Cu) (net 9))
|
||||
(segment (start 109.347 80.666776) (end 109.833224 81.153) (width 0.127) (layer F.Cu) (net 9))
|
||||
(segment (start 109.833224 81.153) (end 131.699 81.153) (width 0.127) (layer F.Cu) (net 9))
|
||||
(segment (start 109.347 69.21) (end 109.347 73.66) (width 0.127) (layer F.Cu) (net 8))
|
||||
(segment (start 109.347 73.66) (end 108.712 74.295) (width 0.127) (layer F.Cu) (net 8))
|
||||
(segment (start 108.712 74.295) (end 108.712 80.391) (width 0.127) (layer F.Cu) (net 8))
|
||||
(segment (start 108.712 80.391) (end 109.728 81.407) (width 0.127) (layer F.Cu) (net 8))
|
||||
(segment (start 124.333 81.407) (end 125.73 82.804) (width 0.127) (layer F.Cu) (net 8))
|
||||
(segment (start 109.728 81.407) (end 124.333 81.407) (width 0.127) (layer F.Cu) (net 8))
|
||||
(segment (start 114.427 81.661) (end 115.57 82.804) (width 0.127) (layer F.Cu) (net 3))
|
||||
(via (at 144.907 74.93) (size 0.508) (drill 0.2) (layers F.Cu B.Cu) (net 4))
|
||||
(segment (start 144.907 78.11) (end 144.907 74.93) (width 0.127) (layer F.Cu) (net 4))
|
||||
@ -916,15 +907,16 @@
|
||||
(segment (start 144.526 66.675) (end 142.367 66.675) (width 0.127) (layer F.Cu) (net 7))
|
||||
(via (at 142.367 66.675) (size 0.508) (drill 0.2) (layers F.Cu B.Cu) (net 7))
|
||||
(segment (start 142.367 66.675) (end 113.538 66.675) (width 0.127) (layer B.Cu) (net 7))
|
||||
(segment (start 109.347 69.21) (end 109.347 73.66) (width 0.127) (layer F.Cu) (net 8))
|
||||
(segment (start 109.347 73.66) (end 108.712 74.295) (width 0.127) (layer F.Cu) (net 8))
|
||||
(segment (start 108.712 74.295) (end 108.712 80.391) (width 0.127) (layer F.Cu) (net 8))
|
||||
(segment (start 108.712 80.391) (end 109.728 81.407) (width 0.127) (layer F.Cu) (net 8))
|
||||
(segment (start 124.333 81.407) (end 125.73 82.804) (width 0.127) (layer F.Cu) (net 8))
|
||||
(segment (start 109.728 81.407) (end 124.333 81.407) (width 0.127) (layer F.Cu) (net 8))
|
||||
(segment (start 109.347 77.36) (end 109.347 80.666776) (width 0.127) (layer F.Cu) (net 9))
|
||||
(segment (start 109.347 80.666776) (end 109.833224 81.153) (width 0.127) (layer F.Cu) (net 9))
|
||||
(segment (start 109.833224 81.153) (end 131.699 81.153) (width 0.127) (layer F.Cu) (net 9))
|
||||
(segment (start 131.699 81.153) (end 133.35 82.804) (width 0.127) (layer F.Cu) (net 9))
|
||||
(segment (start 143.637 69.21) (end 143.637 73.279) (width 0.127) (layer F.Cu) (net 13))
|
||||
(segment (start 143.637 73.279) (end 143.002 73.914) (width 0.127) (layer F.Cu) (net 13))
|
||||
(segment (start 143.002 73.914) (end 143.002 80.899) (width 0.127) (layer F.Cu) (net 13))
|
||||
(segment (start 143.002 80.899) (end 143.764 81.661) (width 0.127) (layer F.Cu) (net 13))
|
||||
(segment (start 143.764 81.661) (end 157.607 81.661) (width 0.127) (layer F.Cu) (net 13))
|
||||
(segment (start 143.637 77.36) (end 143.637 80.645) (width 0.127) (layer F.Cu) (net 15))
|
||||
(segment (start 143.637 80.645) (end 144.38629 81.39429) (width 0.127) (layer F.Cu) (net 15))
|
||||
(segment (start 144.38629 81.39429) (end 162.42029 81.39429) (width 0.127) (layer F.Cu) (net 15))
|
||||
(segment (start 142.367 69.21) (end 142.367 73.025) (width 0.127) (layer F.Cu) (net 11))
|
||||
(segment (start 142.367 73.025) (end 141.732 73.66) (width 0.127) (layer F.Cu) (net 11))
|
||||
(segment (start 141.732 73.66) (end 141.732 82.042) (width 0.127) (layer F.Cu) (net 11))
|
||||
@ -933,7 +925,15 @@
|
||||
(segment (start 142.367 81.407) (end 142.875 81.915) (width 0.127) (layer F.Cu) (net 12))
|
||||
(segment (start 142.875 81.915) (end 150.241 81.915) (width 0.127) (layer F.Cu) (net 12))
|
||||
(segment (start 150.241 81.915) (end 151.13 82.804) (width 0.127) (layer F.Cu) (net 12))
|
||||
(segment (start 143.637 69.21) (end 143.637 73.279) (width 0.127) (layer F.Cu) (net 13))
|
||||
(segment (start 143.637 73.279) (end 143.002 73.914) (width 0.127) (layer F.Cu) (net 13))
|
||||
(segment (start 143.002 73.914) (end 143.002 80.899) (width 0.127) (layer F.Cu) (net 13))
|
||||
(segment (start 143.002 80.899) (end 143.764 81.661) (width 0.127) (layer F.Cu) (net 13))
|
||||
(segment (start 143.764 81.661) (end 157.607 81.661) (width 0.127) (layer F.Cu) (net 13))
|
||||
(segment (start 157.607 81.661) (end 158.75 82.804) (width 0.127) (layer F.Cu) (net 13))
|
||||
(segment (start 143.637 77.36) (end 143.637 80.645) (width 0.127) (layer F.Cu) (net 15))
|
||||
(segment (start 143.637 80.645) (end 144.38629 81.39429) (width 0.127) (layer F.Cu) (net 15))
|
||||
(segment (start 144.38629 81.39429) (end 162.42029 81.39429) (width 0.127) (layer F.Cu) (net 15))
|
||||
(segment (start 162.42029 81.39429) (end 163.83 82.804) (width 0.127) (layer F.Cu) (net 15))
|
||||
(segment (start 147.193 73.533) (end 146.177 72.517) (width 0.127) (layer F.Cu) (net 17))
|
||||
(segment (start 156.718 73.533) (end 147.193 73.533) (width 0.127) (layer F.Cu) (net 17))
|
||||
|
||||
256
simm-30-4mb.pro
256
simm-30-4mb.pro
@ -1,29 +1,10 @@
|
||||
update=22/05/2015 07:44:53
|
||||
update=Sunday, June 09, 2019 at 09:10:03 PM
|
||||
version=1
|
||||
last_client=kicad
|
||||
last_client=pcbnew
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[pcbnew]
|
||||
version=1
|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
@ -31,3 +12,236 @@ NetIExt=net
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=4
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.127
|
||||
MinViaDiameter=0.508
|
||||
MinViaDrill=0.2
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.127
|
||||
TrackWidth2=0.1524
|
||||
TrackWidth3=0.254
|
||||
TrackWidth4=0.508
|
||||
TrackWidth5=0.762
|
||||
TrackWidth6=0.8
|
||||
TrackWidth7=1.27
|
||||
TrackWidth8=1.524
|
||||
ViaDiameter1=0.508
|
||||
ViaDrill1=0.2
|
||||
ViaDiameter2=0.8
|
||||
ViaDrill2=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.15
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.15
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.07619999999999999
|
||||
SolderMaskMinWidth=0.1524
|
||||
SolderPasteClearance=-0.03809999999999999
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.127
|
||||
TrackWidth=0.127
|
||||
ViaDiameter=0.508
|
||||
ViaDrill=0.2
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
|
||||
@ -1,8 +1,7 @@
|
||||
EESchema Schematic File Version 4
|
||||
LIBS:simm-30-4mb-cache
|
||||
EELAYER 26 0
|
||||
EELAYER 29 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
$Descr USLetter 11000 8500
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title ""
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user