Finished routing. Now need to do the board outline more

This commit is contained in:
Zane Kaminski 2019-06-25 22:56:18 -04:00
parent 73e859a61e
commit e001d18b3d
4 changed files with 1149 additions and 837 deletions

192
simm-30-4mb-cache.lib Normal file
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@ -0,0 +1,192 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Connector_Generic_Conn_01x30
#
DEF Connector_Generic_Conn_01x30 J 0 40 Y N 1 F N
F0 "J" 0 1500 50 H V C CNN
F1 "Connector_Generic_Conn_01x30" 0 -1600 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 -1495 0 -1505 1 1 6 N
S -50 -1395 0 -1405 1 1 6 N
S -50 -1295 0 -1305 1 1 6 N
S -50 -1195 0 -1205 1 1 6 N
S -50 -1095 0 -1105 1 1 6 N
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S -50 -895 0 -905 1 1 6 N
S -50 -795 0 -805 1 1 6 N
S -50 -695 0 -705 1 1 6 N
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 605 0 595 1 1 6 N
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S -50 1205 0 1195 1 1 6 N
S -50 1305 0 1295 1 1 6 N
S -50 1405 0 1395 1 1 6 N
S -50 1450 50 -1550 1 1 10 f
X Pin_1 1 -200 1400 150 R 50 50 1 1 P
X Pin_10 10 -200 500 150 R 50 50 1 1 P
X Pin_11 11 -200 400 150 R 50 50 1 1 P
X Pin_12 12 -200 300 150 R 50 50 1 1 P
X Pin_13 13 -200 200 150 R 50 50 1 1 P
X Pin_14 14 -200 100 150 R 50 50 1 1 P
X Pin_15 15 -200 0 150 R 50 50 1 1 P
X Pin_16 16 -200 -100 150 R 50 50 1 1 P
X Pin_17 17 -200 -200 150 R 50 50 1 1 P
X Pin_18 18 -200 -300 150 R 50 50 1 1 P
X Pin_19 19 -200 -400 150 R 50 50 1 1 P
X Pin_2 2 -200 1300 150 R 50 50 1 1 P
X Pin_20 20 -200 -500 150 R 50 50 1 1 P
X Pin_21 21 -200 -600 150 R 50 50 1 1 P
X Pin_22 22 -200 -700 150 R 50 50 1 1 P
X Pin_23 23 -200 -800 150 R 50 50 1 1 P
X Pin_24 24 -200 -900 150 R 50 50 1 1 P
X Pin_25 25 -200 -1000 150 R 50 50 1 1 P
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X Pin_27 27 -200 -1200 150 R 50 50 1 1 P
X Pin_28 28 -200 -1300 150 R 50 50 1 1 P
X Pin_29 29 -200 -1400 150 R 50 50 1 1 P
X Pin_3 3 -200 1200 150 R 50 50 1 1 P
X Pin_30 30 -200 -1500 150 R 50 50 1 1 P
X Pin_4 4 -200 1100 150 R 50 50 1 1 P
X Pin_5 5 -200 1000 150 R 50 50 1 1 P
X Pin_6 6 -200 900 150 R 50 50 1 1 P
X Pin_7 7 -200 800 150 R 50 50 1 1 P
X Pin_8 8 -200 700 150 R 50 50 1 1 P
X Pin_9 9 -200 600 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x13_Counter_Clockwise
#
DEF Connector_Generic_Conn_02x13_Counter_Clockwise J 0 40 Y N 1 F N
F0 "J" 50 700 50 H V C CNN
F1 "Connector_Generic_Conn_02x13_Counter_Clockwise" 50 -700 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -595 0 -605 1 1 6 N
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S -50 605 0 595 1 1 6 N
S -50 650 150 -650 1 1 10 f
S 150 -595 100 -605 1 1 6 N
S 150 -495 100 -505 1 1 6 N
S 150 -395 100 -405 1 1 6 N
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
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X Pin_1 1 -200 600 150 R 50 50 1 1 P
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X Pin_12 12 -200 -500 150 R 50 50 1 1 P
X Pin_13 13 -200 -600 150 R 50 50 1 1 P
X Pin_14 14 300 -600 150 L 50 50 1 1 P
X Pin_15 15 300 -500 150 L 50 50 1 1 P
X Pin_16 16 300 -400 150 L 50 50 1 1 P
X Pin_17 17 300 -300 150 L 50 50 1 1 P
X Pin_18 18 300 -200 150 L 50 50 1 1 P
X Pin_19 19 300 -100 150 L 50 50 1 1 P
X Pin_2 2 -200 500 150 R 50 50 1 1 P
X Pin_20 20 300 0 150 L 50 50 1 1 P
X Pin_21 21 300 100 150 L 50 50 1 1 P
X Pin_22 22 300 200 150 L 50 50 1 1 P
X Pin_23 23 300 300 150 L 50 50 1 1 P
X Pin_24 24 300 400 150 L 50 50 1 1 P
X Pin_25 25 300 500 150 L 50 50 1 1 P
X Pin_26 26 300 600 150 L 50 50 1 1 P
X Pin_3 3 -200 400 150 R 50 50 1 1 P
X Pin_4 4 -200 300 150 R 50 50 1 1 P
X Pin_5 5 -200 200 150 R 50 50 1 1 P
X Pin_6 6 -200 100 150 R 50 50 1 1 P
X Pin_7 7 -200 0 150 R 50 50 1 1 P
X Pin_8 8 -200 -100 150 R 50 50 1 1 P
X Pin_9 9 -200 -200 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C_Small
#
DEF Device_C_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "Device_C_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 13 -60 -20 60 -20 N
P 2 0 1 12 -60 20 60 20 N
X ~ 1 0 100 80 D 50 50 1 1 P
X ~ 2 0 -100 80 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

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@ -1,6 +1,6 @@
update=Sunday, June 09, 2019 at 09:10:03 PM update=Tuesday, June 25, 2019 at 09:30:44 PM
version=1 version=1
last_client=pcbnew last_client=kicad
[general] [general]
version=1 version=1
RootSch= RootSch=
@ -15,7 +15,7 @@ LibDir=
[pcbnew] [pcbnew]
version=1 version=1
PageLayoutDescrFile= PageLayoutDescrFile=
LastNetListRead= LastNetListRead=simm-30-4mb.net
CopperLayerCount=4 CopperLayerCount=4
BoardThickness=1.6 BoardThickness=1.6
AllowMicroVias=0 AllowMicroVias=0
@ -28,7 +28,7 @@ MinViaDrill=0.2
MinMicroViaDiameter=0.2 MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999 MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25 MinHoleToHole=0.25
TrackWidth1=0.127 TrackWidth1=0.1524
TrackWidth2=0.1524 TrackWidth2=0.1524
TrackWidth3=0.254 TrackWidth3=0.254
TrackWidth4=0.508 TrackWidth4=0.508
@ -236,8 +236,8 @@ Enabled=0
[pcbnew/Netclasses] [pcbnew/Netclasses]
[pcbnew/Netclasses/Default] [pcbnew/Netclasses/Default]
Name=Default Name=Default
Clearance=0.127 Clearance=0.1524
TrackWidth=0.127 TrackWidth=0.1524
ViaDiameter=0.508 ViaDiameter=0.508
ViaDrill=0.2 ViaDrill=0.2
uViaDiameter=0.3 uViaDiameter=0.3

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