2018-05-03 13:47:57 +00:00
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//---------------------------------------------------------------------------
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//
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// SCSI Target Emulator RaSCSI (*^..^*)
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// for Raspberry Pi
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//
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// Powered by XM6 TypeG Technology.
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2020-07-04 14:57:44 +00:00
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// Copyright (C) 2016-2020 GIMONS
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2018-05-03 13:47:57 +00:00
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//
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// Imported NetBSD support and some optimisation patch by Rin Okuyama.
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//
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2020-07-06 03:56:25 +00:00
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// [ GPIO-SCSI bus ]
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2018-05-03 13:47:57 +00:00
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//
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//---------------------------------------------------------------------------
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#include "os.h"
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#include "xm6.h"
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#include "gpiobus.h"
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2020-10-19 12:31:06 +00:00
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#include "log.h"
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2018-05-03 13:47:57 +00:00
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2020-07-04 14:57:44 +00:00
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#ifndef BAREMETAL
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2018-05-03 13:47:57 +00:00
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#ifdef __linux__
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//---------------------------------------------------------------------------
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//
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// imported from bcm_host.c
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//
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//---------------------------------------------------------------------------
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static DWORD get_dt_ranges(const char *filename, DWORD offset)
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{
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DWORD address;
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FILE *fp;
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BYTE buf[4];
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address = ~0;
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fp = fopen(filename, "rb");
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if (fp) {
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fseek(fp, offset, SEEK_SET);
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if (fread(buf, 1, sizeof buf, fp) == sizeof buf) {
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address =
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buf[0] << 24 | buf[1] << 16 | buf[2] << 8 | buf[3] << 0;
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}
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fclose(fp);
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}
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return address;
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}
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DWORD bcm_host_get_peripheral_address(void)
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{
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DWORD address;
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2020-07-04 14:57:44 +00:00
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2018-05-03 13:47:57 +00:00
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address = get_dt_ranges("/proc/device-tree/soc/ranges", 4);
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2020-07-04 14:57:44 +00:00
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if (address == 0) {
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address = get_dt_ranges("/proc/device-tree/soc/ranges", 8);
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}
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address = (address == (DWORD)~0) ? 0x20000000 : address;
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#if 0
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printf("Peripheral address : 0x%lx\n", address);
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#endif
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return address;
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2018-05-03 13:47:57 +00:00
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}
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#endif // __linux__
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#ifdef __NetBSD__
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2020-07-06 03:56:25 +00:00
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// Assume the Raspberry Pi series and estimate the address from CPU
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2018-05-03 13:47:57 +00:00
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DWORD bcm_host_get_peripheral_address(void)
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{
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char buf[1024];
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size_t len = sizeof(buf);
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DWORD address;
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2020-10-19 12:31:06 +00:00
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2018-05-03 13:47:57 +00:00
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if (sysctlbyname("hw.model", buf, &len, NULL, 0) ||
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strstr(buf, "ARM1176JZ-S") != buf) {
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2020-07-06 03:56:25 +00:00
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// Failed to get CPU model || Not BCM2835
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// use the address of BCM283[67]
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2018-05-03 13:47:57 +00:00
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address = 0x3f000000;
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} else {
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2020-07-06 03:56:25 +00:00
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// Use BCM2835 address
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2018-05-03 13:47:57 +00:00
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address = 0x20000000;
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}
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printf("Peripheral address : 0x%lx\n", address);
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return address;
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}
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2020-07-04 14:57:44 +00:00
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#endif // __NetBSD__
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#endif // BAREMETAL
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2018-05-03 13:47:57 +00:00
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2020-07-04 14:57:44 +00:00
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#ifdef BAREMETAL
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2020-07-06 03:56:25 +00:00
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// IO base address
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2020-07-04 14:57:44 +00:00
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extern uint32_t RPi_IO_Base_Addr;
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2018-05-03 13:47:57 +00:00
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2020-07-06 03:56:25 +00:00
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// Core frequency
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2020-07-04 14:57:44 +00:00
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extern uint32_t RPi_Core_Freq;
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2018-05-03 13:47:57 +00:00
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2020-10-19 12:31:06 +00:00
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#ifdef USE_SEL_EVENT_ENABLE
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2018-05-03 13:47:57 +00:00
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//---------------------------------------------------------------------------
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//
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2020-07-06 03:56:25 +00:00
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// Interrupt control function
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2018-05-03 13:47:57 +00:00
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//
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//---------------------------------------------------------------------------
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2020-07-04 14:57:44 +00:00
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extern "C" {
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extern uintptr_t setIrqFuncAddress (void(*ARMaddress)(void));
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extern void EnableInterrupts (void);
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extern void DisableInterrupts (void);
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extern void WaitForInterrupts (void);
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2018-05-03 13:47:57 +00:00
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}
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//---------------------------------------------------------------------------
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//
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2020-07-06 03:56:25 +00:00
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// Interrupt handler
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2018-05-03 13:47:57 +00:00
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//
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//---------------------------------------------------------------------------
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2020-07-04 14:57:44 +00:00
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static GPIOBUS *self;
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extern "C"
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void IrqHandler()
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2018-05-03 13:47:57 +00:00
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{
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2020-07-06 03:56:25 +00:00
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// Clear interrupt
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2020-07-04 14:57:44 +00:00
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self->ClearSelectEvent();
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2018-05-03 13:47:57 +00:00
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}
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2020-07-04 14:57:44 +00:00
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#endif // USE_SEL_EVENT_ENABLE
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#endif // BAREMETAL
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2018-05-03 13:47:57 +00:00
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//---------------------------------------------------------------------------
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//
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2020-07-06 03:56:25 +00:00
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// Constructor
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2018-05-03 13:47:57 +00:00
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//
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//---------------------------------------------------------------------------
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2020-07-04 14:57:44 +00:00
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GPIOBUS::GPIOBUS()
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2018-05-03 13:47:57 +00:00
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{
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2020-07-04 14:57:44 +00:00
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#if defined(USE_SEL_EVENT_ENABLE) && defined(BAREMETAL)
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self = this;
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#endif // USE_SEL_EVENT_ENABLE && BAREMETAL
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2018-05-03 13:47:57 +00:00
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}
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//---------------------------------------------------------------------------
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//
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2020-07-06 03:56:25 +00:00
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// Destructor
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2018-05-03 13:47:57 +00:00
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//
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//---------------------------------------------------------------------------
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2020-07-04 14:57:44 +00:00
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GPIOBUS::~GPIOBUS()
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2018-05-03 13:47:57 +00:00
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{
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}
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//---------------------------------------------------------------------------
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//
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// 初期化
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//
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//---------------------------------------------------------------------------
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BOOL FASTCALL GPIOBUS::Init(mode_e mode)
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{
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2020-08-07 19:25:05 +00:00
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#if defined(__x86_64__) || defined(__X86__)
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// When we're running on x86, there is no hardware to talk to, so just return.
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return true;
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#else
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2018-05-03 13:47:57 +00:00
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void *map;
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int i;
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int j;
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int pullmode;
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2020-07-04 14:57:44 +00:00
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#ifndef BAREMETAL
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int fd;
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#ifdef USE_SEL_EVENT_ENABLE
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struct epoll_event ev;
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#endif // USE_SEL_EVENT_ENABLE
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#endif // BAREMETAL
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2018-05-03 13:47:57 +00:00
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2020-07-06 03:56:25 +00:00
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// Save operation mode
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2018-05-03 13:47:57 +00:00
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actmode = mode;
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2020-07-04 14:57:44 +00:00
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#ifdef BAREMETAL
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2020-07-06 03:56:25 +00:00
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// Get the base address
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2020-07-04 14:57:44 +00:00
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baseaddr = RPi_IO_Base_Addr;
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map = (void*)baseaddr;
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#else
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2020-07-06 03:56:25 +00:00
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// Get the base address
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2020-07-04 14:57:44 +00:00
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baseaddr = (DWORD)bcm_host_get_peripheral_address();
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2018-05-03 13:47:57 +00:00
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2020-07-06 03:56:25 +00:00
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// Open /dev/mem
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2018-05-03 13:47:57 +00:00
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fd = open("/dev/mem", O_RDWR | O_SYNC);
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if (fd == -1) {
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2020-10-19 12:31:06 +00:00
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LOGERROR("Error: Unable to open /dev/mem. Are you running as root?");
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2020-07-04 14:57:44 +00:00
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return FALSE;
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2018-05-03 13:47:57 +00:00
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}
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2020-07-06 03:56:25 +00:00
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// Map peripheral region memory
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2020-07-04 14:57:44 +00:00
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map = mmap(NULL, 0x1000100,
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PROT_READ | PROT_WRITE, MAP_SHARED, fd, baseaddr);
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2018-05-03 13:47:57 +00:00
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if (map == MAP_FAILED) {
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close(fd);
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return FALSE;
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}
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2020-07-04 14:57:44 +00:00
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#endif
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2020-07-06 03:56:25 +00:00
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// Determine the type of raspberry pi from the base address
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2020-07-04 14:57:44 +00:00
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if (baseaddr == 0xfe000000) {
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rpitype = 4;
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} else if (baseaddr == 0x3f000000) {
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rpitype = 2;
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} else {
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rpitype = 1;
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}
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2018-05-03 13:47:57 +00:00
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2020-07-04 14:57:44 +00:00
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// GPIO
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2018-05-03 13:47:57 +00:00
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gpio = (DWORD *)map;
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2020-07-04 14:57:44 +00:00
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gpio += GPIO_OFFSET / sizeof(DWORD);
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2018-05-03 13:47:57 +00:00
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level = &gpio[GPIO_LEV_0];
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2020-07-04 14:57:44 +00:00
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// PADS
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pads = (DWORD *)map;
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pads += PADS_OFFSET / sizeof(DWORD);
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2020-07-06 03:56:25 +00:00
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// System timer
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2020-07-04 14:57:44 +00:00
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SysTimer::Init(
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(DWORD *)map + SYST_OFFSET / sizeof(DWORD),
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(DWORD *)map + ARMT_OFFSET / sizeof(DWORD));
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2020-07-06 03:56:25 +00:00
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// Interrupt controller
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2020-07-04 14:57:44 +00:00
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irpctl = (DWORD *)map;
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irpctl += IRPT_OFFSET / sizeof(DWORD);
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#ifndef BAREMETAL
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// Quad-A7 control
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qa7regs = (DWORD *)map;
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qa7regs += QA7_OFFSET / sizeof(DWORD);
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#endif // BAREMETAL
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#ifdef BAREMETAL
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2020-07-06 03:56:25 +00:00
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// Map GIC memory
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2020-07-04 14:57:44 +00:00
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if (rpitype == 4) {
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map = (void*)ARM_GICD_BASE;
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gicd = (DWORD *)map;
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map = (void*)ARM_GICC_BASE;
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gicc = (DWORD *)map;
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} else {
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gicd = NULL;
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gicc = NULL;
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}
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#else
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2020-07-06 03:56:25 +00:00
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// Map GIC memory
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2020-07-04 14:57:44 +00:00
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if (rpitype == 4) {
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map = mmap(NULL, 8192,
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PROT_READ | PROT_WRITE, MAP_SHARED, fd, ARM_GICD_BASE);
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2018-05-03 13:47:57 +00:00
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if (map == MAP_FAILED) {
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2020-07-04 14:57:44 +00:00
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close(fd);
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2018-05-03 13:47:57 +00:00
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return FALSE;
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}
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2020-07-04 14:57:44 +00:00
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gicd = (DWORD *)map;
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gicc = (DWORD *)map;
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gicc += (ARM_GICC_BASE - ARM_GICD_BASE) / sizeof(DWORD);
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} else {
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gicd = NULL;
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gicc = NULL;
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2018-05-03 13:47:57 +00:00
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}
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2020-07-04 14:57:44 +00:00
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close(fd);
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#endif // BAREMETAL
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2018-05-03 13:47:57 +00:00
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2020-07-06 03:56:25 +00:00
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// Set Drive Strength to 16mA
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2018-05-03 13:47:57 +00:00
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DrvConfig(7);
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2020-07-06 03:56:25 +00:00
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// Set pull up/pull down
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2018-05-03 13:47:57 +00:00
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#if SIGNAL_CONTROL_MODE == 0
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pullmode = GPIO_PULLNONE;
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#elif SIGNAL_CONTROL_MODE == 1
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pullmode = GPIO_PULLUP;
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#else
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pullmode = GPIO_PULLDOWN;
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#endif
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2020-07-06 03:56:25 +00:00
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// Initialize all signals
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2018-05-03 13:47:57 +00:00
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for (i = 0; SignalTable[i] >= 0; i++) {
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j = SignalTable[i];
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PinSetSignal(j, FALSE);
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PinConfig(j, GPIO_INPUT);
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PullConfig(j, pullmode);
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}
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2020-07-06 03:56:25 +00:00
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// Set control signals
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2018-05-03 13:47:57 +00:00
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PinSetSignal(PIN_ACT, FALSE);
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PinSetSignal(PIN_TAD, FALSE);
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PinSetSignal(PIN_IND, FALSE);
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PinSetSignal(PIN_DTD, FALSE);
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PinConfig(PIN_ACT, GPIO_OUTPUT);
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PinConfig(PIN_TAD, GPIO_OUTPUT);
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PinConfig(PIN_IND, GPIO_OUTPUT);
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PinConfig(PIN_DTD, GPIO_OUTPUT);
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2020-07-06 03:56:25 +00:00
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// Set the ENABLE signal
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2020-07-07 19:16:02 +00:00
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// This is used to show that the application is running
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2020-07-04 14:57:44 +00:00
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PinSetSignal(PIN_ENB, ENB_OFF);
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2018-05-03 13:47:57 +00:00
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PinConfig(PIN_ENB, GPIO_OUTPUT);
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2020-07-06 03:56:25 +00:00
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// GPFSEL backup
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2018-05-03 13:47:57 +00:00
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gpfsel[0] = gpio[GPIO_FSEL_0];
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gpfsel[1] = gpio[GPIO_FSEL_1];
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gpfsel[2] = gpio[GPIO_FSEL_2];
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gpfsel[3] = gpio[GPIO_FSEL_3];
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2020-07-06 03:56:25 +00:00
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// Initialize SEL signal interrupt
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2020-07-04 14:57:44 +00:00
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#ifdef USE_SEL_EVENT_ENABLE
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#ifndef BAREMETAL
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2020-07-06 03:56:25 +00:00
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// GPIO chip open
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2020-07-04 14:57:44 +00:00
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fd = open("/dev/gpiochip0", 0);
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if (fd == -1) {
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2020-10-19 12:31:06 +00:00
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LOGERROR("Unable to open /dev/gpiochip0. Is RaSCSI already running?")
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2020-07-04 14:57:44 +00:00
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return FALSE;
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}
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2020-07-06 03:56:25 +00:00
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// Event request setting
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2020-07-04 14:57:44 +00:00
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strcpy(selevreq.consumer_label, "RaSCSI");
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selevreq.lineoffset = PIN_SEL;
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selevreq.handleflags = GPIOHANDLE_REQUEST_INPUT;
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#if SIGNAL_CONTROL_MODE < 2
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|
|
selevreq.eventflags = GPIOEVENT_REQUEST_FALLING_EDGE;
|
|
|
|
#else
|
|
|
|
selevreq.eventflags = GPIOEVENT_REQUEST_RISING_EDGE;
|
|
|
|
#endif // SIGNAL_CONTROL_MODE
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
//Get event request
|
2020-07-04 14:57:44 +00:00
|
|
|
if (ioctl(fd, GPIO_GET_LINEEVENT_IOCTL, &selevreq) == -1) {
|
2020-10-19 12:31:06 +00:00
|
|
|
LOGERROR("Unable to register event request. Is RaSCSI already running?")
|
2020-07-04 14:57:44 +00:00
|
|
|
close(fd);
|
|
|
|
return FALSE;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Close GPIO chip file handle
|
2020-07-04 14:57:44 +00:00
|
|
|
close(fd);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// epoll initialization
|
2020-07-04 14:57:44 +00:00
|
|
|
epfd = epoll_create(1);
|
|
|
|
memset(&ev, 0, sizeof(ev));
|
|
|
|
ev.events = EPOLLIN | EPOLLPRI;
|
|
|
|
ev.data.fd = selevreq.fd;
|
|
|
|
epoll_ctl(epfd, EPOLL_CTL_ADD, selevreq.fd, &ev);
|
|
|
|
#else
|
2020-07-06 03:56:25 +00:00
|
|
|
// Edge detection setting
|
2020-07-04 14:57:44 +00:00
|
|
|
#if SIGNAL_CONTROL_MODE == 2
|
|
|
|
gpio[GPIO_AREN_0] = 1 << PIN_SEL;
|
|
|
|
#else
|
|
|
|
gpio[GPIO_AFEN_0] = 1 << PIN_SEL;
|
|
|
|
#endif // SIGNAL_CONTROL_MODE
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Clear event
|
2020-07-04 14:57:44 +00:00
|
|
|
gpio[GPIO_EDS_0] = 1 << PIN_SEL;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Register interrupt handler
|
2020-07-04 14:57:44 +00:00
|
|
|
setIrqFuncAddress(IrqHandler);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// GPIO interrupt setting
|
2020-07-04 14:57:44 +00:00
|
|
|
if (rpitype == 4) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// GIC Invalid
|
2020-07-04 14:57:44 +00:00
|
|
|
gicd[GICD_CTLR] = 0;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Route all interupts to core 0
|
2020-07-04 14:57:44 +00:00
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
gicd[GICD_ICENABLER0 + i] = 0xffffffff;
|
|
|
|
gicd[GICD_ICPENDR0 + i] = 0xffffffff;
|
|
|
|
gicd[GICD_ICACTIVER0 + i] = 0xffffffff;
|
|
|
|
}
|
|
|
|
for (i = 0; i < 64; i++) {
|
|
|
|
gicd[GICD_IPRIORITYR0 + i] = 0xa0a0a0a0;
|
|
|
|
gicd[GICD_ITARGETSR0 + i] = 0x01010101;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set all interrupts as level triggers
|
2020-07-04 14:57:44 +00:00
|
|
|
for (i = 0; i < 16; i++) {
|
|
|
|
gicd[GICD_ICFGR0 + i] = 0;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// GIC Invalid
|
2020-07-04 14:57:44 +00:00
|
|
|
gicd[GICD_CTLR] = 1;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Enable CPU interface for core 0
|
2020-07-04 14:57:44 +00:00
|
|
|
gicc[GICC_PMR] = 0xf0;
|
|
|
|
gicc[GICC_CTLR] = 1;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Enable interrupts
|
2020-07-04 14:57:44 +00:00
|
|
|
gicd[GICD_ISENABLER0 + (GIC_GPIO_IRQ / 32)] =
|
|
|
|
1 << (GIC_GPIO_IRQ % 32);
|
|
|
|
} else {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Enable interrupts
|
2020-07-04 14:57:44 +00:00
|
|
|
irpctl[IRPT_ENB_IRQ_2] = (1 << (GPIO_IRQ % 32));
|
|
|
|
}
|
|
|
|
#endif // BAREMETAL
|
|
|
|
#endif // USE_SEL_EVENT_ENABLE
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Create work table
|
2018-05-03 13:47:57 +00:00
|
|
|
MakeTable();
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Finally, enable ENABLE
|
2020-07-07 19:16:02 +00:00
|
|
|
// Show the user that this app is running
|
2020-07-04 14:57:44 +00:00
|
|
|
SetControl(PIN_ENB, ENB_ON);
|
|
|
|
|
2018-05-03 13:47:57 +00:00
|
|
|
return TRUE;
|
2020-08-07 19:25:05 +00:00
|
|
|
#endif // ifdef __x86_64__ || __X86__
|
|
|
|
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Cleanup
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::Cleanup()
|
|
|
|
{
|
2020-08-07 19:25:05 +00:00
|
|
|
#if defined(__x86_64__) || defined(__X86__)
|
|
|
|
return;
|
|
|
|
#else
|
2018-05-03 13:47:57 +00:00
|
|
|
int i;
|
2020-07-04 14:57:44 +00:00
|
|
|
int pin;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Release SEL signal interrupt
|
2020-07-04 14:57:44 +00:00
|
|
|
#ifdef USE_SEL_EVENT_ENABLE
|
|
|
|
#ifndef BAREMETAL
|
|
|
|
close(selevreq.fd);
|
|
|
|
#endif // BAREMETAL
|
|
|
|
#endif // USE_SEL_EVENT_ENABLE
|
2018-05-03 13:47:57 +00:00
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set control signals
|
2018-05-03 13:47:57 +00:00
|
|
|
PinSetSignal(PIN_ENB, FALSE);
|
|
|
|
PinSetSignal(PIN_ACT, FALSE);
|
|
|
|
PinSetSignal(PIN_TAD, FALSE);
|
|
|
|
PinSetSignal(PIN_IND, FALSE);
|
|
|
|
PinSetSignal(PIN_DTD, FALSE);
|
|
|
|
PinConfig(PIN_ACT, GPIO_INPUT);
|
|
|
|
PinConfig(PIN_TAD, GPIO_INPUT);
|
|
|
|
PinConfig(PIN_IND, GPIO_INPUT);
|
|
|
|
PinConfig(PIN_DTD, GPIO_INPUT);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Initialize all signals
|
2018-05-03 13:47:57 +00:00
|
|
|
for (i = 0; SignalTable[i] >= 0; i++) {
|
2020-07-04 14:57:44 +00:00
|
|
|
pin = SignalTable[i];
|
|
|
|
PinSetSignal(pin, FALSE);
|
|
|
|
PinConfig(pin, GPIO_INPUT);
|
|
|
|
PullConfig(pin, GPIO_PULLNONE);
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set drive strength back to 8mA
|
2018-05-03 13:47:57 +00:00
|
|
|
DrvConfig(3);
|
2020-08-07 19:25:05 +00:00
|
|
|
#endif // ifdef __x86_64__ || __X86__
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Reset
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
2020-07-04 14:57:44 +00:00
|
|
|
void FASTCALL GPIOBUS::Reset()
|
2018-05-03 13:47:57 +00:00
|
|
|
{
|
2020-08-07 19:25:05 +00:00
|
|
|
#if defined(__x86_64__) || defined(__X86__)
|
|
|
|
return;
|
|
|
|
#else
|
2020-07-04 14:57:44 +00:00
|
|
|
int i;
|
|
|
|
int j;
|
2018-05-03 13:47:57 +00:00
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Turn off active signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetControl(PIN_ACT, ACT_OFF);
|
2018-05-03 13:47:57 +00:00
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set all signals to off
|
2020-07-04 14:57:44 +00:00
|
|
|
for (i = 0;; i++) {
|
|
|
|
j = SignalTable[i];
|
|
|
|
if (j < 0) {
|
|
|
|
break;
|
|
|
|
}
|
2018-05-03 13:47:57 +00:00
|
|
|
|
|
|
|
SetSignal(j, OFF);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (actmode == TARGET) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Target mode
|
2018-05-03 13:47:57 +00:00
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set target signal to input
|
2018-05-03 13:47:57 +00:00
|
|
|
SetControl(PIN_TAD, TAD_IN);
|
|
|
|
SetMode(PIN_BSY, IN);
|
|
|
|
SetMode(PIN_MSG, IN);
|
|
|
|
SetMode(PIN_CD, IN);
|
|
|
|
SetMode(PIN_REQ, IN);
|
|
|
|
SetMode(PIN_IO, IN);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set the initiator signal to input
|
2018-05-03 13:47:57 +00:00
|
|
|
SetControl(PIN_IND, IND_IN);
|
|
|
|
SetMode(PIN_SEL, IN);
|
|
|
|
SetMode(PIN_ATN, IN);
|
|
|
|
SetMode(PIN_ACK, IN);
|
|
|
|
SetMode(PIN_RST, IN);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set data bus signals to input
|
2018-05-03 13:47:57 +00:00
|
|
|
SetControl(PIN_DTD, DTD_IN);
|
|
|
|
SetMode(PIN_DT0, IN);
|
|
|
|
SetMode(PIN_DT1, IN);
|
|
|
|
SetMode(PIN_DT2, IN);
|
|
|
|
SetMode(PIN_DT3, IN);
|
|
|
|
SetMode(PIN_DT4, IN);
|
|
|
|
SetMode(PIN_DT5, IN);
|
|
|
|
SetMode(PIN_DT6, IN);
|
|
|
|
SetMode(PIN_DT7, IN);
|
|
|
|
SetMode(PIN_DP, IN);
|
|
|
|
} else {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Initiator mode
|
2018-05-03 13:47:57 +00:00
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set target signal to input
|
2018-05-03 13:47:57 +00:00
|
|
|
SetControl(PIN_TAD, TAD_IN);
|
|
|
|
SetMode(PIN_BSY, IN);
|
|
|
|
SetMode(PIN_MSG, IN);
|
|
|
|
SetMode(PIN_CD, IN);
|
|
|
|
SetMode(PIN_REQ, IN);
|
|
|
|
SetMode(PIN_IO, IN);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set the initiator signal to output
|
2018-05-03 13:47:57 +00:00
|
|
|
SetControl(PIN_IND, IND_OUT);
|
|
|
|
SetMode(PIN_SEL, OUT);
|
|
|
|
SetMode(PIN_ATN, OUT);
|
|
|
|
SetMode(PIN_ACK, OUT);
|
|
|
|
SetMode(PIN_RST, OUT);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set the data bus signals to outpu
|
2018-05-03 13:47:57 +00:00
|
|
|
SetControl(PIN_DTD, DTD_OUT);
|
|
|
|
SetMode(PIN_DT0, OUT);
|
|
|
|
SetMode(PIN_DT1, OUT);
|
|
|
|
SetMode(PIN_DT2, OUT);
|
|
|
|
SetMode(PIN_DT3, OUT);
|
|
|
|
SetMode(PIN_DT4, OUT);
|
|
|
|
SetMode(PIN_DT5, OUT);
|
|
|
|
SetMode(PIN_DT6, OUT);
|
|
|
|
SetMode(PIN_DT7, OUT);
|
|
|
|
SetMode(PIN_DP, OUT);
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Initialize all signals
|
2018-05-03 13:47:57 +00:00
|
|
|
signals = 0;
|
2020-08-07 19:25:05 +00:00
|
|
|
#endif // ifdef __x86_64__ || __X86__
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
2020-07-04 14:57:44 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// ENB signal setting
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetENB(BOOL ast)
|
|
|
|
{
|
|
|
|
PinSetSignal(PIN_ENB, ast ? ENB_ON : ENB_OFF);
|
|
|
|
}
|
|
|
|
|
2018-05-03 13:47:57 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get BSY signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::GetBSY()
|
|
|
|
{
|
|
|
|
return GetSignal(PIN_BSY);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set BSY signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetBSY(BOOL ast)
|
|
|
|
{
|
2020-07-09 20:34:29 +00:00
|
|
|
// Set BSY signal
|
|
|
|
SetSignal(PIN_BSY, ast);
|
|
|
|
|
2018-05-03 13:47:57 +00:00
|
|
|
if (actmode == TARGET) {
|
|
|
|
if (ast) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Turn on ACTIVE signal
|
2018-05-03 13:47:57 +00:00
|
|
|
SetControl(PIN_ACT, ACT_ON);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set Target signal to output
|
2018-05-03 13:47:57 +00:00
|
|
|
SetControl(PIN_TAD, TAD_OUT);
|
2020-07-04 14:57:44 +00:00
|
|
|
|
2018-05-03 13:47:57 +00:00
|
|
|
SetMode(PIN_BSY, OUT);
|
|
|
|
SetMode(PIN_MSG, OUT);
|
|
|
|
SetMode(PIN_CD, OUT);
|
|
|
|
SetMode(PIN_REQ, OUT);
|
|
|
|
SetMode(PIN_IO, OUT);
|
|
|
|
} else {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Turn off the ACTIVE signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetControl(PIN_ACT, ACT_OFF);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set the target signal to input
|
2018-05-03 13:47:57 +00:00
|
|
|
SetControl(PIN_TAD, TAD_IN);
|
2020-07-04 14:57:44 +00:00
|
|
|
|
2018-05-03 13:47:57 +00:00
|
|
|
SetMode(PIN_BSY, IN);
|
|
|
|
SetMode(PIN_MSG, IN);
|
|
|
|
SetMode(PIN_CD, IN);
|
|
|
|
SetMode(PIN_REQ, IN);
|
|
|
|
SetMode(PIN_IO, IN);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get SEL signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::GetSEL()
|
|
|
|
{
|
|
|
|
return GetSignal(PIN_SEL);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set SEL signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetSEL(BOOL ast)
|
|
|
|
{
|
|
|
|
if (actmode == INITIATOR && ast) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Turn on ACTIVE signal
|
2018-05-03 13:47:57 +00:00
|
|
|
SetControl(PIN_ACT, ACT_ON);
|
|
|
|
}
|
|
|
|
|
2020-07-09 20:34:29 +00:00
|
|
|
// Set SEL signal
|
|
|
|
SetSignal(PIN_SEL, ast);
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get ATN signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::GetATN()
|
|
|
|
{
|
|
|
|
return GetSignal(PIN_ATN);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get ATN signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetATN(BOOL ast)
|
|
|
|
{
|
2020-07-09 20:34:29 +00:00
|
|
|
SetSignal(PIN_ATN, ast);
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get ACK signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::GetACK()
|
|
|
|
{
|
|
|
|
return GetSignal(PIN_ACK);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set ACK signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetACK(BOOL ast)
|
|
|
|
{
|
|
|
|
SetSignal(PIN_ACK, ast);
|
|
|
|
}
|
|
|
|
|
2020-10-19 12:31:06 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
|
|
|
// Get ACK signal
|
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::GetACT()
|
|
|
|
{
|
|
|
|
return GetSignal(PIN_ACT);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
|
|
|
// Set ACK signal
|
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetACT(BOOL ast)
|
|
|
|
{
|
|
|
|
SetSignal(PIN_ACT, ast);
|
|
|
|
}
|
|
|
|
|
2018-05-03 13:47:57 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get RST signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::GetRST()
|
|
|
|
{
|
|
|
|
return GetSignal(PIN_RST);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set RST signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetRST(BOOL ast)
|
|
|
|
{
|
|
|
|
SetSignal(PIN_RST, ast);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get MSG signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::GetMSG()
|
|
|
|
{
|
|
|
|
return GetSignal(PIN_MSG);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set MSG signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetMSG(BOOL ast)
|
|
|
|
{
|
2020-07-09 20:34:29 +00:00
|
|
|
SetSignal(PIN_MSG, ast);
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get CD signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::GetCD()
|
|
|
|
{
|
|
|
|
return GetSignal(PIN_CD);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set CD Signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetCD(BOOL ast)
|
|
|
|
{
|
2020-07-09 20:34:29 +00:00
|
|
|
SetSignal(PIN_CD, ast);
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get IO Signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::GetIO()
|
|
|
|
{
|
|
|
|
BOOL ast;
|
|
|
|
ast = GetSignal(PIN_IO);
|
|
|
|
|
|
|
|
if (actmode == INITIATOR) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Change the data input/output direction by IO signal
|
2018-05-03 13:47:57 +00:00
|
|
|
if (ast) {
|
|
|
|
SetControl(PIN_DTD, DTD_IN);
|
|
|
|
SetMode(PIN_DT0, IN);
|
|
|
|
SetMode(PIN_DT1, IN);
|
|
|
|
SetMode(PIN_DT2, IN);
|
|
|
|
SetMode(PIN_DT3, IN);
|
|
|
|
SetMode(PIN_DT4, IN);
|
|
|
|
SetMode(PIN_DT5, IN);
|
|
|
|
SetMode(PIN_DT6, IN);
|
|
|
|
SetMode(PIN_DT7, IN);
|
|
|
|
SetMode(PIN_DP, IN);
|
|
|
|
} else {
|
|
|
|
SetControl(PIN_DTD, DTD_OUT);
|
|
|
|
SetMode(PIN_DT0, OUT);
|
|
|
|
SetMode(PIN_DT1, OUT);
|
|
|
|
SetMode(PIN_DT2, OUT);
|
|
|
|
SetMode(PIN_DT3, OUT);
|
|
|
|
SetMode(PIN_DT4, OUT);
|
|
|
|
SetMode(PIN_DT5, OUT);
|
|
|
|
SetMode(PIN_DT6, OUT);
|
|
|
|
SetMode(PIN_DT7, OUT);
|
|
|
|
SetMode(PIN_DP, OUT);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return ast;
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set IO signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetIO(BOOL ast)
|
|
|
|
{
|
|
|
|
SetSignal(PIN_IO, ast);
|
|
|
|
|
|
|
|
if (actmode == TARGET) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Change the data input/output direction by IO signal
|
2018-05-03 13:47:57 +00:00
|
|
|
if (ast) {
|
|
|
|
SetControl(PIN_DTD, DTD_OUT);
|
2020-07-04 14:57:44 +00:00
|
|
|
SetDAT(0);
|
2018-05-03 13:47:57 +00:00
|
|
|
SetMode(PIN_DT0, OUT);
|
|
|
|
SetMode(PIN_DT1, OUT);
|
|
|
|
SetMode(PIN_DT2, OUT);
|
|
|
|
SetMode(PIN_DT3, OUT);
|
|
|
|
SetMode(PIN_DT4, OUT);
|
|
|
|
SetMode(PIN_DT5, OUT);
|
|
|
|
SetMode(PIN_DT6, OUT);
|
|
|
|
SetMode(PIN_DT7, OUT);
|
|
|
|
SetMode(PIN_DP, OUT);
|
|
|
|
} else {
|
|
|
|
SetControl(PIN_DTD, DTD_IN);
|
|
|
|
SetMode(PIN_DT0, IN);
|
|
|
|
SetMode(PIN_DT1, IN);
|
|
|
|
SetMode(PIN_DT2, IN);
|
|
|
|
SetMode(PIN_DT3, IN);
|
|
|
|
SetMode(PIN_DT4, IN);
|
|
|
|
SetMode(PIN_DT5, IN);
|
|
|
|
SetMode(PIN_DT6, IN);
|
|
|
|
SetMode(PIN_DT7, IN);
|
|
|
|
SetMode(PIN_DP, IN);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get REQ signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::GetREQ()
|
|
|
|
{
|
|
|
|
return GetSignal(PIN_REQ);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set REQ signal
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetREQ(BOOL ast)
|
|
|
|
{
|
|
|
|
SetSignal(PIN_REQ, ast);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get data signals
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BYTE FASTCALL GPIOBUS::GetDAT()
|
|
|
|
{
|
|
|
|
DWORD data;
|
|
|
|
|
|
|
|
data = Aquire();
|
|
|
|
data =
|
|
|
|
((data >> (PIN_DT0 - 0)) & (1 << 0)) |
|
|
|
|
((data >> (PIN_DT1 - 1)) & (1 << 1)) |
|
|
|
|
((data >> (PIN_DT2 - 2)) & (1 << 2)) |
|
|
|
|
((data >> (PIN_DT3 - 3)) & (1 << 3)) |
|
|
|
|
((data >> (PIN_DT4 - 4)) & (1 << 4)) |
|
|
|
|
((data >> (PIN_DT5 - 5)) & (1 << 5)) |
|
|
|
|
((data >> (PIN_DT6 - 6)) & (1 << 6)) |
|
|
|
|
((data >> (PIN_DT7 - 7)) & (1 << 7));
|
|
|
|
|
|
|
|
return (BYTE)data;
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set data signals
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetDAT(BYTE dat)
|
|
|
|
{
|
2020-07-06 03:56:25 +00:00
|
|
|
// Write to port
|
2018-05-03 13:47:57 +00:00
|
|
|
#if SIGNAL_CONTROL_MODE == 0
|
2020-07-04 14:57:44 +00:00
|
|
|
DWORD fsel;
|
|
|
|
|
|
|
|
fsel = gpfsel[0];
|
|
|
|
fsel &= tblDatMsk[0][dat];
|
|
|
|
fsel |= tblDatSet[0][dat];
|
|
|
|
if (fsel != gpfsel[0]) {
|
|
|
|
gpfsel[0] = fsel;
|
|
|
|
gpio[GPIO_FSEL_0] = fsel;
|
|
|
|
}
|
2018-05-03 13:47:57 +00:00
|
|
|
|
2020-07-04 14:57:44 +00:00
|
|
|
fsel = gpfsel[1];
|
|
|
|
fsel &= tblDatMsk[1][dat];
|
|
|
|
fsel |= tblDatSet[1][dat];
|
|
|
|
if (fsel != gpfsel[1]) {
|
|
|
|
gpfsel[1] = fsel;
|
|
|
|
gpio[GPIO_FSEL_1] = fsel;
|
|
|
|
}
|
2018-05-03 13:47:57 +00:00
|
|
|
|
2020-07-04 14:57:44 +00:00
|
|
|
fsel = gpfsel[2];
|
|
|
|
fsel &= tblDatMsk[2][dat];
|
|
|
|
fsel |= tblDatSet[2][dat];
|
|
|
|
if (fsel != gpfsel[2]) {
|
|
|
|
gpfsel[2] = fsel;
|
|
|
|
gpio[GPIO_FSEL_2] = fsel;
|
|
|
|
}
|
2018-05-03 13:47:57 +00:00
|
|
|
#else
|
|
|
|
gpio[GPIO_CLR_0] = tblDatMsk[dat];
|
|
|
|
gpio[GPIO_SET_0] = tblDatSet[dat];
|
2020-07-04 14:57:44 +00:00
|
|
|
#endif // SIGNAL_CONTROL_MODE
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get data parity signal
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::GetDP()
|
|
|
|
{
|
|
|
|
return GetSignal(PIN_DP);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Receive command handshake
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
int FASTCALL GPIOBUS::CommandHandShake(BYTE *buf)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
BOOL ret;
|
|
|
|
int count;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Only works in TARGET mode
|
2020-07-04 14:57:44 +00:00
|
|
|
if (actmode != TARGET) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// IRQs disabled
|
2020-07-04 14:57:44 +00:00
|
|
|
DisableIRQ();
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get the first command byte
|
2020-07-04 14:57:44 +00:00
|
|
|
i = 0;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Assert REQ signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetSignal(PIN_REQ, ON);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for ACK signal
|
2020-07-04 14:57:44 +00:00
|
|
|
ret = WaitSignal(PIN_ACK, TRUE);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait until the signal line stabilizes
|
2020-07-04 14:57:44 +00:00
|
|
|
SysTimer::SleepNsec(GPIO_DATA_SETTLING);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get data
|
2020-07-04 14:57:44 +00:00
|
|
|
*buf = GetDAT();
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Disable REQ signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetSignal(PIN_REQ, OFF);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Timeout waiting for ACK assertion
|
2020-07-04 14:57:44 +00:00
|
|
|
if (!ret) {
|
|
|
|
goto irq_enable_exit;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for ACK to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
ret = WaitSignal(PIN_ACK, FALSE);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Timeout waiting for ACK to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
if (!ret) {
|
|
|
|
goto irq_enable_exit;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Distinguise whether the command is 6 bytes or 10 bytes
|
2020-07-04 14:57:44 +00:00
|
|
|
if (*buf >= 0x20 && *buf <= 0x7D) {
|
|
|
|
count = 10;
|
|
|
|
} else {
|
|
|
|
count = 6;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Increment buffer pointer
|
2020-07-04 14:57:44 +00:00
|
|
|
buf++;
|
|
|
|
|
|
|
|
for (i = 1; i < count; i++) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Assert REQ signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetSignal(PIN_REQ, ON);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for ACK signal
|
2020-07-04 14:57:44 +00:00
|
|
|
ret = WaitSignal(PIN_ACK, TRUE);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait until the signal line stabilizes
|
2020-07-04 14:57:44 +00:00
|
|
|
SysTimer::SleepNsec(GPIO_DATA_SETTLING);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get data
|
2020-07-04 14:57:44 +00:00
|
|
|
*buf = GetDAT();
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Clear the REQ signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetSignal(PIN_REQ, OFF);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for timeout waiting for ACK assertion
|
2020-07-04 14:57:44 +00:00
|
|
|
if (!ret) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for ACK to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
ret = WaitSignal(PIN_ACK, FALSE);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for timeout waiting for ACK to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
if (!ret) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Advance the buffer pointer to receive the next byte
|
2020-07-04 14:57:44 +00:00
|
|
|
buf++;
|
|
|
|
}
|
|
|
|
|
|
|
|
irq_enable_exit:
|
2020-07-06 03:56:25 +00:00
|
|
|
// IRQs enabled
|
2020-07-04 14:57:44 +00:00
|
|
|
EnableIRQ();
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// returned the number of bytes received
|
2020-07-04 14:57:44 +00:00
|
|
|
return i;
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Data reception handshake
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
int FASTCALL GPIOBUS::ReceiveHandShake(BYTE *buf, int count)
|
|
|
|
{
|
|
|
|
int i;
|
2020-07-04 14:57:44 +00:00
|
|
|
BOOL ret;
|
2018-05-03 13:47:57 +00:00
|
|
|
DWORD phase;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Disable IRQs
|
2020-07-04 14:57:44 +00:00
|
|
|
DisableIRQ();
|
|
|
|
|
|
|
|
if (actmode == TARGET) {
|
|
|
|
for (i = 0; i < count; i++) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Assert the REQ signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetSignal(PIN_REQ, ON);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for ACK
|
2020-07-04 14:57:44 +00:00
|
|
|
ret = WaitSignal(PIN_ACK, TRUE);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait until the signal line stabilizes
|
2020-07-04 14:57:44 +00:00
|
|
|
SysTimer::SleepNsec(GPIO_DATA_SETTLING);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get data
|
2020-07-04 14:57:44 +00:00
|
|
|
*buf = GetDAT();
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Clear the REQ signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetSignal(PIN_REQ, OFF);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for timeout waiting for ACK signal
|
2020-07-04 14:57:44 +00:00
|
|
|
if (!ret) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for ACK to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
ret = WaitSignal(PIN_ACK, FALSE);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for timeout waiting for ACK to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
if (!ret) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Advance the buffer pointer to receive the next byte
|
2020-07-04 14:57:44 +00:00
|
|
|
buf++;
|
|
|
|
}
|
2018-05-03 13:47:57 +00:00
|
|
|
} else {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get phase
|
2020-07-04 14:57:44 +00:00
|
|
|
phase = Aquire() & GPIO_MCI;
|
|
|
|
|
|
|
|
for (i = 0; i < count; i++) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for the REQ signal to be asserted
|
2020-07-04 14:57:44 +00:00
|
|
|
ret = WaitSignal(PIN_REQ, TRUE);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for timeout waiting for REQ signal
|
2020-07-04 14:57:44 +00:00
|
|
|
if (!ret) {
|
|
|
|
break;
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Phase error
|
2020-07-04 14:57:44 +00:00
|
|
|
if ((signals & GPIO_MCI) != phase) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait until the signal line stabilizes
|
2020-07-04 14:57:44 +00:00
|
|
|
SysTimer::SleepNsec(GPIO_DATA_SETTLING);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get data
|
2020-07-04 14:57:44 +00:00
|
|
|
*buf = GetDAT();
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Assert the ACK signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetSignal(PIN_ACK, ON);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for REQ to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
ret = WaitSignal(PIN_REQ, FALSE);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Clear the ACK signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetSignal(PIN_ACK, OFF);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for timeout waiting for REQ to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
if (!ret) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Phase error
|
2020-07-04 14:57:44 +00:00
|
|
|
if ((signals & GPIO_MCI) != phase) {
|
|
|
|
break;
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Advance the buffer pointer to receive the next byte
|
2020-07-04 14:57:44 +00:00
|
|
|
buf++;
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
}
|
2020-07-04 14:57:44 +00:00
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Re-enable IRQ
|
2020-07-04 14:57:44 +00:00
|
|
|
EnableIRQ();
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Return the number of bytes received
|
2020-07-04 14:57:44 +00:00
|
|
|
return i;
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Data transmission handshake
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
2021-04-05 19:17:05 +00:00
|
|
|
int FASTCALL GPIOBUS::SendHandShake(BYTE *buf, int count, int delay_after_bytes)
|
2018-05-03 13:47:57 +00:00
|
|
|
{
|
|
|
|
int i;
|
2020-07-04 14:57:44 +00:00
|
|
|
BOOL ret;
|
2018-05-03 13:47:57 +00:00
|
|
|
DWORD phase;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Disable IRQs
|
2020-07-04 14:57:44 +00:00
|
|
|
DisableIRQ();
|
|
|
|
|
|
|
|
if (actmode == TARGET) {
|
|
|
|
for (i = 0; i < count; i++) {
|
2021-04-05 19:17:05 +00:00
|
|
|
if(i==delay_after_bytes){
|
|
|
|
LOGTRACE("%s DELAYING for 100us after %d bytes", __PRETTY_FUNCTION__, (int)delay_after_bytes);
|
|
|
|
SysTimer::SleepUsec(100);
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set the DATA signals
|
2020-07-04 14:57:44 +00:00
|
|
|
SetDAT(*buf);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for ACK to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
ret = WaitSignal(PIN_ACK, FALSE);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for timeout waiting for ACK to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
if (!ret) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Already waiting for ACK to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Assert the REQ signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetSignal(PIN_REQ, ON);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for ACK
|
2020-07-04 14:57:44 +00:00
|
|
|
ret = WaitSignal(PIN_ACK, TRUE);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Clear REQ signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetSignal(PIN_REQ, OFF);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for timeout waiting for ACK to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
if (!ret) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Advance the data buffer pointer to receive the next byte
|
2020-07-04 14:57:44 +00:00
|
|
|
buf++;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for ACK to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
WaitSignal(PIN_ACK, FALSE);
|
2018-05-03 13:47:57 +00:00
|
|
|
} else {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get Phase
|
2020-07-04 14:57:44 +00:00
|
|
|
phase = Aquire() & GPIO_MCI;
|
|
|
|
|
|
|
|
for (i = 0; i < count; i++) {
|
2021-04-05 19:17:05 +00:00
|
|
|
|
|
|
|
if(i==delay_after_bytes){
|
|
|
|
SysTimer::SleepUsec(100);
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set the DATA signals
|
2020-07-04 14:57:44 +00:00
|
|
|
SetDAT(*buf);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for REQ to be asserted
|
2020-07-04 14:57:44 +00:00
|
|
|
ret = WaitSignal(PIN_REQ, TRUE);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for timeout waiting for REQ to be asserted
|
2020-07-04 14:57:44 +00:00
|
|
|
if (!ret) {
|
|
|
|
break;
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Phase error
|
2020-07-04 14:57:44 +00:00
|
|
|
if ((signals & GPIO_MCI) != phase) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Already waiting for REQ assertion
|
2020-10-19 12:31:06 +00:00
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Assert the ACK signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetSignal(PIN_ACK, ON);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for REQ to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
ret = WaitSignal(PIN_REQ, FALSE);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Clear the ACK signal
|
2020-07-04 14:57:44 +00:00
|
|
|
SetSignal(PIN_ACK, OFF);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for timeout waiting for REQ to clear
|
2020-07-04 14:57:44 +00:00
|
|
|
if (!ret) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Phase error
|
2020-07-04 14:57:44 +00:00
|
|
|
if ((signals & GPIO_MCI) != phase) {
|
|
|
|
break;
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Advance the data buffer pointer to receive the next byte
|
2020-07-04 14:57:44 +00:00
|
|
|
buf++;
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
|
|
|
}
|
2020-07-04 14:57:44 +00:00
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Re-enable IRQ
|
2020-07-04 14:57:44 +00:00
|
|
|
EnableIRQ();
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Return number of transmissions
|
2020-07-04 14:57:44 +00:00
|
|
|
return i;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef USE_SEL_EVENT_ENABLE
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// SEL signal event polling
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
int FASTCALL GPIOBUS::PollSelectEvent()
|
|
|
|
{
|
2020-07-06 03:56:25 +00:00
|
|
|
// clear errno
|
2020-07-04 14:57:44 +00:00
|
|
|
errno = 0;
|
|
|
|
|
|
|
|
#ifdef BAREMETAL
|
2020-07-06 03:56:25 +00:00
|
|
|
// Enable interrupts
|
2020-07-04 14:57:44 +00:00
|
|
|
EnableInterrupts();
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for interrupts
|
2020-07-04 14:57:44 +00:00
|
|
|
WaitForInterrupts();
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Disable interrupts
|
2020-07-04 14:57:44 +00:00
|
|
|
DisableInterrupts();
|
|
|
|
#else
|
|
|
|
struct epoll_event epev;
|
|
|
|
struct gpioevent_data gpev;
|
|
|
|
|
|
|
|
if (epoll_wait(epfd, &epev, 1, -1) <= 0) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2020-10-19 12:31:06 +00:00
|
|
|
(void)read(selevreq.fd, &gpev, sizeof(gpev));
|
2020-07-04 14:57:44 +00:00
|
|
|
#endif // BAREMETAL
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Cancel SEL signal event
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::ClearSelectEvent()
|
|
|
|
{
|
|
|
|
#ifdef BAREMETAL
|
|
|
|
DWORD irq;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Clear event
|
2020-07-04 14:57:44 +00:00
|
|
|
gpio[GPIO_EDS_0] = 1 << PIN_SEL;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Response to GIC
|
2020-07-04 14:57:44 +00:00
|
|
|
if (rpitype == 4) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// IRQ number
|
2020-07-04 14:57:44 +00:00
|
|
|
irq = gicc[GICC_IAR] & 0x3FF;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Interrupt response
|
2020-07-04 14:57:44 +00:00
|
|
|
gicc[GICC_EOIR] = irq;
|
|
|
|
}
|
|
|
|
#endif // BAREMETAL
|
2018-05-03 13:47:57 +00:00
|
|
|
}
|
2020-07-04 14:57:44 +00:00
|
|
|
#endif // USE_SEL_EVENT_ENABLE
|
2018-05-03 13:47:57 +00:00
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Signal table
|
2018-05-03 13:47:57 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
const int GPIOBUS::SignalTable[19] = {
|
|
|
|
PIN_DT0, PIN_DT1, PIN_DT2, PIN_DT3,
|
|
|
|
PIN_DT4, PIN_DT5, PIN_DT6, PIN_DT7, PIN_DP,
|
|
|
|
PIN_SEL,PIN_ATN, PIN_RST, PIN_ACK,
|
|
|
|
PIN_BSY, PIN_MSG, PIN_CD, PIN_IO, PIN_REQ,
|
|
|
|
-1
|
|
|
|
};
|
2020-07-04 14:57:44 +00:00
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Create work table
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::MakeTable(void)
|
|
|
|
{
|
|
|
|
const int pintbl[] = {
|
|
|
|
PIN_DT0, PIN_DT1, PIN_DT2, PIN_DT3, PIN_DT4,
|
|
|
|
PIN_DT5, PIN_DT6, PIN_DT7, PIN_DP
|
|
|
|
};
|
|
|
|
|
|
|
|
int i;
|
|
|
|
int j;
|
|
|
|
BOOL tblParity[256];
|
|
|
|
DWORD bits;
|
|
|
|
DWORD parity;
|
|
|
|
#if SIGNAL_CONTROL_MODE == 0
|
|
|
|
int index;
|
|
|
|
int shift;
|
|
|
|
#else
|
|
|
|
DWORD gpclr;
|
|
|
|
DWORD gpset;
|
|
|
|
#endif
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Create parity table
|
2020-07-04 14:57:44 +00:00
|
|
|
for (i = 0; i < 0x100; i++) {
|
|
|
|
bits = (DWORD)i;
|
|
|
|
parity = 0;
|
|
|
|
for (j = 0; j < 8; j++) {
|
|
|
|
parity ^= bits & 1;
|
|
|
|
bits >>= 1;
|
|
|
|
}
|
|
|
|
parity = ~parity;
|
|
|
|
tblParity[i] = parity & 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if SIGNAL_CONTROL_MODE == 0
|
2020-07-06 03:56:25 +00:00
|
|
|
// Mask and setting data generation
|
2020-07-04 14:57:44 +00:00
|
|
|
memset(tblDatMsk, 0xff, sizeof(tblDatMsk));
|
|
|
|
memset(tblDatSet, 0x00, sizeof(tblDatSet));
|
|
|
|
for (i = 0; i < 0x100; i++) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Bit string for inspection
|
2020-07-04 14:57:44 +00:00
|
|
|
bits = (DWORD)i;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get parity
|
2020-07-04 14:57:44 +00:00
|
|
|
if (tblParity[i]) {
|
|
|
|
bits |= (1 << 8);
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Bit check
|
2020-07-04 14:57:44 +00:00
|
|
|
for (j = 0; j < 9; j++) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Index and shift amount calculation
|
2020-07-04 14:57:44 +00:00
|
|
|
index = pintbl[j] / 10;
|
|
|
|
shift = (pintbl[j] % 10) * 3;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Mask data
|
2020-07-04 14:57:44 +00:00
|
|
|
tblDatMsk[index][i] &= ~(0x7 << shift);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Setting data
|
2020-07-04 14:57:44 +00:00
|
|
|
if (bits & 1) {
|
|
|
|
tblDatSet[index][i] |= (1 << shift);
|
|
|
|
}
|
|
|
|
|
|
|
|
bits >>= 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#else
|
2020-07-06 03:56:25 +00:00
|
|
|
// Mask and setting data generation
|
2020-07-04 14:57:44 +00:00
|
|
|
memset(tblDatMsk, 0x00, sizeof(tblDatMsk));
|
|
|
|
memset(tblDatSet, 0x00, sizeof(tblDatSet));
|
|
|
|
for (i = 0; i < 0x100; i++) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// bit string for inspection
|
2020-07-04 14:57:44 +00:00
|
|
|
bits = (DWORD)i;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// get parity
|
2020-07-04 14:57:44 +00:00
|
|
|
if (tblParity[i]) {
|
|
|
|
bits |= (1 << 8);
|
|
|
|
}
|
|
|
|
|
|
|
|
#if SIGNAL_CONTROL_MODE == 1
|
2020-07-06 03:56:25 +00:00
|
|
|
// Negative logic is inverted
|
2020-07-04 14:57:44 +00:00
|
|
|
bits = ~bits;
|
|
|
|
#endif
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Create GPIO register information
|
2020-07-04 14:57:44 +00:00
|
|
|
gpclr = 0;
|
|
|
|
gpset = 0;
|
|
|
|
for (j = 0; j < 9; j++) {
|
|
|
|
if (bits & 1) {
|
|
|
|
gpset |= (1 << pintbl[j]);
|
|
|
|
} else {
|
|
|
|
gpclr |= (1 << pintbl[j]);
|
|
|
|
}
|
|
|
|
bits >>= 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
tblDatMsk[i] = gpclr;
|
|
|
|
tblDatSet[i] = gpset;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Control signal setting
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetControl(int pin, BOOL ast)
|
|
|
|
{
|
|
|
|
PinSetSignal(pin, ast);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Input/output mode setting
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetMode(int pin, int mode)
|
|
|
|
{
|
|
|
|
int index;
|
|
|
|
int shift;
|
|
|
|
DWORD data;
|
|
|
|
|
|
|
|
#if SIGNAL_CONTROL_MODE == 0
|
|
|
|
if (mode == OUT) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif // SIGNAL_CONTROL_MODE
|
|
|
|
|
|
|
|
index = pin / 10;
|
|
|
|
shift = (pin % 10) * 3;
|
|
|
|
data = gpfsel[index];
|
|
|
|
data &= ~(0x7 << shift);
|
|
|
|
if (mode == OUT) {
|
|
|
|
data |= (1 << shift);
|
|
|
|
}
|
|
|
|
gpio[index] = data;
|
|
|
|
gpfsel[index] = data;
|
|
|
|
}
|
2020-10-19 12:31:06 +00:00
|
|
|
|
2020-07-04 14:57:44 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get input signal value
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::GetSignal(int pin)
|
|
|
|
{
|
|
|
|
return (signals >> pin) & 1;
|
|
|
|
}
|
2020-10-19 12:31:06 +00:00
|
|
|
|
2020-07-04 14:57:44 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set output signal value
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::SetSignal(int pin, BOOL ast)
|
|
|
|
{
|
|
|
|
#if SIGNAL_CONTROL_MODE == 0
|
|
|
|
int index;
|
|
|
|
int shift;
|
|
|
|
DWORD data;
|
|
|
|
|
|
|
|
index = pin / 10;
|
|
|
|
shift = (pin % 10) * 3;
|
|
|
|
data = gpfsel[index];
|
|
|
|
if (ast) {
|
|
|
|
data |= (1 << shift);
|
|
|
|
} else {
|
|
|
|
data &= ~(0x7 << shift);
|
|
|
|
}
|
|
|
|
gpio[index] = data;
|
|
|
|
gpfsel[index] = data;
|
|
|
|
#elif SIGNAL_CONTROL_MODE == 1
|
|
|
|
if (ast) {
|
|
|
|
gpio[GPIO_CLR_0] = 0x1 << pin;
|
|
|
|
} else {
|
|
|
|
gpio[GPIO_SET_0] = 0x1 << pin;
|
|
|
|
}
|
|
|
|
#elif SIGNAL_CONTROL_MODE == 2
|
|
|
|
if (ast) {
|
|
|
|
gpio[GPIO_SET_0] = 0x1 << pin;
|
|
|
|
} else {
|
|
|
|
gpio[GPIO_CLR_0] = 0x1 << pin;
|
|
|
|
}
|
|
|
|
#endif // SIGNAL_CONTROL_MODE
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Wait for signal change
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BOOL FASTCALL GPIOBUS::WaitSignal(int pin, BOOL ast)
|
|
|
|
{
|
|
|
|
DWORD now;
|
|
|
|
DWORD timeout;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get current time
|
2020-07-04 14:57:44 +00:00
|
|
|
now = SysTimer::GetTimerLow();
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Calculate timeout (3000ms)
|
2020-07-04 14:57:44 +00:00
|
|
|
timeout = 3000 * 1000;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// end immediately if the signal has changed
|
2020-07-04 14:57:44 +00:00
|
|
|
do {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Immediately upon receiving a reset
|
2020-07-04 14:57:44 +00:00
|
|
|
Aquire();
|
|
|
|
if (GetRST()) {
|
|
|
|
return FALSE;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for the signal edge
|
|
|
|
if (((signals >> pin) ^ ~ast) & 1) {
|
2020-07-04 14:57:44 +00:00
|
|
|
return TRUE;
|
|
|
|
}
|
|
|
|
} while ((SysTimer::GetTimerLow() - now) < timeout);
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// We timed out waiting for the signal
|
2020-07-04 14:57:44 +00:00
|
|
|
return FALSE;
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Disable IRQ
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::DisableIRQ()
|
|
|
|
{
|
|
|
|
#ifndef BAREMETAL
|
|
|
|
if (rpitype == 4) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// RPI4 is disabled by GICC
|
2020-07-04 14:57:44 +00:00
|
|
|
giccpmr = gicc[GICC_PMR];
|
|
|
|
gicc[GICC_PMR] = 0;
|
|
|
|
} else if (rpitype == 2) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// RPI2,3 disable core timer IRQ
|
2020-07-04 14:57:44 +00:00
|
|
|
tintcore = sched_getcpu() + QA7_CORE0_TINTC;
|
|
|
|
tintctl = qa7regs[tintcore];
|
|
|
|
qa7regs[tintcore] = 0;
|
|
|
|
} else {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Stop system timer interrupt with interrupt controller
|
2020-07-04 14:57:44 +00:00
|
|
|
irptenb = irpctl[IRPT_ENB_IRQ_1];
|
|
|
|
irpctl[IRPT_DIS_IRQ_1] = irptenb & 0xf;
|
|
|
|
}
|
|
|
|
#endif // BAREMETAL
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Enable IRQ
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::EnableIRQ()
|
|
|
|
{
|
|
|
|
#ifndef BAREMETAL
|
|
|
|
if (rpitype == 4) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// RPI4 enables interrupts via the GICC
|
2020-07-04 14:57:44 +00:00
|
|
|
gicc[GICC_PMR] = giccpmr;
|
|
|
|
} else if (rpitype == 2) {
|
2020-07-06 03:56:25 +00:00
|
|
|
// RPI2,3 re-enable core timer IRQ
|
2020-07-04 14:57:44 +00:00
|
|
|
qa7regs[tintcore] = tintctl;
|
|
|
|
} else {
|
2020-07-06 03:56:25 +00:00
|
|
|
// Restart the system timer interrupt with the interrupt controller
|
2020-07-04 14:57:44 +00:00
|
|
|
irpctl[IRPT_ENB_IRQ_1] = irptenb & 0xf;
|
|
|
|
}
|
|
|
|
#endif // BAREMETAL
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Pin direction setting (input/output)
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::PinConfig(int pin, int mode)
|
|
|
|
{
|
|
|
|
int index;
|
|
|
|
DWORD mask;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for invalid pin
|
2020-07-04 14:57:44 +00:00
|
|
|
if (pin < 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
index = pin / 10;
|
|
|
|
mask = ~(0x7 << ((pin % 10) * 3));
|
|
|
|
gpio[index] = (gpio[index] & mask) | ((mode & 0x7) << ((pin % 10) * 3));
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Pin pull-up/pull-down setting
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::PullConfig(int pin, int mode)
|
|
|
|
{
|
|
|
|
int shift;
|
|
|
|
DWORD bits;
|
|
|
|
DWORD pull;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for invalid pin
|
2020-07-04 14:57:44 +00:00
|
|
|
if (pin < 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (rpitype == 4) {
|
|
|
|
switch (mode) {
|
|
|
|
case GPIO_PULLNONE:
|
|
|
|
pull = 0;
|
|
|
|
break;
|
|
|
|
case GPIO_PULLUP:
|
|
|
|
pull = 1;
|
|
|
|
break;
|
|
|
|
case GPIO_PULLDOWN:
|
|
|
|
pull = 2;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
pin &= 0x1f;
|
|
|
|
shift = (pin & 0xf) << 1;
|
|
|
|
bits = gpio[GPIO_PUPPDN0 + (pin >> 4)];
|
|
|
|
bits &= ~(3 << shift);
|
|
|
|
bits |= (pull << shift);
|
|
|
|
gpio[GPIO_PUPPDN0 + (pin >> 4)] = bits;
|
|
|
|
} else {
|
|
|
|
pin &= 0x1f;
|
|
|
|
gpio[GPIO_PUD] = mode & 0x3;
|
|
|
|
SysTimer::SleepUsec(2);
|
|
|
|
gpio[GPIO_CLK_0] = 0x1 << pin;
|
|
|
|
SysTimer::SleepUsec(2);
|
|
|
|
gpio[GPIO_PUD] = 0;
|
|
|
|
gpio[GPIO_CLK_0] = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set output pin
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::PinSetSignal(int pin, BOOL ast)
|
|
|
|
{
|
2020-07-06 03:56:25 +00:00
|
|
|
// Check for invalid pin
|
2020-07-04 14:57:44 +00:00
|
|
|
if (pin < 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ast) {
|
|
|
|
gpio[GPIO_SET_0] = 0x1 << pin;
|
|
|
|
} else {
|
|
|
|
gpio[GPIO_CLR_0] = 0x1 << pin;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Set the signal drive strength
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL GPIOBUS::DrvConfig(DWORD drive)
|
|
|
|
{
|
|
|
|
DWORD data;
|
|
|
|
|
|
|
|
data = pads[PAD_0_27];
|
|
|
|
pads[PAD_0_27] = (0xFFFFFFF8 & data) | drive | 0x5a000000;
|
|
|
|
}
|
|
|
|
|
2020-10-19 12:31:06 +00:00
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
|
|
|
// Generic Phase Acquisition (Doesn't read GPIO)
|
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
BUS::phase_t FASTCALL GPIOBUS::GetPhaseRaw(DWORD raw_data)
|
|
|
|
{
|
|
|
|
DWORD mci;
|
|
|
|
|
|
|
|
// Selection Phase
|
|
|
|
if (GetPinRaw(raw_data, PIN_SEL))
|
|
|
|
{
|
|
|
|
if(GetPinRaw(raw_data, PIN_IO)){
|
|
|
|
return BUS::reselection;
|
|
|
|
}else{
|
|
|
|
return BUS::selection;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Bus busy phase
|
|
|
|
if (!GetPinRaw(raw_data, PIN_BSY)) {
|
|
|
|
return BUS::busfree;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Get target phase from bus signal line
|
|
|
|
mci = GetPinRaw(raw_data, PIN_MSG) ? 0x04 : 0x00;
|
|
|
|
mci |= GetPinRaw(raw_data, PIN_CD) ? 0x02 : 0x00;
|
|
|
|
mci |= GetPinRaw(raw_data, PIN_IO) ? 0x01 : 0x00;
|
|
|
|
return GetPhase(mci);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2020-07-04 14:57:44 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// System timer address
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
volatile DWORD* SysTimer::systaddr;
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// ARM timer address
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
volatile DWORD* SysTimer::armtaddr;
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Core frequency
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
volatile DWORD SysTimer::corefreq;
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Initialize the system timer
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL SysTimer::Init(DWORD *syst, DWORD *armt)
|
|
|
|
{
|
|
|
|
#ifndef BAREMETAL
|
|
|
|
// RPI Mailbox property interface
|
|
|
|
// Get max clock rate
|
|
|
|
// Tag: 0x00030004
|
|
|
|
//
|
|
|
|
// Request: Length: 4
|
|
|
|
// Value: u32: clock id
|
|
|
|
// Response: Length: 8
|
|
|
|
// Value: u32: clock id, u32: rate (in Hz)
|
|
|
|
//
|
|
|
|
// Clock id
|
|
|
|
// 0x000000004: CORE
|
|
|
|
DWORD maxclock[32] = { 32, 0, 0x00030004, 8, 0, 4, 0, 0 };
|
|
|
|
int fd;
|
|
|
|
#endif // BAREMETAL
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Save the base address
|
2020-07-04 14:57:44 +00:00
|
|
|
systaddr = syst;
|
|
|
|
armtaddr = armt;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Change the ARM timer to free run mode
|
2020-07-04 14:57:44 +00:00
|
|
|
armtaddr[ARMT_CTRL] = 0x00000282;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get the core frequency
|
2020-07-04 14:57:44 +00:00
|
|
|
#ifdef BAREMETAL
|
|
|
|
corefreq = RPi_Core_Freq / 1000000;
|
|
|
|
#else
|
|
|
|
corefreq = 0;
|
|
|
|
fd = open("/dev/vcio", O_RDONLY);
|
|
|
|
if (fd >= 0) {
|
|
|
|
ioctl(fd, _IOWR(100, 0, char *), maxclock);
|
|
|
|
corefreq = maxclock[6] / 1000000;
|
|
|
|
}
|
|
|
|
close(fd);
|
|
|
|
#endif // BAREMETAL
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get system timer low byte
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
DWORD FASTCALL SysTimer::GetTimerLow() {
|
|
|
|
return systaddr[SYST_CLO];
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Get system timer high byte
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
DWORD FASTCALL SysTimer::GetTimerHigh() {
|
|
|
|
return systaddr[SYST_CHI];
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Sleep in nanoseconds
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL SysTimer::SleepNsec(DWORD nsec)
|
|
|
|
{
|
|
|
|
DWORD diff;
|
|
|
|
DWORD start;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// If time is 0, don't do anything
|
2020-07-04 14:57:44 +00:00
|
|
|
if (nsec == 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Calculate the timer difference
|
2020-07-04 14:57:44 +00:00
|
|
|
diff = corefreq * nsec / 1000;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Return if the difference in time is too small
|
2020-07-04 14:57:44 +00:00
|
|
|
if (diff == 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Start
|
2020-07-04 14:57:44 +00:00
|
|
|
start = armtaddr[ARMT_FREERUN];
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// Loop until timer has elapsed
|
2020-07-04 14:57:44 +00:00
|
|
|
while ((armtaddr[ARMT_FREERUN] - start) < diff);
|
|
|
|
}
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
//
|
2020-07-06 03:56:25 +00:00
|
|
|
// Sleep in microseconds
|
2020-07-04 14:57:44 +00:00
|
|
|
//
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
void FASTCALL SysTimer::SleepUsec(DWORD usec)
|
|
|
|
{
|
|
|
|
DWORD now;
|
|
|
|
|
2020-07-06 03:56:25 +00:00
|
|
|
// If time is 0, don't do anything
|
2020-07-04 14:57:44 +00:00
|
|
|
if (usec == 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
now = GetTimerLow();
|
|
|
|
while ((GetTimerLow() - now) < usec);
|
|
|
|
}
|