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VIA snooping

This commit is contained in:
techav-homebrew 2021-10-07 21:35:29 -05:00
parent 3669e3a66b
commit 97b0b72794
1 changed files with 17 additions and 6 deletions
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23
se-xga.sv
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@ -183,14 +183,15 @@ end
wire [14:0] writeAddr;
reg vidBufSel;
wire nvramCE0cpu, nvramCE1cpu, nvramWEcpu;
reg [1:0] snoopCycleState;
reg [2:0] snoopCycleState;
// define state machine states
parameter
S0 = 2'b00, // idle
S1 = 2'b01, // write high-order byte
S2 = 2'b11, // write low-order byte
S3 = 2'b10; // wait for CPU cycle end
S0 = 2'b000, // idle
S1 = 2'b001, // write high-order byte
S2 = 2'b011, // write low-order byte
S3 = 2'b010, // wait for CPU cycle end
S4 = 2'b110; // VIA write cycle
always @(negedge pixClk or negedge nReset) begin
if(!nReset) begin snoopCycleState <= S0;
@ -206,6 +207,9 @@ always @(negedge pixClk or negedge nReset) begin
// Otherwise, we'll stay here on S0
if(cpuBufAddr && tock && !ncpuUDS && vidSeq != 7) snoopCycleState <= S1;
else if(cpuBufAddr && tick && !ncpuLDS && vidSeq != 1) snoopCycleState <= S2;
else if(!ncpuAS && !ncpuUDS && !cpuRnW
&& cpuAddr[22:18] == 5'h1D
&& cpuAddr[11:7] == 5'h1F) snoopCycleState <= S4;
else snoopCycleState <= S0;
end
S1 : begin
@ -225,6 +229,13 @@ always @(negedge pixClk or negedge nReset) begin
if(!ncpuLDS || !ncpuUDS) snoopCycleState <= S3;
else snoopCycleState <= S0;
end
S4 : begin
// CPU is addressing VIA Port A. Bit 6 will select the active
// screen buffer. 1=Main, 0=Alt
// After saving the selection, move to S3 to wait for cycle end
vidBufSel <= !cpuData[14];
snoopCycleState <= S3
end
default: begin
// shouldn't ever be here
snoopCycleState <= S0;
@ -245,7 +256,7 @@ always_comb begin
else if(snoopCycleState == S2) vramData <= cpuData[7:0];
else vramData <= 8'hZ;
writeAddr[13:0] <= cpuAddr[14:1];
writeAddr[13:0] <= cpuAddr[14:1] - 14'h1380;
writeAddr[14] <= cpuBufSel;
end