mirror of
https://github.com/garrettsworkshop/Warp-SE.git
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20 lines
1.2 KiB
Plaintext
20 lines
1.2 KiB
Plaintext
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Running: C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\fuse.exe -intstyle ise -incremental -lib uni9000_ver -lib aim_ver -lib cpld_ver -lib xilinxcorelib_ver -o C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/t_cs_isim_beh.exe -prj C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/t_cs_beh.prj work.t_cs work.glbl
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ISim P.20131013 (signature 0x7708f090)
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Number of CPUs detected in this system: 8
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Turning on mult-threading, number of parallel sub-compilation jobs: 16
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Determining compilation order of HDL files
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Analyzing Verilog file "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/../CS.v" into library work
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Analyzing Verilog file "C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/../test/t_cs.v" into library work
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Analyzing Verilog file "C:/Xilinx/14.7/ISE_DS/ISE//verilog/src/glbl.v" into library work
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Starting static elaboration
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Completed static elaboration
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Compiling module CS
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Compiling module t_cs
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Compiling module glbl
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Time Resolution for simulation is 1ps.
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Waiting for 1 sub-compilation(s) to finish...
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Compiled 3 Verilog Units
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Built simulation executable C:/Users/zanek/Documents/GitHub/SE-030/cpld/XC95144XL/t_cs_isim_beh.exe
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Fuse Memory Usage: 29568 KB
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Fuse CPU Usage: 280 ms
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