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Actually assign PDS R/W signal to I/O pin

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Zane Kaminski 2024-10-08 22:48:55 -04:00
parent 48633d0847
commit 209685c956
1 changed files with 1 additions and 1 deletions
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cpld/WarpSE.v
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@ -169,7 +169,7 @@ module WarpSE(
assign nAoutOE = !AoutOE; assign nAoutOE = !AoutOE;
wire nAS_IOBout, RnW_IOBout, nLDS_IOBout, nUDS_IOBout, nVMA_IOBout; wire nAS_IOBout, RnW_IOBout, nLDS_IOBout, nUDS_IOBout, nVMA_IOBout;
assign nAS_IOB = AoutOE ? nAS_IOBout : 1'bZ; assign nAS_IOB = AoutOE ? nAS_IOBout : 1'bZ;
//assign RnW_IOB = AoutOE ? RnW_IOBout : 1'bZ; assign RnW_IOB = AoutOE ? RnW_IOBout : 1'bZ;
assign nLDS_IOB = AoutOE ? nLDS_IOBout : 1'bZ; assign nLDS_IOB = AoutOE ? nLDS_IOBout : 1'bZ;
assign nUDS_IOB = AoutOE ? nUDS_IOBout : 1'bZ; assign nUDS_IOB = AoutOE ? nUDS_IOBout : 1'bZ;
assign nVMA_IOB = AoutOE ? nVMA_IOBout : 1'bZ; assign nVMA_IOB = AoutOE ? nVMA_IOBout : 1'bZ;