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6678c4b2ab
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11 Commits

Author SHA1 Message Date
Andrew Makousky
6678c4b2ab Commit BBU work-in-progress. 
For comparative simulation, I'm also assembling the logic of the earlier
Macintosh 128K, and possibly also Macintosh Plus, in Verilog, and
planning on doing MLB board-level simulations too.
 2020-11-25 01:05:48 -06:00
Andrew Makousky
62d2e920e7 Commit work-in-progress. 
Much better BBU pinout chart, lots of notes learned from Guide to the
Macintosh family hardware.
 2020-11-18 10:21:05 -06:00
Andrew Makousky
757acda304 Better BBU README documentation. 2020-11-15 22:03:08 -06:00
Andrew Makousky
58759b51b8 BBU work-in-progress, fix a few documentation issues. 2020-11-15 20:36:44 -06:00
Andrew Makousky
f9200e43ac Commit work-in-progress of BBU FPGA in Verilog. 2020-10-25 09:00:40 -05:00
Andrew Makousky
389122f2aa Fix some Mac SE schematic redraw errors, more detailed BBU notes. 2020-10-18 14:47:39 -05:00
Andrew Makousky
cbf688bd19 Better info on BBU functions. 2020-10-18 12:15:14 -05:00
Andrew Makousky
4b8dad3033 Note reserved status of "*EAREN" signal. 2020-08-10 14:33:54 -05:00
Andrew Makousky
6ca3b92810 Document "*EXT.DTK" signal properly. 
PDS slot pinouts have now been verified, remove TODO note.
 2020-08-08 19:05:41 -05:00
Andrew Makousky
7d7a495cae Comments on BBU functions and signal discipline. 2020-08-07 04:48:07 -05:00
Andrew Makousky
4ce5af75c2 Initial commit 2020-08-06 18:06:49 -05:00