added PCB Front Panel
This commit is contained in:
demik
parent
f20c6e0601
commit
e77c45526e
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@ -1,3 +1,9 @@
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# OS X
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.DS_Store
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.AppleDouble
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.LSOverride
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Icon
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# tmp zip files
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*.zip
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@ -0,0 +1,425 @@
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(kicad_pcb (version 20171130) (host pcbnew "(5.1.12-1-10_14)")
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||||
|
||||
(general
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||||
(thickness 1.6)
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||||
(drawings 17)
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||||
(tracks 5)
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||||
(zones 0)
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(modules 5)
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||||
(nets 2)
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)
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||||
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(page A4)
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(title_block
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(date 2022-03-31)
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)
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||||
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||||
(layers
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(0 F.Cu signal)
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||||
(31 B.Cu signal)
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||||
(36 B.SilkS user)
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||||
(37 F.SilkS user)
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||||
(38 B.Mask user)
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||||
(39 F.Mask user)
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||||
(40 Dwgs.User user)
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||||
(41 Cmts.User user)
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||||
(44 Edge.Cuts user)
|
||||
(45 Margin user)
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||||
(46 B.CrtYd user)
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||||
(47 F.CrtYd user)
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||||
(48 B.Fab user)
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||||
(49 F.Fab user)
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||||
)
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||||
|
||||
(setup
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||||
(last_trace_width 0.25)
|
||||
(trace_clearance 0.2)
|
||||
(zone_clearance 0.508)
|
||||
(zone_45_only no)
|
||||
(trace_min 0.2)
|
||||
(via_size 0.8)
|
||||
(via_drill 0.4)
|
||||
(via_min_size 0.4)
|
||||
(via_min_drill 0.3)
|
||||
(uvia_size 0.3)
|
||||
(uvia_drill 0.1)
|
||||
(uvias_allowed no)
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||||
(uvia_min_size 0.2)
|
||||
(uvia_min_drill 0.1)
|
||||
(edge_width 0.05)
|
||||
(segment_width 0.2)
|
||||
(pcb_text_width 0.3)
|
||||
(pcb_text_size 1.5 1.5)
|
||||
(mod_edge_width 0.12)
|
||||
(mod_text_size 1 1)
|
||||
(mod_text_width 0.15)
|
||||
(pad_size 1.5 1.5)
|
||||
(pad_drill 0)
|
||||
(pad_to_mask_clearance 0)
|
||||
(aux_axis_origin 0 0)
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||||
(visible_elements FFFFFF7F)
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||||
(pcbplotparams
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||||
(layerselection 0x010f0_ffffffff)
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||||
(usegerberextensions false)
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||||
(usegerberattributes true)
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||||
(usegerberadvancedattributes true)
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||||
(creategerberjobfile true)
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||||
(excludeedgelayer true)
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||||
(linewidth 0.100000)
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||||
(plotframeref false)
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||||
(viasonmask false)
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||||
(mode 1)
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||||
(useauxorigin false)
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||||
(hpglpennumber 1)
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||||
(hpglpenspeed 20)
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||||
(hpglpendiameter 15.000000)
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||||
(psnegative false)
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||||
(psa4output false)
|
||||
(plotreference true)
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||||
(plotvalue true)
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||||
(plotinvisibletext false)
|
||||
(padsonsilk false)
|
||||
(subtractmaskfromsilk false)
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||||
(outputformat 1)
|
||||
(mirror false)
|
||||
(drillshape 0)
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||||
(scaleselection 1)
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||||
(outputdirectory ""))
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||||
)
|
||||
|
||||
(net 0 "")
|
||||
(net 1 Earth)
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||||
|
||||
(net_class Default "Ceci est la Netclass par défaut."
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||||
(clearance 0.2)
|
||||
(trace_width 0.25)
|
||||
(via_dia 0.8)
|
||||
(via_drill 0.4)
|
||||
(uvia_dia 0.3)
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||||
(uvia_drill 0.1)
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||||
(add_net Earth)
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||||
)
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||||
|
||||
(module TestPoint:TestPoint_Pad_1.5x1.5mm (layer B.Cu) (tedit 5A0F774F) (tstamp 6245F8D7)
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(at 64 51)
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(descr "SMD rectangular pad as test Point, square 1.5mm side length")
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||||
(tags "test point SMD pad rectangle square")
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||||
(path /6245FB73)
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(attr virtual)
|
||||
(fp_text reference TP2 (at 0 1.648) (layer B.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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||||
)
|
||||
(fp_text value TestPoint (at 0 -1.75) (layer B.Fab)
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||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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||||
)
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||||
(fp_line (start 1.25 -1.25) (end -1.25 -1.25) (layer B.CrtYd) (width 0.05))
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||||
(fp_line (start 1.25 -1.25) (end 1.25 1.25) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.25 1.25) (end -1.25 -1.25) (layer B.CrtYd) (width 0.05))
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||||
(fp_line (start -1.25 1.25) (end 1.25 1.25) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -0.95 -0.95) (end -0.95 0.95) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start 0.95 -0.95) (end -0.95 -0.95) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start 0.95 0.95) (end 0.95 -0.95) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -0.95 0.95) (end 0.95 0.95) (layer B.SilkS) (width 0.12))
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||||
(fp_text user %R (at 0 1.65) (layer B.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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||||
)
|
||||
(pad 1 smd rect (at 0 0) (size 1.5 1.5) (layers B.Cu B.Mask)
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||||
(net 1 Earth))
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||||
)
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|
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(module TestPoint:TestPoint_Pad_1.5x1.5mm (layer B.Cu) (tedit 5A0F774F) (tstamp 6245F8C9)
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(at 64 56)
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(descr "SMD rectangular pad as test Point, square 1.5mm side length")
|
||||
(tags "test point SMD pad rectangle square")
|
||||
(path /6246096F)
|
||||
(attr virtual)
|
||||
(fp_text reference TP1 (at 0 1.648) (layer B.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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||||
)
|
||||
(fp_text value TestPoint (at 0 -1.75) (layer B.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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||||
)
|
||||
(fp_line (start 1.25 -1.25) (end -1.25 -1.25) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start 1.25 -1.25) (end 1.25 1.25) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.25 1.25) (end -1.25 -1.25) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.25 1.25) (end 1.25 1.25) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -0.95 -0.95) (end -0.95 0.95) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start 0.95 -0.95) (end -0.95 -0.95) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start 0.95 0.95) (end 0.95 -0.95) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -0.95 0.95) (end 0.95 0.95) (layer B.SilkS) (width 0.12))
|
||||
(fp_text user %R (at 0 1.65) (layer B.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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||||
)
|
||||
(pad 1 smd rect (at 0 0) (size 1.5 1.5) (layers B.Cu B.Mask)
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||||
(net 1 Earth))
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||||
)
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||||
|
||||
(module Logo:logo (layer F.Cu) (tedit 0) (tstamp 6249755C)
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||||
(at 80.3 46.6)
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||||
(fp_text reference G*** (at 0 0) (layer F.SilkS) hide
|
||||
(effects (font (size 1.524 1.524) (thickness 0.3)))
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||||
)
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||||
(fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide
|
||||
(effects (font (size 1.524 1.524) (thickness 0.3)))
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)
|
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(fp_poly (pts (xy 5.2705 1.0795) (xy 5.2705 3.6195) (xy 4.953 3.6195) (xy 4.953 3.937)
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||||
(xy 4.0005 0.4445) (xy 4.0005 0.762) (xy 4.953 0.762) (xy 4.953 1.0795)
|
||||
(xy 5.2705 1.0795)) (layer F.SilkS) (width 0.01))
|
||||
(fp_poly (pts (xy -2.9845 2.9845) (xy -3.6195 2.9845) (xy -3.6195 2.667) (xy -2.9845 2.667)
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(xy -2.9845 2.9845)) (layer F.SilkS) (width 0.01))
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(fp_poly (pts (xy 1.778 1.0795) (xy 0.8255 1.0795) (xy 0.8255 0.762) (xy 0.508 0.762)
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(fp_poly (pts (xy 0.8255 -1.4605) (xy 0.508 -1.4605) (xy 0.508 0.4445) (xy 0.1905 0.4445)
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|
||||
(xy 0.8255 -1.4605)) (layer F.SilkS) (width 0.01))
|
||||
)
|
||||
|
||||
(module MountingHole:MountingHole_5mm (layer F.Cu) (tedit 56D1B4CB) (tstamp 624647FE)
|
||||
(at 55.6 55.2)
|
||||
(descr "Mounting Hole 5mm, no annular")
|
||||
(tags "mounting hole 5mm no annular")
|
||||
(path /6245F1E7)
|
||||
(attr virtual)
|
||||
(fp_text reference H2 (at 0 -6) (layer F.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value "Activity LED" (at 0 6) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_circle (center 0 0) (end 5 0) (layer Cmts.User) (width 0.15))
|
||||
(fp_circle (center 0 0) (end 5.25 0) (layer F.CrtYd) (width 0.05))
|
||||
(fp_text user %R (at 0.3 0) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(pad 1 np_thru_hole circle (at 0 0) (size 5 5) (drill 5) (layers *.Cu *.Mask))
|
||||
)
|
||||
|
||||
(module MountingHole:MountingHole_5mm (layer F.Cu) (tedit 56D1B4CB) (tstamp 62464924)
|
||||
(at 45.8 55.2)
|
||||
(descr "Mounting Hole 5mm, no annular")
|
||||
(tags "mounting hole 5mm no annular")
|
||||
(path /6245E9E3)
|
||||
(attr virtual)
|
||||
(fp_text reference H1 (at 0 -6) (layer F.SilkS) hide
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value "Power LED" (at 0 6) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_circle (center 0 0) (end 5 0) (layer Cmts.User) (width 0.15))
|
||||
(fp_circle (center 0 0) (end 5.25 0) (layer F.CrtYd) (width 0.05))
|
||||
(fp_text user %R (at 0.3 0) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(pad 1 np_thru_hole circle (at 0 0) (size 5 5) (drill 5) (layers *.Cu *.Mask))
|
||||
)
|
||||
|
||||
(gr_text JLCJLCJLCJLC (at 80.4 60.2) (layer B.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
||||
)
|
||||
(gr_text HD20 (at 51 46.4) (layer F.Cu) (tstamp 6249749B)
|
||||
(effects (font (size 4 4) (thickness 0.6)))
|
||||
)
|
||||
(gr_text ACT (at 55.6 60) (layer F.SilkS) (tstamp 624649DE)
|
||||
(effects (font (size 1 1) (thickness 0.2)))
|
||||
)
|
||||
(gr_text PWR (at 45.8 60) (layer F.SilkS) (tstamp 624649D9)
|
||||
(effects (font (size 1 1) (thickness 0.2)))
|
||||
)
|
||||
(gr_text SD (at 80.5 60) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.2)))
|
||||
)
|
||||
(gr_arc (start 92.5 56) (end 92.5 58) (angle -180) (layer Edge.Cuts) (width 0.05) (tstamp 6245EB58))
|
||||
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|
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(gr_line (start 68.5 54) (end 92.5 54) (layer Edge.Cuts) (width 0.05) (tstamp 6245EB55))
|
||||
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|
||||
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|
||||
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|
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|
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|
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(gr_arc (start 40 60.8) (end 38 60.8) (angle -90) (layer Edge.Cuts) (width 0.05) (tstamp 6245E826))
|
||||
(gr_arc (start 96 42) (end 98 42) (angle -90) (layer Edge.Cuts) (width 0.05) (tstamp 6245E818))
|
||||
(gr_arc (start 40 42) (end 40 40) (angle -90) (layer Edge.Cuts) (width 0.05))
|
||||
|
||||
(segment (start 64 56) (end 64 51) (width 0.25) (layer B.Cu) (net 1))
|
||||
(segment (start 64 51) (end 94 51) (width 0.25) (layer B.Cu) (net 1))
|
||||
(segment (start 94 51) (end 96 53) (width 0.25) (layer B.Cu) (net 1))
|
||||
(via (at 96 56) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 1))
|
||||
(segment (start 96 53) (end 96 56) (width 0.25) (layer B.Cu) (net 1))
|
||||
|
||||
(zone (net 1) (net_name Earth) (layer B.Cu) (tstamp 0) (hatch edge 0.508)
|
||||
(connect_pads (clearance 0.508))
|
||||
(min_thickness 0.254)
|
||||
(fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
|
||||
(polygon
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(pts
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ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
ViaDiameter1=0.8
|
||||
ViaDrill1=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0
|
||||
SolderMaskMinWidth=0
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=0
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=0
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=0
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=0
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
|
|
@ -0,0 +1,94 @@
|
|||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title ""
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp ""
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
||||
L Connector:TestPoint TP1
|
||||
U 1 1 6246096F
|
||||
P 6000 5000
|
||||
F 0 "TP1" H 6058 5118 50 0000 L CNN
|
||||
F 1 "TestPoint" H 6058 5027 50 0000 L CNN
|
||||
F 2 "TestPoint:TestPoint_Pad_1.5x1.5mm" H 6200 5000 50 0001 C CNN
|
||||
F 3 "~" H 6200 5000 50 0001 C CNN
|
||||
1 6000 5000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
6000 5000 6000 5250
|
||||
$Comp
|
||||
L Mechanical:MountingHole H2
|
||||
U 1 1 6245F1E7
|
||||
P 3500 5500
|
||||
F 0 "H2" H 3600 5546 50 0000 L CNN
|
||||
F 1 "Activity LED" H 3600 5455 50 0000 L CNN
|
||||
F 2 "MountingHole:MountingHole_5mm" H 3500 5500 50 0001 C CNN
|
||||
F 3 "~" H 3500 5500 50 0001 C CNN
|
||||
1 3500 5500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Mechanical:MountingHole H1
|
||||
U 1 1 6245E9E3
|
||||
P 2500 5500
|
||||
F 0 "H1" H 2600 5546 50 0000 L CNN
|
||||
F 1 "Power LED" H 2600 5455 50 0000 L CNN
|
||||
F 2 "MountingHole:MountingHole_5mm" H 2500 5500 50 0001 C CNN
|
||||
F 3 "~" H 2500 5500 50 0001 C CNN
|
||||
1 2500 5500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:PWR_FLAG #FLG0101
|
||||
U 1 1 6245F89A
|
||||
P 5500 5000
|
||||
F 0 "#FLG0101" H 5500 5075 50 0001 C CNN
|
||||
F 1 "PWR_FLAG" H 5500 5173 50 0000 C CNN
|
||||
F 2 "" H 5500 5000 50 0001 C CNN
|
||||
F 3 "~" H 5500 5000 50 0001 C CNN
|
||||
1 5500 5000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
5500 5000 5500 5250
|
||||
Wire Wire Line
|
||||
5500 5250 6000 5250
|
||||
Connection ~ 6000 5250
|
||||
Wire Wire Line
|
||||
6000 5250 6000 5500
|
||||
$Comp
|
||||
L Connector:TestPoint TP2
|
||||
U 1 1 6245FB73
|
||||
P 6000 4500
|
||||
F 0 "TP2" H 6058 4618 50 0000 L CNN
|
||||
F 1 "TestPoint" H 6058 4527 50 0000 L CNN
|
||||
F 2 "TestPoint:TestPoint_Pad_1.5x1.5mm" H 6200 4500 50 0001 C CNN
|
||||
F 3 "~" H 6200 4500 50 0001 C CNN
|
||||
1 6000 4500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
6000 4500 6000 5000
|
||||
Connection ~ 6000 5000
|
||||
$Comp
|
||||
L power:Earth #PWR0101
|
||||
U 1 1 62460A5C
|
||||
P 6000 5500
|
||||
F 0 "#PWR0101" H 6000 5250 50 0001 C CNN
|
||||
F 1 "Earth" H 6000 5350 50 0001 C CNN
|
||||
F 2 "" H 6000 5500 50 0001 C CNN
|
||||
F 3 "~" H 6000 5500 50 0001 C CNN
|
||||
1 6000 5500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$EndSCHEMATC
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
(module LOGO (layer F.Cu)
|
||||
(at 0 0)
|
||||
(fp_text reference "G***" (at 0 0) (layer F.SilkS) hide
|
||||
(effects (font (thickness 0.3)))
|
||||
)
|
||||
(fp_text value "LOGO" (at 0.75 0) (layer F.SilkS) hide
|
||||
(effects (font (thickness 0.3)))
|
||||
)
|
||||
(fp_poly (pts (xy 5.270500 1.079500) (xy 5.270500 3.619500) (xy 4.953000 3.619500) (xy 4.953000 3.937000) (xy -4.572000 3.937000) (xy -4.572000 3.619500) (xy -4.889500 3.619500) (xy -4.889500 1.079500)
|
||||
(xy -4.572000 1.079500) (xy -4.572000 3.619500) (xy 4.953000 3.619500) (xy 4.953000 1.079500) (xy 4.000500 1.079500) (xy 4.000500 1.397000) (xy 3.683000 1.397000) (xy 3.683000 1.714500)
|
||||
(xy 3.365500 1.714500) (xy 3.365500 2.032000) (xy 2.730500 2.032000) (xy 2.730500 2.349500) (xy 0.190500 2.349500) (xy 0.190500 2.032000) (xy -0.444500 2.032000) (xy -0.444500 1.714500)
|
||||
(xy -0.762000 1.714500) (xy -0.762000 1.079500) (xy -4.572000 1.079500) (xy -4.572000 0.762000) (xy -1.079500 0.762000) (xy -1.079500 -0.825500) (xy -1.397000 -0.825500) (xy -1.397000 -1.143000)
|
||||
(xy -1.714500 -1.143000) (xy -1.714500 -1.778000) (xy -1.397000 -1.778000) (xy -1.397000 -1.460500) (xy -1.079500 -1.460500) (xy -1.079500 -1.778000) (xy -1.397000 -1.778000) (xy -1.714500 -1.778000)
|
||||
(xy -1.714500 -2.095500) (xy -1.397000 -2.095500) (xy -1.079500 -2.095500) (xy -1.079500 -1.778000) (xy -0.444500 -1.778000) (xy -0.444500 -2.095500) (xy 0.190500 -2.095500) (xy 0.190500 -1.778000)
|
||||
(xy -0.127000 -1.778000) (xy -0.127000 -1.460500) (xy -0.444500 -1.460500) (xy -0.444500 -0.825500) (xy -0.762000 -0.825500) (xy -0.762000 0.444500) (xy -0.444500 0.444500) (xy -0.444500 1.079500)
|
||||
(xy -0.127000 1.079500) (xy -0.127000 1.397000) (xy 0.508000 1.397000) (xy 0.508000 1.714500) (xy 2.095500 1.714500) (xy 2.095500 1.397000) (xy 2.730500 1.397000) (xy 2.730500 1.079500)
|
||||
(xy 3.048000 1.079500) (xy 3.048000 0.762000) (xy 2.413000 0.762000) (xy 2.413000 1.079500) (xy 2.095500 1.079500) (xy 2.095500 0.444500) (xy 3.048000 0.444500) (xy 3.048000 0.762000)
|
||||
(xy 3.365500 0.762000) (xy 3.365500 0.444500) (xy 3.048000 0.444500) (xy 2.095500 0.444500) (xy 2.095500 -1.778000) (xy 2.730500 -1.778000) (xy 2.730500 -2.095500) (xy 3.048000 -2.095500)
|
||||
(xy 3.048000 -2.413000) (xy 1.778000 -2.413000) (xy 1.778000 -2.730500) (xy -0.127000 -2.730500) (xy -0.127000 -2.413000) (xy -0.762000 -2.413000) (xy -0.762000 -2.095500) (xy -1.079500 -2.095500)
|
||||
(xy -1.397000 -2.095500) (xy -1.397000 -2.413000) (xy -1.079500 -2.413000) (xy -1.079500 -2.730500) (xy -0.444500 -2.730500) (xy -0.444500 -3.048000) (xy 2.413000 -3.048000) (xy 2.413000 -2.730500)
|
||||
(xy 2.730500 -2.730500) (xy 3.048000 -2.730500) (xy 3.048000 -2.413000) (xy 3.365500 -2.413000) (xy 3.365500 -2.730500) (xy 3.048000 -2.730500) (xy 2.730500 -2.730500) (xy 2.730500 -3.048000)
|
||||
(xy 3.683000 -3.048000) (xy 3.683000 -2.730500) (xy 4.000500 -2.730500) (xy 4.000500 -1.778000) (xy 3.683000 -1.778000) (xy 3.683000 -1.460500) (xy 3.365500 -1.460500) (xy 3.365500 -1.143000)
|
||||
(xy 2.730500 -1.143000) (xy 2.730500 0.127000) (xy 3.683000 0.127000) (xy 3.683000 0.444500) (xy 4.000500 0.444500) (xy 4.000500 0.762000) (xy 4.953000 0.762000) (xy 4.953000 1.079500)
|
||||
(xy 5.270500 1.079500) )(layer F.SilkS) (width 0.010000)
|
||||
)
|
||||
(fp_poly (pts (xy -2.984500 2.984500) (xy -3.619500 2.984500) (xy -3.619500 2.667000) (xy -2.984500 2.667000) (xy -2.984500 2.984500) )(layer F.SilkS) (width 0.010000)
|
||||
)
|
||||
(fp_poly (pts (xy 1.778000 1.079500) (xy 0.825500 1.079500) (xy 0.825500 0.762000) (xy 0.508000 0.762000) (xy 0.508000 0.444500) (xy 0.825500 0.444500) (xy 0.825500 0.127000) (xy 1.143000 0.127000)
|
||||
(xy 1.143000 -1.778000) (xy 1.778000 -1.778000) (xy 1.778000 1.079500) )(layer F.SilkS) (width 0.010000)
|
||||
)
|
||||
(fp_poly (pts (xy 0.825500 -1.460500) (xy 0.508000 -1.460500) (xy 0.508000 0.444500) (xy 0.190500 0.444500) (xy 0.190500 -0.190500) (xy -0.127000 -0.190500) (xy -0.127000 -1.143000) (xy 0.190500 -1.143000)
|
||||
(xy 0.190500 -1.778000) (xy 0.508000 -1.778000) (xy 0.508000 -2.095500) (xy 0.825500 -2.095500) (xy 0.825500 -1.460500) )(layer F.SilkS) (width 0.010000)
|
||||
)
|
||||
)
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 289 B |
Loading…
Reference in New Issue