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Correct bad table address evaluation
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610cf784a6
commit
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@ -42,7 +42,7 @@
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#define GET_TD_SF_DT(PD) (PD & 0x3)
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#define GET_TD_SF_WP(PD) ((PD >> 2) & 0x1)
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#define GET_TD_SF_U(PD) ((PD >> 3) & 0x1)
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#define GET_TD_SF_NEXT(PD) (PD & 0xFFFFFFFC)
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#define GET_TD_SF_NEXT(PD) (PD & 0xFFFFFFF0)
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#define GET_TD_SF_ADDR(PD) (PD & 0xFFFFFF00)
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#define GET_TD_LF_LIMIT(PD0, PD1, max, min) if (PD0 & 0x80000000)\
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@ -59,7 +59,7 @@
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#define GET_TD_LF_M(PD0, PD1) ((PD0 >> 4) & 0x1)
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#define GET_TD_LF_CI(PD0, PD1) ((PD0 >> 6) & 0x1)
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#define GET_TD_SF_S(PD0, PD1) ((PD0 >> 8) & 0x1)
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#define GET_TD_LF_NEXT(PD0, PD1) (PD1 & 0xFFFFFFFC)
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#define GET_TD_LF_NEXT(PD0, PD1) (PD1 & 0xFFFFFFF0)
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#define GET_TD_LF_ADDR(PD0, PD1) (PD1 & 0xFFFFFF00)
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#define GET_TT_ENABLE(TT) (TT & 0x0080)
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@ -155,24 +155,24 @@ static int decode_4_PD(unsigned long *pageBase, unsigned long *pageMask,
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return 0;
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case DT_VALID_4_BYTE:
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TRACE("4-BYTE\n");
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*attr |= ((PD & 0x0F) >> 2);
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index = logicalAddr >> (32 - TIA);
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logicalAddr = logicalAddr << TIA;
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*pageMask = (*pageMask) >> TIA;
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root = GET_TD_SF_NEXT(PD);
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TRACE("4-BYTE TIA: %d index: %d\n", TIA, index);
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return decode_4_PD( pageBase, pageMask, attr,
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logicalAddr << TIA, TI << 4,
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read_phys(root + index * 4));
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case DT_VALID_8_BYTE:
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TRACE("8-BYTE\n");
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*attr |= ((PD & 0x0F) >> 2);
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index = logicalAddr >> (32 - TIA);
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*pageMask = (*pageMask) >> TIA;
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root = GET_TD_SF_NEXT(PD);
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TRACE("8-BYTE TIA: %d index: %d\n", TIA, index);
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return decode_8_PD( pageBase, pageMask, attr,
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logicalAddr << TIA, TI << 4,
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read_phys(root + index * 8),
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