2021-03-21 23:21:57 +00:00
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'''
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Power Macintosh ROM disassembler.
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Author: Max Poliakovski 2020-2021
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Usage:
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python3 PowerRomDasm.py --rom_path=[path to a Power Macintosh ROM dump]
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'''
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from argparse import ArgumentParser
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from ruamel.yaml import YAML
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from capstone import *
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from capstone.m68k import *
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import struct
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def bit_not(n, numbits=32):
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return (1 << numbits) - 1 - n
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def align(n, m):
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return (n + m - 1) & bit_not(m - 1)
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''' Capstone-based disassembler for 68k code.'''
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class M68KDasm:
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def __init__(self, cb):
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self.rom_cb = cb
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self.cse = Cs(CS_ARCH_M68K, CS_MODE_M68K_040)
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self.cse.detail = True
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self.labels = {}
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def dasm_single(self, address, code):
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''' Disassble single 68k instruction with the Capstone engine. '''
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# detect A-Traps and disassemble them ourselves
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if (code[0] & 0xF0) == 0xA0:
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from mactraps import TRAP_TABLE
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trap_num = (code[0] << 8) | code[1]
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if trap_num in TRAP_TABLE:
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return ((TRAP_TABLE[trap_num], [], 2))
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else:
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return (('dc.w', [hex(trap_num)], 2))
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# disassemble non-trap instructions with Capstone
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instrs = self.cse.disasm(code, address)
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return next(instrs)
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def dasm_region(self, addr, size, data):
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pp_dasm = []
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last_addr = addr + size
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offset = 0
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while addr < last_addr:
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# prefetch binary data (2 >= bytes <= 10) for the next instruction
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bin_length = min(last_addr - addr, 10)
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bin_prefetch = bytearray()
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for i in range(bin_length):
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bin_prefetch.append(data[offset+i])
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instr = self.dasm_single(addr, bin_prefetch)
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if not isinstance(instr, CsInsn):
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pp_dasm.append({'addr': addr, 'mnem': instr[0], 'ops': instr[1]})
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addr += instr[2]
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offset += instr[2]
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continue
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op_list = instr.op_str.split(',')
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#print(op_list)
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ops = []
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for op in instr.operands:
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#print(op.type)
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if op.type == M68K_OP_MEM:
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#print(op.address_mode)
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if op.address_mode == M68K_AM_PCI_DISP:
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ea = addr + op.mem.disp + 2
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flag,sym = self.rom_cb.get_symbol(ea)
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if flag:
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ops.append(sym)
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else:
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label = 'l_{:x}'.format(ea)
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ops.append(label)
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2021-03-22 11:19:32 +00:00
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if ea not in self.labels:
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2021-03-21 23:21:57 +00:00
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self.labels[ea] = label
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2021-03-22 11:19:32 +00:00
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# discard current op because we've just replaced it
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2021-03-21 23:21:57 +00:00
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op_list.pop(0)
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elif op.address_mode == M68K_AM_PCI_INDEX_BASE_DISP:
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ops.append(instr.op_str)
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else:
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ops.append(op_list.pop(0))
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elif op.type == M68K_OP_BR_DISP:
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if op.address_mode == M68K_AM_BRANCH_DISPLACEMENT:
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ea = addr + op.br_disp.disp + 2
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flag,sym = self.rom_cb.get_symbol(ea)
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if flag:
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ops.append(sym)
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else:
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label = 'l_{:x}'.format(ea)
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ops.append(label)
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2021-03-22 11:19:32 +00:00
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if ea not in self.labels:
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2021-03-21 23:21:57 +00:00
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self.labels[ea] = label
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2021-03-22 11:19:32 +00:00
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# discard current op because we've just replaced it
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2021-03-21 23:21:57 +00:00
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op_list.pop(0)
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else:
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ops.append(op_list.pop(0))
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else:
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ops.append(op_list.pop(0))
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pp_dasm.append({'addr': addr, 'mnem': instr.mnemonic, 'ops': ops})
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addr += instr.size
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offset += instr.size
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#print(ops)
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#print(self.labels)
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for instr in pp_dasm:
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if instr['addr'] in self.labels:
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print('\n' + self.labels[instr['addr']] + ':')
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print(hex(instr['addr']).ljust(15), end='')
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print(instr['mnem'], '\t', end='')
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print(','.join(instr['ops']))
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def dasm_regions(self, start_addr, size, data, regions):
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self.labels = {}
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for reg in regions:
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if reg[2] == 'align':
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print(hex(start_addr + reg[0]).ljust(15), end='')
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print('align\t' + str(reg[3]))
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elif reg[2] == 'code':
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reg_size = reg[1] - reg[0] + 1
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self.dasm_region(start_addr + reg[0], reg_size,
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data[reg[3]:reg[3]+reg_size])
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else:
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print("Unknown region type " + reg[2])
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class ROMDisassembler:
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def __init__(self, rom_data, rom_db):
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self.rom_data = rom_data
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self.rom_db = rom_db
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self.start_addr = rom_db['main_info']['phys_addr']
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self.m68k_dasm = M68KDasm(self)
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def get_symbol(self, addr):
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offset = addr - self.start_addr
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if offset in self.rom_db['annot_items']:
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return (True, self.rom_db['annot_items'][offset]['label'])
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else:
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return (False, '')
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def fmt_single_entry(self, format, size, offset):
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print(hex(self.start_addr + offset).ljust(15), end='')
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if format == 'hex':
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if size == 1:
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print("dc.b\t0x%X" % struct.unpack('>B', self.rom_data[offset:offset+1]))
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elif size == 2:
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print("dc.w\t0x%X" % struct.unpack('>H', self.rom_data[offset:offset+2]))
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elif size == 4:
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print("dc.l\t0x%X" % struct.unpack('>I', self.rom_data[offset:offset+4]))
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else:
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print("INVALID SIZE!")
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2021-03-22 14:18:34 +00:00
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elif format == 'dec':
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if size == 1:
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print("dc.b\t%d" % struct.unpack('>B', self.rom_data[offset:offset+1]))
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elif size == 2:
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print("dc.w\t%d" % struct.unpack('>H', self.rom_data[offset:offset+2]))
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elif size == 4:
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print("dc.l\t%d" % struct.unpack('>I', self.rom_data[offset:offset+4]))
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else:
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print("INVALID SIZE!")
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2021-03-21 23:21:57 +00:00
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elif format == 'offset':
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dest_offset = struct.unpack('>I', self.rom_data[offset:offset+4])[0]
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if dest_offset in self.rom_db['annot_items']:
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symbol = self.rom_db['annot_items'][dest_offset]['label']
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print("dc.l\t" + symbol + '-BaseOfRom')
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else:
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print("dc.l\t0x%X" % dest_offset)
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def parse_subregs(self, start, size, subregs):
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#print("This entry has subregions", subregs)
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regs = []
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reg_start = start
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for reg in subregs:
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if reg['type'] != 'align':
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print("Unknown subregion type " + reg['type'])
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return regs
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offset = reg['offset']
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if offset < reg_start or offset >= (start + size):
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print("Invalid subregion offset: 0x%X" % offset)
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return regs
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regs.append((reg_start, offset - 1, 'code', reg_start - start))
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boundary = reg['boundary']
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reg_end = align(offset, boundary)
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regs.append((offset, reg_end - 1, 'align', boundary))
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reg_start = reg_end
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if reg_start < (start + size):
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regs.append((reg_start, (start + size) - 1, 'code', reg_start - start))
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#print(regs)
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return regs
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def fmt_entry(self, entry, offset):
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print("")
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print((entry['label'] + ':').ljust(15))
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if entry['type'] == 'array':
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count = entry['size'] // entry['elsize']
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for i in range(count):
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self.fmt_single_entry(entry['format'], entry['elsize'], offset)
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offset += entry['elsize']
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elif entry['type'] == 'int':
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self.fmt_single_entry(entry['format'], entry['size'], offset)
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elif entry['type'] == 'code':
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size = entry['size']
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if entry['arch'] == '68k':
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if 'subregs' in entry:
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regs = self.parse_subregs(offset, size, entry['subregs'])
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else:
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regs = [(offset, offset + size - 1, 'code', 0)]
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self.m68k_dasm.dasm_regions(self.start_addr, size,
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self.rom_data[offset:offset+size], regs)
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elif entry['arch'] == 'ppc':
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print("PPC disassembler not implemented yet")
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else:
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print("Unknown code region architecture " + entry['arch'])
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def dasm_region(self, start, end):
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offset = start
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while offset < end:
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if offset in self.rom_db['annot_items']:
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entry = self.rom_db['annot_items'][offset]
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self.fmt_entry(entry, offset)
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offset += entry['size']
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else:
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print(hex(self.start_addr + offset).ljust(15), end='')
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print("dc.b\t0x%X" % struct.unpack('>B', self.rom_data[offset:offset+1]))
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offset += 1
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if __name__ == "__main__":
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parser = ArgumentParser()
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parser.add_argument('--rom_path', type=str,
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dest='rom_path',
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help='path to a PowerMacintosh ROM file to process',
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metavar='ROM_PATH', required=True)
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parser.add_argument('--start', type=lambda x: int(x,0),
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dest='start_offs', default=0,
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help='offset to the start of the region to disassemble',
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required=False,
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)
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parser.add_argument('--end', type=lambda x: int(x,0),
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dest='end_offs', default=0x500,
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help='offset to the end of the region to disassemble',
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required=False,
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)
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opts = parser.parse_args()
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with open(opts.rom_path, 'rb') as rom_file:
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rom_file.seek(0, 2)
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rom_size = rom_file.tell()
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if rom_size != (4 * 1024 * 1024):
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print("Invalid ROM file size %d (expected 4 MB)" % rom_size)
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# just load the whole ROM image into memory
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rom_file.seek(0, 0)
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rom_data = rom_file.read()
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check_sum = struct.unpack('>I', rom_data[0:4])[0]
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print("ROM Checksum: %X" % check_sum)
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db_name = 'ROMDB_' + '{:x}'.format(int(check_sum)).upper() + '.yaml'
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with open('database/' + db_name, 'rb') as db_file:
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yaml = YAML()
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annot_db = yaml.load(db_file)
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print(annot_db['main_info']['name'])
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rdasm = ROMDisassembler(rom_data, annot_db)
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rdasm.dasm_region(opts.start_offs, opts.end_offs)
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