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236 lines
9.0 KiB
C
236 lines
9.0 KiB
C
/*
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File: HALc96.h
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Contains: header stuff for 53c96 HBAs (Quadras)
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Notes:
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Written by: Paul Wolf
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Copyright: © 1992-1994 by Apple Computer, Inc., all rights reserved.
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Change History (most recent first):
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<SM20> 2/1/94 DCB Added using601Emulator field to the hardware info record.
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<SM19> 11/22/93 pdw Rolling in from <MCxx>.
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<SM18> 11/19/93 chp Add IRQ primitive vectors to the HBADesc_53c9x structure.
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<SMG3> 9/29/93 chp Add HAL fields to the HAL globals to represent a DB-DMA channel
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command list buffer, with both logical and physical addresses.
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Include a prerequisite header file. Add prototypes for Grand
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Central initialization routines. Make a simple name change since
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GrandCentral is so long.
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<SMG2> 9/22/93 chp Add Grand Central support.
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<SM16> 10/29/93 DCB <MC> rollins.
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<SM15> 10/14/93 pdw <MC> roll-in.
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<MC2> 10/12/93 pdw Added support for Synchronous data transfers, rewrote State
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Machine, message handling etc.
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<SM14> 9/12/93 pdw Prototype maintenance.
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<SM13> 7/20/93 pdw Added intIRQbitNum and changed intDREQbitNum to a uchar.
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<SM12> 7/17/93 pdw Lots of little things.
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<SM11> 7/8/93 pdw Changed types of some pointers in HALc96Globals.
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<SM10> 6/29/93 pdw Massive checkins: Change asynchronicity mechanism to CallMachine
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stack switching mechanism. Adding support for Cold Fusion.
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Rearranging HW/SW Init code. Some code optimizations.
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<SM9> 5/25/93 DCB Rollin from Ludwig. (The next item below)
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<LW8> 5/21/93 PW Adding PRAM selectable Initiator ID stuff.
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<SM8> 5/5/93 PW Converted names to meanies-friendly names. Updated with latest
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from Ludwig stuff.
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<SM7> 4/8/93 DCB Adding pdmaTypeBIOS type to the dma type enum.
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<LW7> 4/30/93 DCB Make DoHalInfo a separate function so it can be stuffed into a
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vector.
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<LW5> 4/14/93 DCB Synced up with SuperMario
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<LW4> 3/26/93 PW Changed the hasPSC stuff to more generic dmaType and changed
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dreqIn32bit to dreqNeedsSwapMMU.
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<LW3> 2/17/93 PW Began to add dual-interrupt support for Quadras.
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<SM6> 3/20/93 PW Began to add dual-interrupt support for Quadras.
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<SM5> 1/31/93 PW Update from the latest of Ludwig. Also changes required for PDM
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(will update Ludwig with these as needed myself).
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<LW2> 1/27/93 PW Added HALIntPoll routine to prototypes.
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<SM4> 11/20/92 DCB Removed several includes to fix makefile dependency problems
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<SM3> 10/8/92 PW Realigned some fields. See HALc96equ.a for more details.
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<SM2> 7/28/92 PW Resolved differences in sources.
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<SM1> 7/26/92 PW Initial check-in.
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*/
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#ifndef __HALC96__
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#define __HALC96__
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#ifndef __SIMCORE__
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#include "SIMCore.h"
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#endif
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typedef struct
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{
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Ptr baseRegAddr; // base addr of c9x registers (offset of $10 between regs
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Ptr pdmaAddr; // addr of Pseudo-dma access
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Ptr pdmaNonSerlzdAddr; // addr of Pseudo-dma in non-serialized space access
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Ptr dreqAddr; // addr of DAFB register with DREQ bit
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Ptr intEnableSCSIAddr; // addr of control register for SCSI interrupt
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Ptr intFlagSCSIAddr; // addr of status register for SCSI interrupt
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Ptr dafbAddr; // addr of DAFB that needs initialization
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Ptr hbaUnusedL1; // addr of
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Ptr dmaCntrlAddr; // addr of true DMA control register(s)
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Ptr dmaBaseAddr; // addr of true DMA base register(s)
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void (*jvClearSCSIIRQ) (void); // hardware-specific primitive routine
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void (*jvEnableSCSIIRQ) (void); // hardware-specific primitive routine
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void (*jvDisableSCSIIRQ) (void); // hardware-specific primitive routine
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void (*jvTestSCSIIE) (void); // hardware-specific primitive routine
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Boolean dreqNeedsSwapMMU; // set if dreq status bit is in 32-bit space
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Boolean HBAisFast; // set if F9x part capable of Fast Synchronous (10MB/S)
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Boolean HBAisDiff; // set if c9x part capable of differential
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Boolean usesThreshold8; //
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Boolean needsDAFBinit; // set if there's a DAFB that needs to be inited
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Boolean using601Emulator; // set if we are running emulated on a 601
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Boolean hbaUnusedB2; // set if
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Boolean hbaUnusedB3; // set if
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Boolean HBAhasDMA; // set if true DMA available
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Boolean HBAhasPseudoDMA; // set if Pseudo-DMA available
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Boolean HBAhasHskPseudoDMA; // set if handshaked Pseudo-DMA available
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Boolean dmaCacheCoherent; // set if DMA is fully cache coherent (no flushing needed)
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Boolean hbaUnusedB4; // set if
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Boolean hbaUnusedB5; // set if
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Boolean hbaUnusedB6; // set if
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uchar initiatorID; // ID of Macintosh (Initiator) on this bus <LW8>
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uchar testIRQenableValue; // value to test SCSI IRQ enable
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uchar enableIRQvalue; // value to write to enable SCSI IRQ
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uchar disableIRQvalue; // value to write to disable SCSI IRQ
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uchar clearIRQvalue; // value to write to clear SCSI IRQ
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uchar intIRQbitNum; // bit to test for IRQ
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uchar intDREQbitNum; // bit to test for DREQ
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uchar hbaUnusedC1;
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uchar hbaUnusedC2;
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uchar intTypeSCSI; // type of interrupt control (shared VIA bit, etc.)
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uchar intSensSCSI; // type of sensitivity (LEVEL, EDGE, STICKYBIT)
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uchar intTypeDMA; // type of interrupt control (shared VIA bit, etc.)
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uchar intSensDMA; // type of sensitivity (LEVEL, EDGE, STICKYBIT)
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uchar dmaType; // type of programming model for DMA (PSC, AMIC,É)
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uchar dmaAlignmentSize; // alignment requirements (i.e. 8, 16 etc)
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uchar hbaUnusedC4; //
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uchar hbaUnusedC5;
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ushort intOSNumberSCSI; // OS registration number for the SCSI interrupt
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ushort intOSNumberDMA; // OS registration number for the DMA interrupt
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ushort hbaUnusedS1;
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ushort hbaUnusedS2;
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} HBADesc_53c9x;
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enum {
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dmaTypeNone = 0,
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dmaTypePSC = 1,
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dmaTypeAMIC = 2,
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pdmaTypeBIOS = 3,
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dmaTypeGC = 4,
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dmaTypeLimit
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};
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//----- Incomplete HAL globals ----- (the rest are in HALc96equ.a)
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typedef struct {
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// Static description of bus
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HBADesc_53c9x hwDesc; // hwDesc: copy is made of structure that's passed in
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void * SIMstaticPtr; // ptr to SIM's globals (for SSM callbacks)
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void (*XPT_ISRptr)(); // ptr to XPT's ISR, so we can install it
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void (*unusedRPtr)(); // ptr to
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void (*ReconnectISRptr)(); // ptr to SIM's Reconnect ISR for us to call
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ushort busID; // bus ID of this HAL's bus
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ushort rsrvdS2; // <SM3> pdw
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Ptr cclPhysicalAddr; // addr of DB-DMA channel command list buffer (physical)
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Ptr cclLogicalAddr; // addr of DB-DMA channel command list buffer (logical)
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Ptr physicalCopyBuffer; // physical address of locked/noncachable copy buffer
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Ptr logicalCopyBuffer; // logical address of copy buffer to DMA into/out of
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void * otherHALg; // other HAL's globals
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Ptr privStackTop; // top of our private stack
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ulong minDMAsize; // transfer size crossover between polled and DMA
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long supported_scFlags;
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short supported_scIOFlags;
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short supported_scDataTypes;
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ulong unusedCA1[4];
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} HALc96Globals;
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enum {
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SHARED_VIA = 0,
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INDEPENDENT_VIA = 1,
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SECOND_SHARED_VIA = 2,
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GRAND_CENTRAL = 3
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};
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enum {
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EDGE = 0,
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LEVEL = 1, // no clear necessary
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STICKBIT = 2
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};
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/****** External Prototypes ********/
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long GetHalInfo( HALc96Globals *HALg, SCSIBusInquiryPB *infoPB );
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Boolean DoWeHaveFastSCSI( void * hwAddr);
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/****** Function Prototypes For Inter-HAL *******/
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// HALc96.c
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long HALinit( HALinitInfo * HALinfoPtr);
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void * Init53c9xSW( HBADesc_53c9x *hwDescPtr);
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void * ReInitHAL( HBADesc_53c9x *hwDescPtr, ushort busID);
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// HALc96HWInit.a
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long Init53c9xHW( HBADesc_53c9x *hwDescPtr);
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// HALc96.a
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extern long SizeOfGlobals( void); // HALc96.a
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extern long HAL_SingleISR( HALc96Globals *HALg); // HALc96Routines.a
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extern long HAL_DualISR( HALc96Globals *HALg); // HALc96Routines.a
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extern long HALIntPoll( HALc96Globals *HALg); // HALc96Routines.a
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extern void Initc96Asm( HALc96Globals * HALg); // HALc96.a
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extern void HALaction( HALactionPB * halPBptr); // HALc96.a
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extern void HALResetBus( HALc96Globals * HALg); // HALc96.a
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extern void HALSyncConfig( long, long, HALc96Globals * HALg); // HALc96.a
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extern void HALAssertATN( HALc96Globals * HALg); // HALc96.a
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extern void HALTeardownIO( SIM_IO * ioPtr, uchar * HALg); // HALc96.a
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extern void HandleSelected( void); // HALc96.a
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extern void ReadInitiatorID( HBADesc_53c9x *hwDescPtr); // HALc96.a
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extern uchar GetInitiatorID( HBADesc_53c9x *hwDescPtr); // HALc96.a
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// HALc96PSC.c, HALc96AMIC.c, HALc96GC.c, etc.
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OSErr InitSW_PSC( HALc96Globals *HALg);
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OSErr InitHW_PSC( HALc96Globals *HALg);
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OSErr InitSW_AMIC( HALc96Globals *HALg);
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OSErr InitHW_AMIC( HALc96Globals *HALg);
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OSErr InitSW_GC( HALc96Globals *HALg);
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OSErr InitHW_GC( HALc96Globals *HALg);
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// HALc96Routines.a
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extern void ClearVIASCSIIRQ (void);
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extern void EnableVIASCSIIRQ (void);
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extern void DisableVIASCSIIRQ (void);
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extern void TestVIASCSIIE (void);
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// HALc96GC.a
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extern void ClearGCSCSI0IRQ (void);
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extern void ClearGCSCSI1IRQ (void);
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extern void EnableGCSCSI0IRQ (void);
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extern void EnableGCSCSI1IRQ (void);
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extern void DisableGCSCSI0IRQ (void);
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extern void DisableGCSCSI1IRQ (void);
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extern void TestGCSCSI0IE (void);
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extern void TestGCSCSI1IE (void);
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#endif __HALC96__
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