2011-11-26 07:10:30 +00:00
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/*
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* external_mem.c
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*
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* Created on: Nov 25, 2011
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* Author: Doug
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2012-05-26 03:21:04 +00:00
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*
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* Copyright (C) 2011-2012 Doug Brown
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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2011-11-26 07:10:30 +00:00
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*/
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#include "external_mem.h"
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2011-11-27 08:01:29 +00:00
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#include "ports.h"
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2011-11-26 07:10:30 +00:00
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#include <avr/io.h>
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2011-12-11 21:28:32 +00:00
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#include <util/delay.h>
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2011-11-26 07:10:30 +00:00
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2011-11-27 08:09:29 +00:00
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#define HIGHEST_ADDRESS_LINE 20
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2011-11-26 07:10:30 +00:00
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2012-09-02 22:56:49 +00:00
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// Default setup
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static ChipType curChipType = ChipType8BitData_4MBitSize;
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2011-12-11 21:28:32 +00:00
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// Private functions
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uint32_t ExternalMem_MaskForChips(uint8_t chips);
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void ExternalMem_WaitCompletion(uint8_t chipsMask);
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2011-11-27 08:01:29 +00:00
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// Allow this to be initialized more than once.
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// In case we mess with the port settings,
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// re-initializing ExternalMem should reset everything
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// to sensible defaults.
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2011-11-26 07:10:30 +00:00
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void ExternalMem_Init(void)
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{
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2011-11-27 08:01:29 +00:00
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// Initialize the ports connected to address/data/control lines
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Ports_Init();
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2011-11-26 07:10:30 +00:00
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2011-11-27 08:01:29 +00:00
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// Configure all address lines as outputs
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2011-12-10 21:02:21 +00:00
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Ports_SetAddressDDR((1UL << (HIGHEST_ADDRESS_LINE + 1)) - 1);
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2011-11-26 07:10:30 +00:00
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2011-12-10 18:35:41 +00:00
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// Set all data lines as inputs
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Ports_SetDataDDR(0);
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// Disable all pull-ups on the data lines. They aren't needed
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// for normal operation.
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Ports_DataPullups_RMW(0, 0xFFFFFFFFUL);
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// Sensible defaults for address lines:
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2011-11-27 08:01:29 +00:00
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// Write out address zero
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Ports_SetAddressOut(0);
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2011-11-26 07:10:30 +00:00
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2011-11-28 07:06:02 +00:00
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// Control lines
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2011-11-27 08:01:29 +00:00
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Ports_SetCSDDR(1);
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Ports_SetOEDDR(1);
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Ports_SetWEDDR(1);
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2011-11-26 07:10:30 +00:00
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2011-11-27 08:01:29 +00:00
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// Default all control lines to high (de-asserted)
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2011-12-12 05:48:26 +00:00
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ExternalMem_Deassert(SIMM_CS | SIMM_OE | SIMM_WE);
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2011-11-26 07:10:30 +00:00
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}
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void ExternalMem_SetAddress(uint32_t address)
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{
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2011-11-27 08:01:29 +00:00
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Ports_SetAddressOut(address);
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2011-11-26 07:10:30 +00:00
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}
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void ExternalMem_SetData(uint32_t data)
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{
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2011-11-27 08:01:29 +00:00
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Ports_SetDataDDR(0xFFFFFFFFUL);
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Ports_SetDataOut(data);
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2011-11-26 07:10:30 +00:00
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}
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void ExternalMem_SetAddressAndData(uint32_t address, uint32_t data)
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{
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ExternalMem_SetAddress(address);
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ExternalMem_SetData(data);
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}
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void ExternalMem_SetDataAsInput(void)
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{
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2011-11-27 08:01:29 +00:00
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Ports_SetDataDDR(0);
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2011-11-26 07:10:30 +00:00
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}
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uint32_t ExternalMem_ReadData(void)
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{
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2011-11-27 08:01:29 +00:00
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return Ports_ReadData();
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2011-11-26 07:10:30 +00:00
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}
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2011-12-10 21:02:21 +00:00
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void ExternalMem_Read(uint32_t startAddress, uint32_t *buf, uint32_t len)
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{
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2011-12-11 18:12:22 +00:00
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// This is just a time saver if we know we will
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// be reading a complete block -- doesn't bother
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// playing with the control lines between each byte
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2011-12-12 05:48:26 +00:00
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ExternalMem_Deassert(SIMM_WE);
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2011-12-11 18:12:22 +00:00
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ExternalMem_SetDataAsInput();
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2011-12-14 05:56:20 +00:00
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ExternalMem_Assert(SIMM_CS | SIMM_OE);
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2011-12-10 21:02:21 +00:00
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while (len--)
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{
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ExternalMem_SetAddress(startAddress++);
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// Shouldn't need to wait here. Each clock cycle at 16 MHz is 62.5 nanoseconds, so by the time the SPI
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// read has been signaled with the SPI chip, there will DEFINITELY be good data on the data bus.
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// (Considering these chips will be in the 70 ns or 140 ns range, that's only a few clock cycles at most)
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2011-12-17 19:18:56 +00:00
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*buf++ = ExternalMem_ReadData();
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2011-12-10 21:53:43 +00:00
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}
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2011-11-26 07:10:30 +00:00
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}
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2011-12-11 02:40:30 +00:00
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void ExternalMem_WriteCycle(uint32_t address, uint32_t data)
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{
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2011-12-12 05:48:26 +00:00
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ExternalMem_Assert(SIMM_CS);
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ExternalMem_Deassert(SIMM_OE | SIMM_WE);
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2011-12-11 02:40:30 +00:00
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ExternalMem_SetAddressAndData(address, data);
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2011-12-12 05:48:26 +00:00
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ExternalMem_Assert(SIMM_WE);
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ExternalMem_Deassert(SIMM_WE);
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2011-12-11 02:40:30 +00:00
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}
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2011-12-11 18:12:22 +00:00
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uint32_t ExternalMem_ReadCycle(uint32_t address)
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2011-12-11 02:40:30 +00:00
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{
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2011-12-12 05:48:26 +00:00
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ExternalMem_Deassert(SIMM_WE);
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2011-12-11 18:12:22 +00:00
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ExternalMem_SetDataAsInput();
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2011-12-14 05:56:20 +00:00
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ExternalMem_Assert(SIMM_CS | SIMM_OE);
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2011-12-11 18:12:22 +00:00
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ExternalMem_SetAddress(address);
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2011-12-11 21:28:32 +00:00
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uint32_t tmp = ExternalMem_ReadData();
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2011-12-12 05:48:26 +00:00
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ExternalMem_Deassert(SIMM_OE);
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2011-12-11 21:28:32 +00:00
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return tmp;
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}
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uint32_t ExternalMem_MaskForChips(uint8_t chips)
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{
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// This is a private function we can use to
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// ignore results from chips we don't want to address
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// (or to stop from programming them)
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uint32_t mask = 0;
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if (chips & (1 << 0))
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{
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mask |= 0x000000FFUL;
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}
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if (chips & (1 << 1))
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{
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mask |= 0x0000FF00UL;
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}
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if (chips & (1 << 2))
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{
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mask |= 0x00FF0000UL;
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}
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if (chips & (1 << 3))
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{
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mask |= 0xFF000000UL;
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}
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return mask;
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2011-12-11 18:12:22 +00:00
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}
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2011-12-11 02:40:30 +00:00
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2011-12-11 21:28:32 +00:00
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void ExternalMem_UnlockChips(uint8_t chipsMask)
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2011-12-11 18:12:22 +00:00
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{
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2011-12-11 21:28:32 +00:00
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// Use a mask so we don't unlock chips we don't want to talk with
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uint32_t mask = ExternalMem_MaskForChips(chipsMask);
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2012-09-02 22:56:49 +00:00
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// The unlock sequence changes depending on the chip
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if (curChipType == ChipType8BitData_4MBitSize)
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{
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// First part of unlock sequence:
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// Write 0x55555555 to the address bus and 0xAA to the data bus
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// (Some datasheets may only say 0x555 or 0x5555, but they ignore
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// the upper bits, so writing the alternating pattern to all address lines
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// should make it compatible with larger chips)
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ExternalMem_WriteCycle(0x55555555UL, 0xAAAAAAAAUL & mask);
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// Second part of unlock sequence is the same thing, but reversed.
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ExternalMem_WriteCycle(0xAAAAAAAAUL, 0x55555555UL & mask);
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}
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// The protocol is slightly different for 8/16-bit devices in 8-bit mode:
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else if (curChipType == ChipType8Bit16BitData_16MBitSize)
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{
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// First part of unlock sequence:
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// Write 0xAAAAAAAA to the address bus and 0xAA to the data bus
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ExternalMem_WriteCycle(0xAAAAAAAAUL, 0xAAAAAAAAUL & mask);
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2011-12-11 02:40:30 +00:00
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2012-09-02 22:56:49 +00:00
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// Second part of unlock sequence is the reversed pattern.
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ExternalMem_WriteCycle(0x55555555UL, 0x55555555UL & mask);
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}
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// shouldn't ever be a value other than those two, so I'm not writing
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// any extra code for that case.
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2011-12-11 02:40:30 +00:00
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}
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void ExternalMem_IdentifyChips(struct ChipID *chips)
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{
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2011-12-11 21:28:32 +00:00
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// Start by writing the unlock sequence to ALL chips
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ExternalMem_UnlockChips(ALL_CHIPS);
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2011-12-11 02:40:30 +00:00
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// Write 0x90 to 0x55555555 for the identify command...
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2012-09-02 22:56:49 +00:00
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if (curChipType == ChipType8BitData_4MBitSize)
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{
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ExternalMem_WriteCycle(0x55555555UL, 0x90909090UL);
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}
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else if (curChipType == ChipType8Bit16BitData_16MBitSize)
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{
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ExternalMem_WriteCycle(0xAAAAAAAAUL, 0x90909090UL);
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}
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// shouldn't ever be a value other than those two, so I'm not writing
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// any extra code for that case.
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2011-12-11 02:40:30 +00:00
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// Now we can read the vendor and product ID
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2011-12-11 18:12:22 +00:00
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uint32_t result = ExternalMem_ReadCycle(0);
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2011-12-11 02:40:30 +00:00
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chips[3].manufacturerID = (uint8_t)result;
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chips[2].manufacturerID = (uint8_t)(result >> 8);
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chips[1].manufacturerID = (uint8_t)(result >> 16);
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chips[0].manufacturerID = (uint8_t)(result >> 24);
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2011-12-11 18:12:22 +00:00
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result = ExternalMem_ReadCycle(1);
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2011-12-11 02:40:30 +00:00
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chips[3].deviceID = (uint8_t)result;
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chips[2].deviceID = (uint8_t)(result >> 8);
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chips[1].deviceID = (uint8_t)(result >> 16);
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chips[0].deviceID = (uint8_t)(result >> 24);
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// Exit software ID mode
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ExternalMem_WriteCycle(0, 0xF0F0F0F0UL);
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}
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2011-12-11 21:28:32 +00:00
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void ExternalMem_EraseChips(uint8_t chipsMask)
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{
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ExternalMem_UnlockChips(chipsMask);
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2012-09-02 22:56:49 +00:00
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if (curChipType == ChipType8BitData_4MBitSize)
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{
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ExternalMem_WriteCycle(0x55555555UL, 0x80808080UL);
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}
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else if (curChipType == ChipType8Bit16BitData_16MBitSize)
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{
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ExternalMem_WriteCycle(0xAAAAAAAAUL, 0x80808080UL);
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}
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2011-12-11 21:28:32 +00:00
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ExternalMem_UnlockChips(chipsMask);
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2012-09-02 22:56:49 +00:00
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if (curChipType == ChipType8BitData_4MBitSize)
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{
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ExternalMem_WriteCycle(0x55555555UL, 0x10101010UL);
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}
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else if (curChipType == ChipType8Bit16BitData_16MBitSize)
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{
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ExternalMem_WriteCycle(0xAAAAAAAAUL, 0x10101010UL);
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}
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2011-12-11 21:28:32 +00:00
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ExternalMem_WaitCompletion(chipsMask);
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}
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void ExternalMem_WaitCompletion(uint8_t chipsMask)
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{
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// Mark the chips not requested as already completed,
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// so we don't end up waiting for them...
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// (We probably wouldn't anyway, but this is just
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// to be safe)
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2011-12-12 05:48:26 +00:00
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uint8_t doneChipsMask = ~chipsMask & 0x0F;
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2011-12-11 21:28:32 +00:00
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// Prime the loop...
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2011-12-14 05:56:20 +00:00
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union
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{
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uint32_t word;
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uint8_t bytes[4];
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} lastBits, tmp;
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lastBits.word = ExternalMem_ReadCycle(0);
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2011-12-12 05:48:26 +00:00
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while (doneChipsMask != 0x0F)
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2011-12-11 21:28:32 +00:00
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{
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2011-12-14 05:56:20 +00:00
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#define TOGGLE_BIT 0x40
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2011-12-12 05:48:26 +00:00
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tmp.word = ExternalMem_ReadCycle(0);
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// Note: The following assumes little endian byte ordering
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// (e.g. tmpBytes[0] is the least significant byte of tmpWord
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// Has this chip completed its operation? No?
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if ((doneChipsMask & (1 << 0)) == 0)
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{
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// No toggle means erase completed
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if ((tmp.bytes[0] & TOGGLE_BIT) == (lastBits.bytes[0] & TOGGLE_BIT))
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{
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doneChipsMask |= (1 << 0);
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}
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}
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if ((doneChipsMask & (1 << 1)) == 0)
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{
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// No toggle means erase completed
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if ((tmp.bytes[1] & TOGGLE_BIT) == (lastBits.bytes[1] & TOGGLE_BIT))
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{
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doneChipsMask |= (1 << 1);
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}
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}
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if ((doneChipsMask & (1 << 2)) == 0)
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{
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// No toggle means erase completed
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if ((tmp.bytes[2] & TOGGLE_BIT) == (lastBits.bytes[2] & TOGGLE_BIT))
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{
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doneChipsMask |= (1 << 2);
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}
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}
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if ((doneChipsMask & (1 << 3)) == 0)
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{
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// No toggle means erase completed
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if ((tmp.bytes[3] & TOGGLE_BIT) == (lastBits.bytes[3] & TOGGLE_BIT))
|
|
|
|
{
|
|
|
|
doneChipsMask |= (1 << 3);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-12-14 05:56:20 +00:00
|
|
|
lastBits.word = tmp.word;
|
2011-12-11 21:28:32 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void ExternalMem_WriteByteToChips(uint32_t address, uint32_t data, uint8_t chipsMask)
|
|
|
|
{
|
|
|
|
// Use a mask so we don't unlock chips we don't want to talk with
|
|
|
|
uint32_t mask = ExternalMem_MaskForChips(chipsMask);
|
|
|
|
|
|
|
|
ExternalMem_UnlockChips(chipsMask);
|
2012-09-02 22:56:49 +00:00
|
|
|
if (curChipType == ChipType8BitData_4MBitSize)
|
|
|
|
{
|
|
|
|
ExternalMem_WriteCycle(0x55555555UL, 0xA0A0A0A0UL & mask);
|
|
|
|
}
|
|
|
|
else if (curChipType == ChipType8Bit16BitData_16MBitSize)
|
|
|
|
{
|
|
|
|
ExternalMem_WriteCycle(0xAAAAAAAAUL, 0xA0A0A0A0UL & mask);
|
|
|
|
}
|
2011-12-11 21:28:32 +00:00
|
|
|
ExternalMem_WriteCycle(address, data & mask);
|
|
|
|
ExternalMem_WaitCompletion(chipsMask);
|
|
|
|
}
|
|
|
|
|
|
|
|
void ExternalMem_Write(uint32_t startAddress, uint32_t *buf, uint32_t len, uint8_t chipsMask)
|
|
|
|
{
|
|
|
|
while (len--)
|
|
|
|
{
|
|
|
|
ExternalMem_WriteByteToChips(startAddress++, *buf++, chipsMask);
|
|
|
|
}
|
|
|
|
}
|
2012-09-02 22:56:49 +00:00
|
|
|
|
|
|
|
void ExternalMem_SetChipType(ChipType type)
|
|
|
|
{
|
|
|
|
curChipType = type;
|
|
|
|
}
|