2017-09-17 09:09:04 +00:00
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; File: MMU.a
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; Contains: MMU setup and manipulation routines
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; Written by: Bob Herold
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;
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; Copyright: <09> 1986-1993 by Apple Computer, Inc. All rights reserved.
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;
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; Change History (most recent first):
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;
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; <SM11> 8/4/93 JDR private sound defines are in SoundPrivate.a
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; <SM10> 12/4/92 SWC Moved SwitchMMU here from StartInit.a.
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; <SM9> 11/13/92 rab Roll in Horror changes. Comments follow:
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; <H4> 7/13/92 NJV Modified Swap030 to not flush the ATC (used pmovefd instead of
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; pmove) when resetting the TTx registers.
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; <SM8> 8/20/92 CCH Removed hack for swapping MMU on Cub Card.
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; <SM7> 8/19/92 CSS Update from Reality:
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; <31> 8/18/92 DTY Change the name of BootGlobs to StartGlobals to avoid confusion
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; with BootGlobals, which is used by the boot code in Boot[1-3].a.
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; <SM6> 7/13/92 CCH Added conditionalized support for Cub Card on Quadra 700.
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; <SM5> 5/17/92 kc Roll in Horror sources. Moved Tables to MMUTables.
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; <H6> 5/24/91 CCH Flushed the ATC entries in SwapMMUMode.
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; <H5> 2/25/91 CCH Fixed a two-instruction window in Swap040 when MMU32Bit is set
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; before the MMU is swapped, and interrupts are still enabled.
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; <H4> 1/24/91 CCH Fix bug where MMUType is not set up correctly in 32-bit mode.
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; <H3> 9/13/90 CCH Shrunk padding size to make room for StartInitPatch.a.
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; <H2> 9/5/90 CCH Added 68040 MMU swap routine in.
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; <5> 5/14/90 CV Adding tables and additional support code to allow video to
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; operate in slot E for Erickson. Split the file in two since it
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; grew with the addition of the slot E support. The remainder of
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; MMU.a is in MMUTables.a.
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; <4> 4/30/90 JJ Changed FindInfo handling of VISA to compute correct video
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; buffer size.
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; <3> 3/12/90 CV Rolling in changes from mainproj. Original comments below.
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; {6} 2/9/90 JJ Added VISA to set of "MMU" types supported by GetMMUType and
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; FindInfo.
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; <2> 2/13/90 CV Rolling in changes from Reality. Original comments below.
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; {5} 2/4/90 GMR Made StartReadPRAM call new routine to read the PRAM byte
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; universally, at least until diagnostics rev their RdXByte
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; routine to work with Egret.
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; <3.8> 9/21/89 SWC Played with padding so entry points line up.
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; <3.6> 7/16/89 CSL Rolling Reality source for Aurora. Original Reality version is
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; 3.6,3.7. Original 3.6,3.7 comments are below:
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; <3.5> 6/29/89 rwh NEEDED FOR AURORA: for Glu chip, fix bug for weird RAM
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; configurations on 030, and fix comments. Changed HMMU/851
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; detection to work w/only Bank B.
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; <3.4> 6/28/89 GGD Moved the TestInRAM macro here, from HardwareEqu, until we
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; figure out what to do about it, since CCH said that nothing uses
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; it anymore, but this code does.
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; <3.3> 6/27/89 rwh NEEDED FOR AURORA: eliminate bogus video entries in F19
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; physicalTable
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; <3.2> 6/27/89 rwh NEEDED FOR AURORA: changes to get FMC rev 2 working. Made
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; onboard video wrap both before AND AFTER the real video buffer.
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; Changed MMUError error codes.
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; <3.1> 6/12/89 rwh added MMUCleanupFor8Mb to copy MMU config info below BufPtr when
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; booting 24 bit OS w/ more than 8 mb RAM.
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; <3.0> 6/12/89 djw Pass prodInfoPtr to GetRBVSize in FindInfo
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; <2.9> 6/11/89 rwh Romulator<6F> changes: make physical table entry point to ram-based
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; ROM image, peg top logical memory to just below ROM image. Code
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; review doc changes. Changed video slot alias to slot B. Made
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; GetMMUType use vbr to not depend on Bank A being present.
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; <2.8> 6/11/89 GMR Changed call to RdXByte to be a BigBSR6, so it'll reach.
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; <2.7> 6/2/89 rwh removed uneeded equates. Made size field of template a longword,
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; to allow video wrap < 64k. Changed to use new ASC register
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; equates in SwapHmmu. Made physical table have EXACT onboard
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; video buffer size. Added support for upper limits. Changed video
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; wrap to 1st page of buffer, not last page. Removed cache inhibit
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; for RBV video buffer.
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; <2.6> 5/30/89 rwh improved '851 support - use shared global entries. Make mmu
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; enable code more robust.
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; <2.5> 5/30/89 rwh added support for physical table (for VM, Pink/Opus, A/UX etc)
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; <2.4> 5/26/89 rwh Moved ConfigureRam to StartInit. Fixed support for big void in
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; logical space above lowmem (the 'black hole').
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; <2.3> 5/26/89 GGD Changed label names to avoid conflict between GLU and FMC code.
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; Dropped the .S from several branches to fix assembly errors when
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; has both Mac2Via2 and FMC. Branched through a branch so that
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; short branches could reach. Changed HMMU detection to use VIA2
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; instead of VIA1. Corrected branch condition in HMMU detection.
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; <2.2> 5/16/89 rwh added support for big void in logical space above lowmem, so
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; that system and app heaps can start at $38000000 in 32 bit mode.
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; Improved NuMac support.
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; <2.1> 5/14/89 rwh for RBV 32 bit mode map, made space just below video buffer wrap
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; to top of video buffer. Fixes bus error when quickdraw accesses
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; below video buffer.
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; <2.0> 5/14/89 rwh rewrote for universal ROM - now we have one routine that can set
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; up MMU tables for any machine. SwapMMU trap is now set up at
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; runtime to use code specific to the type of MMU.
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; <1.9> 5/10/89 CCH Changed code that swaps the mmu to make sure PMOVE instructions
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; are in the cache when running in RAM.
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; <1.8> 4/27/89 CCH Added code so that the MMU mode can be swapped while running in
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; logical address space, on both the 68851 and the 68030, for
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; NuMac builds only.
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; <1.7> 4/18/89 CCH Added some changes for Rom in Ram to work on the Mac II.
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; <1.6> 3/22/89 CSL Conditional SwapMMu32only for is32BitClean only.
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; <1.5> 3/22/89 CSL Added new routine SwapMMu32only, this is to replace SwapMMUMode
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; when the system is running 32 bit mode only.
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; <1.4> 2/17/89 rwh changes (hacks!) to make MvMac assemble w/o mac2via2
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; <1.3> 2/16/89 rwh added support for Fitch Memory Controller rev 1. When FMC2
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; arrives, remove these changes.
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; <1.2> 1/23/89 CSL Change MMU_Init to support dynamic generation of MMU table.
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; <1.1> 11/10/88 CCH Fixed Header.
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; <1.0> 11/9/88 CCH Adding to EASE.
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;
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; <1.5> 10/6/88 rwh changed 'hasMac2Via2' (from v1.4) to <20>hasRBV. Later we should
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; make these things selected at runtime.
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; <1.4> 10/5/88 CSL added support for RBV and MDU.
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; <<3C>1.3> 9/23/88 CCH Got rid of inc.sum.d and empty nFiles
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; <1.2> 9/22/88 CCH changed "xhardwareEqu.a" to "HardwareEqu.a"
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; <1.1> 9/9/88 rwh Rewritten top to bottom for Mac IIx. Now have separate low memory
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; globals for 24 & 32 bit mode. Global points to table that has
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; the CRP and TC value for that mode. This allows us to dynamically
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; switch to new tables. (This version rolled in from Mac IIx sources)
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; <1.0> 2/10/88 BBM Adding file for the first time into EASE<53>
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;
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; To Do:
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;
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; implement lower limits (bell & whistle...)
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PRINT OFF
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LOAD 'StandardEqu.d'
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INCLUDE 'HardwarePrivateEqu.a'
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2017-11-15 07:38:41 +00:00
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; INCLUDE 'SoundPrivate.a'
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2017-09-17 09:09:04 +00:00
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INCLUDE 'MMUEqu.a'
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INCLUDE 'BootEqu.a'
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INCLUDE 'UniversalEqu.a'
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PRINT ON
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MACHINE MC68030
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MMUStuff PROC
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2017-09-20 11:58:54 +00:00
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EXPORT InitMMUGlobals, InitMMUTrap, SwitchMMU
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2017-09-17 09:09:04 +00:00
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IMPORT BaseOfROM, Critical, PramIO, RamTest
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IMPORT RomLoc
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WITH StartGlobals ; <SM7>
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WITH MMUConfigInfo
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;-----
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2017-09-20 11:58:54 +00:00
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; InitMMUTrap 7930 - set up trap addres for SwapMMUMode
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2017-09-17 09:09:04 +00:00
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;
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; Entry
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; jSwapMMU points to correct SwapMMUMode routine
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;
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; Exit
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; trap address points where jSwapMMU points
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;---
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InitMMUTrap
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move.l jSwapMMU,a0 ; point to SwapMMUMode routine
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move.w #$A05D,d0 ; get trap #
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_SetTrapAddress ,NEWOS ; fix trap address
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rts
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;-----
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2017-09-20 11:58:54 +00:00
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; InitMMUGlobals 793c - set up vectors & lowmem for SwapMMUMode
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2017-09-17 09:09:04 +00:00
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;
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; Entry
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; BootGlobPtr points to BootGlobs
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; System is in 32 bit mode
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;
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; Exit
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; MMUFlags (byte) cleared to zero (all flags reset)
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; MMUType (byte) has type of MMU
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; MMUMode (byte) has 1, indicating its in 32 bit mode
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; MMU24Info (long) points to 24 bit mode MMU configuration info.
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; MMU32Info (long) points to 32 bit mode MMU configuration info.
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;
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; Trashes
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; d0/a0-a1
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;---
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InitMMUGlobals
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move.l BootGlobPtr,a1 ; get ptr to boot globals at top of RAM
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clr.b MMUFlags ; clear the flags byte
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move.b #true32b,MMU32bit ; signal in 32 bit mode
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lea sg32Info(a1),a0 ; get addr 32 bit mode info <SM7> CSS
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move.l a0,MMU32Info ; save it in lowmem
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lea sg24Info(a1),a0 ; get addr 24 bit mode info <SM7> CSS
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move.l a0,MMU24Info ; save it in lowmem
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moveq #0,d0 ; clear a reg
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move.b sgTypeMMU(a1),d0 ; get type of MMU <SM7> CSS
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move.b d0,MMUType ; save MMU type in lowmem
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btst.b #MMStartMode,sgMMFlags(a1); check memory manager start mode <SM7> CSS
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beq.s @findSwap ; IF its 32 bit mode only
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lea Swap32Only,a0 ; get ptr to null swap routine
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bra.s @gotSwap ; ...
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@findSwap ; ELSE
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move.w @swaps(d0.w*2),d0 ; get offset to swap routine
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lea @swaps(d0),a0 ; get ptr to swap routine
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@gotSwap ; ENDIF
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move.l a0,jSwapMMU ; init jump vector
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@NoSwap rts
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@swaps dc.w @NoSwap-@swaps ; No MMU: no swap routine!
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2017-09-20 11:58:54 +00:00
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dc.w @NoSwap-@swaps ; offset to HMMU swap routine
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2017-09-17 09:09:04 +00:00
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dc.w @NoSwap-@swaps ; MMB not supported: no swap routine!
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2017-09-20 11:58:54 +00:00
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dc.w @NoSwap-@swaps ; offset to 68851 PMMU swap routine
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2017-09-17 09:09:04 +00:00
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dc.w Swap030-@swaps ; offset to 030 PMMU swap routine
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2017-09-20 11:58:54 +00:00
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dc.w @NoSwap-@swaps ; offset to 040 PMMU swap routine <T2>
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2017-09-17 09:09:04 +00:00
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dc.w @NoSwap-@swaps ; future expansion
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dc.w @NoSwap-@swaps ; future expansion
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;-----
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2017-09-20 11:58:54 +00:00
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; Swap32Only 7990 - null MMU swap, used when system has 32 bit addressing only
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2017-09-17 09:09:04 +00:00
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;
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; Entry:
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; d0.b 0 to set 24-bit mode, non-zero to set 32-bit mode.
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;
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; Exit:
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; MMU32Bit no change
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; d0.l always 1
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;---
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Swap32Only
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moveq #1,D0 ;always return 32 bit
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rts
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;-----
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; Swap030 - switches 030 PMMU between 24 & 32 bit modes.
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;
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; Entry
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; d0.b 0 to set 24-bit mode, non-zero to set 32-bit mode.
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;
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; Exit
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; MMU32Bit updated with passed value of d0
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; d0.l has previous value of MMU32Bit
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; MMU is switched into the desired mode
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;
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; Trashes:
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; d1/a0
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;---
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Swap030 move.b d0,d1 ; check what mode we are going to, set up d1
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bne.s @to32 ; IF we want 24 bit mode
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moveq #0,d0 ; clear return register
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move.b MMU32bit,d0 ; see what mode we're in now
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beq.s @endif ; IF in 32 bit mode now
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move.l MMU24Info,a0 ; get ptr to 24 bit mode info
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bra.s @swap ; go to common swap code
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; ENDIF
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@to32 ; ELSE (we want 32 bit mode)
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moveq #0,d0 ; clear return register
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move.b MMU32bit,d0 ; see what mode we're in now
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bne.s @endif ; IF in 24 bit mode
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move.l MMU32Info,a0 ; get ptr to 32 bit mode info
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@swap move sr,-(sp) ; save current interrupt status
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ori #HiIntMask,sr ; disable interrupts during switch
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ploadr #5,theTC(a0) ; ensure that tc load won't cause table walk
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; NOTE: following 2 instr's must not cross
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; . a page boundary, or table walk will occur
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; . with crp & tc in an inconsistent state
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pmovefd theTT0(a0),tt0 ; load the transparent translation regs <H4><SM9>
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pmovefd theTT1(a0),tt1 ; . BEFORE we swap modes! <H4><SM9>
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pmovefd theCRP(a0),crp ; set crp, keep ATC cool for next instrunction
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pmove theTC(a0),tc ; fire up the TC, flush ATC
|
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|
move.b d1,MMU32Bit ; update global w/new mode flag
|
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|
|
movec cacr,d1 ; get cache control register
|
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|
|
ori.w #$0808,d1 ; set 'flush' bits
|
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|
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movec d1,cacr ; flush both caches
|
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|
|
pflusha ; flush the ATC entries <T6>
|
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|
|
|
move (sp)+,sr ; restore interrupt mask
|
|
|
|
|
|
; ENDIF
|
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|
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|
|
@endif ; ENDIF
|
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|
|
rts
|
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|
|
;---------------------------------------------------
|
2017-09-20 11:58:54 +00:00
|
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|
|
; MMU switch code, for Unix & Pink. 79ec
|
2017-09-17 09:09:04 +00:00
|
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|
|
;
|
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|
|
; Turns off the MMU, flushes ATC, then re-enables the MMU with passed info.
|
|
|
|
|
|
;
|
|
|
|
|
|
; Entry:
|
|
|
|
|
|
; a0 - physical address of MMUConfigInfo record (accessed w/MMU turned off)
|
|
|
|
|
|
; a1 - return address (used after MMU has been turned on w/new configuration)
|
|
|
|
|
|
;
|
|
|
|
|
|
; Trashes d0, d1, a2
|
|
|
|
|
|
;
|
|
|
|
|
|
; The 040 MMU/Cache accessed differently than 020/030
|
|
|
|
|
|
;
|
|
|
|
|
|
; 040 CACR looks like: 040 TC looks like:
|
|
|
|
|
|
; +--------------------------+ +--------------------------------+
|
|
|
|
|
|
; | DE | 0...0 | IE | 0...0 | | Enable | PageSize | .... |
|
|
|
|
|
|
; +--------------------------+ +--------------------------------+
|
|
|
|
|
|
; 31 15 0 15 14 <Reserved> 0
|
|
|
|
|
|
;
|
|
|
|
|
|
; DE Data Cache Enable Enable Enable Address Translations ( = 1 )
|
|
|
|
|
|
; IE Instruction Cache Enable PageSize Memory page size ( 0 = 4K, 1 = 8K )
|
|
|
|
|
|
;
|
|
|
|
|
|
;---------------------------------------------------
|
|
|
|
|
|
|
|
|
|
|
|
SwitchMMU
|
|
|
|
|
|
|
|
|
|
|
|
@isNot040 movec cacr,d0 ; get 020/030 cache control reg
|
|
|
|
|
|
move.w d0,d1 ; save it
|
|
|
|
|
|
andi #$FEFE,d0 ; clear cache enable bits
|
|
|
|
|
|
movec d0,cacr ; disable instruction/data caches
|
|
|
|
|
|
lea TCOff,a2 ; point at a TC=0
|
|
|
|
|
|
pmove (a2),tc ; turn off the MMU
|
|
|
|
|
|
pflusha ; flush translation cache
|
|
|
|
|
|
pmove theCRP(a0),crp ; set up the crp
|
|
|
|
|
|
pmove theTC(a0),tc ; and the tc
|
|
|
|
|
|
ori.w #$0808,d1 ; set the flush bits in old cache control reg
|
|
|
|
|
|
movec d1,cacr ; re-enable & flush caches
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
@allDone jmp (a1) ; back to the regularly scheduled program
|
|
|
|
|
|
|
|
|
|
|
|
TCOff dc.l 0 ; for turning off MMU
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
ENDWITH ; {MMUConfigInfo}
|
|
|
|
|
|
ENDWITH ; {BootGlobs}
|
|
|
|
|
|
|
|
|
|
|
|
ENDPROC
|
|
|
|
|
|
END
|
|
|
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|
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|
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|
|
|
