mpw/cpu/CpuModule_Data.h

#pragma once

typedef void (*cpuInstructionFunction)(uint32_t*);
typedef struct cpu_data_struct
{
	cpuInstructionFunction instruction_func;
	uint32_t data[3];
} cpuOpcodeData;

cpuOpcodeData cpu_opcode_data[65536] = {
{ORI_0000,{0U,0U,0U}},
{ORI_0000,{1U,0U,0U}},
{ORI_0000,{2U,0U,0U}},
{ORI_0000,{3U,0U,0U}},
{ORI_0000,{4U,0U,0U}},
{ORI_0000,{5U,0U,0U}},
{ORI_0000,{6U,0U,0U}},
{ORI_0000,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ORI_0010,{0U,0U,0U}},
{ORI_0010,{1U,0U,0U}},
{ORI_0010,{2U,0U,0U}},
{ORI_0010,{3U,0U,0U}},
{ORI_0010,{4U,0U,0U}},
{ORI_0010,{5U,0U,0U}},
{ORI_0010,{6U,0U,0U}},
{ORI_0010,{7U,0U,0U}},
{ORI_0018,{0U,0U,0U}},
{ORI_0018,{1U,0U,0U}},
{ORI_0018,{2U,0U,0U}},
{ORI_0018,{3U,0U,0U}},
{ORI_0018,{4U,0U,0U}},
{ORI_0018,{5U,0U,0U}},
{ORI_0018,{6U,0U,0U}},
{ORI_0018,{7U,0U,0U}},
{ORI_0020,{0U,0U,0U}},
{ORI_0020,{1U,0U,0U}},
{ORI_0020,{2U,0U,0U}},
{ORI_0020,{3U,0U,0U}},
{ORI_0020,{4U,0U,0U}},
{ORI_0020,{5U,0U,0U}},
{ORI_0020,{6U,0U,0U}},
{ORI_0020,{7U,0U,0U}},
{ORI_0028,{0U,0U,0U}},
{ORI_0028,{1U,0U,0U}},
{ORI_0028,{2U,0U,0U}},
{ORI_0028,{3U,0U,0U}},
{ORI_0028,{4U,0U,0U}},
{ORI_0028,{5U,0U,0U}},
{ORI_0028,{6U,0U,0U}},
{ORI_0028,{7U,0U,0U}},
{ORI_0030,{0U,0U,0U}},
{ORI_0030,{1U,0U,0U}},
{ORI_0030,{2U,0U,0U}},
{ORI_0030,{3U,0U,0U}},
{ORI_0030,{4U,0U,0U}},
{ORI_0030,{5U,0U,0U}},
{ORI_0030,{6U,0U,0U}},
{ORI_0030,{7U,0U,0U}},
{ORI_0038,{0U,0U,0U}},
{ORI_0039,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ORI_003C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ORI_0040,{0U,0U,0U}},
{ORI_0040,{1U,0U,0U}},
{ORI_0040,{2U,0U,0U}},
{ORI_0040,{3U,0U,0U}},
{ORI_0040,{4U,0U,0U}},
{ORI_0040,{5U,0U,0U}},
{ORI_0040,{6U,0U,0U}},
{ORI_0040,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ORI_0050,{0U,0U,0U}},
{ORI_0050,{1U,0U,0U}},
{ORI_0050,{2U,0U,0U}},
{ORI_0050,{3U,0U,0U}},
{ORI_0050,{4U,0U,0U}},
{ORI_0050,{5U,0U,0U}},
{ORI_0050,{6U,0U,0U}},
{ORI_0050,{7U,0U,0U}},
{ORI_0058,{0U,0U,0U}},
{ORI_0058,{1U,0U,0U}},
{ORI_0058,{2U,0U,0U}},
{ORI_0058,{3U,0U,0U}},
{ORI_0058,{4U,0U,0U}},
{ORI_0058,{5U,0U,0U}},
{ORI_0058,{6U,0U,0U}},
{ORI_0058,{7U,0U,0U}},
{ORI_0060,{0U,0U,0U}},
{ORI_0060,{1U,0U,0U}},
{ORI_0060,{2U,0U,0U}},
{ORI_0060,{3U,0U,0U}},
{ORI_0060,{4U,0U,0U}},
{ORI_0060,{5U,0U,0U}},
{ORI_0060,{6U,0U,0U}},
{ORI_0060,{7U,0U,0U}},
{ORI_0068,{0U,0U,0U}},
{ORI_0068,{1U,0U,0U}},
{ORI_0068,{2U,0U,0U}},
{ORI_0068,{3U,0U,0U}},
{ORI_0068,{4U,0U,0U}},
{ORI_0068,{5U,0U,0U}},
{ORI_0068,{6U,0U,0U}},
{ORI_0068,{7U,0U,0U}},
{ORI_0070,{0U,0U,0U}},
{ORI_0070,{1U,0U,0U}},
{ORI_0070,{2U,0U,0U}},
{ORI_0070,{3U,0U,0U}},
{ORI_0070,{4U,0U,0U}},
{ORI_0070,{5U,0U,0U}},
{ORI_0070,{6U,0U,0U}},
{ORI_0070,{7U,0U,0U}},
{ORI_0078,{0U,0U,0U}},
{ORI_0079,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ORI_007C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ORI_0080,{0U,0U,0U}},
{ORI_0080,{1U,0U,0U}},
{ORI_0080,{2U,0U,0U}},
{ORI_0080,{3U,0U,0U}},
{ORI_0080,{4U,0U,0U}},
{ORI_0080,{5U,0U,0U}},
{ORI_0080,{6U,0U,0U}},
{ORI_0080,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ORI_0090,{0U,0U,0U}},
{ORI_0090,{1U,0U,0U}},
{ORI_0090,{2U,0U,0U}},
{ORI_0090,{3U,0U,0U}},
{ORI_0090,{4U,0U,0U}},
{ORI_0090,{5U,0U,0U}},
{ORI_0090,{6U,0U,0U}},
{ORI_0090,{7U,0U,0U}},
{ORI_0098,{0U,0U,0U}},
{ORI_0098,{1U,0U,0U}},
{ORI_0098,{2U,0U,0U}},
{ORI_0098,{3U,0U,0U}},
{ORI_0098,{4U,0U,0U}},
{ORI_0098,{5U,0U,0U}},
{ORI_0098,{6U,0U,0U}},
{ORI_0098,{7U,0U,0U}},
{ORI_00A0,{0U,0U,0U}},
{ORI_00A0,{1U,0U,0U}},
{ORI_00A0,{2U,0U,0U}},
{ORI_00A0,{3U,0U,0U}},
{ORI_00A0,{4U,0U,0U}},
{ORI_00A0,{5U,0U,0U}},
{ORI_00A0,{6U,0U,0U}},
{ORI_00A0,{7U,0U,0U}},
{ORI_00A8,{0U,0U,0U}},
{ORI_00A8,{1U,0U,0U}},
{ORI_00A8,{2U,0U,0U}},
{ORI_00A8,{3U,0U,0U}},
{ORI_00A8,{4U,0U,0U}},
{ORI_00A8,{5U,0U,0U}},
{ORI_00A8,{6U,0U,0U}},
{ORI_00A8,{7U,0U,0U}},
{ORI_00B0,{0U,0U,0U}},
{ORI_00B0,{1U,0U,0U}},
{ORI_00B0,{2U,0U,0U}},
{ORI_00B0,{3U,0U,0U}},
{ORI_00B0,{4U,0U,0U}},
{ORI_00B0,{5U,0U,0U}},
{ORI_00B0,{6U,0U,0U}},
{ORI_00B0,{7U,0U,0U}},
{ORI_00B8,{0U,0U,0U}},
{ORI_00B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHKCMP2_00D0,{0U,0U,0U}},
{CHKCMP2_00D0,{1U,0U,0U}},
{CHKCMP2_00D0,{2U,0U,0U}},
{CHKCMP2_00D0,{3U,0U,0U}},
{CHKCMP2_00D0,{4U,0U,0U}},
{CHKCMP2_00D0,{5U,0U,0U}},
{CHKCMP2_00D0,{6U,0U,0U}},
{CHKCMP2_00D0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHKCMP2_00E8,{0U,0U,0U}},
{CHKCMP2_00E8,{1U,0U,0U}},
{CHKCMP2_00E8,{2U,0U,0U}},
{CHKCMP2_00E8,{3U,0U,0U}},
{CHKCMP2_00E8,{4U,0U,0U}},
{CHKCMP2_00E8,{5U,0U,0U}},
{CHKCMP2_00E8,{6U,0U,0U}},
{CHKCMP2_00E8,{7U,0U,0U}},
{CHKCMP2_00F0,{0U,0U,0U}},
{CHKCMP2_00F0,{1U,0U,0U}},
{CHKCMP2_00F0,{2U,0U,0U}},
{CHKCMP2_00F0,{3U,0U,0U}},
{CHKCMP2_00F0,{4U,0U,0U}},
{CHKCMP2_00F0,{5U,0U,0U}},
{CHKCMP2_00F0,{6U,0U,0U}},
{CHKCMP2_00F0,{7U,0U,0U}},
{CHKCMP2_00F8,{0U,0U,0U}},
{CHKCMP2_00F9,{0U,0U,0U}},
{CHKCMP2_00FA,{0U,0U,0U}},
{CHKCMP2_00FB,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BTST_0100,{0U,0U,0U}},
{BTST_0100,{1U,0U,0U}},
{BTST_0100,{2U,0U,0U}},
{BTST_0100,{3U,0U,0U}},
{BTST_0100,{4U,0U,0U}},
{BTST_0100,{5U,0U,0U}},
{BTST_0100,{6U,0U,0U}},
{BTST_0100,{7U,0U,0U}},
{MOVEP_0108,{0U,0U,0U}},
{MOVEP_0108,{0U,1U,0U}},
{MOVEP_0108,{0U,2U,0U}},
{MOVEP_0108,{0U,3U,0U}},
{MOVEP_0108,{0U,4U,0U}},
{MOVEP_0108,{0U,5U,0U}},
{MOVEP_0108,{0U,6U,0U}},
{MOVEP_0108,{0U,7U,0U}},
{BTST_0110,{0U,0U,0U}},
{BTST_0110,{1U,0U,0U}},
{BTST_0110,{2U,0U,0U}},
{BTST_0110,{3U,0U,0U}},
{BTST_0110,{4U,0U,0U}},
{BTST_0110,{5U,0U,0U}},
{BTST_0110,{6U,0U,0U}},
{BTST_0110,{7U,0U,0U}},
{BTST_0118,{0U,0U,0U}},
{BTST_0118,{1U,0U,0U}},
{BTST_0118,{2U,0U,0U}},
{BTST_0118,{3U,0U,0U}},
{BTST_0118,{4U,0U,0U}},
{BTST_0118,{5U,0U,0U}},
{BTST_0118,{6U,0U,0U}},
{BTST_0118,{7U,0U,0U}},
{BTST_0120,{0U,0U,0U}},
{BTST_0120,{1U,0U,0U}},
{BTST_0120,{2U,0U,0U}},
{BTST_0120,{3U,0U,0U}},
{BTST_0120,{4U,0U,0U}},
{BTST_0120,{5U,0U,0U}},
{BTST_0120,{6U,0U,0U}},
{BTST_0120,{7U,0U,0U}},
{BTST_0128,{0U,0U,0U}},
{BTST_0128,{1U,0U,0U}},
{BTST_0128,{2U,0U,0U}},
{BTST_0128,{3U,0U,0U}},
{BTST_0128,{4U,0U,0U}},
{BTST_0128,{5U,0U,0U}},
{BTST_0128,{6U,0U,0U}},
{BTST_0128,{7U,0U,0U}},
{BTST_0130,{0U,0U,0U}},
{BTST_0130,{1U,0U,0U}},
{BTST_0130,{2U,0U,0U}},
{BTST_0130,{3U,0U,0U}},
{BTST_0130,{4U,0U,0U}},
{BTST_0130,{5U,0U,0U}},
{BTST_0130,{6U,0U,0U}},
{BTST_0130,{7U,0U,0U}},
{BTST_0138,{0U,0U,0U}},
{BTST_0139,{0U,0U,0U}},
{BTST_013A,{0U,0U,0U}},
{BTST_013B,{0U,0U,0U}},
{BTST_013C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCHG_0140,{0U,0U,0U}},
{BCHG_0140,{1U,0U,0U}},
{BCHG_0140,{2U,0U,0U}},
{BCHG_0140,{3U,0U,0U}},
{BCHG_0140,{4U,0U,0U}},
{BCHG_0140,{5U,0U,0U}},
{BCHG_0140,{6U,0U,0U}},
{BCHG_0140,{7U,0U,0U}},
{MOVEP_0148,{0U,0U,0U}},
{MOVEP_0148,{0U,1U,0U}},
{MOVEP_0148,{0U,2U,0U}},
{MOVEP_0148,{0U,3U,0U}},
{MOVEP_0148,{0U,4U,0U}},
{MOVEP_0148,{0U,5U,0U}},
{MOVEP_0148,{0U,6U,0U}},
{MOVEP_0148,{0U,7U,0U}},
{BCHG_0150,{0U,0U,0U}},
{BCHG_0150,{1U,0U,0U}},
{BCHG_0150,{2U,0U,0U}},
{BCHG_0150,{3U,0U,0U}},
{BCHG_0150,{4U,0U,0U}},
{BCHG_0150,{5U,0U,0U}},
{BCHG_0150,{6U,0U,0U}},
{BCHG_0150,{7U,0U,0U}},
{BCHG_0158,{0U,0U,0U}},
{BCHG_0158,{1U,0U,0U}},
{BCHG_0158,{2U,0U,0U}},
{BCHG_0158,{3U,0U,0U}},
{BCHG_0158,{4U,0U,0U}},
{BCHG_0158,{5U,0U,0U}},
{BCHG_0158,{6U,0U,0U}},
{BCHG_0158,{7U,0U,0U}},
{BCHG_0160,{0U,0U,0U}},
{BCHG_0160,{1U,0U,0U}},
{BCHG_0160,{2U,0U,0U}},
{BCHG_0160,{3U,0U,0U}},
{BCHG_0160,{4U,0U,0U}},
{BCHG_0160,{5U,0U,0U}},
{BCHG_0160,{6U,0U,0U}},
{BCHG_0160,{7U,0U,0U}},
{BCHG_0168,{0U,0U,0U}},
{BCHG_0168,{1U,0U,0U}},
{BCHG_0168,{2U,0U,0U}},
{BCHG_0168,{3U,0U,0U}},
{BCHG_0168,{4U,0U,0U}},
{BCHG_0168,{5U,0U,0U}},
{BCHG_0168,{6U,0U,0U}},
{BCHG_0168,{7U,0U,0U}},
{BCHG_0170,{0U,0U,0U}},
{BCHG_0170,{1U,0U,0U}},
{BCHG_0170,{2U,0U,0U}},
{BCHG_0170,{3U,0U,0U}},
{BCHG_0170,{4U,0U,0U}},
{BCHG_0170,{5U,0U,0U}},
{BCHG_0170,{6U,0U,0U}},
{BCHG_0170,{7U,0U,0U}},
{BCHG_0178,{0U,0U,0U}},
{BCHG_0179,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCLR_0180,{0U,0U,0U}},
{BCLR_0180,{1U,0U,0U}},
{BCLR_0180,{2U,0U,0U}},
{BCLR_0180,{3U,0U,0U}},
{BCLR_0180,{4U,0U,0U}},
{BCLR_0180,{5U,0U,0U}},
{BCLR_0180,{6U,0U,0U}},
{BCLR_0180,{7U,0U,0U}},
{MOVEP_0188,{0U,0U,0U}},
{MOVEP_0188,{0U,1U,0U}},
{MOVEP_0188,{0U,2U,0U}},
{MOVEP_0188,{0U,3U,0U}},
{MOVEP_0188,{0U,4U,0U}},
{MOVEP_0188,{0U,5U,0U}},
{MOVEP_0188,{0U,6U,0U}},
{MOVEP_0188,{0U,7U,0U}},
{BCLR_0190,{0U,0U,0U}},
{BCLR_0190,{1U,0U,0U}},
{BCLR_0190,{2U,0U,0U}},
{BCLR_0190,{3U,0U,0U}},
{BCLR_0190,{4U,0U,0U}},
{BCLR_0190,{5U,0U,0U}},
{BCLR_0190,{6U,0U,0U}},
{BCLR_0190,{7U,0U,0U}},
{BCLR_0198,{0U,0U,0U}},
{BCLR_0198,{1U,0U,0U}},
{BCLR_0198,{2U,0U,0U}},
{BCLR_0198,{3U,0U,0U}},
{BCLR_0198,{4U,0U,0U}},
{BCLR_0198,{5U,0U,0U}},
{BCLR_0198,{6U,0U,0U}},
{BCLR_0198,{7U,0U,0U}},
{BCLR_01A0,{0U,0U,0U}},
{BCLR_01A0,{1U,0U,0U}},
{BCLR_01A0,{2U,0U,0U}},
{BCLR_01A0,{3U,0U,0U}},
{BCLR_01A0,{4U,0U,0U}},
{BCLR_01A0,{5U,0U,0U}},
{BCLR_01A0,{6U,0U,0U}},
{BCLR_01A0,{7U,0U,0U}},
{BCLR_01A8,{0U,0U,0U}},
{BCLR_01A8,{1U,0U,0U}},
{BCLR_01A8,{2U,0U,0U}},
{BCLR_01A8,{3U,0U,0U}},
{BCLR_01A8,{4U,0U,0U}},
{BCLR_01A8,{5U,0U,0U}},
{BCLR_01A8,{6U,0U,0U}},
{BCLR_01A8,{7U,0U,0U}},
{BCLR_01B0,{0U,0U,0U}},
{BCLR_01B0,{1U,0U,0U}},
{BCLR_01B0,{2U,0U,0U}},
{BCLR_01B0,{3U,0U,0U}},
{BCLR_01B0,{4U,0U,0U}},
{BCLR_01B0,{5U,0U,0U}},
{BCLR_01B0,{6U,0U,0U}},
{BCLR_01B0,{7U,0U,0U}},
{BCLR_01B8,{0U,0U,0U}},
{BCLR_01B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BSET_01C0,{0U,0U,0U}},
{BSET_01C0,{1U,0U,0U}},
{BSET_01C0,{2U,0U,0U}},
{BSET_01C0,{3U,0U,0U}},
{BSET_01C0,{4U,0U,0U}},
{BSET_01C0,{5U,0U,0U}},
{BSET_01C0,{6U,0U,0U}},
{BSET_01C0,{7U,0U,0U}},
{MOVEP_01C8,{0U,0U,0U}},
{MOVEP_01C8,{0U,1U,0U}},
{MOVEP_01C8,{0U,2U,0U}},
{MOVEP_01C8,{0U,3U,0U}},
{MOVEP_01C8,{0U,4U,0U}},
{MOVEP_01C8,{0U,5U,0U}},
{MOVEP_01C8,{0U,6U,0U}},
{MOVEP_01C8,{0U,7U,0U}},
{BSET_01D0,{0U,0U,0U}},
{BSET_01D0,{1U,0U,0U}},
{BSET_01D0,{2U,0U,0U}},
{BSET_01D0,{3U,0U,0U}},
{BSET_01D0,{4U,0U,0U}},
{BSET_01D0,{5U,0U,0U}},
{BSET_01D0,{6U,0U,0U}},
{BSET_01D0,{7U,0U,0U}},
{BSET_01D8,{0U,0U,0U}},
{BSET_01D8,{1U,0U,0U}},
{BSET_01D8,{2U,0U,0U}},
{BSET_01D8,{3U,0U,0U}},
{BSET_01D8,{4U,0U,0U}},
{BSET_01D8,{5U,0U,0U}},
{BSET_01D8,{6U,0U,0U}},
{BSET_01D8,{7U,0U,0U}},
{BSET_01E0,{0U,0U,0U}},
{BSET_01E0,{1U,0U,0U}},
{BSET_01E0,{2U,0U,0U}},
{BSET_01E0,{3U,0U,0U}},
{BSET_01E0,{4U,0U,0U}},
{BSET_01E0,{5U,0U,0U}},
{BSET_01E0,{6U,0U,0U}},
{BSET_01E0,{7U,0U,0U}},
{BSET_01E8,{0U,0U,0U}},
{BSET_01E8,{1U,0U,0U}},
{BSET_01E8,{2U,0U,0U}},
{BSET_01E8,{3U,0U,0U}},
{BSET_01E8,{4U,0U,0U}},
{BSET_01E8,{5U,0U,0U}},
{BSET_01E8,{6U,0U,0U}},
{BSET_01E8,{7U,0U,0U}},
{BSET_01F0,{0U,0U,0U}},
{BSET_01F0,{1U,0U,0U}},
{BSET_01F0,{2U,0U,0U}},
{BSET_01F0,{3U,0U,0U}},
{BSET_01F0,{4U,0U,0U}},
{BSET_01F0,{5U,0U,0U}},
{BSET_01F0,{6U,0U,0U}},
{BSET_01F0,{7U,0U,0U}},
{BSET_01F8,{0U,0U,0U}},
{BSET_01F9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ANDI_0200,{0U,0U,0U}},
{ANDI_0200,{1U,0U,0U}},
{ANDI_0200,{2U,0U,0U}},
{ANDI_0200,{3U,0U,0U}},
{ANDI_0200,{4U,0U,0U}},
{ANDI_0200,{5U,0U,0U}},
{ANDI_0200,{6U,0U,0U}},
{ANDI_0200,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ANDI_0210,{0U,0U,0U}},
{ANDI_0210,{1U,0U,0U}},
{ANDI_0210,{2U,0U,0U}},
{ANDI_0210,{3U,0U,0U}},
{ANDI_0210,{4U,0U,0U}},
{ANDI_0210,{5U,0U,0U}},
{ANDI_0210,{6U,0U,0U}},
{ANDI_0210,{7U,0U,0U}},
{ANDI_0218,{0U,0U,0U}},
{ANDI_0218,{1U,0U,0U}},
{ANDI_0218,{2U,0U,0U}},
{ANDI_0218,{3U,0U,0U}},
{ANDI_0218,{4U,0U,0U}},
{ANDI_0218,{5U,0U,0U}},
{ANDI_0218,{6U,0U,0U}},
{ANDI_0218,{7U,0U,0U}},
{ANDI_0220,{0U,0U,0U}},
{ANDI_0220,{1U,0U,0U}},
{ANDI_0220,{2U,0U,0U}},
{ANDI_0220,{3U,0U,0U}},
{ANDI_0220,{4U,0U,0U}},
{ANDI_0220,{5U,0U,0U}},
{ANDI_0220,{6U,0U,0U}},
{ANDI_0220,{7U,0U,0U}},
{ANDI_0228,{0U,0U,0U}},
{ANDI_0228,{1U,0U,0U}},
{ANDI_0228,{2U,0U,0U}},
{ANDI_0228,{3U,0U,0U}},
{ANDI_0228,{4U,0U,0U}},
{ANDI_0228,{5U,0U,0U}},
{ANDI_0228,{6U,0U,0U}},
{ANDI_0228,{7U,0U,0U}},
{ANDI_0230,{0U,0U,0U}},
{ANDI_0230,{1U,0U,0U}},
{ANDI_0230,{2U,0U,0U}},
{ANDI_0230,{3U,0U,0U}},
{ANDI_0230,{4U,0U,0U}},
{ANDI_0230,{5U,0U,0U}},
{ANDI_0230,{6U,0U,0U}},
{ANDI_0230,{7U,0U,0U}},
{ANDI_0238,{0U,0U,0U}},
{ANDI_0239,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ANDI_023C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ANDI_0240,{0U,0U,0U}},
{ANDI_0240,{1U,0U,0U}},
{ANDI_0240,{2U,0U,0U}},
{ANDI_0240,{3U,0U,0U}},
{ANDI_0240,{4U,0U,0U}},
{ANDI_0240,{5U,0U,0U}},
{ANDI_0240,{6U,0U,0U}},
{ANDI_0240,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ANDI_0250,{0U,0U,0U}},
{ANDI_0250,{1U,0U,0U}},
{ANDI_0250,{2U,0U,0U}},
{ANDI_0250,{3U,0U,0U}},
{ANDI_0250,{4U,0U,0U}},
{ANDI_0250,{5U,0U,0U}},
{ANDI_0250,{6U,0U,0U}},
{ANDI_0250,{7U,0U,0U}},
{ANDI_0258,{0U,0U,0U}},
{ANDI_0258,{1U,0U,0U}},
{ANDI_0258,{2U,0U,0U}},
{ANDI_0258,{3U,0U,0U}},
{ANDI_0258,{4U,0U,0U}},
{ANDI_0258,{5U,0U,0U}},
{ANDI_0258,{6U,0U,0U}},
{ANDI_0258,{7U,0U,0U}},
{ANDI_0260,{0U,0U,0U}},
{ANDI_0260,{1U,0U,0U}},
{ANDI_0260,{2U,0U,0U}},
{ANDI_0260,{3U,0U,0U}},
{ANDI_0260,{4U,0U,0U}},
{ANDI_0260,{5U,0U,0U}},
{ANDI_0260,{6U,0U,0U}},
{ANDI_0260,{7U,0U,0U}},
{ANDI_0268,{0U,0U,0U}},
{ANDI_0268,{1U,0U,0U}},
{ANDI_0268,{2U,0U,0U}},
{ANDI_0268,{3U,0U,0U}},
{ANDI_0268,{4U,0U,0U}},
{ANDI_0268,{5U,0U,0U}},
{ANDI_0268,{6U,0U,0U}},
{ANDI_0268,{7U,0U,0U}},
{ANDI_0270,{0U,0U,0U}},
{ANDI_0270,{1U,0U,0U}},
{ANDI_0270,{2U,0U,0U}},
{ANDI_0270,{3U,0U,0U}},
{ANDI_0270,{4U,0U,0U}},
{ANDI_0270,{5U,0U,0U}},
{ANDI_0270,{6U,0U,0U}},
{ANDI_0270,{7U,0U,0U}},
{ANDI_0278,{0U,0U,0U}},
{ANDI_0279,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ANDI_027C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ANDI_0280,{0U,0U,0U}},
{ANDI_0280,{1U,0U,0U}},
{ANDI_0280,{2U,0U,0U}},
{ANDI_0280,{3U,0U,0U}},
{ANDI_0280,{4U,0U,0U}},
{ANDI_0280,{5U,0U,0U}},
{ANDI_0280,{6U,0U,0U}},
{ANDI_0280,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ANDI_0290,{0U,0U,0U}},
{ANDI_0290,{1U,0U,0U}},
{ANDI_0290,{2U,0U,0U}},
{ANDI_0290,{3U,0U,0U}},
{ANDI_0290,{4U,0U,0U}},
{ANDI_0290,{5U,0U,0U}},
{ANDI_0290,{6U,0U,0U}},
{ANDI_0290,{7U,0U,0U}},
{ANDI_0298,{0U,0U,0U}},
{ANDI_0298,{1U,0U,0U}},
{ANDI_0298,{2U,0U,0U}},
{ANDI_0298,{3U,0U,0U}},
{ANDI_0298,{4U,0U,0U}},
{ANDI_0298,{5U,0U,0U}},
{ANDI_0298,{6U,0U,0U}},
{ANDI_0298,{7U,0U,0U}},
{ANDI_02A0,{0U,0U,0U}},
{ANDI_02A0,{1U,0U,0U}},
{ANDI_02A0,{2U,0U,0U}},
{ANDI_02A0,{3U,0U,0U}},
{ANDI_02A0,{4U,0U,0U}},
{ANDI_02A0,{5U,0U,0U}},
{ANDI_02A0,{6U,0U,0U}},
{ANDI_02A0,{7U,0U,0U}},
{ANDI_02A8,{0U,0U,0U}},
{ANDI_02A8,{1U,0U,0U}},
{ANDI_02A8,{2U,0U,0U}},
{ANDI_02A8,{3U,0U,0U}},
{ANDI_02A8,{4U,0U,0U}},
{ANDI_02A8,{5U,0U,0U}},
{ANDI_02A8,{6U,0U,0U}},
{ANDI_02A8,{7U,0U,0U}},
{ANDI_02B0,{0U,0U,0U}},
{ANDI_02B0,{1U,0U,0U}},
{ANDI_02B0,{2U,0U,0U}},
{ANDI_02B0,{3U,0U,0U}},
{ANDI_02B0,{4U,0U,0U}},
{ANDI_02B0,{5U,0U,0U}},
{ANDI_02B0,{6U,0U,0U}},
{ANDI_02B0,{7U,0U,0U}},
{ANDI_02B8,{0U,0U,0U}},
{ANDI_02B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHKCMP2_02D0,{0U,0U,0U}},
{CHKCMP2_02D0,{1U,0U,0U}},
{CHKCMP2_02D0,{2U,0U,0U}},
{CHKCMP2_02D0,{3U,0U,0U}},
{CHKCMP2_02D0,{4U,0U,0U}},
{CHKCMP2_02D0,{5U,0U,0U}},
{CHKCMP2_02D0,{6U,0U,0U}},
{CHKCMP2_02D0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHKCMP2_02E8,{0U,0U,0U}},
{CHKCMP2_02E8,{1U,0U,0U}},
{CHKCMP2_02E8,{2U,0U,0U}},
{CHKCMP2_02E8,{3U,0U,0U}},
{CHKCMP2_02E8,{4U,0U,0U}},
{CHKCMP2_02E8,{5U,0U,0U}},
{CHKCMP2_02E8,{6U,0U,0U}},
{CHKCMP2_02E8,{7U,0U,0U}},
{CHKCMP2_02F0,{0U,0U,0U}},
{CHKCMP2_02F0,{1U,0U,0U}},
{CHKCMP2_02F0,{2U,0U,0U}},
{CHKCMP2_02F0,{3U,0U,0U}},
{CHKCMP2_02F0,{4U,0U,0U}},
{CHKCMP2_02F0,{5U,0U,0U}},
{CHKCMP2_02F0,{6U,0U,0U}},
{CHKCMP2_02F0,{7U,0U,0U}},
{CHKCMP2_02F8,{0U,0U,0U}},
{CHKCMP2_02F9,{0U,0U,0U}},
{CHKCMP2_02FA,{0U,0U,0U}},
{CHKCMP2_02FB,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BTST_0100,{0U,1U,0U}},
{BTST_0100,{1U,1U,0U}},
{BTST_0100,{2U,1U,0U}},
{BTST_0100,{3U,1U,0U}},
{BTST_0100,{4U,1U,0U}},
{BTST_0100,{5U,1U,0U}},
{BTST_0100,{6U,1U,0U}},
{BTST_0100,{7U,1U,0U}},
{MOVEP_0108,{1U,0U,0U}},
{MOVEP_0108,{1U,1U,0U}},
{MOVEP_0108,{1U,2U,0U}},
{MOVEP_0108,{1U,3U,0U}},
{MOVEP_0108,{1U,4U,0U}},
{MOVEP_0108,{1U,5U,0U}},
{MOVEP_0108,{1U,6U,0U}},
{MOVEP_0108,{1U,7U,0U}},
{BTST_0110,{0U,1U,0U}},
{BTST_0110,{1U,1U,0U}},
{BTST_0110,{2U,1U,0U}},
{BTST_0110,{3U,1U,0U}},
{BTST_0110,{4U,1U,0U}},
{BTST_0110,{5U,1U,0U}},
{BTST_0110,{6U,1U,0U}},
{BTST_0110,{7U,1U,0U}},
{BTST_0118,{0U,1U,0U}},
{BTST_0118,{1U,1U,0U}},
{BTST_0118,{2U,1U,0U}},
{BTST_0118,{3U,1U,0U}},
{BTST_0118,{4U,1U,0U}},
{BTST_0118,{5U,1U,0U}},
{BTST_0118,{6U,1U,0U}},
{BTST_0118,{7U,1U,0U}},
{BTST_0120,{0U,1U,0U}},
{BTST_0120,{1U,1U,0U}},
{BTST_0120,{2U,1U,0U}},
{BTST_0120,{3U,1U,0U}},
{BTST_0120,{4U,1U,0U}},
{BTST_0120,{5U,1U,0U}},
{BTST_0120,{6U,1U,0U}},
{BTST_0120,{7U,1U,0U}},
{BTST_0128,{0U,1U,0U}},
{BTST_0128,{1U,1U,0U}},
{BTST_0128,{2U,1U,0U}},
{BTST_0128,{3U,1U,0U}},
{BTST_0128,{4U,1U,0U}},
{BTST_0128,{5U,1U,0U}},
{BTST_0128,{6U,1U,0U}},
{BTST_0128,{7U,1U,0U}},
{BTST_0130,{0U,1U,0U}},
{BTST_0130,{1U,1U,0U}},
{BTST_0130,{2U,1U,0U}},
{BTST_0130,{3U,1U,0U}},
{BTST_0130,{4U,1U,0U}},
{BTST_0130,{5U,1U,0U}},
{BTST_0130,{6U,1U,0U}},
{BTST_0130,{7U,1U,0U}},
{BTST_0138,{0U,1U,0U}},
{BTST_0139,{0U,1U,0U}},
{BTST_013A,{0U,1U,0U}},
{BTST_013B,{0U,1U,0U}},
{BTST_013C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCHG_0140,{0U,1U,0U}},
{BCHG_0140,{1U,1U,0U}},
{BCHG_0140,{2U,1U,0U}},
{BCHG_0140,{3U,1U,0U}},
{BCHG_0140,{4U,1U,0U}},
{BCHG_0140,{5U,1U,0U}},
{BCHG_0140,{6U,1U,0U}},
{BCHG_0140,{7U,1U,0U}},
{MOVEP_0148,{1U,0U,0U}},
{MOVEP_0148,{1U,1U,0U}},
{MOVEP_0148,{1U,2U,0U}},
{MOVEP_0148,{1U,3U,0U}},
{MOVEP_0148,{1U,4U,0U}},
{MOVEP_0148,{1U,5U,0U}},
{MOVEP_0148,{1U,6U,0U}},
{MOVEP_0148,{1U,7U,0U}},
{BCHG_0150,{0U,1U,0U}},
{BCHG_0150,{1U,1U,0U}},
{BCHG_0150,{2U,1U,0U}},
{BCHG_0150,{3U,1U,0U}},
{BCHG_0150,{4U,1U,0U}},
{BCHG_0150,{5U,1U,0U}},
{BCHG_0150,{6U,1U,0U}},
{BCHG_0150,{7U,1U,0U}},
{BCHG_0158,{0U,1U,0U}},
{BCHG_0158,{1U,1U,0U}},
{BCHG_0158,{2U,1U,0U}},
{BCHG_0158,{3U,1U,0U}},
{BCHG_0158,{4U,1U,0U}},
{BCHG_0158,{5U,1U,0U}},
{BCHG_0158,{6U,1U,0U}},
{BCHG_0158,{7U,1U,0U}},
{BCHG_0160,{0U,1U,0U}},
{BCHG_0160,{1U,1U,0U}},
{BCHG_0160,{2U,1U,0U}},
{BCHG_0160,{3U,1U,0U}},
{BCHG_0160,{4U,1U,0U}},
{BCHG_0160,{5U,1U,0U}},
{BCHG_0160,{6U,1U,0U}},
{BCHG_0160,{7U,1U,0U}},
{BCHG_0168,{0U,1U,0U}},
{BCHG_0168,{1U,1U,0U}},
{BCHG_0168,{2U,1U,0U}},
{BCHG_0168,{3U,1U,0U}},
{BCHG_0168,{4U,1U,0U}},
{BCHG_0168,{5U,1U,0U}},
{BCHG_0168,{6U,1U,0U}},
{BCHG_0168,{7U,1U,0U}},
{BCHG_0170,{0U,1U,0U}},
{BCHG_0170,{1U,1U,0U}},
{BCHG_0170,{2U,1U,0U}},
{BCHG_0170,{3U,1U,0U}},
{BCHG_0170,{4U,1U,0U}},
{BCHG_0170,{5U,1U,0U}},
{BCHG_0170,{6U,1U,0U}},
{BCHG_0170,{7U,1U,0U}},
{BCHG_0178,{0U,1U,0U}},
{BCHG_0179,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCLR_0180,{0U,1U,0U}},
{BCLR_0180,{1U,1U,0U}},
{BCLR_0180,{2U,1U,0U}},
{BCLR_0180,{3U,1U,0U}},
{BCLR_0180,{4U,1U,0U}},
{BCLR_0180,{5U,1U,0U}},
{BCLR_0180,{6U,1U,0U}},
{BCLR_0180,{7U,1U,0U}},
{MOVEP_0188,{1U,0U,0U}},
{MOVEP_0188,{1U,1U,0U}},
{MOVEP_0188,{1U,2U,0U}},
{MOVEP_0188,{1U,3U,0U}},
{MOVEP_0188,{1U,4U,0U}},
{MOVEP_0188,{1U,5U,0U}},
{MOVEP_0188,{1U,6U,0U}},
{MOVEP_0188,{1U,7U,0U}},
{BCLR_0190,{0U,1U,0U}},
{BCLR_0190,{1U,1U,0U}},
{BCLR_0190,{2U,1U,0U}},
{BCLR_0190,{3U,1U,0U}},
{BCLR_0190,{4U,1U,0U}},
{BCLR_0190,{5U,1U,0U}},
{BCLR_0190,{6U,1U,0U}},
{BCLR_0190,{7U,1U,0U}},
{BCLR_0198,{0U,1U,0U}},
{BCLR_0198,{1U,1U,0U}},
{BCLR_0198,{2U,1U,0U}},
{BCLR_0198,{3U,1U,0U}},
{BCLR_0198,{4U,1U,0U}},
{BCLR_0198,{5U,1U,0U}},
{BCLR_0198,{6U,1U,0U}},
{BCLR_0198,{7U,1U,0U}},
{BCLR_01A0,{0U,1U,0U}},
{BCLR_01A0,{1U,1U,0U}},
{BCLR_01A0,{2U,1U,0U}},
{BCLR_01A0,{3U,1U,0U}},
{BCLR_01A0,{4U,1U,0U}},
{BCLR_01A0,{5U,1U,0U}},
{BCLR_01A0,{6U,1U,0U}},
{BCLR_01A0,{7U,1U,0U}},
{BCLR_01A8,{0U,1U,0U}},
{BCLR_01A8,{1U,1U,0U}},
{BCLR_01A8,{2U,1U,0U}},
{BCLR_01A8,{3U,1U,0U}},
{BCLR_01A8,{4U,1U,0U}},
{BCLR_01A8,{5U,1U,0U}},
{BCLR_01A8,{6U,1U,0U}},
{BCLR_01A8,{7U,1U,0U}},
{BCLR_01B0,{0U,1U,0U}},
{BCLR_01B0,{1U,1U,0U}},
{BCLR_01B0,{2U,1U,0U}},
{BCLR_01B0,{3U,1U,0U}},
{BCLR_01B0,{4U,1U,0U}},
{BCLR_01B0,{5U,1U,0U}},
{BCLR_01B0,{6U,1U,0U}},
{BCLR_01B0,{7U,1U,0U}},
{BCLR_01B8,{0U,1U,0U}},
{BCLR_01B9,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BSET_01C0,{0U,1U,0U}},
{BSET_01C0,{1U,1U,0U}},
{BSET_01C0,{2U,1U,0U}},
{BSET_01C0,{3U,1U,0U}},
{BSET_01C0,{4U,1U,0U}},
{BSET_01C0,{5U,1U,0U}},
{BSET_01C0,{6U,1U,0U}},
{BSET_01C0,{7U,1U,0U}},
{MOVEP_01C8,{1U,0U,0U}},
{MOVEP_01C8,{1U,1U,0U}},
{MOVEP_01C8,{1U,2U,0U}},
{MOVEP_01C8,{1U,3U,0U}},
{MOVEP_01C8,{1U,4U,0U}},
{MOVEP_01C8,{1U,5U,0U}},
{MOVEP_01C8,{1U,6U,0U}},
{MOVEP_01C8,{1U,7U,0U}},
{BSET_01D0,{0U,1U,0U}},
{BSET_01D0,{1U,1U,0U}},
{BSET_01D0,{2U,1U,0U}},
{BSET_01D0,{3U,1U,0U}},
{BSET_01D0,{4U,1U,0U}},
{BSET_01D0,{5U,1U,0U}},
{BSET_01D0,{6U,1U,0U}},
{BSET_01D0,{7U,1U,0U}},
{BSET_01D8,{0U,1U,0U}},
{BSET_01D8,{1U,1U,0U}},
{BSET_01D8,{2U,1U,0U}},
{BSET_01D8,{3U,1U,0U}},
{BSET_01D8,{4U,1U,0U}},
{BSET_01D8,{5U,1U,0U}},
{BSET_01D8,{6U,1U,0U}},
{BSET_01D8,{7U,1U,0U}},
{BSET_01E0,{0U,1U,0U}},
{BSET_01E0,{1U,1U,0U}},
{BSET_01E0,{2U,1U,0U}},
{BSET_01E0,{3U,1U,0U}},
{BSET_01E0,{4U,1U,0U}},
{BSET_01E0,{5U,1U,0U}},
{BSET_01E0,{6U,1U,0U}},
{BSET_01E0,{7U,1U,0U}},
{BSET_01E8,{0U,1U,0U}},
{BSET_01E8,{1U,1U,0U}},
{BSET_01E8,{2U,1U,0U}},
{BSET_01E8,{3U,1U,0U}},
{BSET_01E8,{4U,1U,0U}},
{BSET_01E8,{5U,1U,0U}},
{BSET_01E8,{6U,1U,0U}},
{BSET_01E8,{7U,1U,0U}},
{BSET_01F0,{0U,1U,0U}},
{BSET_01F0,{1U,1U,0U}},
{BSET_01F0,{2U,1U,0U}},
{BSET_01F0,{3U,1U,0U}},
{BSET_01F0,{4U,1U,0U}},
{BSET_01F0,{5U,1U,0U}},
{BSET_01F0,{6U,1U,0U}},
{BSET_01F0,{7U,1U,0U}},
{BSET_01F8,{0U,1U,0U}},
{BSET_01F9,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBI_0400,{0U,0U,0U}},
{SUBI_0400,{1U,0U,0U}},
{SUBI_0400,{2U,0U,0U}},
{SUBI_0400,{3U,0U,0U}},
{SUBI_0400,{4U,0U,0U}},
{SUBI_0400,{5U,0U,0U}},
{SUBI_0400,{6U,0U,0U}},
{SUBI_0400,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBI_0410,{0U,0U,0U}},
{SUBI_0410,{1U,0U,0U}},
{SUBI_0410,{2U,0U,0U}},
{SUBI_0410,{3U,0U,0U}},
{SUBI_0410,{4U,0U,0U}},
{SUBI_0410,{5U,0U,0U}},
{SUBI_0410,{6U,0U,0U}},
{SUBI_0410,{7U,0U,0U}},
{SUBI_0418,{0U,0U,0U}},
{SUBI_0418,{1U,0U,0U}},
{SUBI_0418,{2U,0U,0U}},
{SUBI_0418,{3U,0U,0U}},
{SUBI_0418,{4U,0U,0U}},
{SUBI_0418,{5U,0U,0U}},
{SUBI_0418,{6U,0U,0U}},
{SUBI_0418,{7U,0U,0U}},
{SUBI_0420,{0U,0U,0U}},
{SUBI_0420,{1U,0U,0U}},
{SUBI_0420,{2U,0U,0U}},
{SUBI_0420,{3U,0U,0U}},
{SUBI_0420,{4U,0U,0U}},
{SUBI_0420,{5U,0U,0U}},
{SUBI_0420,{6U,0U,0U}},
{SUBI_0420,{7U,0U,0U}},
{SUBI_0428,{0U,0U,0U}},
{SUBI_0428,{1U,0U,0U}},
{SUBI_0428,{2U,0U,0U}},
{SUBI_0428,{3U,0U,0U}},
{SUBI_0428,{4U,0U,0U}},
{SUBI_0428,{5U,0U,0U}},
{SUBI_0428,{6U,0U,0U}},
{SUBI_0428,{7U,0U,0U}},
{SUBI_0430,{0U,0U,0U}},
{SUBI_0430,{1U,0U,0U}},
{SUBI_0430,{2U,0U,0U}},
{SUBI_0430,{3U,0U,0U}},
{SUBI_0430,{4U,0U,0U}},
{SUBI_0430,{5U,0U,0U}},
{SUBI_0430,{6U,0U,0U}},
{SUBI_0430,{7U,0U,0U}},
{SUBI_0438,{0U,0U,0U}},
{SUBI_0439,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBI_0440,{0U,0U,0U}},
{SUBI_0440,{1U,0U,0U}},
{SUBI_0440,{2U,0U,0U}},
{SUBI_0440,{3U,0U,0U}},
{SUBI_0440,{4U,0U,0U}},
{SUBI_0440,{5U,0U,0U}},
{SUBI_0440,{6U,0U,0U}},
{SUBI_0440,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBI_0450,{0U,0U,0U}},
{SUBI_0450,{1U,0U,0U}},
{SUBI_0450,{2U,0U,0U}},
{SUBI_0450,{3U,0U,0U}},
{SUBI_0450,{4U,0U,0U}},
{SUBI_0450,{5U,0U,0U}},
{SUBI_0450,{6U,0U,0U}},
{SUBI_0450,{7U,0U,0U}},
{SUBI_0458,{0U,0U,0U}},
{SUBI_0458,{1U,0U,0U}},
{SUBI_0458,{2U,0U,0U}},
{SUBI_0458,{3U,0U,0U}},
{SUBI_0458,{4U,0U,0U}},
{SUBI_0458,{5U,0U,0U}},
{SUBI_0458,{6U,0U,0U}},
{SUBI_0458,{7U,0U,0U}},
{SUBI_0460,{0U,0U,0U}},
{SUBI_0460,{1U,0U,0U}},
{SUBI_0460,{2U,0U,0U}},
{SUBI_0460,{3U,0U,0U}},
{SUBI_0460,{4U,0U,0U}},
{SUBI_0460,{5U,0U,0U}},
{SUBI_0460,{6U,0U,0U}},
{SUBI_0460,{7U,0U,0U}},
{SUBI_0468,{0U,0U,0U}},
{SUBI_0468,{1U,0U,0U}},
{SUBI_0468,{2U,0U,0U}},
{SUBI_0468,{3U,0U,0U}},
{SUBI_0468,{4U,0U,0U}},
{SUBI_0468,{5U,0U,0U}},
{SUBI_0468,{6U,0U,0U}},
{SUBI_0468,{7U,0U,0U}},
{SUBI_0470,{0U,0U,0U}},
{SUBI_0470,{1U,0U,0U}},
{SUBI_0470,{2U,0U,0U}},
{SUBI_0470,{3U,0U,0U}},
{SUBI_0470,{4U,0U,0U}},
{SUBI_0470,{5U,0U,0U}},
{SUBI_0470,{6U,0U,0U}},
{SUBI_0470,{7U,0U,0U}},
{SUBI_0478,{0U,0U,0U}},
{SUBI_0479,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBI_0480,{0U,0U,0U}},
{SUBI_0480,{1U,0U,0U}},
{SUBI_0480,{2U,0U,0U}},
{SUBI_0480,{3U,0U,0U}},
{SUBI_0480,{4U,0U,0U}},
{SUBI_0480,{5U,0U,0U}},
{SUBI_0480,{6U,0U,0U}},
{SUBI_0480,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBI_0490,{0U,0U,0U}},
{SUBI_0490,{1U,0U,0U}},
{SUBI_0490,{2U,0U,0U}},
{SUBI_0490,{3U,0U,0U}},
{SUBI_0490,{4U,0U,0U}},
{SUBI_0490,{5U,0U,0U}},
{SUBI_0490,{6U,0U,0U}},
{SUBI_0490,{7U,0U,0U}},
{SUBI_0498,{0U,0U,0U}},
{SUBI_0498,{1U,0U,0U}},
{SUBI_0498,{2U,0U,0U}},
{SUBI_0498,{3U,0U,0U}},
{SUBI_0498,{4U,0U,0U}},
{SUBI_0498,{5U,0U,0U}},
{SUBI_0498,{6U,0U,0U}},
{SUBI_0498,{7U,0U,0U}},
{SUBI_04A0,{0U,0U,0U}},
{SUBI_04A0,{1U,0U,0U}},
{SUBI_04A0,{2U,0U,0U}},
{SUBI_04A0,{3U,0U,0U}},
{SUBI_04A0,{4U,0U,0U}},
{SUBI_04A0,{5U,0U,0U}},
{SUBI_04A0,{6U,0U,0U}},
{SUBI_04A0,{7U,0U,0U}},
{SUBI_04A8,{0U,0U,0U}},
{SUBI_04A8,{1U,0U,0U}},
{SUBI_04A8,{2U,0U,0U}},
{SUBI_04A8,{3U,0U,0U}},
{SUBI_04A8,{4U,0U,0U}},
{SUBI_04A8,{5U,0U,0U}},
{SUBI_04A8,{6U,0U,0U}},
{SUBI_04A8,{7U,0U,0U}},
{SUBI_04B0,{0U,0U,0U}},
{SUBI_04B0,{1U,0U,0U}},
{SUBI_04B0,{2U,0U,0U}},
{SUBI_04B0,{3U,0U,0U}},
{SUBI_04B0,{4U,0U,0U}},
{SUBI_04B0,{5U,0U,0U}},
{SUBI_04B0,{6U,0U,0U}},
{SUBI_04B0,{7U,0U,0U}},
{SUBI_04B8,{0U,0U,0U}},
{SUBI_04B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHKCMP2_04D0,{0U,0U,0U}},
{CHKCMP2_04D0,{1U,0U,0U}},
{CHKCMP2_04D0,{2U,0U,0U}},
{CHKCMP2_04D0,{3U,0U,0U}},
{CHKCMP2_04D0,{4U,0U,0U}},
{CHKCMP2_04D0,{5U,0U,0U}},
{CHKCMP2_04D0,{6U,0U,0U}},
{CHKCMP2_04D0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHKCMP2_04E8,{0U,0U,0U}},
{CHKCMP2_04E8,{1U,0U,0U}},
{CHKCMP2_04E8,{2U,0U,0U}},
{CHKCMP2_04E8,{3U,0U,0U}},
{CHKCMP2_04E8,{4U,0U,0U}},
{CHKCMP2_04E8,{5U,0U,0U}},
{CHKCMP2_04E8,{6U,0U,0U}},
{CHKCMP2_04E8,{7U,0U,0U}},
{CHKCMP2_04F0,{0U,0U,0U}},
{CHKCMP2_04F0,{1U,0U,0U}},
{CHKCMP2_04F0,{2U,0U,0U}},
{CHKCMP2_04F0,{3U,0U,0U}},
{CHKCMP2_04F0,{4U,0U,0U}},
{CHKCMP2_04F0,{5U,0U,0U}},
{CHKCMP2_04F0,{6U,0U,0U}},
{CHKCMP2_04F0,{7U,0U,0U}},
{CHKCMP2_04F8,{0U,0U,0U}},
{CHKCMP2_04F9,{0U,0U,0U}},
{CHKCMP2_04FA,{0U,0U,0U}},
{CHKCMP2_04FB,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BTST_0100,{0U,2U,0U}},
{BTST_0100,{1U,2U,0U}},
{BTST_0100,{2U,2U,0U}},
{BTST_0100,{3U,2U,0U}},
{BTST_0100,{4U,2U,0U}},
{BTST_0100,{5U,2U,0U}},
{BTST_0100,{6U,2U,0U}},
{BTST_0100,{7U,2U,0U}},
{MOVEP_0108,{2U,0U,0U}},
{MOVEP_0108,{2U,1U,0U}},
{MOVEP_0108,{2U,2U,0U}},
{MOVEP_0108,{2U,3U,0U}},
{MOVEP_0108,{2U,4U,0U}},
{MOVEP_0108,{2U,5U,0U}},
{MOVEP_0108,{2U,6U,0U}},
{MOVEP_0108,{2U,7U,0U}},
{BTST_0110,{0U,2U,0U}},
{BTST_0110,{1U,2U,0U}},
{BTST_0110,{2U,2U,0U}},
{BTST_0110,{3U,2U,0U}},
{BTST_0110,{4U,2U,0U}},
{BTST_0110,{5U,2U,0U}},
{BTST_0110,{6U,2U,0U}},
{BTST_0110,{7U,2U,0U}},
{BTST_0118,{0U,2U,0U}},
{BTST_0118,{1U,2U,0U}},
{BTST_0118,{2U,2U,0U}},
{BTST_0118,{3U,2U,0U}},
{BTST_0118,{4U,2U,0U}},
{BTST_0118,{5U,2U,0U}},
{BTST_0118,{6U,2U,0U}},
{BTST_0118,{7U,2U,0U}},
{BTST_0120,{0U,2U,0U}},
{BTST_0120,{1U,2U,0U}},
{BTST_0120,{2U,2U,0U}},
{BTST_0120,{3U,2U,0U}},
{BTST_0120,{4U,2U,0U}},
{BTST_0120,{5U,2U,0U}},
{BTST_0120,{6U,2U,0U}},
{BTST_0120,{7U,2U,0U}},
{BTST_0128,{0U,2U,0U}},
{BTST_0128,{1U,2U,0U}},
{BTST_0128,{2U,2U,0U}},
{BTST_0128,{3U,2U,0U}},
{BTST_0128,{4U,2U,0U}},
{BTST_0128,{5U,2U,0U}},
{BTST_0128,{6U,2U,0U}},
{BTST_0128,{7U,2U,0U}},
{BTST_0130,{0U,2U,0U}},
{BTST_0130,{1U,2U,0U}},
{BTST_0130,{2U,2U,0U}},
{BTST_0130,{3U,2U,0U}},
{BTST_0130,{4U,2U,0U}},
{BTST_0130,{5U,2U,0U}},
{BTST_0130,{6U,2U,0U}},
{BTST_0130,{7U,2U,0U}},
{BTST_0138,{0U,2U,0U}},
{BTST_0139,{0U,2U,0U}},
{BTST_013A,{0U,2U,0U}},
{BTST_013B,{0U,2U,0U}},
{BTST_013C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCHG_0140,{0U,2U,0U}},
{BCHG_0140,{1U,2U,0U}},
{BCHG_0140,{2U,2U,0U}},
{BCHG_0140,{3U,2U,0U}},
{BCHG_0140,{4U,2U,0U}},
{BCHG_0140,{5U,2U,0U}},
{BCHG_0140,{6U,2U,0U}},
{BCHG_0140,{7U,2U,0U}},
{MOVEP_0148,{2U,0U,0U}},
{MOVEP_0148,{2U,1U,0U}},
{MOVEP_0148,{2U,2U,0U}},
{MOVEP_0148,{2U,3U,0U}},
{MOVEP_0148,{2U,4U,0U}},
{MOVEP_0148,{2U,5U,0U}},
{MOVEP_0148,{2U,6U,0U}},
{MOVEP_0148,{2U,7U,0U}},
{BCHG_0150,{0U,2U,0U}},
{BCHG_0150,{1U,2U,0U}},
{BCHG_0150,{2U,2U,0U}},
{BCHG_0150,{3U,2U,0U}},
{BCHG_0150,{4U,2U,0U}},
{BCHG_0150,{5U,2U,0U}},
{BCHG_0150,{6U,2U,0U}},
{BCHG_0150,{7U,2U,0U}},
{BCHG_0158,{0U,2U,0U}},
{BCHG_0158,{1U,2U,0U}},
{BCHG_0158,{2U,2U,0U}},
{BCHG_0158,{3U,2U,0U}},
{BCHG_0158,{4U,2U,0U}},
{BCHG_0158,{5U,2U,0U}},
{BCHG_0158,{6U,2U,0U}},
{BCHG_0158,{7U,2U,0U}},
{BCHG_0160,{0U,2U,0U}},
{BCHG_0160,{1U,2U,0U}},
{BCHG_0160,{2U,2U,0U}},
{BCHG_0160,{3U,2U,0U}},
{BCHG_0160,{4U,2U,0U}},
{BCHG_0160,{5U,2U,0U}},
{BCHG_0160,{6U,2U,0U}},
{BCHG_0160,{7U,2U,0U}},
{BCHG_0168,{0U,2U,0U}},
{BCHG_0168,{1U,2U,0U}},
{BCHG_0168,{2U,2U,0U}},
{BCHG_0168,{3U,2U,0U}},
{BCHG_0168,{4U,2U,0U}},
{BCHG_0168,{5U,2U,0U}},
{BCHG_0168,{6U,2U,0U}},
{BCHG_0168,{7U,2U,0U}},
{BCHG_0170,{0U,2U,0U}},
{BCHG_0170,{1U,2U,0U}},
{BCHG_0170,{2U,2U,0U}},
{BCHG_0170,{3U,2U,0U}},
{BCHG_0170,{4U,2U,0U}},
{BCHG_0170,{5U,2U,0U}},
{BCHG_0170,{6U,2U,0U}},
{BCHG_0170,{7U,2U,0U}},
{BCHG_0178,{0U,2U,0U}},
{BCHG_0179,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCLR_0180,{0U,2U,0U}},
{BCLR_0180,{1U,2U,0U}},
{BCLR_0180,{2U,2U,0U}},
{BCLR_0180,{3U,2U,0U}},
{BCLR_0180,{4U,2U,0U}},
{BCLR_0180,{5U,2U,0U}},
{BCLR_0180,{6U,2U,0U}},
{BCLR_0180,{7U,2U,0U}},
{MOVEP_0188,{2U,0U,0U}},
{MOVEP_0188,{2U,1U,0U}},
{MOVEP_0188,{2U,2U,0U}},
{MOVEP_0188,{2U,3U,0U}},
{MOVEP_0188,{2U,4U,0U}},
{MOVEP_0188,{2U,5U,0U}},
{MOVEP_0188,{2U,6U,0U}},
{MOVEP_0188,{2U,7U,0U}},
{BCLR_0190,{0U,2U,0U}},
{BCLR_0190,{1U,2U,0U}},
{BCLR_0190,{2U,2U,0U}},
{BCLR_0190,{3U,2U,0U}},
{BCLR_0190,{4U,2U,0U}},
{BCLR_0190,{5U,2U,0U}},
{BCLR_0190,{6U,2U,0U}},
{BCLR_0190,{7U,2U,0U}},
{BCLR_0198,{0U,2U,0U}},
{BCLR_0198,{1U,2U,0U}},
{BCLR_0198,{2U,2U,0U}},
{BCLR_0198,{3U,2U,0U}},
{BCLR_0198,{4U,2U,0U}},
{BCLR_0198,{5U,2U,0U}},
{BCLR_0198,{6U,2U,0U}},
{BCLR_0198,{7U,2U,0U}},
{BCLR_01A0,{0U,2U,0U}},
{BCLR_01A0,{1U,2U,0U}},
{BCLR_01A0,{2U,2U,0U}},
{BCLR_01A0,{3U,2U,0U}},
{BCLR_01A0,{4U,2U,0U}},
{BCLR_01A0,{5U,2U,0U}},
{BCLR_01A0,{6U,2U,0U}},
{BCLR_01A0,{7U,2U,0U}},
{BCLR_01A8,{0U,2U,0U}},
{BCLR_01A8,{1U,2U,0U}},
{BCLR_01A8,{2U,2U,0U}},
{BCLR_01A8,{3U,2U,0U}},
{BCLR_01A8,{4U,2U,0U}},
{BCLR_01A8,{5U,2U,0U}},
{BCLR_01A8,{6U,2U,0U}},
{BCLR_01A8,{7U,2U,0U}},
{BCLR_01B0,{0U,2U,0U}},
{BCLR_01B0,{1U,2U,0U}},
{BCLR_01B0,{2U,2U,0U}},
{BCLR_01B0,{3U,2U,0U}},
{BCLR_01B0,{4U,2U,0U}},
{BCLR_01B0,{5U,2U,0U}},
{BCLR_01B0,{6U,2U,0U}},
{BCLR_01B0,{7U,2U,0U}},
{BCLR_01B8,{0U,2U,0U}},
{BCLR_01B9,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BSET_01C0,{0U,2U,0U}},
{BSET_01C0,{1U,2U,0U}},
{BSET_01C0,{2U,2U,0U}},
{BSET_01C0,{3U,2U,0U}},
{BSET_01C0,{4U,2U,0U}},
{BSET_01C0,{5U,2U,0U}},
{BSET_01C0,{6U,2U,0U}},
{BSET_01C0,{7U,2U,0U}},
{MOVEP_01C8,{2U,0U,0U}},
{MOVEP_01C8,{2U,1U,0U}},
{MOVEP_01C8,{2U,2U,0U}},
{MOVEP_01C8,{2U,3U,0U}},
{MOVEP_01C8,{2U,4U,0U}},
{MOVEP_01C8,{2U,5U,0U}},
{MOVEP_01C8,{2U,6U,0U}},
{MOVEP_01C8,{2U,7U,0U}},
{BSET_01D0,{0U,2U,0U}},
{BSET_01D0,{1U,2U,0U}},
{BSET_01D0,{2U,2U,0U}},
{BSET_01D0,{3U,2U,0U}},
{BSET_01D0,{4U,2U,0U}},
{BSET_01D0,{5U,2U,0U}},
{BSET_01D0,{6U,2U,0U}},
{BSET_01D0,{7U,2U,0U}},
{BSET_01D8,{0U,2U,0U}},
{BSET_01D8,{1U,2U,0U}},
{BSET_01D8,{2U,2U,0U}},
{BSET_01D8,{3U,2U,0U}},
{BSET_01D8,{4U,2U,0U}},
{BSET_01D8,{5U,2U,0U}},
{BSET_01D8,{6U,2U,0U}},
{BSET_01D8,{7U,2U,0U}},
{BSET_01E0,{0U,2U,0U}},
{BSET_01E0,{1U,2U,0U}},
{BSET_01E0,{2U,2U,0U}},
{BSET_01E0,{3U,2U,0U}},
{BSET_01E0,{4U,2U,0U}},
{BSET_01E0,{5U,2U,0U}},
{BSET_01E0,{6U,2U,0U}},
{BSET_01E0,{7U,2U,0U}},
{BSET_01E8,{0U,2U,0U}},
{BSET_01E8,{1U,2U,0U}},
{BSET_01E8,{2U,2U,0U}},
{BSET_01E8,{3U,2U,0U}},
{BSET_01E8,{4U,2U,0U}},
{BSET_01E8,{5U,2U,0U}},
{BSET_01E8,{6U,2U,0U}},
{BSET_01E8,{7U,2U,0U}},
{BSET_01F0,{0U,2U,0U}},
{BSET_01F0,{1U,2U,0U}},
{BSET_01F0,{2U,2U,0U}},
{BSET_01F0,{3U,2U,0U}},
{BSET_01F0,{4U,2U,0U}},
{BSET_01F0,{5U,2U,0U}},
{BSET_01F0,{6U,2U,0U}},
{BSET_01F0,{7U,2U,0U}},
{BSET_01F8,{0U,2U,0U}},
{BSET_01F9,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDI_0600,{0U,0U,0U}},
{ADDI_0600,{1U,0U,0U}},
{ADDI_0600,{2U,0U,0U}},
{ADDI_0600,{3U,0U,0U}},
{ADDI_0600,{4U,0U,0U}},
{ADDI_0600,{5U,0U,0U}},
{ADDI_0600,{6U,0U,0U}},
{ADDI_0600,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDI_0610,{0U,0U,0U}},
{ADDI_0610,{1U,0U,0U}},
{ADDI_0610,{2U,0U,0U}},
{ADDI_0610,{3U,0U,0U}},
{ADDI_0610,{4U,0U,0U}},
{ADDI_0610,{5U,0U,0U}},
{ADDI_0610,{6U,0U,0U}},
{ADDI_0610,{7U,0U,0U}},
{ADDI_0618,{0U,0U,0U}},
{ADDI_0618,{1U,0U,0U}},
{ADDI_0618,{2U,0U,0U}},
{ADDI_0618,{3U,0U,0U}},
{ADDI_0618,{4U,0U,0U}},
{ADDI_0618,{5U,0U,0U}},
{ADDI_0618,{6U,0U,0U}},
{ADDI_0618,{7U,0U,0U}},
{ADDI_0620,{0U,0U,0U}},
{ADDI_0620,{1U,0U,0U}},
{ADDI_0620,{2U,0U,0U}},
{ADDI_0620,{3U,0U,0U}},
{ADDI_0620,{4U,0U,0U}},
{ADDI_0620,{5U,0U,0U}},
{ADDI_0620,{6U,0U,0U}},
{ADDI_0620,{7U,0U,0U}},
{ADDI_0628,{0U,0U,0U}},
{ADDI_0628,{1U,0U,0U}},
{ADDI_0628,{2U,0U,0U}},
{ADDI_0628,{3U,0U,0U}},
{ADDI_0628,{4U,0U,0U}},
{ADDI_0628,{5U,0U,0U}},
{ADDI_0628,{6U,0U,0U}},
{ADDI_0628,{7U,0U,0U}},
{ADDI_0630,{0U,0U,0U}},
{ADDI_0630,{1U,0U,0U}},
{ADDI_0630,{2U,0U,0U}},
{ADDI_0630,{3U,0U,0U}},
{ADDI_0630,{4U,0U,0U}},
{ADDI_0630,{5U,0U,0U}},
{ADDI_0630,{6U,0U,0U}},
{ADDI_0630,{7U,0U,0U}},
{ADDI_0638,{0U,0U,0U}},
{ADDI_0639,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDI_0640,{0U,0U,0U}},
{ADDI_0640,{1U,0U,0U}},
{ADDI_0640,{2U,0U,0U}},
{ADDI_0640,{3U,0U,0U}},
{ADDI_0640,{4U,0U,0U}},
{ADDI_0640,{5U,0U,0U}},
{ADDI_0640,{6U,0U,0U}},
{ADDI_0640,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDI_0650,{0U,0U,0U}},
{ADDI_0650,{1U,0U,0U}},
{ADDI_0650,{2U,0U,0U}},
{ADDI_0650,{3U,0U,0U}},
{ADDI_0650,{4U,0U,0U}},
{ADDI_0650,{5U,0U,0U}},
{ADDI_0650,{6U,0U,0U}},
{ADDI_0650,{7U,0U,0U}},
{ADDI_0658,{0U,0U,0U}},
{ADDI_0658,{1U,0U,0U}},
{ADDI_0658,{2U,0U,0U}},
{ADDI_0658,{3U,0U,0U}},
{ADDI_0658,{4U,0U,0U}},
{ADDI_0658,{5U,0U,0U}},
{ADDI_0658,{6U,0U,0U}},
{ADDI_0658,{7U,0U,0U}},
{ADDI_0660,{0U,0U,0U}},
{ADDI_0660,{1U,0U,0U}},
{ADDI_0660,{2U,0U,0U}},
{ADDI_0660,{3U,0U,0U}},
{ADDI_0660,{4U,0U,0U}},
{ADDI_0660,{5U,0U,0U}},
{ADDI_0660,{6U,0U,0U}},
{ADDI_0660,{7U,0U,0U}},
{ADDI_0668,{0U,0U,0U}},
{ADDI_0668,{1U,0U,0U}},
{ADDI_0668,{2U,0U,0U}},
{ADDI_0668,{3U,0U,0U}},
{ADDI_0668,{4U,0U,0U}},
{ADDI_0668,{5U,0U,0U}},
{ADDI_0668,{6U,0U,0U}},
{ADDI_0668,{7U,0U,0U}},
{ADDI_0670,{0U,0U,0U}},
{ADDI_0670,{1U,0U,0U}},
{ADDI_0670,{2U,0U,0U}},
{ADDI_0670,{3U,0U,0U}},
{ADDI_0670,{4U,0U,0U}},
{ADDI_0670,{5U,0U,0U}},
{ADDI_0670,{6U,0U,0U}},
{ADDI_0670,{7U,0U,0U}},
{ADDI_0678,{0U,0U,0U}},
{ADDI_0679,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDI_0680,{0U,0U,0U}},
{ADDI_0680,{1U,0U,0U}},
{ADDI_0680,{2U,0U,0U}},
{ADDI_0680,{3U,0U,0U}},
{ADDI_0680,{4U,0U,0U}},
{ADDI_0680,{5U,0U,0U}},
{ADDI_0680,{6U,0U,0U}},
{ADDI_0680,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDI_0690,{0U,0U,0U}},
{ADDI_0690,{1U,0U,0U}},
{ADDI_0690,{2U,0U,0U}},
{ADDI_0690,{3U,0U,0U}},
{ADDI_0690,{4U,0U,0U}},
{ADDI_0690,{5U,0U,0U}},
{ADDI_0690,{6U,0U,0U}},
{ADDI_0690,{7U,0U,0U}},
{ADDI_0698,{0U,0U,0U}},
{ADDI_0698,{1U,0U,0U}},
{ADDI_0698,{2U,0U,0U}},
{ADDI_0698,{3U,0U,0U}},
{ADDI_0698,{4U,0U,0U}},
{ADDI_0698,{5U,0U,0U}},
{ADDI_0698,{6U,0U,0U}},
{ADDI_0698,{7U,0U,0U}},
{ADDI_06A0,{0U,0U,0U}},
{ADDI_06A0,{1U,0U,0U}},
{ADDI_06A0,{2U,0U,0U}},
{ADDI_06A0,{3U,0U,0U}},
{ADDI_06A0,{4U,0U,0U}},
{ADDI_06A0,{5U,0U,0U}},
{ADDI_06A0,{6U,0U,0U}},
{ADDI_06A0,{7U,0U,0U}},
{ADDI_06A8,{0U,0U,0U}},
{ADDI_06A8,{1U,0U,0U}},
{ADDI_06A8,{2U,0U,0U}},
{ADDI_06A8,{3U,0U,0U}},
{ADDI_06A8,{4U,0U,0U}},
{ADDI_06A8,{5U,0U,0U}},
{ADDI_06A8,{6U,0U,0U}},
{ADDI_06A8,{7U,0U,0U}},
{ADDI_06B0,{0U,0U,0U}},
{ADDI_06B0,{1U,0U,0U}},
{ADDI_06B0,{2U,0U,0U}},
{ADDI_06B0,{3U,0U,0U}},
{ADDI_06B0,{4U,0U,0U}},
{ADDI_06B0,{5U,0U,0U}},
{ADDI_06B0,{6U,0U,0U}},
{ADDI_06B0,{7U,0U,0U}},
{ADDI_06B8,{0U,0U,0U}},
{ADDI_06B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{RTM_06C0,{0U,0U,0U}},
{RTM_06C0,{0U,1U,0U}},
{RTM_06C0,{0U,2U,0U}},
{RTM_06C0,{0U,3U,0U}},
{RTM_06C0,{0U,4U,0U}},
{RTM_06C0,{0U,5U,0U}},
{RTM_06C0,{0U,6U,0U}},
{RTM_06C0,{0U,7U,0U}},
{RTM_06C0,{1U,0U,0U}},
{RTM_06C0,{1U,1U,0U}},
{RTM_06C0,{1U,2U,0U}},
{RTM_06C0,{1U,3U,0U}},
{RTM_06C0,{1U,4U,0U}},
{RTM_06C0,{1U,5U,0U}},
{RTM_06C0,{1U,6U,0U}},
{RTM_06C0,{1U,7U,0U}},
{CALLM_06D0,{0U,0U,0U}},
{CALLM_06D0,{1U,0U,0U}},
{CALLM_06D0,{2U,0U,0U}},
{CALLM_06D0,{3U,0U,0U}},
{CALLM_06D0,{4U,0U,0U}},
{CALLM_06D0,{5U,0U,0U}},
{CALLM_06D0,{6U,0U,0U}},
{CALLM_06D0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CALLM_06E8,{0U,0U,0U}},
{CALLM_06E8,{1U,0U,0U}},
{CALLM_06E8,{2U,0U,0U}},
{CALLM_06E8,{3U,0U,0U}},
{CALLM_06E8,{4U,0U,0U}},
{CALLM_06E8,{5U,0U,0U}},
{CALLM_06E8,{6U,0U,0U}},
{CALLM_06E8,{7U,0U,0U}},
{CALLM_06F0,{0U,0U,0U}},
{CALLM_06F0,{1U,0U,0U}},
{CALLM_06F0,{2U,0U,0U}},
{CALLM_06F0,{3U,0U,0U}},
{CALLM_06F0,{4U,0U,0U}},
{CALLM_06F0,{5U,0U,0U}},
{CALLM_06F0,{6U,0U,0U}},
{CALLM_06F0,{7U,0U,0U}},
{CALLM_06F8,{0U,0U,0U}},
{CALLM_06F9,{0U,0U,0U}},
{CALLM_06FA,{0U,0U,0U}},
{CALLM_06FB,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BTST_0100,{0U,3U,0U}},
{BTST_0100,{1U,3U,0U}},
{BTST_0100,{2U,3U,0U}},
{BTST_0100,{3U,3U,0U}},
{BTST_0100,{4U,3U,0U}},
{BTST_0100,{5U,3U,0U}},
{BTST_0100,{6U,3U,0U}},
{BTST_0100,{7U,3U,0U}},
{MOVEP_0108,{3U,0U,0U}},
{MOVEP_0108,{3U,1U,0U}},
{MOVEP_0108,{3U,2U,0U}},
{MOVEP_0108,{3U,3U,0U}},
{MOVEP_0108,{3U,4U,0U}},
{MOVEP_0108,{3U,5U,0U}},
{MOVEP_0108,{3U,6U,0U}},
{MOVEP_0108,{3U,7U,0U}},
{BTST_0110,{0U,3U,0U}},
{BTST_0110,{1U,3U,0U}},
{BTST_0110,{2U,3U,0U}},
{BTST_0110,{3U,3U,0U}},
{BTST_0110,{4U,3U,0U}},
{BTST_0110,{5U,3U,0U}},
{BTST_0110,{6U,3U,0U}},
{BTST_0110,{7U,3U,0U}},
{BTST_0118,{0U,3U,0U}},
{BTST_0118,{1U,3U,0U}},
{BTST_0118,{2U,3U,0U}},
{BTST_0118,{3U,3U,0U}},
{BTST_0118,{4U,3U,0U}},
{BTST_0118,{5U,3U,0U}},
{BTST_0118,{6U,3U,0U}},
{BTST_0118,{7U,3U,0U}},
{BTST_0120,{0U,3U,0U}},
{BTST_0120,{1U,3U,0U}},
{BTST_0120,{2U,3U,0U}},
{BTST_0120,{3U,3U,0U}},
{BTST_0120,{4U,3U,0U}},
{BTST_0120,{5U,3U,0U}},
{BTST_0120,{6U,3U,0U}},
{BTST_0120,{7U,3U,0U}},
{BTST_0128,{0U,3U,0U}},
{BTST_0128,{1U,3U,0U}},
{BTST_0128,{2U,3U,0U}},
{BTST_0128,{3U,3U,0U}},
{BTST_0128,{4U,3U,0U}},
{BTST_0128,{5U,3U,0U}},
{BTST_0128,{6U,3U,0U}},
{BTST_0128,{7U,3U,0U}},
{BTST_0130,{0U,3U,0U}},
{BTST_0130,{1U,3U,0U}},
{BTST_0130,{2U,3U,0U}},
{BTST_0130,{3U,3U,0U}},
{BTST_0130,{4U,3U,0U}},
{BTST_0130,{5U,3U,0U}},
{BTST_0130,{6U,3U,0U}},
{BTST_0130,{7U,3U,0U}},
{BTST_0138,{0U,3U,0U}},
{BTST_0139,{0U,3U,0U}},
{BTST_013A,{0U,3U,0U}},
{BTST_013B,{0U,3U,0U}},
{BTST_013C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCHG_0140,{0U,3U,0U}},
{BCHG_0140,{1U,3U,0U}},
{BCHG_0140,{2U,3U,0U}},
{BCHG_0140,{3U,3U,0U}},
{BCHG_0140,{4U,3U,0U}},
{BCHG_0140,{5U,3U,0U}},
{BCHG_0140,{6U,3U,0U}},
{BCHG_0140,{7U,3U,0U}},
{MOVEP_0148,{3U,0U,0U}},
{MOVEP_0148,{3U,1U,0U}},
{MOVEP_0148,{3U,2U,0U}},
{MOVEP_0148,{3U,3U,0U}},
{MOVEP_0148,{3U,4U,0U}},
{MOVEP_0148,{3U,5U,0U}},
{MOVEP_0148,{3U,6U,0U}},
{MOVEP_0148,{3U,7U,0U}},
{BCHG_0150,{0U,3U,0U}},
{BCHG_0150,{1U,3U,0U}},
{BCHG_0150,{2U,3U,0U}},
{BCHG_0150,{3U,3U,0U}},
{BCHG_0150,{4U,3U,0U}},
{BCHG_0150,{5U,3U,0U}},
{BCHG_0150,{6U,3U,0U}},
{BCHG_0150,{7U,3U,0U}},
{BCHG_0158,{0U,3U,0U}},
{BCHG_0158,{1U,3U,0U}},
{BCHG_0158,{2U,3U,0U}},
{BCHG_0158,{3U,3U,0U}},
{BCHG_0158,{4U,3U,0U}},
{BCHG_0158,{5U,3U,0U}},
{BCHG_0158,{6U,3U,0U}},
{BCHG_0158,{7U,3U,0U}},
{BCHG_0160,{0U,3U,0U}},
{BCHG_0160,{1U,3U,0U}},
{BCHG_0160,{2U,3U,0U}},
{BCHG_0160,{3U,3U,0U}},
{BCHG_0160,{4U,3U,0U}},
{BCHG_0160,{5U,3U,0U}},
{BCHG_0160,{6U,3U,0U}},
{BCHG_0160,{7U,3U,0U}},
{BCHG_0168,{0U,3U,0U}},
{BCHG_0168,{1U,3U,0U}},
{BCHG_0168,{2U,3U,0U}},
{BCHG_0168,{3U,3U,0U}},
{BCHG_0168,{4U,3U,0U}},
{BCHG_0168,{5U,3U,0U}},
{BCHG_0168,{6U,3U,0U}},
{BCHG_0168,{7U,3U,0U}},
{BCHG_0170,{0U,3U,0U}},
{BCHG_0170,{1U,3U,0U}},
{BCHG_0170,{2U,3U,0U}},
{BCHG_0170,{3U,3U,0U}},
{BCHG_0170,{4U,3U,0U}},
{BCHG_0170,{5U,3U,0U}},
{BCHG_0170,{6U,3U,0U}},
{BCHG_0170,{7U,3U,0U}},
{BCHG_0178,{0U,3U,0U}},
{BCHG_0179,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCLR_0180,{0U,3U,0U}},
{BCLR_0180,{1U,3U,0U}},
{BCLR_0180,{2U,3U,0U}},
{BCLR_0180,{3U,3U,0U}},
{BCLR_0180,{4U,3U,0U}},
{BCLR_0180,{5U,3U,0U}},
{BCLR_0180,{6U,3U,0U}},
{BCLR_0180,{7U,3U,0U}},
{MOVEP_0188,{3U,0U,0U}},
{MOVEP_0188,{3U,1U,0U}},
{MOVEP_0188,{3U,2U,0U}},
{MOVEP_0188,{3U,3U,0U}},
{MOVEP_0188,{3U,4U,0U}},
{MOVEP_0188,{3U,5U,0U}},
{MOVEP_0188,{3U,6U,0U}},
{MOVEP_0188,{3U,7U,0U}},
{BCLR_0190,{0U,3U,0U}},
{BCLR_0190,{1U,3U,0U}},
{BCLR_0190,{2U,3U,0U}},
{BCLR_0190,{3U,3U,0U}},
{BCLR_0190,{4U,3U,0U}},
{BCLR_0190,{5U,3U,0U}},
{BCLR_0190,{6U,3U,0U}},
{BCLR_0190,{7U,3U,0U}},
{BCLR_0198,{0U,3U,0U}},
{BCLR_0198,{1U,3U,0U}},
{BCLR_0198,{2U,3U,0U}},
{BCLR_0198,{3U,3U,0U}},
{BCLR_0198,{4U,3U,0U}},
{BCLR_0198,{5U,3U,0U}},
{BCLR_0198,{6U,3U,0U}},
{BCLR_0198,{7U,3U,0U}},
{BCLR_01A0,{0U,3U,0U}},
{BCLR_01A0,{1U,3U,0U}},
{BCLR_01A0,{2U,3U,0U}},
{BCLR_01A0,{3U,3U,0U}},
{BCLR_01A0,{4U,3U,0U}},
{BCLR_01A0,{5U,3U,0U}},
{BCLR_01A0,{6U,3U,0U}},
{BCLR_01A0,{7U,3U,0U}},
{BCLR_01A8,{0U,3U,0U}},
{BCLR_01A8,{1U,3U,0U}},
{BCLR_01A8,{2U,3U,0U}},
{BCLR_01A8,{3U,3U,0U}},
{BCLR_01A8,{4U,3U,0U}},
{BCLR_01A8,{5U,3U,0U}},
{BCLR_01A8,{6U,3U,0U}},
{BCLR_01A8,{7U,3U,0U}},
{BCLR_01B0,{0U,3U,0U}},
{BCLR_01B0,{1U,3U,0U}},
{BCLR_01B0,{2U,3U,0U}},
{BCLR_01B0,{3U,3U,0U}},
{BCLR_01B0,{4U,3U,0U}},
{BCLR_01B0,{5U,3U,0U}},
{BCLR_01B0,{6U,3U,0U}},
{BCLR_01B0,{7U,3U,0U}},
{BCLR_01B8,{0U,3U,0U}},
{BCLR_01B9,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BSET_01C0,{0U,3U,0U}},
{BSET_01C0,{1U,3U,0U}},
{BSET_01C0,{2U,3U,0U}},
{BSET_01C0,{3U,3U,0U}},
{BSET_01C0,{4U,3U,0U}},
{BSET_01C0,{5U,3U,0U}},
{BSET_01C0,{6U,3U,0U}},
{BSET_01C0,{7U,3U,0U}},
{MOVEP_01C8,{3U,0U,0U}},
{MOVEP_01C8,{3U,1U,0U}},
{MOVEP_01C8,{3U,2U,0U}},
{MOVEP_01C8,{3U,3U,0U}},
{MOVEP_01C8,{3U,4U,0U}},
{MOVEP_01C8,{3U,5U,0U}},
{MOVEP_01C8,{3U,6U,0U}},
{MOVEP_01C8,{3U,7U,0U}},
{BSET_01D0,{0U,3U,0U}},
{BSET_01D0,{1U,3U,0U}},
{BSET_01D0,{2U,3U,0U}},
{BSET_01D0,{3U,3U,0U}},
{BSET_01D0,{4U,3U,0U}},
{BSET_01D0,{5U,3U,0U}},
{BSET_01D0,{6U,3U,0U}},
{BSET_01D0,{7U,3U,0U}},
{BSET_01D8,{0U,3U,0U}},
{BSET_01D8,{1U,3U,0U}},
{BSET_01D8,{2U,3U,0U}},
{BSET_01D8,{3U,3U,0U}},
{BSET_01D8,{4U,3U,0U}},
{BSET_01D8,{5U,3U,0U}},
{BSET_01D8,{6U,3U,0U}},
{BSET_01D8,{7U,3U,0U}},
{BSET_01E0,{0U,3U,0U}},
{BSET_01E0,{1U,3U,0U}},
{BSET_01E0,{2U,3U,0U}},
{BSET_01E0,{3U,3U,0U}},
{BSET_01E0,{4U,3U,0U}},
{BSET_01E0,{5U,3U,0U}},
{BSET_01E0,{6U,3U,0U}},
{BSET_01E0,{7U,3U,0U}},
{BSET_01E8,{0U,3U,0U}},
{BSET_01E8,{1U,3U,0U}},
{BSET_01E8,{2U,3U,0U}},
{BSET_01E8,{3U,3U,0U}},
{BSET_01E8,{4U,3U,0U}},
{BSET_01E8,{5U,3U,0U}},
{BSET_01E8,{6U,3U,0U}},
{BSET_01E8,{7U,3U,0U}},
{BSET_01F0,{0U,3U,0U}},
{BSET_01F0,{1U,3U,0U}},
{BSET_01F0,{2U,3U,0U}},
{BSET_01F0,{3U,3U,0U}},
{BSET_01F0,{4U,3U,0U}},
{BSET_01F0,{5U,3U,0U}},
{BSET_01F0,{6U,3U,0U}},
{BSET_01F0,{7U,3U,0U}},
{BSET_01F8,{0U,3U,0U}},
{BSET_01F9,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BTST_0800,{0U,0U,0U}},
{BTST_0800,{1U,0U,0U}},
{BTST_0800,{2U,0U,0U}},
{BTST_0800,{3U,0U,0U}},
{BTST_0800,{4U,0U,0U}},
{BTST_0800,{5U,0U,0U}},
{BTST_0800,{6U,0U,0U}},
{BTST_0800,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BTST_0810,{0U,0U,0U}},
{BTST_0810,{1U,0U,0U}},
{BTST_0810,{2U,0U,0U}},
{BTST_0810,{3U,0U,0U}},
{BTST_0810,{4U,0U,0U}},
{BTST_0810,{5U,0U,0U}},
{BTST_0810,{6U,0U,0U}},
{BTST_0810,{7U,0U,0U}},
{BTST_0818,{0U,0U,0U}},
{BTST_0818,{1U,0U,0U}},
{BTST_0818,{2U,0U,0U}},
{BTST_0818,{3U,0U,0U}},
{BTST_0818,{4U,0U,0U}},
{BTST_0818,{5U,0U,0U}},
{BTST_0818,{6U,0U,0U}},
{BTST_0818,{7U,0U,0U}},
{BTST_0820,{0U,0U,0U}},
{BTST_0820,{1U,0U,0U}},
{BTST_0820,{2U,0U,0U}},
{BTST_0820,{3U,0U,0U}},
{BTST_0820,{4U,0U,0U}},
{BTST_0820,{5U,0U,0U}},
{BTST_0820,{6U,0U,0U}},
{BTST_0820,{7U,0U,0U}},
{BTST_0828,{0U,0U,0U}},
{BTST_0828,{1U,0U,0U}},
{BTST_0828,{2U,0U,0U}},
{BTST_0828,{3U,0U,0U}},
{BTST_0828,{4U,0U,0U}},
{BTST_0828,{5U,0U,0U}},
{BTST_0828,{6U,0U,0U}},
{BTST_0828,{7U,0U,0U}},
{BTST_0830,{0U,0U,0U}},
{BTST_0830,{1U,0U,0U}},
{BTST_0830,{2U,0U,0U}},
{BTST_0830,{3U,0U,0U}},
{BTST_0830,{4U,0U,0U}},
{BTST_0830,{5U,0U,0U}},
{BTST_0830,{6U,0U,0U}},
{BTST_0830,{7U,0U,0U}},
{BTST_0838,{0U,0U,0U}},
{BTST_0839,{0U,0U,0U}},
{BTST_083A,{0U,0U,0U}},
{BTST_083B,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCHG_0840,{0U,0U,0U}},
{BCHG_0840,{1U,0U,0U}},
{BCHG_0840,{2U,0U,0U}},
{BCHG_0840,{3U,0U,0U}},
{BCHG_0840,{4U,0U,0U}},
{BCHG_0840,{5U,0U,0U}},
{BCHG_0840,{6U,0U,0U}},
{BCHG_0840,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCHG_0850,{0U,0U,0U}},
{BCHG_0850,{1U,0U,0U}},
{BCHG_0850,{2U,0U,0U}},
{BCHG_0850,{3U,0U,0U}},
{BCHG_0850,{4U,0U,0U}},
{BCHG_0850,{5U,0U,0U}},
{BCHG_0850,{6U,0U,0U}},
{BCHG_0850,{7U,0U,0U}},
{BCHG_0858,{0U,0U,0U}},
{BCHG_0858,{1U,0U,0U}},
{BCHG_0858,{2U,0U,0U}},
{BCHG_0858,{3U,0U,0U}},
{BCHG_0858,{4U,0U,0U}},
{BCHG_0858,{5U,0U,0U}},
{BCHG_0858,{6U,0U,0U}},
{BCHG_0858,{7U,0U,0U}},
{BCHG_0860,{0U,0U,0U}},
{BCHG_0860,{1U,0U,0U}},
{BCHG_0860,{2U,0U,0U}},
{BCHG_0860,{3U,0U,0U}},
{BCHG_0860,{4U,0U,0U}},
{BCHG_0860,{5U,0U,0U}},
{BCHG_0860,{6U,0U,0U}},
{BCHG_0860,{7U,0U,0U}},
{BCHG_0868,{0U,0U,0U}},
{BCHG_0868,{1U,0U,0U}},
{BCHG_0868,{2U,0U,0U}},
{BCHG_0868,{3U,0U,0U}},
{BCHG_0868,{4U,0U,0U}},
{BCHG_0868,{5U,0U,0U}},
{BCHG_0868,{6U,0U,0U}},
{BCHG_0868,{7U,0U,0U}},
{BCHG_0870,{0U,0U,0U}},
{BCHG_0870,{1U,0U,0U}},
{BCHG_0870,{2U,0U,0U}},
{BCHG_0870,{3U,0U,0U}},
{BCHG_0870,{4U,0U,0U}},
{BCHG_0870,{5U,0U,0U}},
{BCHG_0870,{6U,0U,0U}},
{BCHG_0870,{7U,0U,0U}},
{BCHG_0878,{0U,0U,0U}},
{BCHG_0879,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCLR_0880,{0U,0U,0U}},
{BCLR_0880,{1U,0U,0U}},
{BCLR_0880,{2U,0U,0U}},
{BCLR_0880,{3U,0U,0U}},
{BCLR_0880,{4U,0U,0U}},
{BCLR_0880,{5U,0U,0U}},
{BCLR_0880,{6U,0U,0U}},
{BCLR_0880,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCLR_0890,{0U,0U,0U}},
{BCLR_0890,{1U,0U,0U}},
{BCLR_0890,{2U,0U,0U}},
{BCLR_0890,{3U,0U,0U}},
{BCLR_0890,{4U,0U,0U}},
{BCLR_0890,{5U,0U,0U}},
{BCLR_0890,{6U,0U,0U}},
{BCLR_0890,{7U,0U,0U}},
{BCLR_0898,{0U,0U,0U}},
{BCLR_0898,{1U,0U,0U}},
{BCLR_0898,{2U,0U,0U}},
{BCLR_0898,{3U,0U,0U}},
{BCLR_0898,{4U,0U,0U}},
{BCLR_0898,{5U,0U,0U}},
{BCLR_0898,{6U,0U,0U}},
{BCLR_0898,{7U,0U,0U}},
{BCLR_08A0,{0U,0U,0U}},
{BCLR_08A0,{1U,0U,0U}},
{BCLR_08A0,{2U,0U,0U}},
{BCLR_08A0,{3U,0U,0U}},
{BCLR_08A0,{4U,0U,0U}},
{BCLR_08A0,{5U,0U,0U}},
{BCLR_08A0,{6U,0U,0U}},
{BCLR_08A0,{7U,0U,0U}},
{BCLR_08A8,{0U,0U,0U}},
{BCLR_08A8,{1U,0U,0U}},
{BCLR_08A8,{2U,0U,0U}},
{BCLR_08A8,{3U,0U,0U}},
{BCLR_08A8,{4U,0U,0U}},
{BCLR_08A8,{5U,0U,0U}},
{BCLR_08A8,{6U,0U,0U}},
{BCLR_08A8,{7U,0U,0U}},
{BCLR_08B0,{0U,0U,0U}},
{BCLR_08B0,{1U,0U,0U}},
{BCLR_08B0,{2U,0U,0U}},
{BCLR_08B0,{3U,0U,0U}},
{BCLR_08B0,{4U,0U,0U}},
{BCLR_08B0,{5U,0U,0U}},
{BCLR_08B0,{6U,0U,0U}},
{BCLR_08B0,{7U,0U,0U}},
{BCLR_08B8,{0U,0U,0U}},
{BCLR_08B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BSET_08C0,{0U,0U,0U}},
{BSET_08C0,{1U,0U,0U}},
{BSET_08C0,{2U,0U,0U}},
{BSET_08C0,{3U,0U,0U}},
{BSET_08C0,{4U,0U,0U}},
{BSET_08C0,{5U,0U,0U}},
{BSET_08C0,{6U,0U,0U}},
{BSET_08C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BSET_08D0,{0U,0U,0U}},
{BSET_08D0,{1U,0U,0U}},
{BSET_08D0,{2U,0U,0U}},
{BSET_08D0,{3U,0U,0U}},
{BSET_08D0,{4U,0U,0U}},
{BSET_08D0,{5U,0U,0U}},
{BSET_08D0,{6U,0U,0U}},
{BSET_08D0,{7U,0U,0U}},
{BSET_08D8,{0U,0U,0U}},
{BSET_08D8,{1U,0U,0U}},
{BSET_08D8,{2U,0U,0U}},
{BSET_08D8,{3U,0U,0U}},
{BSET_08D8,{4U,0U,0U}},
{BSET_08D8,{5U,0U,0U}},
{BSET_08D8,{6U,0U,0U}},
{BSET_08D8,{7U,0U,0U}},
{BSET_08E0,{0U,0U,0U}},
{BSET_08E0,{1U,0U,0U}},
{BSET_08E0,{2U,0U,0U}},
{BSET_08E0,{3U,0U,0U}},
{BSET_08E0,{4U,0U,0U}},
{BSET_08E0,{5U,0U,0U}},
{BSET_08E0,{6U,0U,0U}},
{BSET_08E0,{7U,0U,0U}},
{BSET_08E8,{0U,0U,0U}},
{BSET_08E8,{1U,0U,0U}},
{BSET_08E8,{2U,0U,0U}},
{BSET_08E8,{3U,0U,0U}},
{BSET_08E8,{4U,0U,0U}},
{BSET_08E8,{5U,0U,0U}},
{BSET_08E8,{6U,0U,0U}},
{BSET_08E8,{7U,0U,0U}},
{BSET_08F0,{0U,0U,0U}},
{BSET_08F0,{1U,0U,0U}},
{BSET_08F0,{2U,0U,0U}},
{BSET_08F0,{3U,0U,0U}},
{BSET_08F0,{4U,0U,0U}},
{BSET_08F0,{5U,0U,0U}},
{BSET_08F0,{6U,0U,0U}},
{BSET_08F0,{7U,0U,0U}},
{BSET_08F8,{0U,0U,0U}},
{BSET_08F9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BTST_0100,{0U,4U,0U}},
{BTST_0100,{1U,4U,0U}},
{BTST_0100,{2U,4U,0U}},
{BTST_0100,{3U,4U,0U}},
{BTST_0100,{4U,4U,0U}},
{BTST_0100,{5U,4U,0U}},
{BTST_0100,{6U,4U,0U}},
{BTST_0100,{7U,4U,0U}},
{MOVEP_0108,{4U,0U,0U}},
{MOVEP_0108,{4U,1U,0U}},
{MOVEP_0108,{4U,2U,0U}},
{MOVEP_0108,{4U,3U,0U}},
{MOVEP_0108,{4U,4U,0U}},
{MOVEP_0108,{4U,5U,0U}},
{MOVEP_0108,{4U,6U,0U}},
{MOVEP_0108,{4U,7U,0U}},
{BTST_0110,{0U,4U,0U}},
{BTST_0110,{1U,4U,0U}},
{BTST_0110,{2U,4U,0U}},
{BTST_0110,{3U,4U,0U}},
{BTST_0110,{4U,4U,0U}},
{BTST_0110,{5U,4U,0U}},
{BTST_0110,{6U,4U,0U}},
{BTST_0110,{7U,4U,0U}},
{BTST_0118,{0U,4U,0U}},
{BTST_0118,{1U,4U,0U}},
{BTST_0118,{2U,4U,0U}},
{BTST_0118,{3U,4U,0U}},
{BTST_0118,{4U,4U,0U}},
{BTST_0118,{5U,4U,0U}},
{BTST_0118,{6U,4U,0U}},
{BTST_0118,{7U,4U,0U}},
{BTST_0120,{0U,4U,0U}},
{BTST_0120,{1U,4U,0U}},
{BTST_0120,{2U,4U,0U}},
{BTST_0120,{3U,4U,0U}},
{BTST_0120,{4U,4U,0U}},
{BTST_0120,{5U,4U,0U}},
{BTST_0120,{6U,4U,0U}},
{BTST_0120,{7U,4U,0U}},
{BTST_0128,{0U,4U,0U}},
{BTST_0128,{1U,4U,0U}},
{BTST_0128,{2U,4U,0U}},
{BTST_0128,{3U,4U,0U}},
{BTST_0128,{4U,4U,0U}},
{BTST_0128,{5U,4U,0U}},
{BTST_0128,{6U,4U,0U}},
{BTST_0128,{7U,4U,0U}},
{BTST_0130,{0U,4U,0U}},
{BTST_0130,{1U,4U,0U}},
{BTST_0130,{2U,4U,0U}},
{BTST_0130,{3U,4U,0U}},
{BTST_0130,{4U,4U,0U}},
{BTST_0130,{5U,4U,0U}},
{BTST_0130,{6U,4U,0U}},
{BTST_0130,{7U,4U,0U}},
{BTST_0138,{0U,4U,0U}},
{BTST_0139,{0U,4U,0U}},
{BTST_013A,{0U,4U,0U}},
{BTST_013B,{0U,4U,0U}},
{BTST_013C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCHG_0140,{0U,4U,0U}},
{BCHG_0140,{1U,4U,0U}},
{BCHG_0140,{2U,4U,0U}},
{BCHG_0140,{3U,4U,0U}},
{BCHG_0140,{4U,4U,0U}},
{BCHG_0140,{5U,4U,0U}},
{BCHG_0140,{6U,4U,0U}},
{BCHG_0140,{7U,4U,0U}},
{MOVEP_0148,{4U,0U,0U}},
{MOVEP_0148,{4U,1U,0U}},
{MOVEP_0148,{4U,2U,0U}},
{MOVEP_0148,{4U,3U,0U}},
{MOVEP_0148,{4U,4U,0U}},
{MOVEP_0148,{4U,5U,0U}},
{MOVEP_0148,{4U,6U,0U}},
{MOVEP_0148,{4U,7U,0U}},
{BCHG_0150,{0U,4U,0U}},
{BCHG_0150,{1U,4U,0U}},
{BCHG_0150,{2U,4U,0U}},
{BCHG_0150,{3U,4U,0U}},
{BCHG_0150,{4U,4U,0U}},
{BCHG_0150,{5U,4U,0U}},
{BCHG_0150,{6U,4U,0U}},
{BCHG_0150,{7U,4U,0U}},
{BCHG_0158,{0U,4U,0U}},
{BCHG_0158,{1U,4U,0U}},
{BCHG_0158,{2U,4U,0U}},
{BCHG_0158,{3U,4U,0U}},
{BCHG_0158,{4U,4U,0U}},
{BCHG_0158,{5U,4U,0U}},
{BCHG_0158,{6U,4U,0U}},
{BCHG_0158,{7U,4U,0U}},
{BCHG_0160,{0U,4U,0U}},
{BCHG_0160,{1U,4U,0U}},
{BCHG_0160,{2U,4U,0U}},
{BCHG_0160,{3U,4U,0U}},
{BCHG_0160,{4U,4U,0U}},
{BCHG_0160,{5U,4U,0U}},
{BCHG_0160,{6U,4U,0U}},
{BCHG_0160,{7U,4U,0U}},
{BCHG_0168,{0U,4U,0U}},
{BCHG_0168,{1U,4U,0U}},
{BCHG_0168,{2U,4U,0U}},
{BCHG_0168,{3U,4U,0U}},
{BCHG_0168,{4U,4U,0U}},
{BCHG_0168,{5U,4U,0U}},
{BCHG_0168,{6U,4U,0U}},
{BCHG_0168,{7U,4U,0U}},
{BCHG_0170,{0U,4U,0U}},
{BCHG_0170,{1U,4U,0U}},
{BCHG_0170,{2U,4U,0U}},
{BCHG_0170,{3U,4U,0U}},
{BCHG_0170,{4U,4U,0U}},
{BCHG_0170,{5U,4U,0U}},
{BCHG_0170,{6U,4U,0U}},
{BCHG_0170,{7U,4U,0U}},
{BCHG_0178,{0U,4U,0U}},
{BCHG_0179,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCLR_0180,{0U,4U,0U}},
{BCLR_0180,{1U,4U,0U}},
{BCLR_0180,{2U,4U,0U}},
{BCLR_0180,{3U,4U,0U}},
{BCLR_0180,{4U,4U,0U}},
{BCLR_0180,{5U,4U,0U}},
{BCLR_0180,{6U,4U,0U}},
{BCLR_0180,{7U,4U,0U}},
{MOVEP_0188,{4U,0U,0U}},
{MOVEP_0188,{4U,1U,0U}},
{MOVEP_0188,{4U,2U,0U}},
{MOVEP_0188,{4U,3U,0U}},
{MOVEP_0188,{4U,4U,0U}},
{MOVEP_0188,{4U,5U,0U}},
{MOVEP_0188,{4U,6U,0U}},
{MOVEP_0188,{4U,7U,0U}},
{BCLR_0190,{0U,4U,0U}},
{BCLR_0190,{1U,4U,0U}},
{BCLR_0190,{2U,4U,0U}},
{BCLR_0190,{3U,4U,0U}},
{BCLR_0190,{4U,4U,0U}},
{BCLR_0190,{5U,4U,0U}},
{BCLR_0190,{6U,4U,0U}},
{BCLR_0190,{7U,4U,0U}},
{BCLR_0198,{0U,4U,0U}},
{BCLR_0198,{1U,4U,0U}},
{BCLR_0198,{2U,4U,0U}},
{BCLR_0198,{3U,4U,0U}},
{BCLR_0198,{4U,4U,0U}},
{BCLR_0198,{5U,4U,0U}},
{BCLR_0198,{6U,4U,0U}},
{BCLR_0198,{7U,4U,0U}},
{BCLR_01A0,{0U,4U,0U}},
{BCLR_01A0,{1U,4U,0U}},
{BCLR_01A0,{2U,4U,0U}},
{BCLR_01A0,{3U,4U,0U}},
{BCLR_01A0,{4U,4U,0U}},
{BCLR_01A0,{5U,4U,0U}},
{BCLR_01A0,{6U,4U,0U}},
{BCLR_01A0,{7U,4U,0U}},
{BCLR_01A8,{0U,4U,0U}},
{BCLR_01A8,{1U,4U,0U}},
{BCLR_01A8,{2U,4U,0U}},
{BCLR_01A8,{3U,4U,0U}},
{BCLR_01A8,{4U,4U,0U}},
{BCLR_01A8,{5U,4U,0U}},
{BCLR_01A8,{6U,4U,0U}},
{BCLR_01A8,{7U,4U,0U}},
{BCLR_01B0,{0U,4U,0U}},
{BCLR_01B0,{1U,4U,0U}},
{BCLR_01B0,{2U,4U,0U}},
{BCLR_01B0,{3U,4U,0U}},
{BCLR_01B0,{4U,4U,0U}},
{BCLR_01B0,{5U,4U,0U}},
{BCLR_01B0,{6U,4U,0U}},
{BCLR_01B0,{7U,4U,0U}},
{BCLR_01B8,{0U,4U,0U}},
{BCLR_01B9,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BSET_01C0,{0U,4U,0U}},
{BSET_01C0,{1U,4U,0U}},
{BSET_01C0,{2U,4U,0U}},
{BSET_01C0,{3U,4U,0U}},
{BSET_01C0,{4U,4U,0U}},
{BSET_01C0,{5U,4U,0U}},
{BSET_01C0,{6U,4U,0U}},
{BSET_01C0,{7U,4U,0U}},
{MOVEP_01C8,{4U,0U,0U}},
{MOVEP_01C8,{4U,1U,0U}},
{MOVEP_01C8,{4U,2U,0U}},
{MOVEP_01C8,{4U,3U,0U}},
{MOVEP_01C8,{4U,4U,0U}},
{MOVEP_01C8,{4U,5U,0U}},
{MOVEP_01C8,{4U,6U,0U}},
{MOVEP_01C8,{4U,7U,0U}},
{BSET_01D0,{0U,4U,0U}},
{BSET_01D0,{1U,4U,0U}},
{BSET_01D0,{2U,4U,0U}},
{BSET_01D0,{3U,4U,0U}},
{BSET_01D0,{4U,4U,0U}},
{BSET_01D0,{5U,4U,0U}},
{BSET_01D0,{6U,4U,0U}},
{BSET_01D0,{7U,4U,0U}},
{BSET_01D8,{0U,4U,0U}},
{BSET_01D8,{1U,4U,0U}},
{BSET_01D8,{2U,4U,0U}},
{BSET_01D8,{3U,4U,0U}},
{BSET_01D8,{4U,4U,0U}},
{BSET_01D8,{5U,4U,0U}},
{BSET_01D8,{6U,4U,0U}},
{BSET_01D8,{7U,4U,0U}},
{BSET_01E0,{0U,4U,0U}},
{BSET_01E0,{1U,4U,0U}},
{BSET_01E0,{2U,4U,0U}},
{BSET_01E0,{3U,4U,0U}},
{BSET_01E0,{4U,4U,0U}},
{BSET_01E0,{5U,4U,0U}},
{BSET_01E0,{6U,4U,0U}},
{BSET_01E0,{7U,4U,0U}},
{BSET_01E8,{0U,4U,0U}},
{BSET_01E8,{1U,4U,0U}},
{BSET_01E8,{2U,4U,0U}},
{BSET_01E8,{3U,4U,0U}},
{BSET_01E8,{4U,4U,0U}},
{BSET_01E8,{5U,4U,0U}},
{BSET_01E8,{6U,4U,0U}},
{BSET_01E8,{7U,4U,0U}},
{BSET_01F0,{0U,4U,0U}},
{BSET_01F0,{1U,4U,0U}},
{BSET_01F0,{2U,4U,0U}},
{BSET_01F0,{3U,4U,0U}},
{BSET_01F0,{4U,4U,0U}},
{BSET_01F0,{5U,4U,0U}},
{BSET_01F0,{6U,4U,0U}},
{BSET_01F0,{7U,4U,0U}},
{BSET_01F8,{0U,4U,0U}},
{BSET_01F9,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EORI_0A00,{0U,0U,0U}},
{EORI_0A00,{1U,0U,0U}},
{EORI_0A00,{2U,0U,0U}},
{EORI_0A00,{3U,0U,0U}},
{EORI_0A00,{4U,0U,0U}},
{EORI_0A00,{5U,0U,0U}},
{EORI_0A00,{6U,0U,0U}},
{EORI_0A00,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EORI_0A10,{0U,0U,0U}},
{EORI_0A10,{1U,0U,0U}},
{EORI_0A10,{2U,0U,0U}},
{EORI_0A10,{3U,0U,0U}},
{EORI_0A10,{4U,0U,0U}},
{EORI_0A10,{5U,0U,0U}},
{EORI_0A10,{6U,0U,0U}},
{EORI_0A10,{7U,0U,0U}},
{EORI_0A18,{0U,0U,0U}},
{EORI_0A18,{1U,0U,0U}},
{EORI_0A18,{2U,0U,0U}},
{EORI_0A18,{3U,0U,0U}},
{EORI_0A18,{4U,0U,0U}},
{EORI_0A18,{5U,0U,0U}},
{EORI_0A18,{6U,0U,0U}},
{EORI_0A18,{7U,0U,0U}},
{EORI_0A20,{0U,0U,0U}},
{EORI_0A20,{1U,0U,0U}},
{EORI_0A20,{2U,0U,0U}},
{EORI_0A20,{3U,0U,0U}},
{EORI_0A20,{4U,0U,0U}},
{EORI_0A20,{5U,0U,0U}},
{EORI_0A20,{6U,0U,0U}},
{EORI_0A20,{7U,0U,0U}},
{EORI_0A28,{0U,0U,0U}},
{EORI_0A28,{1U,0U,0U}},
{EORI_0A28,{2U,0U,0U}},
{EORI_0A28,{3U,0U,0U}},
{EORI_0A28,{4U,0U,0U}},
{EORI_0A28,{5U,0U,0U}},
{EORI_0A28,{6U,0U,0U}},
{EORI_0A28,{7U,0U,0U}},
{EORI_0A30,{0U,0U,0U}},
{EORI_0A30,{1U,0U,0U}},
{EORI_0A30,{2U,0U,0U}},
{EORI_0A30,{3U,0U,0U}},
{EORI_0A30,{4U,0U,0U}},
{EORI_0A30,{5U,0U,0U}},
{EORI_0A30,{6U,0U,0U}},
{EORI_0A30,{7U,0U,0U}},
{EORI_0A38,{0U,0U,0U}},
{EORI_0A39,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EORI_0A3C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EORI_0A40,{0U,0U,0U}},
{EORI_0A40,{1U,0U,0U}},
{EORI_0A40,{2U,0U,0U}},
{EORI_0A40,{3U,0U,0U}},
{EORI_0A40,{4U,0U,0U}},
{EORI_0A40,{5U,0U,0U}},
{EORI_0A40,{6U,0U,0U}},
{EORI_0A40,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EORI_0A50,{0U,0U,0U}},
{EORI_0A50,{1U,0U,0U}},
{EORI_0A50,{2U,0U,0U}},
{EORI_0A50,{3U,0U,0U}},
{EORI_0A50,{4U,0U,0U}},
{EORI_0A50,{5U,0U,0U}},
{EORI_0A50,{6U,0U,0U}},
{EORI_0A50,{7U,0U,0U}},
{EORI_0A58,{0U,0U,0U}},
{EORI_0A58,{1U,0U,0U}},
{EORI_0A58,{2U,0U,0U}},
{EORI_0A58,{3U,0U,0U}},
{EORI_0A58,{4U,0U,0U}},
{EORI_0A58,{5U,0U,0U}},
{EORI_0A58,{6U,0U,0U}},
{EORI_0A58,{7U,0U,0U}},
{EORI_0A60,{0U,0U,0U}},
{EORI_0A60,{1U,0U,0U}},
{EORI_0A60,{2U,0U,0U}},
{EORI_0A60,{3U,0U,0U}},
{EORI_0A60,{4U,0U,0U}},
{EORI_0A60,{5U,0U,0U}},
{EORI_0A60,{6U,0U,0U}},
{EORI_0A60,{7U,0U,0U}},
{EORI_0A68,{0U,0U,0U}},
{EORI_0A68,{1U,0U,0U}},
{EORI_0A68,{2U,0U,0U}},
{EORI_0A68,{3U,0U,0U}},
{EORI_0A68,{4U,0U,0U}},
{EORI_0A68,{5U,0U,0U}},
{EORI_0A68,{6U,0U,0U}},
{EORI_0A68,{7U,0U,0U}},
{EORI_0A70,{0U,0U,0U}},
{EORI_0A70,{1U,0U,0U}},
{EORI_0A70,{2U,0U,0U}},
{EORI_0A70,{3U,0U,0U}},
{EORI_0A70,{4U,0U,0U}},
{EORI_0A70,{5U,0U,0U}},
{EORI_0A70,{6U,0U,0U}},
{EORI_0A70,{7U,0U,0U}},
{EORI_0A78,{0U,0U,0U}},
{EORI_0A79,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EORI_0A7C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EORI_0A80,{0U,0U,0U}},
{EORI_0A80,{1U,0U,0U}},
{EORI_0A80,{2U,0U,0U}},
{EORI_0A80,{3U,0U,0U}},
{EORI_0A80,{4U,0U,0U}},
{EORI_0A80,{5U,0U,0U}},
{EORI_0A80,{6U,0U,0U}},
{EORI_0A80,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EORI_0A90,{0U,0U,0U}},
{EORI_0A90,{1U,0U,0U}},
{EORI_0A90,{2U,0U,0U}},
{EORI_0A90,{3U,0U,0U}},
{EORI_0A90,{4U,0U,0U}},
{EORI_0A90,{5U,0U,0U}},
{EORI_0A90,{6U,0U,0U}},
{EORI_0A90,{7U,0U,0U}},
{EORI_0A98,{0U,0U,0U}},
{EORI_0A98,{1U,0U,0U}},
{EORI_0A98,{2U,0U,0U}},
{EORI_0A98,{3U,0U,0U}},
{EORI_0A98,{4U,0U,0U}},
{EORI_0A98,{5U,0U,0U}},
{EORI_0A98,{6U,0U,0U}},
{EORI_0A98,{7U,0U,0U}},
{EORI_0AA0,{0U,0U,0U}},
{EORI_0AA0,{1U,0U,0U}},
{EORI_0AA0,{2U,0U,0U}},
{EORI_0AA0,{3U,0U,0U}},
{EORI_0AA0,{4U,0U,0U}},
{EORI_0AA0,{5U,0U,0U}},
{EORI_0AA0,{6U,0U,0U}},
{EORI_0AA0,{7U,0U,0U}},
{EORI_0AA8,{0U,0U,0U}},
{EORI_0AA8,{1U,0U,0U}},
{EORI_0AA8,{2U,0U,0U}},
{EORI_0AA8,{3U,0U,0U}},
{EORI_0AA8,{4U,0U,0U}},
{EORI_0AA8,{5U,0U,0U}},
{EORI_0AA8,{6U,0U,0U}},
{EORI_0AA8,{7U,0U,0U}},
{EORI_0AB0,{0U,0U,0U}},
{EORI_0AB0,{1U,0U,0U}},
{EORI_0AB0,{2U,0U,0U}},
{EORI_0AB0,{3U,0U,0U}},
{EORI_0AB0,{4U,0U,0U}},
{EORI_0AB0,{5U,0U,0U}},
{EORI_0AB0,{6U,0U,0U}},
{EORI_0AB0,{7U,0U,0U}},
{EORI_0AB8,{0U,0U,0U}},
{EORI_0AB9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CAS_0AD0,{0U,0U,0U}},
{CAS_0AD0,{1U,0U,0U}},
{CAS_0AD0,{2U,0U,0U}},
{CAS_0AD0,{3U,0U,0U}},
{CAS_0AD0,{4U,0U,0U}},
{CAS_0AD0,{5U,0U,0U}},
{CAS_0AD0,{6U,0U,0U}},
{CAS_0AD0,{7U,0U,0U}},
{CAS_0AD8,{0U,0U,0U}},
{CAS_0AD8,{1U,0U,0U}},
{CAS_0AD8,{2U,0U,0U}},
{CAS_0AD8,{3U,0U,0U}},
{CAS_0AD8,{4U,0U,0U}},
{CAS_0AD8,{5U,0U,0U}},
{CAS_0AD8,{6U,0U,0U}},
{CAS_0AD8,{7U,0U,0U}},
{CAS_0AE0,{0U,0U,0U}},
{CAS_0AE0,{1U,0U,0U}},
{CAS_0AE0,{2U,0U,0U}},
{CAS_0AE0,{3U,0U,0U}},
{CAS_0AE0,{4U,0U,0U}},
{CAS_0AE0,{5U,0U,0U}},
{CAS_0AE0,{6U,0U,0U}},
{CAS_0AE0,{7U,0U,0U}},
{CAS_0AE8,{0U,0U,0U}},
{CAS_0AE8,{1U,0U,0U}},
{CAS_0AE8,{2U,0U,0U}},
{CAS_0AE8,{3U,0U,0U}},
{CAS_0AE8,{4U,0U,0U}},
{CAS_0AE8,{5U,0U,0U}},
{CAS_0AE8,{6U,0U,0U}},
{CAS_0AE8,{7U,0U,0U}},
{CAS_0AF0,{0U,0U,0U}},
{CAS_0AF0,{1U,0U,0U}},
{CAS_0AF0,{2U,0U,0U}},
{CAS_0AF0,{3U,0U,0U}},
{CAS_0AF0,{4U,0U,0U}},
{CAS_0AF0,{5U,0U,0U}},
{CAS_0AF0,{6U,0U,0U}},
{CAS_0AF0,{7U,0U,0U}},
{CAS_0AF8,{0U,0U,0U}},
{CAS_0AF9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BTST_0100,{0U,5U,0U}},
{BTST_0100,{1U,5U,0U}},
{BTST_0100,{2U,5U,0U}},
{BTST_0100,{3U,5U,0U}},
{BTST_0100,{4U,5U,0U}},
{BTST_0100,{5U,5U,0U}},
{BTST_0100,{6U,5U,0U}},
{BTST_0100,{7U,5U,0U}},
{MOVEP_0108,{5U,0U,0U}},
{MOVEP_0108,{5U,1U,0U}},
{MOVEP_0108,{5U,2U,0U}},
{MOVEP_0108,{5U,3U,0U}},
{MOVEP_0108,{5U,4U,0U}},
{MOVEP_0108,{5U,5U,0U}},
{MOVEP_0108,{5U,6U,0U}},
{MOVEP_0108,{5U,7U,0U}},
{BTST_0110,{0U,5U,0U}},
{BTST_0110,{1U,5U,0U}},
{BTST_0110,{2U,5U,0U}},
{BTST_0110,{3U,5U,0U}},
{BTST_0110,{4U,5U,0U}},
{BTST_0110,{5U,5U,0U}},
{BTST_0110,{6U,5U,0U}},
{BTST_0110,{7U,5U,0U}},
{BTST_0118,{0U,5U,0U}},
{BTST_0118,{1U,5U,0U}},
{BTST_0118,{2U,5U,0U}},
{BTST_0118,{3U,5U,0U}},
{BTST_0118,{4U,5U,0U}},
{BTST_0118,{5U,5U,0U}},
{BTST_0118,{6U,5U,0U}},
{BTST_0118,{7U,5U,0U}},
{BTST_0120,{0U,5U,0U}},
{BTST_0120,{1U,5U,0U}},
{BTST_0120,{2U,5U,0U}},
{BTST_0120,{3U,5U,0U}},
{BTST_0120,{4U,5U,0U}},
{BTST_0120,{5U,5U,0U}},
{BTST_0120,{6U,5U,0U}},
{BTST_0120,{7U,5U,0U}},
{BTST_0128,{0U,5U,0U}},
{BTST_0128,{1U,5U,0U}},
{BTST_0128,{2U,5U,0U}},
{BTST_0128,{3U,5U,0U}},
{BTST_0128,{4U,5U,0U}},
{BTST_0128,{5U,5U,0U}},
{BTST_0128,{6U,5U,0U}},
{BTST_0128,{7U,5U,0U}},
{BTST_0130,{0U,5U,0U}},
{BTST_0130,{1U,5U,0U}},
{BTST_0130,{2U,5U,0U}},
{BTST_0130,{3U,5U,0U}},
{BTST_0130,{4U,5U,0U}},
{BTST_0130,{5U,5U,0U}},
{BTST_0130,{6U,5U,0U}},
{BTST_0130,{7U,5U,0U}},
{BTST_0138,{0U,5U,0U}},
{BTST_0139,{0U,5U,0U}},
{BTST_013A,{0U,5U,0U}},
{BTST_013B,{0U,5U,0U}},
{BTST_013C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCHG_0140,{0U,5U,0U}},
{BCHG_0140,{1U,5U,0U}},
{BCHG_0140,{2U,5U,0U}},
{BCHG_0140,{3U,5U,0U}},
{BCHG_0140,{4U,5U,0U}},
{BCHG_0140,{5U,5U,0U}},
{BCHG_0140,{6U,5U,0U}},
{BCHG_0140,{7U,5U,0U}},
{MOVEP_0148,{5U,0U,0U}},
{MOVEP_0148,{5U,1U,0U}},
{MOVEP_0148,{5U,2U,0U}},
{MOVEP_0148,{5U,3U,0U}},
{MOVEP_0148,{5U,4U,0U}},
{MOVEP_0148,{5U,5U,0U}},
{MOVEP_0148,{5U,6U,0U}},
{MOVEP_0148,{5U,7U,0U}},
{BCHG_0150,{0U,5U,0U}},
{BCHG_0150,{1U,5U,0U}},
{BCHG_0150,{2U,5U,0U}},
{BCHG_0150,{3U,5U,0U}},
{BCHG_0150,{4U,5U,0U}},
{BCHG_0150,{5U,5U,0U}},
{BCHG_0150,{6U,5U,0U}},
{BCHG_0150,{7U,5U,0U}},
{BCHG_0158,{0U,5U,0U}},
{BCHG_0158,{1U,5U,0U}},
{BCHG_0158,{2U,5U,0U}},
{BCHG_0158,{3U,5U,0U}},
{BCHG_0158,{4U,5U,0U}},
{BCHG_0158,{5U,5U,0U}},
{BCHG_0158,{6U,5U,0U}},
{BCHG_0158,{7U,5U,0U}},
{BCHG_0160,{0U,5U,0U}},
{BCHG_0160,{1U,5U,0U}},
{BCHG_0160,{2U,5U,0U}},
{BCHG_0160,{3U,5U,0U}},
{BCHG_0160,{4U,5U,0U}},
{BCHG_0160,{5U,5U,0U}},
{BCHG_0160,{6U,5U,0U}},
{BCHG_0160,{7U,5U,0U}},
{BCHG_0168,{0U,5U,0U}},
{BCHG_0168,{1U,5U,0U}},
{BCHG_0168,{2U,5U,0U}},
{BCHG_0168,{3U,5U,0U}},
{BCHG_0168,{4U,5U,0U}},
{BCHG_0168,{5U,5U,0U}},
{BCHG_0168,{6U,5U,0U}},
{BCHG_0168,{7U,5U,0U}},
{BCHG_0170,{0U,5U,0U}},
{BCHG_0170,{1U,5U,0U}},
{BCHG_0170,{2U,5U,0U}},
{BCHG_0170,{3U,5U,0U}},
{BCHG_0170,{4U,5U,0U}},
{BCHG_0170,{5U,5U,0U}},
{BCHG_0170,{6U,5U,0U}},
{BCHG_0170,{7U,5U,0U}},
{BCHG_0178,{0U,5U,0U}},
{BCHG_0179,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCLR_0180,{0U,5U,0U}},
{BCLR_0180,{1U,5U,0U}},
{BCLR_0180,{2U,5U,0U}},
{BCLR_0180,{3U,5U,0U}},
{BCLR_0180,{4U,5U,0U}},
{BCLR_0180,{5U,5U,0U}},
{BCLR_0180,{6U,5U,0U}},
{BCLR_0180,{7U,5U,0U}},
{MOVEP_0188,{5U,0U,0U}},
{MOVEP_0188,{5U,1U,0U}},
{MOVEP_0188,{5U,2U,0U}},
{MOVEP_0188,{5U,3U,0U}},
{MOVEP_0188,{5U,4U,0U}},
{MOVEP_0188,{5U,5U,0U}},
{MOVEP_0188,{5U,6U,0U}},
{MOVEP_0188,{5U,7U,0U}},
{BCLR_0190,{0U,5U,0U}},
{BCLR_0190,{1U,5U,0U}},
{BCLR_0190,{2U,5U,0U}},
{BCLR_0190,{3U,5U,0U}},
{BCLR_0190,{4U,5U,0U}},
{BCLR_0190,{5U,5U,0U}},
{BCLR_0190,{6U,5U,0U}},
{BCLR_0190,{7U,5U,0U}},
{BCLR_0198,{0U,5U,0U}},
{BCLR_0198,{1U,5U,0U}},
{BCLR_0198,{2U,5U,0U}},
{BCLR_0198,{3U,5U,0U}},
{BCLR_0198,{4U,5U,0U}},
{BCLR_0198,{5U,5U,0U}},
{BCLR_0198,{6U,5U,0U}},
{BCLR_0198,{7U,5U,0U}},
{BCLR_01A0,{0U,5U,0U}},
{BCLR_01A0,{1U,5U,0U}},
{BCLR_01A0,{2U,5U,0U}},
{BCLR_01A0,{3U,5U,0U}},
{BCLR_01A0,{4U,5U,0U}},
{BCLR_01A0,{5U,5U,0U}},
{BCLR_01A0,{6U,5U,0U}},
{BCLR_01A0,{7U,5U,0U}},
{BCLR_01A8,{0U,5U,0U}},
{BCLR_01A8,{1U,5U,0U}},
{BCLR_01A8,{2U,5U,0U}},
{BCLR_01A8,{3U,5U,0U}},
{BCLR_01A8,{4U,5U,0U}},
{BCLR_01A8,{5U,5U,0U}},
{BCLR_01A8,{6U,5U,0U}},
{BCLR_01A8,{7U,5U,0U}},
{BCLR_01B0,{0U,5U,0U}},
{BCLR_01B0,{1U,5U,0U}},
{BCLR_01B0,{2U,5U,0U}},
{BCLR_01B0,{3U,5U,0U}},
{BCLR_01B0,{4U,5U,0U}},
{BCLR_01B0,{5U,5U,0U}},
{BCLR_01B0,{6U,5U,0U}},
{BCLR_01B0,{7U,5U,0U}},
{BCLR_01B8,{0U,5U,0U}},
{BCLR_01B9,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BSET_01C0,{0U,5U,0U}},
{BSET_01C0,{1U,5U,0U}},
{BSET_01C0,{2U,5U,0U}},
{BSET_01C0,{3U,5U,0U}},
{BSET_01C0,{4U,5U,0U}},
{BSET_01C0,{5U,5U,0U}},
{BSET_01C0,{6U,5U,0U}},
{BSET_01C0,{7U,5U,0U}},
{MOVEP_01C8,{5U,0U,0U}},
{MOVEP_01C8,{5U,1U,0U}},
{MOVEP_01C8,{5U,2U,0U}},
{MOVEP_01C8,{5U,3U,0U}},
{MOVEP_01C8,{5U,4U,0U}},
{MOVEP_01C8,{5U,5U,0U}},
{MOVEP_01C8,{5U,6U,0U}},
{MOVEP_01C8,{5U,7U,0U}},
{BSET_01D0,{0U,5U,0U}},
{BSET_01D0,{1U,5U,0U}},
{BSET_01D0,{2U,5U,0U}},
{BSET_01D0,{3U,5U,0U}},
{BSET_01D0,{4U,5U,0U}},
{BSET_01D0,{5U,5U,0U}},
{BSET_01D0,{6U,5U,0U}},
{BSET_01D0,{7U,5U,0U}},
{BSET_01D8,{0U,5U,0U}},
{BSET_01D8,{1U,5U,0U}},
{BSET_01D8,{2U,5U,0U}},
{BSET_01D8,{3U,5U,0U}},
{BSET_01D8,{4U,5U,0U}},
{BSET_01D8,{5U,5U,0U}},
{BSET_01D8,{6U,5U,0U}},
{BSET_01D8,{7U,5U,0U}},
{BSET_01E0,{0U,5U,0U}},
{BSET_01E0,{1U,5U,0U}},
{BSET_01E0,{2U,5U,0U}},
{BSET_01E0,{3U,5U,0U}},
{BSET_01E0,{4U,5U,0U}},
{BSET_01E0,{5U,5U,0U}},
{BSET_01E0,{6U,5U,0U}},
{BSET_01E0,{7U,5U,0U}},
{BSET_01E8,{0U,5U,0U}},
{BSET_01E8,{1U,5U,0U}},
{BSET_01E8,{2U,5U,0U}},
{BSET_01E8,{3U,5U,0U}},
{BSET_01E8,{4U,5U,0U}},
{BSET_01E8,{5U,5U,0U}},
{BSET_01E8,{6U,5U,0U}},
{BSET_01E8,{7U,5U,0U}},
{BSET_01F0,{0U,5U,0U}},
{BSET_01F0,{1U,5U,0U}},
{BSET_01F0,{2U,5U,0U}},
{BSET_01F0,{3U,5U,0U}},
{BSET_01F0,{4U,5U,0U}},
{BSET_01F0,{5U,5U,0U}},
{BSET_01F0,{6U,5U,0U}},
{BSET_01F0,{7U,5U,0U}},
{BSET_01F8,{0U,5U,0U}},
{BSET_01F9,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPI_0C00,{0U,0U,0U}},
{CMPI_0C00,{1U,0U,0U}},
{CMPI_0C00,{2U,0U,0U}},
{CMPI_0C00,{3U,0U,0U}},
{CMPI_0C00,{4U,0U,0U}},
{CMPI_0C00,{5U,0U,0U}},
{CMPI_0C00,{6U,0U,0U}},
{CMPI_0C00,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPI_0C10,{0U,0U,0U}},
{CMPI_0C10,{1U,0U,0U}},
{CMPI_0C10,{2U,0U,0U}},
{CMPI_0C10,{3U,0U,0U}},
{CMPI_0C10,{4U,0U,0U}},
{CMPI_0C10,{5U,0U,0U}},
{CMPI_0C10,{6U,0U,0U}},
{CMPI_0C10,{7U,0U,0U}},
{CMPI_0C18,{0U,0U,0U}},
{CMPI_0C18,{1U,0U,0U}},
{CMPI_0C18,{2U,0U,0U}},
{CMPI_0C18,{3U,0U,0U}},
{CMPI_0C18,{4U,0U,0U}},
{CMPI_0C18,{5U,0U,0U}},
{CMPI_0C18,{6U,0U,0U}},
{CMPI_0C18,{7U,0U,0U}},
{CMPI_0C20,{0U,0U,0U}},
{CMPI_0C20,{1U,0U,0U}},
{CMPI_0C20,{2U,0U,0U}},
{CMPI_0C20,{3U,0U,0U}},
{CMPI_0C20,{4U,0U,0U}},
{CMPI_0C20,{5U,0U,0U}},
{CMPI_0C20,{6U,0U,0U}},
{CMPI_0C20,{7U,0U,0U}},
{CMPI_0C28,{0U,0U,0U}},
{CMPI_0C28,{1U,0U,0U}},
{CMPI_0C28,{2U,0U,0U}},
{CMPI_0C28,{3U,0U,0U}},
{CMPI_0C28,{4U,0U,0U}},
{CMPI_0C28,{5U,0U,0U}},
{CMPI_0C28,{6U,0U,0U}},
{CMPI_0C28,{7U,0U,0U}},
{CMPI_0C30,{0U,0U,0U}},
{CMPI_0C30,{1U,0U,0U}},
{CMPI_0C30,{2U,0U,0U}},
{CMPI_0C30,{3U,0U,0U}},
{CMPI_0C30,{4U,0U,0U}},
{CMPI_0C30,{5U,0U,0U}},
{CMPI_0C30,{6U,0U,0U}},
{CMPI_0C30,{7U,0U,0U}},
{CMPI_0C38,{0U,0U,0U}},
{CMPI_0C39,{0U,0U,0U}},
{CMPI_0C3A,{0U,0U,0U}},
{CMPI_0C3B,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPI_0C40,{0U,0U,0U}},
{CMPI_0C40,{1U,0U,0U}},
{CMPI_0C40,{2U,0U,0U}},
{CMPI_0C40,{3U,0U,0U}},
{CMPI_0C40,{4U,0U,0U}},
{CMPI_0C40,{5U,0U,0U}},
{CMPI_0C40,{6U,0U,0U}},
{CMPI_0C40,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPI_0C50,{0U,0U,0U}},
{CMPI_0C50,{1U,0U,0U}},
{CMPI_0C50,{2U,0U,0U}},
{CMPI_0C50,{3U,0U,0U}},
{CMPI_0C50,{4U,0U,0U}},
{CMPI_0C50,{5U,0U,0U}},
{CMPI_0C50,{6U,0U,0U}},
{CMPI_0C50,{7U,0U,0U}},
{CMPI_0C58,{0U,0U,0U}},
{CMPI_0C58,{1U,0U,0U}},
{CMPI_0C58,{2U,0U,0U}},
{CMPI_0C58,{3U,0U,0U}},
{CMPI_0C58,{4U,0U,0U}},
{CMPI_0C58,{5U,0U,0U}},
{CMPI_0C58,{6U,0U,0U}},
{CMPI_0C58,{7U,0U,0U}},
{CMPI_0C60,{0U,0U,0U}},
{CMPI_0C60,{1U,0U,0U}},
{CMPI_0C60,{2U,0U,0U}},
{CMPI_0C60,{3U,0U,0U}},
{CMPI_0C60,{4U,0U,0U}},
{CMPI_0C60,{5U,0U,0U}},
{CMPI_0C60,{6U,0U,0U}},
{CMPI_0C60,{7U,0U,0U}},
{CMPI_0C68,{0U,0U,0U}},
{CMPI_0C68,{1U,0U,0U}},
{CMPI_0C68,{2U,0U,0U}},
{CMPI_0C68,{3U,0U,0U}},
{CMPI_0C68,{4U,0U,0U}},
{CMPI_0C68,{5U,0U,0U}},
{CMPI_0C68,{6U,0U,0U}},
{CMPI_0C68,{7U,0U,0U}},
{CMPI_0C70,{0U,0U,0U}},
{CMPI_0C70,{1U,0U,0U}},
{CMPI_0C70,{2U,0U,0U}},
{CMPI_0C70,{3U,0U,0U}},
{CMPI_0C70,{4U,0U,0U}},
{CMPI_0C70,{5U,0U,0U}},
{CMPI_0C70,{6U,0U,0U}},
{CMPI_0C70,{7U,0U,0U}},
{CMPI_0C78,{0U,0U,0U}},
{CMPI_0C79,{0U,0U,0U}},
{CMPI_0C7A,{0U,0U,0U}},
{CMPI_0C7B,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPI_0C80,{0U,0U,0U}},
{CMPI_0C80,{1U,0U,0U}},
{CMPI_0C80,{2U,0U,0U}},
{CMPI_0C80,{3U,0U,0U}},
{CMPI_0C80,{4U,0U,0U}},
{CMPI_0C80,{5U,0U,0U}},
{CMPI_0C80,{6U,0U,0U}},
{CMPI_0C80,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPI_0C90,{0U,0U,0U}},
{CMPI_0C90,{1U,0U,0U}},
{CMPI_0C90,{2U,0U,0U}},
{CMPI_0C90,{3U,0U,0U}},
{CMPI_0C90,{4U,0U,0U}},
{CMPI_0C90,{5U,0U,0U}},
{CMPI_0C90,{6U,0U,0U}},
{CMPI_0C90,{7U,0U,0U}},
{CMPI_0C98,{0U,0U,0U}},
{CMPI_0C98,{1U,0U,0U}},
{CMPI_0C98,{2U,0U,0U}},
{CMPI_0C98,{3U,0U,0U}},
{CMPI_0C98,{4U,0U,0U}},
{CMPI_0C98,{5U,0U,0U}},
{CMPI_0C98,{6U,0U,0U}},
{CMPI_0C98,{7U,0U,0U}},
{CMPI_0CA0,{0U,0U,0U}},
{CMPI_0CA0,{1U,0U,0U}},
{CMPI_0CA0,{2U,0U,0U}},
{CMPI_0CA0,{3U,0U,0U}},
{CMPI_0CA0,{4U,0U,0U}},
{CMPI_0CA0,{5U,0U,0U}},
{CMPI_0CA0,{6U,0U,0U}},
{CMPI_0CA0,{7U,0U,0U}},
{CMPI_0CA8,{0U,0U,0U}},
{CMPI_0CA8,{1U,0U,0U}},
{CMPI_0CA8,{2U,0U,0U}},
{CMPI_0CA8,{3U,0U,0U}},
{CMPI_0CA8,{4U,0U,0U}},
{CMPI_0CA8,{5U,0U,0U}},
{CMPI_0CA8,{6U,0U,0U}},
{CMPI_0CA8,{7U,0U,0U}},
{CMPI_0CB0,{0U,0U,0U}},
{CMPI_0CB0,{1U,0U,0U}},
{CMPI_0CB0,{2U,0U,0U}},
{CMPI_0CB0,{3U,0U,0U}},
{CMPI_0CB0,{4U,0U,0U}},
{CMPI_0CB0,{5U,0U,0U}},
{CMPI_0CB0,{6U,0U,0U}},
{CMPI_0CB0,{7U,0U,0U}},
{CMPI_0CB8,{0U,0U,0U}},
{CMPI_0CB9,{0U,0U,0U}},
{CMPI_0CBA,{0U,0U,0U}},
{CMPI_0CBB,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CAS_0CD0,{0U,0U,0U}},
{CAS_0CD0,{1U,0U,0U}},
{CAS_0CD0,{2U,0U,0U}},
{CAS_0CD0,{3U,0U,0U}},
{CAS_0CD0,{4U,0U,0U}},
{CAS_0CD0,{5U,0U,0U}},
{CAS_0CD0,{6U,0U,0U}},
{CAS_0CD0,{7U,0U,0U}},
{CAS_0CD8,{0U,0U,0U}},
{CAS_0CD8,{1U,0U,0U}},
{CAS_0CD8,{2U,0U,0U}},
{CAS_0CD8,{3U,0U,0U}},
{CAS_0CD8,{4U,0U,0U}},
{CAS_0CD8,{5U,0U,0U}},
{CAS_0CD8,{6U,0U,0U}},
{CAS_0CD8,{7U,0U,0U}},
{CAS_0CE0,{0U,0U,0U}},
{CAS_0CE0,{1U,0U,0U}},
{CAS_0CE0,{2U,0U,0U}},
{CAS_0CE0,{3U,0U,0U}},
{CAS_0CE0,{4U,0U,0U}},
{CAS_0CE0,{5U,0U,0U}},
{CAS_0CE0,{6U,0U,0U}},
{CAS_0CE0,{7U,0U,0U}},
{CAS_0CE8,{0U,0U,0U}},
{CAS_0CE8,{1U,0U,0U}},
{CAS_0CE8,{2U,0U,0U}},
{CAS_0CE8,{3U,0U,0U}},
{CAS_0CE8,{4U,0U,0U}},
{CAS_0CE8,{5U,0U,0U}},
{CAS_0CE8,{6U,0U,0U}},
{CAS_0CE8,{7U,0U,0U}},
{CAS_0CF0,{0U,0U,0U}},
{CAS_0CF0,{1U,0U,0U}},
{CAS_0CF0,{2U,0U,0U}},
{CAS_0CF0,{3U,0U,0U}},
{CAS_0CF0,{4U,0U,0U}},
{CAS_0CF0,{5U,0U,0U}},
{CAS_0CF0,{6U,0U,0U}},
{CAS_0CF0,{7U,0U,0U}},
{CAS_0CF8,{0U,0U,0U}},
{CAS_0CF9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CAS2_0CFC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BTST_0100,{0U,6U,0U}},
{BTST_0100,{1U,6U,0U}},
{BTST_0100,{2U,6U,0U}},
{BTST_0100,{3U,6U,0U}},
{BTST_0100,{4U,6U,0U}},
{BTST_0100,{5U,6U,0U}},
{BTST_0100,{6U,6U,0U}},
{BTST_0100,{7U,6U,0U}},
{MOVEP_0108,{6U,0U,0U}},
{MOVEP_0108,{6U,1U,0U}},
{MOVEP_0108,{6U,2U,0U}},
{MOVEP_0108,{6U,3U,0U}},
{MOVEP_0108,{6U,4U,0U}},
{MOVEP_0108,{6U,5U,0U}},
{MOVEP_0108,{6U,6U,0U}},
{MOVEP_0108,{6U,7U,0U}},
{BTST_0110,{0U,6U,0U}},
{BTST_0110,{1U,6U,0U}},
{BTST_0110,{2U,6U,0U}},
{BTST_0110,{3U,6U,0U}},
{BTST_0110,{4U,6U,0U}},
{BTST_0110,{5U,6U,0U}},
{BTST_0110,{6U,6U,0U}},
{BTST_0110,{7U,6U,0U}},
{BTST_0118,{0U,6U,0U}},
{BTST_0118,{1U,6U,0U}},
{BTST_0118,{2U,6U,0U}},
{BTST_0118,{3U,6U,0U}},
{BTST_0118,{4U,6U,0U}},
{BTST_0118,{5U,6U,0U}},
{BTST_0118,{6U,6U,0U}},
{BTST_0118,{7U,6U,0U}},
{BTST_0120,{0U,6U,0U}},
{BTST_0120,{1U,6U,0U}},
{BTST_0120,{2U,6U,0U}},
{BTST_0120,{3U,6U,0U}},
{BTST_0120,{4U,6U,0U}},
{BTST_0120,{5U,6U,0U}},
{BTST_0120,{6U,6U,0U}},
{BTST_0120,{7U,6U,0U}},
{BTST_0128,{0U,6U,0U}},
{BTST_0128,{1U,6U,0U}},
{BTST_0128,{2U,6U,0U}},
{BTST_0128,{3U,6U,0U}},
{BTST_0128,{4U,6U,0U}},
{BTST_0128,{5U,6U,0U}},
{BTST_0128,{6U,6U,0U}},
{BTST_0128,{7U,6U,0U}},
{BTST_0130,{0U,6U,0U}},
{BTST_0130,{1U,6U,0U}},
{BTST_0130,{2U,6U,0U}},
{BTST_0130,{3U,6U,0U}},
{BTST_0130,{4U,6U,0U}},
{BTST_0130,{5U,6U,0U}},
{BTST_0130,{6U,6U,0U}},
{BTST_0130,{7U,6U,0U}},
{BTST_0138,{0U,6U,0U}},
{BTST_0139,{0U,6U,0U}},
{BTST_013A,{0U,6U,0U}},
{BTST_013B,{0U,6U,0U}},
{BTST_013C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCHG_0140,{0U,6U,0U}},
{BCHG_0140,{1U,6U,0U}},
{BCHG_0140,{2U,6U,0U}},
{BCHG_0140,{3U,6U,0U}},
{BCHG_0140,{4U,6U,0U}},
{BCHG_0140,{5U,6U,0U}},
{BCHG_0140,{6U,6U,0U}},
{BCHG_0140,{7U,6U,0U}},
{MOVEP_0148,{6U,0U,0U}},
{MOVEP_0148,{6U,1U,0U}},
{MOVEP_0148,{6U,2U,0U}},
{MOVEP_0148,{6U,3U,0U}},
{MOVEP_0148,{6U,4U,0U}},
{MOVEP_0148,{6U,5U,0U}},
{MOVEP_0148,{6U,6U,0U}},
{MOVEP_0148,{6U,7U,0U}},
{BCHG_0150,{0U,6U,0U}},
{BCHG_0150,{1U,6U,0U}},
{BCHG_0150,{2U,6U,0U}},
{BCHG_0150,{3U,6U,0U}},
{BCHG_0150,{4U,6U,0U}},
{BCHG_0150,{5U,6U,0U}},
{BCHG_0150,{6U,6U,0U}},
{BCHG_0150,{7U,6U,0U}},
{BCHG_0158,{0U,6U,0U}},
{BCHG_0158,{1U,6U,0U}},
{BCHG_0158,{2U,6U,0U}},
{BCHG_0158,{3U,6U,0U}},
{BCHG_0158,{4U,6U,0U}},
{BCHG_0158,{5U,6U,0U}},
{BCHG_0158,{6U,6U,0U}},
{BCHG_0158,{7U,6U,0U}},
{BCHG_0160,{0U,6U,0U}},
{BCHG_0160,{1U,6U,0U}},
{BCHG_0160,{2U,6U,0U}},
{BCHG_0160,{3U,6U,0U}},
{BCHG_0160,{4U,6U,0U}},
{BCHG_0160,{5U,6U,0U}},
{BCHG_0160,{6U,6U,0U}},
{BCHG_0160,{7U,6U,0U}},
{BCHG_0168,{0U,6U,0U}},
{BCHG_0168,{1U,6U,0U}},
{BCHG_0168,{2U,6U,0U}},
{BCHG_0168,{3U,6U,0U}},
{BCHG_0168,{4U,6U,0U}},
{BCHG_0168,{5U,6U,0U}},
{BCHG_0168,{6U,6U,0U}},
{BCHG_0168,{7U,6U,0U}},
{BCHG_0170,{0U,6U,0U}},
{BCHG_0170,{1U,6U,0U}},
{BCHG_0170,{2U,6U,0U}},
{BCHG_0170,{3U,6U,0U}},
{BCHG_0170,{4U,6U,0U}},
{BCHG_0170,{5U,6U,0U}},
{BCHG_0170,{6U,6U,0U}},
{BCHG_0170,{7U,6U,0U}},
{BCHG_0178,{0U,6U,0U}},
{BCHG_0179,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCLR_0180,{0U,6U,0U}},
{BCLR_0180,{1U,6U,0U}},
{BCLR_0180,{2U,6U,0U}},
{BCLR_0180,{3U,6U,0U}},
{BCLR_0180,{4U,6U,0U}},
{BCLR_0180,{5U,6U,0U}},
{BCLR_0180,{6U,6U,0U}},
{BCLR_0180,{7U,6U,0U}},
{MOVEP_0188,{6U,0U,0U}},
{MOVEP_0188,{6U,1U,0U}},
{MOVEP_0188,{6U,2U,0U}},
{MOVEP_0188,{6U,3U,0U}},
{MOVEP_0188,{6U,4U,0U}},
{MOVEP_0188,{6U,5U,0U}},
{MOVEP_0188,{6U,6U,0U}},
{MOVEP_0188,{6U,7U,0U}},
{BCLR_0190,{0U,6U,0U}},
{BCLR_0190,{1U,6U,0U}},
{BCLR_0190,{2U,6U,0U}},
{BCLR_0190,{3U,6U,0U}},
{BCLR_0190,{4U,6U,0U}},
{BCLR_0190,{5U,6U,0U}},
{BCLR_0190,{6U,6U,0U}},
{BCLR_0190,{7U,6U,0U}},
{BCLR_0198,{0U,6U,0U}},
{BCLR_0198,{1U,6U,0U}},
{BCLR_0198,{2U,6U,0U}},
{BCLR_0198,{3U,6U,0U}},
{BCLR_0198,{4U,6U,0U}},
{BCLR_0198,{5U,6U,0U}},
{BCLR_0198,{6U,6U,0U}},
{BCLR_0198,{7U,6U,0U}},
{BCLR_01A0,{0U,6U,0U}},
{BCLR_01A0,{1U,6U,0U}},
{BCLR_01A0,{2U,6U,0U}},
{BCLR_01A0,{3U,6U,0U}},
{BCLR_01A0,{4U,6U,0U}},
{BCLR_01A0,{5U,6U,0U}},
{BCLR_01A0,{6U,6U,0U}},
{BCLR_01A0,{7U,6U,0U}},
{BCLR_01A8,{0U,6U,0U}},
{BCLR_01A8,{1U,6U,0U}},
{BCLR_01A8,{2U,6U,0U}},
{BCLR_01A8,{3U,6U,0U}},
{BCLR_01A8,{4U,6U,0U}},
{BCLR_01A8,{5U,6U,0U}},
{BCLR_01A8,{6U,6U,0U}},
{BCLR_01A8,{7U,6U,0U}},
{BCLR_01B0,{0U,6U,0U}},
{BCLR_01B0,{1U,6U,0U}},
{BCLR_01B0,{2U,6U,0U}},
{BCLR_01B0,{3U,6U,0U}},
{BCLR_01B0,{4U,6U,0U}},
{BCLR_01B0,{5U,6U,0U}},
{BCLR_01B0,{6U,6U,0U}},
{BCLR_01B0,{7U,6U,0U}},
{BCLR_01B8,{0U,6U,0U}},
{BCLR_01B9,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BSET_01C0,{0U,6U,0U}},
{BSET_01C0,{1U,6U,0U}},
{BSET_01C0,{2U,6U,0U}},
{BSET_01C0,{3U,6U,0U}},
{BSET_01C0,{4U,6U,0U}},
{BSET_01C0,{5U,6U,0U}},
{BSET_01C0,{6U,6U,0U}},
{BSET_01C0,{7U,6U,0U}},
{MOVEP_01C8,{6U,0U,0U}},
{MOVEP_01C8,{6U,1U,0U}},
{MOVEP_01C8,{6U,2U,0U}},
{MOVEP_01C8,{6U,3U,0U}},
{MOVEP_01C8,{6U,4U,0U}},
{MOVEP_01C8,{6U,5U,0U}},
{MOVEP_01C8,{6U,6U,0U}},
{MOVEP_01C8,{6U,7U,0U}},
{BSET_01D0,{0U,6U,0U}},
{BSET_01D0,{1U,6U,0U}},
{BSET_01D0,{2U,6U,0U}},
{BSET_01D0,{3U,6U,0U}},
{BSET_01D0,{4U,6U,0U}},
{BSET_01D0,{5U,6U,0U}},
{BSET_01D0,{6U,6U,0U}},
{BSET_01D0,{7U,6U,0U}},
{BSET_01D8,{0U,6U,0U}},
{BSET_01D8,{1U,6U,0U}},
{BSET_01D8,{2U,6U,0U}},
{BSET_01D8,{3U,6U,0U}},
{BSET_01D8,{4U,6U,0U}},
{BSET_01D8,{5U,6U,0U}},
{BSET_01D8,{6U,6U,0U}},
{BSET_01D8,{7U,6U,0U}},
{BSET_01E0,{0U,6U,0U}},
{BSET_01E0,{1U,6U,0U}},
{BSET_01E0,{2U,6U,0U}},
{BSET_01E0,{3U,6U,0U}},
{BSET_01E0,{4U,6U,0U}},
{BSET_01E0,{5U,6U,0U}},
{BSET_01E0,{6U,6U,0U}},
{BSET_01E0,{7U,6U,0U}},
{BSET_01E8,{0U,6U,0U}},
{BSET_01E8,{1U,6U,0U}},
{BSET_01E8,{2U,6U,0U}},
{BSET_01E8,{3U,6U,0U}},
{BSET_01E8,{4U,6U,0U}},
{BSET_01E8,{5U,6U,0U}},
{BSET_01E8,{6U,6U,0U}},
{BSET_01E8,{7U,6U,0U}},
{BSET_01F0,{0U,6U,0U}},
{BSET_01F0,{1U,6U,0U}},
{BSET_01F0,{2U,6U,0U}},
{BSET_01F0,{3U,6U,0U}},
{BSET_01F0,{4U,6U,0U}},
{BSET_01F0,{5U,6U,0U}},
{BSET_01F0,{6U,6U,0U}},
{BSET_01F0,{7U,6U,0U}},
{BSET_01F8,{0U,6U,0U}},
{BSET_01F9,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVES_0E10,{0U,0U,0U}},
{MOVES_0E10,{1U,0U,0U}},
{MOVES_0E10,{2U,0U,0U}},
{MOVES_0E10,{3U,0U,0U}},
{MOVES_0E10,{4U,0U,0U}},
{MOVES_0E10,{5U,0U,0U}},
{MOVES_0E10,{6U,0U,0U}},
{MOVES_0E10,{7U,0U,0U}},
{MOVES_0E18,{0U,0U,0U}},
{MOVES_0E18,{1U,0U,0U}},
{MOVES_0E18,{2U,0U,0U}},
{MOVES_0E18,{3U,0U,0U}},
{MOVES_0E18,{4U,0U,0U}},
{MOVES_0E18,{5U,0U,0U}},
{MOVES_0E18,{6U,0U,0U}},
{MOVES_0E18,{7U,0U,0U}},
{MOVES_0E20,{0U,0U,0U}},
{MOVES_0E20,{1U,0U,0U}},
{MOVES_0E20,{2U,0U,0U}},
{MOVES_0E20,{3U,0U,0U}},
{MOVES_0E20,{4U,0U,0U}},
{MOVES_0E20,{5U,0U,0U}},
{MOVES_0E20,{6U,0U,0U}},
{MOVES_0E20,{7U,0U,0U}},
{MOVES_0E28,{0U,0U,0U}},
{MOVES_0E28,{1U,0U,0U}},
{MOVES_0E28,{2U,0U,0U}},
{MOVES_0E28,{3U,0U,0U}},
{MOVES_0E28,{4U,0U,0U}},
{MOVES_0E28,{5U,0U,0U}},
{MOVES_0E28,{6U,0U,0U}},
{MOVES_0E28,{7U,0U,0U}},
{MOVES_0E30,{0U,0U,0U}},
{MOVES_0E30,{1U,0U,0U}},
{MOVES_0E30,{2U,0U,0U}},
{MOVES_0E30,{3U,0U,0U}},
{MOVES_0E30,{4U,0U,0U}},
{MOVES_0E30,{5U,0U,0U}},
{MOVES_0E30,{6U,0U,0U}},
{MOVES_0E30,{7U,0U,0U}},
{MOVES_0E38,{0U,0U,0U}},
{MOVES_0E39,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVES_0E50,{0U,0U,0U}},
{MOVES_0E50,{1U,0U,0U}},
{MOVES_0E50,{2U,0U,0U}},
{MOVES_0E50,{3U,0U,0U}},
{MOVES_0E50,{4U,0U,0U}},
{MOVES_0E50,{5U,0U,0U}},
{MOVES_0E50,{6U,0U,0U}},
{MOVES_0E50,{7U,0U,0U}},
{MOVES_0E58,{0U,0U,0U}},
{MOVES_0E58,{1U,0U,0U}},
{MOVES_0E58,{2U,0U,0U}},
{MOVES_0E58,{3U,0U,0U}},
{MOVES_0E58,{4U,0U,0U}},
{MOVES_0E58,{5U,0U,0U}},
{MOVES_0E58,{6U,0U,0U}},
{MOVES_0E58,{7U,0U,0U}},
{MOVES_0E60,{0U,0U,0U}},
{MOVES_0E60,{1U,0U,0U}},
{MOVES_0E60,{2U,0U,0U}},
{MOVES_0E60,{3U,0U,0U}},
{MOVES_0E60,{4U,0U,0U}},
{MOVES_0E60,{5U,0U,0U}},
{MOVES_0E60,{6U,0U,0U}},
{MOVES_0E60,{7U,0U,0U}},
{MOVES_0E68,{0U,0U,0U}},
{MOVES_0E68,{1U,0U,0U}},
{MOVES_0E68,{2U,0U,0U}},
{MOVES_0E68,{3U,0U,0U}},
{MOVES_0E68,{4U,0U,0U}},
{MOVES_0E68,{5U,0U,0U}},
{MOVES_0E68,{6U,0U,0U}},
{MOVES_0E68,{7U,0U,0U}},
{MOVES_0E70,{0U,0U,0U}},
{MOVES_0E70,{1U,0U,0U}},
{MOVES_0E70,{2U,0U,0U}},
{MOVES_0E70,{3U,0U,0U}},
{MOVES_0E70,{4U,0U,0U}},
{MOVES_0E70,{5U,0U,0U}},
{MOVES_0E70,{6U,0U,0U}},
{MOVES_0E70,{7U,0U,0U}},
{MOVES_0E78,{0U,0U,0U}},
{MOVES_0E79,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVES_0E90,{0U,0U,0U}},
{MOVES_0E90,{1U,0U,0U}},
{MOVES_0E90,{2U,0U,0U}},
{MOVES_0E90,{3U,0U,0U}},
{MOVES_0E90,{4U,0U,0U}},
{MOVES_0E90,{5U,0U,0U}},
{MOVES_0E90,{6U,0U,0U}},
{MOVES_0E90,{7U,0U,0U}},
{MOVES_0E98,{0U,0U,0U}},
{MOVES_0E98,{1U,0U,0U}},
{MOVES_0E98,{2U,0U,0U}},
{MOVES_0E98,{3U,0U,0U}},
{MOVES_0E98,{4U,0U,0U}},
{MOVES_0E98,{5U,0U,0U}},
{MOVES_0E98,{6U,0U,0U}},
{MOVES_0E98,{7U,0U,0U}},
{MOVES_0EA0,{0U,0U,0U}},
{MOVES_0EA0,{1U,0U,0U}},
{MOVES_0EA0,{2U,0U,0U}},
{MOVES_0EA0,{3U,0U,0U}},
{MOVES_0EA0,{4U,0U,0U}},
{MOVES_0EA0,{5U,0U,0U}},
{MOVES_0EA0,{6U,0U,0U}},
{MOVES_0EA0,{7U,0U,0U}},
{MOVES_0EA8,{0U,0U,0U}},
{MOVES_0EA8,{1U,0U,0U}},
{MOVES_0EA8,{2U,0U,0U}},
{MOVES_0EA8,{3U,0U,0U}},
{MOVES_0EA8,{4U,0U,0U}},
{MOVES_0EA8,{5U,0U,0U}},
{MOVES_0EA8,{6U,0U,0U}},
{MOVES_0EA8,{7U,0U,0U}},
{MOVES_0EB0,{0U,0U,0U}},
{MOVES_0EB0,{1U,0U,0U}},
{MOVES_0EB0,{2U,0U,0U}},
{MOVES_0EB0,{3U,0U,0U}},
{MOVES_0EB0,{4U,0U,0U}},
{MOVES_0EB0,{5U,0U,0U}},
{MOVES_0EB0,{6U,0U,0U}},
{MOVES_0EB0,{7U,0U,0U}},
{MOVES_0EB8,{0U,0U,0U}},
{MOVES_0EB9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CAS_0ED0,{0U,0U,0U}},
{CAS_0ED0,{1U,0U,0U}},
{CAS_0ED0,{2U,0U,0U}},
{CAS_0ED0,{3U,0U,0U}},
{CAS_0ED0,{4U,0U,0U}},
{CAS_0ED0,{5U,0U,0U}},
{CAS_0ED0,{6U,0U,0U}},
{CAS_0ED0,{7U,0U,0U}},
{CAS_0ED8,{0U,0U,0U}},
{CAS_0ED8,{1U,0U,0U}},
{CAS_0ED8,{2U,0U,0U}},
{CAS_0ED8,{3U,0U,0U}},
{CAS_0ED8,{4U,0U,0U}},
{CAS_0ED8,{5U,0U,0U}},
{CAS_0ED8,{6U,0U,0U}},
{CAS_0ED8,{7U,0U,0U}},
{CAS_0EE0,{0U,0U,0U}},
{CAS_0EE0,{1U,0U,0U}},
{CAS_0EE0,{2U,0U,0U}},
{CAS_0EE0,{3U,0U,0U}},
{CAS_0EE0,{4U,0U,0U}},
{CAS_0EE0,{5U,0U,0U}},
{CAS_0EE0,{6U,0U,0U}},
{CAS_0EE0,{7U,0U,0U}},
{CAS_0EE8,{0U,0U,0U}},
{CAS_0EE8,{1U,0U,0U}},
{CAS_0EE8,{2U,0U,0U}},
{CAS_0EE8,{3U,0U,0U}},
{CAS_0EE8,{4U,0U,0U}},
{CAS_0EE8,{5U,0U,0U}},
{CAS_0EE8,{6U,0U,0U}},
{CAS_0EE8,{7U,0U,0U}},
{CAS_0EF0,{0U,0U,0U}},
{CAS_0EF0,{1U,0U,0U}},
{CAS_0EF0,{2U,0U,0U}},
{CAS_0EF0,{3U,0U,0U}},
{CAS_0EF0,{4U,0U,0U}},
{CAS_0EF0,{5U,0U,0U}},
{CAS_0EF0,{6U,0U,0U}},
{CAS_0EF0,{7U,0U,0U}},
{CAS_0EF8,{0U,0U,0U}},
{CAS_0EF9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CAS2_0EFC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BTST_0100,{0U,7U,0U}},
{BTST_0100,{1U,7U,0U}},
{BTST_0100,{2U,7U,0U}},
{BTST_0100,{3U,7U,0U}},
{BTST_0100,{4U,7U,0U}},
{BTST_0100,{5U,7U,0U}},
{BTST_0100,{6U,7U,0U}},
{BTST_0100,{7U,7U,0U}},
{MOVEP_0108,{7U,0U,0U}},
{MOVEP_0108,{7U,1U,0U}},
{MOVEP_0108,{7U,2U,0U}},
{MOVEP_0108,{7U,3U,0U}},
{MOVEP_0108,{7U,4U,0U}},
{MOVEP_0108,{7U,5U,0U}},
{MOVEP_0108,{7U,6U,0U}},
{MOVEP_0108,{7U,7U,0U}},
{BTST_0110,{0U,7U,0U}},
{BTST_0110,{1U,7U,0U}},
{BTST_0110,{2U,7U,0U}},
{BTST_0110,{3U,7U,0U}},
{BTST_0110,{4U,7U,0U}},
{BTST_0110,{5U,7U,0U}},
{BTST_0110,{6U,7U,0U}},
{BTST_0110,{7U,7U,0U}},
{BTST_0118,{0U,7U,0U}},
{BTST_0118,{1U,7U,0U}},
{BTST_0118,{2U,7U,0U}},
{BTST_0118,{3U,7U,0U}},
{BTST_0118,{4U,7U,0U}},
{BTST_0118,{5U,7U,0U}},
{BTST_0118,{6U,7U,0U}},
{BTST_0118,{7U,7U,0U}},
{BTST_0120,{0U,7U,0U}},
{BTST_0120,{1U,7U,0U}},
{BTST_0120,{2U,7U,0U}},
{BTST_0120,{3U,7U,0U}},
{BTST_0120,{4U,7U,0U}},
{BTST_0120,{5U,7U,0U}},
{BTST_0120,{6U,7U,0U}},
{BTST_0120,{7U,7U,0U}},
{BTST_0128,{0U,7U,0U}},
{BTST_0128,{1U,7U,0U}},
{BTST_0128,{2U,7U,0U}},
{BTST_0128,{3U,7U,0U}},
{BTST_0128,{4U,7U,0U}},
{BTST_0128,{5U,7U,0U}},
{BTST_0128,{6U,7U,0U}},
{BTST_0128,{7U,7U,0U}},
{BTST_0130,{0U,7U,0U}},
{BTST_0130,{1U,7U,0U}},
{BTST_0130,{2U,7U,0U}},
{BTST_0130,{3U,7U,0U}},
{BTST_0130,{4U,7U,0U}},
{BTST_0130,{5U,7U,0U}},
{BTST_0130,{6U,7U,0U}},
{BTST_0130,{7U,7U,0U}},
{BTST_0138,{0U,7U,0U}},
{BTST_0139,{0U,7U,0U}},
{BTST_013A,{0U,7U,0U}},
{BTST_013B,{0U,7U,0U}},
{BTST_013C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCHG_0140,{0U,7U,0U}},
{BCHG_0140,{1U,7U,0U}},
{BCHG_0140,{2U,7U,0U}},
{BCHG_0140,{3U,7U,0U}},
{BCHG_0140,{4U,7U,0U}},
{BCHG_0140,{5U,7U,0U}},
{BCHG_0140,{6U,7U,0U}},
{BCHG_0140,{7U,7U,0U}},
{MOVEP_0148,{7U,0U,0U}},
{MOVEP_0148,{7U,1U,0U}},
{MOVEP_0148,{7U,2U,0U}},
{MOVEP_0148,{7U,3U,0U}},
{MOVEP_0148,{7U,4U,0U}},
{MOVEP_0148,{7U,5U,0U}},
{MOVEP_0148,{7U,6U,0U}},
{MOVEP_0148,{7U,7U,0U}},
{BCHG_0150,{0U,7U,0U}},
{BCHG_0150,{1U,7U,0U}},
{BCHG_0150,{2U,7U,0U}},
{BCHG_0150,{3U,7U,0U}},
{BCHG_0150,{4U,7U,0U}},
{BCHG_0150,{5U,7U,0U}},
{BCHG_0150,{6U,7U,0U}},
{BCHG_0150,{7U,7U,0U}},
{BCHG_0158,{0U,7U,0U}},
{BCHG_0158,{1U,7U,0U}},
{BCHG_0158,{2U,7U,0U}},
{BCHG_0158,{3U,7U,0U}},
{BCHG_0158,{4U,7U,0U}},
{BCHG_0158,{5U,7U,0U}},
{BCHG_0158,{6U,7U,0U}},
{BCHG_0158,{7U,7U,0U}},
{BCHG_0160,{0U,7U,0U}},
{BCHG_0160,{1U,7U,0U}},
{BCHG_0160,{2U,7U,0U}},
{BCHG_0160,{3U,7U,0U}},
{BCHG_0160,{4U,7U,0U}},
{BCHG_0160,{5U,7U,0U}},
{BCHG_0160,{6U,7U,0U}},
{BCHG_0160,{7U,7U,0U}},
{BCHG_0168,{0U,7U,0U}},
{BCHG_0168,{1U,7U,0U}},
{BCHG_0168,{2U,7U,0U}},
{BCHG_0168,{3U,7U,0U}},
{BCHG_0168,{4U,7U,0U}},
{BCHG_0168,{5U,7U,0U}},
{BCHG_0168,{6U,7U,0U}},
{BCHG_0168,{7U,7U,0U}},
{BCHG_0170,{0U,7U,0U}},
{BCHG_0170,{1U,7U,0U}},
{BCHG_0170,{2U,7U,0U}},
{BCHG_0170,{3U,7U,0U}},
{BCHG_0170,{4U,7U,0U}},
{BCHG_0170,{5U,7U,0U}},
{BCHG_0170,{6U,7U,0U}},
{BCHG_0170,{7U,7U,0U}},
{BCHG_0178,{0U,7U,0U}},
{BCHG_0179,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BCLR_0180,{0U,7U,0U}},
{BCLR_0180,{1U,7U,0U}},
{BCLR_0180,{2U,7U,0U}},
{BCLR_0180,{3U,7U,0U}},
{BCLR_0180,{4U,7U,0U}},
{BCLR_0180,{5U,7U,0U}},
{BCLR_0180,{6U,7U,0U}},
{BCLR_0180,{7U,7U,0U}},
{MOVEP_0188,{7U,0U,0U}},
{MOVEP_0188,{7U,1U,0U}},
{MOVEP_0188,{7U,2U,0U}},
{MOVEP_0188,{7U,3U,0U}},
{MOVEP_0188,{7U,4U,0U}},
{MOVEP_0188,{7U,5U,0U}},
{MOVEP_0188,{7U,6U,0U}},
{MOVEP_0188,{7U,7U,0U}},
{BCLR_0190,{0U,7U,0U}},
{BCLR_0190,{1U,7U,0U}},
{BCLR_0190,{2U,7U,0U}},
{BCLR_0190,{3U,7U,0U}},
{BCLR_0190,{4U,7U,0U}},
{BCLR_0190,{5U,7U,0U}},
{BCLR_0190,{6U,7U,0U}},
{BCLR_0190,{7U,7U,0U}},
{BCLR_0198,{0U,7U,0U}},
{BCLR_0198,{1U,7U,0U}},
{BCLR_0198,{2U,7U,0U}},
{BCLR_0198,{3U,7U,0U}},
{BCLR_0198,{4U,7U,0U}},
{BCLR_0198,{5U,7U,0U}},
{BCLR_0198,{6U,7U,0U}},
{BCLR_0198,{7U,7U,0U}},
{BCLR_01A0,{0U,7U,0U}},
{BCLR_01A0,{1U,7U,0U}},
{BCLR_01A0,{2U,7U,0U}},
{BCLR_01A0,{3U,7U,0U}},
{BCLR_01A0,{4U,7U,0U}},
{BCLR_01A0,{5U,7U,0U}},
{BCLR_01A0,{6U,7U,0U}},
{BCLR_01A0,{7U,7U,0U}},
{BCLR_01A8,{0U,7U,0U}},
{BCLR_01A8,{1U,7U,0U}},
{BCLR_01A8,{2U,7U,0U}},
{BCLR_01A8,{3U,7U,0U}},
{BCLR_01A8,{4U,7U,0U}},
{BCLR_01A8,{5U,7U,0U}},
{BCLR_01A8,{6U,7U,0U}},
{BCLR_01A8,{7U,7U,0U}},
{BCLR_01B0,{0U,7U,0U}},
{BCLR_01B0,{1U,7U,0U}},
{BCLR_01B0,{2U,7U,0U}},
{BCLR_01B0,{3U,7U,0U}},
{BCLR_01B0,{4U,7U,0U}},
{BCLR_01B0,{5U,7U,0U}},
{BCLR_01B0,{6U,7U,0U}},
{BCLR_01B0,{7U,7U,0U}},
{BCLR_01B8,{0U,7U,0U}},
{BCLR_01B9,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BSET_01C0,{0U,7U,0U}},
{BSET_01C0,{1U,7U,0U}},
{BSET_01C0,{2U,7U,0U}},
{BSET_01C0,{3U,7U,0U}},
{BSET_01C0,{4U,7U,0U}},
{BSET_01C0,{5U,7U,0U}},
{BSET_01C0,{6U,7U,0U}},
{BSET_01C0,{7U,7U,0U}},
{MOVEP_01C8,{7U,0U,0U}},
{MOVEP_01C8,{7U,1U,0U}},
{MOVEP_01C8,{7U,2U,0U}},
{MOVEP_01C8,{7U,3U,0U}},
{MOVEP_01C8,{7U,4U,0U}},
{MOVEP_01C8,{7U,5U,0U}},
{MOVEP_01C8,{7U,6U,0U}},
{MOVEP_01C8,{7U,7U,0U}},
{BSET_01D0,{0U,7U,0U}},
{BSET_01D0,{1U,7U,0U}},
{BSET_01D0,{2U,7U,0U}},
{BSET_01D0,{3U,7U,0U}},
{BSET_01D0,{4U,7U,0U}},
{BSET_01D0,{5U,7U,0U}},
{BSET_01D0,{6U,7U,0U}},
{BSET_01D0,{7U,7U,0U}},
{BSET_01D8,{0U,7U,0U}},
{BSET_01D8,{1U,7U,0U}},
{BSET_01D8,{2U,7U,0U}},
{BSET_01D8,{3U,7U,0U}},
{BSET_01D8,{4U,7U,0U}},
{BSET_01D8,{5U,7U,0U}},
{BSET_01D8,{6U,7U,0U}},
{BSET_01D8,{7U,7U,0U}},
{BSET_01E0,{0U,7U,0U}},
{BSET_01E0,{1U,7U,0U}},
{BSET_01E0,{2U,7U,0U}},
{BSET_01E0,{3U,7U,0U}},
{BSET_01E0,{4U,7U,0U}},
{BSET_01E0,{5U,7U,0U}},
{BSET_01E0,{6U,7U,0U}},
{BSET_01E0,{7U,7U,0U}},
{BSET_01E8,{0U,7U,0U}},
{BSET_01E8,{1U,7U,0U}},
{BSET_01E8,{2U,7U,0U}},
{BSET_01E8,{3U,7U,0U}},
{BSET_01E8,{4U,7U,0U}},
{BSET_01E8,{5U,7U,0U}},
{BSET_01E8,{6U,7U,0U}},
{BSET_01E8,{7U,7U,0U}},
{BSET_01F0,{0U,7U,0U}},
{BSET_01F0,{1U,7U,0U}},
{BSET_01F0,{2U,7U,0U}},
{BSET_01F0,{3U,7U,0U}},
{BSET_01F0,{4U,7U,0U}},
{BSET_01F0,{5U,7U,0U}},
{BSET_01F0,{6U,7U,0U}},
{BSET_01F0,{7U,7U,0U}},
{BSET_01F8,{0U,7U,0U}},
{BSET_01F9,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1000,{0U,0U,0U}},
{MOVE_1000,{1U,0U,0U}},
{MOVE_1000,{2U,0U,0U}},
{MOVE_1000,{3U,0U,0U}},
{MOVE_1000,{4U,0U,0U}},
{MOVE_1000,{5U,0U,0U}},
{MOVE_1000,{6U,0U,0U}},
{MOVE_1000,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1010,{0U,0U,0U}},
{MOVE_1010,{1U,0U,0U}},
{MOVE_1010,{2U,0U,0U}},
{MOVE_1010,{3U,0U,0U}},
{MOVE_1010,{4U,0U,0U}},
{MOVE_1010,{5U,0U,0U}},
{MOVE_1010,{6U,0U,0U}},
{MOVE_1010,{7U,0U,0U}},
{MOVE_1018,{0U,0U,0U}},
{MOVE_1018,{1U,0U,0U}},
{MOVE_1018,{2U,0U,0U}},
{MOVE_1018,{3U,0U,0U}},
{MOVE_1018,{4U,0U,0U}},
{MOVE_1018,{5U,0U,0U}},
{MOVE_1018,{6U,0U,0U}},
{MOVE_1018,{7U,0U,0U}},
{MOVE_1020,{0U,0U,0U}},
{MOVE_1020,{1U,0U,0U}},
{MOVE_1020,{2U,0U,0U}},
{MOVE_1020,{3U,0U,0U}},
{MOVE_1020,{4U,0U,0U}},
{MOVE_1020,{5U,0U,0U}},
{MOVE_1020,{6U,0U,0U}},
{MOVE_1020,{7U,0U,0U}},
{MOVE_1028,{0U,0U,0U}},
{MOVE_1028,{1U,0U,0U}},
{MOVE_1028,{2U,0U,0U}},
{MOVE_1028,{3U,0U,0U}},
{MOVE_1028,{4U,0U,0U}},
{MOVE_1028,{5U,0U,0U}},
{MOVE_1028,{6U,0U,0U}},
{MOVE_1028,{7U,0U,0U}},
{MOVE_1030,{0U,0U,0U}},
{MOVE_1030,{1U,0U,0U}},
{MOVE_1030,{2U,0U,0U}},
{MOVE_1030,{3U,0U,0U}},
{MOVE_1030,{4U,0U,0U}},
{MOVE_1030,{5U,0U,0U}},
{MOVE_1030,{6U,0U,0U}},
{MOVE_1030,{7U,0U,0U}},
{MOVE_1038,{0U,0U,0U}},
{MOVE_1039,{0U,0U,0U}},
{MOVE_103A,{0U,0U,0U}},
{MOVE_103B,{0U,0U,0U}},
{MOVE_103C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1080,{0U,0U,0U}},
{MOVE_1080,{1U,0U,0U}},
{MOVE_1080,{2U,0U,0U}},
{MOVE_1080,{3U,0U,0U}},
{MOVE_1080,{4U,0U,0U}},
{MOVE_1080,{5U,0U,0U}},
{MOVE_1080,{6U,0U,0U}},
{MOVE_1080,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1090,{0U,0U,0U}},
{MOVE_1090,{1U,0U,0U}},
{MOVE_1090,{2U,0U,0U}},
{MOVE_1090,{3U,0U,0U}},
{MOVE_1090,{4U,0U,0U}},
{MOVE_1090,{5U,0U,0U}},
{MOVE_1090,{6U,0U,0U}},
{MOVE_1090,{7U,0U,0U}},
{MOVE_1098,{0U,0U,0U}},
{MOVE_1098,{1U,0U,0U}},
{MOVE_1098,{2U,0U,0U}},
{MOVE_1098,{3U,0U,0U}},
{MOVE_1098,{4U,0U,0U}},
{MOVE_1098,{5U,0U,0U}},
{MOVE_1098,{6U,0U,0U}},
{MOVE_1098,{7U,0U,0U}},
{MOVE_10A0,{0U,0U,0U}},
{MOVE_10A0,{1U,0U,0U}},
{MOVE_10A0,{2U,0U,0U}},
{MOVE_10A0,{3U,0U,0U}},
{MOVE_10A0,{4U,0U,0U}},
{MOVE_10A0,{5U,0U,0U}},
{MOVE_10A0,{6U,0U,0U}},
{MOVE_10A0,{7U,0U,0U}},
{MOVE_10A8,{0U,0U,0U}},
{MOVE_10A8,{1U,0U,0U}},
{MOVE_10A8,{2U,0U,0U}},
{MOVE_10A8,{3U,0U,0U}},
{MOVE_10A8,{4U,0U,0U}},
{MOVE_10A8,{5U,0U,0U}},
{MOVE_10A8,{6U,0U,0U}},
{MOVE_10A8,{7U,0U,0U}},
{MOVE_10B0,{0U,0U,0U}},
{MOVE_10B0,{1U,0U,0U}},
{MOVE_10B0,{2U,0U,0U}},
{MOVE_10B0,{3U,0U,0U}},
{MOVE_10B0,{4U,0U,0U}},
{MOVE_10B0,{5U,0U,0U}},
{MOVE_10B0,{6U,0U,0U}},
{MOVE_10B0,{7U,0U,0U}},
{MOVE_10B8,{0U,0U,0U}},
{MOVE_10B9,{0U,0U,0U}},
{MOVE_10BA,{0U,0U,0U}},
{MOVE_10BB,{0U,0U,0U}},
{MOVE_10BC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10C0,{0U,0U,0U}},
{MOVE_10C0,{1U,0U,0U}},
{MOVE_10C0,{2U,0U,0U}},
{MOVE_10C0,{3U,0U,0U}},
{MOVE_10C0,{4U,0U,0U}},
{MOVE_10C0,{5U,0U,0U}},
{MOVE_10C0,{6U,0U,0U}},
{MOVE_10C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10D0,{0U,0U,0U}},
{MOVE_10D0,{1U,0U,0U}},
{MOVE_10D0,{2U,0U,0U}},
{MOVE_10D0,{3U,0U,0U}},
{MOVE_10D0,{4U,0U,0U}},
{MOVE_10D0,{5U,0U,0U}},
{MOVE_10D0,{6U,0U,0U}},
{MOVE_10D0,{7U,0U,0U}},
{MOVE_10D8,{0U,0U,0U}},
{MOVE_10D8,{1U,0U,0U}},
{MOVE_10D8,{2U,0U,0U}},
{MOVE_10D8,{3U,0U,0U}},
{MOVE_10D8,{4U,0U,0U}},
{MOVE_10D8,{5U,0U,0U}},
{MOVE_10D8,{6U,0U,0U}},
{MOVE_10D8,{7U,0U,0U}},
{MOVE_10E0,{0U,0U,0U}},
{MOVE_10E0,{1U,0U,0U}},
{MOVE_10E0,{2U,0U,0U}},
{MOVE_10E0,{3U,0U,0U}},
{MOVE_10E0,{4U,0U,0U}},
{MOVE_10E0,{5U,0U,0U}},
{MOVE_10E0,{6U,0U,0U}},
{MOVE_10E0,{7U,0U,0U}},
{MOVE_10E8,{0U,0U,0U}},
{MOVE_10E8,{1U,0U,0U}},
{MOVE_10E8,{2U,0U,0U}},
{MOVE_10E8,{3U,0U,0U}},
{MOVE_10E8,{4U,0U,0U}},
{MOVE_10E8,{5U,0U,0U}},
{MOVE_10E8,{6U,0U,0U}},
{MOVE_10E8,{7U,0U,0U}},
{MOVE_10F0,{0U,0U,0U}},
{MOVE_10F0,{1U,0U,0U}},
{MOVE_10F0,{2U,0U,0U}},
{MOVE_10F0,{3U,0U,0U}},
{MOVE_10F0,{4U,0U,0U}},
{MOVE_10F0,{5U,0U,0U}},
{MOVE_10F0,{6U,0U,0U}},
{MOVE_10F0,{7U,0U,0U}},
{MOVE_10F8,{0U,0U,0U}},
{MOVE_10F9,{0U,0U,0U}},
{MOVE_10FA,{0U,0U,0U}},
{MOVE_10FB,{0U,0U,0U}},
{MOVE_10FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1100,{0U,0U,0U}},
{MOVE_1100,{1U,0U,0U}},
{MOVE_1100,{2U,0U,0U}},
{MOVE_1100,{3U,0U,0U}},
{MOVE_1100,{4U,0U,0U}},
{MOVE_1100,{5U,0U,0U}},
{MOVE_1100,{6U,0U,0U}},
{MOVE_1100,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1110,{0U,0U,0U}},
{MOVE_1110,{1U,0U,0U}},
{MOVE_1110,{2U,0U,0U}},
{MOVE_1110,{3U,0U,0U}},
{MOVE_1110,{4U,0U,0U}},
{MOVE_1110,{5U,0U,0U}},
{MOVE_1110,{6U,0U,0U}},
{MOVE_1110,{7U,0U,0U}},
{MOVE_1118,{0U,0U,0U}},
{MOVE_1118,{1U,0U,0U}},
{MOVE_1118,{2U,0U,0U}},
{MOVE_1118,{3U,0U,0U}},
{MOVE_1118,{4U,0U,0U}},
{MOVE_1118,{5U,0U,0U}},
{MOVE_1118,{6U,0U,0U}},
{MOVE_1118,{7U,0U,0U}},
{MOVE_1120,{0U,0U,0U}},
{MOVE_1120,{1U,0U,0U}},
{MOVE_1120,{2U,0U,0U}},
{MOVE_1120,{3U,0U,0U}},
{MOVE_1120,{4U,0U,0U}},
{MOVE_1120,{5U,0U,0U}},
{MOVE_1120,{6U,0U,0U}},
{MOVE_1120,{7U,0U,0U}},
{MOVE_1128,{0U,0U,0U}},
{MOVE_1128,{1U,0U,0U}},
{MOVE_1128,{2U,0U,0U}},
{MOVE_1128,{3U,0U,0U}},
{MOVE_1128,{4U,0U,0U}},
{MOVE_1128,{5U,0U,0U}},
{MOVE_1128,{6U,0U,0U}},
{MOVE_1128,{7U,0U,0U}},
{MOVE_1130,{0U,0U,0U}},
{MOVE_1130,{1U,0U,0U}},
{MOVE_1130,{2U,0U,0U}},
{MOVE_1130,{3U,0U,0U}},
{MOVE_1130,{4U,0U,0U}},
{MOVE_1130,{5U,0U,0U}},
{MOVE_1130,{6U,0U,0U}},
{MOVE_1130,{7U,0U,0U}},
{MOVE_1138,{0U,0U,0U}},
{MOVE_1139,{0U,0U,0U}},
{MOVE_113A,{0U,0U,0U}},
{MOVE_113B,{0U,0U,0U}},
{MOVE_113C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1140,{0U,0U,0U}},
{MOVE_1140,{1U,0U,0U}},
{MOVE_1140,{2U,0U,0U}},
{MOVE_1140,{3U,0U,0U}},
{MOVE_1140,{4U,0U,0U}},
{MOVE_1140,{5U,0U,0U}},
{MOVE_1140,{6U,0U,0U}},
{MOVE_1140,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1150,{0U,0U,0U}},
{MOVE_1150,{1U,0U,0U}},
{MOVE_1150,{2U,0U,0U}},
{MOVE_1150,{3U,0U,0U}},
{MOVE_1150,{4U,0U,0U}},
{MOVE_1150,{5U,0U,0U}},
{MOVE_1150,{6U,0U,0U}},
{MOVE_1150,{7U,0U,0U}},
{MOVE_1158,{0U,0U,0U}},
{MOVE_1158,{1U,0U,0U}},
{MOVE_1158,{2U,0U,0U}},
{MOVE_1158,{3U,0U,0U}},
{MOVE_1158,{4U,0U,0U}},
{MOVE_1158,{5U,0U,0U}},
{MOVE_1158,{6U,0U,0U}},
{MOVE_1158,{7U,0U,0U}},
{MOVE_1160,{0U,0U,0U}},
{MOVE_1160,{1U,0U,0U}},
{MOVE_1160,{2U,0U,0U}},
{MOVE_1160,{3U,0U,0U}},
{MOVE_1160,{4U,0U,0U}},
{MOVE_1160,{5U,0U,0U}},
{MOVE_1160,{6U,0U,0U}},
{MOVE_1160,{7U,0U,0U}},
{MOVE_1168,{0U,0U,0U}},
{MOVE_1168,{1U,0U,0U}},
{MOVE_1168,{2U,0U,0U}},
{MOVE_1168,{3U,0U,0U}},
{MOVE_1168,{4U,0U,0U}},
{MOVE_1168,{5U,0U,0U}},
{MOVE_1168,{6U,0U,0U}},
{MOVE_1168,{7U,0U,0U}},
{MOVE_1170,{0U,0U,0U}},
{MOVE_1170,{1U,0U,0U}},
{MOVE_1170,{2U,0U,0U}},
{MOVE_1170,{3U,0U,0U}},
{MOVE_1170,{4U,0U,0U}},
{MOVE_1170,{5U,0U,0U}},
{MOVE_1170,{6U,0U,0U}},
{MOVE_1170,{7U,0U,0U}},
{MOVE_1178,{0U,0U,0U}},
{MOVE_1179,{0U,0U,0U}},
{MOVE_117A,{0U,0U,0U}},
{MOVE_117B,{0U,0U,0U}},
{MOVE_117C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1180,{0U,0U,0U}},
{MOVE_1180,{1U,0U,0U}},
{MOVE_1180,{2U,0U,0U}},
{MOVE_1180,{3U,0U,0U}},
{MOVE_1180,{4U,0U,0U}},
{MOVE_1180,{5U,0U,0U}},
{MOVE_1180,{6U,0U,0U}},
{MOVE_1180,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1190,{0U,0U,0U}},
{MOVE_1190,{1U,0U,0U}},
{MOVE_1190,{2U,0U,0U}},
{MOVE_1190,{3U,0U,0U}},
{MOVE_1190,{4U,0U,0U}},
{MOVE_1190,{5U,0U,0U}},
{MOVE_1190,{6U,0U,0U}},
{MOVE_1190,{7U,0U,0U}},
{MOVE_1198,{0U,0U,0U}},
{MOVE_1198,{1U,0U,0U}},
{MOVE_1198,{2U,0U,0U}},
{MOVE_1198,{3U,0U,0U}},
{MOVE_1198,{4U,0U,0U}},
{MOVE_1198,{5U,0U,0U}},
{MOVE_1198,{6U,0U,0U}},
{MOVE_1198,{7U,0U,0U}},
{MOVE_11A0,{0U,0U,0U}},
{MOVE_11A0,{1U,0U,0U}},
{MOVE_11A0,{2U,0U,0U}},
{MOVE_11A0,{3U,0U,0U}},
{MOVE_11A0,{4U,0U,0U}},
{MOVE_11A0,{5U,0U,0U}},
{MOVE_11A0,{6U,0U,0U}},
{MOVE_11A0,{7U,0U,0U}},
{MOVE_11A8,{0U,0U,0U}},
{MOVE_11A8,{1U,0U,0U}},
{MOVE_11A8,{2U,0U,0U}},
{MOVE_11A8,{3U,0U,0U}},
{MOVE_11A8,{4U,0U,0U}},
{MOVE_11A8,{5U,0U,0U}},
{MOVE_11A8,{6U,0U,0U}},
{MOVE_11A8,{7U,0U,0U}},
{MOVE_11B0,{0U,0U,0U}},
{MOVE_11B0,{1U,0U,0U}},
{MOVE_11B0,{2U,0U,0U}},
{MOVE_11B0,{3U,0U,0U}},
{MOVE_11B0,{4U,0U,0U}},
{MOVE_11B0,{5U,0U,0U}},
{MOVE_11B0,{6U,0U,0U}},
{MOVE_11B0,{7U,0U,0U}},
{MOVE_11B8,{0U,0U,0U}},
{MOVE_11B9,{0U,0U,0U}},
{MOVE_11BA,{0U,0U,0U}},
{MOVE_11BB,{0U,0U,0U}},
{MOVE_11BC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_11C0,{0U,0U,0U}},
{MOVE_11C0,{1U,0U,0U}},
{MOVE_11C0,{2U,0U,0U}},
{MOVE_11C0,{3U,0U,0U}},
{MOVE_11C0,{4U,0U,0U}},
{MOVE_11C0,{5U,0U,0U}},
{MOVE_11C0,{6U,0U,0U}},
{MOVE_11C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_11D0,{0U,0U,0U}},
{MOVE_11D0,{1U,0U,0U}},
{MOVE_11D0,{2U,0U,0U}},
{MOVE_11D0,{3U,0U,0U}},
{MOVE_11D0,{4U,0U,0U}},
{MOVE_11D0,{5U,0U,0U}},
{MOVE_11D0,{6U,0U,0U}},
{MOVE_11D0,{7U,0U,0U}},
{MOVE_11D8,{0U,0U,0U}},
{MOVE_11D8,{1U,0U,0U}},
{MOVE_11D8,{2U,0U,0U}},
{MOVE_11D8,{3U,0U,0U}},
{MOVE_11D8,{4U,0U,0U}},
{MOVE_11D8,{5U,0U,0U}},
{MOVE_11D8,{6U,0U,0U}},
{MOVE_11D8,{7U,0U,0U}},
{MOVE_11E0,{0U,0U,0U}},
{MOVE_11E0,{1U,0U,0U}},
{MOVE_11E0,{2U,0U,0U}},
{MOVE_11E0,{3U,0U,0U}},
{MOVE_11E0,{4U,0U,0U}},
{MOVE_11E0,{5U,0U,0U}},
{MOVE_11E0,{6U,0U,0U}},
{MOVE_11E0,{7U,0U,0U}},
{MOVE_11E8,{0U,0U,0U}},
{MOVE_11E8,{1U,0U,0U}},
{MOVE_11E8,{2U,0U,0U}},
{MOVE_11E8,{3U,0U,0U}},
{MOVE_11E8,{4U,0U,0U}},
{MOVE_11E8,{5U,0U,0U}},
{MOVE_11E8,{6U,0U,0U}},
{MOVE_11E8,{7U,0U,0U}},
{MOVE_11F0,{0U,0U,0U}},
{MOVE_11F0,{1U,0U,0U}},
{MOVE_11F0,{2U,0U,0U}},
{MOVE_11F0,{3U,0U,0U}},
{MOVE_11F0,{4U,0U,0U}},
{MOVE_11F0,{5U,0U,0U}},
{MOVE_11F0,{6U,0U,0U}},
{MOVE_11F0,{7U,0U,0U}},
{MOVE_11F8,{0U,0U,0U}},
{MOVE_11F9,{0U,0U,0U}},
{MOVE_11FA,{0U,0U,0U}},
{MOVE_11FB,{0U,0U,0U}},
{MOVE_11FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1000,{0U,1U,0U}},
{MOVE_1000,{1U,1U,0U}},
{MOVE_1000,{2U,1U,0U}},
{MOVE_1000,{3U,1U,0U}},
{MOVE_1000,{4U,1U,0U}},
{MOVE_1000,{5U,1U,0U}},
{MOVE_1000,{6U,1U,0U}},
{MOVE_1000,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1010,{0U,1U,0U}},
{MOVE_1010,{1U,1U,0U}},
{MOVE_1010,{2U,1U,0U}},
{MOVE_1010,{3U,1U,0U}},
{MOVE_1010,{4U,1U,0U}},
{MOVE_1010,{5U,1U,0U}},
{MOVE_1010,{6U,1U,0U}},
{MOVE_1010,{7U,1U,0U}},
{MOVE_1018,{0U,1U,0U}},
{MOVE_1018,{1U,1U,0U}},
{MOVE_1018,{2U,1U,0U}},
{MOVE_1018,{3U,1U,0U}},
{MOVE_1018,{4U,1U,0U}},
{MOVE_1018,{5U,1U,0U}},
{MOVE_1018,{6U,1U,0U}},
{MOVE_1018,{7U,1U,0U}},
{MOVE_1020,{0U,1U,0U}},
{MOVE_1020,{1U,1U,0U}},
{MOVE_1020,{2U,1U,0U}},
{MOVE_1020,{3U,1U,0U}},
{MOVE_1020,{4U,1U,0U}},
{MOVE_1020,{5U,1U,0U}},
{MOVE_1020,{6U,1U,0U}},
{MOVE_1020,{7U,1U,0U}},
{MOVE_1028,{0U,1U,0U}},
{MOVE_1028,{1U,1U,0U}},
{MOVE_1028,{2U,1U,0U}},
{MOVE_1028,{3U,1U,0U}},
{MOVE_1028,{4U,1U,0U}},
{MOVE_1028,{5U,1U,0U}},
{MOVE_1028,{6U,1U,0U}},
{MOVE_1028,{7U,1U,0U}},
{MOVE_1030,{0U,1U,0U}},
{MOVE_1030,{1U,1U,0U}},
{MOVE_1030,{2U,1U,0U}},
{MOVE_1030,{3U,1U,0U}},
{MOVE_1030,{4U,1U,0U}},
{MOVE_1030,{5U,1U,0U}},
{MOVE_1030,{6U,1U,0U}},
{MOVE_1030,{7U,1U,0U}},
{MOVE_1038,{0U,1U,0U}},
{MOVE_1039,{0U,1U,0U}},
{MOVE_103A,{0U,1U,0U}},
{MOVE_103B,{0U,1U,0U}},
{MOVE_103C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1080,{0U,1U,0U}},
{MOVE_1080,{1U,1U,0U}},
{MOVE_1080,{2U,1U,0U}},
{MOVE_1080,{3U,1U,0U}},
{MOVE_1080,{4U,1U,0U}},
{MOVE_1080,{5U,1U,0U}},
{MOVE_1080,{6U,1U,0U}},
{MOVE_1080,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1090,{0U,1U,0U}},
{MOVE_1090,{1U,1U,0U}},
{MOVE_1090,{2U,1U,0U}},
{MOVE_1090,{3U,1U,0U}},
{MOVE_1090,{4U,1U,0U}},
{MOVE_1090,{5U,1U,0U}},
{MOVE_1090,{6U,1U,0U}},
{MOVE_1090,{7U,1U,0U}},
{MOVE_1098,{0U,1U,0U}},
{MOVE_1098,{1U,1U,0U}},
{MOVE_1098,{2U,1U,0U}},
{MOVE_1098,{3U,1U,0U}},
{MOVE_1098,{4U,1U,0U}},
{MOVE_1098,{5U,1U,0U}},
{MOVE_1098,{6U,1U,0U}},
{MOVE_1098,{7U,1U,0U}},
{MOVE_10A0,{0U,1U,0U}},
{MOVE_10A0,{1U,1U,0U}},
{MOVE_10A0,{2U,1U,0U}},
{MOVE_10A0,{3U,1U,0U}},
{MOVE_10A0,{4U,1U,0U}},
{MOVE_10A0,{5U,1U,0U}},
{MOVE_10A0,{6U,1U,0U}},
{MOVE_10A0,{7U,1U,0U}},
{MOVE_10A8,{0U,1U,0U}},
{MOVE_10A8,{1U,1U,0U}},
{MOVE_10A8,{2U,1U,0U}},
{MOVE_10A8,{3U,1U,0U}},
{MOVE_10A8,{4U,1U,0U}},
{MOVE_10A8,{5U,1U,0U}},
{MOVE_10A8,{6U,1U,0U}},
{MOVE_10A8,{7U,1U,0U}},
{MOVE_10B0,{0U,1U,0U}},
{MOVE_10B0,{1U,1U,0U}},
{MOVE_10B0,{2U,1U,0U}},
{MOVE_10B0,{3U,1U,0U}},
{MOVE_10B0,{4U,1U,0U}},
{MOVE_10B0,{5U,1U,0U}},
{MOVE_10B0,{6U,1U,0U}},
{MOVE_10B0,{7U,1U,0U}},
{MOVE_10B8,{0U,1U,0U}},
{MOVE_10B9,{0U,1U,0U}},
{MOVE_10BA,{0U,1U,0U}},
{MOVE_10BB,{0U,1U,0U}},
{MOVE_10BC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10C0,{0U,1U,0U}},
{MOVE_10C0,{1U,1U,0U}},
{MOVE_10C0,{2U,1U,0U}},
{MOVE_10C0,{3U,1U,0U}},
{MOVE_10C0,{4U,1U,0U}},
{MOVE_10C0,{5U,1U,0U}},
{MOVE_10C0,{6U,1U,0U}},
{MOVE_10C0,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10D0,{0U,1U,0U}},
{MOVE_10D0,{1U,1U,0U}},
{MOVE_10D0,{2U,1U,0U}},
{MOVE_10D0,{3U,1U,0U}},
{MOVE_10D0,{4U,1U,0U}},
{MOVE_10D0,{5U,1U,0U}},
{MOVE_10D0,{6U,1U,0U}},
{MOVE_10D0,{7U,1U,0U}},
{MOVE_10D8,{0U,1U,0U}},
{MOVE_10D8,{1U,1U,0U}},
{MOVE_10D8,{2U,1U,0U}},
{MOVE_10D8,{3U,1U,0U}},
{MOVE_10D8,{4U,1U,0U}},
{MOVE_10D8,{5U,1U,0U}},
{MOVE_10D8,{6U,1U,0U}},
{MOVE_10D8,{7U,1U,0U}},
{MOVE_10E0,{0U,1U,0U}},
{MOVE_10E0,{1U,1U,0U}},
{MOVE_10E0,{2U,1U,0U}},
{MOVE_10E0,{3U,1U,0U}},
{MOVE_10E0,{4U,1U,0U}},
{MOVE_10E0,{5U,1U,0U}},
{MOVE_10E0,{6U,1U,0U}},
{MOVE_10E0,{7U,1U,0U}},
{MOVE_10E8,{0U,1U,0U}},
{MOVE_10E8,{1U,1U,0U}},
{MOVE_10E8,{2U,1U,0U}},
{MOVE_10E8,{3U,1U,0U}},
{MOVE_10E8,{4U,1U,0U}},
{MOVE_10E8,{5U,1U,0U}},
{MOVE_10E8,{6U,1U,0U}},
{MOVE_10E8,{7U,1U,0U}},
{MOVE_10F0,{0U,1U,0U}},
{MOVE_10F0,{1U,1U,0U}},
{MOVE_10F0,{2U,1U,0U}},
{MOVE_10F0,{3U,1U,0U}},
{MOVE_10F0,{4U,1U,0U}},
{MOVE_10F0,{5U,1U,0U}},
{MOVE_10F0,{6U,1U,0U}},
{MOVE_10F0,{7U,1U,0U}},
{MOVE_10F8,{0U,1U,0U}},
{MOVE_10F9,{0U,1U,0U}},
{MOVE_10FA,{0U,1U,0U}},
{MOVE_10FB,{0U,1U,0U}},
{MOVE_10FC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1100,{0U,1U,0U}},
{MOVE_1100,{1U,1U,0U}},
{MOVE_1100,{2U,1U,0U}},
{MOVE_1100,{3U,1U,0U}},
{MOVE_1100,{4U,1U,0U}},
{MOVE_1100,{5U,1U,0U}},
{MOVE_1100,{6U,1U,0U}},
{MOVE_1100,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1110,{0U,1U,0U}},
{MOVE_1110,{1U,1U,0U}},
{MOVE_1110,{2U,1U,0U}},
{MOVE_1110,{3U,1U,0U}},
{MOVE_1110,{4U,1U,0U}},
{MOVE_1110,{5U,1U,0U}},
{MOVE_1110,{6U,1U,0U}},
{MOVE_1110,{7U,1U,0U}},
{MOVE_1118,{0U,1U,0U}},
{MOVE_1118,{1U,1U,0U}},
{MOVE_1118,{2U,1U,0U}},
{MOVE_1118,{3U,1U,0U}},
{MOVE_1118,{4U,1U,0U}},
{MOVE_1118,{5U,1U,0U}},
{MOVE_1118,{6U,1U,0U}},
{MOVE_1118,{7U,1U,0U}},
{MOVE_1120,{0U,1U,0U}},
{MOVE_1120,{1U,1U,0U}},
{MOVE_1120,{2U,1U,0U}},
{MOVE_1120,{3U,1U,0U}},
{MOVE_1120,{4U,1U,0U}},
{MOVE_1120,{5U,1U,0U}},
{MOVE_1120,{6U,1U,0U}},
{MOVE_1120,{7U,1U,0U}},
{MOVE_1128,{0U,1U,0U}},
{MOVE_1128,{1U,1U,0U}},
{MOVE_1128,{2U,1U,0U}},
{MOVE_1128,{3U,1U,0U}},
{MOVE_1128,{4U,1U,0U}},
{MOVE_1128,{5U,1U,0U}},
{MOVE_1128,{6U,1U,0U}},
{MOVE_1128,{7U,1U,0U}},
{MOVE_1130,{0U,1U,0U}},
{MOVE_1130,{1U,1U,0U}},
{MOVE_1130,{2U,1U,0U}},
{MOVE_1130,{3U,1U,0U}},
{MOVE_1130,{4U,1U,0U}},
{MOVE_1130,{5U,1U,0U}},
{MOVE_1130,{6U,1U,0U}},
{MOVE_1130,{7U,1U,0U}},
{MOVE_1138,{0U,1U,0U}},
{MOVE_1139,{0U,1U,0U}},
{MOVE_113A,{0U,1U,0U}},
{MOVE_113B,{0U,1U,0U}},
{MOVE_113C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1140,{0U,1U,0U}},
{MOVE_1140,{1U,1U,0U}},
{MOVE_1140,{2U,1U,0U}},
{MOVE_1140,{3U,1U,0U}},
{MOVE_1140,{4U,1U,0U}},
{MOVE_1140,{5U,1U,0U}},
{MOVE_1140,{6U,1U,0U}},
{MOVE_1140,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1150,{0U,1U,0U}},
{MOVE_1150,{1U,1U,0U}},
{MOVE_1150,{2U,1U,0U}},
{MOVE_1150,{3U,1U,0U}},
{MOVE_1150,{4U,1U,0U}},
{MOVE_1150,{5U,1U,0U}},
{MOVE_1150,{6U,1U,0U}},
{MOVE_1150,{7U,1U,0U}},
{MOVE_1158,{0U,1U,0U}},
{MOVE_1158,{1U,1U,0U}},
{MOVE_1158,{2U,1U,0U}},
{MOVE_1158,{3U,1U,0U}},
{MOVE_1158,{4U,1U,0U}},
{MOVE_1158,{5U,1U,0U}},
{MOVE_1158,{6U,1U,0U}},
{MOVE_1158,{7U,1U,0U}},
{MOVE_1160,{0U,1U,0U}},
{MOVE_1160,{1U,1U,0U}},
{MOVE_1160,{2U,1U,0U}},
{MOVE_1160,{3U,1U,0U}},
{MOVE_1160,{4U,1U,0U}},
{MOVE_1160,{5U,1U,0U}},
{MOVE_1160,{6U,1U,0U}},
{MOVE_1160,{7U,1U,0U}},
{MOVE_1168,{0U,1U,0U}},
{MOVE_1168,{1U,1U,0U}},
{MOVE_1168,{2U,1U,0U}},
{MOVE_1168,{3U,1U,0U}},
{MOVE_1168,{4U,1U,0U}},
{MOVE_1168,{5U,1U,0U}},
{MOVE_1168,{6U,1U,0U}},
{MOVE_1168,{7U,1U,0U}},
{MOVE_1170,{0U,1U,0U}},
{MOVE_1170,{1U,1U,0U}},
{MOVE_1170,{2U,1U,0U}},
{MOVE_1170,{3U,1U,0U}},
{MOVE_1170,{4U,1U,0U}},
{MOVE_1170,{5U,1U,0U}},
{MOVE_1170,{6U,1U,0U}},
{MOVE_1170,{7U,1U,0U}},
{MOVE_1178,{0U,1U,0U}},
{MOVE_1179,{0U,1U,0U}},
{MOVE_117A,{0U,1U,0U}},
{MOVE_117B,{0U,1U,0U}},
{MOVE_117C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1180,{0U,1U,0U}},
{MOVE_1180,{1U,1U,0U}},
{MOVE_1180,{2U,1U,0U}},
{MOVE_1180,{3U,1U,0U}},
{MOVE_1180,{4U,1U,0U}},
{MOVE_1180,{5U,1U,0U}},
{MOVE_1180,{6U,1U,0U}},
{MOVE_1180,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1190,{0U,1U,0U}},
{MOVE_1190,{1U,1U,0U}},
{MOVE_1190,{2U,1U,0U}},
{MOVE_1190,{3U,1U,0U}},
{MOVE_1190,{4U,1U,0U}},
{MOVE_1190,{5U,1U,0U}},
{MOVE_1190,{6U,1U,0U}},
{MOVE_1190,{7U,1U,0U}},
{MOVE_1198,{0U,1U,0U}},
{MOVE_1198,{1U,1U,0U}},
{MOVE_1198,{2U,1U,0U}},
{MOVE_1198,{3U,1U,0U}},
{MOVE_1198,{4U,1U,0U}},
{MOVE_1198,{5U,1U,0U}},
{MOVE_1198,{6U,1U,0U}},
{MOVE_1198,{7U,1U,0U}},
{MOVE_11A0,{0U,1U,0U}},
{MOVE_11A0,{1U,1U,0U}},
{MOVE_11A0,{2U,1U,0U}},
{MOVE_11A0,{3U,1U,0U}},
{MOVE_11A0,{4U,1U,0U}},
{MOVE_11A0,{5U,1U,0U}},
{MOVE_11A0,{6U,1U,0U}},
{MOVE_11A0,{7U,1U,0U}},
{MOVE_11A8,{0U,1U,0U}},
{MOVE_11A8,{1U,1U,0U}},
{MOVE_11A8,{2U,1U,0U}},
{MOVE_11A8,{3U,1U,0U}},
{MOVE_11A8,{4U,1U,0U}},
{MOVE_11A8,{5U,1U,0U}},
{MOVE_11A8,{6U,1U,0U}},
{MOVE_11A8,{7U,1U,0U}},
{MOVE_11B0,{0U,1U,0U}},
{MOVE_11B0,{1U,1U,0U}},
{MOVE_11B0,{2U,1U,0U}},
{MOVE_11B0,{3U,1U,0U}},
{MOVE_11B0,{4U,1U,0U}},
{MOVE_11B0,{5U,1U,0U}},
{MOVE_11B0,{6U,1U,0U}},
{MOVE_11B0,{7U,1U,0U}},
{MOVE_11B8,{0U,1U,0U}},
{MOVE_11B9,{0U,1U,0U}},
{MOVE_11BA,{0U,1U,0U}},
{MOVE_11BB,{0U,1U,0U}},
{MOVE_11BC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_13C0,{0U,0U,0U}},
{MOVE_13C0,{1U,0U,0U}},
{MOVE_13C0,{2U,0U,0U}},
{MOVE_13C0,{3U,0U,0U}},
{MOVE_13C0,{4U,0U,0U}},
{MOVE_13C0,{5U,0U,0U}},
{MOVE_13C0,{6U,0U,0U}},
{MOVE_13C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_13D0,{0U,0U,0U}},
{MOVE_13D0,{1U,0U,0U}},
{MOVE_13D0,{2U,0U,0U}},
{MOVE_13D0,{3U,0U,0U}},
{MOVE_13D0,{4U,0U,0U}},
{MOVE_13D0,{5U,0U,0U}},
{MOVE_13D0,{6U,0U,0U}},
{MOVE_13D0,{7U,0U,0U}},
{MOVE_13D8,{0U,0U,0U}},
{MOVE_13D8,{1U,0U,0U}},
{MOVE_13D8,{2U,0U,0U}},
{MOVE_13D8,{3U,0U,0U}},
{MOVE_13D8,{4U,0U,0U}},
{MOVE_13D8,{5U,0U,0U}},
{MOVE_13D8,{6U,0U,0U}},
{MOVE_13D8,{7U,0U,0U}},
{MOVE_13E0,{0U,0U,0U}},
{MOVE_13E0,{1U,0U,0U}},
{MOVE_13E0,{2U,0U,0U}},
{MOVE_13E0,{3U,0U,0U}},
{MOVE_13E0,{4U,0U,0U}},
{MOVE_13E0,{5U,0U,0U}},
{MOVE_13E0,{6U,0U,0U}},
{MOVE_13E0,{7U,0U,0U}},
{MOVE_13E8,{0U,0U,0U}},
{MOVE_13E8,{1U,0U,0U}},
{MOVE_13E8,{2U,0U,0U}},
{MOVE_13E8,{3U,0U,0U}},
{MOVE_13E8,{4U,0U,0U}},
{MOVE_13E8,{5U,0U,0U}},
{MOVE_13E8,{6U,0U,0U}},
{MOVE_13E8,{7U,0U,0U}},
{MOVE_13F0,{0U,0U,0U}},
{MOVE_13F0,{1U,0U,0U}},
{MOVE_13F0,{2U,0U,0U}},
{MOVE_13F0,{3U,0U,0U}},
{MOVE_13F0,{4U,0U,0U}},
{MOVE_13F0,{5U,0U,0U}},
{MOVE_13F0,{6U,0U,0U}},
{MOVE_13F0,{7U,0U,0U}},
{MOVE_13F8,{0U,0U,0U}},
{MOVE_13F9,{0U,0U,0U}},
{MOVE_13FA,{0U,0U,0U}},
{MOVE_13FB,{0U,0U,0U}},
{MOVE_13FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1000,{0U,2U,0U}},
{MOVE_1000,{1U,2U,0U}},
{MOVE_1000,{2U,2U,0U}},
{MOVE_1000,{3U,2U,0U}},
{MOVE_1000,{4U,2U,0U}},
{MOVE_1000,{5U,2U,0U}},
{MOVE_1000,{6U,2U,0U}},
{MOVE_1000,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1010,{0U,2U,0U}},
{MOVE_1010,{1U,2U,0U}},
{MOVE_1010,{2U,2U,0U}},
{MOVE_1010,{3U,2U,0U}},
{MOVE_1010,{4U,2U,0U}},
{MOVE_1010,{5U,2U,0U}},
{MOVE_1010,{6U,2U,0U}},
{MOVE_1010,{7U,2U,0U}},
{MOVE_1018,{0U,2U,0U}},
{MOVE_1018,{1U,2U,0U}},
{MOVE_1018,{2U,2U,0U}},
{MOVE_1018,{3U,2U,0U}},
{MOVE_1018,{4U,2U,0U}},
{MOVE_1018,{5U,2U,0U}},
{MOVE_1018,{6U,2U,0U}},
{MOVE_1018,{7U,2U,0U}},
{MOVE_1020,{0U,2U,0U}},
{MOVE_1020,{1U,2U,0U}},
{MOVE_1020,{2U,2U,0U}},
{MOVE_1020,{3U,2U,0U}},
{MOVE_1020,{4U,2U,0U}},
{MOVE_1020,{5U,2U,0U}},
{MOVE_1020,{6U,2U,0U}},
{MOVE_1020,{7U,2U,0U}},
{MOVE_1028,{0U,2U,0U}},
{MOVE_1028,{1U,2U,0U}},
{MOVE_1028,{2U,2U,0U}},
{MOVE_1028,{3U,2U,0U}},
{MOVE_1028,{4U,2U,0U}},
{MOVE_1028,{5U,2U,0U}},
{MOVE_1028,{6U,2U,0U}},
{MOVE_1028,{7U,2U,0U}},
{MOVE_1030,{0U,2U,0U}},
{MOVE_1030,{1U,2U,0U}},
{MOVE_1030,{2U,2U,0U}},
{MOVE_1030,{3U,2U,0U}},
{MOVE_1030,{4U,2U,0U}},
{MOVE_1030,{5U,2U,0U}},
{MOVE_1030,{6U,2U,0U}},
{MOVE_1030,{7U,2U,0U}},
{MOVE_1038,{0U,2U,0U}},
{MOVE_1039,{0U,2U,0U}},
{MOVE_103A,{0U,2U,0U}},
{MOVE_103B,{0U,2U,0U}},
{MOVE_103C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1080,{0U,2U,0U}},
{MOVE_1080,{1U,2U,0U}},
{MOVE_1080,{2U,2U,0U}},
{MOVE_1080,{3U,2U,0U}},
{MOVE_1080,{4U,2U,0U}},
{MOVE_1080,{5U,2U,0U}},
{MOVE_1080,{6U,2U,0U}},
{MOVE_1080,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1090,{0U,2U,0U}},
{MOVE_1090,{1U,2U,0U}},
{MOVE_1090,{2U,2U,0U}},
{MOVE_1090,{3U,2U,0U}},
{MOVE_1090,{4U,2U,0U}},
{MOVE_1090,{5U,2U,0U}},
{MOVE_1090,{6U,2U,0U}},
{MOVE_1090,{7U,2U,0U}},
{MOVE_1098,{0U,2U,0U}},
{MOVE_1098,{1U,2U,0U}},
{MOVE_1098,{2U,2U,0U}},
{MOVE_1098,{3U,2U,0U}},
{MOVE_1098,{4U,2U,0U}},
{MOVE_1098,{5U,2U,0U}},
{MOVE_1098,{6U,2U,0U}},
{MOVE_1098,{7U,2U,0U}},
{MOVE_10A0,{0U,2U,0U}},
{MOVE_10A0,{1U,2U,0U}},
{MOVE_10A0,{2U,2U,0U}},
{MOVE_10A0,{3U,2U,0U}},
{MOVE_10A0,{4U,2U,0U}},
{MOVE_10A0,{5U,2U,0U}},
{MOVE_10A0,{6U,2U,0U}},
{MOVE_10A0,{7U,2U,0U}},
{MOVE_10A8,{0U,2U,0U}},
{MOVE_10A8,{1U,2U,0U}},
{MOVE_10A8,{2U,2U,0U}},
{MOVE_10A8,{3U,2U,0U}},
{MOVE_10A8,{4U,2U,0U}},
{MOVE_10A8,{5U,2U,0U}},
{MOVE_10A8,{6U,2U,0U}},
{MOVE_10A8,{7U,2U,0U}},
{MOVE_10B0,{0U,2U,0U}},
{MOVE_10B0,{1U,2U,0U}},
{MOVE_10B0,{2U,2U,0U}},
{MOVE_10B0,{3U,2U,0U}},
{MOVE_10B0,{4U,2U,0U}},
{MOVE_10B0,{5U,2U,0U}},
{MOVE_10B0,{6U,2U,0U}},
{MOVE_10B0,{7U,2U,0U}},
{MOVE_10B8,{0U,2U,0U}},
{MOVE_10B9,{0U,2U,0U}},
{MOVE_10BA,{0U,2U,0U}},
{MOVE_10BB,{0U,2U,0U}},
{MOVE_10BC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10C0,{0U,2U,0U}},
{MOVE_10C0,{1U,2U,0U}},
{MOVE_10C0,{2U,2U,0U}},
{MOVE_10C0,{3U,2U,0U}},
{MOVE_10C0,{4U,2U,0U}},
{MOVE_10C0,{5U,2U,0U}},
{MOVE_10C0,{6U,2U,0U}},
{MOVE_10C0,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10D0,{0U,2U,0U}},
{MOVE_10D0,{1U,2U,0U}},
{MOVE_10D0,{2U,2U,0U}},
{MOVE_10D0,{3U,2U,0U}},
{MOVE_10D0,{4U,2U,0U}},
{MOVE_10D0,{5U,2U,0U}},
{MOVE_10D0,{6U,2U,0U}},
{MOVE_10D0,{7U,2U,0U}},
{MOVE_10D8,{0U,2U,0U}},
{MOVE_10D8,{1U,2U,0U}},
{MOVE_10D8,{2U,2U,0U}},
{MOVE_10D8,{3U,2U,0U}},
{MOVE_10D8,{4U,2U,0U}},
{MOVE_10D8,{5U,2U,0U}},
{MOVE_10D8,{6U,2U,0U}},
{MOVE_10D8,{7U,2U,0U}},
{MOVE_10E0,{0U,2U,0U}},
{MOVE_10E0,{1U,2U,0U}},
{MOVE_10E0,{2U,2U,0U}},
{MOVE_10E0,{3U,2U,0U}},
{MOVE_10E0,{4U,2U,0U}},
{MOVE_10E0,{5U,2U,0U}},
{MOVE_10E0,{6U,2U,0U}},
{MOVE_10E0,{7U,2U,0U}},
{MOVE_10E8,{0U,2U,0U}},
{MOVE_10E8,{1U,2U,0U}},
{MOVE_10E8,{2U,2U,0U}},
{MOVE_10E8,{3U,2U,0U}},
{MOVE_10E8,{4U,2U,0U}},
{MOVE_10E8,{5U,2U,0U}},
{MOVE_10E8,{6U,2U,0U}},
{MOVE_10E8,{7U,2U,0U}},
{MOVE_10F0,{0U,2U,0U}},
{MOVE_10F0,{1U,2U,0U}},
{MOVE_10F0,{2U,2U,0U}},
{MOVE_10F0,{3U,2U,0U}},
{MOVE_10F0,{4U,2U,0U}},
{MOVE_10F0,{5U,2U,0U}},
{MOVE_10F0,{6U,2U,0U}},
{MOVE_10F0,{7U,2U,0U}},
{MOVE_10F8,{0U,2U,0U}},
{MOVE_10F9,{0U,2U,0U}},
{MOVE_10FA,{0U,2U,0U}},
{MOVE_10FB,{0U,2U,0U}},
{MOVE_10FC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1100,{0U,2U,0U}},
{MOVE_1100,{1U,2U,0U}},
{MOVE_1100,{2U,2U,0U}},
{MOVE_1100,{3U,2U,0U}},
{MOVE_1100,{4U,2U,0U}},
{MOVE_1100,{5U,2U,0U}},
{MOVE_1100,{6U,2U,0U}},
{MOVE_1100,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1110,{0U,2U,0U}},
{MOVE_1110,{1U,2U,0U}},
{MOVE_1110,{2U,2U,0U}},
{MOVE_1110,{3U,2U,0U}},
{MOVE_1110,{4U,2U,0U}},
{MOVE_1110,{5U,2U,0U}},
{MOVE_1110,{6U,2U,0U}},
{MOVE_1110,{7U,2U,0U}},
{MOVE_1118,{0U,2U,0U}},
{MOVE_1118,{1U,2U,0U}},
{MOVE_1118,{2U,2U,0U}},
{MOVE_1118,{3U,2U,0U}},
{MOVE_1118,{4U,2U,0U}},
{MOVE_1118,{5U,2U,0U}},
{MOVE_1118,{6U,2U,0U}},
{MOVE_1118,{7U,2U,0U}},
{MOVE_1120,{0U,2U,0U}},
{MOVE_1120,{1U,2U,0U}},
{MOVE_1120,{2U,2U,0U}},
{MOVE_1120,{3U,2U,0U}},
{MOVE_1120,{4U,2U,0U}},
{MOVE_1120,{5U,2U,0U}},
{MOVE_1120,{6U,2U,0U}},
{MOVE_1120,{7U,2U,0U}},
{MOVE_1128,{0U,2U,0U}},
{MOVE_1128,{1U,2U,0U}},
{MOVE_1128,{2U,2U,0U}},
{MOVE_1128,{3U,2U,0U}},
{MOVE_1128,{4U,2U,0U}},
{MOVE_1128,{5U,2U,0U}},
{MOVE_1128,{6U,2U,0U}},
{MOVE_1128,{7U,2U,0U}},
{MOVE_1130,{0U,2U,0U}},
{MOVE_1130,{1U,2U,0U}},
{MOVE_1130,{2U,2U,0U}},
{MOVE_1130,{3U,2U,0U}},
{MOVE_1130,{4U,2U,0U}},
{MOVE_1130,{5U,2U,0U}},
{MOVE_1130,{6U,2U,0U}},
{MOVE_1130,{7U,2U,0U}},
{MOVE_1138,{0U,2U,0U}},
{MOVE_1139,{0U,2U,0U}},
{MOVE_113A,{0U,2U,0U}},
{MOVE_113B,{0U,2U,0U}},
{MOVE_113C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1140,{0U,2U,0U}},
{MOVE_1140,{1U,2U,0U}},
{MOVE_1140,{2U,2U,0U}},
{MOVE_1140,{3U,2U,0U}},
{MOVE_1140,{4U,2U,0U}},
{MOVE_1140,{5U,2U,0U}},
{MOVE_1140,{6U,2U,0U}},
{MOVE_1140,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1150,{0U,2U,0U}},
{MOVE_1150,{1U,2U,0U}},
{MOVE_1150,{2U,2U,0U}},
{MOVE_1150,{3U,2U,0U}},
{MOVE_1150,{4U,2U,0U}},
{MOVE_1150,{5U,2U,0U}},
{MOVE_1150,{6U,2U,0U}},
{MOVE_1150,{7U,2U,0U}},
{MOVE_1158,{0U,2U,0U}},
{MOVE_1158,{1U,2U,0U}},
{MOVE_1158,{2U,2U,0U}},
{MOVE_1158,{3U,2U,0U}},
{MOVE_1158,{4U,2U,0U}},
{MOVE_1158,{5U,2U,0U}},
{MOVE_1158,{6U,2U,0U}},
{MOVE_1158,{7U,2U,0U}},
{MOVE_1160,{0U,2U,0U}},
{MOVE_1160,{1U,2U,0U}},
{MOVE_1160,{2U,2U,0U}},
{MOVE_1160,{3U,2U,0U}},
{MOVE_1160,{4U,2U,0U}},
{MOVE_1160,{5U,2U,0U}},
{MOVE_1160,{6U,2U,0U}},
{MOVE_1160,{7U,2U,0U}},
{MOVE_1168,{0U,2U,0U}},
{MOVE_1168,{1U,2U,0U}},
{MOVE_1168,{2U,2U,0U}},
{MOVE_1168,{3U,2U,0U}},
{MOVE_1168,{4U,2U,0U}},
{MOVE_1168,{5U,2U,0U}},
{MOVE_1168,{6U,2U,0U}},
{MOVE_1168,{7U,2U,0U}},
{MOVE_1170,{0U,2U,0U}},
{MOVE_1170,{1U,2U,0U}},
{MOVE_1170,{2U,2U,0U}},
{MOVE_1170,{3U,2U,0U}},
{MOVE_1170,{4U,2U,0U}},
{MOVE_1170,{5U,2U,0U}},
{MOVE_1170,{6U,2U,0U}},
{MOVE_1170,{7U,2U,0U}},
{MOVE_1178,{0U,2U,0U}},
{MOVE_1179,{0U,2U,0U}},
{MOVE_117A,{0U,2U,0U}},
{MOVE_117B,{0U,2U,0U}},
{MOVE_117C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1180,{0U,2U,0U}},
{MOVE_1180,{1U,2U,0U}},
{MOVE_1180,{2U,2U,0U}},
{MOVE_1180,{3U,2U,0U}},
{MOVE_1180,{4U,2U,0U}},
{MOVE_1180,{5U,2U,0U}},
{MOVE_1180,{6U,2U,0U}},
{MOVE_1180,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1190,{0U,2U,0U}},
{MOVE_1190,{1U,2U,0U}},
{MOVE_1190,{2U,2U,0U}},
{MOVE_1190,{3U,2U,0U}},
{MOVE_1190,{4U,2U,0U}},
{MOVE_1190,{5U,2U,0U}},
{MOVE_1190,{6U,2U,0U}},
{MOVE_1190,{7U,2U,0U}},
{MOVE_1198,{0U,2U,0U}},
{MOVE_1198,{1U,2U,0U}},
{MOVE_1198,{2U,2U,0U}},
{MOVE_1198,{3U,2U,0U}},
{MOVE_1198,{4U,2U,0U}},
{MOVE_1198,{5U,2U,0U}},
{MOVE_1198,{6U,2U,0U}},
{MOVE_1198,{7U,2U,0U}},
{MOVE_11A0,{0U,2U,0U}},
{MOVE_11A0,{1U,2U,0U}},
{MOVE_11A0,{2U,2U,0U}},
{MOVE_11A0,{3U,2U,0U}},
{MOVE_11A0,{4U,2U,0U}},
{MOVE_11A0,{5U,2U,0U}},
{MOVE_11A0,{6U,2U,0U}},
{MOVE_11A0,{7U,2U,0U}},
{MOVE_11A8,{0U,2U,0U}},
{MOVE_11A8,{1U,2U,0U}},
{MOVE_11A8,{2U,2U,0U}},
{MOVE_11A8,{3U,2U,0U}},
{MOVE_11A8,{4U,2U,0U}},
{MOVE_11A8,{5U,2U,0U}},
{MOVE_11A8,{6U,2U,0U}},
{MOVE_11A8,{7U,2U,0U}},
{MOVE_11B0,{0U,2U,0U}},
{MOVE_11B0,{1U,2U,0U}},
{MOVE_11B0,{2U,2U,0U}},
{MOVE_11B0,{3U,2U,0U}},
{MOVE_11B0,{4U,2U,0U}},
{MOVE_11B0,{5U,2U,0U}},
{MOVE_11B0,{6U,2U,0U}},
{MOVE_11B0,{7U,2U,0U}},
{MOVE_11B8,{0U,2U,0U}},
{MOVE_11B9,{0U,2U,0U}},
{MOVE_11BA,{0U,2U,0U}},
{MOVE_11BB,{0U,2U,0U}},
{MOVE_11BC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1000,{0U,3U,0U}},
{MOVE_1000,{1U,3U,0U}},
{MOVE_1000,{2U,3U,0U}},
{MOVE_1000,{3U,3U,0U}},
{MOVE_1000,{4U,3U,0U}},
{MOVE_1000,{5U,3U,0U}},
{MOVE_1000,{6U,3U,0U}},
{MOVE_1000,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1010,{0U,3U,0U}},
{MOVE_1010,{1U,3U,0U}},
{MOVE_1010,{2U,3U,0U}},
{MOVE_1010,{3U,3U,0U}},
{MOVE_1010,{4U,3U,0U}},
{MOVE_1010,{5U,3U,0U}},
{MOVE_1010,{6U,3U,0U}},
{MOVE_1010,{7U,3U,0U}},
{MOVE_1018,{0U,3U,0U}},
{MOVE_1018,{1U,3U,0U}},
{MOVE_1018,{2U,3U,0U}},
{MOVE_1018,{3U,3U,0U}},
{MOVE_1018,{4U,3U,0U}},
{MOVE_1018,{5U,3U,0U}},
{MOVE_1018,{6U,3U,0U}},
{MOVE_1018,{7U,3U,0U}},
{MOVE_1020,{0U,3U,0U}},
{MOVE_1020,{1U,3U,0U}},
{MOVE_1020,{2U,3U,0U}},
{MOVE_1020,{3U,3U,0U}},
{MOVE_1020,{4U,3U,0U}},
{MOVE_1020,{5U,3U,0U}},
{MOVE_1020,{6U,3U,0U}},
{MOVE_1020,{7U,3U,0U}},
{MOVE_1028,{0U,3U,0U}},
{MOVE_1028,{1U,3U,0U}},
{MOVE_1028,{2U,3U,0U}},
{MOVE_1028,{3U,3U,0U}},
{MOVE_1028,{4U,3U,0U}},
{MOVE_1028,{5U,3U,0U}},
{MOVE_1028,{6U,3U,0U}},
{MOVE_1028,{7U,3U,0U}},
{MOVE_1030,{0U,3U,0U}},
{MOVE_1030,{1U,3U,0U}},
{MOVE_1030,{2U,3U,0U}},
{MOVE_1030,{3U,3U,0U}},
{MOVE_1030,{4U,3U,0U}},
{MOVE_1030,{5U,3U,0U}},
{MOVE_1030,{6U,3U,0U}},
{MOVE_1030,{7U,3U,0U}},
{MOVE_1038,{0U,3U,0U}},
{MOVE_1039,{0U,3U,0U}},
{MOVE_103A,{0U,3U,0U}},
{MOVE_103B,{0U,3U,0U}},
{MOVE_103C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1080,{0U,3U,0U}},
{MOVE_1080,{1U,3U,0U}},
{MOVE_1080,{2U,3U,0U}},
{MOVE_1080,{3U,3U,0U}},
{MOVE_1080,{4U,3U,0U}},
{MOVE_1080,{5U,3U,0U}},
{MOVE_1080,{6U,3U,0U}},
{MOVE_1080,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1090,{0U,3U,0U}},
{MOVE_1090,{1U,3U,0U}},
{MOVE_1090,{2U,3U,0U}},
{MOVE_1090,{3U,3U,0U}},
{MOVE_1090,{4U,3U,0U}},
{MOVE_1090,{5U,3U,0U}},
{MOVE_1090,{6U,3U,0U}},
{MOVE_1090,{7U,3U,0U}},
{MOVE_1098,{0U,3U,0U}},
{MOVE_1098,{1U,3U,0U}},
{MOVE_1098,{2U,3U,0U}},
{MOVE_1098,{3U,3U,0U}},
{MOVE_1098,{4U,3U,0U}},
{MOVE_1098,{5U,3U,0U}},
{MOVE_1098,{6U,3U,0U}},
{MOVE_1098,{7U,3U,0U}},
{MOVE_10A0,{0U,3U,0U}},
{MOVE_10A0,{1U,3U,0U}},
{MOVE_10A0,{2U,3U,0U}},
{MOVE_10A0,{3U,3U,0U}},
{MOVE_10A0,{4U,3U,0U}},
{MOVE_10A0,{5U,3U,0U}},
{MOVE_10A0,{6U,3U,0U}},
{MOVE_10A0,{7U,3U,0U}},
{MOVE_10A8,{0U,3U,0U}},
{MOVE_10A8,{1U,3U,0U}},
{MOVE_10A8,{2U,3U,0U}},
{MOVE_10A8,{3U,3U,0U}},
{MOVE_10A8,{4U,3U,0U}},
{MOVE_10A8,{5U,3U,0U}},
{MOVE_10A8,{6U,3U,0U}},
{MOVE_10A8,{7U,3U,0U}},
{MOVE_10B0,{0U,3U,0U}},
{MOVE_10B0,{1U,3U,0U}},
{MOVE_10B0,{2U,3U,0U}},
{MOVE_10B0,{3U,3U,0U}},
{MOVE_10B0,{4U,3U,0U}},
{MOVE_10B0,{5U,3U,0U}},
{MOVE_10B0,{6U,3U,0U}},
{MOVE_10B0,{7U,3U,0U}},
{MOVE_10B8,{0U,3U,0U}},
{MOVE_10B9,{0U,3U,0U}},
{MOVE_10BA,{0U,3U,0U}},
{MOVE_10BB,{0U,3U,0U}},
{MOVE_10BC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10C0,{0U,3U,0U}},
{MOVE_10C0,{1U,3U,0U}},
{MOVE_10C0,{2U,3U,0U}},
{MOVE_10C0,{3U,3U,0U}},
{MOVE_10C0,{4U,3U,0U}},
{MOVE_10C0,{5U,3U,0U}},
{MOVE_10C0,{6U,3U,0U}},
{MOVE_10C0,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10D0,{0U,3U,0U}},
{MOVE_10D0,{1U,3U,0U}},
{MOVE_10D0,{2U,3U,0U}},
{MOVE_10D0,{3U,3U,0U}},
{MOVE_10D0,{4U,3U,0U}},
{MOVE_10D0,{5U,3U,0U}},
{MOVE_10D0,{6U,3U,0U}},
{MOVE_10D0,{7U,3U,0U}},
{MOVE_10D8,{0U,3U,0U}},
{MOVE_10D8,{1U,3U,0U}},
{MOVE_10D8,{2U,3U,0U}},
{MOVE_10D8,{3U,3U,0U}},
{MOVE_10D8,{4U,3U,0U}},
{MOVE_10D8,{5U,3U,0U}},
{MOVE_10D8,{6U,3U,0U}},
{MOVE_10D8,{7U,3U,0U}},
{MOVE_10E0,{0U,3U,0U}},
{MOVE_10E0,{1U,3U,0U}},
{MOVE_10E0,{2U,3U,0U}},
{MOVE_10E0,{3U,3U,0U}},
{MOVE_10E0,{4U,3U,0U}},
{MOVE_10E0,{5U,3U,0U}},
{MOVE_10E0,{6U,3U,0U}},
{MOVE_10E0,{7U,3U,0U}},
{MOVE_10E8,{0U,3U,0U}},
{MOVE_10E8,{1U,3U,0U}},
{MOVE_10E8,{2U,3U,0U}},
{MOVE_10E8,{3U,3U,0U}},
{MOVE_10E8,{4U,3U,0U}},
{MOVE_10E8,{5U,3U,0U}},
{MOVE_10E8,{6U,3U,0U}},
{MOVE_10E8,{7U,3U,0U}},
{MOVE_10F0,{0U,3U,0U}},
{MOVE_10F0,{1U,3U,0U}},
{MOVE_10F0,{2U,3U,0U}},
{MOVE_10F0,{3U,3U,0U}},
{MOVE_10F0,{4U,3U,0U}},
{MOVE_10F0,{5U,3U,0U}},
{MOVE_10F0,{6U,3U,0U}},
{MOVE_10F0,{7U,3U,0U}},
{MOVE_10F8,{0U,3U,0U}},
{MOVE_10F9,{0U,3U,0U}},
{MOVE_10FA,{0U,3U,0U}},
{MOVE_10FB,{0U,3U,0U}},
{MOVE_10FC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1100,{0U,3U,0U}},
{MOVE_1100,{1U,3U,0U}},
{MOVE_1100,{2U,3U,0U}},
{MOVE_1100,{3U,3U,0U}},
{MOVE_1100,{4U,3U,0U}},
{MOVE_1100,{5U,3U,0U}},
{MOVE_1100,{6U,3U,0U}},
{MOVE_1100,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1110,{0U,3U,0U}},
{MOVE_1110,{1U,3U,0U}},
{MOVE_1110,{2U,3U,0U}},
{MOVE_1110,{3U,3U,0U}},
{MOVE_1110,{4U,3U,0U}},
{MOVE_1110,{5U,3U,0U}},
{MOVE_1110,{6U,3U,0U}},
{MOVE_1110,{7U,3U,0U}},
{MOVE_1118,{0U,3U,0U}},
{MOVE_1118,{1U,3U,0U}},
{MOVE_1118,{2U,3U,0U}},
{MOVE_1118,{3U,3U,0U}},
{MOVE_1118,{4U,3U,0U}},
{MOVE_1118,{5U,3U,0U}},
{MOVE_1118,{6U,3U,0U}},
{MOVE_1118,{7U,3U,0U}},
{MOVE_1120,{0U,3U,0U}},
{MOVE_1120,{1U,3U,0U}},
{MOVE_1120,{2U,3U,0U}},
{MOVE_1120,{3U,3U,0U}},
{MOVE_1120,{4U,3U,0U}},
{MOVE_1120,{5U,3U,0U}},
{MOVE_1120,{6U,3U,0U}},
{MOVE_1120,{7U,3U,0U}},
{MOVE_1128,{0U,3U,0U}},
{MOVE_1128,{1U,3U,0U}},
{MOVE_1128,{2U,3U,0U}},
{MOVE_1128,{3U,3U,0U}},
{MOVE_1128,{4U,3U,0U}},
{MOVE_1128,{5U,3U,0U}},
{MOVE_1128,{6U,3U,0U}},
{MOVE_1128,{7U,3U,0U}},
{MOVE_1130,{0U,3U,0U}},
{MOVE_1130,{1U,3U,0U}},
{MOVE_1130,{2U,3U,0U}},
{MOVE_1130,{3U,3U,0U}},
{MOVE_1130,{4U,3U,0U}},
{MOVE_1130,{5U,3U,0U}},
{MOVE_1130,{6U,3U,0U}},
{MOVE_1130,{7U,3U,0U}},
{MOVE_1138,{0U,3U,0U}},
{MOVE_1139,{0U,3U,0U}},
{MOVE_113A,{0U,3U,0U}},
{MOVE_113B,{0U,3U,0U}},
{MOVE_113C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1140,{0U,3U,0U}},
{MOVE_1140,{1U,3U,0U}},
{MOVE_1140,{2U,3U,0U}},
{MOVE_1140,{3U,3U,0U}},
{MOVE_1140,{4U,3U,0U}},
{MOVE_1140,{5U,3U,0U}},
{MOVE_1140,{6U,3U,0U}},
{MOVE_1140,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1150,{0U,3U,0U}},
{MOVE_1150,{1U,3U,0U}},
{MOVE_1150,{2U,3U,0U}},
{MOVE_1150,{3U,3U,0U}},
{MOVE_1150,{4U,3U,0U}},
{MOVE_1150,{5U,3U,0U}},
{MOVE_1150,{6U,3U,0U}},
{MOVE_1150,{7U,3U,0U}},
{MOVE_1158,{0U,3U,0U}},
{MOVE_1158,{1U,3U,0U}},
{MOVE_1158,{2U,3U,0U}},
{MOVE_1158,{3U,3U,0U}},
{MOVE_1158,{4U,3U,0U}},
{MOVE_1158,{5U,3U,0U}},
{MOVE_1158,{6U,3U,0U}},
{MOVE_1158,{7U,3U,0U}},
{MOVE_1160,{0U,3U,0U}},
{MOVE_1160,{1U,3U,0U}},
{MOVE_1160,{2U,3U,0U}},
{MOVE_1160,{3U,3U,0U}},
{MOVE_1160,{4U,3U,0U}},
{MOVE_1160,{5U,3U,0U}},
{MOVE_1160,{6U,3U,0U}},
{MOVE_1160,{7U,3U,0U}},
{MOVE_1168,{0U,3U,0U}},
{MOVE_1168,{1U,3U,0U}},
{MOVE_1168,{2U,3U,0U}},
{MOVE_1168,{3U,3U,0U}},
{MOVE_1168,{4U,3U,0U}},
{MOVE_1168,{5U,3U,0U}},
{MOVE_1168,{6U,3U,0U}},
{MOVE_1168,{7U,3U,0U}},
{MOVE_1170,{0U,3U,0U}},
{MOVE_1170,{1U,3U,0U}},
{MOVE_1170,{2U,3U,0U}},
{MOVE_1170,{3U,3U,0U}},
{MOVE_1170,{4U,3U,0U}},
{MOVE_1170,{5U,3U,0U}},
{MOVE_1170,{6U,3U,0U}},
{MOVE_1170,{7U,3U,0U}},
{MOVE_1178,{0U,3U,0U}},
{MOVE_1179,{0U,3U,0U}},
{MOVE_117A,{0U,3U,0U}},
{MOVE_117B,{0U,3U,0U}},
{MOVE_117C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1180,{0U,3U,0U}},
{MOVE_1180,{1U,3U,0U}},
{MOVE_1180,{2U,3U,0U}},
{MOVE_1180,{3U,3U,0U}},
{MOVE_1180,{4U,3U,0U}},
{MOVE_1180,{5U,3U,0U}},
{MOVE_1180,{6U,3U,0U}},
{MOVE_1180,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1190,{0U,3U,0U}},
{MOVE_1190,{1U,3U,0U}},
{MOVE_1190,{2U,3U,0U}},
{MOVE_1190,{3U,3U,0U}},
{MOVE_1190,{4U,3U,0U}},
{MOVE_1190,{5U,3U,0U}},
{MOVE_1190,{6U,3U,0U}},
{MOVE_1190,{7U,3U,0U}},
{MOVE_1198,{0U,3U,0U}},
{MOVE_1198,{1U,3U,0U}},
{MOVE_1198,{2U,3U,0U}},
{MOVE_1198,{3U,3U,0U}},
{MOVE_1198,{4U,3U,0U}},
{MOVE_1198,{5U,3U,0U}},
{MOVE_1198,{6U,3U,0U}},
{MOVE_1198,{7U,3U,0U}},
{MOVE_11A0,{0U,3U,0U}},
{MOVE_11A0,{1U,3U,0U}},
{MOVE_11A0,{2U,3U,0U}},
{MOVE_11A0,{3U,3U,0U}},
{MOVE_11A0,{4U,3U,0U}},
{MOVE_11A0,{5U,3U,0U}},
{MOVE_11A0,{6U,3U,0U}},
{MOVE_11A0,{7U,3U,0U}},
{MOVE_11A8,{0U,3U,0U}},
{MOVE_11A8,{1U,3U,0U}},
{MOVE_11A8,{2U,3U,0U}},
{MOVE_11A8,{3U,3U,0U}},
{MOVE_11A8,{4U,3U,0U}},
{MOVE_11A8,{5U,3U,0U}},
{MOVE_11A8,{6U,3U,0U}},
{MOVE_11A8,{7U,3U,0U}},
{MOVE_11B0,{0U,3U,0U}},
{MOVE_11B0,{1U,3U,0U}},
{MOVE_11B0,{2U,3U,0U}},
{MOVE_11B0,{3U,3U,0U}},
{MOVE_11B0,{4U,3U,0U}},
{MOVE_11B0,{5U,3U,0U}},
{MOVE_11B0,{6U,3U,0U}},
{MOVE_11B0,{7U,3U,0U}},
{MOVE_11B8,{0U,3U,0U}},
{MOVE_11B9,{0U,3U,0U}},
{MOVE_11BA,{0U,3U,0U}},
{MOVE_11BB,{0U,3U,0U}},
{MOVE_11BC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1000,{0U,4U,0U}},
{MOVE_1000,{1U,4U,0U}},
{MOVE_1000,{2U,4U,0U}},
{MOVE_1000,{3U,4U,0U}},
{MOVE_1000,{4U,4U,0U}},
{MOVE_1000,{5U,4U,0U}},
{MOVE_1000,{6U,4U,0U}},
{MOVE_1000,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1010,{0U,4U,0U}},
{MOVE_1010,{1U,4U,0U}},
{MOVE_1010,{2U,4U,0U}},
{MOVE_1010,{3U,4U,0U}},
{MOVE_1010,{4U,4U,0U}},
{MOVE_1010,{5U,4U,0U}},
{MOVE_1010,{6U,4U,0U}},
{MOVE_1010,{7U,4U,0U}},
{MOVE_1018,{0U,4U,0U}},
{MOVE_1018,{1U,4U,0U}},
{MOVE_1018,{2U,4U,0U}},
{MOVE_1018,{3U,4U,0U}},
{MOVE_1018,{4U,4U,0U}},
{MOVE_1018,{5U,4U,0U}},
{MOVE_1018,{6U,4U,0U}},
{MOVE_1018,{7U,4U,0U}},
{MOVE_1020,{0U,4U,0U}},
{MOVE_1020,{1U,4U,0U}},
{MOVE_1020,{2U,4U,0U}},
{MOVE_1020,{3U,4U,0U}},
{MOVE_1020,{4U,4U,0U}},
{MOVE_1020,{5U,4U,0U}},
{MOVE_1020,{6U,4U,0U}},
{MOVE_1020,{7U,4U,0U}},
{MOVE_1028,{0U,4U,0U}},
{MOVE_1028,{1U,4U,0U}},
{MOVE_1028,{2U,4U,0U}},
{MOVE_1028,{3U,4U,0U}},
{MOVE_1028,{4U,4U,0U}},
{MOVE_1028,{5U,4U,0U}},
{MOVE_1028,{6U,4U,0U}},
{MOVE_1028,{7U,4U,0U}},
{MOVE_1030,{0U,4U,0U}},
{MOVE_1030,{1U,4U,0U}},
{MOVE_1030,{2U,4U,0U}},
{MOVE_1030,{3U,4U,0U}},
{MOVE_1030,{4U,4U,0U}},
{MOVE_1030,{5U,4U,0U}},
{MOVE_1030,{6U,4U,0U}},
{MOVE_1030,{7U,4U,0U}},
{MOVE_1038,{0U,4U,0U}},
{MOVE_1039,{0U,4U,0U}},
{MOVE_103A,{0U,4U,0U}},
{MOVE_103B,{0U,4U,0U}},
{MOVE_103C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1080,{0U,4U,0U}},
{MOVE_1080,{1U,4U,0U}},
{MOVE_1080,{2U,4U,0U}},
{MOVE_1080,{3U,4U,0U}},
{MOVE_1080,{4U,4U,0U}},
{MOVE_1080,{5U,4U,0U}},
{MOVE_1080,{6U,4U,0U}},
{MOVE_1080,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1090,{0U,4U,0U}},
{MOVE_1090,{1U,4U,0U}},
{MOVE_1090,{2U,4U,0U}},
{MOVE_1090,{3U,4U,0U}},
{MOVE_1090,{4U,4U,0U}},
{MOVE_1090,{5U,4U,0U}},
{MOVE_1090,{6U,4U,0U}},
{MOVE_1090,{7U,4U,0U}},
{MOVE_1098,{0U,4U,0U}},
{MOVE_1098,{1U,4U,0U}},
{MOVE_1098,{2U,4U,0U}},
{MOVE_1098,{3U,4U,0U}},
{MOVE_1098,{4U,4U,0U}},
{MOVE_1098,{5U,4U,0U}},
{MOVE_1098,{6U,4U,0U}},
{MOVE_1098,{7U,4U,0U}},
{MOVE_10A0,{0U,4U,0U}},
{MOVE_10A0,{1U,4U,0U}},
{MOVE_10A0,{2U,4U,0U}},
{MOVE_10A0,{3U,4U,0U}},
{MOVE_10A0,{4U,4U,0U}},
{MOVE_10A0,{5U,4U,0U}},
{MOVE_10A0,{6U,4U,0U}},
{MOVE_10A0,{7U,4U,0U}},
{MOVE_10A8,{0U,4U,0U}},
{MOVE_10A8,{1U,4U,0U}},
{MOVE_10A8,{2U,4U,0U}},
{MOVE_10A8,{3U,4U,0U}},
{MOVE_10A8,{4U,4U,0U}},
{MOVE_10A8,{5U,4U,0U}},
{MOVE_10A8,{6U,4U,0U}},
{MOVE_10A8,{7U,4U,0U}},
{MOVE_10B0,{0U,4U,0U}},
{MOVE_10B0,{1U,4U,0U}},
{MOVE_10B0,{2U,4U,0U}},
{MOVE_10B0,{3U,4U,0U}},
{MOVE_10B0,{4U,4U,0U}},
{MOVE_10B0,{5U,4U,0U}},
{MOVE_10B0,{6U,4U,0U}},
{MOVE_10B0,{7U,4U,0U}},
{MOVE_10B8,{0U,4U,0U}},
{MOVE_10B9,{0U,4U,0U}},
{MOVE_10BA,{0U,4U,0U}},
{MOVE_10BB,{0U,4U,0U}},
{MOVE_10BC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10C0,{0U,4U,0U}},
{MOVE_10C0,{1U,4U,0U}},
{MOVE_10C0,{2U,4U,0U}},
{MOVE_10C0,{3U,4U,0U}},
{MOVE_10C0,{4U,4U,0U}},
{MOVE_10C0,{5U,4U,0U}},
{MOVE_10C0,{6U,4U,0U}},
{MOVE_10C0,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10D0,{0U,4U,0U}},
{MOVE_10D0,{1U,4U,0U}},
{MOVE_10D0,{2U,4U,0U}},
{MOVE_10D0,{3U,4U,0U}},
{MOVE_10D0,{4U,4U,0U}},
{MOVE_10D0,{5U,4U,0U}},
{MOVE_10D0,{6U,4U,0U}},
{MOVE_10D0,{7U,4U,0U}},
{MOVE_10D8,{0U,4U,0U}},
{MOVE_10D8,{1U,4U,0U}},
{MOVE_10D8,{2U,4U,0U}},
{MOVE_10D8,{3U,4U,0U}},
{MOVE_10D8,{4U,4U,0U}},
{MOVE_10D8,{5U,4U,0U}},
{MOVE_10D8,{6U,4U,0U}},
{MOVE_10D8,{7U,4U,0U}},
{MOVE_10E0,{0U,4U,0U}},
{MOVE_10E0,{1U,4U,0U}},
{MOVE_10E0,{2U,4U,0U}},
{MOVE_10E0,{3U,4U,0U}},
{MOVE_10E0,{4U,4U,0U}},
{MOVE_10E0,{5U,4U,0U}},
{MOVE_10E0,{6U,4U,0U}},
{MOVE_10E0,{7U,4U,0U}},
{MOVE_10E8,{0U,4U,0U}},
{MOVE_10E8,{1U,4U,0U}},
{MOVE_10E8,{2U,4U,0U}},
{MOVE_10E8,{3U,4U,0U}},
{MOVE_10E8,{4U,4U,0U}},
{MOVE_10E8,{5U,4U,0U}},
{MOVE_10E8,{6U,4U,0U}},
{MOVE_10E8,{7U,4U,0U}},
{MOVE_10F0,{0U,4U,0U}},
{MOVE_10F0,{1U,4U,0U}},
{MOVE_10F0,{2U,4U,0U}},
{MOVE_10F0,{3U,4U,0U}},
{MOVE_10F0,{4U,4U,0U}},
{MOVE_10F0,{5U,4U,0U}},
{MOVE_10F0,{6U,4U,0U}},
{MOVE_10F0,{7U,4U,0U}},
{MOVE_10F8,{0U,4U,0U}},
{MOVE_10F9,{0U,4U,0U}},
{MOVE_10FA,{0U,4U,0U}},
{MOVE_10FB,{0U,4U,0U}},
{MOVE_10FC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1100,{0U,4U,0U}},
{MOVE_1100,{1U,4U,0U}},
{MOVE_1100,{2U,4U,0U}},
{MOVE_1100,{3U,4U,0U}},
{MOVE_1100,{4U,4U,0U}},
{MOVE_1100,{5U,4U,0U}},
{MOVE_1100,{6U,4U,0U}},
{MOVE_1100,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1110,{0U,4U,0U}},
{MOVE_1110,{1U,4U,0U}},
{MOVE_1110,{2U,4U,0U}},
{MOVE_1110,{3U,4U,0U}},
{MOVE_1110,{4U,4U,0U}},
{MOVE_1110,{5U,4U,0U}},
{MOVE_1110,{6U,4U,0U}},
{MOVE_1110,{7U,4U,0U}},
{MOVE_1118,{0U,4U,0U}},
{MOVE_1118,{1U,4U,0U}},
{MOVE_1118,{2U,4U,0U}},
{MOVE_1118,{3U,4U,0U}},
{MOVE_1118,{4U,4U,0U}},
{MOVE_1118,{5U,4U,0U}},
{MOVE_1118,{6U,4U,0U}},
{MOVE_1118,{7U,4U,0U}},
{MOVE_1120,{0U,4U,0U}},
{MOVE_1120,{1U,4U,0U}},
{MOVE_1120,{2U,4U,0U}},
{MOVE_1120,{3U,4U,0U}},
{MOVE_1120,{4U,4U,0U}},
{MOVE_1120,{5U,4U,0U}},
{MOVE_1120,{6U,4U,0U}},
{MOVE_1120,{7U,4U,0U}},
{MOVE_1128,{0U,4U,0U}},
{MOVE_1128,{1U,4U,0U}},
{MOVE_1128,{2U,4U,0U}},
{MOVE_1128,{3U,4U,0U}},
{MOVE_1128,{4U,4U,0U}},
{MOVE_1128,{5U,4U,0U}},
{MOVE_1128,{6U,4U,0U}},
{MOVE_1128,{7U,4U,0U}},
{MOVE_1130,{0U,4U,0U}},
{MOVE_1130,{1U,4U,0U}},
{MOVE_1130,{2U,4U,0U}},
{MOVE_1130,{3U,4U,0U}},
{MOVE_1130,{4U,4U,0U}},
{MOVE_1130,{5U,4U,0U}},
{MOVE_1130,{6U,4U,0U}},
{MOVE_1130,{7U,4U,0U}},
{MOVE_1138,{0U,4U,0U}},
{MOVE_1139,{0U,4U,0U}},
{MOVE_113A,{0U,4U,0U}},
{MOVE_113B,{0U,4U,0U}},
{MOVE_113C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1140,{0U,4U,0U}},
{MOVE_1140,{1U,4U,0U}},
{MOVE_1140,{2U,4U,0U}},
{MOVE_1140,{3U,4U,0U}},
{MOVE_1140,{4U,4U,0U}},
{MOVE_1140,{5U,4U,0U}},
{MOVE_1140,{6U,4U,0U}},
{MOVE_1140,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1150,{0U,4U,0U}},
{MOVE_1150,{1U,4U,0U}},
{MOVE_1150,{2U,4U,0U}},
{MOVE_1150,{3U,4U,0U}},
{MOVE_1150,{4U,4U,0U}},
{MOVE_1150,{5U,4U,0U}},
{MOVE_1150,{6U,4U,0U}},
{MOVE_1150,{7U,4U,0U}},
{MOVE_1158,{0U,4U,0U}},
{MOVE_1158,{1U,4U,0U}},
{MOVE_1158,{2U,4U,0U}},
{MOVE_1158,{3U,4U,0U}},
{MOVE_1158,{4U,4U,0U}},
{MOVE_1158,{5U,4U,0U}},
{MOVE_1158,{6U,4U,0U}},
{MOVE_1158,{7U,4U,0U}},
{MOVE_1160,{0U,4U,0U}},
{MOVE_1160,{1U,4U,0U}},
{MOVE_1160,{2U,4U,0U}},
{MOVE_1160,{3U,4U,0U}},
{MOVE_1160,{4U,4U,0U}},
{MOVE_1160,{5U,4U,0U}},
{MOVE_1160,{6U,4U,0U}},
{MOVE_1160,{7U,4U,0U}},
{MOVE_1168,{0U,4U,0U}},
{MOVE_1168,{1U,4U,0U}},
{MOVE_1168,{2U,4U,0U}},
{MOVE_1168,{3U,4U,0U}},
{MOVE_1168,{4U,4U,0U}},
{MOVE_1168,{5U,4U,0U}},
{MOVE_1168,{6U,4U,0U}},
{MOVE_1168,{7U,4U,0U}},
{MOVE_1170,{0U,4U,0U}},
{MOVE_1170,{1U,4U,0U}},
{MOVE_1170,{2U,4U,0U}},
{MOVE_1170,{3U,4U,0U}},
{MOVE_1170,{4U,4U,0U}},
{MOVE_1170,{5U,4U,0U}},
{MOVE_1170,{6U,4U,0U}},
{MOVE_1170,{7U,4U,0U}},
{MOVE_1178,{0U,4U,0U}},
{MOVE_1179,{0U,4U,0U}},
{MOVE_117A,{0U,4U,0U}},
{MOVE_117B,{0U,4U,0U}},
{MOVE_117C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1180,{0U,4U,0U}},
{MOVE_1180,{1U,4U,0U}},
{MOVE_1180,{2U,4U,0U}},
{MOVE_1180,{3U,4U,0U}},
{MOVE_1180,{4U,4U,0U}},
{MOVE_1180,{5U,4U,0U}},
{MOVE_1180,{6U,4U,0U}},
{MOVE_1180,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1190,{0U,4U,0U}},
{MOVE_1190,{1U,4U,0U}},
{MOVE_1190,{2U,4U,0U}},
{MOVE_1190,{3U,4U,0U}},
{MOVE_1190,{4U,4U,0U}},
{MOVE_1190,{5U,4U,0U}},
{MOVE_1190,{6U,4U,0U}},
{MOVE_1190,{7U,4U,0U}},
{MOVE_1198,{0U,4U,0U}},
{MOVE_1198,{1U,4U,0U}},
{MOVE_1198,{2U,4U,0U}},
{MOVE_1198,{3U,4U,0U}},
{MOVE_1198,{4U,4U,0U}},
{MOVE_1198,{5U,4U,0U}},
{MOVE_1198,{6U,4U,0U}},
{MOVE_1198,{7U,4U,0U}},
{MOVE_11A0,{0U,4U,0U}},
{MOVE_11A0,{1U,4U,0U}},
{MOVE_11A0,{2U,4U,0U}},
{MOVE_11A0,{3U,4U,0U}},
{MOVE_11A0,{4U,4U,0U}},
{MOVE_11A0,{5U,4U,0U}},
{MOVE_11A0,{6U,4U,0U}},
{MOVE_11A0,{7U,4U,0U}},
{MOVE_11A8,{0U,4U,0U}},
{MOVE_11A8,{1U,4U,0U}},
{MOVE_11A8,{2U,4U,0U}},
{MOVE_11A8,{3U,4U,0U}},
{MOVE_11A8,{4U,4U,0U}},
{MOVE_11A8,{5U,4U,0U}},
{MOVE_11A8,{6U,4U,0U}},
{MOVE_11A8,{7U,4U,0U}},
{MOVE_11B0,{0U,4U,0U}},
{MOVE_11B0,{1U,4U,0U}},
{MOVE_11B0,{2U,4U,0U}},
{MOVE_11B0,{3U,4U,0U}},
{MOVE_11B0,{4U,4U,0U}},
{MOVE_11B0,{5U,4U,0U}},
{MOVE_11B0,{6U,4U,0U}},
{MOVE_11B0,{7U,4U,0U}},
{MOVE_11B8,{0U,4U,0U}},
{MOVE_11B9,{0U,4U,0U}},
{MOVE_11BA,{0U,4U,0U}},
{MOVE_11BB,{0U,4U,0U}},
{MOVE_11BC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1000,{0U,5U,0U}},
{MOVE_1000,{1U,5U,0U}},
{MOVE_1000,{2U,5U,0U}},
{MOVE_1000,{3U,5U,0U}},
{MOVE_1000,{4U,5U,0U}},
{MOVE_1000,{5U,5U,0U}},
{MOVE_1000,{6U,5U,0U}},
{MOVE_1000,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1010,{0U,5U,0U}},
{MOVE_1010,{1U,5U,0U}},
{MOVE_1010,{2U,5U,0U}},
{MOVE_1010,{3U,5U,0U}},
{MOVE_1010,{4U,5U,0U}},
{MOVE_1010,{5U,5U,0U}},
{MOVE_1010,{6U,5U,0U}},
{MOVE_1010,{7U,5U,0U}},
{MOVE_1018,{0U,5U,0U}},
{MOVE_1018,{1U,5U,0U}},
{MOVE_1018,{2U,5U,0U}},
{MOVE_1018,{3U,5U,0U}},
{MOVE_1018,{4U,5U,0U}},
{MOVE_1018,{5U,5U,0U}},
{MOVE_1018,{6U,5U,0U}},
{MOVE_1018,{7U,5U,0U}},
{MOVE_1020,{0U,5U,0U}},
{MOVE_1020,{1U,5U,0U}},
{MOVE_1020,{2U,5U,0U}},
{MOVE_1020,{3U,5U,0U}},
{MOVE_1020,{4U,5U,0U}},
{MOVE_1020,{5U,5U,0U}},
{MOVE_1020,{6U,5U,0U}},
{MOVE_1020,{7U,5U,0U}},
{MOVE_1028,{0U,5U,0U}},
{MOVE_1028,{1U,5U,0U}},
{MOVE_1028,{2U,5U,0U}},
{MOVE_1028,{3U,5U,0U}},
{MOVE_1028,{4U,5U,0U}},
{MOVE_1028,{5U,5U,0U}},
{MOVE_1028,{6U,5U,0U}},
{MOVE_1028,{7U,5U,0U}},
{MOVE_1030,{0U,5U,0U}},
{MOVE_1030,{1U,5U,0U}},
{MOVE_1030,{2U,5U,0U}},
{MOVE_1030,{3U,5U,0U}},
{MOVE_1030,{4U,5U,0U}},
{MOVE_1030,{5U,5U,0U}},
{MOVE_1030,{6U,5U,0U}},
{MOVE_1030,{7U,5U,0U}},
{MOVE_1038,{0U,5U,0U}},
{MOVE_1039,{0U,5U,0U}},
{MOVE_103A,{0U,5U,0U}},
{MOVE_103B,{0U,5U,0U}},
{MOVE_103C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1080,{0U,5U,0U}},
{MOVE_1080,{1U,5U,0U}},
{MOVE_1080,{2U,5U,0U}},
{MOVE_1080,{3U,5U,0U}},
{MOVE_1080,{4U,5U,0U}},
{MOVE_1080,{5U,5U,0U}},
{MOVE_1080,{6U,5U,0U}},
{MOVE_1080,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1090,{0U,5U,0U}},
{MOVE_1090,{1U,5U,0U}},
{MOVE_1090,{2U,5U,0U}},
{MOVE_1090,{3U,5U,0U}},
{MOVE_1090,{4U,5U,0U}},
{MOVE_1090,{5U,5U,0U}},
{MOVE_1090,{6U,5U,0U}},
{MOVE_1090,{7U,5U,0U}},
{MOVE_1098,{0U,5U,0U}},
{MOVE_1098,{1U,5U,0U}},
{MOVE_1098,{2U,5U,0U}},
{MOVE_1098,{3U,5U,0U}},
{MOVE_1098,{4U,5U,0U}},
{MOVE_1098,{5U,5U,0U}},
{MOVE_1098,{6U,5U,0U}},
{MOVE_1098,{7U,5U,0U}},
{MOVE_10A0,{0U,5U,0U}},
{MOVE_10A0,{1U,5U,0U}},
{MOVE_10A0,{2U,5U,0U}},
{MOVE_10A0,{3U,5U,0U}},
{MOVE_10A0,{4U,5U,0U}},
{MOVE_10A0,{5U,5U,0U}},
{MOVE_10A0,{6U,5U,0U}},
{MOVE_10A0,{7U,5U,0U}},
{MOVE_10A8,{0U,5U,0U}},
{MOVE_10A8,{1U,5U,0U}},
{MOVE_10A8,{2U,5U,0U}},
{MOVE_10A8,{3U,5U,0U}},
{MOVE_10A8,{4U,5U,0U}},
{MOVE_10A8,{5U,5U,0U}},
{MOVE_10A8,{6U,5U,0U}},
{MOVE_10A8,{7U,5U,0U}},
{MOVE_10B0,{0U,5U,0U}},
{MOVE_10B0,{1U,5U,0U}},
{MOVE_10B0,{2U,5U,0U}},
{MOVE_10B0,{3U,5U,0U}},
{MOVE_10B0,{4U,5U,0U}},
{MOVE_10B0,{5U,5U,0U}},
{MOVE_10B0,{6U,5U,0U}},
{MOVE_10B0,{7U,5U,0U}},
{MOVE_10B8,{0U,5U,0U}},
{MOVE_10B9,{0U,5U,0U}},
{MOVE_10BA,{0U,5U,0U}},
{MOVE_10BB,{0U,5U,0U}},
{MOVE_10BC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10C0,{0U,5U,0U}},
{MOVE_10C0,{1U,5U,0U}},
{MOVE_10C0,{2U,5U,0U}},
{MOVE_10C0,{3U,5U,0U}},
{MOVE_10C0,{4U,5U,0U}},
{MOVE_10C0,{5U,5U,0U}},
{MOVE_10C0,{6U,5U,0U}},
{MOVE_10C0,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10D0,{0U,5U,0U}},
{MOVE_10D0,{1U,5U,0U}},
{MOVE_10D0,{2U,5U,0U}},
{MOVE_10D0,{3U,5U,0U}},
{MOVE_10D0,{4U,5U,0U}},
{MOVE_10D0,{5U,5U,0U}},
{MOVE_10D0,{6U,5U,0U}},
{MOVE_10D0,{7U,5U,0U}},
{MOVE_10D8,{0U,5U,0U}},
{MOVE_10D8,{1U,5U,0U}},
{MOVE_10D8,{2U,5U,0U}},
{MOVE_10D8,{3U,5U,0U}},
{MOVE_10D8,{4U,5U,0U}},
{MOVE_10D8,{5U,5U,0U}},
{MOVE_10D8,{6U,5U,0U}},
{MOVE_10D8,{7U,5U,0U}},
{MOVE_10E0,{0U,5U,0U}},
{MOVE_10E0,{1U,5U,0U}},
{MOVE_10E0,{2U,5U,0U}},
{MOVE_10E0,{3U,5U,0U}},
{MOVE_10E0,{4U,5U,0U}},
{MOVE_10E0,{5U,5U,0U}},
{MOVE_10E0,{6U,5U,0U}},
{MOVE_10E0,{7U,5U,0U}},
{MOVE_10E8,{0U,5U,0U}},
{MOVE_10E8,{1U,5U,0U}},
{MOVE_10E8,{2U,5U,0U}},
{MOVE_10E8,{3U,5U,0U}},
{MOVE_10E8,{4U,5U,0U}},
{MOVE_10E8,{5U,5U,0U}},
{MOVE_10E8,{6U,5U,0U}},
{MOVE_10E8,{7U,5U,0U}},
{MOVE_10F0,{0U,5U,0U}},
{MOVE_10F0,{1U,5U,0U}},
{MOVE_10F0,{2U,5U,0U}},
{MOVE_10F0,{3U,5U,0U}},
{MOVE_10F0,{4U,5U,0U}},
{MOVE_10F0,{5U,5U,0U}},
{MOVE_10F0,{6U,5U,0U}},
{MOVE_10F0,{7U,5U,0U}},
{MOVE_10F8,{0U,5U,0U}},
{MOVE_10F9,{0U,5U,0U}},
{MOVE_10FA,{0U,5U,0U}},
{MOVE_10FB,{0U,5U,0U}},
{MOVE_10FC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1100,{0U,5U,0U}},
{MOVE_1100,{1U,5U,0U}},
{MOVE_1100,{2U,5U,0U}},
{MOVE_1100,{3U,5U,0U}},
{MOVE_1100,{4U,5U,0U}},
{MOVE_1100,{5U,5U,0U}},
{MOVE_1100,{6U,5U,0U}},
{MOVE_1100,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1110,{0U,5U,0U}},
{MOVE_1110,{1U,5U,0U}},
{MOVE_1110,{2U,5U,0U}},
{MOVE_1110,{3U,5U,0U}},
{MOVE_1110,{4U,5U,0U}},
{MOVE_1110,{5U,5U,0U}},
{MOVE_1110,{6U,5U,0U}},
{MOVE_1110,{7U,5U,0U}},
{MOVE_1118,{0U,5U,0U}},
{MOVE_1118,{1U,5U,0U}},
{MOVE_1118,{2U,5U,0U}},
{MOVE_1118,{3U,5U,0U}},
{MOVE_1118,{4U,5U,0U}},
{MOVE_1118,{5U,5U,0U}},
{MOVE_1118,{6U,5U,0U}},
{MOVE_1118,{7U,5U,0U}},
{MOVE_1120,{0U,5U,0U}},
{MOVE_1120,{1U,5U,0U}},
{MOVE_1120,{2U,5U,0U}},
{MOVE_1120,{3U,5U,0U}},
{MOVE_1120,{4U,5U,0U}},
{MOVE_1120,{5U,5U,0U}},
{MOVE_1120,{6U,5U,0U}},
{MOVE_1120,{7U,5U,0U}},
{MOVE_1128,{0U,5U,0U}},
{MOVE_1128,{1U,5U,0U}},
{MOVE_1128,{2U,5U,0U}},
{MOVE_1128,{3U,5U,0U}},
{MOVE_1128,{4U,5U,0U}},
{MOVE_1128,{5U,5U,0U}},
{MOVE_1128,{6U,5U,0U}},
{MOVE_1128,{7U,5U,0U}},
{MOVE_1130,{0U,5U,0U}},
{MOVE_1130,{1U,5U,0U}},
{MOVE_1130,{2U,5U,0U}},
{MOVE_1130,{3U,5U,0U}},
{MOVE_1130,{4U,5U,0U}},
{MOVE_1130,{5U,5U,0U}},
{MOVE_1130,{6U,5U,0U}},
{MOVE_1130,{7U,5U,0U}},
{MOVE_1138,{0U,5U,0U}},
{MOVE_1139,{0U,5U,0U}},
{MOVE_113A,{0U,5U,0U}},
{MOVE_113B,{0U,5U,0U}},
{MOVE_113C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1140,{0U,5U,0U}},
{MOVE_1140,{1U,5U,0U}},
{MOVE_1140,{2U,5U,0U}},
{MOVE_1140,{3U,5U,0U}},
{MOVE_1140,{4U,5U,0U}},
{MOVE_1140,{5U,5U,0U}},
{MOVE_1140,{6U,5U,0U}},
{MOVE_1140,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1150,{0U,5U,0U}},
{MOVE_1150,{1U,5U,0U}},
{MOVE_1150,{2U,5U,0U}},
{MOVE_1150,{3U,5U,0U}},
{MOVE_1150,{4U,5U,0U}},
{MOVE_1150,{5U,5U,0U}},
{MOVE_1150,{6U,5U,0U}},
{MOVE_1150,{7U,5U,0U}},
{MOVE_1158,{0U,5U,0U}},
{MOVE_1158,{1U,5U,0U}},
{MOVE_1158,{2U,5U,0U}},
{MOVE_1158,{3U,5U,0U}},
{MOVE_1158,{4U,5U,0U}},
{MOVE_1158,{5U,5U,0U}},
{MOVE_1158,{6U,5U,0U}},
{MOVE_1158,{7U,5U,0U}},
{MOVE_1160,{0U,5U,0U}},
{MOVE_1160,{1U,5U,0U}},
{MOVE_1160,{2U,5U,0U}},
{MOVE_1160,{3U,5U,0U}},
{MOVE_1160,{4U,5U,0U}},
{MOVE_1160,{5U,5U,0U}},
{MOVE_1160,{6U,5U,0U}},
{MOVE_1160,{7U,5U,0U}},
{MOVE_1168,{0U,5U,0U}},
{MOVE_1168,{1U,5U,0U}},
{MOVE_1168,{2U,5U,0U}},
{MOVE_1168,{3U,5U,0U}},
{MOVE_1168,{4U,5U,0U}},
{MOVE_1168,{5U,5U,0U}},
{MOVE_1168,{6U,5U,0U}},
{MOVE_1168,{7U,5U,0U}},
{MOVE_1170,{0U,5U,0U}},
{MOVE_1170,{1U,5U,0U}},
{MOVE_1170,{2U,5U,0U}},
{MOVE_1170,{3U,5U,0U}},
{MOVE_1170,{4U,5U,0U}},
{MOVE_1170,{5U,5U,0U}},
{MOVE_1170,{6U,5U,0U}},
{MOVE_1170,{7U,5U,0U}},
{MOVE_1178,{0U,5U,0U}},
{MOVE_1179,{0U,5U,0U}},
{MOVE_117A,{0U,5U,0U}},
{MOVE_117B,{0U,5U,0U}},
{MOVE_117C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1180,{0U,5U,0U}},
{MOVE_1180,{1U,5U,0U}},
{MOVE_1180,{2U,5U,0U}},
{MOVE_1180,{3U,5U,0U}},
{MOVE_1180,{4U,5U,0U}},
{MOVE_1180,{5U,5U,0U}},
{MOVE_1180,{6U,5U,0U}},
{MOVE_1180,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1190,{0U,5U,0U}},
{MOVE_1190,{1U,5U,0U}},
{MOVE_1190,{2U,5U,0U}},
{MOVE_1190,{3U,5U,0U}},
{MOVE_1190,{4U,5U,0U}},
{MOVE_1190,{5U,5U,0U}},
{MOVE_1190,{6U,5U,0U}},
{MOVE_1190,{7U,5U,0U}},
{MOVE_1198,{0U,5U,0U}},
{MOVE_1198,{1U,5U,0U}},
{MOVE_1198,{2U,5U,0U}},
{MOVE_1198,{3U,5U,0U}},
{MOVE_1198,{4U,5U,0U}},
{MOVE_1198,{5U,5U,0U}},
{MOVE_1198,{6U,5U,0U}},
{MOVE_1198,{7U,5U,0U}},
{MOVE_11A0,{0U,5U,0U}},
{MOVE_11A0,{1U,5U,0U}},
{MOVE_11A0,{2U,5U,0U}},
{MOVE_11A0,{3U,5U,0U}},
{MOVE_11A0,{4U,5U,0U}},
{MOVE_11A0,{5U,5U,0U}},
{MOVE_11A0,{6U,5U,0U}},
{MOVE_11A0,{7U,5U,0U}},
{MOVE_11A8,{0U,5U,0U}},
{MOVE_11A8,{1U,5U,0U}},
{MOVE_11A8,{2U,5U,0U}},
{MOVE_11A8,{3U,5U,0U}},
{MOVE_11A8,{4U,5U,0U}},
{MOVE_11A8,{5U,5U,0U}},
{MOVE_11A8,{6U,5U,0U}},
{MOVE_11A8,{7U,5U,0U}},
{MOVE_11B0,{0U,5U,0U}},
{MOVE_11B0,{1U,5U,0U}},
{MOVE_11B0,{2U,5U,0U}},
{MOVE_11B0,{3U,5U,0U}},
{MOVE_11B0,{4U,5U,0U}},
{MOVE_11B0,{5U,5U,0U}},
{MOVE_11B0,{6U,5U,0U}},
{MOVE_11B0,{7U,5U,0U}},
{MOVE_11B8,{0U,5U,0U}},
{MOVE_11B9,{0U,5U,0U}},
{MOVE_11BA,{0U,5U,0U}},
{MOVE_11BB,{0U,5U,0U}},
{MOVE_11BC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1000,{0U,6U,0U}},
{MOVE_1000,{1U,6U,0U}},
{MOVE_1000,{2U,6U,0U}},
{MOVE_1000,{3U,6U,0U}},
{MOVE_1000,{4U,6U,0U}},
{MOVE_1000,{5U,6U,0U}},
{MOVE_1000,{6U,6U,0U}},
{MOVE_1000,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1010,{0U,6U,0U}},
{MOVE_1010,{1U,6U,0U}},
{MOVE_1010,{2U,6U,0U}},
{MOVE_1010,{3U,6U,0U}},
{MOVE_1010,{4U,6U,0U}},
{MOVE_1010,{5U,6U,0U}},
{MOVE_1010,{6U,6U,0U}},
{MOVE_1010,{7U,6U,0U}},
{MOVE_1018,{0U,6U,0U}},
{MOVE_1018,{1U,6U,0U}},
{MOVE_1018,{2U,6U,0U}},
{MOVE_1018,{3U,6U,0U}},
{MOVE_1018,{4U,6U,0U}},
{MOVE_1018,{5U,6U,0U}},
{MOVE_1018,{6U,6U,0U}},
{MOVE_1018,{7U,6U,0U}},
{MOVE_1020,{0U,6U,0U}},
{MOVE_1020,{1U,6U,0U}},
{MOVE_1020,{2U,6U,0U}},
{MOVE_1020,{3U,6U,0U}},
{MOVE_1020,{4U,6U,0U}},
{MOVE_1020,{5U,6U,0U}},
{MOVE_1020,{6U,6U,0U}},
{MOVE_1020,{7U,6U,0U}},
{MOVE_1028,{0U,6U,0U}},
{MOVE_1028,{1U,6U,0U}},
{MOVE_1028,{2U,6U,0U}},
{MOVE_1028,{3U,6U,0U}},
{MOVE_1028,{4U,6U,0U}},
{MOVE_1028,{5U,6U,0U}},
{MOVE_1028,{6U,6U,0U}},
{MOVE_1028,{7U,6U,0U}},
{MOVE_1030,{0U,6U,0U}},
{MOVE_1030,{1U,6U,0U}},
{MOVE_1030,{2U,6U,0U}},
{MOVE_1030,{3U,6U,0U}},
{MOVE_1030,{4U,6U,0U}},
{MOVE_1030,{5U,6U,0U}},
{MOVE_1030,{6U,6U,0U}},
{MOVE_1030,{7U,6U,0U}},
{MOVE_1038,{0U,6U,0U}},
{MOVE_1039,{0U,6U,0U}},
{MOVE_103A,{0U,6U,0U}},
{MOVE_103B,{0U,6U,0U}},
{MOVE_103C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1080,{0U,6U,0U}},
{MOVE_1080,{1U,6U,0U}},
{MOVE_1080,{2U,6U,0U}},
{MOVE_1080,{3U,6U,0U}},
{MOVE_1080,{4U,6U,0U}},
{MOVE_1080,{5U,6U,0U}},
{MOVE_1080,{6U,6U,0U}},
{MOVE_1080,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1090,{0U,6U,0U}},
{MOVE_1090,{1U,6U,0U}},
{MOVE_1090,{2U,6U,0U}},
{MOVE_1090,{3U,6U,0U}},
{MOVE_1090,{4U,6U,0U}},
{MOVE_1090,{5U,6U,0U}},
{MOVE_1090,{6U,6U,0U}},
{MOVE_1090,{7U,6U,0U}},
{MOVE_1098,{0U,6U,0U}},
{MOVE_1098,{1U,6U,0U}},
{MOVE_1098,{2U,6U,0U}},
{MOVE_1098,{3U,6U,0U}},
{MOVE_1098,{4U,6U,0U}},
{MOVE_1098,{5U,6U,0U}},
{MOVE_1098,{6U,6U,0U}},
{MOVE_1098,{7U,6U,0U}},
{MOVE_10A0,{0U,6U,0U}},
{MOVE_10A0,{1U,6U,0U}},
{MOVE_10A0,{2U,6U,0U}},
{MOVE_10A0,{3U,6U,0U}},
{MOVE_10A0,{4U,6U,0U}},
{MOVE_10A0,{5U,6U,0U}},
{MOVE_10A0,{6U,6U,0U}},
{MOVE_10A0,{7U,6U,0U}},
{MOVE_10A8,{0U,6U,0U}},
{MOVE_10A8,{1U,6U,0U}},
{MOVE_10A8,{2U,6U,0U}},
{MOVE_10A8,{3U,6U,0U}},
{MOVE_10A8,{4U,6U,0U}},
{MOVE_10A8,{5U,6U,0U}},
{MOVE_10A8,{6U,6U,0U}},
{MOVE_10A8,{7U,6U,0U}},
{MOVE_10B0,{0U,6U,0U}},
{MOVE_10B0,{1U,6U,0U}},
{MOVE_10B0,{2U,6U,0U}},
{MOVE_10B0,{3U,6U,0U}},
{MOVE_10B0,{4U,6U,0U}},
{MOVE_10B0,{5U,6U,0U}},
{MOVE_10B0,{6U,6U,0U}},
{MOVE_10B0,{7U,6U,0U}},
{MOVE_10B8,{0U,6U,0U}},
{MOVE_10B9,{0U,6U,0U}},
{MOVE_10BA,{0U,6U,0U}},
{MOVE_10BB,{0U,6U,0U}},
{MOVE_10BC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10C0,{0U,6U,0U}},
{MOVE_10C0,{1U,6U,0U}},
{MOVE_10C0,{2U,6U,0U}},
{MOVE_10C0,{3U,6U,0U}},
{MOVE_10C0,{4U,6U,0U}},
{MOVE_10C0,{5U,6U,0U}},
{MOVE_10C0,{6U,6U,0U}},
{MOVE_10C0,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10D0,{0U,6U,0U}},
{MOVE_10D0,{1U,6U,0U}},
{MOVE_10D0,{2U,6U,0U}},
{MOVE_10D0,{3U,6U,0U}},
{MOVE_10D0,{4U,6U,0U}},
{MOVE_10D0,{5U,6U,0U}},
{MOVE_10D0,{6U,6U,0U}},
{MOVE_10D0,{7U,6U,0U}},
{MOVE_10D8,{0U,6U,0U}},
{MOVE_10D8,{1U,6U,0U}},
{MOVE_10D8,{2U,6U,0U}},
{MOVE_10D8,{3U,6U,0U}},
{MOVE_10D8,{4U,6U,0U}},
{MOVE_10D8,{5U,6U,0U}},
{MOVE_10D8,{6U,6U,0U}},
{MOVE_10D8,{7U,6U,0U}},
{MOVE_10E0,{0U,6U,0U}},
{MOVE_10E0,{1U,6U,0U}},
{MOVE_10E0,{2U,6U,0U}},
{MOVE_10E0,{3U,6U,0U}},
{MOVE_10E0,{4U,6U,0U}},
{MOVE_10E0,{5U,6U,0U}},
{MOVE_10E0,{6U,6U,0U}},
{MOVE_10E0,{7U,6U,0U}},
{MOVE_10E8,{0U,6U,0U}},
{MOVE_10E8,{1U,6U,0U}},
{MOVE_10E8,{2U,6U,0U}},
{MOVE_10E8,{3U,6U,0U}},
{MOVE_10E8,{4U,6U,0U}},
{MOVE_10E8,{5U,6U,0U}},
{MOVE_10E8,{6U,6U,0U}},
{MOVE_10E8,{7U,6U,0U}},
{MOVE_10F0,{0U,6U,0U}},
{MOVE_10F0,{1U,6U,0U}},
{MOVE_10F0,{2U,6U,0U}},
{MOVE_10F0,{3U,6U,0U}},
{MOVE_10F0,{4U,6U,0U}},
{MOVE_10F0,{5U,6U,0U}},
{MOVE_10F0,{6U,6U,0U}},
{MOVE_10F0,{7U,6U,0U}},
{MOVE_10F8,{0U,6U,0U}},
{MOVE_10F9,{0U,6U,0U}},
{MOVE_10FA,{0U,6U,0U}},
{MOVE_10FB,{0U,6U,0U}},
{MOVE_10FC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1100,{0U,6U,0U}},
{MOVE_1100,{1U,6U,0U}},
{MOVE_1100,{2U,6U,0U}},
{MOVE_1100,{3U,6U,0U}},
{MOVE_1100,{4U,6U,0U}},
{MOVE_1100,{5U,6U,0U}},
{MOVE_1100,{6U,6U,0U}},
{MOVE_1100,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1110,{0U,6U,0U}},
{MOVE_1110,{1U,6U,0U}},
{MOVE_1110,{2U,6U,0U}},
{MOVE_1110,{3U,6U,0U}},
{MOVE_1110,{4U,6U,0U}},
{MOVE_1110,{5U,6U,0U}},
{MOVE_1110,{6U,6U,0U}},
{MOVE_1110,{7U,6U,0U}},
{MOVE_1118,{0U,6U,0U}},
{MOVE_1118,{1U,6U,0U}},
{MOVE_1118,{2U,6U,0U}},
{MOVE_1118,{3U,6U,0U}},
{MOVE_1118,{4U,6U,0U}},
{MOVE_1118,{5U,6U,0U}},
{MOVE_1118,{6U,6U,0U}},
{MOVE_1118,{7U,6U,0U}},
{MOVE_1120,{0U,6U,0U}},
{MOVE_1120,{1U,6U,0U}},
{MOVE_1120,{2U,6U,0U}},
{MOVE_1120,{3U,6U,0U}},
{MOVE_1120,{4U,6U,0U}},
{MOVE_1120,{5U,6U,0U}},
{MOVE_1120,{6U,6U,0U}},
{MOVE_1120,{7U,6U,0U}},
{MOVE_1128,{0U,6U,0U}},
{MOVE_1128,{1U,6U,0U}},
{MOVE_1128,{2U,6U,0U}},
{MOVE_1128,{3U,6U,0U}},
{MOVE_1128,{4U,6U,0U}},
{MOVE_1128,{5U,6U,0U}},
{MOVE_1128,{6U,6U,0U}},
{MOVE_1128,{7U,6U,0U}},
{MOVE_1130,{0U,6U,0U}},
{MOVE_1130,{1U,6U,0U}},
{MOVE_1130,{2U,6U,0U}},
{MOVE_1130,{3U,6U,0U}},
{MOVE_1130,{4U,6U,0U}},
{MOVE_1130,{5U,6U,0U}},
{MOVE_1130,{6U,6U,0U}},
{MOVE_1130,{7U,6U,0U}},
{MOVE_1138,{0U,6U,0U}},
{MOVE_1139,{0U,6U,0U}},
{MOVE_113A,{0U,6U,0U}},
{MOVE_113B,{0U,6U,0U}},
{MOVE_113C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1140,{0U,6U,0U}},
{MOVE_1140,{1U,6U,0U}},
{MOVE_1140,{2U,6U,0U}},
{MOVE_1140,{3U,6U,0U}},
{MOVE_1140,{4U,6U,0U}},
{MOVE_1140,{5U,6U,0U}},
{MOVE_1140,{6U,6U,0U}},
{MOVE_1140,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1150,{0U,6U,0U}},
{MOVE_1150,{1U,6U,0U}},
{MOVE_1150,{2U,6U,0U}},
{MOVE_1150,{3U,6U,0U}},
{MOVE_1150,{4U,6U,0U}},
{MOVE_1150,{5U,6U,0U}},
{MOVE_1150,{6U,6U,0U}},
{MOVE_1150,{7U,6U,0U}},
{MOVE_1158,{0U,6U,0U}},
{MOVE_1158,{1U,6U,0U}},
{MOVE_1158,{2U,6U,0U}},
{MOVE_1158,{3U,6U,0U}},
{MOVE_1158,{4U,6U,0U}},
{MOVE_1158,{5U,6U,0U}},
{MOVE_1158,{6U,6U,0U}},
{MOVE_1158,{7U,6U,0U}},
{MOVE_1160,{0U,6U,0U}},
{MOVE_1160,{1U,6U,0U}},
{MOVE_1160,{2U,6U,0U}},
{MOVE_1160,{3U,6U,0U}},
{MOVE_1160,{4U,6U,0U}},
{MOVE_1160,{5U,6U,0U}},
{MOVE_1160,{6U,6U,0U}},
{MOVE_1160,{7U,6U,0U}},
{MOVE_1168,{0U,6U,0U}},
{MOVE_1168,{1U,6U,0U}},
{MOVE_1168,{2U,6U,0U}},
{MOVE_1168,{3U,6U,0U}},
{MOVE_1168,{4U,6U,0U}},
{MOVE_1168,{5U,6U,0U}},
{MOVE_1168,{6U,6U,0U}},
{MOVE_1168,{7U,6U,0U}},
{MOVE_1170,{0U,6U,0U}},
{MOVE_1170,{1U,6U,0U}},
{MOVE_1170,{2U,6U,0U}},
{MOVE_1170,{3U,6U,0U}},
{MOVE_1170,{4U,6U,0U}},
{MOVE_1170,{5U,6U,0U}},
{MOVE_1170,{6U,6U,0U}},
{MOVE_1170,{7U,6U,0U}},
{MOVE_1178,{0U,6U,0U}},
{MOVE_1179,{0U,6U,0U}},
{MOVE_117A,{0U,6U,0U}},
{MOVE_117B,{0U,6U,0U}},
{MOVE_117C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1180,{0U,6U,0U}},
{MOVE_1180,{1U,6U,0U}},
{MOVE_1180,{2U,6U,0U}},
{MOVE_1180,{3U,6U,0U}},
{MOVE_1180,{4U,6U,0U}},
{MOVE_1180,{5U,6U,0U}},
{MOVE_1180,{6U,6U,0U}},
{MOVE_1180,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1190,{0U,6U,0U}},
{MOVE_1190,{1U,6U,0U}},
{MOVE_1190,{2U,6U,0U}},
{MOVE_1190,{3U,6U,0U}},
{MOVE_1190,{4U,6U,0U}},
{MOVE_1190,{5U,6U,0U}},
{MOVE_1190,{6U,6U,0U}},
{MOVE_1190,{7U,6U,0U}},
{MOVE_1198,{0U,6U,0U}},
{MOVE_1198,{1U,6U,0U}},
{MOVE_1198,{2U,6U,0U}},
{MOVE_1198,{3U,6U,0U}},
{MOVE_1198,{4U,6U,0U}},
{MOVE_1198,{5U,6U,0U}},
{MOVE_1198,{6U,6U,0U}},
{MOVE_1198,{7U,6U,0U}},
{MOVE_11A0,{0U,6U,0U}},
{MOVE_11A0,{1U,6U,0U}},
{MOVE_11A0,{2U,6U,0U}},
{MOVE_11A0,{3U,6U,0U}},
{MOVE_11A0,{4U,6U,0U}},
{MOVE_11A0,{5U,6U,0U}},
{MOVE_11A0,{6U,6U,0U}},
{MOVE_11A0,{7U,6U,0U}},
{MOVE_11A8,{0U,6U,0U}},
{MOVE_11A8,{1U,6U,0U}},
{MOVE_11A8,{2U,6U,0U}},
{MOVE_11A8,{3U,6U,0U}},
{MOVE_11A8,{4U,6U,0U}},
{MOVE_11A8,{5U,6U,0U}},
{MOVE_11A8,{6U,6U,0U}},
{MOVE_11A8,{7U,6U,0U}},
{MOVE_11B0,{0U,6U,0U}},
{MOVE_11B0,{1U,6U,0U}},
{MOVE_11B0,{2U,6U,0U}},
{MOVE_11B0,{3U,6U,0U}},
{MOVE_11B0,{4U,6U,0U}},
{MOVE_11B0,{5U,6U,0U}},
{MOVE_11B0,{6U,6U,0U}},
{MOVE_11B0,{7U,6U,0U}},
{MOVE_11B8,{0U,6U,0U}},
{MOVE_11B9,{0U,6U,0U}},
{MOVE_11BA,{0U,6U,0U}},
{MOVE_11BB,{0U,6U,0U}},
{MOVE_11BC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1000,{0U,7U,0U}},
{MOVE_1000,{1U,7U,0U}},
{MOVE_1000,{2U,7U,0U}},
{MOVE_1000,{3U,7U,0U}},
{MOVE_1000,{4U,7U,0U}},
{MOVE_1000,{5U,7U,0U}},
{MOVE_1000,{6U,7U,0U}},
{MOVE_1000,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1010,{0U,7U,0U}},
{MOVE_1010,{1U,7U,0U}},
{MOVE_1010,{2U,7U,0U}},
{MOVE_1010,{3U,7U,0U}},
{MOVE_1010,{4U,7U,0U}},
{MOVE_1010,{5U,7U,0U}},
{MOVE_1010,{6U,7U,0U}},
{MOVE_1010,{7U,7U,0U}},
{MOVE_1018,{0U,7U,0U}},
{MOVE_1018,{1U,7U,0U}},
{MOVE_1018,{2U,7U,0U}},
{MOVE_1018,{3U,7U,0U}},
{MOVE_1018,{4U,7U,0U}},
{MOVE_1018,{5U,7U,0U}},
{MOVE_1018,{6U,7U,0U}},
{MOVE_1018,{7U,7U,0U}},
{MOVE_1020,{0U,7U,0U}},
{MOVE_1020,{1U,7U,0U}},
{MOVE_1020,{2U,7U,0U}},
{MOVE_1020,{3U,7U,0U}},
{MOVE_1020,{4U,7U,0U}},
{MOVE_1020,{5U,7U,0U}},
{MOVE_1020,{6U,7U,0U}},
{MOVE_1020,{7U,7U,0U}},
{MOVE_1028,{0U,7U,0U}},
{MOVE_1028,{1U,7U,0U}},
{MOVE_1028,{2U,7U,0U}},
{MOVE_1028,{3U,7U,0U}},
{MOVE_1028,{4U,7U,0U}},
{MOVE_1028,{5U,7U,0U}},
{MOVE_1028,{6U,7U,0U}},
{MOVE_1028,{7U,7U,0U}},
{MOVE_1030,{0U,7U,0U}},
{MOVE_1030,{1U,7U,0U}},
{MOVE_1030,{2U,7U,0U}},
{MOVE_1030,{3U,7U,0U}},
{MOVE_1030,{4U,7U,0U}},
{MOVE_1030,{5U,7U,0U}},
{MOVE_1030,{6U,7U,0U}},
{MOVE_1030,{7U,7U,0U}},
{MOVE_1038,{0U,7U,0U}},
{MOVE_1039,{0U,7U,0U}},
{MOVE_103A,{0U,7U,0U}},
{MOVE_103B,{0U,7U,0U}},
{MOVE_103C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1080,{0U,7U,0U}},
{MOVE_1080,{1U,7U,0U}},
{MOVE_1080,{2U,7U,0U}},
{MOVE_1080,{3U,7U,0U}},
{MOVE_1080,{4U,7U,0U}},
{MOVE_1080,{5U,7U,0U}},
{MOVE_1080,{6U,7U,0U}},
{MOVE_1080,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1090,{0U,7U,0U}},
{MOVE_1090,{1U,7U,0U}},
{MOVE_1090,{2U,7U,0U}},
{MOVE_1090,{3U,7U,0U}},
{MOVE_1090,{4U,7U,0U}},
{MOVE_1090,{5U,7U,0U}},
{MOVE_1090,{6U,7U,0U}},
{MOVE_1090,{7U,7U,0U}},
{MOVE_1098,{0U,7U,0U}},
{MOVE_1098,{1U,7U,0U}},
{MOVE_1098,{2U,7U,0U}},
{MOVE_1098,{3U,7U,0U}},
{MOVE_1098,{4U,7U,0U}},
{MOVE_1098,{5U,7U,0U}},
{MOVE_1098,{6U,7U,0U}},
{MOVE_1098,{7U,7U,0U}},
{MOVE_10A0,{0U,7U,0U}},
{MOVE_10A0,{1U,7U,0U}},
{MOVE_10A0,{2U,7U,0U}},
{MOVE_10A0,{3U,7U,0U}},
{MOVE_10A0,{4U,7U,0U}},
{MOVE_10A0,{5U,7U,0U}},
{MOVE_10A0,{6U,7U,0U}},
{MOVE_10A0,{7U,7U,0U}},
{MOVE_10A8,{0U,7U,0U}},
{MOVE_10A8,{1U,7U,0U}},
{MOVE_10A8,{2U,7U,0U}},
{MOVE_10A8,{3U,7U,0U}},
{MOVE_10A8,{4U,7U,0U}},
{MOVE_10A8,{5U,7U,0U}},
{MOVE_10A8,{6U,7U,0U}},
{MOVE_10A8,{7U,7U,0U}},
{MOVE_10B0,{0U,7U,0U}},
{MOVE_10B0,{1U,7U,0U}},
{MOVE_10B0,{2U,7U,0U}},
{MOVE_10B0,{3U,7U,0U}},
{MOVE_10B0,{4U,7U,0U}},
{MOVE_10B0,{5U,7U,0U}},
{MOVE_10B0,{6U,7U,0U}},
{MOVE_10B0,{7U,7U,0U}},
{MOVE_10B8,{0U,7U,0U}},
{MOVE_10B9,{0U,7U,0U}},
{MOVE_10BA,{0U,7U,0U}},
{MOVE_10BB,{0U,7U,0U}},
{MOVE_10BC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10C0,{0U,7U,0U}},
{MOVE_10C0,{1U,7U,0U}},
{MOVE_10C0,{2U,7U,0U}},
{MOVE_10C0,{3U,7U,0U}},
{MOVE_10C0,{4U,7U,0U}},
{MOVE_10C0,{5U,7U,0U}},
{MOVE_10C0,{6U,7U,0U}},
{MOVE_10C0,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_10D0,{0U,7U,0U}},
{MOVE_10D0,{1U,7U,0U}},
{MOVE_10D0,{2U,7U,0U}},
{MOVE_10D0,{3U,7U,0U}},
{MOVE_10D0,{4U,7U,0U}},
{MOVE_10D0,{5U,7U,0U}},
{MOVE_10D0,{6U,7U,0U}},
{MOVE_10D0,{7U,7U,0U}},
{MOVE_10D8,{0U,7U,0U}},
{MOVE_10D8,{1U,7U,0U}},
{MOVE_10D8,{2U,7U,0U}},
{MOVE_10D8,{3U,7U,0U}},
{MOVE_10D8,{4U,7U,0U}},
{MOVE_10D8,{5U,7U,0U}},
{MOVE_10D8,{6U,7U,0U}},
{MOVE_10D8,{7U,7U,0U}},
{MOVE_10E0,{0U,7U,0U}},
{MOVE_10E0,{1U,7U,0U}},
{MOVE_10E0,{2U,7U,0U}},
{MOVE_10E0,{3U,7U,0U}},
{MOVE_10E0,{4U,7U,0U}},
{MOVE_10E0,{5U,7U,0U}},
{MOVE_10E0,{6U,7U,0U}},
{MOVE_10E0,{7U,7U,0U}},
{MOVE_10E8,{0U,7U,0U}},
{MOVE_10E8,{1U,7U,0U}},
{MOVE_10E8,{2U,7U,0U}},
{MOVE_10E8,{3U,7U,0U}},
{MOVE_10E8,{4U,7U,0U}},
{MOVE_10E8,{5U,7U,0U}},
{MOVE_10E8,{6U,7U,0U}},
{MOVE_10E8,{7U,7U,0U}},
{MOVE_10F0,{0U,7U,0U}},
{MOVE_10F0,{1U,7U,0U}},
{MOVE_10F0,{2U,7U,0U}},
{MOVE_10F0,{3U,7U,0U}},
{MOVE_10F0,{4U,7U,0U}},
{MOVE_10F0,{5U,7U,0U}},
{MOVE_10F0,{6U,7U,0U}},
{MOVE_10F0,{7U,7U,0U}},
{MOVE_10F8,{0U,7U,0U}},
{MOVE_10F9,{0U,7U,0U}},
{MOVE_10FA,{0U,7U,0U}},
{MOVE_10FB,{0U,7U,0U}},
{MOVE_10FC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1100,{0U,7U,0U}},
{MOVE_1100,{1U,7U,0U}},
{MOVE_1100,{2U,7U,0U}},
{MOVE_1100,{3U,7U,0U}},
{MOVE_1100,{4U,7U,0U}},
{MOVE_1100,{5U,7U,0U}},
{MOVE_1100,{6U,7U,0U}},
{MOVE_1100,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1110,{0U,7U,0U}},
{MOVE_1110,{1U,7U,0U}},
{MOVE_1110,{2U,7U,0U}},
{MOVE_1110,{3U,7U,0U}},
{MOVE_1110,{4U,7U,0U}},
{MOVE_1110,{5U,7U,0U}},
{MOVE_1110,{6U,7U,0U}},
{MOVE_1110,{7U,7U,0U}},
{MOVE_1118,{0U,7U,0U}},
{MOVE_1118,{1U,7U,0U}},
{MOVE_1118,{2U,7U,0U}},
{MOVE_1118,{3U,7U,0U}},
{MOVE_1118,{4U,7U,0U}},
{MOVE_1118,{5U,7U,0U}},
{MOVE_1118,{6U,7U,0U}},
{MOVE_1118,{7U,7U,0U}},
{MOVE_1120,{0U,7U,0U}},
{MOVE_1120,{1U,7U,0U}},
{MOVE_1120,{2U,7U,0U}},
{MOVE_1120,{3U,7U,0U}},
{MOVE_1120,{4U,7U,0U}},
{MOVE_1120,{5U,7U,0U}},
{MOVE_1120,{6U,7U,0U}},
{MOVE_1120,{7U,7U,0U}},
{MOVE_1128,{0U,7U,0U}},
{MOVE_1128,{1U,7U,0U}},
{MOVE_1128,{2U,7U,0U}},
{MOVE_1128,{3U,7U,0U}},
{MOVE_1128,{4U,7U,0U}},
{MOVE_1128,{5U,7U,0U}},
{MOVE_1128,{6U,7U,0U}},
{MOVE_1128,{7U,7U,0U}},
{MOVE_1130,{0U,7U,0U}},
{MOVE_1130,{1U,7U,0U}},
{MOVE_1130,{2U,7U,0U}},
{MOVE_1130,{3U,7U,0U}},
{MOVE_1130,{4U,7U,0U}},
{MOVE_1130,{5U,7U,0U}},
{MOVE_1130,{6U,7U,0U}},
{MOVE_1130,{7U,7U,0U}},
{MOVE_1138,{0U,7U,0U}},
{MOVE_1139,{0U,7U,0U}},
{MOVE_113A,{0U,7U,0U}},
{MOVE_113B,{0U,7U,0U}},
{MOVE_113C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1140,{0U,7U,0U}},
{MOVE_1140,{1U,7U,0U}},
{MOVE_1140,{2U,7U,0U}},
{MOVE_1140,{3U,7U,0U}},
{MOVE_1140,{4U,7U,0U}},
{MOVE_1140,{5U,7U,0U}},
{MOVE_1140,{6U,7U,0U}},
{MOVE_1140,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1150,{0U,7U,0U}},
{MOVE_1150,{1U,7U,0U}},
{MOVE_1150,{2U,7U,0U}},
{MOVE_1150,{3U,7U,0U}},
{MOVE_1150,{4U,7U,0U}},
{MOVE_1150,{5U,7U,0U}},
{MOVE_1150,{6U,7U,0U}},
{MOVE_1150,{7U,7U,0U}},
{MOVE_1158,{0U,7U,0U}},
{MOVE_1158,{1U,7U,0U}},
{MOVE_1158,{2U,7U,0U}},
{MOVE_1158,{3U,7U,0U}},
{MOVE_1158,{4U,7U,0U}},
{MOVE_1158,{5U,7U,0U}},
{MOVE_1158,{6U,7U,0U}},
{MOVE_1158,{7U,7U,0U}},
{MOVE_1160,{0U,7U,0U}},
{MOVE_1160,{1U,7U,0U}},
{MOVE_1160,{2U,7U,0U}},
{MOVE_1160,{3U,7U,0U}},
{MOVE_1160,{4U,7U,0U}},
{MOVE_1160,{5U,7U,0U}},
{MOVE_1160,{6U,7U,0U}},
{MOVE_1160,{7U,7U,0U}},
{MOVE_1168,{0U,7U,0U}},
{MOVE_1168,{1U,7U,0U}},
{MOVE_1168,{2U,7U,0U}},
{MOVE_1168,{3U,7U,0U}},
{MOVE_1168,{4U,7U,0U}},
{MOVE_1168,{5U,7U,0U}},
{MOVE_1168,{6U,7U,0U}},
{MOVE_1168,{7U,7U,0U}},
{MOVE_1170,{0U,7U,0U}},
{MOVE_1170,{1U,7U,0U}},
{MOVE_1170,{2U,7U,0U}},
{MOVE_1170,{3U,7U,0U}},
{MOVE_1170,{4U,7U,0U}},
{MOVE_1170,{5U,7U,0U}},
{MOVE_1170,{6U,7U,0U}},
{MOVE_1170,{7U,7U,0U}},
{MOVE_1178,{0U,7U,0U}},
{MOVE_1179,{0U,7U,0U}},
{MOVE_117A,{0U,7U,0U}},
{MOVE_117B,{0U,7U,0U}},
{MOVE_117C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1180,{0U,7U,0U}},
{MOVE_1180,{1U,7U,0U}},
{MOVE_1180,{2U,7U,0U}},
{MOVE_1180,{3U,7U,0U}},
{MOVE_1180,{4U,7U,0U}},
{MOVE_1180,{5U,7U,0U}},
{MOVE_1180,{6U,7U,0U}},
{MOVE_1180,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_1190,{0U,7U,0U}},
{MOVE_1190,{1U,7U,0U}},
{MOVE_1190,{2U,7U,0U}},
{MOVE_1190,{3U,7U,0U}},
{MOVE_1190,{4U,7U,0U}},
{MOVE_1190,{5U,7U,0U}},
{MOVE_1190,{6U,7U,0U}},
{MOVE_1190,{7U,7U,0U}},
{MOVE_1198,{0U,7U,0U}},
{MOVE_1198,{1U,7U,0U}},
{MOVE_1198,{2U,7U,0U}},
{MOVE_1198,{3U,7U,0U}},
{MOVE_1198,{4U,7U,0U}},
{MOVE_1198,{5U,7U,0U}},
{MOVE_1198,{6U,7U,0U}},
{MOVE_1198,{7U,7U,0U}},
{MOVE_11A0,{0U,7U,0U}},
{MOVE_11A0,{1U,7U,0U}},
{MOVE_11A0,{2U,7U,0U}},
{MOVE_11A0,{3U,7U,0U}},
{MOVE_11A0,{4U,7U,0U}},
{MOVE_11A0,{5U,7U,0U}},
{MOVE_11A0,{6U,7U,0U}},
{MOVE_11A0,{7U,7U,0U}},
{MOVE_11A8,{0U,7U,0U}},
{MOVE_11A8,{1U,7U,0U}},
{MOVE_11A8,{2U,7U,0U}},
{MOVE_11A8,{3U,7U,0U}},
{MOVE_11A8,{4U,7U,0U}},
{MOVE_11A8,{5U,7U,0U}},
{MOVE_11A8,{6U,7U,0U}},
{MOVE_11A8,{7U,7U,0U}},
{MOVE_11B0,{0U,7U,0U}},
{MOVE_11B0,{1U,7U,0U}},
{MOVE_11B0,{2U,7U,0U}},
{MOVE_11B0,{3U,7U,0U}},
{MOVE_11B0,{4U,7U,0U}},
{MOVE_11B0,{5U,7U,0U}},
{MOVE_11B0,{6U,7U,0U}},
{MOVE_11B0,{7U,7U,0U}},
{MOVE_11B8,{0U,7U,0U}},
{MOVE_11B9,{0U,7U,0U}},
{MOVE_11BA,{0U,7U,0U}},
{MOVE_11BB,{0U,7U,0U}},
{MOVE_11BC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2000,{0U,0U,0U}},
{MOVE_2000,{1U,0U,0U}},
{MOVE_2000,{2U,0U,0U}},
{MOVE_2000,{3U,0U,0U}},
{MOVE_2000,{4U,0U,0U}},
{MOVE_2000,{5U,0U,0U}},
{MOVE_2000,{6U,0U,0U}},
{MOVE_2000,{7U,0U,0U}},
{MOVE_2008,{0U,0U,0U}},
{MOVE_2008,{1U,0U,0U}},
{MOVE_2008,{2U,0U,0U}},
{MOVE_2008,{3U,0U,0U}},
{MOVE_2008,{4U,0U,0U}},
{MOVE_2008,{5U,0U,0U}},
{MOVE_2008,{6U,0U,0U}},
{MOVE_2008,{7U,0U,0U}},
{MOVE_2010,{0U,0U,0U}},
{MOVE_2010,{1U,0U,0U}},
{MOVE_2010,{2U,0U,0U}},
{MOVE_2010,{3U,0U,0U}},
{MOVE_2010,{4U,0U,0U}},
{MOVE_2010,{5U,0U,0U}},
{MOVE_2010,{6U,0U,0U}},
{MOVE_2010,{7U,0U,0U}},
{MOVE_2018,{0U,0U,0U}},
{MOVE_2018,{1U,0U,0U}},
{MOVE_2018,{2U,0U,0U}},
{MOVE_2018,{3U,0U,0U}},
{MOVE_2018,{4U,0U,0U}},
{MOVE_2018,{5U,0U,0U}},
{MOVE_2018,{6U,0U,0U}},
{MOVE_2018,{7U,0U,0U}},
{MOVE_2020,{0U,0U,0U}},
{MOVE_2020,{1U,0U,0U}},
{MOVE_2020,{2U,0U,0U}},
{MOVE_2020,{3U,0U,0U}},
{MOVE_2020,{4U,0U,0U}},
{MOVE_2020,{5U,0U,0U}},
{MOVE_2020,{6U,0U,0U}},
{MOVE_2020,{7U,0U,0U}},
{MOVE_2028,{0U,0U,0U}},
{MOVE_2028,{1U,0U,0U}},
{MOVE_2028,{2U,0U,0U}},
{MOVE_2028,{3U,0U,0U}},
{MOVE_2028,{4U,0U,0U}},
{MOVE_2028,{5U,0U,0U}},
{MOVE_2028,{6U,0U,0U}},
{MOVE_2028,{7U,0U,0U}},
{MOVE_2030,{0U,0U,0U}},
{MOVE_2030,{1U,0U,0U}},
{MOVE_2030,{2U,0U,0U}},
{MOVE_2030,{3U,0U,0U}},
{MOVE_2030,{4U,0U,0U}},
{MOVE_2030,{5U,0U,0U}},
{MOVE_2030,{6U,0U,0U}},
{MOVE_2030,{7U,0U,0U}},
{MOVE_2038,{0U,0U,0U}},
{MOVE_2039,{0U,0U,0U}},
{MOVE_203A,{0U,0U,0U}},
{MOVE_203B,{0U,0U,0U}},
{MOVE_203C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_2040,{0U,0U,0U}},
{MOVEA_2040,{1U,0U,0U}},
{MOVEA_2040,{2U,0U,0U}},
{MOVEA_2040,{3U,0U,0U}},
{MOVEA_2040,{4U,0U,0U}},
{MOVEA_2040,{5U,0U,0U}},
{MOVEA_2040,{6U,0U,0U}},
{MOVEA_2040,{7U,0U,0U}},
{MOVEA_2048,{0U,0U,0U}},
{MOVEA_2048,{1U,0U,0U}},
{MOVEA_2048,{2U,0U,0U}},
{MOVEA_2048,{3U,0U,0U}},
{MOVEA_2048,{4U,0U,0U}},
{MOVEA_2048,{5U,0U,0U}},
{MOVEA_2048,{6U,0U,0U}},
{MOVEA_2048,{7U,0U,0U}},
{MOVEA_2050,{0U,0U,0U}},
{MOVEA_2050,{1U,0U,0U}},
{MOVEA_2050,{2U,0U,0U}},
{MOVEA_2050,{3U,0U,0U}},
{MOVEA_2050,{4U,0U,0U}},
{MOVEA_2050,{5U,0U,0U}},
{MOVEA_2050,{6U,0U,0U}},
{MOVEA_2050,{7U,0U,0U}},
{MOVEA_2058,{0U,0U,0U}},
{MOVEA_2058,{1U,0U,0U}},
{MOVEA_2058,{2U,0U,0U}},
{MOVEA_2058,{3U,0U,0U}},
{MOVEA_2058,{4U,0U,0U}},
{MOVEA_2058,{5U,0U,0U}},
{MOVEA_2058,{6U,0U,0U}},
{MOVEA_2058,{7U,0U,0U}},
{MOVEA_2060,{0U,0U,0U}},
{MOVEA_2060,{1U,0U,0U}},
{MOVEA_2060,{2U,0U,0U}},
{MOVEA_2060,{3U,0U,0U}},
{MOVEA_2060,{4U,0U,0U}},
{MOVEA_2060,{5U,0U,0U}},
{MOVEA_2060,{6U,0U,0U}},
{MOVEA_2060,{7U,0U,0U}},
{MOVEA_2068,{0U,0U,0U}},
{MOVEA_2068,{1U,0U,0U}},
{MOVEA_2068,{2U,0U,0U}},
{MOVEA_2068,{3U,0U,0U}},
{MOVEA_2068,{4U,0U,0U}},
{MOVEA_2068,{5U,0U,0U}},
{MOVEA_2068,{6U,0U,0U}},
{MOVEA_2068,{7U,0U,0U}},
{MOVEA_2070,{0U,0U,0U}},
{MOVEA_2070,{1U,0U,0U}},
{MOVEA_2070,{2U,0U,0U}},
{MOVEA_2070,{3U,0U,0U}},
{MOVEA_2070,{4U,0U,0U}},
{MOVEA_2070,{5U,0U,0U}},
{MOVEA_2070,{6U,0U,0U}},
{MOVEA_2070,{7U,0U,0U}},
{MOVEA_2078,{0U,0U,0U}},
{MOVEA_2079,{0U,0U,0U}},
{MOVEA_207A,{0U,0U,0U}},
{MOVEA_207B,{0U,0U,0U}},
{MOVEA_207C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2080,{0U,0U,0U}},
{MOVE_2080,{1U,0U,0U}},
{MOVE_2080,{2U,0U,0U}},
{MOVE_2080,{3U,0U,0U}},
{MOVE_2080,{4U,0U,0U}},
{MOVE_2080,{5U,0U,0U}},
{MOVE_2080,{6U,0U,0U}},
{MOVE_2080,{7U,0U,0U}},
{MOVE_2088,{0U,0U,0U}},
{MOVE_2088,{1U,0U,0U}},
{MOVE_2088,{2U,0U,0U}},
{MOVE_2088,{3U,0U,0U}},
{MOVE_2088,{4U,0U,0U}},
{MOVE_2088,{5U,0U,0U}},
{MOVE_2088,{6U,0U,0U}},
{MOVE_2088,{7U,0U,0U}},
{MOVE_2090,{0U,0U,0U}},
{MOVE_2090,{1U,0U,0U}},
{MOVE_2090,{2U,0U,0U}},
{MOVE_2090,{3U,0U,0U}},
{MOVE_2090,{4U,0U,0U}},
{MOVE_2090,{5U,0U,0U}},
{MOVE_2090,{6U,0U,0U}},
{MOVE_2090,{7U,0U,0U}},
{MOVE_2098,{0U,0U,0U}},
{MOVE_2098,{1U,0U,0U}},
{MOVE_2098,{2U,0U,0U}},
{MOVE_2098,{3U,0U,0U}},
{MOVE_2098,{4U,0U,0U}},
{MOVE_2098,{5U,0U,0U}},
{MOVE_2098,{6U,0U,0U}},
{MOVE_2098,{7U,0U,0U}},
{MOVE_20A0,{0U,0U,0U}},
{MOVE_20A0,{1U,0U,0U}},
{MOVE_20A0,{2U,0U,0U}},
{MOVE_20A0,{3U,0U,0U}},
{MOVE_20A0,{4U,0U,0U}},
{MOVE_20A0,{5U,0U,0U}},
{MOVE_20A0,{6U,0U,0U}},
{MOVE_20A0,{7U,0U,0U}},
{MOVE_20A8,{0U,0U,0U}},
{MOVE_20A8,{1U,0U,0U}},
{MOVE_20A8,{2U,0U,0U}},
{MOVE_20A8,{3U,0U,0U}},
{MOVE_20A8,{4U,0U,0U}},
{MOVE_20A8,{5U,0U,0U}},
{MOVE_20A8,{6U,0U,0U}},
{MOVE_20A8,{7U,0U,0U}},
{MOVE_20B0,{0U,0U,0U}},
{MOVE_20B0,{1U,0U,0U}},
{MOVE_20B0,{2U,0U,0U}},
{MOVE_20B0,{3U,0U,0U}},
{MOVE_20B0,{4U,0U,0U}},
{MOVE_20B0,{5U,0U,0U}},
{MOVE_20B0,{6U,0U,0U}},
{MOVE_20B0,{7U,0U,0U}},
{MOVE_20B8,{0U,0U,0U}},
{MOVE_20B9,{0U,0U,0U}},
{MOVE_20BA,{0U,0U,0U}},
{MOVE_20BB,{0U,0U,0U}},
{MOVE_20BC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_20C0,{0U,0U,0U}},
{MOVE_20C0,{1U,0U,0U}},
{MOVE_20C0,{2U,0U,0U}},
{MOVE_20C0,{3U,0U,0U}},
{MOVE_20C0,{4U,0U,0U}},
{MOVE_20C0,{5U,0U,0U}},
{MOVE_20C0,{6U,0U,0U}},
{MOVE_20C0,{7U,0U,0U}},
{MOVE_20C8,{0U,0U,0U}},
{MOVE_20C8,{1U,0U,0U}},
{MOVE_20C8,{2U,0U,0U}},
{MOVE_20C8,{3U,0U,0U}},
{MOVE_20C8,{4U,0U,0U}},
{MOVE_20C8,{5U,0U,0U}},
{MOVE_20C8,{6U,0U,0U}},
{MOVE_20C8,{7U,0U,0U}},
{MOVE_20D0,{0U,0U,0U}},
{MOVE_20D0,{1U,0U,0U}},
{MOVE_20D0,{2U,0U,0U}},
{MOVE_20D0,{3U,0U,0U}},
{MOVE_20D0,{4U,0U,0U}},
{MOVE_20D0,{5U,0U,0U}},
{MOVE_20D0,{6U,0U,0U}},
{MOVE_20D0,{7U,0U,0U}},
{MOVE_20D8,{0U,0U,0U}},
{MOVE_20D8,{1U,0U,0U}},
{MOVE_20D8,{2U,0U,0U}},
{MOVE_20D8,{3U,0U,0U}},
{MOVE_20D8,{4U,0U,0U}},
{MOVE_20D8,{5U,0U,0U}},
{MOVE_20D8,{6U,0U,0U}},
{MOVE_20D8,{7U,0U,0U}},
{MOVE_20E0,{0U,0U,0U}},
{MOVE_20E0,{1U,0U,0U}},
{MOVE_20E0,{2U,0U,0U}},
{MOVE_20E0,{3U,0U,0U}},
{MOVE_20E0,{4U,0U,0U}},
{MOVE_20E0,{5U,0U,0U}},
{MOVE_20E0,{6U,0U,0U}},
{MOVE_20E0,{7U,0U,0U}},
{MOVE_20E8,{0U,0U,0U}},
{MOVE_20E8,{1U,0U,0U}},
{MOVE_20E8,{2U,0U,0U}},
{MOVE_20E8,{3U,0U,0U}},
{MOVE_20E8,{4U,0U,0U}},
{MOVE_20E8,{5U,0U,0U}},
{MOVE_20E8,{6U,0U,0U}},
{MOVE_20E8,{7U,0U,0U}},
{MOVE_20F0,{0U,0U,0U}},
{MOVE_20F0,{1U,0U,0U}},
{MOVE_20F0,{2U,0U,0U}},
{MOVE_20F0,{3U,0U,0U}},
{MOVE_20F0,{4U,0U,0U}},
{MOVE_20F0,{5U,0U,0U}},
{MOVE_20F0,{6U,0U,0U}},
{MOVE_20F0,{7U,0U,0U}},
{MOVE_20F8,{0U,0U,0U}},
{MOVE_20F9,{0U,0U,0U}},
{MOVE_20FA,{0U,0U,0U}},
{MOVE_20FB,{0U,0U,0U}},
{MOVE_20FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2100,{0U,0U,0U}},
{MOVE_2100,{1U,0U,0U}},
{MOVE_2100,{2U,0U,0U}},
{MOVE_2100,{3U,0U,0U}},
{MOVE_2100,{4U,0U,0U}},
{MOVE_2100,{5U,0U,0U}},
{MOVE_2100,{6U,0U,0U}},
{MOVE_2100,{7U,0U,0U}},
{MOVE_2108,{0U,0U,0U}},
{MOVE_2108,{1U,0U,0U}},
{MOVE_2108,{2U,0U,0U}},
{MOVE_2108,{3U,0U,0U}},
{MOVE_2108,{4U,0U,0U}},
{MOVE_2108,{5U,0U,0U}},
{MOVE_2108,{6U,0U,0U}},
{MOVE_2108,{7U,0U,0U}},
{MOVE_2110,{0U,0U,0U}},
{MOVE_2110,{1U,0U,0U}},
{MOVE_2110,{2U,0U,0U}},
{MOVE_2110,{3U,0U,0U}},
{MOVE_2110,{4U,0U,0U}},
{MOVE_2110,{5U,0U,0U}},
{MOVE_2110,{6U,0U,0U}},
{MOVE_2110,{7U,0U,0U}},
{MOVE_2118,{0U,0U,0U}},
{MOVE_2118,{1U,0U,0U}},
{MOVE_2118,{2U,0U,0U}},
{MOVE_2118,{3U,0U,0U}},
{MOVE_2118,{4U,0U,0U}},
{MOVE_2118,{5U,0U,0U}},
{MOVE_2118,{6U,0U,0U}},
{MOVE_2118,{7U,0U,0U}},
{MOVE_2120,{0U,0U,0U}},
{MOVE_2120,{1U,0U,0U}},
{MOVE_2120,{2U,0U,0U}},
{MOVE_2120,{3U,0U,0U}},
{MOVE_2120,{4U,0U,0U}},
{MOVE_2120,{5U,0U,0U}},
{MOVE_2120,{6U,0U,0U}},
{MOVE_2120,{7U,0U,0U}},
{MOVE_2128,{0U,0U,0U}},
{MOVE_2128,{1U,0U,0U}},
{MOVE_2128,{2U,0U,0U}},
{MOVE_2128,{3U,0U,0U}},
{MOVE_2128,{4U,0U,0U}},
{MOVE_2128,{5U,0U,0U}},
{MOVE_2128,{6U,0U,0U}},
{MOVE_2128,{7U,0U,0U}},
{MOVE_2130,{0U,0U,0U}},
{MOVE_2130,{1U,0U,0U}},
{MOVE_2130,{2U,0U,0U}},
{MOVE_2130,{3U,0U,0U}},
{MOVE_2130,{4U,0U,0U}},
{MOVE_2130,{5U,0U,0U}},
{MOVE_2130,{6U,0U,0U}},
{MOVE_2130,{7U,0U,0U}},
{MOVE_2138,{0U,0U,0U}},
{MOVE_2139,{0U,0U,0U}},
{MOVE_213A,{0U,0U,0U}},
{MOVE_213B,{0U,0U,0U}},
{MOVE_213C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2140,{0U,0U,0U}},
{MOVE_2140,{1U,0U,0U}},
{MOVE_2140,{2U,0U,0U}},
{MOVE_2140,{3U,0U,0U}},
{MOVE_2140,{4U,0U,0U}},
{MOVE_2140,{5U,0U,0U}},
{MOVE_2140,{6U,0U,0U}},
{MOVE_2140,{7U,0U,0U}},
{MOVE_2148,{0U,0U,0U}},
{MOVE_2148,{1U,0U,0U}},
{MOVE_2148,{2U,0U,0U}},
{MOVE_2148,{3U,0U,0U}},
{MOVE_2148,{4U,0U,0U}},
{MOVE_2148,{5U,0U,0U}},
{MOVE_2148,{6U,0U,0U}},
{MOVE_2148,{7U,0U,0U}},
{MOVE_2150,{0U,0U,0U}},
{MOVE_2150,{1U,0U,0U}},
{MOVE_2150,{2U,0U,0U}},
{MOVE_2150,{3U,0U,0U}},
{MOVE_2150,{4U,0U,0U}},
{MOVE_2150,{5U,0U,0U}},
{MOVE_2150,{6U,0U,0U}},
{MOVE_2150,{7U,0U,0U}},
{MOVE_2158,{0U,0U,0U}},
{MOVE_2158,{1U,0U,0U}},
{MOVE_2158,{2U,0U,0U}},
{MOVE_2158,{3U,0U,0U}},
{MOVE_2158,{4U,0U,0U}},
{MOVE_2158,{5U,0U,0U}},
{MOVE_2158,{6U,0U,0U}},
{MOVE_2158,{7U,0U,0U}},
{MOVE_2160,{0U,0U,0U}},
{MOVE_2160,{1U,0U,0U}},
{MOVE_2160,{2U,0U,0U}},
{MOVE_2160,{3U,0U,0U}},
{MOVE_2160,{4U,0U,0U}},
{MOVE_2160,{5U,0U,0U}},
{MOVE_2160,{6U,0U,0U}},
{MOVE_2160,{7U,0U,0U}},
{MOVE_2168,{0U,0U,0U}},
{MOVE_2168,{1U,0U,0U}},
{MOVE_2168,{2U,0U,0U}},
{MOVE_2168,{3U,0U,0U}},
{MOVE_2168,{4U,0U,0U}},
{MOVE_2168,{5U,0U,0U}},
{MOVE_2168,{6U,0U,0U}},
{MOVE_2168,{7U,0U,0U}},
{MOVE_2170,{0U,0U,0U}},
{MOVE_2170,{1U,0U,0U}},
{MOVE_2170,{2U,0U,0U}},
{MOVE_2170,{3U,0U,0U}},
{MOVE_2170,{4U,0U,0U}},
{MOVE_2170,{5U,0U,0U}},
{MOVE_2170,{6U,0U,0U}},
{MOVE_2170,{7U,0U,0U}},
{MOVE_2178,{0U,0U,0U}},
{MOVE_2179,{0U,0U,0U}},
{MOVE_217A,{0U,0U,0U}},
{MOVE_217B,{0U,0U,0U}},
{MOVE_217C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2180,{0U,0U,0U}},
{MOVE_2180,{1U,0U,0U}},
{MOVE_2180,{2U,0U,0U}},
{MOVE_2180,{3U,0U,0U}},
{MOVE_2180,{4U,0U,0U}},
{MOVE_2180,{5U,0U,0U}},
{MOVE_2180,{6U,0U,0U}},
{MOVE_2180,{7U,0U,0U}},
{MOVE_2188,{0U,0U,0U}},
{MOVE_2188,{1U,0U,0U}},
{MOVE_2188,{2U,0U,0U}},
{MOVE_2188,{3U,0U,0U}},
{MOVE_2188,{4U,0U,0U}},
{MOVE_2188,{5U,0U,0U}},
{MOVE_2188,{6U,0U,0U}},
{MOVE_2188,{7U,0U,0U}},
{MOVE_2190,{0U,0U,0U}},
{MOVE_2190,{1U,0U,0U}},
{MOVE_2190,{2U,0U,0U}},
{MOVE_2190,{3U,0U,0U}},
{MOVE_2190,{4U,0U,0U}},
{MOVE_2190,{5U,0U,0U}},
{MOVE_2190,{6U,0U,0U}},
{MOVE_2190,{7U,0U,0U}},
{MOVE_2198,{0U,0U,0U}},
{MOVE_2198,{1U,0U,0U}},
{MOVE_2198,{2U,0U,0U}},
{MOVE_2198,{3U,0U,0U}},
{MOVE_2198,{4U,0U,0U}},
{MOVE_2198,{5U,0U,0U}},
{MOVE_2198,{6U,0U,0U}},
{MOVE_2198,{7U,0U,0U}},
{MOVE_21A0,{0U,0U,0U}},
{MOVE_21A0,{1U,0U,0U}},
{MOVE_21A0,{2U,0U,0U}},
{MOVE_21A0,{3U,0U,0U}},
{MOVE_21A0,{4U,0U,0U}},
{MOVE_21A0,{5U,0U,0U}},
{MOVE_21A0,{6U,0U,0U}},
{MOVE_21A0,{7U,0U,0U}},
{MOVE_21A8,{0U,0U,0U}},
{MOVE_21A8,{1U,0U,0U}},
{MOVE_21A8,{2U,0U,0U}},
{MOVE_21A8,{3U,0U,0U}},
{MOVE_21A8,{4U,0U,0U}},
{MOVE_21A8,{5U,0U,0U}},
{MOVE_21A8,{6U,0U,0U}},
{MOVE_21A8,{7U,0U,0U}},
{MOVE_21B0,{0U,0U,0U}},
{MOVE_21B0,{1U,0U,0U}},
{MOVE_21B0,{2U,0U,0U}},
{MOVE_21B0,{3U,0U,0U}},
{MOVE_21B0,{4U,0U,0U}},
{MOVE_21B0,{5U,0U,0U}},
{MOVE_21B0,{6U,0U,0U}},
{MOVE_21B0,{7U,0U,0U}},
{MOVE_21B8,{0U,0U,0U}},
{MOVE_21B9,{0U,0U,0U}},
{MOVE_21BA,{0U,0U,0U}},
{MOVE_21BB,{0U,0U,0U}},
{MOVE_21BC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_21C0,{0U,0U,0U}},
{MOVE_21C0,{1U,0U,0U}},
{MOVE_21C0,{2U,0U,0U}},
{MOVE_21C0,{3U,0U,0U}},
{MOVE_21C0,{4U,0U,0U}},
{MOVE_21C0,{5U,0U,0U}},
{MOVE_21C0,{6U,0U,0U}},
{MOVE_21C0,{7U,0U,0U}},
{MOVE_21C8,{0U,0U,0U}},
{MOVE_21C8,{1U,0U,0U}},
{MOVE_21C8,{2U,0U,0U}},
{MOVE_21C8,{3U,0U,0U}},
{MOVE_21C8,{4U,0U,0U}},
{MOVE_21C8,{5U,0U,0U}},
{MOVE_21C8,{6U,0U,0U}},
{MOVE_21C8,{7U,0U,0U}},
{MOVE_21D0,{0U,0U,0U}},
{MOVE_21D0,{1U,0U,0U}},
{MOVE_21D0,{2U,0U,0U}},
{MOVE_21D0,{3U,0U,0U}},
{MOVE_21D0,{4U,0U,0U}},
{MOVE_21D0,{5U,0U,0U}},
{MOVE_21D0,{6U,0U,0U}},
{MOVE_21D0,{7U,0U,0U}},
{MOVE_21D8,{0U,0U,0U}},
{MOVE_21D8,{1U,0U,0U}},
{MOVE_21D8,{2U,0U,0U}},
{MOVE_21D8,{3U,0U,0U}},
{MOVE_21D8,{4U,0U,0U}},
{MOVE_21D8,{5U,0U,0U}},
{MOVE_21D8,{6U,0U,0U}},
{MOVE_21D8,{7U,0U,0U}},
{MOVE_21E0,{0U,0U,0U}},
{MOVE_21E0,{1U,0U,0U}},
{MOVE_21E0,{2U,0U,0U}},
{MOVE_21E0,{3U,0U,0U}},
{MOVE_21E0,{4U,0U,0U}},
{MOVE_21E0,{5U,0U,0U}},
{MOVE_21E0,{6U,0U,0U}},
{MOVE_21E0,{7U,0U,0U}},
{MOVE_21E8,{0U,0U,0U}},
{MOVE_21E8,{1U,0U,0U}},
{MOVE_21E8,{2U,0U,0U}},
{MOVE_21E8,{3U,0U,0U}},
{MOVE_21E8,{4U,0U,0U}},
{MOVE_21E8,{5U,0U,0U}},
{MOVE_21E8,{6U,0U,0U}},
{MOVE_21E8,{7U,0U,0U}},
{MOVE_21F0,{0U,0U,0U}},
{MOVE_21F0,{1U,0U,0U}},
{MOVE_21F0,{2U,0U,0U}},
{MOVE_21F0,{3U,0U,0U}},
{MOVE_21F0,{4U,0U,0U}},
{MOVE_21F0,{5U,0U,0U}},
{MOVE_21F0,{6U,0U,0U}},
{MOVE_21F0,{7U,0U,0U}},
{MOVE_21F8,{0U,0U,0U}},
{MOVE_21F9,{0U,0U,0U}},
{MOVE_21FA,{0U,0U,0U}},
{MOVE_21FB,{0U,0U,0U}},
{MOVE_21FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2000,{0U,1U,0U}},
{MOVE_2000,{1U,1U,0U}},
{MOVE_2000,{2U,1U,0U}},
{MOVE_2000,{3U,1U,0U}},
{MOVE_2000,{4U,1U,0U}},
{MOVE_2000,{5U,1U,0U}},
{MOVE_2000,{6U,1U,0U}},
{MOVE_2000,{7U,1U,0U}},
{MOVE_2008,{0U,1U,0U}},
{MOVE_2008,{1U,1U,0U}},
{MOVE_2008,{2U,1U,0U}},
{MOVE_2008,{3U,1U,0U}},
{MOVE_2008,{4U,1U,0U}},
{MOVE_2008,{5U,1U,0U}},
{MOVE_2008,{6U,1U,0U}},
{MOVE_2008,{7U,1U,0U}},
{MOVE_2010,{0U,1U,0U}},
{MOVE_2010,{1U,1U,0U}},
{MOVE_2010,{2U,1U,0U}},
{MOVE_2010,{3U,1U,0U}},
{MOVE_2010,{4U,1U,0U}},
{MOVE_2010,{5U,1U,0U}},
{MOVE_2010,{6U,1U,0U}},
{MOVE_2010,{7U,1U,0U}},
{MOVE_2018,{0U,1U,0U}},
{MOVE_2018,{1U,1U,0U}},
{MOVE_2018,{2U,1U,0U}},
{MOVE_2018,{3U,1U,0U}},
{MOVE_2018,{4U,1U,0U}},
{MOVE_2018,{5U,1U,0U}},
{MOVE_2018,{6U,1U,0U}},
{MOVE_2018,{7U,1U,0U}},
{MOVE_2020,{0U,1U,0U}},
{MOVE_2020,{1U,1U,0U}},
{MOVE_2020,{2U,1U,0U}},
{MOVE_2020,{3U,1U,0U}},
{MOVE_2020,{4U,1U,0U}},
{MOVE_2020,{5U,1U,0U}},
{MOVE_2020,{6U,1U,0U}},
{MOVE_2020,{7U,1U,0U}},
{MOVE_2028,{0U,1U,0U}},
{MOVE_2028,{1U,1U,0U}},
{MOVE_2028,{2U,1U,0U}},
{MOVE_2028,{3U,1U,0U}},
{MOVE_2028,{4U,1U,0U}},
{MOVE_2028,{5U,1U,0U}},
{MOVE_2028,{6U,1U,0U}},
{MOVE_2028,{7U,1U,0U}},
{MOVE_2030,{0U,1U,0U}},
{MOVE_2030,{1U,1U,0U}},
{MOVE_2030,{2U,1U,0U}},
{MOVE_2030,{3U,1U,0U}},
{MOVE_2030,{4U,1U,0U}},
{MOVE_2030,{5U,1U,0U}},
{MOVE_2030,{6U,1U,0U}},
{MOVE_2030,{7U,1U,0U}},
{MOVE_2038,{0U,1U,0U}},
{MOVE_2039,{0U,1U,0U}},
{MOVE_203A,{0U,1U,0U}},
{MOVE_203B,{0U,1U,0U}},
{MOVE_203C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_2040,{0U,1U,0U}},
{MOVEA_2040,{1U,1U,0U}},
{MOVEA_2040,{2U,1U,0U}},
{MOVEA_2040,{3U,1U,0U}},
{MOVEA_2040,{4U,1U,0U}},
{MOVEA_2040,{5U,1U,0U}},
{MOVEA_2040,{6U,1U,0U}},
{MOVEA_2040,{7U,1U,0U}},
{MOVEA_2048,{0U,1U,0U}},
{MOVEA_2048,{1U,1U,0U}},
{MOVEA_2048,{2U,1U,0U}},
{MOVEA_2048,{3U,1U,0U}},
{MOVEA_2048,{4U,1U,0U}},
{MOVEA_2048,{5U,1U,0U}},
{MOVEA_2048,{6U,1U,0U}},
{MOVEA_2048,{7U,1U,0U}},
{MOVEA_2050,{0U,1U,0U}},
{MOVEA_2050,{1U,1U,0U}},
{MOVEA_2050,{2U,1U,0U}},
{MOVEA_2050,{3U,1U,0U}},
{MOVEA_2050,{4U,1U,0U}},
{MOVEA_2050,{5U,1U,0U}},
{MOVEA_2050,{6U,1U,0U}},
{MOVEA_2050,{7U,1U,0U}},
{MOVEA_2058,{0U,1U,0U}},
{MOVEA_2058,{1U,1U,0U}},
{MOVEA_2058,{2U,1U,0U}},
{MOVEA_2058,{3U,1U,0U}},
{MOVEA_2058,{4U,1U,0U}},
{MOVEA_2058,{5U,1U,0U}},
{MOVEA_2058,{6U,1U,0U}},
{MOVEA_2058,{7U,1U,0U}},
{MOVEA_2060,{0U,1U,0U}},
{MOVEA_2060,{1U,1U,0U}},
{MOVEA_2060,{2U,1U,0U}},
{MOVEA_2060,{3U,1U,0U}},
{MOVEA_2060,{4U,1U,0U}},
{MOVEA_2060,{5U,1U,0U}},
{MOVEA_2060,{6U,1U,0U}},
{MOVEA_2060,{7U,1U,0U}},
{MOVEA_2068,{0U,1U,0U}},
{MOVEA_2068,{1U,1U,0U}},
{MOVEA_2068,{2U,1U,0U}},
{MOVEA_2068,{3U,1U,0U}},
{MOVEA_2068,{4U,1U,0U}},
{MOVEA_2068,{5U,1U,0U}},
{MOVEA_2068,{6U,1U,0U}},
{MOVEA_2068,{7U,1U,0U}},
{MOVEA_2070,{0U,1U,0U}},
{MOVEA_2070,{1U,1U,0U}},
{MOVEA_2070,{2U,1U,0U}},
{MOVEA_2070,{3U,1U,0U}},
{MOVEA_2070,{4U,1U,0U}},
{MOVEA_2070,{5U,1U,0U}},
{MOVEA_2070,{6U,1U,0U}},
{MOVEA_2070,{7U,1U,0U}},
{MOVEA_2078,{0U,1U,0U}},
{MOVEA_2079,{0U,1U,0U}},
{MOVEA_207A,{0U,1U,0U}},
{MOVEA_207B,{0U,1U,0U}},
{MOVEA_207C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2080,{0U,1U,0U}},
{MOVE_2080,{1U,1U,0U}},
{MOVE_2080,{2U,1U,0U}},
{MOVE_2080,{3U,1U,0U}},
{MOVE_2080,{4U,1U,0U}},
{MOVE_2080,{5U,1U,0U}},
{MOVE_2080,{6U,1U,0U}},
{MOVE_2080,{7U,1U,0U}},
{MOVE_2088,{0U,1U,0U}},
{MOVE_2088,{1U,1U,0U}},
{MOVE_2088,{2U,1U,0U}},
{MOVE_2088,{3U,1U,0U}},
{MOVE_2088,{4U,1U,0U}},
{MOVE_2088,{5U,1U,0U}},
{MOVE_2088,{6U,1U,0U}},
{MOVE_2088,{7U,1U,0U}},
{MOVE_2090,{0U,1U,0U}},
{MOVE_2090,{1U,1U,0U}},
{MOVE_2090,{2U,1U,0U}},
{MOVE_2090,{3U,1U,0U}},
{MOVE_2090,{4U,1U,0U}},
{MOVE_2090,{5U,1U,0U}},
{MOVE_2090,{6U,1U,0U}},
{MOVE_2090,{7U,1U,0U}},
{MOVE_2098,{0U,1U,0U}},
{MOVE_2098,{1U,1U,0U}},
{MOVE_2098,{2U,1U,0U}},
{MOVE_2098,{3U,1U,0U}},
{MOVE_2098,{4U,1U,0U}},
{MOVE_2098,{5U,1U,0U}},
{MOVE_2098,{6U,1U,0U}},
{MOVE_2098,{7U,1U,0U}},
{MOVE_20A0,{0U,1U,0U}},
{MOVE_20A0,{1U,1U,0U}},
{MOVE_20A0,{2U,1U,0U}},
{MOVE_20A0,{3U,1U,0U}},
{MOVE_20A0,{4U,1U,0U}},
{MOVE_20A0,{5U,1U,0U}},
{MOVE_20A0,{6U,1U,0U}},
{MOVE_20A0,{7U,1U,0U}},
{MOVE_20A8,{0U,1U,0U}},
{MOVE_20A8,{1U,1U,0U}},
{MOVE_20A8,{2U,1U,0U}},
{MOVE_20A8,{3U,1U,0U}},
{MOVE_20A8,{4U,1U,0U}},
{MOVE_20A8,{5U,1U,0U}},
{MOVE_20A8,{6U,1U,0U}},
{MOVE_20A8,{7U,1U,0U}},
{MOVE_20B0,{0U,1U,0U}},
{MOVE_20B0,{1U,1U,0U}},
{MOVE_20B0,{2U,1U,0U}},
{MOVE_20B0,{3U,1U,0U}},
{MOVE_20B0,{4U,1U,0U}},
{MOVE_20B0,{5U,1U,0U}},
{MOVE_20B0,{6U,1U,0U}},
{MOVE_20B0,{7U,1U,0U}},
{MOVE_20B8,{0U,1U,0U}},
{MOVE_20B9,{0U,1U,0U}},
{MOVE_20BA,{0U,1U,0U}},
{MOVE_20BB,{0U,1U,0U}},
{MOVE_20BC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_20C0,{0U,1U,0U}},
{MOVE_20C0,{1U,1U,0U}},
{MOVE_20C0,{2U,1U,0U}},
{MOVE_20C0,{3U,1U,0U}},
{MOVE_20C0,{4U,1U,0U}},
{MOVE_20C0,{5U,1U,0U}},
{MOVE_20C0,{6U,1U,0U}},
{MOVE_20C0,{7U,1U,0U}},
{MOVE_20C8,{0U,1U,0U}},
{MOVE_20C8,{1U,1U,0U}},
{MOVE_20C8,{2U,1U,0U}},
{MOVE_20C8,{3U,1U,0U}},
{MOVE_20C8,{4U,1U,0U}},
{MOVE_20C8,{5U,1U,0U}},
{MOVE_20C8,{6U,1U,0U}},
{MOVE_20C8,{7U,1U,0U}},
{MOVE_20D0,{0U,1U,0U}},
{MOVE_20D0,{1U,1U,0U}},
{MOVE_20D0,{2U,1U,0U}},
{MOVE_20D0,{3U,1U,0U}},
{MOVE_20D0,{4U,1U,0U}},
{MOVE_20D0,{5U,1U,0U}},
{MOVE_20D0,{6U,1U,0U}},
{MOVE_20D0,{7U,1U,0U}},
{MOVE_20D8,{0U,1U,0U}},
{MOVE_20D8,{1U,1U,0U}},
{MOVE_20D8,{2U,1U,0U}},
{MOVE_20D8,{3U,1U,0U}},
{MOVE_20D8,{4U,1U,0U}},
{MOVE_20D8,{5U,1U,0U}},
{MOVE_20D8,{6U,1U,0U}},
{MOVE_20D8,{7U,1U,0U}},
{MOVE_20E0,{0U,1U,0U}},
{MOVE_20E0,{1U,1U,0U}},
{MOVE_20E0,{2U,1U,0U}},
{MOVE_20E0,{3U,1U,0U}},
{MOVE_20E0,{4U,1U,0U}},
{MOVE_20E0,{5U,1U,0U}},
{MOVE_20E0,{6U,1U,0U}},
{MOVE_20E0,{7U,1U,0U}},
{MOVE_20E8,{0U,1U,0U}},
{MOVE_20E8,{1U,1U,0U}},
{MOVE_20E8,{2U,1U,0U}},
{MOVE_20E8,{3U,1U,0U}},
{MOVE_20E8,{4U,1U,0U}},
{MOVE_20E8,{5U,1U,0U}},
{MOVE_20E8,{6U,1U,0U}},
{MOVE_20E8,{7U,1U,0U}},
{MOVE_20F0,{0U,1U,0U}},
{MOVE_20F0,{1U,1U,0U}},
{MOVE_20F0,{2U,1U,0U}},
{MOVE_20F0,{3U,1U,0U}},
{MOVE_20F0,{4U,1U,0U}},
{MOVE_20F0,{5U,1U,0U}},
{MOVE_20F0,{6U,1U,0U}},
{MOVE_20F0,{7U,1U,0U}},
{MOVE_20F8,{0U,1U,0U}},
{MOVE_20F9,{0U,1U,0U}},
{MOVE_20FA,{0U,1U,0U}},
{MOVE_20FB,{0U,1U,0U}},
{MOVE_20FC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2100,{0U,1U,0U}},
{MOVE_2100,{1U,1U,0U}},
{MOVE_2100,{2U,1U,0U}},
{MOVE_2100,{3U,1U,0U}},
{MOVE_2100,{4U,1U,0U}},
{MOVE_2100,{5U,1U,0U}},
{MOVE_2100,{6U,1U,0U}},
{MOVE_2100,{7U,1U,0U}},
{MOVE_2108,{0U,1U,0U}},
{MOVE_2108,{1U,1U,0U}},
{MOVE_2108,{2U,1U,0U}},
{MOVE_2108,{3U,1U,0U}},
{MOVE_2108,{4U,1U,0U}},
{MOVE_2108,{5U,1U,0U}},
{MOVE_2108,{6U,1U,0U}},
{MOVE_2108,{7U,1U,0U}},
{MOVE_2110,{0U,1U,0U}},
{MOVE_2110,{1U,1U,0U}},
{MOVE_2110,{2U,1U,0U}},
{MOVE_2110,{3U,1U,0U}},
{MOVE_2110,{4U,1U,0U}},
{MOVE_2110,{5U,1U,0U}},
{MOVE_2110,{6U,1U,0U}},
{MOVE_2110,{7U,1U,0U}},
{MOVE_2118,{0U,1U,0U}},
{MOVE_2118,{1U,1U,0U}},
{MOVE_2118,{2U,1U,0U}},
{MOVE_2118,{3U,1U,0U}},
{MOVE_2118,{4U,1U,0U}},
{MOVE_2118,{5U,1U,0U}},
{MOVE_2118,{6U,1U,0U}},
{MOVE_2118,{7U,1U,0U}},
{MOVE_2120,{0U,1U,0U}},
{MOVE_2120,{1U,1U,0U}},
{MOVE_2120,{2U,1U,0U}},
{MOVE_2120,{3U,1U,0U}},
{MOVE_2120,{4U,1U,0U}},
{MOVE_2120,{5U,1U,0U}},
{MOVE_2120,{6U,1U,0U}},
{MOVE_2120,{7U,1U,0U}},
{MOVE_2128,{0U,1U,0U}},
{MOVE_2128,{1U,1U,0U}},
{MOVE_2128,{2U,1U,0U}},
{MOVE_2128,{3U,1U,0U}},
{MOVE_2128,{4U,1U,0U}},
{MOVE_2128,{5U,1U,0U}},
{MOVE_2128,{6U,1U,0U}},
{MOVE_2128,{7U,1U,0U}},
{MOVE_2130,{0U,1U,0U}},
{MOVE_2130,{1U,1U,0U}},
{MOVE_2130,{2U,1U,0U}},
{MOVE_2130,{3U,1U,0U}},
{MOVE_2130,{4U,1U,0U}},
{MOVE_2130,{5U,1U,0U}},
{MOVE_2130,{6U,1U,0U}},
{MOVE_2130,{7U,1U,0U}},
{MOVE_2138,{0U,1U,0U}},
{MOVE_2139,{0U,1U,0U}},
{MOVE_213A,{0U,1U,0U}},
{MOVE_213B,{0U,1U,0U}},
{MOVE_213C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2140,{0U,1U,0U}},
{MOVE_2140,{1U,1U,0U}},
{MOVE_2140,{2U,1U,0U}},
{MOVE_2140,{3U,1U,0U}},
{MOVE_2140,{4U,1U,0U}},
{MOVE_2140,{5U,1U,0U}},
{MOVE_2140,{6U,1U,0U}},
{MOVE_2140,{7U,1U,0U}},
{MOVE_2148,{0U,1U,0U}},
{MOVE_2148,{1U,1U,0U}},
{MOVE_2148,{2U,1U,0U}},
{MOVE_2148,{3U,1U,0U}},
{MOVE_2148,{4U,1U,0U}},
{MOVE_2148,{5U,1U,0U}},
{MOVE_2148,{6U,1U,0U}},
{MOVE_2148,{7U,1U,0U}},
{MOVE_2150,{0U,1U,0U}},
{MOVE_2150,{1U,1U,0U}},
{MOVE_2150,{2U,1U,0U}},
{MOVE_2150,{3U,1U,0U}},
{MOVE_2150,{4U,1U,0U}},
{MOVE_2150,{5U,1U,0U}},
{MOVE_2150,{6U,1U,0U}},
{MOVE_2150,{7U,1U,0U}},
{MOVE_2158,{0U,1U,0U}},
{MOVE_2158,{1U,1U,0U}},
{MOVE_2158,{2U,1U,0U}},
{MOVE_2158,{3U,1U,0U}},
{MOVE_2158,{4U,1U,0U}},
{MOVE_2158,{5U,1U,0U}},
{MOVE_2158,{6U,1U,0U}},
{MOVE_2158,{7U,1U,0U}},
{MOVE_2160,{0U,1U,0U}},
{MOVE_2160,{1U,1U,0U}},
{MOVE_2160,{2U,1U,0U}},
{MOVE_2160,{3U,1U,0U}},
{MOVE_2160,{4U,1U,0U}},
{MOVE_2160,{5U,1U,0U}},
{MOVE_2160,{6U,1U,0U}},
{MOVE_2160,{7U,1U,0U}},
{MOVE_2168,{0U,1U,0U}},
{MOVE_2168,{1U,1U,0U}},
{MOVE_2168,{2U,1U,0U}},
{MOVE_2168,{3U,1U,0U}},
{MOVE_2168,{4U,1U,0U}},
{MOVE_2168,{5U,1U,0U}},
{MOVE_2168,{6U,1U,0U}},
{MOVE_2168,{7U,1U,0U}},
{MOVE_2170,{0U,1U,0U}},
{MOVE_2170,{1U,1U,0U}},
{MOVE_2170,{2U,1U,0U}},
{MOVE_2170,{3U,1U,0U}},
{MOVE_2170,{4U,1U,0U}},
{MOVE_2170,{5U,1U,0U}},
{MOVE_2170,{6U,1U,0U}},
{MOVE_2170,{7U,1U,0U}},
{MOVE_2178,{0U,1U,0U}},
{MOVE_2179,{0U,1U,0U}},
{MOVE_217A,{0U,1U,0U}},
{MOVE_217B,{0U,1U,0U}},
{MOVE_217C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2180,{0U,1U,0U}},
{MOVE_2180,{1U,1U,0U}},
{MOVE_2180,{2U,1U,0U}},
{MOVE_2180,{3U,1U,0U}},
{MOVE_2180,{4U,1U,0U}},
{MOVE_2180,{5U,1U,0U}},
{MOVE_2180,{6U,1U,0U}},
{MOVE_2180,{7U,1U,0U}},
{MOVE_2188,{0U,1U,0U}},
{MOVE_2188,{1U,1U,0U}},
{MOVE_2188,{2U,1U,0U}},
{MOVE_2188,{3U,1U,0U}},
{MOVE_2188,{4U,1U,0U}},
{MOVE_2188,{5U,1U,0U}},
{MOVE_2188,{6U,1U,0U}},
{MOVE_2188,{7U,1U,0U}},
{MOVE_2190,{0U,1U,0U}},
{MOVE_2190,{1U,1U,0U}},
{MOVE_2190,{2U,1U,0U}},
{MOVE_2190,{3U,1U,0U}},
{MOVE_2190,{4U,1U,0U}},
{MOVE_2190,{5U,1U,0U}},
{MOVE_2190,{6U,1U,0U}},
{MOVE_2190,{7U,1U,0U}},
{MOVE_2198,{0U,1U,0U}},
{MOVE_2198,{1U,1U,0U}},
{MOVE_2198,{2U,1U,0U}},
{MOVE_2198,{3U,1U,0U}},
{MOVE_2198,{4U,1U,0U}},
{MOVE_2198,{5U,1U,0U}},
{MOVE_2198,{6U,1U,0U}},
{MOVE_2198,{7U,1U,0U}},
{MOVE_21A0,{0U,1U,0U}},
{MOVE_21A0,{1U,1U,0U}},
{MOVE_21A0,{2U,1U,0U}},
{MOVE_21A0,{3U,1U,0U}},
{MOVE_21A0,{4U,1U,0U}},
{MOVE_21A0,{5U,1U,0U}},
{MOVE_21A0,{6U,1U,0U}},
{MOVE_21A0,{7U,1U,0U}},
{MOVE_21A8,{0U,1U,0U}},
{MOVE_21A8,{1U,1U,0U}},
{MOVE_21A8,{2U,1U,0U}},
{MOVE_21A8,{3U,1U,0U}},
{MOVE_21A8,{4U,1U,0U}},
{MOVE_21A8,{5U,1U,0U}},
{MOVE_21A8,{6U,1U,0U}},
{MOVE_21A8,{7U,1U,0U}},
{MOVE_21B0,{0U,1U,0U}},
{MOVE_21B0,{1U,1U,0U}},
{MOVE_21B0,{2U,1U,0U}},
{MOVE_21B0,{3U,1U,0U}},
{MOVE_21B0,{4U,1U,0U}},
{MOVE_21B0,{5U,1U,0U}},
{MOVE_21B0,{6U,1U,0U}},
{MOVE_21B0,{7U,1U,0U}},
{MOVE_21B8,{0U,1U,0U}},
{MOVE_21B9,{0U,1U,0U}},
{MOVE_21BA,{0U,1U,0U}},
{MOVE_21BB,{0U,1U,0U}},
{MOVE_21BC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_23C0,{0U,0U,0U}},
{MOVE_23C0,{1U,0U,0U}},
{MOVE_23C0,{2U,0U,0U}},
{MOVE_23C0,{3U,0U,0U}},
{MOVE_23C0,{4U,0U,0U}},
{MOVE_23C0,{5U,0U,0U}},
{MOVE_23C0,{6U,0U,0U}},
{MOVE_23C0,{7U,0U,0U}},
{MOVE_23C8,{0U,0U,0U}},
{MOVE_23C8,{1U,0U,0U}},
{MOVE_23C8,{2U,0U,0U}},
{MOVE_23C8,{3U,0U,0U}},
{MOVE_23C8,{4U,0U,0U}},
{MOVE_23C8,{5U,0U,0U}},
{MOVE_23C8,{6U,0U,0U}},
{MOVE_23C8,{7U,0U,0U}},
{MOVE_23D0,{0U,0U,0U}},
{MOVE_23D0,{1U,0U,0U}},
{MOVE_23D0,{2U,0U,0U}},
{MOVE_23D0,{3U,0U,0U}},
{MOVE_23D0,{4U,0U,0U}},
{MOVE_23D0,{5U,0U,0U}},
{MOVE_23D0,{6U,0U,0U}},
{MOVE_23D0,{7U,0U,0U}},
{MOVE_23D8,{0U,0U,0U}},
{MOVE_23D8,{1U,0U,0U}},
{MOVE_23D8,{2U,0U,0U}},
{MOVE_23D8,{3U,0U,0U}},
{MOVE_23D8,{4U,0U,0U}},
{MOVE_23D8,{5U,0U,0U}},
{MOVE_23D8,{6U,0U,0U}},
{MOVE_23D8,{7U,0U,0U}},
{MOVE_23E0,{0U,0U,0U}},
{MOVE_23E0,{1U,0U,0U}},
{MOVE_23E0,{2U,0U,0U}},
{MOVE_23E0,{3U,0U,0U}},
{MOVE_23E0,{4U,0U,0U}},
{MOVE_23E0,{5U,0U,0U}},
{MOVE_23E0,{6U,0U,0U}},
{MOVE_23E0,{7U,0U,0U}},
{MOVE_23E8,{0U,0U,0U}},
{MOVE_23E8,{1U,0U,0U}},
{MOVE_23E8,{2U,0U,0U}},
{MOVE_23E8,{3U,0U,0U}},
{MOVE_23E8,{4U,0U,0U}},
{MOVE_23E8,{5U,0U,0U}},
{MOVE_23E8,{6U,0U,0U}},
{MOVE_23E8,{7U,0U,0U}},
{MOVE_23F0,{0U,0U,0U}},
{MOVE_23F0,{1U,0U,0U}},
{MOVE_23F0,{2U,0U,0U}},
{MOVE_23F0,{3U,0U,0U}},
{MOVE_23F0,{4U,0U,0U}},
{MOVE_23F0,{5U,0U,0U}},
{MOVE_23F0,{6U,0U,0U}},
{MOVE_23F0,{7U,0U,0U}},
{MOVE_23F8,{0U,0U,0U}},
{MOVE_23F9,{0U,0U,0U}},
{MOVE_23FA,{0U,0U,0U}},
{MOVE_23FB,{0U,0U,0U}},
{MOVE_23FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2000,{0U,2U,0U}},
{MOVE_2000,{1U,2U,0U}},
{MOVE_2000,{2U,2U,0U}},
{MOVE_2000,{3U,2U,0U}},
{MOVE_2000,{4U,2U,0U}},
{MOVE_2000,{5U,2U,0U}},
{MOVE_2000,{6U,2U,0U}},
{MOVE_2000,{7U,2U,0U}},
{MOVE_2008,{0U,2U,0U}},
{MOVE_2008,{1U,2U,0U}},
{MOVE_2008,{2U,2U,0U}},
{MOVE_2008,{3U,2U,0U}},
{MOVE_2008,{4U,2U,0U}},
{MOVE_2008,{5U,2U,0U}},
{MOVE_2008,{6U,2U,0U}},
{MOVE_2008,{7U,2U,0U}},
{MOVE_2010,{0U,2U,0U}},
{MOVE_2010,{1U,2U,0U}},
{MOVE_2010,{2U,2U,0U}},
{MOVE_2010,{3U,2U,0U}},
{MOVE_2010,{4U,2U,0U}},
{MOVE_2010,{5U,2U,0U}},
{MOVE_2010,{6U,2U,0U}},
{MOVE_2010,{7U,2U,0U}},
{MOVE_2018,{0U,2U,0U}},
{MOVE_2018,{1U,2U,0U}},
{MOVE_2018,{2U,2U,0U}},
{MOVE_2018,{3U,2U,0U}},
{MOVE_2018,{4U,2U,0U}},
{MOVE_2018,{5U,2U,0U}},
{MOVE_2018,{6U,2U,0U}},
{MOVE_2018,{7U,2U,0U}},
{MOVE_2020,{0U,2U,0U}},
{MOVE_2020,{1U,2U,0U}},
{MOVE_2020,{2U,2U,0U}},
{MOVE_2020,{3U,2U,0U}},
{MOVE_2020,{4U,2U,0U}},
{MOVE_2020,{5U,2U,0U}},
{MOVE_2020,{6U,2U,0U}},
{MOVE_2020,{7U,2U,0U}},
{MOVE_2028,{0U,2U,0U}},
{MOVE_2028,{1U,2U,0U}},
{MOVE_2028,{2U,2U,0U}},
{MOVE_2028,{3U,2U,0U}},
{MOVE_2028,{4U,2U,0U}},
{MOVE_2028,{5U,2U,0U}},
{MOVE_2028,{6U,2U,0U}},
{MOVE_2028,{7U,2U,0U}},
{MOVE_2030,{0U,2U,0U}},
{MOVE_2030,{1U,2U,0U}},
{MOVE_2030,{2U,2U,0U}},
{MOVE_2030,{3U,2U,0U}},
{MOVE_2030,{4U,2U,0U}},
{MOVE_2030,{5U,2U,0U}},
{MOVE_2030,{6U,2U,0U}},
{MOVE_2030,{7U,2U,0U}},
{MOVE_2038,{0U,2U,0U}},
{MOVE_2039,{0U,2U,0U}},
{MOVE_203A,{0U,2U,0U}},
{MOVE_203B,{0U,2U,0U}},
{MOVE_203C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_2040,{0U,2U,0U}},
{MOVEA_2040,{1U,2U,0U}},
{MOVEA_2040,{2U,2U,0U}},
{MOVEA_2040,{3U,2U,0U}},
{MOVEA_2040,{4U,2U,0U}},
{MOVEA_2040,{5U,2U,0U}},
{MOVEA_2040,{6U,2U,0U}},
{MOVEA_2040,{7U,2U,0U}},
{MOVEA_2048,{0U,2U,0U}},
{MOVEA_2048,{1U,2U,0U}},
{MOVEA_2048,{2U,2U,0U}},
{MOVEA_2048,{3U,2U,0U}},
{MOVEA_2048,{4U,2U,0U}},
{MOVEA_2048,{5U,2U,0U}},
{MOVEA_2048,{6U,2U,0U}},
{MOVEA_2048,{7U,2U,0U}},
{MOVEA_2050,{0U,2U,0U}},
{MOVEA_2050,{1U,2U,0U}},
{MOVEA_2050,{2U,2U,0U}},
{MOVEA_2050,{3U,2U,0U}},
{MOVEA_2050,{4U,2U,0U}},
{MOVEA_2050,{5U,2U,0U}},
{MOVEA_2050,{6U,2U,0U}},
{MOVEA_2050,{7U,2U,0U}},
{MOVEA_2058,{0U,2U,0U}},
{MOVEA_2058,{1U,2U,0U}},
{MOVEA_2058,{2U,2U,0U}},
{MOVEA_2058,{3U,2U,0U}},
{MOVEA_2058,{4U,2U,0U}},
{MOVEA_2058,{5U,2U,0U}},
{MOVEA_2058,{6U,2U,0U}},
{MOVEA_2058,{7U,2U,0U}},
{MOVEA_2060,{0U,2U,0U}},
{MOVEA_2060,{1U,2U,0U}},
{MOVEA_2060,{2U,2U,0U}},
{MOVEA_2060,{3U,2U,0U}},
{MOVEA_2060,{4U,2U,0U}},
{MOVEA_2060,{5U,2U,0U}},
{MOVEA_2060,{6U,2U,0U}},
{MOVEA_2060,{7U,2U,0U}},
{MOVEA_2068,{0U,2U,0U}},
{MOVEA_2068,{1U,2U,0U}},
{MOVEA_2068,{2U,2U,0U}},
{MOVEA_2068,{3U,2U,0U}},
{MOVEA_2068,{4U,2U,0U}},
{MOVEA_2068,{5U,2U,0U}},
{MOVEA_2068,{6U,2U,0U}},
{MOVEA_2068,{7U,2U,0U}},
{MOVEA_2070,{0U,2U,0U}},
{MOVEA_2070,{1U,2U,0U}},
{MOVEA_2070,{2U,2U,0U}},
{MOVEA_2070,{3U,2U,0U}},
{MOVEA_2070,{4U,2U,0U}},
{MOVEA_2070,{5U,2U,0U}},
{MOVEA_2070,{6U,2U,0U}},
{MOVEA_2070,{7U,2U,0U}},
{MOVEA_2078,{0U,2U,0U}},
{MOVEA_2079,{0U,2U,0U}},
{MOVEA_207A,{0U,2U,0U}},
{MOVEA_207B,{0U,2U,0U}},
{MOVEA_207C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2080,{0U,2U,0U}},
{MOVE_2080,{1U,2U,0U}},
{MOVE_2080,{2U,2U,0U}},
{MOVE_2080,{3U,2U,0U}},
{MOVE_2080,{4U,2U,0U}},
{MOVE_2080,{5U,2U,0U}},
{MOVE_2080,{6U,2U,0U}},
{MOVE_2080,{7U,2U,0U}},
{MOVE_2088,{0U,2U,0U}},
{MOVE_2088,{1U,2U,0U}},
{MOVE_2088,{2U,2U,0U}},
{MOVE_2088,{3U,2U,0U}},
{MOVE_2088,{4U,2U,0U}},
{MOVE_2088,{5U,2U,0U}},
{MOVE_2088,{6U,2U,0U}},
{MOVE_2088,{7U,2U,0U}},
{MOVE_2090,{0U,2U,0U}},
{MOVE_2090,{1U,2U,0U}},
{MOVE_2090,{2U,2U,0U}},
{MOVE_2090,{3U,2U,0U}},
{MOVE_2090,{4U,2U,0U}},
{MOVE_2090,{5U,2U,0U}},
{MOVE_2090,{6U,2U,0U}},
{MOVE_2090,{7U,2U,0U}},
{MOVE_2098,{0U,2U,0U}},
{MOVE_2098,{1U,2U,0U}},
{MOVE_2098,{2U,2U,0U}},
{MOVE_2098,{3U,2U,0U}},
{MOVE_2098,{4U,2U,0U}},
{MOVE_2098,{5U,2U,0U}},
{MOVE_2098,{6U,2U,0U}},
{MOVE_2098,{7U,2U,0U}},
{MOVE_20A0,{0U,2U,0U}},
{MOVE_20A0,{1U,2U,0U}},
{MOVE_20A0,{2U,2U,0U}},
{MOVE_20A0,{3U,2U,0U}},
{MOVE_20A0,{4U,2U,0U}},
{MOVE_20A0,{5U,2U,0U}},
{MOVE_20A0,{6U,2U,0U}},
{MOVE_20A0,{7U,2U,0U}},
{MOVE_20A8,{0U,2U,0U}},
{MOVE_20A8,{1U,2U,0U}},
{MOVE_20A8,{2U,2U,0U}},
{MOVE_20A8,{3U,2U,0U}},
{MOVE_20A8,{4U,2U,0U}},
{MOVE_20A8,{5U,2U,0U}},
{MOVE_20A8,{6U,2U,0U}},
{MOVE_20A8,{7U,2U,0U}},
{MOVE_20B0,{0U,2U,0U}},
{MOVE_20B0,{1U,2U,0U}},
{MOVE_20B0,{2U,2U,0U}},
{MOVE_20B0,{3U,2U,0U}},
{MOVE_20B0,{4U,2U,0U}},
{MOVE_20B0,{5U,2U,0U}},
{MOVE_20B0,{6U,2U,0U}},
{MOVE_20B0,{7U,2U,0U}},
{MOVE_20B8,{0U,2U,0U}},
{MOVE_20B9,{0U,2U,0U}},
{MOVE_20BA,{0U,2U,0U}},
{MOVE_20BB,{0U,2U,0U}},
{MOVE_20BC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_20C0,{0U,2U,0U}},
{MOVE_20C0,{1U,2U,0U}},
{MOVE_20C0,{2U,2U,0U}},
{MOVE_20C0,{3U,2U,0U}},
{MOVE_20C0,{4U,2U,0U}},
{MOVE_20C0,{5U,2U,0U}},
{MOVE_20C0,{6U,2U,0U}},
{MOVE_20C0,{7U,2U,0U}},
{MOVE_20C8,{0U,2U,0U}},
{MOVE_20C8,{1U,2U,0U}},
{MOVE_20C8,{2U,2U,0U}},
{MOVE_20C8,{3U,2U,0U}},
{MOVE_20C8,{4U,2U,0U}},
{MOVE_20C8,{5U,2U,0U}},
{MOVE_20C8,{6U,2U,0U}},
{MOVE_20C8,{7U,2U,0U}},
{MOVE_20D0,{0U,2U,0U}},
{MOVE_20D0,{1U,2U,0U}},
{MOVE_20D0,{2U,2U,0U}},
{MOVE_20D0,{3U,2U,0U}},
{MOVE_20D0,{4U,2U,0U}},
{MOVE_20D0,{5U,2U,0U}},
{MOVE_20D0,{6U,2U,0U}},
{MOVE_20D0,{7U,2U,0U}},
{MOVE_20D8,{0U,2U,0U}},
{MOVE_20D8,{1U,2U,0U}},
{MOVE_20D8,{2U,2U,0U}},
{MOVE_20D8,{3U,2U,0U}},
{MOVE_20D8,{4U,2U,0U}},
{MOVE_20D8,{5U,2U,0U}},
{MOVE_20D8,{6U,2U,0U}},
{MOVE_20D8,{7U,2U,0U}},
{MOVE_20E0,{0U,2U,0U}},
{MOVE_20E0,{1U,2U,0U}},
{MOVE_20E0,{2U,2U,0U}},
{MOVE_20E0,{3U,2U,0U}},
{MOVE_20E0,{4U,2U,0U}},
{MOVE_20E0,{5U,2U,0U}},
{MOVE_20E0,{6U,2U,0U}},
{MOVE_20E0,{7U,2U,0U}},
{MOVE_20E8,{0U,2U,0U}},
{MOVE_20E8,{1U,2U,0U}},
{MOVE_20E8,{2U,2U,0U}},
{MOVE_20E8,{3U,2U,0U}},
{MOVE_20E8,{4U,2U,0U}},
{MOVE_20E8,{5U,2U,0U}},
{MOVE_20E8,{6U,2U,0U}},
{MOVE_20E8,{7U,2U,0U}},
{MOVE_20F0,{0U,2U,0U}},
{MOVE_20F0,{1U,2U,0U}},
{MOVE_20F0,{2U,2U,0U}},
{MOVE_20F0,{3U,2U,0U}},
{MOVE_20F0,{4U,2U,0U}},
{MOVE_20F0,{5U,2U,0U}},
{MOVE_20F0,{6U,2U,0U}},
{MOVE_20F0,{7U,2U,0U}},
{MOVE_20F8,{0U,2U,0U}},
{MOVE_20F9,{0U,2U,0U}},
{MOVE_20FA,{0U,2U,0U}},
{MOVE_20FB,{0U,2U,0U}},
{MOVE_20FC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2100,{0U,2U,0U}},
{MOVE_2100,{1U,2U,0U}},
{MOVE_2100,{2U,2U,0U}},
{MOVE_2100,{3U,2U,0U}},
{MOVE_2100,{4U,2U,0U}},
{MOVE_2100,{5U,2U,0U}},
{MOVE_2100,{6U,2U,0U}},
{MOVE_2100,{7U,2U,0U}},
{MOVE_2108,{0U,2U,0U}},
{MOVE_2108,{1U,2U,0U}},
{MOVE_2108,{2U,2U,0U}},
{MOVE_2108,{3U,2U,0U}},
{MOVE_2108,{4U,2U,0U}},
{MOVE_2108,{5U,2U,0U}},
{MOVE_2108,{6U,2U,0U}},
{MOVE_2108,{7U,2U,0U}},
{MOVE_2110,{0U,2U,0U}},
{MOVE_2110,{1U,2U,0U}},
{MOVE_2110,{2U,2U,0U}},
{MOVE_2110,{3U,2U,0U}},
{MOVE_2110,{4U,2U,0U}},
{MOVE_2110,{5U,2U,0U}},
{MOVE_2110,{6U,2U,0U}},
{MOVE_2110,{7U,2U,0U}},
{MOVE_2118,{0U,2U,0U}},
{MOVE_2118,{1U,2U,0U}},
{MOVE_2118,{2U,2U,0U}},
{MOVE_2118,{3U,2U,0U}},
{MOVE_2118,{4U,2U,0U}},
{MOVE_2118,{5U,2U,0U}},
{MOVE_2118,{6U,2U,0U}},
{MOVE_2118,{7U,2U,0U}},
{MOVE_2120,{0U,2U,0U}},
{MOVE_2120,{1U,2U,0U}},
{MOVE_2120,{2U,2U,0U}},
{MOVE_2120,{3U,2U,0U}},
{MOVE_2120,{4U,2U,0U}},
{MOVE_2120,{5U,2U,0U}},
{MOVE_2120,{6U,2U,0U}},
{MOVE_2120,{7U,2U,0U}},
{MOVE_2128,{0U,2U,0U}},
{MOVE_2128,{1U,2U,0U}},
{MOVE_2128,{2U,2U,0U}},
{MOVE_2128,{3U,2U,0U}},
{MOVE_2128,{4U,2U,0U}},
{MOVE_2128,{5U,2U,0U}},
{MOVE_2128,{6U,2U,0U}},
{MOVE_2128,{7U,2U,0U}},
{MOVE_2130,{0U,2U,0U}},
{MOVE_2130,{1U,2U,0U}},
{MOVE_2130,{2U,2U,0U}},
{MOVE_2130,{3U,2U,0U}},
{MOVE_2130,{4U,2U,0U}},
{MOVE_2130,{5U,2U,0U}},
{MOVE_2130,{6U,2U,0U}},
{MOVE_2130,{7U,2U,0U}},
{MOVE_2138,{0U,2U,0U}},
{MOVE_2139,{0U,2U,0U}},
{MOVE_213A,{0U,2U,0U}},
{MOVE_213B,{0U,2U,0U}},
{MOVE_213C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2140,{0U,2U,0U}},
{MOVE_2140,{1U,2U,0U}},
{MOVE_2140,{2U,2U,0U}},
{MOVE_2140,{3U,2U,0U}},
{MOVE_2140,{4U,2U,0U}},
{MOVE_2140,{5U,2U,0U}},
{MOVE_2140,{6U,2U,0U}},
{MOVE_2140,{7U,2U,0U}},
{MOVE_2148,{0U,2U,0U}},
{MOVE_2148,{1U,2U,0U}},
{MOVE_2148,{2U,2U,0U}},
{MOVE_2148,{3U,2U,0U}},
{MOVE_2148,{4U,2U,0U}},
{MOVE_2148,{5U,2U,0U}},
{MOVE_2148,{6U,2U,0U}},
{MOVE_2148,{7U,2U,0U}},
{MOVE_2150,{0U,2U,0U}},
{MOVE_2150,{1U,2U,0U}},
{MOVE_2150,{2U,2U,0U}},
{MOVE_2150,{3U,2U,0U}},
{MOVE_2150,{4U,2U,0U}},
{MOVE_2150,{5U,2U,0U}},
{MOVE_2150,{6U,2U,0U}},
{MOVE_2150,{7U,2U,0U}},
{MOVE_2158,{0U,2U,0U}},
{MOVE_2158,{1U,2U,0U}},
{MOVE_2158,{2U,2U,0U}},
{MOVE_2158,{3U,2U,0U}},
{MOVE_2158,{4U,2U,0U}},
{MOVE_2158,{5U,2U,0U}},
{MOVE_2158,{6U,2U,0U}},
{MOVE_2158,{7U,2U,0U}},
{MOVE_2160,{0U,2U,0U}},
{MOVE_2160,{1U,2U,0U}},
{MOVE_2160,{2U,2U,0U}},
{MOVE_2160,{3U,2U,0U}},
{MOVE_2160,{4U,2U,0U}},
{MOVE_2160,{5U,2U,0U}},
{MOVE_2160,{6U,2U,0U}},
{MOVE_2160,{7U,2U,0U}},
{MOVE_2168,{0U,2U,0U}},
{MOVE_2168,{1U,2U,0U}},
{MOVE_2168,{2U,2U,0U}},
{MOVE_2168,{3U,2U,0U}},
{MOVE_2168,{4U,2U,0U}},
{MOVE_2168,{5U,2U,0U}},
{MOVE_2168,{6U,2U,0U}},
{MOVE_2168,{7U,2U,0U}},
{MOVE_2170,{0U,2U,0U}},
{MOVE_2170,{1U,2U,0U}},
{MOVE_2170,{2U,2U,0U}},
{MOVE_2170,{3U,2U,0U}},
{MOVE_2170,{4U,2U,0U}},
{MOVE_2170,{5U,2U,0U}},
{MOVE_2170,{6U,2U,0U}},
{MOVE_2170,{7U,2U,0U}},
{MOVE_2178,{0U,2U,0U}},
{MOVE_2179,{0U,2U,0U}},
{MOVE_217A,{0U,2U,0U}},
{MOVE_217B,{0U,2U,0U}},
{MOVE_217C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2180,{0U,2U,0U}},
{MOVE_2180,{1U,2U,0U}},
{MOVE_2180,{2U,2U,0U}},
{MOVE_2180,{3U,2U,0U}},
{MOVE_2180,{4U,2U,0U}},
{MOVE_2180,{5U,2U,0U}},
{MOVE_2180,{6U,2U,0U}},
{MOVE_2180,{7U,2U,0U}},
{MOVE_2188,{0U,2U,0U}},
{MOVE_2188,{1U,2U,0U}},
{MOVE_2188,{2U,2U,0U}},
{MOVE_2188,{3U,2U,0U}},
{MOVE_2188,{4U,2U,0U}},
{MOVE_2188,{5U,2U,0U}},
{MOVE_2188,{6U,2U,0U}},
{MOVE_2188,{7U,2U,0U}},
{MOVE_2190,{0U,2U,0U}},
{MOVE_2190,{1U,2U,0U}},
{MOVE_2190,{2U,2U,0U}},
{MOVE_2190,{3U,2U,0U}},
{MOVE_2190,{4U,2U,0U}},
{MOVE_2190,{5U,2U,0U}},
{MOVE_2190,{6U,2U,0U}},
{MOVE_2190,{7U,2U,0U}},
{MOVE_2198,{0U,2U,0U}},
{MOVE_2198,{1U,2U,0U}},
{MOVE_2198,{2U,2U,0U}},
{MOVE_2198,{3U,2U,0U}},
{MOVE_2198,{4U,2U,0U}},
{MOVE_2198,{5U,2U,0U}},
{MOVE_2198,{6U,2U,0U}},
{MOVE_2198,{7U,2U,0U}},
{MOVE_21A0,{0U,2U,0U}},
{MOVE_21A0,{1U,2U,0U}},
{MOVE_21A0,{2U,2U,0U}},
{MOVE_21A0,{3U,2U,0U}},
{MOVE_21A0,{4U,2U,0U}},
{MOVE_21A0,{5U,2U,0U}},
{MOVE_21A0,{6U,2U,0U}},
{MOVE_21A0,{7U,2U,0U}},
{MOVE_21A8,{0U,2U,0U}},
{MOVE_21A8,{1U,2U,0U}},
{MOVE_21A8,{2U,2U,0U}},
{MOVE_21A8,{3U,2U,0U}},
{MOVE_21A8,{4U,2U,0U}},
{MOVE_21A8,{5U,2U,0U}},
{MOVE_21A8,{6U,2U,0U}},
{MOVE_21A8,{7U,2U,0U}},
{MOVE_21B0,{0U,2U,0U}},
{MOVE_21B0,{1U,2U,0U}},
{MOVE_21B0,{2U,2U,0U}},
{MOVE_21B0,{3U,2U,0U}},
{MOVE_21B0,{4U,2U,0U}},
{MOVE_21B0,{5U,2U,0U}},
{MOVE_21B0,{6U,2U,0U}},
{MOVE_21B0,{7U,2U,0U}},
{MOVE_21B8,{0U,2U,0U}},
{MOVE_21B9,{0U,2U,0U}},
{MOVE_21BA,{0U,2U,0U}},
{MOVE_21BB,{0U,2U,0U}},
{MOVE_21BC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2000,{0U,3U,0U}},
{MOVE_2000,{1U,3U,0U}},
{MOVE_2000,{2U,3U,0U}},
{MOVE_2000,{3U,3U,0U}},
{MOVE_2000,{4U,3U,0U}},
{MOVE_2000,{5U,3U,0U}},
{MOVE_2000,{6U,3U,0U}},
{MOVE_2000,{7U,3U,0U}},
{MOVE_2008,{0U,3U,0U}},
{MOVE_2008,{1U,3U,0U}},
{MOVE_2008,{2U,3U,0U}},
{MOVE_2008,{3U,3U,0U}},
{MOVE_2008,{4U,3U,0U}},
{MOVE_2008,{5U,3U,0U}},
{MOVE_2008,{6U,3U,0U}},
{MOVE_2008,{7U,3U,0U}},
{MOVE_2010,{0U,3U,0U}},
{MOVE_2010,{1U,3U,0U}},
{MOVE_2010,{2U,3U,0U}},
{MOVE_2010,{3U,3U,0U}},
{MOVE_2010,{4U,3U,0U}},
{MOVE_2010,{5U,3U,0U}},
{MOVE_2010,{6U,3U,0U}},
{MOVE_2010,{7U,3U,0U}},
{MOVE_2018,{0U,3U,0U}},
{MOVE_2018,{1U,3U,0U}},
{MOVE_2018,{2U,3U,0U}},
{MOVE_2018,{3U,3U,0U}},
{MOVE_2018,{4U,3U,0U}},
{MOVE_2018,{5U,3U,0U}},
{MOVE_2018,{6U,3U,0U}},
{MOVE_2018,{7U,3U,0U}},
{MOVE_2020,{0U,3U,0U}},
{MOVE_2020,{1U,3U,0U}},
{MOVE_2020,{2U,3U,0U}},
{MOVE_2020,{3U,3U,0U}},
{MOVE_2020,{4U,3U,0U}},
{MOVE_2020,{5U,3U,0U}},
{MOVE_2020,{6U,3U,0U}},
{MOVE_2020,{7U,3U,0U}},
{MOVE_2028,{0U,3U,0U}},
{MOVE_2028,{1U,3U,0U}},
{MOVE_2028,{2U,3U,0U}},
{MOVE_2028,{3U,3U,0U}},
{MOVE_2028,{4U,3U,0U}},
{MOVE_2028,{5U,3U,0U}},
{MOVE_2028,{6U,3U,0U}},
{MOVE_2028,{7U,3U,0U}},
{MOVE_2030,{0U,3U,0U}},
{MOVE_2030,{1U,3U,0U}},
{MOVE_2030,{2U,3U,0U}},
{MOVE_2030,{3U,3U,0U}},
{MOVE_2030,{4U,3U,0U}},
{MOVE_2030,{5U,3U,0U}},
{MOVE_2030,{6U,3U,0U}},
{MOVE_2030,{7U,3U,0U}},
{MOVE_2038,{0U,3U,0U}},
{MOVE_2039,{0U,3U,0U}},
{MOVE_203A,{0U,3U,0U}},
{MOVE_203B,{0U,3U,0U}},
{MOVE_203C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_2040,{0U,3U,0U}},
{MOVEA_2040,{1U,3U,0U}},
{MOVEA_2040,{2U,3U,0U}},
{MOVEA_2040,{3U,3U,0U}},
{MOVEA_2040,{4U,3U,0U}},
{MOVEA_2040,{5U,3U,0U}},
{MOVEA_2040,{6U,3U,0U}},
{MOVEA_2040,{7U,3U,0U}},
{MOVEA_2048,{0U,3U,0U}},
{MOVEA_2048,{1U,3U,0U}},
{MOVEA_2048,{2U,3U,0U}},
{MOVEA_2048,{3U,3U,0U}},
{MOVEA_2048,{4U,3U,0U}},
{MOVEA_2048,{5U,3U,0U}},
{MOVEA_2048,{6U,3U,0U}},
{MOVEA_2048,{7U,3U,0U}},
{MOVEA_2050,{0U,3U,0U}},
{MOVEA_2050,{1U,3U,0U}},
{MOVEA_2050,{2U,3U,0U}},
{MOVEA_2050,{3U,3U,0U}},
{MOVEA_2050,{4U,3U,0U}},
{MOVEA_2050,{5U,3U,0U}},
{MOVEA_2050,{6U,3U,0U}},
{MOVEA_2050,{7U,3U,0U}},
{MOVEA_2058,{0U,3U,0U}},
{MOVEA_2058,{1U,3U,0U}},
{MOVEA_2058,{2U,3U,0U}},
{MOVEA_2058,{3U,3U,0U}},
{MOVEA_2058,{4U,3U,0U}},
{MOVEA_2058,{5U,3U,0U}},
{MOVEA_2058,{6U,3U,0U}},
{MOVEA_2058,{7U,3U,0U}},
{MOVEA_2060,{0U,3U,0U}},
{MOVEA_2060,{1U,3U,0U}},
{MOVEA_2060,{2U,3U,0U}},
{MOVEA_2060,{3U,3U,0U}},
{MOVEA_2060,{4U,3U,0U}},
{MOVEA_2060,{5U,3U,0U}},
{MOVEA_2060,{6U,3U,0U}},
{MOVEA_2060,{7U,3U,0U}},
{MOVEA_2068,{0U,3U,0U}},
{MOVEA_2068,{1U,3U,0U}},
{MOVEA_2068,{2U,3U,0U}},
{MOVEA_2068,{3U,3U,0U}},
{MOVEA_2068,{4U,3U,0U}},
{MOVEA_2068,{5U,3U,0U}},
{MOVEA_2068,{6U,3U,0U}},
{MOVEA_2068,{7U,3U,0U}},
{MOVEA_2070,{0U,3U,0U}},
{MOVEA_2070,{1U,3U,0U}},
{MOVEA_2070,{2U,3U,0U}},
{MOVEA_2070,{3U,3U,0U}},
{MOVEA_2070,{4U,3U,0U}},
{MOVEA_2070,{5U,3U,0U}},
{MOVEA_2070,{6U,3U,0U}},
{MOVEA_2070,{7U,3U,0U}},
{MOVEA_2078,{0U,3U,0U}},
{MOVEA_2079,{0U,3U,0U}},
{MOVEA_207A,{0U,3U,0U}},
{MOVEA_207B,{0U,3U,0U}},
{MOVEA_207C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2080,{0U,3U,0U}},
{MOVE_2080,{1U,3U,0U}},
{MOVE_2080,{2U,3U,0U}},
{MOVE_2080,{3U,3U,0U}},
{MOVE_2080,{4U,3U,0U}},
{MOVE_2080,{5U,3U,0U}},
{MOVE_2080,{6U,3U,0U}},
{MOVE_2080,{7U,3U,0U}},
{MOVE_2088,{0U,3U,0U}},
{MOVE_2088,{1U,3U,0U}},
{MOVE_2088,{2U,3U,0U}},
{MOVE_2088,{3U,3U,0U}},
{MOVE_2088,{4U,3U,0U}},
{MOVE_2088,{5U,3U,0U}},
{MOVE_2088,{6U,3U,0U}},
{MOVE_2088,{7U,3U,0U}},
{MOVE_2090,{0U,3U,0U}},
{MOVE_2090,{1U,3U,0U}},
{MOVE_2090,{2U,3U,0U}},
{MOVE_2090,{3U,3U,0U}},
{MOVE_2090,{4U,3U,0U}},
{MOVE_2090,{5U,3U,0U}},
{MOVE_2090,{6U,3U,0U}},
{MOVE_2090,{7U,3U,0U}},
{MOVE_2098,{0U,3U,0U}},
{MOVE_2098,{1U,3U,0U}},
{MOVE_2098,{2U,3U,0U}},
{MOVE_2098,{3U,3U,0U}},
{MOVE_2098,{4U,3U,0U}},
{MOVE_2098,{5U,3U,0U}},
{MOVE_2098,{6U,3U,0U}},
{MOVE_2098,{7U,3U,0U}},
{MOVE_20A0,{0U,3U,0U}},
{MOVE_20A0,{1U,3U,0U}},
{MOVE_20A0,{2U,3U,0U}},
{MOVE_20A0,{3U,3U,0U}},
{MOVE_20A0,{4U,3U,0U}},
{MOVE_20A0,{5U,3U,0U}},
{MOVE_20A0,{6U,3U,0U}},
{MOVE_20A0,{7U,3U,0U}},
{MOVE_20A8,{0U,3U,0U}},
{MOVE_20A8,{1U,3U,0U}},
{MOVE_20A8,{2U,3U,0U}},
{MOVE_20A8,{3U,3U,0U}},
{MOVE_20A8,{4U,3U,0U}},
{MOVE_20A8,{5U,3U,0U}},
{MOVE_20A8,{6U,3U,0U}},
{MOVE_20A8,{7U,3U,0U}},
{MOVE_20B0,{0U,3U,0U}},
{MOVE_20B0,{1U,3U,0U}},
{MOVE_20B0,{2U,3U,0U}},
{MOVE_20B0,{3U,3U,0U}},
{MOVE_20B0,{4U,3U,0U}},
{MOVE_20B0,{5U,3U,0U}},
{MOVE_20B0,{6U,3U,0U}},
{MOVE_20B0,{7U,3U,0U}},
{MOVE_20B8,{0U,3U,0U}},
{MOVE_20B9,{0U,3U,0U}},
{MOVE_20BA,{0U,3U,0U}},
{MOVE_20BB,{0U,3U,0U}},
{MOVE_20BC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_20C0,{0U,3U,0U}},
{MOVE_20C0,{1U,3U,0U}},
{MOVE_20C0,{2U,3U,0U}},
{MOVE_20C0,{3U,3U,0U}},
{MOVE_20C0,{4U,3U,0U}},
{MOVE_20C0,{5U,3U,0U}},
{MOVE_20C0,{6U,3U,0U}},
{MOVE_20C0,{7U,3U,0U}},
{MOVE_20C8,{0U,3U,0U}},
{MOVE_20C8,{1U,3U,0U}},
{MOVE_20C8,{2U,3U,0U}},
{MOVE_20C8,{3U,3U,0U}},
{MOVE_20C8,{4U,3U,0U}},
{MOVE_20C8,{5U,3U,0U}},
{MOVE_20C8,{6U,3U,0U}},
{MOVE_20C8,{7U,3U,0U}},
{MOVE_20D0,{0U,3U,0U}},
{MOVE_20D0,{1U,3U,0U}},
{MOVE_20D0,{2U,3U,0U}},
{MOVE_20D0,{3U,3U,0U}},
{MOVE_20D0,{4U,3U,0U}},
{MOVE_20D0,{5U,3U,0U}},
{MOVE_20D0,{6U,3U,0U}},
{MOVE_20D0,{7U,3U,0U}},
{MOVE_20D8,{0U,3U,0U}},
{MOVE_20D8,{1U,3U,0U}},
{MOVE_20D8,{2U,3U,0U}},
{MOVE_20D8,{3U,3U,0U}},
{MOVE_20D8,{4U,3U,0U}},
{MOVE_20D8,{5U,3U,0U}},
{MOVE_20D8,{6U,3U,0U}},
{MOVE_20D8,{7U,3U,0U}},
{MOVE_20E0,{0U,3U,0U}},
{MOVE_20E0,{1U,3U,0U}},
{MOVE_20E0,{2U,3U,0U}},
{MOVE_20E0,{3U,3U,0U}},
{MOVE_20E0,{4U,3U,0U}},
{MOVE_20E0,{5U,3U,0U}},
{MOVE_20E0,{6U,3U,0U}},
{MOVE_20E0,{7U,3U,0U}},
{MOVE_20E8,{0U,3U,0U}},
{MOVE_20E8,{1U,3U,0U}},
{MOVE_20E8,{2U,3U,0U}},
{MOVE_20E8,{3U,3U,0U}},
{MOVE_20E8,{4U,3U,0U}},
{MOVE_20E8,{5U,3U,0U}},
{MOVE_20E8,{6U,3U,0U}},
{MOVE_20E8,{7U,3U,0U}},
{MOVE_20F0,{0U,3U,0U}},
{MOVE_20F0,{1U,3U,0U}},
{MOVE_20F0,{2U,3U,0U}},
{MOVE_20F0,{3U,3U,0U}},
{MOVE_20F0,{4U,3U,0U}},
{MOVE_20F0,{5U,3U,0U}},
{MOVE_20F0,{6U,3U,0U}},
{MOVE_20F0,{7U,3U,0U}},
{MOVE_20F8,{0U,3U,0U}},
{MOVE_20F9,{0U,3U,0U}},
{MOVE_20FA,{0U,3U,0U}},
{MOVE_20FB,{0U,3U,0U}},
{MOVE_20FC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2100,{0U,3U,0U}},
{MOVE_2100,{1U,3U,0U}},
{MOVE_2100,{2U,3U,0U}},
{MOVE_2100,{3U,3U,0U}},
{MOVE_2100,{4U,3U,0U}},
{MOVE_2100,{5U,3U,0U}},
{MOVE_2100,{6U,3U,0U}},
{MOVE_2100,{7U,3U,0U}},
{MOVE_2108,{0U,3U,0U}},
{MOVE_2108,{1U,3U,0U}},
{MOVE_2108,{2U,3U,0U}},
{MOVE_2108,{3U,3U,0U}},
{MOVE_2108,{4U,3U,0U}},
{MOVE_2108,{5U,3U,0U}},
{MOVE_2108,{6U,3U,0U}},
{MOVE_2108,{7U,3U,0U}},
{MOVE_2110,{0U,3U,0U}},
{MOVE_2110,{1U,3U,0U}},
{MOVE_2110,{2U,3U,0U}},
{MOVE_2110,{3U,3U,0U}},
{MOVE_2110,{4U,3U,0U}},
{MOVE_2110,{5U,3U,0U}},
{MOVE_2110,{6U,3U,0U}},
{MOVE_2110,{7U,3U,0U}},
{MOVE_2118,{0U,3U,0U}},
{MOVE_2118,{1U,3U,0U}},
{MOVE_2118,{2U,3U,0U}},
{MOVE_2118,{3U,3U,0U}},
{MOVE_2118,{4U,3U,0U}},
{MOVE_2118,{5U,3U,0U}},
{MOVE_2118,{6U,3U,0U}},
{MOVE_2118,{7U,3U,0U}},
{MOVE_2120,{0U,3U,0U}},
{MOVE_2120,{1U,3U,0U}},
{MOVE_2120,{2U,3U,0U}},
{MOVE_2120,{3U,3U,0U}},
{MOVE_2120,{4U,3U,0U}},
{MOVE_2120,{5U,3U,0U}},
{MOVE_2120,{6U,3U,0U}},
{MOVE_2120,{7U,3U,0U}},
{MOVE_2128,{0U,3U,0U}},
{MOVE_2128,{1U,3U,0U}},
{MOVE_2128,{2U,3U,0U}},
{MOVE_2128,{3U,3U,0U}},
{MOVE_2128,{4U,3U,0U}},
{MOVE_2128,{5U,3U,0U}},
{MOVE_2128,{6U,3U,0U}},
{MOVE_2128,{7U,3U,0U}},
{MOVE_2130,{0U,3U,0U}},
{MOVE_2130,{1U,3U,0U}},
{MOVE_2130,{2U,3U,0U}},
{MOVE_2130,{3U,3U,0U}},
{MOVE_2130,{4U,3U,0U}},
{MOVE_2130,{5U,3U,0U}},
{MOVE_2130,{6U,3U,0U}},
{MOVE_2130,{7U,3U,0U}},
{MOVE_2138,{0U,3U,0U}},
{MOVE_2139,{0U,3U,0U}},
{MOVE_213A,{0U,3U,0U}},
{MOVE_213B,{0U,3U,0U}},
{MOVE_213C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2140,{0U,3U,0U}},
{MOVE_2140,{1U,3U,0U}},
{MOVE_2140,{2U,3U,0U}},
{MOVE_2140,{3U,3U,0U}},
{MOVE_2140,{4U,3U,0U}},
{MOVE_2140,{5U,3U,0U}},
{MOVE_2140,{6U,3U,0U}},
{MOVE_2140,{7U,3U,0U}},
{MOVE_2148,{0U,3U,0U}},
{MOVE_2148,{1U,3U,0U}},
{MOVE_2148,{2U,3U,0U}},
{MOVE_2148,{3U,3U,0U}},
{MOVE_2148,{4U,3U,0U}},
{MOVE_2148,{5U,3U,0U}},
{MOVE_2148,{6U,3U,0U}},
{MOVE_2148,{7U,3U,0U}},
{MOVE_2150,{0U,3U,0U}},
{MOVE_2150,{1U,3U,0U}},
{MOVE_2150,{2U,3U,0U}},
{MOVE_2150,{3U,3U,0U}},
{MOVE_2150,{4U,3U,0U}},
{MOVE_2150,{5U,3U,0U}},
{MOVE_2150,{6U,3U,0U}},
{MOVE_2150,{7U,3U,0U}},
{MOVE_2158,{0U,3U,0U}},
{MOVE_2158,{1U,3U,0U}},
{MOVE_2158,{2U,3U,0U}},
{MOVE_2158,{3U,3U,0U}},
{MOVE_2158,{4U,3U,0U}},
{MOVE_2158,{5U,3U,0U}},
{MOVE_2158,{6U,3U,0U}},
{MOVE_2158,{7U,3U,0U}},
{MOVE_2160,{0U,3U,0U}},
{MOVE_2160,{1U,3U,0U}},
{MOVE_2160,{2U,3U,0U}},
{MOVE_2160,{3U,3U,0U}},
{MOVE_2160,{4U,3U,0U}},
{MOVE_2160,{5U,3U,0U}},
{MOVE_2160,{6U,3U,0U}},
{MOVE_2160,{7U,3U,0U}},
{MOVE_2168,{0U,3U,0U}},
{MOVE_2168,{1U,3U,0U}},
{MOVE_2168,{2U,3U,0U}},
{MOVE_2168,{3U,3U,0U}},
{MOVE_2168,{4U,3U,0U}},
{MOVE_2168,{5U,3U,0U}},
{MOVE_2168,{6U,3U,0U}},
{MOVE_2168,{7U,3U,0U}},
{MOVE_2170,{0U,3U,0U}},
{MOVE_2170,{1U,3U,0U}},
{MOVE_2170,{2U,3U,0U}},
{MOVE_2170,{3U,3U,0U}},
{MOVE_2170,{4U,3U,0U}},
{MOVE_2170,{5U,3U,0U}},
{MOVE_2170,{6U,3U,0U}},
{MOVE_2170,{7U,3U,0U}},
{MOVE_2178,{0U,3U,0U}},
{MOVE_2179,{0U,3U,0U}},
{MOVE_217A,{0U,3U,0U}},
{MOVE_217B,{0U,3U,0U}},
{MOVE_217C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2180,{0U,3U,0U}},
{MOVE_2180,{1U,3U,0U}},
{MOVE_2180,{2U,3U,0U}},
{MOVE_2180,{3U,3U,0U}},
{MOVE_2180,{4U,3U,0U}},
{MOVE_2180,{5U,3U,0U}},
{MOVE_2180,{6U,3U,0U}},
{MOVE_2180,{7U,3U,0U}},
{MOVE_2188,{0U,3U,0U}},
{MOVE_2188,{1U,3U,0U}},
{MOVE_2188,{2U,3U,0U}},
{MOVE_2188,{3U,3U,0U}},
{MOVE_2188,{4U,3U,0U}},
{MOVE_2188,{5U,3U,0U}},
{MOVE_2188,{6U,3U,0U}},
{MOVE_2188,{7U,3U,0U}},
{MOVE_2190,{0U,3U,0U}},
{MOVE_2190,{1U,3U,0U}},
{MOVE_2190,{2U,3U,0U}},
{MOVE_2190,{3U,3U,0U}},
{MOVE_2190,{4U,3U,0U}},
{MOVE_2190,{5U,3U,0U}},
{MOVE_2190,{6U,3U,0U}},
{MOVE_2190,{7U,3U,0U}},
{MOVE_2198,{0U,3U,0U}},
{MOVE_2198,{1U,3U,0U}},
{MOVE_2198,{2U,3U,0U}},
{MOVE_2198,{3U,3U,0U}},
{MOVE_2198,{4U,3U,0U}},
{MOVE_2198,{5U,3U,0U}},
{MOVE_2198,{6U,3U,0U}},
{MOVE_2198,{7U,3U,0U}},
{MOVE_21A0,{0U,3U,0U}},
{MOVE_21A0,{1U,3U,0U}},
{MOVE_21A0,{2U,3U,0U}},
{MOVE_21A0,{3U,3U,0U}},
{MOVE_21A0,{4U,3U,0U}},
{MOVE_21A0,{5U,3U,0U}},
{MOVE_21A0,{6U,3U,0U}},
{MOVE_21A0,{7U,3U,0U}},
{MOVE_21A8,{0U,3U,0U}},
{MOVE_21A8,{1U,3U,0U}},
{MOVE_21A8,{2U,3U,0U}},
{MOVE_21A8,{3U,3U,0U}},
{MOVE_21A8,{4U,3U,0U}},
{MOVE_21A8,{5U,3U,0U}},
{MOVE_21A8,{6U,3U,0U}},
{MOVE_21A8,{7U,3U,0U}},
{MOVE_21B0,{0U,3U,0U}},
{MOVE_21B0,{1U,3U,0U}},
{MOVE_21B0,{2U,3U,0U}},
{MOVE_21B0,{3U,3U,0U}},
{MOVE_21B0,{4U,3U,0U}},
{MOVE_21B0,{5U,3U,0U}},
{MOVE_21B0,{6U,3U,0U}},
{MOVE_21B0,{7U,3U,0U}},
{MOVE_21B8,{0U,3U,0U}},
{MOVE_21B9,{0U,3U,0U}},
{MOVE_21BA,{0U,3U,0U}},
{MOVE_21BB,{0U,3U,0U}},
{MOVE_21BC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2000,{0U,4U,0U}},
{MOVE_2000,{1U,4U,0U}},
{MOVE_2000,{2U,4U,0U}},
{MOVE_2000,{3U,4U,0U}},
{MOVE_2000,{4U,4U,0U}},
{MOVE_2000,{5U,4U,0U}},
{MOVE_2000,{6U,4U,0U}},
{MOVE_2000,{7U,4U,0U}},
{MOVE_2008,{0U,4U,0U}},
{MOVE_2008,{1U,4U,0U}},
{MOVE_2008,{2U,4U,0U}},
{MOVE_2008,{3U,4U,0U}},
{MOVE_2008,{4U,4U,0U}},
{MOVE_2008,{5U,4U,0U}},
{MOVE_2008,{6U,4U,0U}},
{MOVE_2008,{7U,4U,0U}},
{MOVE_2010,{0U,4U,0U}},
{MOVE_2010,{1U,4U,0U}},
{MOVE_2010,{2U,4U,0U}},
{MOVE_2010,{3U,4U,0U}},
{MOVE_2010,{4U,4U,0U}},
{MOVE_2010,{5U,4U,0U}},
{MOVE_2010,{6U,4U,0U}},
{MOVE_2010,{7U,4U,0U}},
{MOVE_2018,{0U,4U,0U}},
{MOVE_2018,{1U,4U,0U}},
{MOVE_2018,{2U,4U,0U}},
{MOVE_2018,{3U,4U,0U}},
{MOVE_2018,{4U,4U,0U}},
{MOVE_2018,{5U,4U,0U}},
{MOVE_2018,{6U,4U,0U}},
{MOVE_2018,{7U,4U,0U}},
{MOVE_2020,{0U,4U,0U}},
{MOVE_2020,{1U,4U,0U}},
{MOVE_2020,{2U,4U,0U}},
{MOVE_2020,{3U,4U,0U}},
{MOVE_2020,{4U,4U,0U}},
{MOVE_2020,{5U,4U,0U}},
{MOVE_2020,{6U,4U,0U}},
{MOVE_2020,{7U,4U,0U}},
{MOVE_2028,{0U,4U,0U}},
{MOVE_2028,{1U,4U,0U}},
{MOVE_2028,{2U,4U,0U}},
{MOVE_2028,{3U,4U,0U}},
{MOVE_2028,{4U,4U,0U}},
{MOVE_2028,{5U,4U,0U}},
{MOVE_2028,{6U,4U,0U}},
{MOVE_2028,{7U,4U,0U}},
{MOVE_2030,{0U,4U,0U}},
{MOVE_2030,{1U,4U,0U}},
{MOVE_2030,{2U,4U,0U}},
{MOVE_2030,{3U,4U,0U}},
{MOVE_2030,{4U,4U,0U}},
{MOVE_2030,{5U,4U,0U}},
{MOVE_2030,{6U,4U,0U}},
{MOVE_2030,{7U,4U,0U}},
{MOVE_2038,{0U,4U,0U}},
{MOVE_2039,{0U,4U,0U}},
{MOVE_203A,{0U,4U,0U}},
{MOVE_203B,{0U,4U,0U}},
{MOVE_203C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_2040,{0U,4U,0U}},
{MOVEA_2040,{1U,4U,0U}},
{MOVEA_2040,{2U,4U,0U}},
{MOVEA_2040,{3U,4U,0U}},
{MOVEA_2040,{4U,4U,0U}},
{MOVEA_2040,{5U,4U,0U}},
{MOVEA_2040,{6U,4U,0U}},
{MOVEA_2040,{7U,4U,0U}},
{MOVEA_2048,{0U,4U,0U}},
{MOVEA_2048,{1U,4U,0U}},
{MOVEA_2048,{2U,4U,0U}},
{MOVEA_2048,{3U,4U,0U}},
{MOVEA_2048,{4U,4U,0U}},
{MOVEA_2048,{5U,4U,0U}},
{MOVEA_2048,{6U,4U,0U}},
{MOVEA_2048,{7U,4U,0U}},
{MOVEA_2050,{0U,4U,0U}},
{MOVEA_2050,{1U,4U,0U}},
{MOVEA_2050,{2U,4U,0U}},
{MOVEA_2050,{3U,4U,0U}},
{MOVEA_2050,{4U,4U,0U}},
{MOVEA_2050,{5U,4U,0U}},
{MOVEA_2050,{6U,4U,0U}},
{MOVEA_2050,{7U,4U,0U}},
{MOVEA_2058,{0U,4U,0U}},
{MOVEA_2058,{1U,4U,0U}},
{MOVEA_2058,{2U,4U,0U}},
{MOVEA_2058,{3U,4U,0U}},
{MOVEA_2058,{4U,4U,0U}},
{MOVEA_2058,{5U,4U,0U}},
{MOVEA_2058,{6U,4U,0U}},
{MOVEA_2058,{7U,4U,0U}},
{MOVEA_2060,{0U,4U,0U}},
{MOVEA_2060,{1U,4U,0U}},
{MOVEA_2060,{2U,4U,0U}},
{MOVEA_2060,{3U,4U,0U}},
{MOVEA_2060,{4U,4U,0U}},
{MOVEA_2060,{5U,4U,0U}},
{MOVEA_2060,{6U,4U,0U}},
{MOVEA_2060,{7U,4U,0U}},
{MOVEA_2068,{0U,4U,0U}},
{MOVEA_2068,{1U,4U,0U}},
{MOVEA_2068,{2U,4U,0U}},
{MOVEA_2068,{3U,4U,0U}},
{MOVEA_2068,{4U,4U,0U}},
{MOVEA_2068,{5U,4U,0U}},
{MOVEA_2068,{6U,4U,0U}},
{MOVEA_2068,{7U,4U,0U}},
{MOVEA_2070,{0U,4U,0U}},
{MOVEA_2070,{1U,4U,0U}},
{MOVEA_2070,{2U,4U,0U}},
{MOVEA_2070,{3U,4U,0U}},
{MOVEA_2070,{4U,4U,0U}},
{MOVEA_2070,{5U,4U,0U}},
{MOVEA_2070,{6U,4U,0U}},
{MOVEA_2070,{7U,4U,0U}},
{MOVEA_2078,{0U,4U,0U}},
{MOVEA_2079,{0U,4U,0U}},
{MOVEA_207A,{0U,4U,0U}},
{MOVEA_207B,{0U,4U,0U}},
{MOVEA_207C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2080,{0U,4U,0U}},
{MOVE_2080,{1U,4U,0U}},
{MOVE_2080,{2U,4U,0U}},
{MOVE_2080,{3U,4U,0U}},
{MOVE_2080,{4U,4U,0U}},
{MOVE_2080,{5U,4U,0U}},
{MOVE_2080,{6U,4U,0U}},
{MOVE_2080,{7U,4U,0U}},
{MOVE_2088,{0U,4U,0U}},
{MOVE_2088,{1U,4U,0U}},
{MOVE_2088,{2U,4U,0U}},
{MOVE_2088,{3U,4U,0U}},
{MOVE_2088,{4U,4U,0U}},
{MOVE_2088,{5U,4U,0U}},
{MOVE_2088,{6U,4U,0U}},
{MOVE_2088,{7U,4U,0U}},
{MOVE_2090,{0U,4U,0U}},
{MOVE_2090,{1U,4U,0U}},
{MOVE_2090,{2U,4U,0U}},
{MOVE_2090,{3U,4U,0U}},
{MOVE_2090,{4U,4U,0U}},
{MOVE_2090,{5U,4U,0U}},
{MOVE_2090,{6U,4U,0U}},
{MOVE_2090,{7U,4U,0U}},
{MOVE_2098,{0U,4U,0U}},
{MOVE_2098,{1U,4U,0U}},
{MOVE_2098,{2U,4U,0U}},
{MOVE_2098,{3U,4U,0U}},
{MOVE_2098,{4U,4U,0U}},
{MOVE_2098,{5U,4U,0U}},
{MOVE_2098,{6U,4U,0U}},
{MOVE_2098,{7U,4U,0U}},
{MOVE_20A0,{0U,4U,0U}},
{MOVE_20A0,{1U,4U,0U}},
{MOVE_20A0,{2U,4U,0U}},
{MOVE_20A0,{3U,4U,0U}},
{MOVE_20A0,{4U,4U,0U}},
{MOVE_20A0,{5U,4U,0U}},
{MOVE_20A0,{6U,4U,0U}},
{MOVE_20A0,{7U,4U,0U}},
{MOVE_20A8,{0U,4U,0U}},
{MOVE_20A8,{1U,4U,0U}},
{MOVE_20A8,{2U,4U,0U}},
{MOVE_20A8,{3U,4U,0U}},
{MOVE_20A8,{4U,4U,0U}},
{MOVE_20A8,{5U,4U,0U}},
{MOVE_20A8,{6U,4U,0U}},
{MOVE_20A8,{7U,4U,0U}},
{MOVE_20B0,{0U,4U,0U}},
{MOVE_20B0,{1U,4U,0U}},
{MOVE_20B0,{2U,4U,0U}},
{MOVE_20B0,{3U,4U,0U}},
{MOVE_20B0,{4U,4U,0U}},
{MOVE_20B0,{5U,4U,0U}},
{MOVE_20B0,{6U,4U,0U}},
{MOVE_20B0,{7U,4U,0U}},
{MOVE_20B8,{0U,4U,0U}},
{MOVE_20B9,{0U,4U,0U}},
{MOVE_20BA,{0U,4U,0U}},
{MOVE_20BB,{0U,4U,0U}},
{MOVE_20BC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_20C0,{0U,4U,0U}},
{MOVE_20C0,{1U,4U,0U}},
{MOVE_20C0,{2U,4U,0U}},
{MOVE_20C0,{3U,4U,0U}},
{MOVE_20C0,{4U,4U,0U}},
{MOVE_20C0,{5U,4U,0U}},
{MOVE_20C0,{6U,4U,0U}},
{MOVE_20C0,{7U,4U,0U}},
{MOVE_20C8,{0U,4U,0U}},
{MOVE_20C8,{1U,4U,0U}},
{MOVE_20C8,{2U,4U,0U}},
{MOVE_20C8,{3U,4U,0U}},
{MOVE_20C8,{4U,4U,0U}},
{MOVE_20C8,{5U,4U,0U}},
{MOVE_20C8,{6U,4U,0U}},
{MOVE_20C8,{7U,4U,0U}},
{MOVE_20D0,{0U,4U,0U}},
{MOVE_20D0,{1U,4U,0U}},
{MOVE_20D0,{2U,4U,0U}},
{MOVE_20D0,{3U,4U,0U}},
{MOVE_20D0,{4U,4U,0U}},
{MOVE_20D0,{5U,4U,0U}},
{MOVE_20D0,{6U,4U,0U}},
{MOVE_20D0,{7U,4U,0U}},
{MOVE_20D8,{0U,4U,0U}},
{MOVE_20D8,{1U,4U,0U}},
{MOVE_20D8,{2U,4U,0U}},
{MOVE_20D8,{3U,4U,0U}},
{MOVE_20D8,{4U,4U,0U}},
{MOVE_20D8,{5U,4U,0U}},
{MOVE_20D8,{6U,4U,0U}},
{MOVE_20D8,{7U,4U,0U}},
{MOVE_20E0,{0U,4U,0U}},
{MOVE_20E0,{1U,4U,0U}},
{MOVE_20E0,{2U,4U,0U}},
{MOVE_20E0,{3U,4U,0U}},
{MOVE_20E0,{4U,4U,0U}},
{MOVE_20E0,{5U,4U,0U}},
{MOVE_20E0,{6U,4U,0U}},
{MOVE_20E0,{7U,4U,0U}},
{MOVE_20E8,{0U,4U,0U}},
{MOVE_20E8,{1U,4U,0U}},
{MOVE_20E8,{2U,4U,0U}},
{MOVE_20E8,{3U,4U,0U}},
{MOVE_20E8,{4U,4U,0U}},
{MOVE_20E8,{5U,4U,0U}},
{MOVE_20E8,{6U,4U,0U}},
{MOVE_20E8,{7U,4U,0U}},
{MOVE_20F0,{0U,4U,0U}},
{MOVE_20F0,{1U,4U,0U}},
{MOVE_20F0,{2U,4U,0U}},
{MOVE_20F0,{3U,4U,0U}},
{MOVE_20F0,{4U,4U,0U}},
{MOVE_20F0,{5U,4U,0U}},
{MOVE_20F0,{6U,4U,0U}},
{MOVE_20F0,{7U,4U,0U}},
{MOVE_20F8,{0U,4U,0U}},
{MOVE_20F9,{0U,4U,0U}},
{MOVE_20FA,{0U,4U,0U}},
{MOVE_20FB,{0U,4U,0U}},
{MOVE_20FC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2100,{0U,4U,0U}},
{MOVE_2100,{1U,4U,0U}},
{MOVE_2100,{2U,4U,0U}},
{MOVE_2100,{3U,4U,0U}},
{MOVE_2100,{4U,4U,0U}},
{MOVE_2100,{5U,4U,0U}},
{MOVE_2100,{6U,4U,0U}},
{MOVE_2100,{7U,4U,0U}},
{MOVE_2108,{0U,4U,0U}},
{MOVE_2108,{1U,4U,0U}},
{MOVE_2108,{2U,4U,0U}},
{MOVE_2108,{3U,4U,0U}},
{MOVE_2108,{4U,4U,0U}},
{MOVE_2108,{5U,4U,0U}},
{MOVE_2108,{6U,4U,0U}},
{MOVE_2108,{7U,4U,0U}},
{MOVE_2110,{0U,4U,0U}},
{MOVE_2110,{1U,4U,0U}},
{MOVE_2110,{2U,4U,0U}},
{MOVE_2110,{3U,4U,0U}},
{MOVE_2110,{4U,4U,0U}},
{MOVE_2110,{5U,4U,0U}},
{MOVE_2110,{6U,4U,0U}},
{MOVE_2110,{7U,4U,0U}},
{MOVE_2118,{0U,4U,0U}},
{MOVE_2118,{1U,4U,0U}},
{MOVE_2118,{2U,4U,0U}},
{MOVE_2118,{3U,4U,0U}},
{MOVE_2118,{4U,4U,0U}},
{MOVE_2118,{5U,4U,0U}},
{MOVE_2118,{6U,4U,0U}},
{MOVE_2118,{7U,4U,0U}},
{MOVE_2120,{0U,4U,0U}},
{MOVE_2120,{1U,4U,0U}},
{MOVE_2120,{2U,4U,0U}},
{MOVE_2120,{3U,4U,0U}},
{MOVE_2120,{4U,4U,0U}},
{MOVE_2120,{5U,4U,0U}},
{MOVE_2120,{6U,4U,0U}},
{MOVE_2120,{7U,4U,0U}},
{MOVE_2128,{0U,4U,0U}},
{MOVE_2128,{1U,4U,0U}},
{MOVE_2128,{2U,4U,0U}},
{MOVE_2128,{3U,4U,0U}},
{MOVE_2128,{4U,4U,0U}},
{MOVE_2128,{5U,4U,0U}},
{MOVE_2128,{6U,4U,0U}},
{MOVE_2128,{7U,4U,0U}},
{MOVE_2130,{0U,4U,0U}},
{MOVE_2130,{1U,4U,0U}},
{MOVE_2130,{2U,4U,0U}},
{MOVE_2130,{3U,4U,0U}},
{MOVE_2130,{4U,4U,0U}},
{MOVE_2130,{5U,4U,0U}},
{MOVE_2130,{6U,4U,0U}},
{MOVE_2130,{7U,4U,0U}},
{MOVE_2138,{0U,4U,0U}},
{MOVE_2139,{0U,4U,0U}},
{MOVE_213A,{0U,4U,0U}},
{MOVE_213B,{0U,4U,0U}},
{MOVE_213C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2140,{0U,4U,0U}},
{MOVE_2140,{1U,4U,0U}},
{MOVE_2140,{2U,4U,0U}},
{MOVE_2140,{3U,4U,0U}},
{MOVE_2140,{4U,4U,0U}},
{MOVE_2140,{5U,4U,0U}},
{MOVE_2140,{6U,4U,0U}},
{MOVE_2140,{7U,4U,0U}},
{MOVE_2148,{0U,4U,0U}},
{MOVE_2148,{1U,4U,0U}},
{MOVE_2148,{2U,4U,0U}},
{MOVE_2148,{3U,4U,0U}},
{MOVE_2148,{4U,4U,0U}},
{MOVE_2148,{5U,4U,0U}},
{MOVE_2148,{6U,4U,0U}},
{MOVE_2148,{7U,4U,0U}},
{MOVE_2150,{0U,4U,0U}},
{MOVE_2150,{1U,4U,0U}},
{MOVE_2150,{2U,4U,0U}},
{MOVE_2150,{3U,4U,0U}},
{MOVE_2150,{4U,4U,0U}},
{MOVE_2150,{5U,4U,0U}},
{MOVE_2150,{6U,4U,0U}},
{MOVE_2150,{7U,4U,0U}},
{MOVE_2158,{0U,4U,0U}},
{MOVE_2158,{1U,4U,0U}},
{MOVE_2158,{2U,4U,0U}},
{MOVE_2158,{3U,4U,0U}},
{MOVE_2158,{4U,4U,0U}},
{MOVE_2158,{5U,4U,0U}},
{MOVE_2158,{6U,4U,0U}},
{MOVE_2158,{7U,4U,0U}},
{MOVE_2160,{0U,4U,0U}},
{MOVE_2160,{1U,4U,0U}},
{MOVE_2160,{2U,4U,0U}},
{MOVE_2160,{3U,4U,0U}},
{MOVE_2160,{4U,4U,0U}},
{MOVE_2160,{5U,4U,0U}},
{MOVE_2160,{6U,4U,0U}},
{MOVE_2160,{7U,4U,0U}},
{MOVE_2168,{0U,4U,0U}},
{MOVE_2168,{1U,4U,0U}},
{MOVE_2168,{2U,4U,0U}},
{MOVE_2168,{3U,4U,0U}},
{MOVE_2168,{4U,4U,0U}},
{MOVE_2168,{5U,4U,0U}},
{MOVE_2168,{6U,4U,0U}},
{MOVE_2168,{7U,4U,0U}},
{MOVE_2170,{0U,4U,0U}},
{MOVE_2170,{1U,4U,0U}},
{MOVE_2170,{2U,4U,0U}},
{MOVE_2170,{3U,4U,0U}},
{MOVE_2170,{4U,4U,0U}},
{MOVE_2170,{5U,4U,0U}},
{MOVE_2170,{6U,4U,0U}},
{MOVE_2170,{7U,4U,0U}},
{MOVE_2178,{0U,4U,0U}},
{MOVE_2179,{0U,4U,0U}},
{MOVE_217A,{0U,4U,0U}},
{MOVE_217B,{0U,4U,0U}},
{MOVE_217C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2180,{0U,4U,0U}},
{MOVE_2180,{1U,4U,0U}},
{MOVE_2180,{2U,4U,0U}},
{MOVE_2180,{3U,4U,0U}},
{MOVE_2180,{4U,4U,0U}},
{MOVE_2180,{5U,4U,0U}},
{MOVE_2180,{6U,4U,0U}},
{MOVE_2180,{7U,4U,0U}},
{MOVE_2188,{0U,4U,0U}},
{MOVE_2188,{1U,4U,0U}},
{MOVE_2188,{2U,4U,0U}},
{MOVE_2188,{3U,4U,0U}},
{MOVE_2188,{4U,4U,0U}},
{MOVE_2188,{5U,4U,0U}},
{MOVE_2188,{6U,4U,0U}},
{MOVE_2188,{7U,4U,0U}},
{MOVE_2190,{0U,4U,0U}},
{MOVE_2190,{1U,4U,0U}},
{MOVE_2190,{2U,4U,0U}},
{MOVE_2190,{3U,4U,0U}},
{MOVE_2190,{4U,4U,0U}},
{MOVE_2190,{5U,4U,0U}},
{MOVE_2190,{6U,4U,0U}},
{MOVE_2190,{7U,4U,0U}},
{MOVE_2198,{0U,4U,0U}},
{MOVE_2198,{1U,4U,0U}},
{MOVE_2198,{2U,4U,0U}},
{MOVE_2198,{3U,4U,0U}},
{MOVE_2198,{4U,4U,0U}},
{MOVE_2198,{5U,4U,0U}},
{MOVE_2198,{6U,4U,0U}},
{MOVE_2198,{7U,4U,0U}},
{MOVE_21A0,{0U,4U,0U}},
{MOVE_21A0,{1U,4U,0U}},
{MOVE_21A0,{2U,4U,0U}},
{MOVE_21A0,{3U,4U,0U}},
{MOVE_21A0,{4U,4U,0U}},
{MOVE_21A0,{5U,4U,0U}},
{MOVE_21A0,{6U,4U,0U}},
{MOVE_21A0,{7U,4U,0U}},
{MOVE_21A8,{0U,4U,0U}},
{MOVE_21A8,{1U,4U,0U}},
{MOVE_21A8,{2U,4U,0U}},
{MOVE_21A8,{3U,4U,0U}},
{MOVE_21A8,{4U,4U,0U}},
{MOVE_21A8,{5U,4U,0U}},
{MOVE_21A8,{6U,4U,0U}},
{MOVE_21A8,{7U,4U,0U}},
{MOVE_21B0,{0U,4U,0U}},
{MOVE_21B0,{1U,4U,0U}},
{MOVE_21B0,{2U,4U,0U}},
{MOVE_21B0,{3U,4U,0U}},
{MOVE_21B0,{4U,4U,0U}},
{MOVE_21B0,{5U,4U,0U}},
{MOVE_21B0,{6U,4U,0U}},
{MOVE_21B0,{7U,4U,0U}},
{MOVE_21B8,{0U,4U,0U}},
{MOVE_21B9,{0U,4U,0U}},
{MOVE_21BA,{0U,4U,0U}},
{MOVE_21BB,{0U,4U,0U}},
{MOVE_21BC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2000,{0U,5U,0U}},
{MOVE_2000,{1U,5U,0U}},
{MOVE_2000,{2U,5U,0U}},
{MOVE_2000,{3U,5U,0U}},
{MOVE_2000,{4U,5U,0U}},
{MOVE_2000,{5U,5U,0U}},
{MOVE_2000,{6U,5U,0U}},
{MOVE_2000,{7U,5U,0U}},
{MOVE_2008,{0U,5U,0U}},
{MOVE_2008,{1U,5U,0U}},
{MOVE_2008,{2U,5U,0U}},
{MOVE_2008,{3U,5U,0U}},
{MOVE_2008,{4U,5U,0U}},
{MOVE_2008,{5U,5U,0U}},
{MOVE_2008,{6U,5U,0U}},
{MOVE_2008,{7U,5U,0U}},
{MOVE_2010,{0U,5U,0U}},
{MOVE_2010,{1U,5U,0U}},
{MOVE_2010,{2U,5U,0U}},
{MOVE_2010,{3U,5U,0U}},
{MOVE_2010,{4U,5U,0U}},
{MOVE_2010,{5U,5U,0U}},
{MOVE_2010,{6U,5U,0U}},
{MOVE_2010,{7U,5U,0U}},
{MOVE_2018,{0U,5U,0U}},
{MOVE_2018,{1U,5U,0U}},
{MOVE_2018,{2U,5U,0U}},
{MOVE_2018,{3U,5U,0U}},
{MOVE_2018,{4U,5U,0U}},
{MOVE_2018,{5U,5U,0U}},
{MOVE_2018,{6U,5U,0U}},
{MOVE_2018,{7U,5U,0U}},
{MOVE_2020,{0U,5U,0U}},
{MOVE_2020,{1U,5U,0U}},
{MOVE_2020,{2U,5U,0U}},
{MOVE_2020,{3U,5U,0U}},
{MOVE_2020,{4U,5U,0U}},
{MOVE_2020,{5U,5U,0U}},
{MOVE_2020,{6U,5U,0U}},
{MOVE_2020,{7U,5U,0U}},
{MOVE_2028,{0U,5U,0U}},
{MOVE_2028,{1U,5U,0U}},
{MOVE_2028,{2U,5U,0U}},
{MOVE_2028,{3U,5U,0U}},
{MOVE_2028,{4U,5U,0U}},
{MOVE_2028,{5U,5U,0U}},
{MOVE_2028,{6U,5U,0U}},
{MOVE_2028,{7U,5U,0U}},
{MOVE_2030,{0U,5U,0U}},
{MOVE_2030,{1U,5U,0U}},
{MOVE_2030,{2U,5U,0U}},
{MOVE_2030,{3U,5U,0U}},
{MOVE_2030,{4U,5U,0U}},
{MOVE_2030,{5U,5U,0U}},
{MOVE_2030,{6U,5U,0U}},
{MOVE_2030,{7U,5U,0U}},
{MOVE_2038,{0U,5U,0U}},
{MOVE_2039,{0U,5U,0U}},
{MOVE_203A,{0U,5U,0U}},
{MOVE_203B,{0U,5U,0U}},
{MOVE_203C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_2040,{0U,5U,0U}},
{MOVEA_2040,{1U,5U,0U}},
{MOVEA_2040,{2U,5U,0U}},
{MOVEA_2040,{3U,5U,0U}},
{MOVEA_2040,{4U,5U,0U}},
{MOVEA_2040,{5U,5U,0U}},
{MOVEA_2040,{6U,5U,0U}},
{MOVEA_2040,{7U,5U,0U}},
{MOVEA_2048,{0U,5U,0U}},
{MOVEA_2048,{1U,5U,0U}},
{MOVEA_2048,{2U,5U,0U}},
{MOVEA_2048,{3U,5U,0U}},
{MOVEA_2048,{4U,5U,0U}},
{MOVEA_2048,{5U,5U,0U}},
{MOVEA_2048,{6U,5U,0U}},
{MOVEA_2048,{7U,5U,0U}},
{MOVEA_2050,{0U,5U,0U}},
{MOVEA_2050,{1U,5U,0U}},
{MOVEA_2050,{2U,5U,0U}},
{MOVEA_2050,{3U,5U,0U}},
{MOVEA_2050,{4U,5U,0U}},
{MOVEA_2050,{5U,5U,0U}},
{MOVEA_2050,{6U,5U,0U}},
{MOVEA_2050,{7U,5U,0U}},
{MOVEA_2058,{0U,5U,0U}},
{MOVEA_2058,{1U,5U,0U}},
{MOVEA_2058,{2U,5U,0U}},
{MOVEA_2058,{3U,5U,0U}},
{MOVEA_2058,{4U,5U,0U}},
{MOVEA_2058,{5U,5U,0U}},
{MOVEA_2058,{6U,5U,0U}},
{MOVEA_2058,{7U,5U,0U}},
{MOVEA_2060,{0U,5U,0U}},
{MOVEA_2060,{1U,5U,0U}},
{MOVEA_2060,{2U,5U,0U}},
{MOVEA_2060,{3U,5U,0U}},
{MOVEA_2060,{4U,5U,0U}},
{MOVEA_2060,{5U,5U,0U}},
{MOVEA_2060,{6U,5U,0U}},
{MOVEA_2060,{7U,5U,0U}},
{MOVEA_2068,{0U,5U,0U}},
{MOVEA_2068,{1U,5U,0U}},
{MOVEA_2068,{2U,5U,0U}},
{MOVEA_2068,{3U,5U,0U}},
{MOVEA_2068,{4U,5U,0U}},
{MOVEA_2068,{5U,5U,0U}},
{MOVEA_2068,{6U,5U,0U}},
{MOVEA_2068,{7U,5U,0U}},
{MOVEA_2070,{0U,5U,0U}},
{MOVEA_2070,{1U,5U,0U}},
{MOVEA_2070,{2U,5U,0U}},
{MOVEA_2070,{3U,5U,0U}},
{MOVEA_2070,{4U,5U,0U}},
{MOVEA_2070,{5U,5U,0U}},
{MOVEA_2070,{6U,5U,0U}},
{MOVEA_2070,{7U,5U,0U}},
{MOVEA_2078,{0U,5U,0U}},
{MOVEA_2079,{0U,5U,0U}},
{MOVEA_207A,{0U,5U,0U}},
{MOVEA_207B,{0U,5U,0U}},
{MOVEA_207C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2080,{0U,5U,0U}},
{MOVE_2080,{1U,5U,0U}},
{MOVE_2080,{2U,5U,0U}},
{MOVE_2080,{3U,5U,0U}},
{MOVE_2080,{4U,5U,0U}},
{MOVE_2080,{5U,5U,0U}},
{MOVE_2080,{6U,5U,0U}},
{MOVE_2080,{7U,5U,0U}},
{MOVE_2088,{0U,5U,0U}},
{MOVE_2088,{1U,5U,0U}},
{MOVE_2088,{2U,5U,0U}},
{MOVE_2088,{3U,5U,0U}},
{MOVE_2088,{4U,5U,0U}},
{MOVE_2088,{5U,5U,0U}},
{MOVE_2088,{6U,5U,0U}},
{MOVE_2088,{7U,5U,0U}},
{MOVE_2090,{0U,5U,0U}},
{MOVE_2090,{1U,5U,0U}},
{MOVE_2090,{2U,5U,0U}},
{MOVE_2090,{3U,5U,0U}},
{MOVE_2090,{4U,5U,0U}},
{MOVE_2090,{5U,5U,0U}},
{MOVE_2090,{6U,5U,0U}},
{MOVE_2090,{7U,5U,0U}},
{MOVE_2098,{0U,5U,0U}},
{MOVE_2098,{1U,5U,0U}},
{MOVE_2098,{2U,5U,0U}},
{MOVE_2098,{3U,5U,0U}},
{MOVE_2098,{4U,5U,0U}},
{MOVE_2098,{5U,5U,0U}},
{MOVE_2098,{6U,5U,0U}},
{MOVE_2098,{7U,5U,0U}},
{MOVE_20A0,{0U,5U,0U}},
{MOVE_20A0,{1U,5U,0U}},
{MOVE_20A0,{2U,5U,0U}},
{MOVE_20A0,{3U,5U,0U}},
{MOVE_20A0,{4U,5U,0U}},
{MOVE_20A0,{5U,5U,0U}},
{MOVE_20A0,{6U,5U,0U}},
{MOVE_20A0,{7U,5U,0U}},
{MOVE_20A8,{0U,5U,0U}},
{MOVE_20A8,{1U,5U,0U}},
{MOVE_20A8,{2U,5U,0U}},
{MOVE_20A8,{3U,5U,0U}},
{MOVE_20A8,{4U,5U,0U}},
{MOVE_20A8,{5U,5U,0U}},
{MOVE_20A8,{6U,5U,0U}},
{MOVE_20A8,{7U,5U,0U}},
{MOVE_20B0,{0U,5U,0U}},
{MOVE_20B0,{1U,5U,0U}},
{MOVE_20B0,{2U,5U,0U}},
{MOVE_20B0,{3U,5U,0U}},
{MOVE_20B0,{4U,5U,0U}},
{MOVE_20B0,{5U,5U,0U}},
{MOVE_20B0,{6U,5U,0U}},
{MOVE_20B0,{7U,5U,0U}},
{MOVE_20B8,{0U,5U,0U}},
{MOVE_20B9,{0U,5U,0U}},
{MOVE_20BA,{0U,5U,0U}},
{MOVE_20BB,{0U,5U,0U}},
{MOVE_20BC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_20C0,{0U,5U,0U}},
{MOVE_20C0,{1U,5U,0U}},
{MOVE_20C0,{2U,5U,0U}},
{MOVE_20C0,{3U,5U,0U}},
{MOVE_20C0,{4U,5U,0U}},
{MOVE_20C0,{5U,5U,0U}},
{MOVE_20C0,{6U,5U,0U}},
{MOVE_20C0,{7U,5U,0U}},
{MOVE_20C8,{0U,5U,0U}},
{MOVE_20C8,{1U,5U,0U}},
{MOVE_20C8,{2U,5U,0U}},
{MOVE_20C8,{3U,5U,0U}},
{MOVE_20C8,{4U,5U,0U}},
{MOVE_20C8,{5U,5U,0U}},
{MOVE_20C8,{6U,5U,0U}},
{MOVE_20C8,{7U,5U,0U}},
{MOVE_20D0,{0U,5U,0U}},
{MOVE_20D0,{1U,5U,0U}},
{MOVE_20D0,{2U,5U,0U}},
{MOVE_20D0,{3U,5U,0U}},
{MOVE_20D0,{4U,5U,0U}},
{MOVE_20D0,{5U,5U,0U}},
{MOVE_20D0,{6U,5U,0U}},
{MOVE_20D0,{7U,5U,0U}},
{MOVE_20D8,{0U,5U,0U}},
{MOVE_20D8,{1U,5U,0U}},
{MOVE_20D8,{2U,5U,0U}},
{MOVE_20D8,{3U,5U,0U}},
{MOVE_20D8,{4U,5U,0U}},
{MOVE_20D8,{5U,5U,0U}},
{MOVE_20D8,{6U,5U,0U}},
{MOVE_20D8,{7U,5U,0U}},
{MOVE_20E0,{0U,5U,0U}},
{MOVE_20E0,{1U,5U,0U}},
{MOVE_20E0,{2U,5U,0U}},
{MOVE_20E0,{3U,5U,0U}},
{MOVE_20E0,{4U,5U,0U}},
{MOVE_20E0,{5U,5U,0U}},
{MOVE_20E0,{6U,5U,0U}},
{MOVE_20E0,{7U,5U,0U}},
{MOVE_20E8,{0U,5U,0U}},
{MOVE_20E8,{1U,5U,0U}},
{MOVE_20E8,{2U,5U,0U}},
{MOVE_20E8,{3U,5U,0U}},
{MOVE_20E8,{4U,5U,0U}},
{MOVE_20E8,{5U,5U,0U}},
{MOVE_20E8,{6U,5U,0U}},
{MOVE_20E8,{7U,5U,0U}},
{MOVE_20F0,{0U,5U,0U}},
{MOVE_20F0,{1U,5U,0U}},
{MOVE_20F0,{2U,5U,0U}},
{MOVE_20F0,{3U,5U,0U}},
{MOVE_20F0,{4U,5U,0U}},
{MOVE_20F0,{5U,5U,0U}},
{MOVE_20F0,{6U,5U,0U}},
{MOVE_20F0,{7U,5U,0U}},
{MOVE_20F8,{0U,5U,0U}},
{MOVE_20F9,{0U,5U,0U}},
{MOVE_20FA,{0U,5U,0U}},
{MOVE_20FB,{0U,5U,0U}},
{MOVE_20FC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2100,{0U,5U,0U}},
{MOVE_2100,{1U,5U,0U}},
{MOVE_2100,{2U,5U,0U}},
{MOVE_2100,{3U,5U,0U}},
{MOVE_2100,{4U,5U,0U}},
{MOVE_2100,{5U,5U,0U}},
{MOVE_2100,{6U,5U,0U}},
{MOVE_2100,{7U,5U,0U}},
{MOVE_2108,{0U,5U,0U}},
{MOVE_2108,{1U,5U,0U}},
{MOVE_2108,{2U,5U,0U}},
{MOVE_2108,{3U,5U,0U}},
{MOVE_2108,{4U,5U,0U}},
{MOVE_2108,{5U,5U,0U}},
{MOVE_2108,{6U,5U,0U}},
{MOVE_2108,{7U,5U,0U}},
{MOVE_2110,{0U,5U,0U}},
{MOVE_2110,{1U,5U,0U}},
{MOVE_2110,{2U,5U,0U}},
{MOVE_2110,{3U,5U,0U}},
{MOVE_2110,{4U,5U,0U}},
{MOVE_2110,{5U,5U,0U}},
{MOVE_2110,{6U,5U,0U}},
{MOVE_2110,{7U,5U,0U}},
{MOVE_2118,{0U,5U,0U}},
{MOVE_2118,{1U,5U,0U}},
{MOVE_2118,{2U,5U,0U}},
{MOVE_2118,{3U,5U,0U}},
{MOVE_2118,{4U,5U,0U}},
{MOVE_2118,{5U,5U,0U}},
{MOVE_2118,{6U,5U,0U}},
{MOVE_2118,{7U,5U,0U}},
{MOVE_2120,{0U,5U,0U}},
{MOVE_2120,{1U,5U,0U}},
{MOVE_2120,{2U,5U,0U}},
{MOVE_2120,{3U,5U,0U}},
{MOVE_2120,{4U,5U,0U}},
{MOVE_2120,{5U,5U,0U}},
{MOVE_2120,{6U,5U,0U}},
{MOVE_2120,{7U,5U,0U}},
{MOVE_2128,{0U,5U,0U}},
{MOVE_2128,{1U,5U,0U}},
{MOVE_2128,{2U,5U,0U}},
{MOVE_2128,{3U,5U,0U}},
{MOVE_2128,{4U,5U,0U}},
{MOVE_2128,{5U,5U,0U}},
{MOVE_2128,{6U,5U,0U}},
{MOVE_2128,{7U,5U,0U}},
{MOVE_2130,{0U,5U,0U}},
{MOVE_2130,{1U,5U,0U}},
{MOVE_2130,{2U,5U,0U}},
{MOVE_2130,{3U,5U,0U}},
{MOVE_2130,{4U,5U,0U}},
{MOVE_2130,{5U,5U,0U}},
{MOVE_2130,{6U,5U,0U}},
{MOVE_2130,{7U,5U,0U}},
{MOVE_2138,{0U,5U,0U}},
{MOVE_2139,{0U,5U,0U}},
{MOVE_213A,{0U,5U,0U}},
{MOVE_213B,{0U,5U,0U}},
{MOVE_213C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2140,{0U,5U,0U}},
{MOVE_2140,{1U,5U,0U}},
{MOVE_2140,{2U,5U,0U}},
{MOVE_2140,{3U,5U,0U}},
{MOVE_2140,{4U,5U,0U}},
{MOVE_2140,{5U,5U,0U}},
{MOVE_2140,{6U,5U,0U}},
{MOVE_2140,{7U,5U,0U}},
{MOVE_2148,{0U,5U,0U}},
{MOVE_2148,{1U,5U,0U}},
{MOVE_2148,{2U,5U,0U}},
{MOVE_2148,{3U,5U,0U}},
{MOVE_2148,{4U,5U,0U}},
{MOVE_2148,{5U,5U,0U}},
{MOVE_2148,{6U,5U,0U}},
{MOVE_2148,{7U,5U,0U}},
{MOVE_2150,{0U,5U,0U}},
{MOVE_2150,{1U,5U,0U}},
{MOVE_2150,{2U,5U,0U}},
{MOVE_2150,{3U,5U,0U}},
{MOVE_2150,{4U,5U,0U}},
{MOVE_2150,{5U,5U,0U}},
{MOVE_2150,{6U,5U,0U}},
{MOVE_2150,{7U,5U,0U}},
{MOVE_2158,{0U,5U,0U}},
{MOVE_2158,{1U,5U,0U}},
{MOVE_2158,{2U,5U,0U}},
{MOVE_2158,{3U,5U,0U}},
{MOVE_2158,{4U,5U,0U}},
{MOVE_2158,{5U,5U,0U}},
{MOVE_2158,{6U,5U,0U}},
{MOVE_2158,{7U,5U,0U}},
{MOVE_2160,{0U,5U,0U}},
{MOVE_2160,{1U,5U,0U}},
{MOVE_2160,{2U,5U,0U}},
{MOVE_2160,{3U,5U,0U}},
{MOVE_2160,{4U,5U,0U}},
{MOVE_2160,{5U,5U,0U}},
{MOVE_2160,{6U,5U,0U}},
{MOVE_2160,{7U,5U,0U}},
{MOVE_2168,{0U,5U,0U}},
{MOVE_2168,{1U,5U,0U}},
{MOVE_2168,{2U,5U,0U}},
{MOVE_2168,{3U,5U,0U}},
{MOVE_2168,{4U,5U,0U}},
{MOVE_2168,{5U,5U,0U}},
{MOVE_2168,{6U,5U,0U}},
{MOVE_2168,{7U,5U,0U}},
{MOVE_2170,{0U,5U,0U}},
{MOVE_2170,{1U,5U,0U}},
{MOVE_2170,{2U,5U,0U}},
{MOVE_2170,{3U,5U,0U}},
{MOVE_2170,{4U,5U,0U}},
{MOVE_2170,{5U,5U,0U}},
{MOVE_2170,{6U,5U,0U}},
{MOVE_2170,{7U,5U,0U}},
{MOVE_2178,{0U,5U,0U}},
{MOVE_2179,{0U,5U,0U}},
{MOVE_217A,{0U,5U,0U}},
{MOVE_217B,{0U,5U,0U}},
{MOVE_217C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2180,{0U,5U,0U}},
{MOVE_2180,{1U,5U,0U}},
{MOVE_2180,{2U,5U,0U}},
{MOVE_2180,{3U,5U,0U}},
{MOVE_2180,{4U,5U,0U}},
{MOVE_2180,{5U,5U,0U}},
{MOVE_2180,{6U,5U,0U}},
{MOVE_2180,{7U,5U,0U}},
{MOVE_2188,{0U,5U,0U}},
{MOVE_2188,{1U,5U,0U}},
{MOVE_2188,{2U,5U,0U}},
{MOVE_2188,{3U,5U,0U}},
{MOVE_2188,{4U,5U,0U}},
{MOVE_2188,{5U,5U,0U}},
{MOVE_2188,{6U,5U,0U}},
{MOVE_2188,{7U,5U,0U}},
{MOVE_2190,{0U,5U,0U}},
{MOVE_2190,{1U,5U,0U}},
{MOVE_2190,{2U,5U,0U}},
{MOVE_2190,{3U,5U,0U}},
{MOVE_2190,{4U,5U,0U}},
{MOVE_2190,{5U,5U,0U}},
{MOVE_2190,{6U,5U,0U}},
{MOVE_2190,{7U,5U,0U}},
{MOVE_2198,{0U,5U,0U}},
{MOVE_2198,{1U,5U,0U}},
{MOVE_2198,{2U,5U,0U}},
{MOVE_2198,{3U,5U,0U}},
{MOVE_2198,{4U,5U,0U}},
{MOVE_2198,{5U,5U,0U}},
{MOVE_2198,{6U,5U,0U}},
{MOVE_2198,{7U,5U,0U}},
{MOVE_21A0,{0U,5U,0U}},
{MOVE_21A0,{1U,5U,0U}},
{MOVE_21A0,{2U,5U,0U}},
{MOVE_21A0,{3U,5U,0U}},
{MOVE_21A0,{4U,5U,0U}},
{MOVE_21A0,{5U,5U,0U}},
{MOVE_21A0,{6U,5U,0U}},
{MOVE_21A0,{7U,5U,0U}},
{MOVE_21A8,{0U,5U,0U}},
{MOVE_21A8,{1U,5U,0U}},
{MOVE_21A8,{2U,5U,0U}},
{MOVE_21A8,{3U,5U,0U}},
{MOVE_21A8,{4U,5U,0U}},
{MOVE_21A8,{5U,5U,0U}},
{MOVE_21A8,{6U,5U,0U}},
{MOVE_21A8,{7U,5U,0U}},
{MOVE_21B0,{0U,5U,0U}},
{MOVE_21B0,{1U,5U,0U}},
{MOVE_21B0,{2U,5U,0U}},
{MOVE_21B0,{3U,5U,0U}},
{MOVE_21B0,{4U,5U,0U}},
{MOVE_21B0,{5U,5U,0U}},
{MOVE_21B0,{6U,5U,0U}},
{MOVE_21B0,{7U,5U,0U}},
{MOVE_21B8,{0U,5U,0U}},
{MOVE_21B9,{0U,5U,0U}},
{MOVE_21BA,{0U,5U,0U}},
{MOVE_21BB,{0U,5U,0U}},
{MOVE_21BC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2000,{0U,6U,0U}},
{MOVE_2000,{1U,6U,0U}},
{MOVE_2000,{2U,6U,0U}},
{MOVE_2000,{3U,6U,0U}},
{MOVE_2000,{4U,6U,0U}},
{MOVE_2000,{5U,6U,0U}},
{MOVE_2000,{6U,6U,0U}},
{MOVE_2000,{7U,6U,0U}},
{MOVE_2008,{0U,6U,0U}},
{MOVE_2008,{1U,6U,0U}},
{MOVE_2008,{2U,6U,0U}},
{MOVE_2008,{3U,6U,0U}},
{MOVE_2008,{4U,6U,0U}},
{MOVE_2008,{5U,6U,0U}},
{MOVE_2008,{6U,6U,0U}},
{MOVE_2008,{7U,6U,0U}},
{MOVE_2010,{0U,6U,0U}},
{MOVE_2010,{1U,6U,0U}},
{MOVE_2010,{2U,6U,0U}},
{MOVE_2010,{3U,6U,0U}},
{MOVE_2010,{4U,6U,0U}},
{MOVE_2010,{5U,6U,0U}},
{MOVE_2010,{6U,6U,0U}},
{MOVE_2010,{7U,6U,0U}},
{MOVE_2018,{0U,6U,0U}},
{MOVE_2018,{1U,6U,0U}},
{MOVE_2018,{2U,6U,0U}},
{MOVE_2018,{3U,6U,0U}},
{MOVE_2018,{4U,6U,0U}},
{MOVE_2018,{5U,6U,0U}},
{MOVE_2018,{6U,6U,0U}},
{MOVE_2018,{7U,6U,0U}},
{MOVE_2020,{0U,6U,0U}},
{MOVE_2020,{1U,6U,0U}},
{MOVE_2020,{2U,6U,0U}},
{MOVE_2020,{3U,6U,0U}},
{MOVE_2020,{4U,6U,0U}},
{MOVE_2020,{5U,6U,0U}},
{MOVE_2020,{6U,6U,0U}},
{MOVE_2020,{7U,6U,0U}},
{MOVE_2028,{0U,6U,0U}},
{MOVE_2028,{1U,6U,0U}},
{MOVE_2028,{2U,6U,0U}},
{MOVE_2028,{3U,6U,0U}},
{MOVE_2028,{4U,6U,0U}},
{MOVE_2028,{5U,6U,0U}},
{MOVE_2028,{6U,6U,0U}},
{MOVE_2028,{7U,6U,0U}},
{MOVE_2030,{0U,6U,0U}},
{MOVE_2030,{1U,6U,0U}},
{MOVE_2030,{2U,6U,0U}},
{MOVE_2030,{3U,6U,0U}},
{MOVE_2030,{4U,6U,0U}},
{MOVE_2030,{5U,6U,0U}},
{MOVE_2030,{6U,6U,0U}},
{MOVE_2030,{7U,6U,0U}},
{MOVE_2038,{0U,6U,0U}},
{MOVE_2039,{0U,6U,0U}},
{MOVE_203A,{0U,6U,0U}},
{MOVE_203B,{0U,6U,0U}},
{MOVE_203C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_2040,{0U,6U,0U}},
{MOVEA_2040,{1U,6U,0U}},
{MOVEA_2040,{2U,6U,0U}},
{MOVEA_2040,{3U,6U,0U}},
{MOVEA_2040,{4U,6U,0U}},
{MOVEA_2040,{5U,6U,0U}},
{MOVEA_2040,{6U,6U,0U}},
{MOVEA_2040,{7U,6U,0U}},
{MOVEA_2048,{0U,6U,0U}},
{MOVEA_2048,{1U,6U,0U}},
{MOVEA_2048,{2U,6U,0U}},
{MOVEA_2048,{3U,6U,0U}},
{MOVEA_2048,{4U,6U,0U}},
{MOVEA_2048,{5U,6U,0U}},
{MOVEA_2048,{6U,6U,0U}},
{MOVEA_2048,{7U,6U,0U}},
{MOVEA_2050,{0U,6U,0U}},
{MOVEA_2050,{1U,6U,0U}},
{MOVEA_2050,{2U,6U,0U}},
{MOVEA_2050,{3U,6U,0U}},
{MOVEA_2050,{4U,6U,0U}},
{MOVEA_2050,{5U,6U,0U}},
{MOVEA_2050,{6U,6U,0U}},
{MOVEA_2050,{7U,6U,0U}},
{MOVEA_2058,{0U,6U,0U}},
{MOVEA_2058,{1U,6U,0U}},
{MOVEA_2058,{2U,6U,0U}},
{MOVEA_2058,{3U,6U,0U}},
{MOVEA_2058,{4U,6U,0U}},
{MOVEA_2058,{5U,6U,0U}},
{MOVEA_2058,{6U,6U,0U}},
{MOVEA_2058,{7U,6U,0U}},
{MOVEA_2060,{0U,6U,0U}},
{MOVEA_2060,{1U,6U,0U}},
{MOVEA_2060,{2U,6U,0U}},
{MOVEA_2060,{3U,6U,0U}},
{MOVEA_2060,{4U,6U,0U}},
{MOVEA_2060,{5U,6U,0U}},
{MOVEA_2060,{6U,6U,0U}},
{MOVEA_2060,{7U,6U,0U}},
{MOVEA_2068,{0U,6U,0U}},
{MOVEA_2068,{1U,6U,0U}},
{MOVEA_2068,{2U,6U,0U}},
{MOVEA_2068,{3U,6U,0U}},
{MOVEA_2068,{4U,6U,0U}},
{MOVEA_2068,{5U,6U,0U}},
{MOVEA_2068,{6U,6U,0U}},
{MOVEA_2068,{7U,6U,0U}},
{MOVEA_2070,{0U,6U,0U}},
{MOVEA_2070,{1U,6U,0U}},
{MOVEA_2070,{2U,6U,0U}},
{MOVEA_2070,{3U,6U,0U}},
{MOVEA_2070,{4U,6U,0U}},
{MOVEA_2070,{5U,6U,0U}},
{MOVEA_2070,{6U,6U,0U}},
{MOVEA_2070,{7U,6U,0U}},
{MOVEA_2078,{0U,6U,0U}},
{MOVEA_2079,{0U,6U,0U}},
{MOVEA_207A,{0U,6U,0U}},
{MOVEA_207B,{0U,6U,0U}},
{MOVEA_207C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2080,{0U,6U,0U}},
{MOVE_2080,{1U,6U,0U}},
{MOVE_2080,{2U,6U,0U}},
{MOVE_2080,{3U,6U,0U}},
{MOVE_2080,{4U,6U,0U}},
{MOVE_2080,{5U,6U,0U}},
{MOVE_2080,{6U,6U,0U}},
{MOVE_2080,{7U,6U,0U}},
{MOVE_2088,{0U,6U,0U}},
{MOVE_2088,{1U,6U,0U}},
{MOVE_2088,{2U,6U,0U}},
{MOVE_2088,{3U,6U,0U}},
{MOVE_2088,{4U,6U,0U}},
{MOVE_2088,{5U,6U,0U}},
{MOVE_2088,{6U,6U,0U}},
{MOVE_2088,{7U,6U,0U}},
{MOVE_2090,{0U,6U,0U}},
{MOVE_2090,{1U,6U,0U}},
{MOVE_2090,{2U,6U,0U}},
{MOVE_2090,{3U,6U,0U}},
{MOVE_2090,{4U,6U,0U}},
{MOVE_2090,{5U,6U,0U}},
{MOVE_2090,{6U,6U,0U}},
{MOVE_2090,{7U,6U,0U}},
{MOVE_2098,{0U,6U,0U}},
{MOVE_2098,{1U,6U,0U}},
{MOVE_2098,{2U,6U,0U}},
{MOVE_2098,{3U,6U,0U}},
{MOVE_2098,{4U,6U,0U}},
{MOVE_2098,{5U,6U,0U}},
{MOVE_2098,{6U,6U,0U}},
{MOVE_2098,{7U,6U,0U}},
{MOVE_20A0,{0U,6U,0U}},
{MOVE_20A0,{1U,6U,0U}},
{MOVE_20A0,{2U,6U,0U}},
{MOVE_20A0,{3U,6U,0U}},
{MOVE_20A0,{4U,6U,0U}},
{MOVE_20A0,{5U,6U,0U}},
{MOVE_20A0,{6U,6U,0U}},
{MOVE_20A0,{7U,6U,0U}},
{MOVE_20A8,{0U,6U,0U}},
{MOVE_20A8,{1U,6U,0U}},
{MOVE_20A8,{2U,6U,0U}},
{MOVE_20A8,{3U,6U,0U}},
{MOVE_20A8,{4U,6U,0U}},
{MOVE_20A8,{5U,6U,0U}},
{MOVE_20A8,{6U,6U,0U}},
{MOVE_20A8,{7U,6U,0U}},
{MOVE_20B0,{0U,6U,0U}},
{MOVE_20B0,{1U,6U,0U}},
{MOVE_20B0,{2U,6U,0U}},
{MOVE_20B0,{3U,6U,0U}},
{MOVE_20B0,{4U,6U,0U}},
{MOVE_20B0,{5U,6U,0U}},
{MOVE_20B0,{6U,6U,0U}},
{MOVE_20B0,{7U,6U,0U}},
{MOVE_20B8,{0U,6U,0U}},
{MOVE_20B9,{0U,6U,0U}},
{MOVE_20BA,{0U,6U,0U}},
{MOVE_20BB,{0U,6U,0U}},
{MOVE_20BC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_20C0,{0U,6U,0U}},
{MOVE_20C0,{1U,6U,0U}},
{MOVE_20C0,{2U,6U,0U}},
{MOVE_20C0,{3U,6U,0U}},
{MOVE_20C0,{4U,6U,0U}},
{MOVE_20C0,{5U,6U,0U}},
{MOVE_20C0,{6U,6U,0U}},
{MOVE_20C0,{7U,6U,0U}},
{MOVE_20C8,{0U,6U,0U}},
{MOVE_20C8,{1U,6U,0U}},
{MOVE_20C8,{2U,6U,0U}},
{MOVE_20C8,{3U,6U,0U}},
{MOVE_20C8,{4U,6U,0U}},
{MOVE_20C8,{5U,6U,0U}},
{MOVE_20C8,{6U,6U,0U}},
{MOVE_20C8,{7U,6U,0U}},
{MOVE_20D0,{0U,6U,0U}},
{MOVE_20D0,{1U,6U,0U}},
{MOVE_20D0,{2U,6U,0U}},
{MOVE_20D0,{3U,6U,0U}},
{MOVE_20D0,{4U,6U,0U}},
{MOVE_20D0,{5U,6U,0U}},
{MOVE_20D0,{6U,6U,0U}},
{MOVE_20D0,{7U,6U,0U}},
{MOVE_20D8,{0U,6U,0U}},
{MOVE_20D8,{1U,6U,0U}},
{MOVE_20D8,{2U,6U,0U}},
{MOVE_20D8,{3U,6U,0U}},
{MOVE_20D8,{4U,6U,0U}},
{MOVE_20D8,{5U,6U,0U}},
{MOVE_20D8,{6U,6U,0U}},
{MOVE_20D8,{7U,6U,0U}},
{MOVE_20E0,{0U,6U,0U}},
{MOVE_20E0,{1U,6U,0U}},
{MOVE_20E0,{2U,6U,0U}},
{MOVE_20E0,{3U,6U,0U}},
{MOVE_20E0,{4U,6U,0U}},
{MOVE_20E0,{5U,6U,0U}},
{MOVE_20E0,{6U,6U,0U}},
{MOVE_20E0,{7U,6U,0U}},
{MOVE_20E8,{0U,6U,0U}},
{MOVE_20E8,{1U,6U,0U}},
{MOVE_20E8,{2U,6U,0U}},
{MOVE_20E8,{3U,6U,0U}},
{MOVE_20E8,{4U,6U,0U}},
{MOVE_20E8,{5U,6U,0U}},
{MOVE_20E8,{6U,6U,0U}},
{MOVE_20E8,{7U,6U,0U}},
{MOVE_20F0,{0U,6U,0U}},
{MOVE_20F0,{1U,6U,0U}},
{MOVE_20F0,{2U,6U,0U}},
{MOVE_20F0,{3U,6U,0U}},
{MOVE_20F0,{4U,6U,0U}},
{MOVE_20F0,{5U,6U,0U}},
{MOVE_20F0,{6U,6U,0U}},
{MOVE_20F0,{7U,6U,0U}},
{MOVE_20F8,{0U,6U,0U}},
{MOVE_20F9,{0U,6U,0U}},
{MOVE_20FA,{0U,6U,0U}},
{MOVE_20FB,{0U,6U,0U}},
{MOVE_20FC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2100,{0U,6U,0U}},
{MOVE_2100,{1U,6U,0U}},
{MOVE_2100,{2U,6U,0U}},
{MOVE_2100,{3U,6U,0U}},
{MOVE_2100,{4U,6U,0U}},
{MOVE_2100,{5U,6U,0U}},
{MOVE_2100,{6U,6U,0U}},
{MOVE_2100,{7U,6U,0U}},
{MOVE_2108,{0U,6U,0U}},
{MOVE_2108,{1U,6U,0U}},
{MOVE_2108,{2U,6U,0U}},
{MOVE_2108,{3U,6U,0U}},
{MOVE_2108,{4U,6U,0U}},
{MOVE_2108,{5U,6U,0U}},
{MOVE_2108,{6U,6U,0U}},
{MOVE_2108,{7U,6U,0U}},
{MOVE_2110,{0U,6U,0U}},
{MOVE_2110,{1U,6U,0U}},
{MOVE_2110,{2U,6U,0U}},
{MOVE_2110,{3U,6U,0U}},
{MOVE_2110,{4U,6U,0U}},
{MOVE_2110,{5U,6U,0U}},
{MOVE_2110,{6U,6U,0U}},
{MOVE_2110,{7U,6U,0U}},
{MOVE_2118,{0U,6U,0U}},
{MOVE_2118,{1U,6U,0U}},
{MOVE_2118,{2U,6U,0U}},
{MOVE_2118,{3U,6U,0U}},
{MOVE_2118,{4U,6U,0U}},
{MOVE_2118,{5U,6U,0U}},
{MOVE_2118,{6U,6U,0U}},
{MOVE_2118,{7U,6U,0U}},
{MOVE_2120,{0U,6U,0U}},
{MOVE_2120,{1U,6U,0U}},
{MOVE_2120,{2U,6U,0U}},
{MOVE_2120,{3U,6U,0U}},
{MOVE_2120,{4U,6U,0U}},
{MOVE_2120,{5U,6U,0U}},
{MOVE_2120,{6U,6U,0U}},
{MOVE_2120,{7U,6U,0U}},
{MOVE_2128,{0U,6U,0U}},
{MOVE_2128,{1U,6U,0U}},
{MOVE_2128,{2U,6U,0U}},
{MOVE_2128,{3U,6U,0U}},
{MOVE_2128,{4U,6U,0U}},
{MOVE_2128,{5U,6U,0U}},
{MOVE_2128,{6U,6U,0U}},
{MOVE_2128,{7U,6U,0U}},
{MOVE_2130,{0U,6U,0U}},
{MOVE_2130,{1U,6U,0U}},
{MOVE_2130,{2U,6U,0U}},
{MOVE_2130,{3U,6U,0U}},
{MOVE_2130,{4U,6U,0U}},
{MOVE_2130,{5U,6U,0U}},
{MOVE_2130,{6U,6U,0U}},
{MOVE_2130,{7U,6U,0U}},
{MOVE_2138,{0U,6U,0U}},
{MOVE_2139,{0U,6U,0U}},
{MOVE_213A,{0U,6U,0U}},
{MOVE_213B,{0U,6U,0U}},
{MOVE_213C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2140,{0U,6U,0U}},
{MOVE_2140,{1U,6U,0U}},
{MOVE_2140,{2U,6U,0U}},
{MOVE_2140,{3U,6U,0U}},
{MOVE_2140,{4U,6U,0U}},
{MOVE_2140,{5U,6U,0U}},
{MOVE_2140,{6U,6U,0U}},
{MOVE_2140,{7U,6U,0U}},
{MOVE_2148,{0U,6U,0U}},
{MOVE_2148,{1U,6U,0U}},
{MOVE_2148,{2U,6U,0U}},
{MOVE_2148,{3U,6U,0U}},
{MOVE_2148,{4U,6U,0U}},
{MOVE_2148,{5U,6U,0U}},
{MOVE_2148,{6U,6U,0U}},
{MOVE_2148,{7U,6U,0U}},
{MOVE_2150,{0U,6U,0U}},
{MOVE_2150,{1U,6U,0U}},
{MOVE_2150,{2U,6U,0U}},
{MOVE_2150,{3U,6U,0U}},
{MOVE_2150,{4U,6U,0U}},
{MOVE_2150,{5U,6U,0U}},
{MOVE_2150,{6U,6U,0U}},
{MOVE_2150,{7U,6U,0U}},
{MOVE_2158,{0U,6U,0U}},
{MOVE_2158,{1U,6U,0U}},
{MOVE_2158,{2U,6U,0U}},
{MOVE_2158,{3U,6U,0U}},
{MOVE_2158,{4U,6U,0U}},
{MOVE_2158,{5U,6U,0U}},
{MOVE_2158,{6U,6U,0U}},
{MOVE_2158,{7U,6U,0U}},
{MOVE_2160,{0U,6U,0U}},
{MOVE_2160,{1U,6U,0U}},
{MOVE_2160,{2U,6U,0U}},
{MOVE_2160,{3U,6U,0U}},
{MOVE_2160,{4U,6U,0U}},
{MOVE_2160,{5U,6U,0U}},
{MOVE_2160,{6U,6U,0U}},
{MOVE_2160,{7U,6U,0U}},
{MOVE_2168,{0U,6U,0U}},
{MOVE_2168,{1U,6U,0U}},
{MOVE_2168,{2U,6U,0U}},
{MOVE_2168,{3U,6U,0U}},
{MOVE_2168,{4U,6U,0U}},
{MOVE_2168,{5U,6U,0U}},
{MOVE_2168,{6U,6U,0U}},
{MOVE_2168,{7U,6U,0U}},
{MOVE_2170,{0U,6U,0U}},
{MOVE_2170,{1U,6U,0U}},
{MOVE_2170,{2U,6U,0U}},
{MOVE_2170,{3U,6U,0U}},
{MOVE_2170,{4U,6U,0U}},
{MOVE_2170,{5U,6U,0U}},
{MOVE_2170,{6U,6U,0U}},
{MOVE_2170,{7U,6U,0U}},
{MOVE_2178,{0U,6U,0U}},
{MOVE_2179,{0U,6U,0U}},
{MOVE_217A,{0U,6U,0U}},
{MOVE_217B,{0U,6U,0U}},
{MOVE_217C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2180,{0U,6U,0U}},
{MOVE_2180,{1U,6U,0U}},
{MOVE_2180,{2U,6U,0U}},
{MOVE_2180,{3U,6U,0U}},
{MOVE_2180,{4U,6U,0U}},
{MOVE_2180,{5U,6U,0U}},
{MOVE_2180,{6U,6U,0U}},
{MOVE_2180,{7U,6U,0U}},
{MOVE_2188,{0U,6U,0U}},
{MOVE_2188,{1U,6U,0U}},
{MOVE_2188,{2U,6U,0U}},
{MOVE_2188,{3U,6U,0U}},
{MOVE_2188,{4U,6U,0U}},
{MOVE_2188,{5U,6U,0U}},
{MOVE_2188,{6U,6U,0U}},
{MOVE_2188,{7U,6U,0U}},
{MOVE_2190,{0U,6U,0U}},
{MOVE_2190,{1U,6U,0U}},
{MOVE_2190,{2U,6U,0U}},
{MOVE_2190,{3U,6U,0U}},
{MOVE_2190,{4U,6U,0U}},
{MOVE_2190,{5U,6U,0U}},
{MOVE_2190,{6U,6U,0U}},
{MOVE_2190,{7U,6U,0U}},
{MOVE_2198,{0U,6U,0U}},
{MOVE_2198,{1U,6U,0U}},
{MOVE_2198,{2U,6U,0U}},
{MOVE_2198,{3U,6U,0U}},
{MOVE_2198,{4U,6U,0U}},
{MOVE_2198,{5U,6U,0U}},
{MOVE_2198,{6U,6U,0U}},
{MOVE_2198,{7U,6U,0U}},
{MOVE_21A0,{0U,6U,0U}},
{MOVE_21A0,{1U,6U,0U}},
{MOVE_21A0,{2U,6U,0U}},
{MOVE_21A0,{3U,6U,0U}},
{MOVE_21A0,{4U,6U,0U}},
{MOVE_21A0,{5U,6U,0U}},
{MOVE_21A0,{6U,6U,0U}},
{MOVE_21A0,{7U,6U,0U}},
{MOVE_21A8,{0U,6U,0U}},
{MOVE_21A8,{1U,6U,0U}},
{MOVE_21A8,{2U,6U,0U}},
{MOVE_21A8,{3U,6U,0U}},
{MOVE_21A8,{4U,6U,0U}},
{MOVE_21A8,{5U,6U,0U}},
{MOVE_21A8,{6U,6U,0U}},
{MOVE_21A8,{7U,6U,0U}},
{MOVE_21B0,{0U,6U,0U}},
{MOVE_21B0,{1U,6U,0U}},
{MOVE_21B0,{2U,6U,0U}},
{MOVE_21B0,{3U,6U,0U}},
{MOVE_21B0,{4U,6U,0U}},
{MOVE_21B0,{5U,6U,0U}},
{MOVE_21B0,{6U,6U,0U}},
{MOVE_21B0,{7U,6U,0U}},
{MOVE_21B8,{0U,6U,0U}},
{MOVE_21B9,{0U,6U,0U}},
{MOVE_21BA,{0U,6U,0U}},
{MOVE_21BB,{0U,6U,0U}},
{MOVE_21BC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2000,{0U,7U,0U}},
{MOVE_2000,{1U,7U,0U}},
{MOVE_2000,{2U,7U,0U}},
{MOVE_2000,{3U,7U,0U}},
{MOVE_2000,{4U,7U,0U}},
{MOVE_2000,{5U,7U,0U}},
{MOVE_2000,{6U,7U,0U}},
{MOVE_2000,{7U,7U,0U}},
{MOVE_2008,{0U,7U,0U}},
{MOVE_2008,{1U,7U,0U}},
{MOVE_2008,{2U,7U,0U}},
{MOVE_2008,{3U,7U,0U}},
{MOVE_2008,{4U,7U,0U}},
{MOVE_2008,{5U,7U,0U}},
{MOVE_2008,{6U,7U,0U}},
{MOVE_2008,{7U,7U,0U}},
{MOVE_2010,{0U,7U,0U}},
{MOVE_2010,{1U,7U,0U}},
{MOVE_2010,{2U,7U,0U}},
{MOVE_2010,{3U,7U,0U}},
{MOVE_2010,{4U,7U,0U}},
{MOVE_2010,{5U,7U,0U}},
{MOVE_2010,{6U,7U,0U}},
{MOVE_2010,{7U,7U,0U}},
{MOVE_2018,{0U,7U,0U}},
{MOVE_2018,{1U,7U,0U}},
{MOVE_2018,{2U,7U,0U}},
{MOVE_2018,{3U,7U,0U}},
{MOVE_2018,{4U,7U,0U}},
{MOVE_2018,{5U,7U,0U}},
{MOVE_2018,{6U,7U,0U}},
{MOVE_2018,{7U,7U,0U}},
{MOVE_2020,{0U,7U,0U}},
{MOVE_2020,{1U,7U,0U}},
{MOVE_2020,{2U,7U,0U}},
{MOVE_2020,{3U,7U,0U}},
{MOVE_2020,{4U,7U,0U}},
{MOVE_2020,{5U,7U,0U}},
{MOVE_2020,{6U,7U,0U}},
{MOVE_2020,{7U,7U,0U}},
{MOVE_2028,{0U,7U,0U}},
{MOVE_2028,{1U,7U,0U}},
{MOVE_2028,{2U,7U,0U}},
{MOVE_2028,{3U,7U,0U}},
{MOVE_2028,{4U,7U,0U}},
{MOVE_2028,{5U,7U,0U}},
{MOVE_2028,{6U,7U,0U}},
{MOVE_2028,{7U,7U,0U}},
{MOVE_2030,{0U,7U,0U}},
{MOVE_2030,{1U,7U,0U}},
{MOVE_2030,{2U,7U,0U}},
{MOVE_2030,{3U,7U,0U}},
{MOVE_2030,{4U,7U,0U}},
{MOVE_2030,{5U,7U,0U}},
{MOVE_2030,{6U,7U,0U}},
{MOVE_2030,{7U,7U,0U}},
{MOVE_2038,{0U,7U,0U}},
{MOVE_2039,{0U,7U,0U}},
{MOVE_203A,{0U,7U,0U}},
{MOVE_203B,{0U,7U,0U}},
{MOVE_203C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_2040,{0U,7U,0U}},
{MOVEA_2040,{1U,7U,0U}},
{MOVEA_2040,{2U,7U,0U}},
{MOVEA_2040,{3U,7U,0U}},
{MOVEA_2040,{4U,7U,0U}},
{MOVEA_2040,{5U,7U,0U}},
{MOVEA_2040,{6U,7U,0U}},
{MOVEA_2040,{7U,7U,0U}},
{MOVEA_2048,{0U,7U,0U}},
{MOVEA_2048,{1U,7U,0U}},
{MOVEA_2048,{2U,7U,0U}},
{MOVEA_2048,{3U,7U,0U}},
{MOVEA_2048,{4U,7U,0U}},
{MOVEA_2048,{5U,7U,0U}},
{MOVEA_2048,{6U,7U,0U}},
{MOVEA_2048,{7U,7U,0U}},
{MOVEA_2050,{0U,7U,0U}},
{MOVEA_2050,{1U,7U,0U}},
{MOVEA_2050,{2U,7U,0U}},
{MOVEA_2050,{3U,7U,0U}},
{MOVEA_2050,{4U,7U,0U}},
{MOVEA_2050,{5U,7U,0U}},
{MOVEA_2050,{6U,7U,0U}},
{MOVEA_2050,{7U,7U,0U}},
{MOVEA_2058,{0U,7U,0U}},
{MOVEA_2058,{1U,7U,0U}},
{MOVEA_2058,{2U,7U,0U}},
{MOVEA_2058,{3U,7U,0U}},
{MOVEA_2058,{4U,7U,0U}},
{MOVEA_2058,{5U,7U,0U}},
{MOVEA_2058,{6U,7U,0U}},
{MOVEA_2058,{7U,7U,0U}},
{MOVEA_2060,{0U,7U,0U}},
{MOVEA_2060,{1U,7U,0U}},
{MOVEA_2060,{2U,7U,0U}},
{MOVEA_2060,{3U,7U,0U}},
{MOVEA_2060,{4U,7U,0U}},
{MOVEA_2060,{5U,7U,0U}},
{MOVEA_2060,{6U,7U,0U}},
{MOVEA_2060,{7U,7U,0U}},
{MOVEA_2068,{0U,7U,0U}},
{MOVEA_2068,{1U,7U,0U}},
{MOVEA_2068,{2U,7U,0U}},
{MOVEA_2068,{3U,7U,0U}},
{MOVEA_2068,{4U,7U,0U}},
{MOVEA_2068,{5U,7U,0U}},
{MOVEA_2068,{6U,7U,0U}},
{MOVEA_2068,{7U,7U,0U}},
{MOVEA_2070,{0U,7U,0U}},
{MOVEA_2070,{1U,7U,0U}},
{MOVEA_2070,{2U,7U,0U}},
{MOVEA_2070,{3U,7U,0U}},
{MOVEA_2070,{4U,7U,0U}},
{MOVEA_2070,{5U,7U,0U}},
{MOVEA_2070,{6U,7U,0U}},
{MOVEA_2070,{7U,7U,0U}},
{MOVEA_2078,{0U,7U,0U}},
{MOVEA_2079,{0U,7U,0U}},
{MOVEA_207A,{0U,7U,0U}},
{MOVEA_207B,{0U,7U,0U}},
{MOVEA_207C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2080,{0U,7U,0U}},
{MOVE_2080,{1U,7U,0U}},
{MOVE_2080,{2U,7U,0U}},
{MOVE_2080,{3U,7U,0U}},
{MOVE_2080,{4U,7U,0U}},
{MOVE_2080,{5U,7U,0U}},
{MOVE_2080,{6U,7U,0U}},
{MOVE_2080,{7U,7U,0U}},
{MOVE_2088,{0U,7U,0U}},
{MOVE_2088,{1U,7U,0U}},
{MOVE_2088,{2U,7U,0U}},
{MOVE_2088,{3U,7U,0U}},
{MOVE_2088,{4U,7U,0U}},
{MOVE_2088,{5U,7U,0U}},
{MOVE_2088,{6U,7U,0U}},
{MOVE_2088,{7U,7U,0U}},
{MOVE_2090,{0U,7U,0U}},
{MOVE_2090,{1U,7U,0U}},
{MOVE_2090,{2U,7U,0U}},
{MOVE_2090,{3U,7U,0U}},
{MOVE_2090,{4U,7U,0U}},
{MOVE_2090,{5U,7U,0U}},
{MOVE_2090,{6U,7U,0U}},
{MOVE_2090,{7U,7U,0U}},
{MOVE_2098,{0U,7U,0U}},
{MOVE_2098,{1U,7U,0U}},
{MOVE_2098,{2U,7U,0U}},
{MOVE_2098,{3U,7U,0U}},
{MOVE_2098,{4U,7U,0U}},
{MOVE_2098,{5U,7U,0U}},
{MOVE_2098,{6U,7U,0U}},
{MOVE_2098,{7U,7U,0U}},
{MOVE_20A0,{0U,7U,0U}},
{MOVE_20A0,{1U,7U,0U}},
{MOVE_20A0,{2U,7U,0U}},
{MOVE_20A0,{3U,7U,0U}},
{MOVE_20A0,{4U,7U,0U}},
{MOVE_20A0,{5U,7U,0U}},
{MOVE_20A0,{6U,7U,0U}},
{MOVE_20A0,{7U,7U,0U}},
{MOVE_20A8,{0U,7U,0U}},
{MOVE_20A8,{1U,7U,0U}},
{MOVE_20A8,{2U,7U,0U}},
{MOVE_20A8,{3U,7U,0U}},
{MOVE_20A8,{4U,7U,0U}},
{MOVE_20A8,{5U,7U,0U}},
{MOVE_20A8,{6U,7U,0U}},
{MOVE_20A8,{7U,7U,0U}},
{MOVE_20B0,{0U,7U,0U}},
{MOVE_20B0,{1U,7U,0U}},
{MOVE_20B0,{2U,7U,0U}},
{MOVE_20B0,{3U,7U,0U}},
{MOVE_20B0,{4U,7U,0U}},
{MOVE_20B0,{5U,7U,0U}},
{MOVE_20B0,{6U,7U,0U}},
{MOVE_20B0,{7U,7U,0U}},
{MOVE_20B8,{0U,7U,0U}},
{MOVE_20B9,{0U,7U,0U}},
{MOVE_20BA,{0U,7U,0U}},
{MOVE_20BB,{0U,7U,0U}},
{MOVE_20BC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_20C0,{0U,7U,0U}},
{MOVE_20C0,{1U,7U,0U}},
{MOVE_20C0,{2U,7U,0U}},
{MOVE_20C0,{3U,7U,0U}},
{MOVE_20C0,{4U,7U,0U}},
{MOVE_20C0,{5U,7U,0U}},
{MOVE_20C0,{6U,7U,0U}},
{MOVE_20C0,{7U,7U,0U}},
{MOVE_20C8,{0U,7U,0U}},
{MOVE_20C8,{1U,7U,0U}},
{MOVE_20C8,{2U,7U,0U}},
{MOVE_20C8,{3U,7U,0U}},
{MOVE_20C8,{4U,7U,0U}},
{MOVE_20C8,{5U,7U,0U}},
{MOVE_20C8,{6U,7U,0U}},
{MOVE_20C8,{7U,7U,0U}},
{MOVE_20D0,{0U,7U,0U}},
{MOVE_20D0,{1U,7U,0U}},
{MOVE_20D0,{2U,7U,0U}},
{MOVE_20D0,{3U,7U,0U}},
{MOVE_20D0,{4U,7U,0U}},
{MOVE_20D0,{5U,7U,0U}},
{MOVE_20D0,{6U,7U,0U}},
{MOVE_20D0,{7U,7U,0U}},
{MOVE_20D8,{0U,7U,0U}},
{MOVE_20D8,{1U,7U,0U}},
{MOVE_20D8,{2U,7U,0U}},
{MOVE_20D8,{3U,7U,0U}},
{MOVE_20D8,{4U,7U,0U}},
{MOVE_20D8,{5U,7U,0U}},
{MOVE_20D8,{6U,7U,0U}},
{MOVE_20D8,{7U,7U,0U}},
{MOVE_20E0,{0U,7U,0U}},
{MOVE_20E0,{1U,7U,0U}},
{MOVE_20E0,{2U,7U,0U}},
{MOVE_20E0,{3U,7U,0U}},
{MOVE_20E0,{4U,7U,0U}},
{MOVE_20E0,{5U,7U,0U}},
{MOVE_20E0,{6U,7U,0U}},
{MOVE_20E0,{7U,7U,0U}},
{MOVE_20E8,{0U,7U,0U}},
{MOVE_20E8,{1U,7U,0U}},
{MOVE_20E8,{2U,7U,0U}},
{MOVE_20E8,{3U,7U,0U}},
{MOVE_20E8,{4U,7U,0U}},
{MOVE_20E8,{5U,7U,0U}},
{MOVE_20E8,{6U,7U,0U}},
{MOVE_20E8,{7U,7U,0U}},
{MOVE_20F0,{0U,7U,0U}},
{MOVE_20F0,{1U,7U,0U}},
{MOVE_20F0,{2U,7U,0U}},
{MOVE_20F0,{3U,7U,0U}},
{MOVE_20F0,{4U,7U,0U}},
{MOVE_20F0,{5U,7U,0U}},
{MOVE_20F0,{6U,7U,0U}},
{MOVE_20F0,{7U,7U,0U}},
{MOVE_20F8,{0U,7U,0U}},
{MOVE_20F9,{0U,7U,0U}},
{MOVE_20FA,{0U,7U,0U}},
{MOVE_20FB,{0U,7U,0U}},
{MOVE_20FC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2100,{0U,7U,0U}},
{MOVE_2100,{1U,7U,0U}},
{MOVE_2100,{2U,7U,0U}},
{MOVE_2100,{3U,7U,0U}},
{MOVE_2100,{4U,7U,0U}},
{MOVE_2100,{5U,7U,0U}},
{MOVE_2100,{6U,7U,0U}},
{MOVE_2100,{7U,7U,0U}},
{MOVE_2108,{0U,7U,0U}},
{MOVE_2108,{1U,7U,0U}},
{MOVE_2108,{2U,7U,0U}},
{MOVE_2108,{3U,7U,0U}},
{MOVE_2108,{4U,7U,0U}},
{MOVE_2108,{5U,7U,0U}},
{MOVE_2108,{6U,7U,0U}},
{MOVE_2108,{7U,7U,0U}},
{MOVE_2110,{0U,7U,0U}},
{MOVE_2110,{1U,7U,0U}},
{MOVE_2110,{2U,7U,0U}},
{MOVE_2110,{3U,7U,0U}},
{MOVE_2110,{4U,7U,0U}},
{MOVE_2110,{5U,7U,0U}},
{MOVE_2110,{6U,7U,0U}},
{MOVE_2110,{7U,7U,0U}},
{MOVE_2118,{0U,7U,0U}},
{MOVE_2118,{1U,7U,0U}},
{MOVE_2118,{2U,7U,0U}},
{MOVE_2118,{3U,7U,0U}},
{MOVE_2118,{4U,7U,0U}},
{MOVE_2118,{5U,7U,0U}},
{MOVE_2118,{6U,7U,0U}},
{MOVE_2118,{7U,7U,0U}},
{MOVE_2120,{0U,7U,0U}},
{MOVE_2120,{1U,7U,0U}},
{MOVE_2120,{2U,7U,0U}},
{MOVE_2120,{3U,7U,0U}},
{MOVE_2120,{4U,7U,0U}},
{MOVE_2120,{5U,7U,0U}},
{MOVE_2120,{6U,7U,0U}},
{MOVE_2120,{7U,7U,0U}},
{MOVE_2128,{0U,7U,0U}},
{MOVE_2128,{1U,7U,0U}},
{MOVE_2128,{2U,7U,0U}},
{MOVE_2128,{3U,7U,0U}},
{MOVE_2128,{4U,7U,0U}},
{MOVE_2128,{5U,7U,0U}},
{MOVE_2128,{6U,7U,0U}},
{MOVE_2128,{7U,7U,0U}},
{MOVE_2130,{0U,7U,0U}},
{MOVE_2130,{1U,7U,0U}},
{MOVE_2130,{2U,7U,0U}},
{MOVE_2130,{3U,7U,0U}},
{MOVE_2130,{4U,7U,0U}},
{MOVE_2130,{5U,7U,0U}},
{MOVE_2130,{6U,7U,0U}},
{MOVE_2130,{7U,7U,0U}},
{MOVE_2138,{0U,7U,0U}},
{MOVE_2139,{0U,7U,0U}},
{MOVE_213A,{0U,7U,0U}},
{MOVE_213B,{0U,7U,0U}},
{MOVE_213C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2140,{0U,7U,0U}},
{MOVE_2140,{1U,7U,0U}},
{MOVE_2140,{2U,7U,0U}},
{MOVE_2140,{3U,7U,0U}},
{MOVE_2140,{4U,7U,0U}},
{MOVE_2140,{5U,7U,0U}},
{MOVE_2140,{6U,7U,0U}},
{MOVE_2140,{7U,7U,0U}},
{MOVE_2148,{0U,7U,0U}},
{MOVE_2148,{1U,7U,0U}},
{MOVE_2148,{2U,7U,0U}},
{MOVE_2148,{3U,7U,0U}},
{MOVE_2148,{4U,7U,0U}},
{MOVE_2148,{5U,7U,0U}},
{MOVE_2148,{6U,7U,0U}},
{MOVE_2148,{7U,7U,0U}},
{MOVE_2150,{0U,7U,0U}},
{MOVE_2150,{1U,7U,0U}},
{MOVE_2150,{2U,7U,0U}},
{MOVE_2150,{3U,7U,0U}},
{MOVE_2150,{4U,7U,0U}},
{MOVE_2150,{5U,7U,0U}},
{MOVE_2150,{6U,7U,0U}},
{MOVE_2150,{7U,7U,0U}},
{MOVE_2158,{0U,7U,0U}},
{MOVE_2158,{1U,7U,0U}},
{MOVE_2158,{2U,7U,0U}},
{MOVE_2158,{3U,7U,0U}},
{MOVE_2158,{4U,7U,0U}},
{MOVE_2158,{5U,7U,0U}},
{MOVE_2158,{6U,7U,0U}},
{MOVE_2158,{7U,7U,0U}},
{MOVE_2160,{0U,7U,0U}},
{MOVE_2160,{1U,7U,0U}},
{MOVE_2160,{2U,7U,0U}},
{MOVE_2160,{3U,7U,0U}},
{MOVE_2160,{4U,7U,0U}},
{MOVE_2160,{5U,7U,0U}},
{MOVE_2160,{6U,7U,0U}},
{MOVE_2160,{7U,7U,0U}},
{MOVE_2168,{0U,7U,0U}},
{MOVE_2168,{1U,7U,0U}},
{MOVE_2168,{2U,7U,0U}},
{MOVE_2168,{3U,7U,0U}},
{MOVE_2168,{4U,7U,0U}},
{MOVE_2168,{5U,7U,0U}},
{MOVE_2168,{6U,7U,0U}},
{MOVE_2168,{7U,7U,0U}},
{MOVE_2170,{0U,7U,0U}},
{MOVE_2170,{1U,7U,0U}},
{MOVE_2170,{2U,7U,0U}},
{MOVE_2170,{3U,7U,0U}},
{MOVE_2170,{4U,7U,0U}},
{MOVE_2170,{5U,7U,0U}},
{MOVE_2170,{6U,7U,0U}},
{MOVE_2170,{7U,7U,0U}},
{MOVE_2178,{0U,7U,0U}},
{MOVE_2179,{0U,7U,0U}},
{MOVE_217A,{0U,7U,0U}},
{MOVE_217B,{0U,7U,0U}},
{MOVE_217C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_2180,{0U,7U,0U}},
{MOVE_2180,{1U,7U,0U}},
{MOVE_2180,{2U,7U,0U}},
{MOVE_2180,{3U,7U,0U}},
{MOVE_2180,{4U,7U,0U}},
{MOVE_2180,{5U,7U,0U}},
{MOVE_2180,{6U,7U,0U}},
{MOVE_2180,{7U,7U,0U}},
{MOVE_2188,{0U,7U,0U}},
{MOVE_2188,{1U,7U,0U}},
{MOVE_2188,{2U,7U,0U}},
{MOVE_2188,{3U,7U,0U}},
{MOVE_2188,{4U,7U,0U}},
{MOVE_2188,{5U,7U,0U}},
{MOVE_2188,{6U,7U,0U}},
{MOVE_2188,{7U,7U,0U}},
{MOVE_2190,{0U,7U,0U}},
{MOVE_2190,{1U,7U,0U}},
{MOVE_2190,{2U,7U,0U}},
{MOVE_2190,{3U,7U,0U}},
{MOVE_2190,{4U,7U,0U}},
{MOVE_2190,{5U,7U,0U}},
{MOVE_2190,{6U,7U,0U}},
{MOVE_2190,{7U,7U,0U}},
{MOVE_2198,{0U,7U,0U}},
{MOVE_2198,{1U,7U,0U}},
{MOVE_2198,{2U,7U,0U}},
{MOVE_2198,{3U,7U,0U}},
{MOVE_2198,{4U,7U,0U}},
{MOVE_2198,{5U,7U,0U}},
{MOVE_2198,{6U,7U,0U}},
{MOVE_2198,{7U,7U,0U}},
{MOVE_21A0,{0U,7U,0U}},
{MOVE_21A0,{1U,7U,0U}},
{MOVE_21A0,{2U,7U,0U}},
{MOVE_21A0,{3U,7U,0U}},
{MOVE_21A0,{4U,7U,0U}},
{MOVE_21A0,{5U,7U,0U}},
{MOVE_21A0,{6U,7U,0U}},
{MOVE_21A0,{7U,7U,0U}},
{MOVE_21A8,{0U,7U,0U}},
{MOVE_21A8,{1U,7U,0U}},
{MOVE_21A8,{2U,7U,0U}},
{MOVE_21A8,{3U,7U,0U}},
{MOVE_21A8,{4U,7U,0U}},
{MOVE_21A8,{5U,7U,0U}},
{MOVE_21A8,{6U,7U,0U}},
{MOVE_21A8,{7U,7U,0U}},
{MOVE_21B0,{0U,7U,0U}},
{MOVE_21B0,{1U,7U,0U}},
{MOVE_21B0,{2U,7U,0U}},
{MOVE_21B0,{3U,7U,0U}},
{MOVE_21B0,{4U,7U,0U}},
{MOVE_21B0,{5U,7U,0U}},
{MOVE_21B0,{6U,7U,0U}},
{MOVE_21B0,{7U,7U,0U}},
{MOVE_21B8,{0U,7U,0U}},
{MOVE_21B9,{0U,7U,0U}},
{MOVE_21BA,{0U,7U,0U}},
{MOVE_21BB,{0U,7U,0U}},
{MOVE_21BC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3000,{0U,0U,0U}},
{MOVE_3000,{1U,0U,0U}},
{MOVE_3000,{2U,0U,0U}},
{MOVE_3000,{3U,0U,0U}},
{MOVE_3000,{4U,0U,0U}},
{MOVE_3000,{5U,0U,0U}},
{MOVE_3000,{6U,0U,0U}},
{MOVE_3000,{7U,0U,0U}},
{MOVE_3008,{0U,0U,0U}},
{MOVE_3008,{1U,0U,0U}},
{MOVE_3008,{2U,0U,0U}},
{MOVE_3008,{3U,0U,0U}},
{MOVE_3008,{4U,0U,0U}},
{MOVE_3008,{5U,0U,0U}},
{MOVE_3008,{6U,0U,0U}},
{MOVE_3008,{7U,0U,0U}},
{MOVE_3010,{0U,0U,0U}},
{MOVE_3010,{1U,0U,0U}},
{MOVE_3010,{2U,0U,0U}},
{MOVE_3010,{3U,0U,0U}},
{MOVE_3010,{4U,0U,0U}},
{MOVE_3010,{5U,0U,0U}},
{MOVE_3010,{6U,0U,0U}},
{MOVE_3010,{7U,0U,0U}},
{MOVE_3018,{0U,0U,0U}},
{MOVE_3018,{1U,0U,0U}},
{MOVE_3018,{2U,0U,0U}},
{MOVE_3018,{3U,0U,0U}},
{MOVE_3018,{4U,0U,0U}},
{MOVE_3018,{5U,0U,0U}},
{MOVE_3018,{6U,0U,0U}},
{MOVE_3018,{7U,0U,0U}},
{MOVE_3020,{0U,0U,0U}},
{MOVE_3020,{1U,0U,0U}},
{MOVE_3020,{2U,0U,0U}},
{MOVE_3020,{3U,0U,0U}},
{MOVE_3020,{4U,0U,0U}},
{MOVE_3020,{5U,0U,0U}},
{MOVE_3020,{6U,0U,0U}},
{MOVE_3020,{7U,0U,0U}},
{MOVE_3028,{0U,0U,0U}},
{MOVE_3028,{1U,0U,0U}},
{MOVE_3028,{2U,0U,0U}},
{MOVE_3028,{3U,0U,0U}},
{MOVE_3028,{4U,0U,0U}},
{MOVE_3028,{5U,0U,0U}},
{MOVE_3028,{6U,0U,0U}},
{MOVE_3028,{7U,0U,0U}},
{MOVE_3030,{0U,0U,0U}},
{MOVE_3030,{1U,0U,0U}},
{MOVE_3030,{2U,0U,0U}},
{MOVE_3030,{3U,0U,0U}},
{MOVE_3030,{4U,0U,0U}},
{MOVE_3030,{5U,0U,0U}},
{MOVE_3030,{6U,0U,0U}},
{MOVE_3030,{7U,0U,0U}},
{MOVE_3038,{0U,0U,0U}},
{MOVE_3039,{0U,0U,0U}},
{MOVE_303A,{0U,0U,0U}},
{MOVE_303B,{0U,0U,0U}},
{MOVE_303C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_3040,{0U,0U,0U}},
{MOVEA_3040,{1U,0U,0U}},
{MOVEA_3040,{2U,0U,0U}},
{MOVEA_3040,{3U,0U,0U}},
{MOVEA_3040,{4U,0U,0U}},
{MOVEA_3040,{5U,0U,0U}},
{MOVEA_3040,{6U,0U,0U}},
{MOVEA_3040,{7U,0U,0U}},
{MOVEA_3048,{0U,0U,0U}},
{MOVEA_3048,{1U,0U,0U}},
{MOVEA_3048,{2U,0U,0U}},
{MOVEA_3048,{3U,0U,0U}},
{MOVEA_3048,{4U,0U,0U}},
{MOVEA_3048,{5U,0U,0U}},
{MOVEA_3048,{6U,0U,0U}},
{MOVEA_3048,{7U,0U,0U}},
{MOVEA_3050,{0U,0U,0U}},
{MOVEA_3050,{1U,0U,0U}},
{MOVEA_3050,{2U,0U,0U}},
{MOVEA_3050,{3U,0U,0U}},
{MOVEA_3050,{4U,0U,0U}},
{MOVEA_3050,{5U,0U,0U}},
{MOVEA_3050,{6U,0U,0U}},
{MOVEA_3050,{7U,0U,0U}},
{MOVEA_3058,{0U,0U,0U}},
{MOVEA_3058,{1U,0U,0U}},
{MOVEA_3058,{2U,0U,0U}},
{MOVEA_3058,{3U,0U,0U}},
{MOVEA_3058,{4U,0U,0U}},
{MOVEA_3058,{5U,0U,0U}},
{MOVEA_3058,{6U,0U,0U}},
{MOVEA_3058,{7U,0U,0U}},
{MOVEA_3060,{0U,0U,0U}},
{MOVEA_3060,{1U,0U,0U}},
{MOVEA_3060,{2U,0U,0U}},
{MOVEA_3060,{3U,0U,0U}},
{MOVEA_3060,{4U,0U,0U}},
{MOVEA_3060,{5U,0U,0U}},
{MOVEA_3060,{6U,0U,0U}},
{MOVEA_3060,{7U,0U,0U}},
{MOVEA_3068,{0U,0U,0U}},
{MOVEA_3068,{1U,0U,0U}},
{MOVEA_3068,{2U,0U,0U}},
{MOVEA_3068,{3U,0U,0U}},
{MOVEA_3068,{4U,0U,0U}},
{MOVEA_3068,{5U,0U,0U}},
{MOVEA_3068,{6U,0U,0U}},
{MOVEA_3068,{7U,0U,0U}},
{MOVEA_3070,{0U,0U,0U}},
{MOVEA_3070,{1U,0U,0U}},
{MOVEA_3070,{2U,0U,0U}},
{MOVEA_3070,{3U,0U,0U}},
{MOVEA_3070,{4U,0U,0U}},
{MOVEA_3070,{5U,0U,0U}},
{MOVEA_3070,{6U,0U,0U}},
{MOVEA_3070,{7U,0U,0U}},
{MOVEA_3078,{0U,0U,0U}},
{MOVEA_3079,{0U,0U,0U}},
{MOVEA_307A,{0U,0U,0U}},
{MOVEA_307B,{0U,0U,0U}},
{MOVEA_307C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3080,{0U,0U,0U}},
{MOVE_3080,{1U,0U,0U}},
{MOVE_3080,{2U,0U,0U}},
{MOVE_3080,{3U,0U,0U}},
{MOVE_3080,{4U,0U,0U}},
{MOVE_3080,{5U,0U,0U}},
{MOVE_3080,{6U,0U,0U}},
{MOVE_3080,{7U,0U,0U}},
{MOVE_3088,{0U,0U,0U}},
{MOVE_3088,{1U,0U,0U}},
{MOVE_3088,{2U,0U,0U}},
{MOVE_3088,{3U,0U,0U}},
{MOVE_3088,{4U,0U,0U}},
{MOVE_3088,{5U,0U,0U}},
{MOVE_3088,{6U,0U,0U}},
{MOVE_3088,{7U,0U,0U}},
{MOVE_3090,{0U,0U,0U}},
{MOVE_3090,{1U,0U,0U}},
{MOVE_3090,{2U,0U,0U}},
{MOVE_3090,{3U,0U,0U}},
{MOVE_3090,{4U,0U,0U}},
{MOVE_3090,{5U,0U,0U}},
{MOVE_3090,{6U,0U,0U}},
{MOVE_3090,{7U,0U,0U}},
{MOVE_3098,{0U,0U,0U}},
{MOVE_3098,{1U,0U,0U}},
{MOVE_3098,{2U,0U,0U}},
{MOVE_3098,{3U,0U,0U}},
{MOVE_3098,{4U,0U,0U}},
{MOVE_3098,{5U,0U,0U}},
{MOVE_3098,{6U,0U,0U}},
{MOVE_3098,{7U,0U,0U}},
{MOVE_30A0,{0U,0U,0U}},
{MOVE_30A0,{1U,0U,0U}},
{MOVE_30A0,{2U,0U,0U}},
{MOVE_30A0,{3U,0U,0U}},
{MOVE_30A0,{4U,0U,0U}},
{MOVE_30A0,{5U,0U,0U}},
{MOVE_30A0,{6U,0U,0U}},
{MOVE_30A0,{7U,0U,0U}},
{MOVE_30A8,{0U,0U,0U}},
{MOVE_30A8,{1U,0U,0U}},
{MOVE_30A8,{2U,0U,0U}},
{MOVE_30A8,{3U,0U,0U}},
{MOVE_30A8,{4U,0U,0U}},
{MOVE_30A8,{5U,0U,0U}},
{MOVE_30A8,{6U,0U,0U}},
{MOVE_30A8,{7U,0U,0U}},
{MOVE_30B0,{0U,0U,0U}},
{MOVE_30B0,{1U,0U,0U}},
{MOVE_30B0,{2U,0U,0U}},
{MOVE_30B0,{3U,0U,0U}},
{MOVE_30B0,{4U,0U,0U}},
{MOVE_30B0,{5U,0U,0U}},
{MOVE_30B0,{6U,0U,0U}},
{MOVE_30B0,{7U,0U,0U}},
{MOVE_30B8,{0U,0U,0U}},
{MOVE_30B9,{0U,0U,0U}},
{MOVE_30BA,{0U,0U,0U}},
{MOVE_30BB,{0U,0U,0U}},
{MOVE_30BC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_30C0,{0U,0U,0U}},
{MOVE_30C0,{1U,0U,0U}},
{MOVE_30C0,{2U,0U,0U}},
{MOVE_30C0,{3U,0U,0U}},
{MOVE_30C0,{4U,0U,0U}},
{MOVE_30C0,{5U,0U,0U}},
{MOVE_30C0,{6U,0U,0U}},
{MOVE_30C0,{7U,0U,0U}},
{MOVE_30C8,{0U,0U,0U}},
{MOVE_30C8,{1U,0U,0U}},
{MOVE_30C8,{2U,0U,0U}},
{MOVE_30C8,{3U,0U,0U}},
{MOVE_30C8,{4U,0U,0U}},
{MOVE_30C8,{5U,0U,0U}},
{MOVE_30C8,{6U,0U,0U}},
{MOVE_30C8,{7U,0U,0U}},
{MOVE_30D0,{0U,0U,0U}},
{MOVE_30D0,{1U,0U,0U}},
{MOVE_30D0,{2U,0U,0U}},
{MOVE_30D0,{3U,0U,0U}},
{MOVE_30D0,{4U,0U,0U}},
{MOVE_30D0,{5U,0U,0U}},
{MOVE_30D0,{6U,0U,0U}},
{MOVE_30D0,{7U,0U,0U}},
{MOVE_30D8,{0U,0U,0U}},
{MOVE_30D8,{1U,0U,0U}},
{MOVE_30D8,{2U,0U,0U}},
{MOVE_30D8,{3U,0U,0U}},
{MOVE_30D8,{4U,0U,0U}},
{MOVE_30D8,{5U,0U,0U}},
{MOVE_30D8,{6U,0U,0U}},
{MOVE_30D8,{7U,0U,0U}},
{MOVE_30E0,{0U,0U,0U}},
{MOVE_30E0,{1U,0U,0U}},
{MOVE_30E0,{2U,0U,0U}},
{MOVE_30E0,{3U,0U,0U}},
{MOVE_30E0,{4U,0U,0U}},
{MOVE_30E0,{5U,0U,0U}},
{MOVE_30E0,{6U,0U,0U}},
{MOVE_30E0,{7U,0U,0U}},
{MOVE_30E8,{0U,0U,0U}},
{MOVE_30E8,{1U,0U,0U}},
{MOVE_30E8,{2U,0U,0U}},
{MOVE_30E8,{3U,0U,0U}},
{MOVE_30E8,{4U,0U,0U}},
{MOVE_30E8,{5U,0U,0U}},
{MOVE_30E8,{6U,0U,0U}},
{MOVE_30E8,{7U,0U,0U}},
{MOVE_30F0,{0U,0U,0U}},
{MOVE_30F0,{1U,0U,0U}},
{MOVE_30F0,{2U,0U,0U}},
{MOVE_30F0,{3U,0U,0U}},
{MOVE_30F0,{4U,0U,0U}},
{MOVE_30F0,{5U,0U,0U}},
{MOVE_30F0,{6U,0U,0U}},
{MOVE_30F0,{7U,0U,0U}},
{MOVE_30F8,{0U,0U,0U}},
{MOVE_30F9,{0U,0U,0U}},
{MOVE_30FA,{0U,0U,0U}},
{MOVE_30FB,{0U,0U,0U}},
{MOVE_30FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3100,{0U,0U,0U}},
{MOVE_3100,{1U,0U,0U}},
{MOVE_3100,{2U,0U,0U}},
{MOVE_3100,{3U,0U,0U}},
{MOVE_3100,{4U,0U,0U}},
{MOVE_3100,{5U,0U,0U}},
{MOVE_3100,{6U,0U,0U}},
{MOVE_3100,{7U,0U,0U}},
{MOVE_3108,{0U,0U,0U}},
{MOVE_3108,{1U,0U,0U}},
{MOVE_3108,{2U,0U,0U}},
{MOVE_3108,{3U,0U,0U}},
{MOVE_3108,{4U,0U,0U}},
{MOVE_3108,{5U,0U,0U}},
{MOVE_3108,{6U,0U,0U}},
{MOVE_3108,{7U,0U,0U}},
{MOVE_3110,{0U,0U,0U}},
{MOVE_3110,{1U,0U,0U}},
{MOVE_3110,{2U,0U,0U}},
{MOVE_3110,{3U,0U,0U}},
{MOVE_3110,{4U,0U,0U}},
{MOVE_3110,{5U,0U,0U}},
{MOVE_3110,{6U,0U,0U}},
{MOVE_3110,{7U,0U,0U}},
{MOVE_3118,{0U,0U,0U}},
{MOVE_3118,{1U,0U,0U}},
{MOVE_3118,{2U,0U,0U}},
{MOVE_3118,{3U,0U,0U}},
{MOVE_3118,{4U,0U,0U}},
{MOVE_3118,{5U,0U,0U}},
{MOVE_3118,{6U,0U,0U}},
{MOVE_3118,{7U,0U,0U}},
{MOVE_3120,{0U,0U,0U}},
{MOVE_3120,{1U,0U,0U}},
{MOVE_3120,{2U,0U,0U}},
{MOVE_3120,{3U,0U,0U}},
{MOVE_3120,{4U,0U,0U}},
{MOVE_3120,{5U,0U,0U}},
{MOVE_3120,{6U,0U,0U}},
{MOVE_3120,{7U,0U,0U}},
{MOVE_3128,{0U,0U,0U}},
{MOVE_3128,{1U,0U,0U}},
{MOVE_3128,{2U,0U,0U}},
{MOVE_3128,{3U,0U,0U}},
{MOVE_3128,{4U,0U,0U}},
{MOVE_3128,{5U,0U,0U}},
{MOVE_3128,{6U,0U,0U}},
{MOVE_3128,{7U,0U,0U}},
{MOVE_3130,{0U,0U,0U}},
{MOVE_3130,{1U,0U,0U}},
{MOVE_3130,{2U,0U,0U}},
{MOVE_3130,{3U,0U,0U}},
{MOVE_3130,{4U,0U,0U}},
{MOVE_3130,{5U,0U,0U}},
{MOVE_3130,{6U,0U,0U}},
{MOVE_3130,{7U,0U,0U}},
{MOVE_3138,{0U,0U,0U}},
{MOVE_3139,{0U,0U,0U}},
{MOVE_313A,{0U,0U,0U}},
{MOVE_313B,{0U,0U,0U}},
{MOVE_313C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3140,{0U,0U,0U}},
{MOVE_3140,{1U,0U,0U}},
{MOVE_3140,{2U,0U,0U}},
{MOVE_3140,{3U,0U,0U}},
{MOVE_3140,{4U,0U,0U}},
{MOVE_3140,{5U,0U,0U}},
{MOVE_3140,{6U,0U,0U}},
{MOVE_3140,{7U,0U,0U}},
{MOVE_3148,{0U,0U,0U}},
{MOVE_3148,{1U,0U,0U}},
{MOVE_3148,{2U,0U,0U}},
{MOVE_3148,{3U,0U,0U}},
{MOVE_3148,{4U,0U,0U}},
{MOVE_3148,{5U,0U,0U}},
{MOVE_3148,{6U,0U,0U}},
{MOVE_3148,{7U,0U,0U}},
{MOVE_3150,{0U,0U,0U}},
{MOVE_3150,{1U,0U,0U}},
{MOVE_3150,{2U,0U,0U}},
{MOVE_3150,{3U,0U,0U}},
{MOVE_3150,{4U,0U,0U}},
{MOVE_3150,{5U,0U,0U}},
{MOVE_3150,{6U,0U,0U}},
{MOVE_3150,{7U,0U,0U}},
{MOVE_3158,{0U,0U,0U}},
{MOVE_3158,{1U,0U,0U}},
{MOVE_3158,{2U,0U,0U}},
{MOVE_3158,{3U,0U,0U}},
{MOVE_3158,{4U,0U,0U}},
{MOVE_3158,{5U,0U,0U}},
{MOVE_3158,{6U,0U,0U}},
{MOVE_3158,{7U,0U,0U}},
{MOVE_3160,{0U,0U,0U}},
{MOVE_3160,{1U,0U,0U}},
{MOVE_3160,{2U,0U,0U}},
{MOVE_3160,{3U,0U,0U}},
{MOVE_3160,{4U,0U,0U}},
{MOVE_3160,{5U,0U,0U}},
{MOVE_3160,{6U,0U,0U}},
{MOVE_3160,{7U,0U,0U}},
{MOVE_3168,{0U,0U,0U}},
{MOVE_3168,{1U,0U,0U}},
{MOVE_3168,{2U,0U,0U}},
{MOVE_3168,{3U,0U,0U}},
{MOVE_3168,{4U,0U,0U}},
{MOVE_3168,{5U,0U,0U}},
{MOVE_3168,{6U,0U,0U}},
{MOVE_3168,{7U,0U,0U}},
{MOVE_3170,{0U,0U,0U}},
{MOVE_3170,{1U,0U,0U}},
{MOVE_3170,{2U,0U,0U}},
{MOVE_3170,{3U,0U,0U}},
{MOVE_3170,{4U,0U,0U}},
{MOVE_3170,{5U,0U,0U}},
{MOVE_3170,{6U,0U,0U}},
{MOVE_3170,{7U,0U,0U}},
{MOVE_3178,{0U,0U,0U}},
{MOVE_3179,{0U,0U,0U}},
{MOVE_317A,{0U,0U,0U}},
{MOVE_317B,{0U,0U,0U}},
{MOVE_317C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3180,{0U,0U,0U}},
{MOVE_3180,{1U,0U,0U}},
{MOVE_3180,{2U,0U,0U}},
{MOVE_3180,{3U,0U,0U}},
{MOVE_3180,{4U,0U,0U}},
{MOVE_3180,{5U,0U,0U}},
{MOVE_3180,{6U,0U,0U}},
{MOVE_3180,{7U,0U,0U}},
{MOVE_3188,{0U,0U,0U}},
{MOVE_3188,{1U,0U,0U}},
{MOVE_3188,{2U,0U,0U}},
{MOVE_3188,{3U,0U,0U}},
{MOVE_3188,{4U,0U,0U}},
{MOVE_3188,{5U,0U,0U}},
{MOVE_3188,{6U,0U,0U}},
{MOVE_3188,{7U,0U,0U}},
{MOVE_3190,{0U,0U,0U}},
{MOVE_3190,{1U,0U,0U}},
{MOVE_3190,{2U,0U,0U}},
{MOVE_3190,{3U,0U,0U}},
{MOVE_3190,{4U,0U,0U}},
{MOVE_3190,{5U,0U,0U}},
{MOVE_3190,{6U,0U,0U}},
{MOVE_3190,{7U,0U,0U}},
{MOVE_3198,{0U,0U,0U}},
{MOVE_3198,{1U,0U,0U}},
{MOVE_3198,{2U,0U,0U}},
{MOVE_3198,{3U,0U,0U}},
{MOVE_3198,{4U,0U,0U}},
{MOVE_3198,{5U,0U,0U}},
{MOVE_3198,{6U,0U,0U}},
{MOVE_3198,{7U,0U,0U}},
{MOVE_31A0,{0U,0U,0U}},
{MOVE_31A0,{1U,0U,0U}},
{MOVE_31A0,{2U,0U,0U}},
{MOVE_31A0,{3U,0U,0U}},
{MOVE_31A0,{4U,0U,0U}},
{MOVE_31A0,{5U,0U,0U}},
{MOVE_31A0,{6U,0U,0U}},
{MOVE_31A0,{7U,0U,0U}},
{MOVE_31A8,{0U,0U,0U}},
{MOVE_31A8,{1U,0U,0U}},
{MOVE_31A8,{2U,0U,0U}},
{MOVE_31A8,{3U,0U,0U}},
{MOVE_31A8,{4U,0U,0U}},
{MOVE_31A8,{5U,0U,0U}},
{MOVE_31A8,{6U,0U,0U}},
{MOVE_31A8,{7U,0U,0U}},
{MOVE_31B0,{0U,0U,0U}},
{MOVE_31B0,{1U,0U,0U}},
{MOVE_31B0,{2U,0U,0U}},
{MOVE_31B0,{3U,0U,0U}},
{MOVE_31B0,{4U,0U,0U}},
{MOVE_31B0,{5U,0U,0U}},
{MOVE_31B0,{6U,0U,0U}},
{MOVE_31B0,{7U,0U,0U}},
{MOVE_31B8,{0U,0U,0U}},
{MOVE_31B9,{0U,0U,0U}},
{MOVE_31BA,{0U,0U,0U}},
{MOVE_31BB,{0U,0U,0U}},
{MOVE_31BC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_31C0,{0U,0U,0U}},
{MOVE_31C0,{1U,0U,0U}},
{MOVE_31C0,{2U,0U,0U}},
{MOVE_31C0,{3U,0U,0U}},
{MOVE_31C0,{4U,0U,0U}},
{MOVE_31C0,{5U,0U,0U}},
{MOVE_31C0,{6U,0U,0U}},
{MOVE_31C0,{7U,0U,0U}},
{MOVE_31C8,{0U,0U,0U}},
{MOVE_31C8,{1U,0U,0U}},
{MOVE_31C8,{2U,0U,0U}},
{MOVE_31C8,{3U,0U,0U}},
{MOVE_31C8,{4U,0U,0U}},
{MOVE_31C8,{5U,0U,0U}},
{MOVE_31C8,{6U,0U,0U}},
{MOVE_31C8,{7U,0U,0U}},
{MOVE_31D0,{0U,0U,0U}},
{MOVE_31D0,{1U,0U,0U}},
{MOVE_31D0,{2U,0U,0U}},
{MOVE_31D0,{3U,0U,0U}},
{MOVE_31D0,{4U,0U,0U}},
{MOVE_31D0,{5U,0U,0U}},
{MOVE_31D0,{6U,0U,0U}},
{MOVE_31D0,{7U,0U,0U}},
{MOVE_31D8,{0U,0U,0U}},
{MOVE_31D8,{1U,0U,0U}},
{MOVE_31D8,{2U,0U,0U}},
{MOVE_31D8,{3U,0U,0U}},
{MOVE_31D8,{4U,0U,0U}},
{MOVE_31D8,{5U,0U,0U}},
{MOVE_31D8,{6U,0U,0U}},
{MOVE_31D8,{7U,0U,0U}},
{MOVE_31E0,{0U,0U,0U}},
{MOVE_31E0,{1U,0U,0U}},
{MOVE_31E0,{2U,0U,0U}},
{MOVE_31E0,{3U,0U,0U}},
{MOVE_31E0,{4U,0U,0U}},
{MOVE_31E0,{5U,0U,0U}},
{MOVE_31E0,{6U,0U,0U}},
{MOVE_31E0,{7U,0U,0U}},
{MOVE_31E8,{0U,0U,0U}},
{MOVE_31E8,{1U,0U,0U}},
{MOVE_31E8,{2U,0U,0U}},
{MOVE_31E8,{3U,0U,0U}},
{MOVE_31E8,{4U,0U,0U}},
{MOVE_31E8,{5U,0U,0U}},
{MOVE_31E8,{6U,0U,0U}},
{MOVE_31E8,{7U,0U,0U}},
{MOVE_31F0,{0U,0U,0U}},
{MOVE_31F0,{1U,0U,0U}},
{MOVE_31F0,{2U,0U,0U}},
{MOVE_31F0,{3U,0U,0U}},
{MOVE_31F0,{4U,0U,0U}},
{MOVE_31F0,{5U,0U,0U}},
{MOVE_31F0,{6U,0U,0U}},
{MOVE_31F0,{7U,0U,0U}},
{MOVE_31F8,{0U,0U,0U}},
{MOVE_31F9,{0U,0U,0U}},
{MOVE_31FA,{0U,0U,0U}},
{MOVE_31FB,{0U,0U,0U}},
{MOVE_31FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3000,{0U,1U,0U}},
{MOVE_3000,{1U,1U,0U}},
{MOVE_3000,{2U,1U,0U}},
{MOVE_3000,{3U,1U,0U}},
{MOVE_3000,{4U,1U,0U}},
{MOVE_3000,{5U,1U,0U}},
{MOVE_3000,{6U,1U,0U}},
{MOVE_3000,{7U,1U,0U}},
{MOVE_3008,{0U,1U,0U}},
{MOVE_3008,{1U,1U,0U}},
{MOVE_3008,{2U,1U,0U}},
{MOVE_3008,{3U,1U,0U}},
{MOVE_3008,{4U,1U,0U}},
{MOVE_3008,{5U,1U,0U}},
{MOVE_3008,{6U,1U,0U}},
{MOVE_3008,{7U,1U,0U}},
{MOVE_3010,{0U,1U,0U}},
{MOVE_3010,{1U,1U,0U}},
{MOVE_3010,{2U,1U,0U}},
{MOVE_3010,{3U,1U,0U}},
{MOVE_3010,{4U,1U,0U}},
{MOVE_3010,{5U,1U,0U}},
{MOVE_3010,{6U,1U,0U}},
{MOVE_3010,{7U,1U,0U}},
{MOVE_3018,{0U,1U,0U}},
{MOVE_3018,{1U,1U,0U}},
{MOVE_3018,{2U,1U,0U}},
{MOVE_3018,{3U,1U,0U}},
{MOVE_3018,{4U,1U,0U}},
{MOVE_3018,{5U,1U,0U}},
{MOVE_3018,{6U,1U,0U}},
{MOVE_3018,{7U,1U,0U}},
{MOVE_3020,{0U,1U,0U}},
{MOVE_3020,{1U,1U,0U}},
{MOVE_3020,{2U,1U,0U}},
{MOVE_3020,{3U,1U,0U}},
{MOVE_3020,{4U,1U,0U}},
{MOVE_3020,{5U,1U,0U}},
{MOVE_3020,{6U,1U,0U}},
{MOVE_3020,{7U,1U,0U}},
{MOVE_3028,{0U,1U,0U}},
{MOVE_3028,{1U,1U,0U}},
{MOVE_3028,{2U,1U,0U}},
{MOVE_3028,{3U,1U,0U}},
{MOVE_3028,{4U,1U,0U}},
{MOVE_3028,{5U,1U,0U}},
{MOVE_3028,{6U,1U,0U}},
{MOVE_3028,{7U,1U,0U}},
{MOVE_3030,{0U,1U,0U}},
{MOVE_3030,{1U,1U,0U}},
{MOVE_3030,{2U,1U,0U}},
{MOVE_3030,{3U,1U,0U}},
{MOVE_3030,{4U,1U,0U}},
{MOVE_3030,{5U,1U,0U}},
{MOVE_3030,{6U,1U,0U}},
{MOVE_3030,{7U,1U,0U}},
{MOVE_3038,{0U,1U,0U}},
{MOVE_3039,{0U,1U,0U}},
{MOVE_303A,{0U,1U,0U}},
{MOVE_303B,{0U,1U,0U}},
{MOVE_303C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_3040,{0U,1U,0U}},
{MOVEA_3040,{1U,1U,0U}},
{MOVEA_3040,{2U,1U,0U}},
{MOVEA_3040,{3U,1U,0U}},
{MOVEA_3040,{4U,1U,0U}},
{MOVEA_3040,{5U,1U,0U}},
{MOVEA_3040,{6U,1U,0U}},
{MOVEA_3040,{7U,1U,0U}},
{MOVEA_3048,{0U,1U,0U}},
{MOVEA_3048,{1U,1U,0U}},
{MOVEA_3048,{2U,1U,0U}},
{MOVEA_3048,{3U,1U,0U}},
{MOVEA_3048,{4U,1U,0U}},
{MOVEA_3048,{5U,1U,0U}},
{MOVEA_3048,{6U,1U,0U}},
{MOVEA_3048,{7U,1U,0U}},
{MOVEA_3050,{0U,1U,0U}},
{MOVEA_3050,{1U,1U,0U}},
{MOVEA_3050,{2U,1U,0U}},
{MOVEA_3050,{3U,1U,0U}},
{MOVEA_3050,{4U,1U,0U}},
{MOVEA_3050,{5U,1U,0U}},
{MOVEA_3050,{6U,1U,0U}},
{MOVEA_3050,{7U,1U,0U}},
{MOVEA_3058,{0U,1U,0U}},
{MOVEA_3058,{1U,1U,0U}},
{MOVEA_3058,{2U,1U,0U}},
{MOVEA_3058,{3U,1U,0U}},
{MOVEA_3058,{4U,1U,0U}},
{MOVEA_3058,{5U,1U,0U}},
{MOVEA_3058,{6U,1U,0U}},
{MOVEA_3058,{7U,1U,0U}},
{MOVEA_3060,{0U,1U,0U}},
{MOVEA_3060,{1U,1U,0U}},
{MOVEA_3060,{2U,1U,0U}},
{MOVEA_3060,{3U,1U,0U}},
{MOVEA_3060,{4U,1U,0U}},
{MOVEA_3060,{5U,1U,0U}},
{MOVEA_3060,{6U,1U,0U}},
{MOVEA_3060,{7U,1U,0U}},
{MOVEA_3068,{0U,1U,0U}},
{MOVEA_3068,{1U,1U,0U}},
{MOVEA_3068,{2U,1U,0U}},
{MOVEA_3068,{3U,1U,0U}},
{MOVEA_3068,{4U,1U,0U}},
{MOVEA_3068,{5U,1U,0U}},
{MOVEA_3068,{6U,1U,0U}},
{MOVEA_3068,{7U,1U,0U}},
{MOVEA_3070,{0U,1U,0U}},
{MOVEA_3070,{1U,1U,0U}},
{MOVEA_3070,{2U,1U,0U}},
{MOVEA_3070,{3U,1U,0U}},
{MOVEA_3070,{4U,1U,0U}},
{MOVEA_3070,{5U,1U,0U}},
{MOVEA_3070,{6U,1U,0U}},
{MOVEA_3070,{7U,1U,0U}},
{MOVEA_3078,{0U,1U,0U}},
{MOVEA_3079,{0U,1U,0U}},
{MOVEA_307A,{0U,1U,0U}},
{MOVEA_307B,{0U,1U,0U}},
{MOVEA_307C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3080,{0U,1U,0U}},
{MOVE_3080,{1U,1U,0U}},
{MOVE_3080,{2U,1U,0U}},
{MOVE_3080,{3U,1U,0U}},
{MOVE_3080,{4U,1U,0U}},
{MOVE_3080,{5U,1U,0U}},
{MOVE_3080,{6U,1U,0U}},
{MOVE_3080,{7U,1U,0U}},
{MOVE_3088,{0U,1U,0U}},
{MOVE_3088,{1U,1U,0U}},
{MOVE_3088,{2U,1U,0U}},
{MOVE_3088,{3U,1U,0U}},
{MOVE_3088,{4U,1U,0U}},
{MOVE_3088,{5U,1U,0U}},
{MOVE_3088,{6U,1U,0U}},
{MOVE_3088,{7U,1U,0U}},
{MOVE_3090,{0U,1U,0U}},
{MOVE_3090,{1U,1U,0U}},
{MOVE_3090,{2U,1U,0U}},
{MOVE_3090,{3U,1U,0U}},
{MOVE_3090,{4U,1U,0U}},
{MOVE_3090,{5U,1U,0U}},
{MOVE_3090,{6U,1U,0U}},
{MOVE_3090,{7U,1U,0U}},
{MOVE_3098,{0U,1U,0U}},
{MOVE_3098,{1U,1U,0U}},
{MOVE_3098,{2U,1U,0U}},
{MOVE_3098,{3U,1U,0U}},
{MOVE_3098,{4U,1U,0U}},
{MOVE_3098,{5U,1U,0U}},
{MOVE_3098,{6U,1U,0U}},
{MOVE_3098,{7U,1U,0U}},
{MOVE_30A0,{0U,1U,0U}},
{MOVE_30A0,{1U,1U,0U}},
{MOVE_30A0,{2U,1U,0U}},
{MOVE_30A0,{3U,1U,0U}},
{MOVE_30A0,{4U,1U,0U}},
{MOVE_30A0,{5U,1U,0U}},
{MOVE_30A0,{6U,1U,0U}},
{MOVE_30A0,{7U,1U,0U}},
{MOVE_30A8,{0U,1U,0U}},
{MOVE_30A8,{1U,1U,0U}},
{MOVE_30A8,{2U,1U,0U}},
{MOVE_30A8,{3U,1U,0U}},
{MOVE_30A8,{4U,1U,0U}},
{MOVE_30A8,{5U,1U,0U}},
{MOVE_30A8,{6U,1U,0U}},
{MOVE_30A8,{7U,1U,0U}},
{MOVE_30B0,{0U,1U,0U}},
{MOVE_30B0,{1U,1U,0U}},
{MOVE_30B0,{2U,1U,0U}},
{MOVE_30B0,{3U,1U,0U}},
{MOVE_30B0,{4U,1U,0U}},
{MOVE_30B0,{5U,1U,0U}},
{MOVE_30B0,{6U,1U,0U}},
{MOVE_30B0,{7U,1U,0U}},
{MOVE_30B8,{0U,1U,0U}},
{MOVE_30B9,{0U,1U,0U}},
{MOVE_30BA,{0U,1U,0U}},
{MOVE_30BB,{0U,1U,0U}},
{MOVE_30BC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_30C0,{0U,1U,0U}},
{MOVE_30C0,{1U,1U,0U}},
{MOVE_30C0,{2U,1U,0U}},
{MOVE_30C0,{3U,1U,0U}},
{MOVE_30C0,{4U,1U,0U}},
{MOVE_30C0,{5U,1U,0U}},
{MOVE_30C0,{6U,1U,0U}},
{MOVE_30C0,{7U,1U,0U}},
{MOVE_30C8,{0U,1U,0U}},
{MOVE_30C8,{1U,1U,0U}},
{MOVE_30C8,{2U,1U,0U}},
{MOVE_30C8,{3U,1U,0U}},
{MOVE_30C8,{4U,1U,0U}},
{MOVE_30C8,{5U,1U,0U}},
{MOVE_30C8,{6U,1U,0U}},
{MOVE_30C8,{7U,1U,0U}},
{MOVE_30D0,{0U,1U,0U}},
{MOVE_30D0,{1U,1U,0U}},
{MOVE_30D0,{2U,1U,0U}},
{MOVE_30D0,{3U,1U,0U}},
{MOVE_30D0,{4U,1U,0U}},
{MOVE_30D0,{5U,1U,0U}},
{MOVE_30D0,{6U,1U,0U}},
{MOVE_30D0,{7U,1U,0U}},
{MOVE_30D8,{0U,1U,0U}},
{MOVE_30D8,{1U,1U,0U}},
{MOVE_30D8,{2U,1U,0U}},
{MOVE_30D8,{3U,1U,0U}},
{MOVE_30D8,{4U,1U,0U}},
{MOVE_30D8,{5U,1U,0U}},
{MOVE_30D8,{6U,1U,0U}},
{MOVE_30D8,{7U,1U,0U}},
{MOVE_30E0,{0U,1U,0U}},
{MOVE_30E0,{1U,1U,0U}},
{MOVE_30E0,{2U,1U,0U}},
{MOVE_30E0,{3U,1U,0U}},
{MOVE_30E0,{4U,1U,0U}},
{MOVE_30E0,{5U,1U,0U}},
{MOVE_30E0,{6U,1U,0U}},
{MOVE_30E0,{7U,1U,0U}},
{MOVE_30E8,{0U,1U,0U}},
{MOVE_30E8,{1U,1U,0U}},
{MOVE_30E8,{2U,1U,0U}},
{MOVE_30E8,{3U,1U,0U}},
{MOVE_30E8,{4U,1U,0U}},
{MOVE_30E8,{5U,1U,0U}},
{MOVE_30E8,{6U,1U,0U}},
{MOVE_30E8,{7U,1U,0U}},
{MOVE_30F0,{0U,1U,0U}},
{MOVE_30F0,{1U,1U,0U}},
{MOVE_30F0,{2U,1U,0U}},
{MOVE_30F0,{3U,1U,0U}},
{MOVE_30F0,{4U,1U,0U}},
{MOVE_30F0,{5U,1U,0U}},
{MOVE_30F0,{6U,1U,0U}},
{MOVE_30F0,{7U,1U,0U}},
{MOVE_30F8,{0U,1U,0U}},
{MOVE_30F9,{0U,1U,0U}},
{MOVE_30FA,{0U,1U,0U}},
{MOVE_30FB,{0U,1U,0U}},
{MOVE_30FC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3100,{0U,1U,0U}},
{MOVE_3100,{1U,1U,0U}},
{MOVE_3100,{2U,1U,0U}},
{MOVE_3100,{3U,1U,0U}},
{MOVE_3100,{4U,1U,0U}},
{MOVE_3100,{5U,1U,0U}},
{MOVE_3100,{6U,1U,0U}},
{MOVE_3100,{7U,1U,0U}},
{MOVE_3108,{0U,1U,0U}},
{MOVE_3108,{1U,1U,0U}},
{MOVE_3108,{2U,1U,0U}},
{MOVE_3108,{3U,1U,0U}},
{MOVE_3108,{4U,1U,0U}},
{MOVE_3108,{5U,1U,0U}},
{MOVE_3108,{6U,1U,0U}},
{MOVE_3108,{7U,1U,0U}},
{MOVE_3110,{0U,1U,0U}},
{MOVE_3110,{1U,1U,0U}},
{MOVE_3110,{2U,1U,0U}},
{MOVE_3110,{3U,1U,0U}},
{MOVE_3110,{4U,1U,0U}},
{MOVE_3110,{5U,1U,0U}},
{MOVE_3110,{6U,1U,0U}},
{MOVE_3110,{7U,1U,0U}},
{MOVE_3118,{0U,1U,0U}},
{MOVE_3118,{1U,1U,0U}},
{MOVE_3118,{2U,1U,0U}},
{MOVE_3118,{3U,1U,0U}},
{MOVE_3118,{4U,1U,0U}},
{MOVE_3118,{5U,1U,0U}},
{MOVE_3118,{6U,1U,0U}},
{MOVE_3118,{7U,1U,0U}},
{MOVE_3120,{0U,1U,0U}},
{MOVE_3120,{1U,1U,0U}},
{MOVE_3120,{2U,1U,0U}},
{MOVE_3120,{3U,1U,0U}},
{MOVE_3120,{4U,1U,0U}},
{MOVE_3120,{5U,1U,0U}},
{MOVE_3120,{6U,1U,0U}},
{MOVE_3120,{7U,1U,0U}},
{MOVE_3128,{0U,1U,0U}},
{MOVE_3128,{1U,1U,0U}},
{MOVE_3128,{2U,1U,0U}},
{MOVE_3128,{3U,1U,0U}},
{MOVE_3128,{4U,1U,0U}},
{MOVE_3128,{5U,1U,0U}},
{MOVE_3128,{6U,1U,0U}},
{MOVE_3128,{7U,1U,0U}},
{MOVE_3130,{0U,1U,0U}},
{MOVE_3130,{1U,1U,0U}},
{MOVE_3130,{2U,1U,0U}},
{MOVE_3130,{3U,1U,0U}},
{MOVE_3130,{4U,1U,0U}},
{MOVE_3130,{5U,1U,0U}},
{MOVE_3130,{6U,1U,0U}},
{MOVE_3130,{7U,1U,0U}},
{MOVE_3138,{0U,1U,0U}},
{MOVE_3139,{0U,1U,0U}},
{MOVE_313A,{0U,1U,0U}},
{MOVE_313B,{0U,1U,0U}},
{MOVE_313C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3140,{0U,1U,0U}},
{MOVE_3140,{1U,1U,0U}},
{MOVE_3140,{2U,1U,0U}},
{MOVE_3140,{3U,1U,0U}},
{MOVE_3140,{4U,1U,0U}},
{MOVE_3140,{5U,1U,0U}},
{MOVE_3140,{6U,1U,0U}},
{MOVE_3140,{7U,1U,0U}},
{MOVE_3148,{0U,1U,0U}},
{MOVE_3148,{1U,1U,0U}},
{MOVE_3148,{2U,1U,0U}},
{MOVE_3148,{3U,1U,0U}},
{MOVE_3148,{4U,1U,0U}},
{MOVE_3148,{5U,1U,0U}},
{MOVE_3148,{6U,1U,0U}},
{MOVE_3148,{7U,1U,0U}},
{MOVE_3150,{0U,1U,0U}},
{MOVE_3150,{1U,1U,0U}},
{MOVE_3150,{2U,1U,0U}},
{MOVE_3150,{3U,1U,0U}},
{MOVE_3150,{4U,1U,0U}},
{MOVE_3150,{5U,1U,0U}},
{MOVE_3150,{6U,1U,0U}},
{MOVE_3150,{7U,1U,0U}},
{MOVE_3158,{0U,1U,0U}},
{MOVE_3158,{1U,1U,0U}},
{MOVE_3158,{2U,1U,0U}},
{MOVE_3158,{3U,1U,0U}},
{MOVE_3158,{4U,1U,0U}},
{MOVE_3158,{5U,1U,0U}},
{MOVE_3158,{6U,1U,0U}},
{MOVE_3158,{7U,1U,0U}},
{MOVE_3160,{0U,1U,0U}},
{MOVE_3160,{1U,1U,0U}},
{MOVE_3160,{2U,1U,0U}},
{MOVE_3160,{3U,1U,0U}},
{MOVE_3160,{4U,1U,0U}},
{MOVE_3160,{5U,1U,0U}},
{MOVE_3160,{6U,1U,0U}},
{MOVE_3160,{7U,1U,0U}},
{MOVE_3168,{0U,1U,0U}},
{MOVE_3168,{1U,1U,0U}},
{MOVE_3168,{2U,1U,0U}},
{MOVE_3168,{3U,1U,0U}},
{MOVE_3168,{4U,1U,0U}},
{MOVE_3168,{5U,1U,0U}},
{MOVE_3168,{6U,1U,0U}},
{MOVE_3168,{7U,1U,0U}},
{MOVE_3170,{0U,1U,0U}},
{MOVE_3170,{1U,1U,0U}},
{MOVE_3170,{2U,1U,0U}},
{MOVE_3170,{3U,1U,0U}},
{MOVE_3170,{4U,1U,0U}},
{MOVE_3170,{5U,1U,0U}},
{MOVE_3170,{6U,1U,0U}},
{MOVE_3170,{7U,1U,0U}},
{MOVE_3178,{0U,1U,0U}},
{MOVE_3179,{0U,1U,0U}},
{MOVE_317A,{0U,1U,0U}},
{MOVE_317B,{0U,1U,0U}},
{MOVE_317C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3180,{0U,1U,0U}},
{MOVE_3180,{1U,1U,0U}},
{MOVE_3180,{2U,1U,0U}},
{MOVE_3180,{3U,1U,0U}},
{MOVE_3180,{4U,1U,0U}},
{MOVE_3180,{5U,1U,0U}},
{MOVE_3180,{6U,1U,0U}},
{MOVE_3180,{7U,1U,0U}},
{MOVE_3188,{0U,1U,0U}},
{MOVE_3188,{1U,1U,0U}},
{MOVE_3188,{2U,1U,0U}},
{MOVE_3188,{3U,1U,0U}},
{MOVE_3188,{4U,1U,0U}},
{MOVE_3188,{5U,1U,0U}},
{MOVE_3188,{6U,1U,0U}},
{MOVE_3188,{7U,1U,0U}},
{MOVE_3190,{0U,1U,0U}},
{MOVE_3190,{1U,1U,0U}},
{MOVE_3190,{2U,1U,0U}},
{MOVE_3190,{3U,1U,0U}},
{MOVE_3190,{4U,1U,0U}},
{MOVE_3190,{5U,1U,0U}},
{MOVE_3190,{6U,1U,0U}},
{MOVE_3190,{7U,1U,0U}},
{MOVE_3198,{0U,1U,0U}},
{MOVE_3198,{1U,1U,0U}},
{MOVE_3198,{2U,1U,0U}},
{MOVE_3198,{3U,1U,0U}},
{MOVE_3198,{4U,1U,0U}},
{MOVE_3198,{5U,1U,0U}},
{MOVE_3198,{6U,1U,0U}},
{MOVE_3198,{7U,1U,0U}},
{MOVE_31A0,{0U,1U,0U}},
{MOVE_31A0,{1U,1U,0U}},
{MOVE_31A0,{2U,1U,0U}},
{MOVE_31A0,{3U,1U,0U}},
{MOVE_31A0,{4U,1U,0U}},
{MOVE_31A0,{5U,1U,0U}},
{MOVE_31A0,{6U,1U,0U}},
{MOVE_31A0,{7U,1U,0U}},
{MOVE_31A8,{0U,1U,0U}},
{MOVE_31A8,{1U,1U,0U}},
{MOVE_31A8,{2U,1U,0U}},
{MOVE_31A8,{3U,1U,0U}},
{MOVE_31A8,{4U,1U,0U}},
{MOVE_31A8,{5U,1U,0U}},
{MOVE_31A8,{6U,1U,0U}},
{MOVE_31A8,{7U,1U,0U}},
{MOVE_31B0,{0U,1U,0U}},
{MOVE_31B0,{1U,1U,0U}},
{MOVE_31B0,{2U,1U,0U}},
{MOVE_31B0,{3U,1U,0U}},
{MOVE_31B0,{4U,1U,0U}},
{MOVE_31B0,{5U,1U,0U}},
{MOVE_31B0,{6U,1U,0U}},
{MOVE_31B0,{7U,1U,0U}},
{MOVE_31B8,{0U,1U,0U}},
{MOVE_31B9,{0U,1U,0U}},
{MOVE_31BA,{0U,1U,0U}},
{MOVE_31BB,{0U,1U,0U}},
{MOVE_31BC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_33C0,{0U,0U,0U}},
{MOVE_33C0,{1U,0U,0U}},
{MOVE_33C0,{2U,0U,0U}},
{MOVE_33C0,{3U,0U,0U}},
{MOVE_33C0,{4U,0U,0U}},
{MOVE_33C0,{5U,0U,0U}},
{MOVE_33C0,{6U,0U,0U}},
{MOVE_33C0,{7U,0U,0U}},
{MOVE_33C8,{0U,0U,0U}},
{MOVE_33C8,{1U,0U,0U}},
{MOVE_33C8,{2U,0U,0U}},
{MOVE_33C8,{3U,0U,0U}},
{MOVE_33C8,{4U,0U,0U}},
{MOVE_33C8,{5U,0U,0U}},
{MOVE_33C8,{6U,0U,0U}},
{MOVE_33C8,{7U,0U,0U}},
{MOVE_33D0,{0U,0U,0U}},
{MOVE_33D0,{1U,0U,0U}},
{MOVE_33D0,{2U,0U,0U}},
{MOVE_33D0,{3U,0U,0U}},
{MOVE_33D0,{4U,0U,0U}},
{MOVE_33D0,{5U,0U,0U}},
{MOVE_33D0,{6U,0U,0U}},
{MOVE_33D0,{7U,0U,0U}},
{MOVE_33D8,{0U,0U,0U}},
{MOVE_33D8,{1U,0U,0U}},
{MOVE_33D8,{2U,0U,0U}},
{MOVE_33D8,{3U,0U,0U}},
{MOVE_33D8,{4U,0U,0U}},
{MOVE_33D8,{5U,0U,0U}},
{MOVE_33D8,{6U,0U,0U}},
{MOVE_33D8,{7U,0U,0U}},
{MOVE_33E0,{0U,0U,0U}},
{MOVE_33E0,{1U,0U,0U}},
{MOVE_33E0,{2U,0U,0U}},
{MOVE_33E0,{3U,0U,0U}},
{MOVE_33E0,{4U,0U,0U}},
{MOVE_33E0,{5U,0U,0U}},
{MOVE_33E0,{6U,0U,0U}},
{MOVE_33E0,{7U,0U,0U}},
{MOVE_33E8,{0U,0U,0U}},
{MOVE_33E8,{1U,0U,0U}},
{MOVE_33E8,{2U,0U,0U}},
{MOVE_33E8,{3U,0U,0U}},
{MOVE_33E8,{4U,0U,0U}},
{MOVE_33E8,{5U,0U,0U}},
{MOVE_33E8,{6U,0U,0U}},
{MOVE_33E8,{7U,0U,0U}},
{MOVE_33F0,{0U,0U,0U}},
{MOVE_33F0,{1U,0U,0U}},
{MOVE_33F0,{2U,0U,0U}},
{MOVE_33F0,{3U,0U,0U}},
{MOVE_33F0,{4U,0U,0U}},
{MOVE_33F0,{5U,0U,0U}},
{MOVE_33F0,{6U,0U,0U}},
{MOVE_33F0,{7U,0U,0U}},
{MOVE_33F8,{0U,0U,0U}},
{MOVE_33F9,{0U,0U,0U}},
{MOVE_33FA,{0U,0U,0U}},
{MOVE_33FB,{0U,0U,0U}},
{MOVE_33FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3000,{0U,2U,0U}},
{MOVE_3000,{1U,2U,0U}},
{MOVE_3000,{2U,2U,0U}},
{MOVE_3000,{3U,2U,0U}},
{MOVE_3000,{4U,2U,0U}},
{MOVE_3000,{5U,2U,0U}},
{MOVE_3000,{6U,2U,0U}},
{MOVE_3000,{7U,2U,0U}},
{MOVE_3008,{0U,2U,0U}},
{MOVE_3008,{1U,2U,0U}},
{MOVE_3008,{2U,2U,0U}},
{MOVE_3008,{3U,2U,0U}},
{MOVE_3008,{4U,2U,0U}},
{MOVE_3008,{5U,2U,0U}},
{MOVE_3008,{6U,2U,0U}},
{MOVE_3008,{7U,2U,0U}},
{MOVE_3010,{0U,2U,0U}},
{MOVE_3010,{1U,2U,0U}},
{MOVE_3010,{2U,2U,0U}},
{MOVE_3010,{3U,2U,0U}},
{MOVE_3010,{4U,2U,0U}},
{MOVE_3010,{5U,2U,0U}},
{MOVE_3010,{6U,2U,0U}},
{MOVE_3010,{7U,2U,0U}},
{MOVE_3018,{0U,2U,0U}},
{MOVE_3018,{1U,2U,0U}},
{MOVE_3018,{2U,2U,0U}},
{MOVE_3018,{3U,2U,0U}},
{MOVE_3018,{4U,2U,0U}},
{MOVE_3018,{5U,2U,0U}},
{MOVE_3018,{6U,2U,0U}},
{MOVE_3018,{7U,2U,0U}},
{MOVE_3020,{0U,2U,0U}},
{MOVE_3020,{1U,2U,0U}},
{MOVE_3020,{2U,2U,0U}},
{MOVE_3020,{3U,2U,0U}},
{MOVE_3020,{4U,2U,0U}},
{MOVE_3020,{5U,2U,0U}},
{MOVE_3020,{6U,2U,0U}},
{MOVE_3020,{7U,2U,0U}},
{MOVE_3028,{0U,2U,0U}},
{MOVE_3028,{1U,2U,0U}},
{MOVE_3028,{2U,2U,0U}},
{MOVE_3028,{3U,2U,0U}},
{MOVE_3028,{4U,2U,0U}},
{MOVE_3028,{5U,2U,0U}},
{MOVE_3028,{6U,2U,0U}},
{MOVE_3028,{7U,2U,0U}},
{MOVE_3030,{0U,2U,0U}},
{MOVE_3030,{1U,2U,0U}},
{MOVE_3030,{2U,2U,0U}},
{MOVE_3030,{3U,2U,0U}},
{MOVE_3030,{4U,2U,0U}},
{MOVE_3030,{5U,2U,0U}},
{MOVE_3030,{6U,2U,0U}},
{MOVE_3030,{7U,2U,0U}},
{MOVE_3038,{0U,2U,0U}},
{MOVE_3039,{0U,2U,0U}},
{MOVE_303A,{0U,2U,0U}},
{MOVE_303B,{0U,2U,0U}},
{MOVE_303C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_3040,{0U,2U,0U}},
{MOVEA_3040,{1U,2U,0U}},
{MOVEA_3040,{2U,2U,0U}},
{MOVEA_3040,{3U,2U,0U}},
{MOVEA_3040,{4U,2U,0U}},
{MOVEA_3040,{5U,2U,0U}},
{MOVEA_3040,{6U,2U,0U}},
{MOVEA_3040,{7U,2U,0U}},
{MOVEA_3048,{0U,2U,0U}},
{MOVEA_3048,{1U,2U,0U}},
{MOVEA_3048,{2U,2U,0U}},
{MOVEA_3048,{3U,2U,0U}},
{MOVEA_3048,{4U,2U,0U}},
{MOVEA_3048,{5U,2U,0U}},
{MOVEA_3048,{6U,2U,0U}},
{MOVEA_3048,{7U,2U,0U}},
{MOVEA_3050,{0U,2U,0U}},
{MOVEA_3050,{1U,2U,0U}},
{MOVEA_3050,{2U,2U,0U}},
{MOVEA_3050,{3U,2U,0U}},
{MOVEA_3050,{4U,2U,0U}},
{MOVEA_3050,{5U,2U,0U}},
{MOVEA_3050,{6U,2U,0U}},
{MOVEA_3050,{7U,2U,0U}},
{MOVEA_3058,{0U,2U,0U}},
{MOVEA_3058,{1U,2U,0U}},
{MOVEA_3058,{2U,2U,0U}},
{MOVEA_3058,{3U,2U,0U}},
{MOVEA_3058,{4U,2U,0U}},
{MOVEA_3058,{5U,2U,0U}},
{MOVEA_3058,{6U,2U,0U}},
{MOVEA_3058,{7U,2U,0U}},
{MOVEA_3060,{0U,2U,0U}},
{MOVEA_3060,{1U,2U,0U}},
{MOVEA_3060,{2U,2U,0U}},
{MOVEA_3060,{3U,2U,0U}},
{MOVEA_3060,{4U,2U,0U}},
{MOVEA_3060,{5U,2U,0U}},
{MOVEA_3060,{6U,2U,0U}},
{MOVEA_3060,{7U,2U,0U}},
{MOVEA_3068,{0U,2U,0U}},
{MOVEA_3068,{1U,2U,0U}},
{MOVEA_3068,{2U,2U,0U}},
{MOVEA_3068,{3U,2U,0U}},
{MOVEA_3068,{4U,2U,0U}},
{MOVEA_3068,{5U,2U,0U}},
{MOVEA_3068,{6U,2U,0U}},
{MOVEA_3068,{7U,2U,0U}},
{MOVEA_3070,{0U,2U,0U}},
{MOVEA_3070,{1U,2U,0U}},
{MOVEA_3070,{2U,2U,0U}},
{MOVEA_3070,{3U,2U,0U}},
{MOVEA_3070,{4U,2U,0U}},
{MOVEA_3070,{5U,2U,0U}},
{MOVEA_3070,{6U,2U,0U}},
{MOVEA_3070,{7U,2U,0U}},
{MOVEA_3078,{0U,2U,0U}},
{MOVEA_3079,{0U,2U,0U}},
{MOVEA_307A,{0U,2U,0U}},
{MOVEA_307B,{0U,2U,0U}},
{MOVEA_307C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3080,{0U,2U,0U}},
{MOVE_3080,{1U,2U,0U}},
{MOVE_3080,{2U,2U,0U}},
{MOVE_3080,{3U,2U,0U}},
{MOVE_3080,{4U,2U,0U}},
{MOVE_3080,{5U,2U,0U}},
{MOVE_3080,{6U,2U,0U}},
{MOVE_3080,{7U,2U,0U}},
{MOVE_3088,{0U,2U,0U}},
{MOVE_3088,{1U,2U,0U}},
{MOVE_3088,{2U,2U,0U}},
{MOVE_3088,{3U,2U,0U}},
{MOVE_3088,{4U,2U,0U}},
{MOVE_3088,{5U,2U,0U}},
{MOVE_3088,{6U,2U,0U}},
{MOVE_3088,{7U,2U,0U}},
{MOVE_3090,{0U,2U,0U}},
{MOVE_3090,{1U,2U,0U}},
{MOVE_3090,{2U,2U,0U}},
{MOVE_3090,{3U,2U,0U}},
{MOVE_3090,{4U,2U,0U}},
{MOVE_3090,{5U,2U,0U}},
{MOVE_3090,{6U,2U,0U}},
{MOVE_3090,{7U,2U,0U}},
{MOVE_3098,{0U,2U,0U}},
{MOVE_3098,{1U,2U,0U}},
{MOVE_3098,{2U,2U,0U}},
{MOVE_3098,{3U,2U,0U}},
{MOVE_3098,{4U,2U,0U}},
{MOVE_3098,{5U,2U,0U}},
{MOVE_3098,{6U,2U,0U}},
{MOVE_3098,{7U,2U,0U}},
{MOVE_30A0,{0U,2U,0U}},
{MOVE_30A0,{1U,2U,0U}},
{MOVE_30A0,{2U,2U,0U}},
{MOVE_30A0,{3U,2U,0U}},
{MOVE_30A0,{4U,2U,0U}},
{MOVE_30A0,{5U,2U,0U}},
{MOVE_30A0,{6U,2U,0U}},
{MOVE_30A0,{7U,2U,0U}},
{MOVE_30A8,{0U,2U,0U}},
{MOVE_30A8,{1U,2U,0U}},
{MOVE_30A8,{2U,2U,0U}},
{MOVE_30A8,{3U,2U,0U}},
{MOVE_30A8,{4U,2U,0U}},
{MOVE_30A8,{5U,2U,0U}},
{MOVE_30A8,{6U,2U,0U}},
{MOVE_30A8,{7U,2U,0U}},
{MOVE_30B0,{0U,2U,0U}},
{MOVE_30B0,{1U,2U,0U}},
{MOVE_30B0,{2U,2U,0U}},
{MOVE_30B0,{3U,2U,0U}},
{MOVE_30B0,{4U,2U,0U}},
{MOVE_30B0,{5U,2U,0U}},
{MOVE_30B0,{6U,2U,0U}},
{MOVE_30B0,{7U,2U,0U}},
{MOVE_30B8,{0U,2U,0U}},
{MOVE_30B9,{0U,2U,0U}},
{MOVE_30BA,{0U,2U,0U}},
{MOVE_30BB,{0U,2U,0U}},
{MOVE_30BC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_30C0,{0U,2U,0U}},
{MOVE_30C0,{1U,2U,0U}},
{MOVE_30C0,{2U,2U,0U}},
{MOVE_30C0,{3U,2U,0U}},
{MOVE_30C0,{4U,2U,0U}},
{MOVE_30C0,{5U,2U,0U}},
{MOVE_30C0,{6U,2U,0U}},
{MOVE_30C0,{7U,2U,0U}},
{MOVE_30C8,{0U,2U,0U}},
{MOVE_30C8,{1U,2U,0U}},
{MOVE_30C8,{2U,2U,0U}},
{MOVE_30C8,{3U,2U,0U}},
{MOVE_30C8,{4U,2U,0U}},
{MOVE_30C8,{5U,2U,0U}},
{MOVE_30C8,{6U,2U,0U}},
{MOVE_30C8,{7U,2U,0U}},
{MOVE_30D0,{0U,2U,0U}},
{MOVE_30D0,{1U,2U,0U}},
{MOVE_30D0,{2U,2U,0U}},
{MOVE_30D0,{3U,2U,0U}},
{MOVE_30D0,{4U,2U,0U}},
{MOVE_30D0,{5U,2U,0U}},
{MOVE_30D0,{6U,2U,0U}},
{MOVE_30D0,{7U,2U,0U}},
{MOVE_30D8,{0U,2U,0U}},
{MOVE_30D8,{1U,2U,0U}},
{MOVE_30D8,{2U,2U,0U}},
{MOVE_30D8,{3U,2U,0U}},
{MOVE_30D8,{4U,2U,0U}},
{MOVE_30D8,{5U,2U,0U}},
{MOVE_30D8,{6U,2U,0U}},
{MOVE_30D8,{7U,2U,0U}},
{MOVE_30E0,{0U,2U,0U}},
{MOVE_30E0,{1U,2U,0U}},
{MOVE_30E0,{2U,2U,0U}},
{MOVE_30E0,{3U,2U,0U}},
{MOVE_30E0,{4U,2U,0U}},
{MOVE_30E0,{5U,2U,0U}},
{MOVE_30E0,{6U,2U,0U}},
{MOVE_30E0,{7U,2U,0U}},
{MOVE_30E8,{0U,2U,0U}},
{MOVE_30E8,{1U,2U,0U}},
{MOVE_30E8,{2U,2U,0U}},
{MOVE_30E8,{3U,2U,0U}},
{MOVE_30E8,{4U,2U,0U}},
{MOVE_30E8,{5U,2U,0U}},
{MOVE_30E8,{6U,2U,0U}},
{MOVE_30E8,{7U,2U,0U}},
{MOVE_30F0,{0U,2U,0U}},
{MOVE_30F0,{1U,2U,0U}},
{MOVE_30F0,{2U,2U,0U}},
{MOVE_30F0,{3U,2U,0U}},
{MOVE_30F0,{4U,2U,0U}},
{MOVE_30F0,{5U,2U,0U}},
{MOVE_30F0,{6U,2U,0U}},
{MOVE_30F0,{7U,2U,0U}},
{MOVE_30F8,{0U,2U,0U}},
{MOVE_30F9,{0U,2U,0U}},
{MOVE_30FA,{0U,2U,0U}},
{MOVE_30FB,{0U,2U,0U}},
{MOVE_30FC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3100,{0U,2U,0U}},
{MOVE_3100,{1U,2U,0U}},
{MOVE_3100,{2U,2U,0U}},
{MOVE_3100,{3U,2U,0U}},
{MOVE_3100,{4U,2U,0U}},
{MOVE_3100,{5U,2U,0U}},
{MOVE_3100,{6U,2U,0U}},
{MOVE_3100,{7U,2U,0U}},
{MOVE_3108,{0U,2U,0U}},
{MOVE_3108,{1U,2U,0U}},
{MOVE_3108,{2U,2U,0U}},
{MOVE_3108,{3U,2U,0U}},
{MOVE_3108,{4U,2U,0U}},
{MOVE_3108,{5U,2U,0U}},
{MOVE_3108,{6U,2U,0U}},
{MOVE_3108,{7U,2U,0U}},
{MOVE_3110,{0U,2U,0U}},
{MOVE_3110,{1U,2U,0U}},
{MOVE_3110,{2U,2U,0U}},
{MOVE_3110,{3U,2U,0U}},
{MOVE_3110,{4U,2U,0U}},
{MOVE_3110,{5U,2U,0U}},
{MOVE_3110,{6U,2U,0U}},
{MOVE_3110,{7U,2U,0U}},
{MOVE_3118,{0U,2U,0U}},
{MOVE_3118,{1U,2U,0U}},
{MOVE_3118,{2U,2U,0U}},
{MOVE_3118,{3U,2U,0U}},
{MOVE_3118,{4U,2U,0U}},
{MOVE_3118,{5U,2U,0U}},
{MOVE_3118,{6U,2U,0U}},
{MOVE_3118,{7U,2U,0U}},
{MOVE_3120,{0U,2U,0U}},
{MOVE_3120,{1U,2U,0U}},
{MOVE_3120,{2U,2U,0U}},
{MOVE_3120,{3U,2U,0U}},
{MOVE_3120,{4U,2U,0U}},
{MOVE_3120,{5U,2U,0U}},
{MOVE_3120,{6U,2U,0U}},
{MOVE_3120,{7U,2U,0U}},
{MOVE_3128,{0U,2U,0U}},
{MOVE_3128,{1U,2U,0U}},
{MOVE_3128,{2U,2U,0U}},
{MOVE_3128,{3U,2U,0U}},
{MOVE_3128,{4U,2U,0U}},
{MOVE_3128,{5U,2U,0U}},
{MOVE_3128,{6U,2U,0U}},
{MOVE_3128,{7U,2U,0U}},
{MOVE_3130,{0U,2U,0U}},
{MOVE_3130,{1U,2U,0U}},
{MOVE_3130,{2U,2U,0U}},
{MOVE_3130,{3U,2U,0U}},
{MOVE_3130,{4U,2U,0U}},
{MOVE_3130,{5U,2U,0U}},
{MOVE_3130,{6U,2U,0U}},
{MOVE_3130,{7U,2U,0U}},
{MOVE_3138,{0U,2U,0U}},
{MOVE_3139,{0U,2U,0U}},
{MOVE_313A,{0U,2U,0U}},
{MOVE_313B,{0U,2U,0U}},
{MOVE_313C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3140,{0U,2U,0U}},
{MOVE_3140,{1U,2U,0U}},
{MOVE_3140,{2U,2U,0U}},
{MOVE_3140,{3U,2U,0U}},
{MOVE_3140,{4U,2U,0U}},
{MOVE_3140,{5U,2U,0U}},
{MOVE_3140,{6U,2U,0U}},
{MOVE_3140,{7U,2U,0U}},
{MOVE_3148,{0U,2U,0U}},
{MOVE_3148,{1U,2U,0U}},
{MOVE_3148,{2U,2U,0U}},
{MOVE_3148,{3U,2U,0U}},
{MOVE_3148,{4U,2U,0U}},
{MOVE_3148,{5U,2U,0U}},
{MOVE_3148,{6U,2U,0U}},
{MOVE_3148,{7U,2U,0U}},
{MOVE_3150,{0U,2U,0U}},
{MOVE_3150,{1U,2U,0U}},
{MOVE_3150,{2U,2U,0U}},
{MOVE_3150,{3U,2U,0U}},
{MOVE_3150,{4U,2U,0U}},
{MOVE_3150,{5U,2U,0U}},
{MOVE_3150,{6U,2U,0U}},
{MOVE_3150,{7U,2U,0U}},
{MOVE_3158,{0U,2U,0U}},
{MOVE_3158,{1U,2U,0U}},
{MOVE_3158,{2U,2U,0U}},
{MOVE_3158,{3U,2U,0U}},
{MOVE_3158,{4U,2U,0U}},
{MOVE_3158,{5U,2U,0U}},
{MOVE_3158,{6U,2U,0U}},
{MOVE_3158,{7U,2U,0U}},
{MOVE_3160,{0U,2U,0U}},
{MOVE_3160,{1U,2U,0U}},
{MOVE_3160,{2U,2U,0U}},
{MOVE_3160,{3U,2U,0U}},
{MOVE_3160,{4U,2U,0U}},
{MOVE_3160,{5U,2U,0U}},
{MOVE_3160,{6U,2U,0U}},
{MOVE_3160,{7U,2U,0U}},
{MOVE_3168,{0U,2U,0U}},
{MOVE_3168,{1U,2U,0U}},
{MOVE_3168,{2U,2U,0U}},
{MOVE_3168,{3U,2U,0U}},
{MOVE_3168,{4U,2U,0U}},
{MOVE_3168,{5U,2U,0U}},
{MOVE_3168,{6U,2U,0U}},
{MOVE_3168,{7U,2U,0U}},
{MOVE_3170,{0U,2U,0U}},
{MOVE_3170,{1U,2U,0U}},
{MOVE_3170,{2U,2U,0U}},
{MOVE_3170,{3U,2U,0U}},
{MOVE_3170,{4U,2U,0U}},
{MOVE_3170,{5U,2U,0U}},
{MOVE_3170,{6U,2U,0U}},
{MOVE_3170,{7U,2U,0U}},
{MOVE_3178,{0U,2U,0U}},
{MOVE_3179,{0U,2U,0U}},
{MOVE_317A,{0U,2U,0U}},
{MOVE_317B,{0U,2U,0U}},
{MOVE_317C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3180,{0U,2U,0U}},
{MOVE_3180,{1U,2U,0U}},
{MOVE_3180,{2U,2U,0U}},
{MOVE_3180,{3U,2U,0U}},
{MOVE_3180,{4U,2U,0U}},
{MOVE_3180,{5U,2U,0U}},
{MOVE_3180,{6U,2U,0U}},
{MOVE_3180,{7U,2U,0U}},
{MOVE_3188,{0U,2U,0U}},
{MOVE_3188,{1U,2U,0U}},
{MOVE_3188,{2U,2U,0U}},
{MOVE_3188,{3U,2U,0U}},
{MOVE_3188,{4U,2U,0U}},
{MOVE_3188,{5U,2U,0U}},
{MOVE_3188,{6U,2U,0U}},
{MOVE_3188,{7U,2U,0U}},
{MOVE_3190,{0U,2U,0U}},
{MOVE_3190,{1U,2U,0U}},
{MOVE_3190,{2U,2U,0U}},
{MOVE_3190,{3U,2U,0U}},
{MOVE_3190,{4U,2U,0U}},
{MOVE_3190,{5U,2U,0U}},
{MOVE_3190,{6U,2U,0U}},
{MOVE_3190,{7U,2U,0U}},
{MOVE_3198,{0U,2U,0U}},
{MOVE_3198,{1U,2U,0U}},
{MOVE_3198,{2U,2U,0U}},
{MOVE_3198,{3U,2U,0U}},
{MOVE_3198,{4U,2U,0U}},
{MOVE_3198,{5U,2U,0U}},
{MOVE_3198,{6U,2U,0U}},
{MOVE_3198,{7U,2U,0U}},
{MOVE_31A0,{0U,2U,0U}},
{MOVE_31A0,{1U,2U,0U}},
{MOVE_31A0,{2U,2U,0U}},
{MOVE_31A0,{3U,2U,0U}},
{MOVE_31A0,{4U,2U,0U}},
{MOVE_31A0,{5U,2U,0U}},
{MOVE_31A0,{6U,2U,0U}},
{MOVE_31A0,{7U,2U,0U}},
{MOVE_31A8,{0U,2U,0U}},
{MOVE_31A8,{1U,2U,0U}},
{MOVE_31A8,{2U,2U,0U}},
{MOVE_31A8,{3U,2U,0U}},
{MOVE_31A8,{4U,2U,0U}},
{MOVE_31A8,{5U,2U,0U}},
{MOVE_31A8,{6U,2U,0U}},
{MOVE_31A8,{7U,2U,0U}},
{MOVE_31B0,{0U,2U,0U}},
{MOVE_31B0,{1U,2U,0U}},
{MOVE_31B0,{2U,2U,0U}},
{MOVE_31B0,{3U,2U,0U}},
{MOVE_31B0,{4U,2U,0U}},
{MOVE_31B0,{5U,2U,0U}},
{MOVE_31B0,{6U,2U,0U}},
{MOVE_31B0,{7U,2U,0U}},
{MOVE_31B8,{0U,2U,0U}},
{MOVE_31B9,{0U,2U,0U}},
{MOVE_31BA,{0U,2U,0U}},
{MOVE_31BB,{0U,2U,0U}},
{MOVE_31BC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3000,{0U,3U,0U}},
{MOVE_3000,{1U,3U,0U}},
{MOVE_3000,{2U,3U,0U}},
{MOVE_3000,{3U,3U,0U}},
{MOVE_3000,{4U,3U,0U}},
{MOVE_3000,{5U,3U,0U}},
{MOVE_3000,{6U,3U,0U}},
{MOVE_3000,{7U,3U,0U}},
{MOVE_3008,{0U,3U,0U}},
{MOVE_3008,{1U,3U,0U}},
{MOVE_3008,{2U,3U,0U}},
{MOVE_3008,{3U,3U,0U}},
{MOVE_3008,{4U,3U,0U}},
{MOVE_3008,{5U,3U,0U}},
{MOVE_3008,{6U,3U,0U}},
{MOVE_3008,{7U,3U,0U}},
{MOVE_3010,{0U,3U,0U}},
{MOVE_3010,{1U,3U,0U}},
{MOVE_3010,{2U,3U,0U}},
{MOVE_3010,{3U,3U,0U}},
{MOVE_3010,{4U,3U,0U}},
{MOVE_3010,{5U,3U,0U}},
{MOVE_3010,{6U,3U,0U}},
{MOVE_3010,{7U,3U,0U}},
{MOVE_3018,{0U,3U,0U}},
{MOVE_3018,{1U,3U,0U}},
{MOVE_3018,{2U,3U,0U}},
{MOVE_3018,{3U,3U,0U}},
{MOVE_3018,{4U,3U,0U}},
{MOVE_3018,{5U,3U,0U}},
{MOVE_3018,{6U,3U,0U}},
{MOVE_3018,{7U,3U,0U}},
{MOVE_3020,{0U,3U,0U}},
{MOVE_3020,{1U,3U,0U}},
{MOVE_3020,{2U,3U,0U}},
{MOVE_3020,{3U,3U,0U}},
{MOVE_3020,{4U,3U,0U}},
{MOVE_3020,{5U,3U,0U}},
{MOVE_3020,{6U,3U,0U}},
{MOVE_3020,{7U,3U,0U}},
{MOVE_3028,{0U,3U,0U}},
{MOVE_3028,{1U,3U,0U}},
{MOVE_3028,{2U,3U,0U}},
{MOVE_3028,{3U,3U,0U}},
{MOVE_3028,{4U,3U,0U}},
{MOVE_3028,{5U,3U,0U}},
{MOVE_3028,{6U,3U,0U}},
{MOVE_3028,{7U,3U,0U}},
{MOVE_3030,{0U,3U,0U}},
{MOVE_3030,{1U,3U,0U}},
{MOVE_3030,{2U,3U,0U}},
{MOVE_3030,{3U,3U,0U}},
{MOVE_3030,{4U,3U,0U}},
{MOVE_3030,{5U,3U,0U}},
{MOVE_3030,{6U,3U,0U}},
{MOVE_3030,{7U,3U,0U}},
{MOVE_3038,{0U,3U,0U}},
{MOVE_3039,{0U,3U,0U}},
{MOVE_303A,{0U,3U,0U}},
{MOVE_303B,{0U,3U,0U}},
{MOVE_303C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_3040,{0U,3U,0U}},
{MOVEA_3040,{1U,3U,0U}},
{MOVEA_3040,{2U,3U,0U}},
{MOVEA_3040,{3U,3U,0U}},
{MOVEA_3040,{4U,3U,0U}},
{MOVEA_3040,{5U,3U,0U}},
{MOVEA_3040,{6U,3U,0U}},
{MOVEA_3040,{7U,3U,0U}},
{MOVEA_3048,{0U,3U,0U}},
{MOVEA_3048,{1U,3U,0U}},
{MOVEA_3048,{2U,3U,0U}},
{MOVEA_3048,{3U,3U,0U}},
{MOVEA_3048,{4U,3U,0U}},
{MOVEA_3048,{5U,3U,0U}},
{MOVEA_3048,{6U,3U,0U}},
{MOVEA_3048,{7U,3U,0U}},
{MOVEA_3050,{0U,3U,0U}},
{MOVEA_3050,{1U,3U,0U}},
{MOVEA_3050,{2U,3U,0U}},
{MOVEA_3050,{3U,3U,0U}},
{MOVEA_3050,{4U,3U,0U}},
{MOVEA_3050,{5U,3U,0U}},
{MOVEA_3050,{6U,3U,0U}},
{MOVEA_3050,{7U,3U,0U}},
{MOVEA_3058,{0U,3U,0U}},
{MOVEA_3058,{1U,3U,0U}},
{MOVEA_3058,{2U,3U,0U}},
{MOVEA_3058,{3U,3U,0U}},
{MOVEA_3058,{4U,3U,0U}},
{MOVEA_3058,{5U,3U,0U}},
{MOVEA_3058,{6U,3U,0U}},
{MOVEA_3058,{7U,3U,0U}},
{MOVEA_3060,{0U,3U,0U}},
{MOVEA_3060,{1U,3U,0U}},
{MOVEA_3060,{2U,3U,0U}},
{MOVEA_3060,{3U,3U,0U}},
{MOVEA_3060,{4U,3U,0U}},
{MOVEA_3060,{5U,3U,0U}},
{MOVEA_3060,{6U,3U,0U}},
{MOVEA_3060,{7U,3U,0U}},
{MOVEA_3068,{0U,3U,0U}},
{MOVEA_3068,{1U,3U,0U}},
{MOVEA_3068,{2U,3U,0U}},
{MOVEA_3068,{3U,3U,0U}},
{MOVEA_3068,{4U,3U,0U}},
{MOVEA_3068,{5U,3U,0U}},
{MOVEA_3068,{6U,3U,0U}},
{MOVEA_3068,{7U,3U,0U}},
{MOVEA_3070,{0U,3U,0U}},
{MOVEA_3070,{1U,3U,0U}},
{MOVEA_3070,{2U,3U,0U}},
{MOVEA_3070,{3U,3U,0U}},
{MOVEA_3070,{4U,3U,0U}},
{MOVEA_3070,{5U,3U,0U}},
{MOVEA_3070,{6U,3U,0U}},
{MOVEA_3070,{7U,3U,0U}},
{MOVEA_3078,{0U,3U,0U}},
{MOVEA_3079,{0U,3U,0U}},
{MOVEA_307A,{0U,3U,0U}},
{MOVEA_307B,{0U,3U,0U}},
{MOVEA_307C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3080,{0U,3U,0U}},
{MOVE_3080,{1U,3U,0U}},
{MOVE_3080,{2U,3U,0U}},
{MOVE_3080,{3U,3U,0U}},
{MOVE_3080,{4U,3U,0U}},
{MOVE_3080,{5U,3U,0U}},
{MOVE_3080,{6U,3U,0U}},
{MOVE_3080,{7U,3U,0U}},
{MOVE_3088,{0U,3U,0U}},
{MOVE_3088,{1U,3U,0U}},
{MOVE_3088,{2U,3U,0U}},
{MOVE_3088,{3U,3U,0U}},
{MOVE_3088,{4U,3U,0U}},
{MOVE_3088,{5U,3U,0U}},
{MOVE_3088,{6U,3U,0U}},
{MOVE_3088,{7U,3U,0U}},
{MOVE_3090,{0U,3U,0U}},
{MOVE_3090,{1U,3U,0U}},
{MOVE_3090,{2U,3U,0U}},
{MOVE_3090,{3U,3U,0U}},
{MOVE_3090,{4U,3U,0U}},
{MOVE_3090,{5U,3U,0U}},
{MOVE_3090,{6U,3U,0U}},
{MOVE_3090,{7U,3U,0U}},
{MOVE_3098,{0U,3U,0U}},
{MOVE_3098,{1U,3U,0U}},
{MOVE_3098,{2U,3U,0U}},
{MOVE_3098,{3U,3U,0U}},
{MOVE_3098,{4U,3U,0U}},
{MOVE_3098,{5U,3U,0U}},
{MOVE_3098,{6U,3U,0U}},
{MOVE_3098,{7U,3U,0U}},
{MOVE_30A0,{0U,3U,0U}},
{MOVE_30A0,{1U,3U,0U}},
{MOVE_30A0,{2U,3U,0U}},
{MOVE_30A0,{3U,3U,0U}},
{MOVE_30A0,{4U,3U,0U}},
{MOVE_30A0,{5U,3U,0U}},
{MOVE_30A0,{6U,3U,0U}},
{MOVE_30A0,{7U,3U,0U}},
{MOVE_30A8,{0U,3U,0U}},
{MOVE_30A8,{1U,3U,0U}},
{MOVE_30A8,{2U,3U,0U}},
{MOVE_30A8,{3U,3U,0U}},
{MOVE_30A8,{4U,3U,0U}},
{MOVE_30A8,{5U,3U,0U}},
{MOVE_30A8,{6U,3U,0U}},
{MOVE_30A8,{7U,3U,0U}},
{MOVE_30B0,{0U,3U,0U}},
{MOVE_30B0,{1U,3U,0U}},
{MOVE_30B0,{2U,3U,0U}},
{MOVE_30B0,{3U,3U,0U}},
{MOVE_30B0,{4U,3U,0U}},
{MOVE_30B0,{5U,3U,0U}},
{MOVE_30B0,{6U,3U,0U}},
{MOVE_30B0,{7U,3U,0U}},
{MOVE_30B8,{0U,3U,0U}},
{MOVE_30B9,{0U,3U,0U}},
{MOVE_30BA,{0U,3U,0U}},
{MOVE_30BB,{0U,3U,0U}},
{MOVE_30BC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_30C0,{0U,3U,0U}},
{MOVE_30C0,{1U,3U,0U}},
{MOVE_30C0,{2U,3U,0U}},
{MOVE_30C0,{3U,3U,0U}},
{MOVE_30C0,{4U,3U,0U}},
{MOVE_30C0,{5U,3U,0U}},
{MOVE_30C0,{6U,3U,0U}},
{MOVE_30C0,{7U,3U,0U}},
{MOVE_30C8,{0U,3U,0U}},
{MOVE_30C8,{1U,3U,0U}},
{MOVE_30C8,{2U,3U,0U}},
{MOVE_30C8,{3U,3U,0U}},
{MOVE_30C8,{4U,3U,0U}},
{MOVE_30C8,{5U,3U,0U}},
{MOVE_30C8,{6U,3U,0U}},
{MOVE_30C8,{7U,3U,0U}},
{MOVE_30D0,{0U,3U,0U}},
{MOVE_30D0,{1U,3U,0U}},
{MOVE_30D0,{2U,3U,0U}},
{MOVE_30D0,{3U,3U,0U}},
{MOVE_30D0,{4U,3U,0U}},
{MOVE_30D0,{5U,3U,0U}},
{MOVE_30D0,{6U,3U,0U}},
{MOVE_30D0,{7U,3U,0U}},
{MOVE_30D8,{0U,3U,0U}},
{MOVE_30D8,{1U,3U,0U}},
{MOVE_30D8,{2U,3U,0U}},
{MOVE_30D8,{3U,3U,0U}},
{MOVE_30D8,{4U,3U,0U}},
{MOVE_30D8,{5U,3U,0U}},
{MOVE_30D8,{6U,3U,0U}},
{MOVE_30D8,{7U,3U,0U}},
{MOVE_30E0,{0U,3U,0U}},
{MOVE_30E0,{1U,3U,0U}},
{MOVE_30E0,{2U,3U,0U}},
{MOVE_30E0,{3U,3U,0U}},
{MOVE_30E0,{4U,3U,0U}},
{MOVE_30E0,{5U,3U,0U}},
{MOVE_30E0,{6U,3U,0U}},
{MOVE_30E0,{7U,3U,0U}},
{MOVE_30E8,{0U,3U,0U}},
{MOVE_30E8,{1U,3U,0U}},
{MOVE_30E8,{2U,3U,0U}},
{MOVE_30E8,{3U,3U,0U}},
{MOVE_30E8,{4U,3U,0U}},
{MOVE_30E8,{5U,3U,0U}},
{MOVE_30E8,{6U,3U,0U}},
{MOVE_30E8,{7U,3U,0U}},
{MOVE_30F0,{0U,3U,0U}},
{MOVE_30F0,{1U,3U,0U}},
{MOVE_30F0,{2U,3U,0U}},
{MOVE_30F0,{3U,3U,0U}},
{MOVE_30F0,{4U,3U,0U}},
{MOVE_30F0,{5U,3U,0U}},
{MOVE_30F0,{6U,3U,0U}},
{MOVE_30F0,{7U,3U,0U}},
{MOVE_30F8,{0U,3U,0U}},
{MOVE_30F9,{0U,3U,0U}},
{MOVE_30FA,{0U,3U,0U}},
{MOVE_30FB,{0U,3U,0U}},
{MOVE_30FC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3100,{0U,3U,0U}},
{MOVE_3100,{1U,3U,0U}},
{MOVE_3100,{2U,3U,0U}},
{MOVE_3100,{3U,3U,0U}},
{MOVE_3100,{4U,3U,0U}},
{MOVE_3100,{5U,3U,0U}},
{MOVE_3100,{6U,3U,0U}},
{MOVE_3100,{7U,3U,0U}},
{MOVE_3108,{0U,3U,0U}},
{MOVE_3108,{1U,3U,0U}},
{MOVE_3108,{2U,3U,0U}},
{MOVE_3108,{3U,3U,0U}},
{MOVE_3108,{4U,3U,0U}},
{MOVE_3108,{5U,3U,0U}},
{MOVE_3108,{6U,3U,0U}},
{MOVE_3108,{7U,3U,0U}},
{MOVE_3110,{0U,3U,0U}},
{MOVE_3110,{1U,3U,0U}},
{MOVE_3110,{2U,3U,0U}},
{MOVE_3110,{3U,3U,0U}},
{MOVE_3110,{4U,3U,0U}},
{MOVE_3110,{5U,3U,0U}},
{MOVE_3110,{6U,3U,0U}},
{MOVE_3110,{7U,3U,0U}},
{MOVE_3118,{0U,3U,0U}},
{MOVE_3118,{1U,3U,0U}},
{MOVE_3118,{2U,3U,0U}},
{MOVE_3118,{3U,3U,0U}},
{MOVE_3118,{4U,3U,0U}},
{MOVE_3118,{5U,3U,0U}},
{MOVE_3118,{6U,3U,0U}},
{MOVE_3118,{7U,3U,0U}},
{MOVE_3120,{0U,3U,0U}},
{MOVE_3120,{1U,3U,0U}},
{MOVE_3120,{2U,3U,0U}},
{MOVE_3120,{3U,3U,0U}},
{MOVE_3120,{4U,3U,0U}},
{MOVE_3120,{5U,3U,0U}},
{MOVE_3120,{6U,3U,0U}},
{MOVE_3120,{7U,3U,0U}},
{MOVE_3128,{0U,3U,0U}},
{MOVE_3128,{1U,3U,0U}},
{MOVE_3128,{2U,3U,0U}},
{MOVE_3128,{3U,3U,0U}},
{MOVE_3128,{4U,3U,0U}},
{MOVE_3128,{5U,3U,0U}},
{MOVE_3128,{6U,3U,0U}},
{MOVE_3128,{7U,3U,0U}},
{MOVE_3130,{0U,3U,0U}},
{MOVE_3130,{1U,3U,0U}},
{MOVE_3130,{2U,3U,0U}},
{MOVE_3130,{3U,3U,0U}},
{MOVE_3130,{4U,3U,0U}},
{MOVE_3130,{5U,3U,0U}},
{MOVE_3130,{6U,3U,0U}},
{MOVE_3130,{7U,3U,0U}},
{MOVE_3138,{0U,3U,0U}},
{MOVE_3139,{0U,3U,0U}},
{MOVE_313A,{0U,3U,0U}},
{MOVE_313B,{0U,3U,0U}},
{MOVE_313C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3140,{0U,3U,0U}},
{MOVE_3140,{1U,3U,0U}},
{MOVE_3140,{2U,3U,0U}},
{MOVE_3140,{3U,3U,0U}},
{MOVE_3140,{4U,3U,0U}},
{MOVE_3140,{5U,3U,0U}},
{MOVE_3140,{6U,3U,0U}},
{MOVE_3140,{7U,3U,0U}},
{MOVE_3148,{0U,3U,0U}},
{MOVE_3148,{1U,3U,0U}},
{MOVE_3148,{2U,3U,0U}},
{MOVE_3148,{3U,3U,0U}},
{MOVE_3148,{4U,3U,0U}},
{MOVE_3148,{5U,3U,0U}},
{MOVE_3148,{6U,3U,0U}},
{MOVE_3148,{7U,3U,0U}},
{MOVE_3150,{0U,3U,0U}},
{MOVE_3150,{1U,3U,0U}},
{MOVE_3150,{2U,3U,0U}},
{MOVE_3150,{3U,3U,0U}},
{MOVE_3150,{4U,3U,0U}},
{MOVE_3150,{5U,3U,0U}},
{MOVE_3150,{6U,3U,0U}},
{MOVE_3150,{7U,3U,0U}},
{MOVE_3158,{0U,3U,0U}},
{MOVE_3158,{1U,3U,0U}},
{MOVE_3158,{2U,3U,0U}},
{MOVE_3158,{3U,3U,0U}},
{MOVE_3158,{4U,3U,0U}},
{MOVE_3158,{5U,3U,0U}},
{MOVE_3158,{6U,3U,0U}},
{MOVE_3158,{7U,3U,0U}},
{MOVE_3160,{0U,3U,0U}},
{MOVE_3160,{1U,3U,0U}},
{MOVE_3160,{2U,3U,0U}},
{MOVE_3160,{3U,3U,0U}},
{MOVE_3160,{4U,3U,0U}},
{MOVE_3160,{5U,3U,0U}},
{MOVE_3160,{6U,3U,0U}},
{MOVE_3160,{7U,3U,0U}},
{MOVE_3168,{0U,3U,0U}},
{MOVE_3168,{1U,3U,0U}},
{MOVE_3168,{2U,3U,0U}},
{MOVE_3168,{3U,3U,0U}},
{MOVE_3168,{4U,3U,0U}},
{MOVE_3168,{5U,3U,0U}},
{MOVE_3168,{6U,3U,0U}},
{MOVE_3168,{7U,3U,0U}},
{MOVE_3170,{0U,3U,0U}},
{MOVE_3170,{1U,3U,0U}},
{MOVE_3170,{2U,3U,0U}},
{MOVE_3170,{3U,3U,0U}},
{MOVE_3170,{4U,3U,0U}},
{MOVE_3170,{5U,3U,0U}},
{MOVE_3170,{6U,3U,0U}},
{MOVE_3170,{7U,3U,0U}},
{MOVE_3178,{0U,3U,0U}},
{MOVE_3179,{0U,3U,0U}},
{MOVE_317A,{0U,3U,0U}},
{MOVE_317B,{0U,3U,0U}},
{MOVE_317C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3180,{0U,3U,0U}},
{MOVE_3180,{1U,3U,0U}},
{MOVE_3180,{2U,3U,0U}},
{MOVE_3180,{3U,3U,0U}},
{MOVE_3180,{4U,3U,0U}},
{MOVE_3180,{5U,3U,0U}},
{MOVE_3180,{6U,3U,0U}},
{MOVE_3180,{7U,3U,0U}},
{MOVE_3188,{0U,3U,0U}},
{MOVE_3188,{1U,3U,0U}},
{MOVE_3188,{2U,3U,0U}},
{MOVE_3188,{3U,3U,0U}},
{MOVE_3188,{4U,3U,0U}},
{MOVE_3188,{5U,3U,0U}},
{MOVE_3188,{6U,3U,0U}},
{MOVE_3188,{7U,3U,0U}},
{MOVE_3190,{0U,3U,0U}},
{MOVE_3190,{1U,3U,0U}},
{MOVE_3190,{2U,3U,0U}},
{MOVE_3190,{3U,3U,0U}},
{MOVE_3190,{4U,3U,0U}},
{MOVE_3190,{5U,3U,0U}},
{MOVE_3190,{6U,3U,0U}},
{MOVE_3190,{7U,3U,0U}},
{MOVE_3198,{0U,3U,0U}},
{MOVE_3198,{1U,3U,0U}},
{MOVE_3198,{2U,3U,0U}},
{MOVE_3198,{3U,3U,0U}},
{MOVE_3198,{4U,3U,0U}},
{MOVE_3198,{5U,3U,0U}},
{MOVE_3198,{6U,3U,0U}},
{MOVE_3198,{7U,3U,0U}},
{MOVE_31A0,{0U,3U,0U}},
{MOVE_31A0,{1U,3U,0U}},
{MOVE_31A0,{2U,3U,0U}},
{MOVE_31A0,{3U,3U,0U}},
{MOVE_31A0,{4U,3U,0U}},
{MOVE_31A0,{5U,3U,0U}},
{MOVE_31A0,{6U,3U,0U}},
{MOVE_31A0,{7U,3U,0U}},
{MOVE_31A8,{0U,3U,0U}},
{MOVE_31A8,{1U,3U,0U}},
{MOVE_31A8,{2U,3U,0U}},
{MOVE_31A8,{3U,3U,0U}},
{MOVE_31A8,{4U,3U,0U}},
{MOVE_31A8,{5U,3U,0U}},
{MOVE_31A8,{6U,3U,0U}},
{MOVE_31A8,{7U,3U,0U}},
{MOVE_31B0,{0U,3U,0U}},
{MOVE_31B0,{1U,3U,0U}},
{MOVE_31B0,{2U,3U,0U}},
{MOVE_31B0,{3U,3U,0U}},
{MOVE_31B0,{4U,3U,0U}},
{MOVE_31B0,{5U,3U,0U}},
{MOVE_31B0,{6U,3U,0U}},
{MOVE_31B0,{7U,3U,0U}},
{MOVE_31B8,{0U,3U,0U}},
{MOVE_31B9,{0U,3U,0U}},
{MOVE_31BA,{0U,3U,0U}},
{MOVE_31BB,{0U,3U,0U}},
{MOVE_31BC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3000,{0U,4U,0U}},
{MOVE_3000,{1U,4U,0U}},
{MOVE_3000,{2U,4U,0U}},
{MOVE_3000,{3U,4U,0U}},
{MOVE_3000,{4U,4U,0U}},
{MOVE_3000,{5U,4U,0U}},
{MOVE_3000,{6U,4U,0U}},
{MOVE_3000,{7U,4U,0U}},
{MOVE_3008,{0U,4U,0U}},
{MOVE_3008,{1U,4U,0U}},
{MOVE_3008,{2U,4U,0U}},
{MOVE_3008,{3U,4U,0U}},
{MOVE_3008,{4U,4U,0U}},
{MOVE_3008,{5U,4U,0U}},
{MOVE_3008,{6U,4U,0U}},
{MOVE_3008,{7U,4U,0U}},
{MOVE_3010,{0U,4U,0U}},
{MOVE_3010,{1U,4U,0U}},
{MOVE_3010,{2U,4U,0U}},
{MOVE_3010,{3U,4U,0U}},
{MOVE_3010,{4U,4U,0U}},
{MOVE_3010,{5U,4U,0U}},
{MOVE_3010,{6U,4U,0U}},
{MOVE_3010,{7U,4U,0U}},
{MOVE_3018,{0U,4U,0U}},
{MOVE_3018,{1U,4U,0U}},
{MOVE_3018,{2U,4U,0U}},
{MOVE_3018,{3U,4U,0U}},
{MOVE_3018,{4U,4U,0U}},
{MOVE_3018,{5U,4U,0U}},
{MOVE_3018,{6U,4U,0U}},
{MOVE_3018,{7U,4U,0U}},
{MOVE_3020,{0U,4U,0U}},
{MOVE_3020,{1U,4U,0U}},
{MOVE_3020,{2U,4U,0U}},
{MOVE_3020,{3U,4U,0U}},
{MOVE_3020,{4U,4U,0U}},
{MOVE_3020,{5U,4U,0U}},
{MOVE_3020,{6U,4U,0U}},
{MOVE_3020,{7U,4U,0U}},
{MOVE_3028,{0U,4U,0U}},
{MOVE_3028,{1U,4U,0U}},
{MOVE_3028,{2U,4U,0U}},
{MOVE_3028,{3U,4U,0U}},
{MOVE_3028,{4U,4U,0U}},
{MOVE_3028,{5U,4U,0U}},
{MOVE_3028,{6U,4U,0U}},
{MOVE_3028,{7U,4U,0U}},
{MOVE_3030,{0U,4U,0U}},
{MOVE_3030,{1U,4U,0U}},
{MOVE_3030,{2U,4U,0U}},
{MOVE_3030,{3U,4U,0U}},
{MOVE_3030,{4U,4U,0U}},
{MOVE_3030,{5U,4U,0U}},
{MOVE_3030,{6U,4U,0U}},
{MOVE_3030,{7U,4U,0U}},
{MOVE_3038,{0U,4U,0U}},
{MOVE_3039,{0U,4U,0U}},
{MOVE_303A,{0U,4U,0U}},
{MOVE_303B,{0U,4U,0U}},
{MOVE_303C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_3040,{0U,4U,0U}},
{MOVEA_3040,{1U,4U,0U}},
{MOVEA_3040,{2U,4U,0U}},
{MOVEA_3040,{3U,4U,0U}},
{MOVEA_3040,{4U,4U,0U}},
{MOVEA_3040,{5U,4U,0U}},
{MOVEA_3040,{6U,4U,0U}},
{MOVEA_3040,{7U,4U,0U}},
{MOVEA_3048,{0U,4U,0U}},
{MOVEA_3048,{1U,4U,0U}},
{MOVEA_3048,{2U,4U,0U}},
{MOVEA_3048,{3U,4U,0U}},
{MOVEA_3048,{4U,4U,0U}},
{MOVEA_3048,{5U,4U,0U}},
{MOVEA_3048,{6U,4U,0U}},
{MOVEA_3048,{7U,4U,0U}},
{MOVEA_3050,{0U,4U,0U}},
{MOVEA_3050,{1U,4U,0U}},
{MOVEA_3050,{2U,4U,0U}},
{MOVEA_3050,{3U,4U,0U}},
{MOVEA_3050,{4U,4U,0U}},
{MOVEA_3050,{5U,4U,0U}},
{MOVEA_3050,{6U,4U,0U}},
{MOVEA_3050,{7U,4U,0U}},
{MOVEA_3058,{0U,4U,0U}},
{MOVEA_3058,{1U,4U,0U}},
{MOVEA_3058,{2U,4U,0U}},
{MOVEA_3058,{3U,4U,0U}},
{MOVEA_3058,{4U,4U,0U}},
{MOVEA_3058,{5U,4U,0U}},
{MOVEA_3058,{6U,4U,0U}},
{MOVEA_3058,{7U,4U,0U}},
{MOVEA_3060,{0U,4U,0U}},
{MOVEA_3060,{1U,4U,0U}},
{MOVEA_3060,{2U,4U,0U}},
{MOVEA_3060,{3U,4U,0U}},
{MOVEA_3060,{4U,4U,0U}},
{MOVEA_3060,{5U,4U,0U}},
{MOVEA_3060,{6U,4U,0U}},
{MOVEA_3060,{7U,4U,0U}},
{MOVEA_3068,{0U,4U,0U}},
{MOVEA_3068,{1U,4U,0U}},
{MOVEA_3068,{2U,4U,0U}},
{MOVEA_3068,{3U,4U,0U}},
{MOVEA_3068,{4U,4U,0U}},
{MOVEA_3068,{5U,4U,0U}},
{MOVEA_3068,{6U,4U,0U}},
{MOVEA_3068,{7U,4U,0U}},
{MOVEA_3070,{0U,4U,0U}},
{MOVEA_3070,{1U,4U,0U}},
{MOVEA_3070,{2U,4U,0U}},
{MOVEA_3070,{3U,4U,0U}},
{MOVEA_3070,{4U,4U,0U}},
{MOVEA_3070,{5U,4U,0U}},
{MOVEA_3070,{6U,4U,0U}},
{MOVEA_3070,{7U,4U,0U}},
{MOVEA_3078,{0U,4U,0U}},
{MOVEA_3079,{0U,4U,0U}},
{MOVEA_307A,{0U,4U,0U}},
{MOVEA_307B,{0U,4U,0U}},
{MOVEA_307C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3080,{0U,4U,0U}},
{MOVE_3080,{1U,4U,0U}},
{MOVE_3080,{2U,4U,0U}},
{MOVE_3080,{3U,4U,0U}},
{MOVE_3080,{4U,4U,0U}},
{MOVE_3080,{5U,4U,0U}},
{MOVE_3080,{6U,4U,0U}},
{MOVE_3080,{7U,4U,0U}},
{MOVE_3088,{0U,4U,0U}},
{MOVE_3088,{1U,4U,0U}},
{MOVE_3088,{2U,4U,0U}},
{MOVE_3088,{3U,4U,0U}},
{MOVE_3088,{4U,4U,0U}},
{MOVE_3088,{5U,4U,0U}},
{MOVE_3088,{6U,4U,0U}},
{MOVE_3088,{7U,4U,0U}},
{MOVE_3090,{0U,4U,0U}},
{MOVE_3090,{1U,4U,0U}},
{MOVE_3090,{2U,4U,0U}},
{MOVE_3090,{3U,4U,0U}},
{MOVE_3090,{4U,4U,0U}},
{MOVE_3090,{5U,4U,0U}},
{MOVE_3090,{6U,4U,0U}},
{MOVE_3090,{7U,4U,0U}},
{MOVE_3098,{0U,4U,0U}},
{MOVE_3098,{1U,4U,0U}},
{MOVE_3098,{2U,4U,0U}},
{MOVE_3098,{3U,4U,0U}},
{MOVE_3098,{4U,4U,0U}},
{MOVE_3098,{5U,4U,0U}},
{MOVE_3098,{6U,4U,0U}},
{MOVE_3098,{7U,4U,0U}},
{MOVE_30A0,{0U,4U,0U}},
{MOVE_30A0,{1U,4U,0U}},
{MOVE_30A0,{2U,4U,0U}},
{MOVE_30A0,{3U,4U,0U}},
{MOVE_30A0,{4U,4U,0U}},
{MOVE_30A0,{5U,4U,0U}},
{MOVE_30A0,{6U,4U,0U}},
{MOVE_30A0,{7U,4U,0U}},
{MOVE_30A8,{0U,4U,0U}},
{MOVE_30A8,{1U,4U,0U}},
{MOVE_30A8,{2U,4U,0U}},
{MOVE_30A8,{3U,4U,0U}},
{MOVE_30A8,{4U,4U,0U}},
{MOVE_30A8,{5U,4U,0U}},
{MOVE_30A8,{6U,4U,0U}},
{MOVE_30A8,{7U,4U,0U}},
{MOVE_30B0,{0U,4U,0U}},
{MOVE_30B0,{1U,4U,0U}},
{MOVE_30B0,{2U,4U,0U}},
{MOVE_30B0,{3U,4U,0U}},
{MOVE_30B0,{4U,4U,0U}},
{MOVE_30B0,{5U,4U,0U}},
{MOVE_30B0,{6U,4U,0U}},
{MOVE_30B0,{7U,4U,0U}},
{MOVE_30B8,{0U,4U,0U}},
{MOVE_30B9,{0U,4U,0U}},
{MOVE_30BA,{0U,4U,0U}},
{MOVE_30BB,{0U,4U,0U}},
{MOVE_30BC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_30C0,{0U,4U,0U}},
{MOVE_30C0,{1U,4U,0U}},
{MOVE_30C0,{2U,4U,0U}},
{MOVE_30C0,{3U,4U,0U}},
{MOVE_30C0,{4U,4U,0U}},
{MOVE_30C0,{5U,4U,0U}},
{MOVE_30C0,{6U,4U,0U}},
{MOVE_30C0,{7U,4U,0U}},
{MOVE_30C8,{0U,4U,0U}},
{MOVE_30C8,{1U,4U,0U}},
{MOVE_30C8,{2U,4U,0U}},
{MOVE_30C8,{3U,4U,0U}},
{MOVE_30C8,{4U,4U,0U}},
{MOVE_30C8,{5U,4U,0U}},
{MOVE_30C8,{6U,4U,0U}},
{MOVE_30C8,{7U,4U,0U}},
{MOVE_30D0,{0U,4U,0U}},
{MOVE_30D0,{1U,4U,0U}},
{MOVE_30D0,{2U,4U,0U}},
{MOVE_30D0,{3U,4U,0U}},
{MOVE_30D0,{4U,4U,0U}},
{MOVE_30D0,{5U,4U,0U}},
{MOVE_30D0,{6U,4U,0U}},
{MOVE_30D0,{7U,4U,0U}},
{MOVE_30D8,{0U,4U,0U}},
{MOVE_30D8,{1U,4U,0U}},
{MOVE_30D8,{2U,4U,0U}},
{MOVE_30D8,{3U,4U,0U}},
{MOVE_30D8,{4U,4U,0U}},
{MOVE_30D8,{5U,4U,0U}},
{MOVE_30D8,{6U,4U,0U}},
{MOVE_30D8,{7U,4U,0U}},
{MOVE_30E0,{0U,4U,0U}},
{MOVE_30E0,{1U,4U,0U}},
{MOVE_30E0,{2U,4U,0U}},
{MOVE_30E0,{3U,4U,0U}},
{MOVE_30E0,{4U,4U,0U}},
{MOVE_30E0,{5U,4U,0U}},
{MOVE_30E0,{6U,4U,0U}},
{MOVE_30E0,{7U,4U,0U}},
{MOVE_30E8,{0U,4U,0U}},
{MOVE_30E8,{1U,4U,0U}},
{MOVE_30E8,{2U,4U,0U}},
{MOVE_30E8,{3U,4U,0U}},
{MOVE_30E8,{4U,4U,0U}},
{MOVE_30E8,{5U,4U,0U}},
{MOVE_30E8,{6U,4U,0U}},
{MOVE_30E8,{7U,4U,0U}},
{MOVE_30F0,{0U,4U,0U}},
{MOVE_30F0,{1U,4U,0U}},
{MOVE_30F0,{2U,4U,0U}},
{MOVE_30F0,{3U,4U,0U}},
{MOVE_30F0,{4U,4U,0U}},
{MOVE_30F0,{5U,4U,0U}},
{MOVE_30F0,{6U,4U,0U}},
{MOVE_30F0,{7U,4U,0U}},
{MOVE_30F8,{0U,4U,0U}},
{MOVE_30F9,{0U,4U,0U}},
{MOVE_30FA,{0U,4U,0U}},
{MOVE_30FB,{0U,4U,0U}},
{MOVE_30FC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3100,{0U,4U,0U}},
{MOVE_3100,{1U,4U,0U}},
{MOVE_3100,{2U,4U,0U}},
{MOVE_3100,{3U,4U,0U}},
{MOVE_3100,{4U,4U,0U}},
{MOVE_3100,{5U,4U,0U}},
{MOVE_3100,{6U,4U,0U}},
{MOVE_3100,{7U,4U,0U}},
{MOVE_3108,{0U,4U,0U}},
{MOVE_3108,{1U,4U,0U}},
{MOVE_3108,{2U,4U,0U}},
{MOVE_3108,{3U,4U,0U}},
{MOVE_3108,{4U,4U,0U}},
{MOVE_3108,{5U,4U,0U}},
{MOVE_3108,{6U,4U,0U}},
{MOVE_3108,{7U,4U,0U}},
{MOVE_3110,{0U,4U,0U}},
{MOVE_3110,{1U,4U,0U}},
{MOVE_3110,{2U,4U,0U}},
{MOVE_3110,{3U,4U,0U}},
{MOVE_3110,{4U,4U,0U}},
{MOVE_3110,{5U,4U,0U}},
{MOVE_3110,{6U,4U,0U}},
{MOVE_3110,{7U,4U,0U}},
{MOVE_3118,{0U,4U,0U}},
{MOVE_3118,{1U,4U,0U}},
{MOVE_3118,{2U,4U,0U}},
{MOVE_3118,{3U,4U,0U}},
{MOVE_3118,{4U,4U,0U}},
{MOVE_3118,{5U,4U,0U}},
{MOVE_3118,{6U,4U,0U}},
{MOVE_3118,{7U,4U,0U}},
{MOVE_3120,{0U,4U,0U}},
{MOVE_3120,{1U,4U,0U}},
{MOVE_3120,{2U,4U,0U}},
{MOVE_3120,{3U,4U,0U}},
{MOVE_3120,{4U,4U,0U}},
{MOVE_3120,{5U,4U,0U}},
{MOVE_3120,{6U,4U,0U}},
{MOVE_3120,{7U,4U,0U}},
{MOVE_3128,{0U,4U,0U}},
{MOVE_3128,{1U,4U,0U}},
{MOVE_3128,{2U,4U,0U}},
{MOVE_3128,{3U,4U,0U}},
{MOVE_3128,{4U,4U,0U}},
{MOVE_3128,{5U,4U,0U}},
{MOVE_3128,{6U,4U,0U}},
{MOVE_3128,{7U,4U,0U}},
{MOVE_3130,{0U,4U,0U}},
{MOVE_3130,{1U,4U,0U}},
{MOVE_3130,{2U,4U,0U}},
{MOVE_3130,{3U,4U,0U}},
{MOVE_3130,{4U,4U,0U}},
{MOVE_3130,{5U,4U,0U}},
{MOVE_3130,{6U,4U,0U}},
{MOVE_3130,{7U,4U,0U}},
{MOVE_3138,{0U,4U,0U}},
{MOVE_3139,{0U,4U,0U}},
{MOVE_313A,{0U,4U,0U}},
{MOVE_313B,{0U,4U,0U}},
{MOVE_313C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3140,{0U,4U,0U}},
{MOVE_3140,{1U,4U,0U}},
{MOVE_3140,{2U,4U,0U}},
{MOVE_3140,{3U,4U,0U}},
{MOVE_3140,{4U,4U,0U}},
{MOVE_3140,{5U,4U,0U}},
{MOVE_3140,{6U,4U,0U}},
{MOVE_3140,{7U,4U,0U}},
{MOVE_3148,{0U,4U,0U}},
{MOVE_3148,{1U,4U,0U}},
{MOVE_3148,{2U,4U,0U}},
{MOVE_3148,{3U,4U,0U}},
{MOVE_3148,{4U,4U,0U}},
{MOVE_3148,{5U,4U,0U}},
{MOVE_3148,{6U,4U,0U}},
{MOVE_3148,{7U,4U,0U}},
{MOVE_3150,{0U,4U,0U}},
{MOVE_3150,{1U,4U,0U}},
{MOVE_3150,{2U,4U,0U}},
{MOVE_3150,{3U,4U,0U}},
{MOVE_3150,{4U,4U,0U}},
{MOVE_3150,{5U,4U,0U}},
{MOVE_3150,{6U,4U,0U}},
{MOVE_3150,{7U,4U,0U}},
{MOVE_3158,{0U,4U,0U}},
{MOVE_3158,{1U,4U,0U}},
{MOVE_3158,{2U,4U,0U}},
{MOVE_3158,{3U,4U,0U}},
{MOVE_3158,{4U,4U,0U}},
{MOVE_3158,{5U,4U,0U}},
{MOVE_3158,{6U,4U,0U}},
{MOVE_3158,{7U,4U,0U}},
{MOVE_3160,{0U,4U,0U}},
{MOVE_3160,{1U,4U,0U}},
{MOVE_3160,{2U,4U,0U}},
{MOVE_3160,{3U,4U,0U}},
{MOVE_3160,{4U,4U,0U}},
{MOVE_3160,{5U,4U,0U}},
{MOVE_3160,{6U,4U,0U}},
{MOVE_3160,{7U,4U,0U}},
{MOVE_3168,{0U,4U,0U}},
{MOVE_3168,{1U,4U,0U}},
{MOVE_3168,{2U,4U,0U}},
{MOVE_3168,{3U,4U,0U}},
{MOVE_3168,{4U,4U,0U}},
{MOVE_3168,{5U,4U,0U}},
{MOVE_3168,{6U,4U,0U}},
{MOVE_3168,{7U,4U,0U}},
{MOVE_3170,{0U,4U,0U}},
{MOVE_3170,{1U,4U,0U}},
{MOVE_3170,{2U,4U,0U}},
{MOVE_3170,{3U,4U,0U}},
{MOVE_3170,{4U,4U,0U}},
{MOVE_3170,{5U,4U,0U}},
{MOVE_3170,{6U,4U,0U}},
{MOVE_3170,{7U,4U,0U}},
{MOVE_3178,{0U,4U,0U}},
{MOVE_3179,{0U,4U,0U}},
{MOVE_317A,{0U,4U,0U}},
{MOVE_317B,{0U,4U,0U}},
{MOVE_317C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3180,{0U,4U,0U}},
{MOVE_3180,{1U,4U,0U}},
{MOVE_3180,{2U,4U,0U}},
{MOVE_3180,{3U,4U,0U}},
{MOVE_3180,{4U,4U,0U}},
{MOVE_3180,{5U,4U,0U}},
{MOVE_3180,{6U,4U,0U}},
{MOVE_3180,{7U,4U,0U}},
{MOVE_3188,{0U,4U,0U}},
{MOVE_3188,{1U,4U,0U}},
{MOVE_3188,{2U,4U,0U}},
{MOVE_3188,{3U,4U,0U}},
{MOVE_3188,{4U,4U,0U}},
{MOVE_3188,{5U,4U,0U}},
{MOVE_3188,{6U,4U,0U}},
{MOVE_3188,{7U,4U,0U}},
{MOVE_3190,{0U,4U,0U}},
{MOVE_3190,{1U,4U,0U}},
{MOVE_3190,{2U,4U,0U}},
{MOVE_3190,{3U,4U,0U}},
{MOVE_3190,{4U,4U,0U}},
{MOVE_3190,{5U,4U,0U}},
{MOVE_3190,{6U,4U,0U}},
{MOVE_3190,{7U,4U,0U}},
{MOVE_3198,{0U,4U,0U}},
{MOVE_3198,{1U,4U,0U}},
{MOVE_3198,{2U,4U,0U}},
{MOVE_3198,{3U,4U,0U}},
{MOVE_3198,{4U,4U,0U}},
{MOVE_3198,{5U,4U,0U}},
{MOVE_3198,{6U,4U,0U}},
{MOVE_3198,{7U,4U,0U}},
{MOVE_31A0,{0U,4U,0U}},
{MOVE_31A0,{1U,4U,0U}},
{MOVE_31A0,{2U,4U,0U}},
{MOVE_31A0,{3U,4U,0U}},
{MOVE_31A0,{4U,4U,0U}},
{MOVE_31A0,{5U,4U,0U}},
{MOVE_31A0,{6U,4U,0U}},
{MOVE_31A0,{7U,4U,0U}},
{MOVE_31A8,{0U,4U,0U}},
{MOVE_31A8,{1U,4U,0U}},
{MOVE_31A8,{2U,4U,0U}},
{MOVE_31A8,{3U,4U,0U}},
{MOVE_31A8,{4U,4U,0U}},
{MOVE_31A8,{5U,4U,0U}},
{MOVE_31A8,{6U,4U,0U}},
{MOVE_31A8,{7U,4U,0U}},
{MOVE_31B0,{0U,4U,0U}},
{MOVE_31B0,{1U,4U,0U}},
{MOVE_31B0,{2U,4U,0U}},
{MOVE_31B0,{3U,4U,0U}},
{MOVE_31B0,{4U,4U,0U}},
{MOVE_31B0,{5U,4U,0U}},
{MOVE_31B0,{6U,4U,0U}},
{MOVE_31B0,{7U,4U,0U}},
{MOVE_31B8,{0U,4U,0U}},
{MOVE_31B9,{0U,4U,0U}},
{MOVE_31BA,{0U,4U,0U}},
{MOVE_31BB,{0U,4U,0U}},
{MOVE_31BC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3000,{0U,5U,0U}},
{MOVE_3000,{1U,5U,0U}},
{MOVE_3000,{2U,5U,0U}},
{MOVE_3000,{3U,5U,0U}},
{MOVE_3000,{4U,5U,0U}},
{MOVE_3000,{5U,5U,0U}},
{MOVE_3000,{6U,5U,0U}},
{MOVE_3000,{7U,5U,0U}},
{MOVE_3008,{0U,5U,0U}},
{MOVE_3008,{1U,5U,0U}},
{MOVE_3008,{2U,5U,0U}},
{MOVE_3008,{3U,5U,0U}},
{MOVE_3008,{4U,5U,0U}},
{MOVE_3008,{5U,5U,0U}},
{MOVE_3008,{6U,5U,0U}},
{MOVE_3008,{7U,5U,0U}},
{MOVE_3010,{0U,5U,0U}},
{MOVE_3010,{1U,5U,0U}},
{MOVE_3010,{2U,5U,0U}},
{MOVE_3010,{3U,5U,0U}},
{MOVE_3010,{4U,5U,0U}},
{MOVE_3010,{5U,5U,0U}},
{MOVE_3010,{6U,5U,0U}},
{MOVE_3010,{7U,5U,0U}},
{MOVE_3018,{0U,5U,0U}},
{MOVE_3018,{1U,5U,0U}},
{MOVE_3018,{2U,5U,0U}},
{MOVE_3018,{3U,5U,0U}},
{MOVE_3018,{4U,5U,0U}},
{MOVE_3018,{5U,5U,0U}},
{MOVE_3018,{6U,5U,0U}},
{MOVE_3018,{7U,5U,0U}},
{MOVE_3020,{0U,5U,0U}},
{MOVE_3020,{1U,5U,0U}},
{MOVE_3020,{2U,5U,0U}},
{MOVE_3020,{3U,5U,0U}},
{MOVE_3020,{4U,5U,0U}},
{MOVE_3020,{5U,5U,0U}},
{MOVE_3020,{6U,5U,0U}},
{MOVE_3020,{7U,5U,0U}},
{MOVE_3028,{0U,5U,0U}},
{MOVE_3028,{1U,5U,0U}},
{MOVE_3028,{2U,5U,0U}},
{MOVE_3028,{3U,5U,0U}},
{MOVE_3028,{4U,5U,0U}},
{MOVE_3028,{5U,5U,0U}},
{MOVE_3028,{6U,5U,0U}},
{MOVE_3028,{7U,5U,0U}},
{MOVE_3030,{0U,5U,0U}},
{MOVE_3030,{1U,5U,0U}},
{MOVE_3030,{2U,5U,0U}},
{MOVE_3030,{3U,5U,0U}},
{MOVE_3030,{4U,5U,0U}},
{MOVE_3030,{5U,5U,0U}},
{MOVE_3030,{6U,5U,0U}},
{MOVE_3030,{7U,5U,0U}},
{MOVE_3038,{0U,5U,0U}},
{MOVE_3039,{0U,5U,0U}},
{MOVE_303A,{0U,5U,0U}},
{MOVE_303B,{0U,5U,0U}},
{MOVE_303C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_3040,{0U,5U,0U}},
{MOVEA_3040,{1U,5U,0U}},
{MOVEA_3040,{2U,5U,0U}},
{MOVEA_3040,{3U,5U,0U}},
{MOVEA_3040,{4U,5U,0U}},
{MOVEA_3040,{5U,5U,0U}},
{MOVEA_3040,{6U,5U,0U}},
{MOVEA_3040,{7U,5U,0U}},
{MOVEA_3048,{0U,5U,0U}},
{MOVEA_3048,{1U,5U,0U}},
{MOVEA_3048,{2U,5U,0U}},
{MOVEA_3048,{3U,5U,0U}},
{MOVEA_3048,{4U,5U,0U}},
{MOVEA_3048,{5U,5U,0U}},
{MOVEA_3048,{6U,5U,0U}},
{MOVEA_3048,{7U,5U,0U}},
{MOVEA_3050,{0U,5U,0U}},
{MOVEA_3050,{1U,5U,0U}},
{MOVEA_3050,{2U,5U,0U}},
{MOVEA_3050,{3U,5U,0U}},
{MOVEA_3050,{4U,5U,0U}},
{MOVEA_3050,{5U,5U,0U}},
{MOVEA_3050,{6U,5U,0U}},
{MOVEA_3050,{7U,5U,0U}},
{MOVEA_3058,{0U,5U,0U}},
{MOVEA_3058,{1U,5U,0U}},
{MOVEA_3058,{2U,5U,0U}},
{MOVEA_3058,{3U,5U,0U}},
{MOVEA_3058,{4U,5U,0U}},
{MOVEA_3058,{5U,5U,0U}},
{MOVEA_3058,{6U,5U,0U}},
{MOVEA_3058,{7U,5U,0U}},
{MOVEA_3060,{0U,5U,0U}},
{MOVEA_3060,{1U,5U,0U}},
{MOVEA_3060,{2U,5U,0U}},
{MOVEA_3060,{3U,5U,0U}},
{MOVEA_3060,{4U,5U,0U}},
{MOVEA_3060,{5U,5U,0U}},
{MOVEA_3060,{6U,5U,0U}},
{MOVEA_3060,{7U,5U,0U}},
{MOVEA_3068,{0U,5U,0U}},
{MOVEA_3068,{1U,5U,0U}},
{MOVEA_3068,{2U,5U,0U}},
{MOVEA_3068,{3U,5U,0U}},
{MOVEA_3068,{4U,5U,0U}},
{MOVEA_3068,{5U,5U,0U}},
{MOVEA_3068,{6U,5U,0U}},
{MOVEA_3068,{7U,5U,0U}},
{MOVEA_3070,{0U,5U,0U}},
{MOVEA_3070,{1U,5U,0U}},
{MOVEA_3070,{2U,5U,0U}},
{MOVEA_3070,{3U,5U,0U}},
{MOVEA_3070,{4U,5U,0U}},
{MOVEA_3070,{5U,5U,0U}},
{MOVEA_3070,{6U,5U,0U}},
{MOVEA_3070,{7U,5U,0U}},
{MOVEA_3078,{0U,5U,0U}},
{MOVEA_3079,{0U,5U,0U}},
{MOVEA_307A,{0U,5U,0U}},
{MOVEA_307B,{0U,5U,0U}},
{MOVEA_307C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3080,{0U,5U,0U}},
{MOVE_3080,{1U,5U,0U}},
{MOVE_3080,{2U,5U,0U}},
{MOVE_3080,{3U,5U,0U}},
{MOVE_3080,{4U,5U,0U}},
{MOVE_3080,{5U,5U,0U}},
{MOVE_3080,{6U,5U,0U}},
{MOVE_3080,{7U,5U,0U}},
{MOVE_3088,{0U,5U,0U}},
{MOVE_3088,{1U,5U,0U}},
{MOVE_3088,{2U,5U,0U}},
{MOVE_3088,{3U,5U,0U}},
{MOVE_3088,{4U,5U,0U}},
{MOVE_3088,{5U,5U,0U}},
{MOVE_3088,{6U,5U,0U}},
{MOVE_3088,{7U,5U,0U}},
{MOVE_3090,{0U,5U,0U}},
{MOVE_3090,{1U,5U,0U}},
{MOVE_3090,{2U,5U,0U}},
{MOVE_3090,{3U,5U,0U}},
{MOVE_3090,{4U,5U,0U}},
{MOVE_3090,{5U,5U,0U}},
{MOVE_3090,{6U,5U,0U}},
{MOVE_3090,{7U,5U,0U}},
{MOVE_3098,{0U,5U,0U}},
{MOVE_3098,{1U,5U,0U}},
{MOVE_3098,{2U,5U,0U}},
{MOVE_3098,{3U,5U,0U}},
{MOVE_3098,{4U,5U,0U}},
{MOVE_3098,{5U,5U,0U}},
{MOVE_3098,{6U,5U,0U}},
{MOVE_3098,{7U,5U,0U}},
{MOVE_30A0,{0U,5U,0U}},
{MOVE_30A0,{1U,5U,0U}},
{MOVE_30A0,{2U,5U,0U}},
{MOVE_30A0,{3U,5U,0U}},
{MOVE_30A0,{4U,5U,0U}},
{MOVE_30A0,{5U,5U,0U}},
{MOVE_30A0,{6U,5U,0U}},
{MOVE_30A0,{7U,5U,0U}},
{MOVE_30A8,{0U,5U,0U}},
{MOVE_30A8,{1U,5U,0U}},
{MOVE_30A8,{2U,5U,0U}},
{MOVE_30A8,{3U,5U,0U}},
{MOVE_30A8,{4U,5U,0U}},
{MOVE_30A8,{5U,5U,0U}},
{MOVE_30A8,{6U,5U,0U}},
{MOVE_30A8,{7U,5U,0U}},
{MOVE_30B0,{0U,5U,0U}},
{MOVE_30B0,{1U,5U,0U}},
{MOVE_30B0,{2U,5U,0U}},
{MOVE_30B0,{3U,5U,0U}},
{MOVE_30B0,{4U,5U,0U}},
{MOVE_30B0,{5U,5U,0U}},
{MOVE_30B0,{6U,5U,0U}},
{MOVE_30B0,{7U,5U,0U}},
{MOVE_30B8,{0U,5U,0U}},
{MOVE_30B9,{0U,5U,0U}},
{MOVE_30BA,{0U,5U,0U}},
{MOVE_30BB,{0U,5U,0U}},
{MOVE_30BC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_30C0,{0U,5U,0U}},
{MOVE_30C0,{1U,5U,0U}},
{MOVE_30C0,{2U,5U,0U}},
{MOVE_30C0,{3U,5U,0U}},
{MOVE_30C0,{4U,5U,0U}},
{MOVE_30C0,{5U,5U,0U}},
{MOVE_30C0,{6U,5U,0U}},
{MOVE_30C0,{7U,5U,0U}},
{MOVE_30C8,{0U,5U,0U}},
{MOVE_30C8,{1U,5U,0U}},
{MOVE_30C8,{2U,5U,0U}},
{MOVE_30C8,{3U,5U,0U}},
{MOVE_30C8,{4U,5U,0U}},
{MOVE_30C8,{5U,5U,0U}},
{MOVE_30C8,{6U,5U,0U}},
{MOVE_30C8,{7U,5U,0U}},
{MOVE_30D0,{0U,5U,0U}},
{MOVE_30D0,{1U,5U,0U}},
{MOVE_30D0,{2U,5U,0U}},
{MOVE_30D0,{3U,5U,0U}},
{MOVE_30D0,{4U,5U,0U}},
{MOVE_30D0,{5U,5U,0U}},
{MOVE_30D0,{6U,5U,0U}},
{MOVE_30D0,{7U,5U,0U}},
{MOVE_30D8,{0U,5U,0U}},
{MOVE_30D8,{1U,5U,0U}},
{MOVE_30D8,{2U,5U,0U}},
{MOVE_30D8,{3U,5U,0U}},
{MOVE_30D8,{4U,5U,0U}},
{MOVE_30D8,{5U,5U,0U}},
{MOVE_30D8,{6U,5U,0U}},
{MOVE_30D8,{7U,5U,0U}},
{MOVE_30E0,{0U,5U,0U}},
{MOVE_30E0,{1U,5U,0U}},
{MOVE_30E0,{2U,5U,0U}},
{MOVE_30E0,{3U,5U,0U}},
{MOVE_30E0,{4U,5U,0U}},
{MOVE_30E0,{5U,5U,0U}},
{MOVE_30E0,{6U,5U,0U}},
{MOVE_30E0,{7U,5U,0U}},
{MOVE_30E8,{0U,5U,0U}},
{MOVE_30E8,{1U,5U,0U}},
{MOVE_30E8,{2U,5U,0U}},
{MOVE_30E8,{3U,5U,0U}},
{MOVE_30E8,{4U,5U,0U}},
{MOVE_30E8,{5U,5U,0U}},
{MOVE_30E8,{6U,5U,0U}},
{MOVE_30E8,{7U,5U,0U}},
{MOVE_30F0,{0U,5U,0U}},
{MOVE_30F0,{1U,5U,0U}},
{MOVE_30F0,{2U,5U,0U}},
{MOVE_30F0,{3U,5U,0U}},
{MOVE_30F0,{4U,5U,0U}},
{MOVE_30F0,{5U,5U,0U}},
{MOVE_30F0,{6U,5U,0U}},
{MOVE_30F0,{7U,5U,0U}},
{MOVE_30F8,{0U,5U,0U}},
{MOVE_30F9,{0U,5U,0U}},
{MOVE_30FA,{0U,5U,0U}},
{MOVE_30FB,{0U,5U,0U}},
{MOVE_30FC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3100,{0U,5U,0U}},
{MOVE_3100,{1U,5U,0U}},
{MOVE_3100,{2U,5U,0U}},
{MOVE_3100,{3U,5U,0U}},
{MOVE_3100,{4U,5U,0U}},
{MOVE_3100,{5U,5U,0U}},
{MOVE_3100,{6U,5U,0U}},
{MOVE_3100,{7U,5U,0U}},
{MOVE_3108,{0U,5U,0U}},
{MOVE_3108,{1U,5U,0U}},
{MOVE_3108,{2U,5U,0U}},
{MOVE_3108,{3U,5U,0U}},
{MOVE_3108,{4U,5U,0U}},
{MOVE_3108,{5U,5U,0U}},
{MOVE_3108,{6U,5U,0U}},
{MOVE_3108,{7U,5U,0U}},
{MOVE_3110,{0U,5U,0U}},
{MOVE_3110,{1U,5U,0U}},
{MOVE_3110,{2U,5U,0U}},
{MOVE_3110,{3U,5U,0U}},
{MOVE_3110,{4U,5U,0U}},
{MOVE_3110,{5U,5U,0U}},
{MOVE_3110,{6U,5U,0U}},
{MOVE_3110,{7U,5U,0U}},
{MOVE_3118,{0U,5U,0U}},
{MOVE_3118,{1U,5U,0U}},
{MOVE_3118,{2U,5U,0U}},
{MOVE_3118,{3U,5U,0U}},
{MOVE_3118,{4U,5U,0U}},
{MOVE_3118,{5U,5U,0U}},
{MOVE_3118,{6U,5U,0U}},
{MOVE_3118,{7U,5U,0U}},
{MOVE_3120,{0U,5U,0U}},
{MOVE_3120,{1U,5U,0U}},
{MOVE_3120,{2U,5U,0U}},
{MOVE_3120,{3U,5U,0U}},
{MOVE_3120,{4U,5U,0U}},
{MOVE_3120,{5U,5U,0U}},
{MOVE_3120,{6U,5U,0U}},
{MOVE_3120,{7U,5U,0U}},
{MOVE_3128,{0U,5U,0U}},
{MOVE_3128,{1U,5U,0U}},
{MOVE_3128,{2U,5U,0U}},
{MOVE_3128,{3U,5U,0U}},
{MOVE_3128,{4U,5U,0U}},
{MOVE_3128,{5U,5U,0U}},
{MOVE_3128,{6U,5U,0U}},
{MOVE_3128,{7U,5U,0U}},
{MOVE_3130,{0U,5U,0U}},
{MOVE_3130,{1U,5U,0U}},
{MOVE_3130,{2U,5U,0U}},
{MOVE_3130,{3U,5U,0U}},
{MOVE_3130,{4U,5U,0U}},
{MOVE_3130,{5U,5U,0U}},
{MOVE_3130,{6U,5U,0U}},
{MOVE_3130,{7U,5U,0U}},
{MOVE_3138,{0U,5U,0U}},
{MOVE_3139,{0U,5U,0U}},
{MOVE_313A,{0U,5U,0U}},
{MOVE_313B,{0U,5U,0U}},
{MOVE_313C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3140,{0U,5U,0U}},
{MOVE_3140,{1U,5U,0U}},
{MOVE_3140,{2U,5U,0U}},
{MOVE_3140,{3U,5U,0U}},
{MOVE_3140,{4U,5U,0U}},
{MOVE_3140,{5U,5U,0U}},
{MOVE_3140,{6U,5U,0U}},
{MOVE_3140,{7U,5U,0U}},
{MOVE_3148,{0U,5U,0U}},
{MOVE_3148,{1U,5U,0U}},
{MOVE_3148,{2U,5U,0U}},
{MOVE_3148,{3U,5U,0U}},
{MOVE_3148,{4U,5U,0U}},
{MOVE_3148,{5U,5U,0U}},
{MOVE_3148,{6U,5U,0U}},
{MOVE_3148,{7U,5U,0U}},
{MOVE_3150,{0U,5U,0U}},
{MOVE_3150,{1U,5U,0U}},
{MOVE_3150,{2U,5U,0U}},
{MOVE_3150,{3U,5U,0U}},
{MOVE_3150,{4U,5U,0U}},
{MOVE_3150,{5U,5U,0U}},
{MOVE_3150,{6U,5U,0U}},
{MOVE_3150,{7U,5U,0U}},
{MOVE_3158,{0U,5U,0U}},
{MOVE_3158,{1U,5U,0U}},
{MOVE_3158,{2U,5U,0U}},
{MOVE_3158,{3U,5U,0U}},
{MOVE_3158,{4U,5U,0U}},
{MOVE_3158,{5U,5U,0U}},
{MOVE_3158,{6U,5U,0U}},
{MOVE_3158,{7U,5U,0U}},
{MOVE_3160,{0U,5U,0U}},
{MOVE_3160,{1U,5U,0U}},
{MOVE_3160,{2U,5U,0U}},
{MOVE_3160,{3U,5U,0U}},
{MOVE_3160,{4U,5U,0U}},
{MOVE_3160,{5U,5U,0U}},
{MOVE_3160,{6U,5U,0U}},
{MOVE_3160,{7U,5U,0U}},
{MOVE_3168,{0U,5U,0U}},
{MOVE_3168,{1U,5U,0U}},
{MOVE_3168,{2U,5U,0U}},
{MOVE_3168,{3U,5U,0U}},
{MOVE_3168,{4U,5U,0U}},
{MOVE_3168,{5U,5U,0U}},
{MOVE_3168,{6U,5U,0U}},
{MOVE_3168,{7U,5U,0U}},
{MOVE_3170,{0U,5U,0U}},
{MOVE_3170,{1U,5U,0U}},
{MOVE_3170,{2U,5U,0U}},
{MOVE_3170,{3U,5U,0U}},
{MOVE_3170,{4U,5U,0U}},
{MOVE_3170,{5U,5U,0U}},
{MOVE_3170,{6U,5U,0U}},
{MOVE_3170,{7U,5U,0U}},
{MOVE_3178,{0U,5U,0U}},
{MOVE_3179,{0U,5U,0U}},
{MOVE_317A,{0U,5U,0U}},
{MOVE_317B,{0U,5U,0U}},
{MOVE_317C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3180,{0U,5U,0U}},
{MOVE_3180,{1U,5U,0U}},
{MOVE_3180,{2U,5U,0U}},
{MOVE_3180,{3U,5U,0U}},
{MOVE_3180,{4U,5U,0U}},
{MOVE_3180,{5U,5U,0U}},
{MOVE_3180,{6U,5U,0U}},
{MOVE_3180,{7U,5U,0U}},
{MOVE_3188,{0U,5U,0U}},
{MOVE_3188,{1U,5U,0U}},
{MOVE_3188,{2U,5U,0U}},
{MOVE_3188,{3U,5U,0U}},
{MOVE_3188,{4U,5U,0U}},
{MOVE_3188,{5U,5U,0U}},
{MOVE_3188,{6U,5U,0U}},
{MOVE_3188,{7U,5U,0U}},
{MOVE_3190,{0U,5U,0U}},
{MOVE_3190,{1U,5U,0U}},
{MOVE_3190,{2U,5U,0U}},
{MOVE_3190,{3U,5U,0U}},
{MOVE_3190,{4U,5U,0U}},
{MOVE_3190,{5U,5U,0U}},
{MOVE_3190,{6U,5U,0U}},
{MOVE_3190,{7U,5U,0U}},
{MOVE_3198,{0U,5U,0U}},
{MOVE_3198,{1U,5U,0U}},
{MOVE_3198,{2U,5U,0U}},
{MOVE_3198,{3U,5U,0U}},
{MOVE_3198,{4U,5U,0U}},
{MOVE_3198,{5U,5U,0U}},
{MOVE_3198,{6U,5U,0U}},
{MOVE_3198,{7U,5U,0U}},
{MOVE_31A0,{0U,5U,0U}},
{MOVE_31A0,{1U,5U,0U}},
{MOVE_31A0,{2U,5U,0U}},
{MOVE_31A0,{3U,5U,0U}},
{MOVE_31A0,{4U,5U,0U}},
{MOVE_31A0,{5U,5U,0U}},
{MOVE_31A0,{6U,5U,0U}},
{MOVE_31A0,{7U,5U,0U}},
{MOVE_31A8,{0U,5U,0U}},
{MOVE_31A8,{1U,5U,0U}},
{MOVE_31A8,{2U,5U,0U}},
{MOVE_31A8,{3U,5U,0U}},
{MOVE_31A8,{4U,5U,0U}},
{MOVE_31A8,{5U,5U,0U}},
{MOVE_31A8,{6U,5U,0U}},
{MOVE_31A8,{7U,5U,0U}},
{MOVE_31B0,{0U,5U,0U}},
{MOVE_31B0,{1U,5U,0U}},
{MOVE_31B0,{2U,5U,0U}},
{MOVE_31B0,{3U,5U,0U}},
{MOVE_31B0,{4U,5U,0U}},
{MOVE_31B0,{5U,5U,0U}},
{MOVE_31B0,{6U,5U,0U}},
{MOVE_31B0,{7U,5U,0U}},
{MOVE_31B8,{0U,5U,0U}},
{MOVE_31B9,{0U,5U,0U}},
{MOVE_31BA,{0U,5U,0U}},
{MOVE_31BB,{0U,5U,0U}},
{MOVE_31BC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3000,{0U,6U,0U}},
{MOVE_3000,{1U,6U,0U}},
{MOVE_3000,{2U,6U,0U}},
{MOVE_3000,{3U,6U,0U}},
{MOVE_3000,{4U,6U,0U}},
{MOVE_3000,{5U,6U,0U}},
{MOVE_3000,{6U,6U,0U}},
{MOVE_3000,{7U,6U,0U}},
{MOVE_3008,{0U,6U,0U}},
{MOVE_3008,{1U,6U,0U}},
{MOVE_3008,{2U,6U,0U}},
{MOVE_3008,{3U,6U,0U}},
{MOVE_3008,{4U,6U,0U}},
{MOVE_3008,{5U,6U,0U}},
{MOVE_3008,{6U,6U,0U}},
{MOVE_3008,{7U,6U,0U}},
{MOVE_3010,{0U,6U,0U}},
{MOVE_3010,{1U,6U,0U}},
{MOVE_3010,{2U,6U,0U}},
{MOVE_3010,{3U,6U,0U}},
{MOVE_3010,{4U,6U,0U}},
{MOVE_3010,{5U,6U,0U}},
{MOVE_3010,{6U,6U,0U}},
{MOVE_3010,{7U,6U,0U}},
{MOVE_3018,{0U,6U,0U}},
{MOVE_3018,{1U,6U,0U}},
{MOVE_3018,{2U,6U,0U}},
{MOVE_3018,{3U,6U,0U}},
{MOVE_3018,{4U,6U,0U}},
{MOVE_3018,{5U,6U,0U}},
{MOVE_3018,{6U,6U,0U}},
{MOVE_3018,{7U,6U,0U}},
{MOVE_3020,{0U,6U,0U}},
{MOVE_3020,{1U,6U,0U}},
{MOVE_3020,{2U,6U,0U}},
{MOVE_3020,{3U,6U,0U}},
{MOVE_3020,{4U,6U,0U}},
{MOVE_3020,{5U,6U,0U}},
{MOVE_3020,{6U,6U,0U}},
{MOVE_3020,{7U,6U,0U}},
{MOVE_3028,{0U,6U,0U}},
{MOVE_3028,{1U,6U,0U}},
{MOVE_3028,{2U,6U,0U}},
{MOVE_3028,{3U,6U,0U}},
{MOVE_3028,{4U,6U,0U}},
{MOVE_3028,{5U,6U,0U}},
{MOVE_3028,{6U,6U,0U}},
{MOVE_3028,{7U,6U,0U}},
{MOVE_3030,{0U,6U,0U}},
{MOVE_3030,{1U,6U,0U}},
{MOVE_3030,{2U,6U,0U}},
{MOVE_3030,{3U,6U,0U}},
{MOVE_3030,{4U,6U,0U}},
{MOVE_3030,{5U,6U,0U}},
{MOVE_3030,{6U,6U,0U}},
{MOVE_3030,{7U,6U,0U}},
{MOVE_3038,{0U,6U,0U}},
{MOVE_3039,{0U,6U,0U}},
{MOVE_303A,{0U,6U,0U}},
{MOVE_303B,{0U,6U,0U}},
{MOVE_303C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_3040,{0U,6U,0U}},
{MOVEA_3040,{1U,6U,0U}},
{MOVEA_3040,{2U,6U,0U}},
{MOVEA_3040,{3U,6U,0U}},
{MOVEA_3040,{4U,6U,0U}},
{MOVEA_3040,{5U,6U,0U}},
{MOVEA_3040,{6U,6U,0U}},
{MOVEA_3040,{7U,6U,0U}},
{MOVEA_3048,{0U,6U,0U}},
{MOVEA_3048,{1U,6U,0U}},
{MOVEA_3048,{2U,6U,0U}},
{MOVEA_3048,{3U,6U,0U}},
{MOVEA_3048,{4U,6U,0U}},
{MOVEA_3048,{5U,6U,0U}},
{MOVEA_3048,{6U,6U,0U}},
{MOVEA_3048,{7U,6U,0U}},
{MOVEA_3050,{0U,6U,0U}},
{MOVEA_3050,{1U,6U,0U}},
{MOVEA_3050,{2U,6U,0U}},
{MOVEA_3050,{3U,6U,0U}},
{MOVEA_3050,{4U,6U,0U}},
{MOVEA_3050,{5U,6U,0U}},
{MOVEA_3050,{6U,6U,0U}},
{MOVEA_3050,{7U,6U,0U}},
{MOVEA_3058,{0U,6U,0U}},
{MOVEA_3058,{1U,6U,0U}},
{MOVEA_3058,{2U,6U,0U}},
{MOVEA_3058,{3U,6U,0U}},
{MOVEA_3058,{4U,6U,0U}},
{MOVEA_3058,{5U,6U,0U}},
{MOVEA_3058,{6U,6U,0U}},
{MOVEA_3058,{7U,6U,0U}},
{MOVEA_3060,{0U,6U,0U}},
{MOVEA_3060,{1U,6U,0U}},
{MOVEA_3060,{2U,6U,0U}},
{MOVEA_3060,{3U,6U,0U}},
{MOVEA_3060,{4U,6U,0U}},
{MOVEA_3060,{5U,6U,0U}},
{MOVEA_3060,{6U,6U,0U}},
{MOVEA_3060,{7U,6U,0U}},
{MOVEA_3068,{0U,6U,0U}},
{MOVEA_3068,{1U,6U,0U}},
{MOVEA_3068,{2U,6U,0U}},
{MOVEA_3068,{3U,6U,0U}},
{MOVEA_3068,{4U,6U,0U}},
{MOVEA_3068,{5U,6U,0U}},
{MOVEA_3068,{6U,6U,0U}},
{MOVEA_3068,{7U,6U,0U}},
{MOVEA_3070,{0U,6U,0U}},
{MOVEA_3070,{1U,6U,0U}},
{MOVEA_3070,{2U,6U,0U}},
{MOVEA_3070,{3U,6U,0U}},
{MOVEA_3070,{4U,6U,0U}},
{MOVEA_3070,{5U,6U,0U}},
{MOVEA_3070,{6U,6U,0U}},
{MOVEA_3070,{7U,6U,0U}},
{MOVEA_3078,{0U,6U,0U}},
{MOVEA_3079,{0U,6U,0U}},
{MOVEA_307A,{0U,6U,0U}},
{MOVEA_307B,{0U,6U,0U}},
{MOVEA_307C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3080,{0U,6U,0U}},
{MOVE_3080,{1U,6U,0U}},
{MOVE_3080,{2U,6U,0U}},
{MOVE_3080,{3U,6U,0U}},
{MOVE_3080,{4U,6U,0U}},
{MOVE_3080,{5U,6U,0U}},
{MOVE_3080,{6U,6U,0U}},
{MOVE_3080,{7U,6U,0U}},
{MOVE_3088,{0U,6U,0U}},
{MOVE_3088,{1U,6U,0U}},
{MOVE_3088,{2U,6U,0U}},
{MOVE_3088,{3U,6U,0U}},
{MOVE_3088,{4U,6U,0U}},
{MOVE_3088,{5U,6U,0U}},
{MOVE_3088,{6U,6U,0U}},
{MOVE_3088,{7U,6U,0U}},
{MOVE_3090,{0U,6U,0U}},
{MOVE_3090,{1U,6U,0U}},
{MOVE_3090,{2U,6U,0U}},
{MOVE_3090,{3U,6U,0U}},
{MOVE_3090,{4U,6U,0U}},
{MOVE_3090,{5U,6U,0U}},
{MOVE_3090,{6U,6U,0U}},
{MOVE_3090,{7U,6U,0U}},
{MOVE_3098,{0U,6U,0U}},
{MOVE_3098,{1U,6U,0U}},
{MOVE_3098,{2U,6U,0U}},
{MOVE_3098,{3U,6U,0U}},
{MOVE_3098,{4U,6U,0U}},
{MOVE_3098,{5U,6U,0U}},
{MOVE_3098,{6U,6U,0U}},
{MOVE_3098,{7U,6U,0U}},
{MOVE_30A0,{0U,6U,0U}},
{MOVE_30A0,{1U,6U,0U}},
{MOVE_30A0,{2U,6U,0U}},
{MOVE_30A0,{3U,6U,0U}},
{MOVE_30A0,{4U,6U,0U}},
{MOVE_30A0,{5U,6U,0U}},
{MOVE_30A0,{6U,6U,0U}},
{MOVE_30A0,{7U,6U,0U}},
{MOVE_30A8,{0U,6U,0U}},
{MOVE_30A8,{1U,6U,0U}},
{MOVE_30A8,{2U,6U,0U}},
{MOVE_30A8,{3U,6U,0U}},
{MOVE_30A8,{4U,6U,0U}},
{MOVE_30A8,{5U,6U,0U}},
{MOVE_30A8,{6U,6U,0U}},
{MOVE_30A8,{7U,6U,0U}},
{MOVE_30B0,{0U,6U,0U}},
{MOVE_30B0,{1U,6U,0U}},
{MOVE_30B0,{2U,6U,0U}},
{MOVE_30B0,{3U,6U,0U}},
{MOVE_30B0,{4U,6U,0U}},
{MOVE_30B0,{5U,6U,0U}},
{MOVE_30B0,{6U,6U,0U}},
{MOVE_30B0,{7U,6U,0U}},
{MOVE_30B8,{0U,6U,0U}},
{MOVE_30B9,{0U,6U,0U}},
{MOVE_30BA,{0U,6U,0U}},
{MOVE_30BB,{0U,6U,0U}},
{MOVE_30BC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_30C0,{0U,6U,0U}},
{MOVE_30C0,{1U,6U,0U}},
{MOVE_30C0,{2U,6U,0U}},
{MOVE_30C0,{3U,6U,0U}},
{MOVE_30C0,{4U,6U,0U}},
{MOVE_30C0,{5U,6U,0U}},
{MOVE_30C0,{6U,6U,0U}},
{MOVE_30C0,{7U,6U,0U}},
{MOVE_30C8,{0U,6U,0U}},
{MOVE_30C8,{1U,6U,0U}},
{MOVE_30C8,{2U,6U,0U}},
{MOVE_30C8,{3U,6U,0U}},
{MOVE_30C8,{4U,6U,0U}},
{MOVE_30C8,{5U,6U,0U}},
{MOVE_30C8,{6U,6U,0U}},
{MOVE_30C8,{7U,6U,0U}},
{MOVE_30D0,{0U,6U,0U}},
{MOVE_30D0,{1U,6U,0U}},
{MOVE_30D0,{2U,6U,0U}},
{MOVE_30D0,{3U,6U,0U}},
{MOVE_30D0,{4U,6U,0U}},
{MOVE_30D0,{5U,6U,0U}},
{MOVE_30D0,{6U,6U,0U}},
{MOVE_30D0,{7U,6U,0U}},
{MOVE_30D8,{0U,6U,0U}},
{MOVE_30D8,{1U,6U,0U}},
{MOVE_30D8,{2U,6U,0U}},
{MOVE_30D8,{3U,6U,0U}},
{MOVE_30D8,{4U,6U,0U}},
{MOVE_30D8,{5U,6U,0U}},
{MOVE_30D8,{6U,6U,0U}},
{MOVE_30D8,{7U,6U,0U}},
{MOVE_30E0,{0U,6U,0U}},
{MOVE_30E0,{1U,6U,0U}},
{MOVE_30E0,{2U,6U,0U}},
{MOVE_30E0,{3U,6U,0U}},
{MOVE_30E0,{4U,6U,0U}},
{MOVE_30E0,{5U,6U,0U}},
{MOVE_30E0,{6U,6U,0U}},
{MOVE_30E0,{7U,6U,0U}},
{MOVE_30E8,{0U,6U,0U}},
{MOVE_30E8,{1U,6U,0U}},
{MOVE_30E8,{2U,6U,0U}},
{MOVE_30E8,{3U,6U,0U}},
{MOVE_30E8,{4U,6U,0U}},
{MOVE_30E8,{5U,6U,0U}},
{MOVE_30E8,{6U,6U,0U}},
{MOVE_30E8,{7U,6U,0U}},
{MOVE_30F0,{0U,6U,0U}},
{MOVE_30F0,{1U,6U,0U}},
{MOVE_30F0,{2U,6U,0U}},
{MOVE_30F0,{3U,6U,0U}},
{MOVE_30F0,{4U,6U,0U}},
{MOVE_30F0,{5U,6U,0U}},
{MOVE_30F0,{6U,6U,0U}},
{MOVE_30F0,{7U,6U,0U}},
{MOVE_30F8,{0U,6U,0U}},
{MOVE_30F9,{0U,6U,0U}},
{MOVE_30FA,{0U,6U,0U}},
{MOVE_30FB,{0U,6U,0U}},
{MOVE_30FC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3100,{0U,6U,0U}},
{MOVE_3100,{1U,6U,0U}},
{MOVE_3100,{2U,6U,0U}},
{MOVE_3100,{3U,6U,0U}},
{MOVE_3100,{4U,6U,0U}},
{MOVE_3100,{5U,6U,0U}},
{MOVE_3100,{6U,6U,0U}},
{MOVE_3100,{7U,6U,0U}},
{MOVE_3108,{0U,6U,0U}},
{MOVE_3108,{1U,6U,0U}},
{MOVE_3108,{2U,6U,0U}},
{MOVE_3108,{3U,6U,0U}},
{MOVE_3108,{4U,6U,0U}},
{MOVE_3108,{5U,6U,0U}},
{MOVE_3108,{6U,6U,0U}},
{MOVE_3108,{7U,6U,0U}},
{MOVE_3110,{0U,6U,0U}},
{MOVE_3110,{1U,6U,0U}},
{MOVE_3110,{2U,6U,0U}},
{MOVE_3110,{3U,6U,0U}},
{MOVE_3110,{4U,6U,0U}},
{MOVE_3110,{5U,6U,0U}},
{MOVE_3110,{6U,6U,0U}},
{MOVE_3110,{7U,6U,0U}},
{MOVE_3118,{0U,6U,0U}},
{MOVE_3118,{1U,6U,0U}},
{MOVE_3118,{2U,6U,0U}},
{MOVE_3118,{3U,6U,0U}},
{MOVE_3118,{4U,6U,0U}},
{MOVE_3118,{5U,6U,0U}},
{MOVE_3118,{6U,6U,0U}},
{MOVE_3118,{7U,6U,0U}},
{MOVE_3120,{0U,6U,0U}},
{MOVE_3120,{1U,6U,0U}},
{MOVE_3120,{2U,6U,0U}},
{MOVE_3120,{3U,6U,0U}},
{MOVE_3120,{4U,6U,0U}},
{MOVE_3120,{5U,6U,0U}},
{MOVE_3120,{6U,6U,0U}},
{MOVE_3120,{7U,6U,0U}},
{MOVE_3128,{0U,6U,0U}},
{MOVE_3128,{1U,6U,0U}},
{MOVE_3128,{2U,6U,0U}},
{MOVE_3128,{3U,6U,0U}},
{MOVE_3128,{4U,6U,0U}},
{MOVE_3128,{5U,6U,0U}},
{MOVE_3128,{6U,6U,0U}},
{MOVE_3128,{7U,6U,0U}},
{MOVE_3130,{0U,6U,0U}},
{MOVE_3130,{1U,6U,0U}},
{MOVE_3130,{2U,6U,0U}},
{MOVE_3130,{3U,6U,0U}},
{MOVE_3130,{4U,6U,0U}},
{MOVE_3130,{5U,6U,0U}},
{MOVE_3130,{6U,6U,0U}},
{MOVE_3130,{7U,6U,0U}},
{MOVE_3138,{0U,6U,0U}},
{MOVE_3139,{0U,6U,0U}},
{MOVE_313A,{0U,6U,0U}},
{MOVE_313B,{0U,6U,0U}},
{MOVE_313C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3140,{0U,6U,0U}},
{MOVE_3140,{1U,6U,0U}},
{MOVE_3140,{2U,6U,0U}},
{MOVE_3140,{3U,6U,0U}},
{MOVE_3140,{4U,6U,0U}},
{MOVE_3140,{5U,6U,0U}},
{MOVE_3140,{6U,6U,0U}},
{MOVE_3140,{7U,6U,0U}},
{MOVE_3148,{0U,6U,0U}},
{MOVE_3148,{1U,6U,0U}},
{MOVE_3148,{2U,6U,0U}},
{MOVE_3148,{3U,6U,0U}},
{MOVE_3148,{4U,6U,0U}},
{MOVE_3148,{5U,6U,0U}},
{MOVE_3148,{6U,6U,0U}},
{MOVE_3148,{7U,6U,0U}},
{MOVE_3150,{0U,6U,0U}},
{MOVE_3150,{1U,6U,0U}},
{MOVE_3150,{2U,6U,0U}},
{MOVE_3150,{3U,6U,0U}},
{MOVE_3150,{4U,6U,0U}},
{MOVE_3150,{5U,6U,0U}},
{MOVE_3150,{6U,6U,0U}},
{MOVE_3150,{7U,6U,0U}},
{MOVE_3158,{0U,6U,0U}},
{MOVE_3158,{1U,6U,0U}},
{MOVE_3158,{2U,6U,0U}},
{MOVE_3158,{3U,6U,0U}},
{MOVE_3158,{4U,6U,0U}},
{MOVE_3158,{5U,6U,0U}},
{MOVE_3158,{6U,6U,0U}},
{MOVE_3158,{7U,6U,0U}},
{MOVE_3160,{0U,6U,0U}},
{MOVE_3160,{1U,6U,0U}},
{MOVE_3160,{2U,6U,0U}},
{MOVE_3160,{3U,6U,0U}},
{MOVE_3160,{4U,6U,0U}},
{MOVE_3160,{5U,6U,0U}},
{MOVE_3160,{6U,6U,0U}},
{MOVE_3160,{7U,6U,0U}},
{MOVE_3168,{0U,6U,0U}},
{MOVE_3168,{1U,6U,0U}},
{MOVE_3168,{2U,6U,0U}},
{MOVE_3168,{3U,6U,0U}},
{MOVE_3168,{4U,6U,0U}},
{MOVE_3168,{5U,6U,0U}},
{MOVE_3168,{6U,6U,0U}},
{MOVE_3168,{7U,6U,0U}},
{MOVE_3170,{0U,6U,0U}},
{MOVE_3170,{1U,6U,0U}},
{MOVE_3170,{2U,6U,0U}},
{MOVE_3170,{3U,6U,0U}},
{MOVE_3170,{4U,6U,0U}},
{MOVE_3170,{5U,6U,0U}},
{MOVE_3170,{6U,6U,0U}},
{MOVE_3170,{7U,6U,0U}},
{MOVE_3178,{0U,6U,0U}},
{MOVE_3179,{0U,6U,0U}},
{MOVE_317A,{0U,6U,0U}},
{MOVE_317B,{0U,6U,0U}},
{MOVE_317C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3180,{0U,6U,0U}},
{MOVE_3180,{1U,6U,0U}},
{MOVE_3180,{2U,6U,0U}},
{MOVE_3180,{3U,6U,0U}},
{MOVE_3180,{4U,6U,0U}},
{MOVE_3180,{5U,6U,0U}},
{MOVE_3180,{6U,6U,0U}},
{MOVE_3180,{7U,6U,0U}},
{MOVE_3188,{0U,6U,0U}},
{MOVE_3188,{1U,6U,0U}},
{MOVE_3188,{2U,6U,0U}},
{MOVE_3188,{3U,6U,0U}},
{MOVE_3188,{4U,6U,0U}},
{MOVE_3188,{5U,6U,0U}},
{MOVE_3188,{6U,6U,0U}},
{MOVE_3188,{7U,6U,0U}},
{MOVE_3190,{0U,6U,0U}},
{MOVE_3190,{1U,6U,0U}},
{MOVE_3190,{2U,6U,0U}},
{MOVE_3190,{3U,6U,0U}},
{MOVE_3190,{4U,6U,0U}},
{MOVE_3190,{5U,6U,0U}},
{MOVE_3190,{6U,6U,0U}},
{MOVE_3190,{7U,6U,0U}},
{MOVE_3198,{0U,6U,0U}},
{MOVE_3198,{1U,6U,0U}},
{MOVE_3198,{2U,6U,0U}},
{MOVE_3198,{3U,6U,0U}},
{MOVE_3198,{4U,6U,0U}},
{MOVE_3198,{5U,6U,0U}},
{MOVE_3198,{6U,6U,0U}},
{MOVE_3198,{7U,6U,0U}},
{MOVE_31A0,{0U,6U,0U}},
{MOVE_31A0,{1U,6U,0U}},
{MOVE_31A0,{2U,6U,0U}},
{MOVE_31A0,{3U,6U,0U}},
{MOVE_31A0,{4U,6U,0U}},
{MOVE_31A0,{5U,6U,0U}},
{MOVE_31A0,{6U,6U,0U}},
{MOVE_31A0,{7U,6U,0U}},
{MOVE_31A8,{0U,6U,0U}},
{MOVE_31A8,{1U,6U,0U}},
{MOVE_31A8,{2U,6U,0U}},
{MOVE_31A8,{3U,6U,0U}},
{MOVE_31A8,{4U,6U,0U}},
{MOVE_31A8,{5U,6U,0U}},
{MOVE_31A8,{6U,6U,0U}},
{MOVE_31A8,{7U,6U,0U}},
{MOVE_31B0,{0U,6U,0U}},
{MOVE_31B0,{1U,6U,0U}},
{MOVE_31B0,{2U,6U,0U}},
{MOVE_31B0,{3U,6U,0U}},
{MOVE_31B0,{4U,6U,0U}},
{MOVE_31B0,{5U,6U,0U}},
{MOVE_31B0,{6U,6U,0U}},
{MOVE_31B0,{7U,6U,0U}},
{MOVE_31B8,{0U,6U,0U}},
{MOVE_31B9,{0U,6U,0U}},
{MOVE_31BA,{0U,6U,0U}},
{MOVE_31BB,{0U,6U,0U}},
{MOVE_31BC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3000,{0U,7U,0U}},
{MOVE_3000,{1U,7U,0U}},
{MOVE_3000,{2U,7U,0U}},
{MOVE_3000,{3U,7U,0U}},
{MOVE_3000,{4U,7U,0U}},
{MOVE_3000,{5U,7U,0U}},
{MOVE_3000,{6U,7U,0U}},
{MOVE_3000,{7U,7U,0U}},
{MOVE_3008,{0U,7U,0U}},
{MOVE_3008,{1U,7U,0U}},
{MOVE_3008,{2U,7U,0U}},
{MOVE_3008,{3U,7U,0U}},
{MOVE_3008,{4U,7U,0U}},
{MOVE_3008,{5U,7U,0U}},
{MOVE_3008,{6U,7U,0U}},
{MOVE_3008,{7U,7U,0U}},
{MOVE_3010,{0U,7U,0U}},
{MOVE_3010,{1U,7U,0U}},
{MOVE_3010,{2U,7U,0U}},
{MOVE_3010,{3U,7U,0U}},
{MOVE_3010,{4U,7U,0U}},
{MOVE_3010,{5U,7U,0U}},
{MOVE_3010,{6U,7U,0U}},
{MOVE_3010,{7U,7U,0U}},
{MOVE_3018,{0U,7U,0U}},
{MOVE_3018,{1U,7U,0U}},
{MOVE_3018,{2U,7U,0U}},
{MOVE_3018,{3U,7U,0U}},
{MOVE_3018,{4U,7U,0U}},
{MOVE_3018,{5U,7U,0U}},
{MOVE_3018,{6U,7U,0U}},
{MOVE_3018,{7U,7U,0U}},
{MOVE_3020,{0U,7U,0U}},
{MOVE_3020,{1U,7U,0U}},
{MOVE_3020,{2U,7U,0U}},
{MOVE_3020,{3U,7U,0U}},
{MOVE_3020,{4U,7U,0U}},
{MOVE_3020,{5U,7U,0U}},
{MOVE_3020,{6U,7U,0U}},
{MOVE_3020,{7U,7U,0U}},
{MOVE_3028,{0U,7U,0U}},
{MOVE_3028,{1U,7U,0U}},
{MOVE_3028,{2U,7U,0U}},
{MOVE_3028,{3U,7U,0U}},
{MOVE_3028,{4U,7U,0U}},
{MOVE_3028,{5U,7U,0U}},
{MOVE_3028,{6U,7U,0U}},
{MOVE_3028,{7U,7U,0U}},
{MOVE_3030,{0U,7U,0U}},
{MOVE_3030,{1U,7U,0U}},
{MOVE_3030,{2U,7U,0U}},
{MOVE_3030,{3U,7U,0U}},
{MOVE_3030,{4U,7U,0U}},
{MOVE_3030,{5U,7U,0U}},
{MOVE_3030,{6U,7U,0U}},
{MOVE_3030,{7U,7U,0U}},
{MOVE_3038,{0U,7U,0U}},
{MOVE_3039,{0U,7U,0U}},
{MOVE_303A,{0U,7U,0U}},
{MOVE_303B,{0U,7U,0U}},
{MOVE_303C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEA_3040,{0U,7U,0U}},
{MOVEA_3040,{1U,7U,0U}},
{MOVEA_3040,{2U,7U,0U}},
{MOVEA_3040,{3U,7U,0U}},
{MOVEA_3040,{4U,7U,0U}},
{MOVEA_3040,{5U,7U,0U}},
{MOVEA_3040,{6U,7U,0U}},
{MOVEA_3040,{7U,7U,0U}},
{MOVEA_3048,{0U,7U,0U}},
{MOVEA_3048,{1U,7U,0U}},
{MOVEA_3048,{2U,7U,0U}},
{MOVEA_3048,{3U,7U,0U}},
{MOVEA_3048,{4U,7U,0U}},
{MOVEA_3048,{5U,7U,0U}},
{MOVEA_3048,{6U,7U,0U}},
{MOVEA_3048,{7U,7U,0U}},
{MOVEA_3050,{0U,7U,0U}},
{MOVEA_3050,{1U,7U,0U}},
{MOVEA_3050,{2U,7U,0U}},
{MOVEA_3050,{3U,7U,0U}},
{MOVEA_3050,{4U,7U,0U}},
{MOVEA_3050,{5U,7U,0U}},
{MOVEA_3050,{6U,7U,0U}},
{MOVEA_3050,{7U,7U,0U}},
{MOVEA_3058,{0U,7U,0U}},
{MOVEA_3058,{1U,7U,0U}},
{MOVEA_3058,{2U,7U,0U}},
{MOVEA_3058,{3U,7U,0U}},
{MOVEA_3058,{4U,7U,0U}},
{MOVEA_3058,{5U,7U,0U}},
{MOVEA_3058,{6U,7U,0U}},
{MOVEA_3058,{7U,7U,0U}},
{MOVEA_3060,{0U,7U,0U}},
{MOVEA_3060,{1U,7U,0U}},
{MOVEA_3060,{2U,7U,0U}},
{MOVEA_3060,{3U,7U,0U}},
{MOVEA_3060,{4U,7U,0U}},
{MOVEA_3060,{5U,7U,0U}},
{MOVEA_3060,{6U,7U,0U}},
{MOVEA_3060,{7U,7U,0U}},
{MOVEA_3068,{0U,7U,0U}},
{MOVEA_3068,{1U,7U,0U}},
{MOVEA_3068,{2U,7U,0U}},
{MOVEA_3068,{3U,7U,0U}},
{MOVEA_3068,{4U,7U,0U}},
{MOVEA_3068,{5U,7U,0U}},
{MOVEA_3068,{6U,7U,0U}},
{MOVEA_3068,{7U,7U,0U}},
{MOVEA_3070,{0U,7U,0U}},
{MOVEA_3070,{1U,7U,0U}},
{MOVEA_3070,{2U,7U,0U}},
{MOVEA_3070,{3U,7U,0U}},
{MOVEA_3070,{4U,7U,0U}},
{MOVEA_3070,{5U,7U,0U}},
{MOVEA_3070,{6U,7U,0U}},
{MOVEA_3070,{7U,7U,0U}},
{MOVEA_3078,{0U,7U,0U}},
{MOVEA_3079,{0U,7U,0U}},
{MOVEA_307A,{0U,7U,0U}},
{MOVEA_307B,{0U,7U,0U}},
{MOVEA_307C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3080,{0U,7U,0U}},
{MOVE_3080,{1U,7U,0U}},
{MOVE_3080,{2U,7U,0U}},
{MOVE_3080,{3U,7U,0U}},
{MOVE_3080,{4U,7U,0U}},
{MOVE_3080,{5U,7U,0U}},
{MOVE_3080,{6U,7U,0U}},
{MOVE_3080,{7U,7U,0U}},
{MOVE_3088,{0U,7U,0U}},
{MOVE_3088,{1U,7U,0U}},
{MOVE_3088,{2U,7U,0U}},
{MOVE_3088,{3U,7U,0U}},
{MOVE_3088,{4U,7U,0U}},
{MOVE_3088,{5U,7U,0U}},
{MOVE_3088,{6U,7U,0U}},
{MOVE_3088,{7U,7U,0U}},
{MOVE_3090,{0U,7U,0U}},
{MOVE_3090,{1U,7U,0U}},
{MOVE_3090,{2U,7U,0U}},
{MOVE_3090,{3U,7U,0U}},
{MOVE_3090,{4U,7U,0U}},
{MOVE_3090,{5U,7U,0U}},
{MOVE_3090,{6U,7U,0U}},
{MOVE_3090,{7U,7U,0U}},
{MOVE_3098,{0U,7U,0U}},
{MOVE_3098,{1U,7U,0U}},
{MOVE_3098,{2U,7U,0U}},
{MOVE_3098,{3U,7U,0U}},
{MOVE_3098,{4U,7U,0U}},
{MOVE_3098,{5U,7U,0U}},
{MOVE_3098,{6U,7U,0U}},
{MOVE_3098,{7U,7U,0U}},
{MOVE_30A0,{0U,7U,0U}},
{MOVE_30A0,{1U,7U,0U}},
{MOVE_30A0,{2U,7U,0U}},
{MOVE_30A0,{3U,7U,0U}},
{MOVE_30A0,{4U,7U,0U}},
{MOVE_30A0,{5U,7U,0U}},
{MOVE_30A0,{6U,7U,0U}},
{MOVE_30A0,{7U,7U,0U}},
{MOVE_30A8,{0U,7U,0U}},
{MOVE_30A8,{1U,7U,0U}},
{MOVE_30A8,{2U,7U,0U}},
{MOVE_30A8,{3U,7U,0U}},
{MOVE_30A8,{4U,7U,0U}},
{MOVE_30A8,{5U,7U,0U}},
{MOVE_30A8,{6U,7U,0U}},
{MOVE_30A8,{7U,7U,0U}},
{MOVE_30B0,{0U,7U,0U}},
{MOVE_30B0,{1U,7U,0U}},
{MOVE_30B0,{2U,7U,0U}},
{MOVE_30B0,{3U,7U,0U}},
{MOVE_30B0,{4U,7U,0U}},
{MOVE_30B0,{5U,7U,0U}},
{MOVE_30B0,{6U,7U,0U}},
{MOVE_30B0,{7U,7U,0U}},
{MOVE_30B8,{0U,7U,0U}},
{MOVE_30B9,{0U,7U,0U}},
{MOVE_30BA,{0U,7U,0U}},
{MOVE_30BB,{0U,7U,0U}},
{MOVE_30BC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_30C0,{0U,7U,0U}},
{MOVE_30C0,{1U,7U,0U}},
{MOVE_30C0,{2U,7U,0U}},
{MOVE_30C0,{3U,7U,0U}},
{MOVE_30C0,{4U,7U,0U}},
{MOVE_30C0,{5U,7U,0U}},
{MOVE_30C0,{6U,7U,0U}},
{MOVE_30C0,{7U,7U,0U}},
{MOVE_30C8,{0U,7U,0U}},
{MOVE_30C8,{1U,7U,0U}},
{MOVE_30C8,{2U,7U,0U}},
{MOVE_30C8,{3U,7U,0U}},
{MOVE_30C8,{4U,7U,0U}},
{MOVE_30C8,{5U,7U,0U}},
{MOVE_30C8,{6U,7U,0U}},
{MOVE_30C8,{7U,7U,0U}},
{MOVE_30D0,{0U,7U,0U}},
{MOVE_30D0,{1U,7U,0U}},
{MOVE_30D0,{2U,7U,0U}},
{MOVE_30D0,{3U,7U,0U}},
{MOVE_30D0,{4U,7U,0U}},
{MOVE_30D0,{5U,7U,0U}},
{MOVE_30D0,{6U,7U,0U}},
{MOVE_30D0,{7U,7U,0U}},
{MOVE_30D8,{0U,7U,0U}},
{MOVE_30D8,{1U,7U,0U}},
{MOVE_30D8,{2U,7U,0U}},
{MOVE_30D8,{3U,7U,0U}},
{MOVE_30D8,{4U,7U,0U}},
{MOVE_30D8,{5U,7U,0U}},
{MOVE_30D8,{6U,7U,0U}},
{MOVE_30D8,{7U,7U,0U}},
{MOVE_30E0,{0U,7U,0U}},
{MOVE_30E0,{1U,7U,0U}},
{MOVE_30E0,{2U,7U,0U}},
{MOVE_30E0,{3U,7U,0U}},
{MOVE_30E0,{4U,7U,0U}},
{MOVE_30E0,{5U,7U,0U}},
{MOVE_30E0,{6U,7U,0U}},
{MOVE_30E0,{7U,7U,0U}},
{MOVE_30E8,{0U,7U,0U}},
{MOVE_30E8,{1U,7U,0U}},
{MOVE_30E8,{2U,7U,0U}},
{MOVE_30E8,{3U,7U,0U}},
{MOVE_30E8,{4U,7U,0U}},
{MOVE_30E8,{5U,7U,0U}},
{MOVE_30E8,{6U,7U,0U}},
{MOVE_30E8,{7U,7U,0U}},
{MOVE_30F0,{0U,7U,0U}},
{MOVE_30F0,{1U,7U,0U}},
{MOVE_30F0,{2U,7U,0U}},
{MOVE_30F0,{3U,7U,0U}},
{MOVE_30F0,{4U,7U,0U}},
{MOVE_30F0,{5U,7U,0U}},
{MOVE_30F0,{6U,7U,0U}},
{MOVE_30F0,{7U,7U,0U}},
{MOVE_30F8,{0U,7U,0U}},
{MOVE_30F9,{0U,7U,0U}},
{MOVE_30FA,{0U,7U,0U}},
{MOVE_30FB,{0U,7U,0U}},
{MOVE_30FC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3100,{0U,7U,0U}},
{MOVE_3100,{1U,7U,0U}},
{MOVE_3100,{2U,7U,0U}},
{MOVE_3100,{3U,7U,0U}},
{MOVE_3100,{4U,7U,0U}},
{MOVE_3100,{5U,7U,0U}},
{MOVE_3100,{6U,7U,0U}},
{MOVE_3100,{7U,7U,0U}},
{MOVE_3108,{0U,7U,0U}},
{MOVE_3108,{1U,7U,0U}},
{MOVE_3108,{2U,7U,0U}},
{MOVE_3108,{3U,7U,0U}},
{MOVE_3108,{4U,7U,0U}},
{MOVE_3108,{5U,7U,0U}},
{MOVE_3108,{6U,7U,0U}},
{MOVE_3108,{7U,7U,0U}},
{MOVE_3110,{0U,7U,0U}},
{MOVE_3110,{1U,7U,0U}},
{MOVE_3110,{2U,7U,0U}},
{MOVE_3110,{3U,7U,0U}},
{MOVE_3110,{4U,7U,0U}},
{MOVE_3110,{5U,7U,0U}},
{MOVE_3110,{6U,7U,0U}},
{MOVE_3110,{7U,7U,0U}},
{MOVE_3118,{0U,7U,0U}},
{MOVE_3118,{1U,7U,0U}},
{MOVE_3118,{2U,7U,0U}},
{MOVE_3118,{3U,7U,0U}},
{MOVE_3118,{4U,7U,0U}},
{MOVE_3118,{5U,7U,0U}},
{MOVE_3118,{6U,7U,0U}},
{MOVE_3118,{7U,7U,0U}},
{MOVE_3120,{0U,7U,0U}},
{MOVE_3120,{1U,7U,0U}},
{MOVE_3120,{2U,7U,0U}},
{MOVE_3120,{3U,7U,0U}},
{MOVE_3120,{4U,7U,0U}},
{MOVE_3120,{5U,7U,0U}},
{MOVE_3120,{6U,7U,0U}},
{MOVE_3120,{7U,7U,0U}},
{MOVE_3128,{0U,7U,0U}},
{MOVE_3128,{1U,7U,0U}},
{MOVE_3128,{2U,7U,0U}},
{MOVE_3128,{3U,7U,0U}},
{MOVE_3128,{4U,7U,0U}},
{MOVE_3128,{5U,7U,0U}},
{MOVE_3128,{6U,7U,0U}},
{MOVE_3128,{7U,7U,0U}},
{MOVE_3130,{0U,7U,0U}},
{MOVE_3130,{1U,7U,0U}},
{MOVE_3130,{2U,7U,0U}},
{MOVE_3130,{3U,7U,0U}},
{MOVE_3130,{4U,7U,0U}},
{MOVE_3130,{5U,7U,0U}},
{MOVE_3130,{6U,7U,0U}},
{MOVE_3130,{7U,7U,0U}},
{MOVE_3138,{0U,7U,0U}},
{MOVE_3139,{0U,7U,0U}},
{MOVE_313A,{0U,7U,0U}},
{MOVE_313B,{0U,7U,0U}},
{MOVE_313C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3140,{0U,7U,0U}},
{MOVE_3140,{1U,7U,0U}},
{MOVE_3140,{2U,7U,0U}},
{MOVE_3140,{3U,7U,0U}},
{MOVE_3140,{4U,7U,0U}},
{MOVE_3140,{5U,7U,0U}},
{MOVE_3140,{6U,7U,0U}},
{MOVE_3140,{7U,7U,0U}},
{MOVE_3148,{0U,7U,0U}},
{MOVE_3148,{1U,7U,0U}},
{MOVE_3148,{2U,7U,0U}},
{MOVE_3148,{3U,7U,0U}},
{MOVE_3148,{4U,7U,0U}},
{MOVE_3148,{5U,7U,0U}},
{MOVE_3148,{6U,7U,0U}},
{MOVE_3148,{7U,7U,0U}},
{MOVE_3150,{0U,7U,0U}},
{MOVE_3150,{1U,7U,0U}},
{MOVE_3150,{2U,7U,0U}},
{MOVE_3150,{3U,7U,0U}},
{MOVE_3150,{4U,7U,0U}},
{MOVE_3150,{5U,7U,0U}},
{MOVE_3150,{6U,7U,0U}},
{MOVE_3150,{7U,7U,0U}},
{MOVE_3158,{0U,7U,0U}},
{MOVE_3158,{1U,7U,0U}},
{MOVE_3158,{2U,7U,0U}},
{MOVE_3158,{3U,7U,0U}},
{MOVE_3158,{4U,7U,0U}},
{MOVE_3158,{5U,7U,0U}},
{MOVE_3158,{6U,7U,0U}},
{MOVE_3158,{7U,7U,0U}},
{MOVE_3160,{0U,7U,0U}},
{MOVE_3160,{1U,7U,0U}},
{MOVE_3160,{2U,7U,0U}},
{MOVE_3160,{3U,7U,0U}},
{MOVE_3160,{4U,7U,0U}},
{MOVE_3160,{5U,7U,0U}},
{MOVE_3160,{6U,7U,0U}},
{MOVE_3160,{7U,7U,0U}},
{MOVE_3168,{0U,7U,0U}},
{MOVE_3168,{1U,7U,0U}},
{MOVE_3168,{2U,7U,0U}},
{MOVE_3168,{3U,7U,0U}},
{MOVE_3168,{4U,7U,0U}},
{MOVE_3168,{5U,7U,0U}},
{MOVE_3168,{6U,7U,0U}},
{MOVE_3168,{7U,7U,0U}},
{MOVE_3170,{0U,7U,0U}},
{MOVE_3170,{1U,7U,0U}},
{MOVE_3170,{2U,7U,0U}},
{MOVE_3170,{3U,7U,0U}},
{MOVE_3170,{4U,7U,0U}},
{MOVE_3170,{5U,7U,0U}},
{MOVE_3170,{6U,7U,0U}},
{MOVE_3170,{7U,7U,0U}},
{MOVE_3178,{0U,7U,0U}},
{MOVE_3179,{0U,7U,0U}},
{MOVE_317A,{0U,7U,0U}},
{MOVE_317B,{0U,7U,0U}},
{MOVE_317C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVE_3180,{0U,7U,0U}},
{MOVE_3180,{1U,7U,0U}},
{MOVE_3180,{2U,7U,0U}},
{MOVE_3180,{3U,7U,0U}},
{MOVE_3180,{4U,7U,0U}},
{MOVE_3180,{5U,7U,0U}},
{MOVE_3180,{6U,7U,0U}},
{MOVE_3180,{7U,7U,0U}},
{MOVE_3188,{0U,7U,0U}},
{MOVE_3188,{1U,7U,0U}},
{MOVE_3188,{2U,7U,0U}},
{MOVE_3188,{3U,7U,0U}},
{MOVE_3188,{4U,7U,0U}},
{MOVE_3188,{5U,7U,0U}},
{MOVE_3188,{6U,7U,0U}},
{MOVE_3188,{7U,7U,0U}},
{MOVE_3190,{0U,7U,0U}},
{MOVE_3190,{1U,7U,0U}},
{MOVE_3190,{2U,7U,0U}},
{MOVE_3190,{3U,7U,0U}},
{MOVE_3190,{4U,7U,0U}},
{MOVE_3190,{5U,7U,0U}},
{MOVE_3190,{6U,7U,0U}},
{MOVE_3190,{7U,7U,0U}},
{MOVE_3198,{0U,7U,0U}},
{MOVE_3198,{1U,7U,0U}},
{MOVE_3198,{2U,7U,0U}},
{MOVE_3198,{3U,7U,0U}},
{MOVE_3198,{4U,7U,0U}},
{MOVE_3198,{5U,7U,0U}},
{MOVE_3198,{6U,7U,0U}},
{MOVE_3198,{7U,7U,0U}},
{MOVE_31A0,{0U,7U,0U}},
{MOVE_31A0,{1U,7U,0U}},
{MOVE_31A0,{2U,7U,0U}},
{MOVE_31A0,{3U,7U,0U}},
{MOVE_31A0,{4U,7U,0U}},
{MOVE_31A0,{5U,7U,0U}},
{MOVE_31A0,{6U,7U,0U}},
{MOVE_31A0,{7U,7U,0U}},
{MOVE_31A8,{0U,7U,0U}},
{MOVE_31A8,{1U,7U,0U}},
{MOVE_31A8,{2U,7U,0U}},
{MOVE_31A8,{3U,7U,0U}},
{MOVE_31A8,{4U,7U,0U}},
{MOVE_31A8,{5U,7U,0U}},
{MOVE_31A8,{6U,7U,0U}},
{MOVE_31A8,{7U,7U,0U}},
{MOVE_31B0,{0U,7U,0U}},
{MOVE_31B0,{1U,7U,0U}},
{MOVE_31B0,{2U,7U,0U}},
{MOVE_31B0,{3U,7U,0U}},
{MOVE_31B0,{4U,7U,0U}},
{MOVE_31B0,{5U,7U,0U}},
{MOVE_31B0,{6U,7U,0U}},
{MOVE_31B0,{7U,7U,0U}},
{MOVE_31B8,{0U,7U,0U}},
{MOVE_31B9,{0U,7U,0U}},
{MOVE_31BA,{0U,7U,0U}},
{MOVE_31BB,{0U,7U,0U}},
{MOVE_31BC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NEGX_4000,{0U,0U,0U}},
{NEGX_4000,{1U,0U,0U}},
{NEGX_4000,{2U,0U,0U}},
{NEGX_4000,{3U,0U,0U}},
{NEGX_4000,{4U,0U,0U}},
{NEGX_4000,{5U,0U,0U}},
{NEGX_4000,{6U,0U,0U}},
{NEGX_4000,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NEGX_4010,{0U,0U,0U}},
{NEGX_4010,{1U,0U,0U}},
{NEGX_4010,{2U,0U,0U}},
{NEGX_4010,{3U,0U,0U}},
{NEGX_4010,{4U,0U,0U}},
{NEGX_4010,{5U,0U,0U}},
{NEGX_4010,{6U,0U,0U}},
{NEGX_4010,{7U,0U,0U}},
{NEGX_4018,{0U,0U,0U}},
{NEGX_4018,{1U,0U,0U}},
{NEGX_4018,{2U,0U,0U}},
{NEGX_4018,{3U,0U,0U}},
{NEGX_4018,{4U,0U,0U}},
{NEGX_4018,{5U,0U,0U}},
{NEGX_4018,{6U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41D0,{0U,0U,0U}},
{LEA_41D0,{1U,0U,0U}},
{LEA_41D0,{2U,0U,0U}},
{LEA_41D0,{3U,0U,0U}},
{LEA_41D0,{4U,0U,0U}},
{LEA_41D0,{5U,0U,0U}},
{LEA_41D0,{6U,0U,0U}},
{LEA_41D0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41E8,{0U,0U,0U}},
{LEA_41E8,{1U,0U,0U}},
{LEA_41E8,{2U,0U,0U}},
{LEA_41E8,{3U,0U,0U}},
{LEA_41E8,{4U,0U,0U}},
{LEA_41E8,{5U,0U,0U}},
{LEA_41E8,{6U,0U,0U}},
{LEA_41E8,{7U,0U,0U}},
{LEA_41F0,{0U,0U,0U}},
{LEA_41F0,{1U,0U,0U}},
{LEA_41F0,{2U,0U,0U}},
{LEA_41F0,{3U,0U,0U}},
{LEA_41F0,{4U,0U,0U}},
{LEA_41F0,{5U,0U,0U}},
{LEA_41F0,{6U,0U,0U}},
{LEA_41F0,{7U,0U,0U}},
{LEA_41F8,{0U,0U,0U}},
{LEA_41F9,{0U,0U,0U}},
{LEA_41FA,{0U,0U,0U}},
{LEA_41FB,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CLR_4200,{0U,0U,0U}},
{CLR_4200,{1U,0U,0U}},
{CLR_4200,{2U,0U,0U}},
{CLR_4200,{3U,0U,0U}},
{CLR_4200,{4U,0U,0U}},
{CLR_4200,{5U,0U,0U}},
{CLR_4200,{6U,0U,0U}},
{CLR_4200,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CLR_4210,{0U,0U,0U}},
{CLR_4210,{1U,0U,0U}},
{CLR_4210,{2U,0U,0U}},
{CLR_4210,{3U,0U,0U}},
{CLR_4210,{4U,0U,0U}},
{CLR_4210,{5U,0U,0U}},
{CLR_4210,{6U,0U,0U}},
{CLR_4210,{7U,0U,0U}},
{CLR_4218,{0U,0U,0U}},
{CLR_4218,{1U,0U,0U}},
{CLR_4218,{2U,0U,0U}},
{CLR_4218,{3U,0U,0U}},
{CLR_4218,{4U,0U,0U}},
{CLR_4218,{5U,0U,0U}},
{CLR_4218,{6U,0U,0U}},
{CLR_4218,{7U,0U,0U}},
{CLR_4220,{0U,0U,0U}},
{CLR_4220,{1U,0U,0U}},
{CLR_4220,{2U,0U,0U}},
{CLR_4220,{3U,0U,0U}},
{CLR_4220,{4U,0U,0U}},
{CLR_4220,{5U,0U,0U}},
{CLR_4220,{6U,0U,0U}},
{CLR_4220,{7U,0U,0U}},
{CLR_4228,{0U,0U,0U}},
{CLR_4228,{1U,0U,0U}},
{CLR_4228,{2U,0U,0U}},
{CLR_4228,{3U,0U,0U}},
{CLR_4228,{4U,0U,0U}},
{CLR_4228,{5U,0U,0U}},
{CLR_4228,{6U,0U,0U}},
{CLR_4228,{7U,0U,0U}},
{CLR_4230,{0U,0U,0U}},
{CLR_4230,{1U,0U,0U}},
{CLR_4230,{2U,0U,0U}},
{CLR_4230,{3U,0U,0U}},
{CLR_4230,{4U,0U,0U}},
{CLR_4230,{5U,0U,0U}},
{CLR_4230,{6U,0U,0U}},
{CLR_4230,{7U,0U,0U}},
{CLR_4238,{0U,0U,0U}},
{CLR_4239,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CLR_4240,{0U,0U,0U}},
{CLR_4240,{1U,0U,0U}},
{CLR_4240,{2U,0U,0U}},
{CLR_4240,{3U,0U,0U}},
{CLR_4240,{4U,0U,0U}},
{CLR_4240,{5U,0U,0U}},
{CLR_4240,{6U,0U,0U}},
{CLR_4240,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CLR_4250,{0U,0U,0U}},
{CLR_4250,{1U,0U,0U}},
{CLR_4250,{2U,0U,0U}},
{CLR_4250,{3U,0U,0U}},
{CLR_4250,{4U,0U,0U}},
{CLR_4250,{5U,0U,0U}},
{CLR_4250,{6U,0U,0U}},
{CLR_4250,{7U,0U,0U}},
{CLR_4258,{0U,0U,0U}},
{CLR_4258,{1U,0U,0U}},
{CLR_4258,{2U,0U,0U}},
{CLR_4258,{3U,0U,0U}},
{CLR_4258,{4U,0U,0U}},
{CLR_4258,{5U,0U,0U}},
{CLR_4258,{6U,0U,0U}},
{CLR_4258,{7U,0U,0U}},
{CLR_4260,{0U,0U,0U}},
{CLR_4260,{1U,0U,0U}},
{CLR_4260,{2U,0U,0U}},
{CLR_4260,{3U,0U,0U}},
{CLR_4260,{4U,0U,0U}},
{CLR_4260,{5U,0U,0U}},
{CLR_4260,{6U,0U,0U}},
{CLR_4260,{7U,0U,0U}},
{CLR_4268,{0U,0U,0U}},
{CLR_4268,{1U,0U,0U}},
{CLR_4268,{2U,0U,0U}},
{CLR_4268,{3U,0U,0U}},
{CLR_4268,{4U,0U,0U}},
{CLR_4268,{5U,0U,0U}},
{CLR_4268,{6U,0U,0U}},
{CLR_4268,{7U,0U,0U}},
{CLR_4270,{0U,0U,0U}},
{CLR_4270,{1U,0U,0U}},
{CLR_4270,{2U,0U,0U}},
{CLR_4270,{3U,0U,0U}},
{CLR_4270,{4U,0U,0U}},
{CLR_4270,{5U,0U,0U}},
{CLR_4270,{6U,0U,0U}},
{CLR_4270,{7U,0U,0U}},
{CLR_4278,{0U,0U,0U}},
{CLR_4279,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CLR_4280,{0U,0U,0U}},
{CLR_4280,{1U,0U,0U}},
{CLR_4280,{2U,0U,0U}},
{CLR_4280,{3U,0U,0U}},
{CLR_4280,{4U,0U,0U}},
{CLR_4280,{5U,0U,0U}},
{CLR_4280,{6U,0U,0U}},
{CLR_4280,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CLR_4290,{0U,0U,0U}},
{CLR_4290,{1U,0U,0U}},
{CLR_4290,{2U,0U,0U}},
{CLR_4290,{3U,0U,0U}},
{CLR_4290,{4U,0U,0U}},
{CLR_4290,{5U,0U,0U}},
{CLR_4290,{6U,0U,0U}},
{CLR_4290,{7U,0U,0U}},
{CLR_4298,{0U,0U,0U}},
{CLR_4298,{1U,0U,0U}},
{CLR_4298,{2U,0U,0U}},
{CLR_4298,{3U,0U,0U}},
{CLR_4298,{4U,0U,0U}},
{CLR_4298,{5U,0U,0U}},
{CLR_4298,{6U,0U,0U}},
{CLR_4298,{7U,0U,0U}},
{CLR_42A0,{0U,0U,0U}},
{CLR_42A0,{1U,0U,0U}},
{CLR_42A0,{2U,0U,0U}},
{CLR_42A0,{3U,0U,0U}},
{CLR_42A0,{4U,0U,0U}},
{CLR_42A0,{5U,0U,0U}},
{CLR_42A0,{6U,0U,0U}},
{CLR_42A0,{7U,0U,0U}},
{CLR_42A8,{0U,0U,0U}},
{CLR_42A8,{1U,0U,0U}},
{CLR_42A8,{2U,0U,0U}},
{CLR_42A8,{3U,0U,0U}},
{CLR_42A8,{4U,0U,0U}},
{CLR_42A8,{5U,0U,0U}},
{CLR_42A8,{6U,0U,0U}},
{CLR_42A8,{7U,0U,0U}},
{CLR_42B0,{0U,0U,0U}},
{CLR_42B0,{1U,0U,0U}},
{CLR_42B0,{2U,0U,0U}},
{CLR_42B0,{3U,0U,0U}},
{CLR_42B0,{4U,0U,0U}},
{CLR_42B0,{5U,0U,0U}},
{CLR_42B0,{6U,0U,0U}},
{CLR_42B0,{7U,0U,0U}},
{CLR_42B8,{0U,0U,0U}},
{CLR_42B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEFROMCCR_42C0,{0U,0U,0U}},
{MOVEFROMCCR_42C0,{1U,0U,0U}},
{MOVEFROMCCR_42C0,{2U,0U,0U}},
{MOVEFROMCCR_42C0,{3U,0U,0U}},
{MOVEFROMCCR_42C0,{4U,0U,0U}},
{MOVEFROMCCR_42C0,{5U,0U,0U}},
{MOVEFROMCCR_42C0,{6U,0U,0U}},
{MOVEFROMCCR_42C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEFROMCCR_42D0,{0U,0U,0U}},
{MOVEFROMCCR_42D0,{1U,0U,0U}},
{MOVEFROMCCR_42D0,{2U,0U,0U}},
{MOVEFROMCCR_42D0,{3U,0U,0U}},
{MOVEFROMCCR_42D0,{4U,0U,0U}},
{MOVEFROMCCR_42D0,{5U,0U,0U}},
{MOVEFROMCCR_42D0,{6U,0U,0U}},
{MOVEFROMCCR_42D0,{7U,0U,0U}},
{MOVEFROMCCR_42D8,{0U,0U,0U}},
{MOVEFROMCCR_42D8,{1U,0U,0U}},
{MOVEFROMCCR_42D8,{2U,0U,0U}},
{MOVEFROMCCR_42D8,{3U,0U,0U}},
{MOVEFROMCCR_42D8,{4U,0U,0U}},
{MOVEFROMCCR_42D8,{5U,0U,0U}},
{MOVEFROMCCR_42D8,{6U,0U,0U}},
{MOVEFROMCCR_42D8,{7U,0U,0U}},
{MOVEFROMCCR_42E0,{0U,0U,0U}},
{MOVEFROMCCR_42E0,{1U,0U,0U}},
{MOVEFROMCCR_42E0,{2U,0U,0U}},
{MOVEFROMCCR_42E0,{3U,0U,0U}},
{MOVEFROMCCR_42E0,{4U,0U,0U}},
{MOVEFROMCCR_42E0,{5U,0U,0U}},
{MOVEFROMCCR_42E0,{6U,0U,0U}},
{MOVEFROMCCR_42E0,{7U,0U,0U}},
{MOVEFROMCCR_42E8,{0U,0U,0U}},
{MOVEFROMCCR_42E8,{1U,0U,0U}},
{MOVEFROMCCR_42E8,{2U,0U,0U}},
{MOVEFROMCCR_42E8,{3U,0U,0U}},
{MOVEFROMCCR_42E8,{4U,0U,0U}},
{MOVEFROMCCR_42E8,{5U,0U,0U}},
{MOVEFROMCCR_42E8,{6U,0U,0U}},
{MOVEFROMCCR_42E8,{7U,0U,0U}},
{MOVEFROMCCR_42F0,{0U,0U,0U}},
{MOVEFROMCCR_42F0,{1U,0U,0U}},
{MOVEFROMCCR_42F0,{2U,0U,0U}},
{MOVEFROMCCR_42F0,{3U,0U,0U}},
{MOVEFROMCCR_42F0,{4U,0U,0U}},
{MOVEFROMCCR_42F0,{5U,0U,0U}},
{MOVEFROMCCR_42F0,{6U,0U,0U}},
{MOVEFROMCCR_42F0,{7U,0U,0U}},
{MOVEFROMCCR_42F8,{0U,0U,0U}},
{MOVEFROMCCR_42F9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4100,{0U,1U,0U}},
{CHK_4100,{1U,1U,0U}},
{CHK_4100,{2U,1U,0U}},
{CHK_4100,{3U,1U,0U}},
{CHK_4100,{4U,1U,0U}},
{CHK_4100,{5U,1U,0U}},
{CHK_4100,{6U,1U,0U}},
{CHK_4100,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4110,{0U,1U,0U}},
{CHK_4110,{1U,1U,0U}},
{CHK_4110,{2U,1U,0U}},
{CHK_4110,{3U,1U,0U}},
{CHK_4110,{4U,1U,0U}},
{CHK_4110,{5U,1U,0U}},
{CHK_4110,{6U,1U,0U}},
{CHK_4110,{7U,1U,0U}},
{CHK_4118,{0U,1U,0U}},
{CHK_4118,{1U,1U,0U}},
{CHK_4118,{2U,1U,0U}},
{CHK_4118,{3U,1U,0U}},
{CHK_4118,{4U,1U,0U}},
{CHK_4118,{5U,1U,0U}},
{CHK_4118,{6U,1U,0U}},
{CHK_4118,{7U,1U,0U}},
{CHK_4120,{0U,1U,0U}},
{CHK_4120,{1U,1U,0U}},
{CHK_4120,{2U,1U,0U}},
{CHK_4120,{3U,1U,0U}},
{CHK_4120,{4U,1U,0U}},
{CHK_4120,{5U,1U,0U}},
{CHK_4120,{6U,1U,0U}},
{CHK_4120,{7U,1U,0U}},
{CHK_4128,{0U,1U,0U}},
{CHK_4128,{1U,1U,0U}},
{CHK_4128,{2U,1U,0U}},
{CHK_4128,{3U,1U,0U}},
{CHK_4128,{4U,1U,0U}},
{CHK_4128,{5U,1U,0U}},
{CHK_4128,{6U,1U,0U}},
{CHK_4128,{7U,1U,0U}},
{CHK_4130,{0U,1U,0U}},
{CHK_4130,{1U,1U,0U}},
{CHK_4130,{2U,1U,0U}},
{CHK_4130,{3U,1U,0U}},
{CHK_4130,{4U,1U,0U}},
{CHK_4130,{5U,1U,0U}},
{CHK_4130,{6U,1U,0U}},
{CHK_4130,{7U,1U,0U}},
{CHK_4138,{0U,1U,0U}},
{CHK_4139,{0U,1U,0U}},
{CHK_413A,{0U,1U,0U}},
{CHK_413B,{0U,1U,0U}},
{CHK_413C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4180,{0U,1U,0U}},
{CHK_4180,{1U,1U,0U}},
{CHK_4180,{2U,1U,0U}},
{CHK_4180,{3U,1U,0U}},
{CHK_4180,{4U,1U,0U}},
{CHK_4180,{5U,1U,0U}},
{CHK_4180,{6U,1U,0U}},
{CHK_4180,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4190,{0U,1U,0U}},
{CHK_4190,{1U,1U,0U}},
{CHK_4190,{2U,1U,0U}},
{CHK_4190,{3U,1U,0U}},
{CHK_4190,{4U,1U,0U}},
{CHK_4190,{5U,1U,0U}},
{CHK_4190,{6U,1U,0U}},
{CHK_4190,{7U,1U,0U}},
{CHK_4198,{0U,1U,0U}},
{CHK_4198,{1U,1U,0U}},
{CHK_4198,{2U,1U,0U}},
{CHK_4198,{3U,1U,0U}},
{CHK_4198,{4U,1U,0U}},
{CHK_4198,{5U,1U,0U}},
{CHK_4198,{6U,1U,0U}},
{CHK_4198,{7U,1U,0U}},
{CHK_41A0,{0U,1U,0U}},
{CHK_41A0,{1U,1U,0U}},
{CHK_41A0,{2U,1U,0U}},
{CHK_41A0,{3U,1U,0U}},
{CHK_41A0,{4U,1U,0U}},
{CHK_41A0,{5U,1U,0U}},
{CHK_41A0,{6U,1U,0U}},
{CHK_41A0,{7U,1U,0U}},
{CHK_41A8,{0U,1U,0U}},
{CHK_41A8,{1U,1U,0U}},
{CHK_41A8,{2U,1U,0U}},
{CHK_41A8,{3U,1U,0U}},
{CHK_41A8,{4U,1U,0U}},
{CHK_41A8,{5U,1U,0U}},
{CHK_41A8,{6U,1U,0U}},
{CHK_41A8,{7U,1U,0U}},
{CHK_41B0,{0U,1U,0U}},
{CHK_41B0,{1U,1U,0U}},
{CHK_41B0,{2U,1U,0U}},
{CHK_41B0,{3U,1U,0U}},
{CHK_41B0,{4U,1U,0U}},
{CHK_41B0,{5U,1U,0U}},
{CHK_41B0,{6U,1U,0U}},
{CHK_41B0,{7U,1U,0U}},
{CHK_41B8,{0U,1U,0U}},
{CHK_41B9,{0U,1U,0U}},
{CHK_41BA,{0U,1U,0U}},
{CHK_41BB,{0U,1U,0U}},
{CHK_41BC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41D0,{0U,1U,0U}},
{LEA_41D0,{1U,1U,0U}},
{LEA_41D0,{2U,1U,0U}},
{LEA_41D0,{3U,1U,0U}},
{LEA_41D0,{4U,1U,0U}},
{LEA_41D0,{5U,1U,0U}},
{LEA_41D0,{6U,1U,0U}},
{LEA_41D0,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41E8,{0U,1U,0U}},
{LEA_41E8,{1U,1U,0U}},
{LEA_41E8,{2U,1U,0U}},
{LEA_41E8,{3U,1U,0U}},
{LEA_41E8,{4U,1U,0U}},
{LEA_41E8,{5U,1U,0U}},
{LEA_41E8,{6U,1U,0U}},
{LEA_41E8,{7U,1U,0U}},
{LEA_41F0,{0U,1U,0U}},
{LEA_41F0,{1U,1U,0U}},
{LEA_41F0,{2U,1U,0U}},
{LEA_41F0,{3U,1U,0U}},
{LEA_41F0,{4U,1U,0U}},
{LEA_41F0,{5U,1U,0U}},
{LEA_41F0,{6U,1U,0U}},
{LEA_41F0,{7U,1U,0U}},
{LEA_41F8,{0U,1U,0U}},
{LEA_41F9,{0U,1U,0U}},
{LEA_41FA,{0U,1U,0U}},
{LEA_41FB,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NEG_4400,{0U,0U,0U}},
{NEG_4400,{1U,0U,0U}},
{NEG_4400,{2U,0U,0U}},
{NEG_4400,{3U,0U,0U}},
{NEG_4400,{4U,0U,0U}},
{NEG_4400,{5U,0U,0U}},
{NEG_4400,{6U,0U,0U}},
{NEG_4400,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NEG_4410,{0U,0U,0U}},
{NEG_4410,{1U,0U,0U}},
{NEG_4410,{2U,0U,0U}},
{NEG_4410,{3U,0U,0U}},
{NEG_4410,{4U,0U,0U}},
{NEG_4410,{5U,0U,0U}},
{NEG_4410,{6U,0U,0U}},
{NEG_4410,{7U,0U,0U}},
{NEG_4418,{0U,0U,0U}},
{NEG_4418,{1U,0U,0U}},
{NEG_4418,{2U,0U,0U}},
{NEG_4418,{3U,0U,0U}},
{NEG_4418,{4U,0U,0U}},
{NEG_4418,{5U,0U,0U}},
{NEG_4418,{6U,0U,0U}},
{NEG_4418,{7U,0U,0U}},
{NEG_4420,{0U,0U,0U}},
{NEG_4420,{1U,0U,0U}},
{NEG_4420,{2U,0U,0U}},
{NEG_4420,{3U,0U,0U}},
{NEG_4420,{4U,0U,0U}},
{NEG_4420,{5U,0U,0U}},
{NEG_4420,{6U,0U,0U}},
{NEG_4420,{7U,0U,0U}},
{NEG_4428,{0U,0U,0U}},
{NEG_4428,{1U,0U,0U}},
{NEG_4428,{2U,0U,0U}},
{NEG_4428,{3U,0U,0U}},
{NEG_4428,{4U,0U,0U}},
{NEG_4428,{5U,0U,0U}},
{NEG_4428,{6U,0U,0U}},
{NEG_4428,{7U,0U,0U}},
{NEG_4430,{0U,0U,0U}},
{NEG_4430,{1U,0U,0U}},
{NEG_4430,{2U,0U,0U}},
{NEG_4430,{3U,0U,0U}},
{NEG_4430,{4U,0U,0U}},
{NEG_4430,{5U,0U,0U}},
{NEG_4430,{6U,0U,0U}},
{NEG_4430,{7U,0U,0U}},
{NEG_4438,{0U,0U,0U}},
{NEG_4439,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NEG_4440,{0U,0U,0U}},
{NEG_4440,{1U,0U,0U}},
{NEG_4440,{2U,0U,0U}},
{NEG_4440,{3U,0U,0U}},
{NEG_4440,{4U,0U,0U}},
{NEG_4440,{5U,0U,0U}},
{NEG_4440,{6U,0U,0U}},
{NEG_4440,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NEG_4450,{0U,0U,0U}},
{NEG_4450,{1U,0U,0U}},
{NEG_4450,{2U,0U,0U}},
{NEG_4450,{3U,0U,0U}},
{NEG_4450,{4U,0U,0U}},
{NEG_4450,{5U,0U,0U}},
{NEG_4450,{6U,0U,0U}},
{NEG_4450,{7U,0U,0U}},
{NEG_4458,{0U,0U,0U}},
{NEG_4458,{1U,0U,0U}},
{NEG_4458,{2U,0U,0U}},
{NEG_4458,{3U,0U,0U}},
{NEG_4458,{4U,0U,0U}},
{NEG_4458,{5U,0U,0U}},
{NEG_4458,{6U,0U,0U}},
{NEG_4458,{7U,0U,0U}},
{NEG_4460,{0U,0U,0U}},
{NEG_4460,{1U,0U,0U}},
{NEG_4460,{2U,0U,0U}},
{NEG_4460,{3U,0U,0U}},
{NEG_4460,{4U,0U,0U}},
{NEG_4460,{5U,0U,0U}},
{NEG_4460,{6U,0U,0U}},
{NEG_4460,{7U,0U,0U}},
{NEG_4468,{0U,0U,0U}},
{NEG_4468,{1U,0U,0U}},
{NEG_4468,{2U,0U,0U}},
{NEG_4468,{3U,0U,0U}},
{NEG_4468,{4U,0U,0U}},
{NEG_4468,{5U,0U,0U}},
{NEG_4468,{6U,0U,0U}},
{NEG_4468,{7U,0U,0U}},
{NEG_4470,{0U,0U,0U}},
{NEG_4470,{1U,0U,0U}},
{NEG_4470,{2U,0U,0U}},
{NEG_4470,{3U,0U,0U}},
{NEG_4470,{4U,0U,0U}},
{NEG_4470,{5U,0U,0U}},
{NEG_4470,{6U,0U,0U}},
{NEG_4470,{7U,0U,0U}},
{NEG_4478,{0U,0U,0U}},
{NEG_4479,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NEG_4480,{0U,0U,0U}},
{NEG_4480,{1U,0U,0U}},
{NEG_4480,{2U,0U,0U}},
{NEG_4480,{3U,0U,0U}},
{NEG_4480,{4U,0U,0U}},
{NEG_4480,{5U,0U,0U}},
{NEG_4480,{6U,0U,0U}},
{NEG_4480,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NEG_4490,{0U,0U,0U}},
{NEG_4490,{1U,0U,0U}},
{NEG_4490,{2U,0U,0U}},
{NEG_4490,{3U,0U,0U}},
{NEG_4490,{4U,0U,0U}},
{NEG_4490,{5U,0U,0U}},
{NEG_4490,{6U,0U,0U}},
{NEG_4490,{7U,0U,0U}},
{NEG_4498,{0U,0U,0U}},
{NEG_4498,{1U,0U,0U}},
{NEG_4498,{2U,0U,0U}},
{NEG_4498,{3U,0U,0U}},
{NEG_4498,{4U,0U,0U}},
{NEG_4498,{5U,0U,0U}},
{NEG_4498,{6U,0U,0U}},
{NEG_4498,{7U,0U,0U}},
{NEG_44A0,{0U,0U,0U}},
{NEG_44A0,{1U,0U,0U}},
{NEG_44A0,{2U,0U,0U}},
{NEG_44A0,{3U,0U,0U}},
{NEG_44A0,{4U,0U,0U}},
{NEG_44A0,{5U,0U,0U}},
{NEG_44A0,{6U,0U,0U}},
{NEG_44A0,{7U,0U,0U}},
{NEG_44A8,{0U,0U,0U}},
{NEG_44A8,{1U,0U,0U}},
{NEG_44A8,{2U,0U,0U}},
{NEG_44A8,{3U,0U,0U}},
{NEG_44A8,{4U,0U,0U}},
{NEG_44A8,{5U,0U,0U}},
{NEG_44A8,{6U,0U,0U}},
{NEG_44A8,{7U,0U,0U}},
{NEG_44B0,{0U,0U,0U}},
{NEG_44B0,{1U,0U,0U}},
{NEG_44B0,{2U,0U,0U}},
{NEG_44B0,{3U,0U,0U}},
{NEG_44B0,{4U,0U,0U}},
{NEG_44B0,{5U,0U,0U}},
{NEG_44B0,{6U,0U,0U}},
{NEG_44B0,{7U,0U,0U}},
{NEG_44B8,{0U,0U,0U}},
{NEG_44B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVETOCCR_44C0,{0U,0U,0U}},
{MOVETOCCR_44C0,{1U,0U,0U}},
{MOVETOCCR_44C0,{2U,0U,0U}},
{MOVETOCCR_44C0,{3U,0U,0U}},
{MOVETOCCR_44C0,{4U,0U,0U}},
{MOVETOCCR_44C0,{5U,0U,0U}},
{MOVETOCCR_44C0,{6U,0U,0U}},
{MOVETOCCR_44C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVETOCCR_44D0,{0U,0U,0U}},
{MOVETOCCR_44D0,{1U,0U,0U}},
{MOVETOCCR_44D0,{2U,0U,0U}},
{MOVETOCCR_44D0,{3U,0U,0U}},
{MOVETOCCR_44D0,{4U,0U,0U}},
{MOVETOCCR_44D0,{5U,0U,0U}},
{MOVETOCCR_44D0,{6U,0U,0U}},
{MOVETOCCR_44D0,{7U,0U,0U}},
{MOVETOCCR_44D8,{0U,0U,0U}},
{MOVETOCCR_44D8,{1U,0U,0U}},
{MOVETOCCR_44D8,{2U,0U,0U}},
{MOVETOCCR_44D8,{3U,0U,0U}},
{MOVETOCCR_44D8,{4U,0U,0U}},
{MOVETOCCR_44D8,{5U,0U,0U}},
{MOVETOCCR_44D8,{6U,0U,0U}},
{MOVETOCCR_44D8,{7U,0U,0U}},
{MOVETOCCR_44E0,{0U,0U,0U}},
{MOVETOCCR_44E0,{1U,0U,0U}},
{MOVETOCCR_44E0,{2U,0U,0U}},
{MOVETOCCR_44E0,{3U,0U,0U}},
{MOVETOCCR_44E0,{4U,0U,0U}},
{MOVETOCCR_44E0,{5U,0U,0U}},
{MOVETOCCR_44E0,{6U,0U,0U}},
{MOVETOCCR_44E0,{7U,0U,0U}},
{MOVETOCCR_44E8,{0U,0U,0U}},
{MOVETOCCR_44E8,{1U,0U,0U}},
{MOVETOCCR_44E8,{2U,0U,0U}},
{MOVETOCCR_44E8,{3U,0U,0U}},
{MOVETOCCR_44E8,{4U,0U,0U}},
{MOVETOCCR_44E8,{5U,0U,0U}},
{MOVETOCCR_44E8,{6U,0U,0U}},
{MOVETOCCR_44E8,{7U,0U,0U}},
{MOVETOCCR_44F0,{0U,0U,0U}},
{MOVETOCCR_44F0,{1U,0U,0U}},
{MOVETOCCR_44F0,{2U,0U,0U}},
{MOVETOCCR_44F0,{3U,0U,0U}},
{MOVETOCCR_44F0,{4U,0U,0U}},
{MOVETOCCR_44F0,{5U,0U,0U}},
{MOVETOCCR_44F0,{6U,0U,0U}},
{MOVETOCCR_44F0,{7U,0U,0U}},
{MOVETOCCR_44F8,{0U,0U,0U}},
{MOVETOCCR_44F9,{0U,0U,0U}},
{MOVETOCCR_44FA,{0U,0U,0U}},
{MOVETOCCR_44FB,{0U,0U,0U}},
{MOVETOCCR_44FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4100,{0U,2U,0U}},
{CHK_4100,{1U,2U,0U}},
{CHK_4100,{2U,2U,0U}},
{CHK_4100,{3U,2U,0U}},
{CHK_4100,{4U,2U,0U}},
{CHK_4100,{5U,2U,0U}},
{CHK_4100,{6U,2U,0U}},
{CHK_4100,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4110,{0U,2U,0U}},
{CHK_4110,{1U,2U,0U}},
{CHK_4110,{2U,2U,0U}},
{CHK_4110,{3U,2U,0U}},
{CHK_4110,{4U,2U,0U}},
{CHK_4110,{5U,2U,0U}},
{CHK_4110,{6U,2U,0U}},
{CHK_4110,{7U,2U,0U}},
{CHK_4118,{0U,2U,0U}},
{CHK_4118,{1U,2U,0U}},
{CHK_4118,{2U,2U,0U}},
{CHK_4118,{3U,2U,0U}},
{CHK_4118,{4U,2U,0U}},
{CHK_4118,{5U,2U,0U}},
{CHK_4118,{6U,2U,0U}},
{CHK_4118,{7U,2U,0U}},
{CHK_4120,{0U,2U,0U}},
{CHK_4120,{1U,2U,0U}},
{CHK_4120,{2U,2U,0U}},
{CHK_4120,{3U,2U,0U}},
{CHK_4120,{4U,2U,0U}},
{CHK_4120,{5U,2U,0U}},
{CHK_4120,{6U,2U,0U}},
{CHK_4120,{7U,2U,0U}},
{CHK_4128,{0U,2U,0U}},
{CHK_4128,{1U,2U,0U}},
{CHK_4128,{2U,2U,0U}},
{CHK_4128,{3U,2U,0U}},
{CHK_4128,{4U,2U,0U}},
{CHK_4128,{5U,2U,0U}},
{CHK_4128,{6U,2U,0U}},
{CHK_4128,{7U,2U,0U}},
{CHK_4130,{0U,2U,0U}},
{CHK_4130,{1U,2U,0U}},
{CHK_4130,{2U,2U,0U}},
{CHK_4130,{3U,2U,0U}},
{CHK_4130,{4U,2U,0U}},
{CHK_4130,{5U,2U,0U}},
{CHK_4130,{6U,2U,0U}},
{CHK_4130,{7U,2U,0U}},
{CHK_4138,{0U,2U,0U}},
{CHK_4139,{0U,2U,0U}},
{CHK_413A,{0U,2U,0U}},
{CHK_413B,{0U,2U,0U}},
{CHK_413C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4180,{0U,2U,0U}},
{CHK_4180,{1U,2U,0U}},
{CHK_4180,{2U,2U,0U}},
{CHK_4180,{3U,2U,0U}},
{CHK_4180,{4U,2U,0U}},
{CHK_4180,{5U,2U,0U}},
{CHK_4180,{6U,2U,0U}},
{CHK_4180,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4190,{0U,2U,0U}},
{CHK_4190,{1U,2U,0U}},
{CHK_4190,{2U,2U,0U}},
{CHK_4190,{3U,2U,0U}},
{CHK_4190,{4U,2U,0U}},
{CHK_4190,{5U,2U,0U}},
{CHK_4190,{6U,2U,0U}},
{CHK_4190,{7U,2U,0U}},
{CHK_4198,{0U,2U,0U}},
{CHK_4198,{1U,2U,0U}},
{CHK_4198,{2U,2U,0U}},
{CHK_4198,{3U,2U,0U}},
{CHK_4198,{4U,2U,0U}},
{CHK_4198,{5U,2U,0U}},
{CHK_4198,{6U,2U,0U}},
{CHK_4198,{7U,2U,0U}},
{CHK_41A0,{0U,2U,0U}},
{CHK_41A0,{1U,2U,0U}},
{CHK_41A0,{2U,2U,0U}},
{CHK_41A0,{3U,2U,0U}},
{CHK_41A0,{4U,2U,0U}},
{CHK_41A0,{5U,2U,0U}},
{CHK_41A0,{6U,2U,0U}},
{CHK_41A0,{7U,2U,0U}},
{CHK_41A8,{0U,2U,0U}},
{CHK_41A8,{1U,2U,0U}},
{CHK_41A8,{2U,2U,0U}},
{CHK_41A8,{3U,2U,0U}},
{CHK_41A8,{4U,2U,0U}},
{CHK_41A8,{5U,2U,0U}},
{CHK_41A8,{6U,2U,0U}},
{CHK_41A8,{7U,2U,0U}},
{CHK_41B0,{0U,2U,0U}},
{CHK_41B0,{1U,2U,0U}},
{CHK_41B0,{2U,2U,0U}},
{CHK_41B0,{3U,2U,0U}},
{CHK_41B0,{4U,2U,0U}},
{CHK_41B0,{5U,2U,0U}},
{CHK_41B0,{6U,2U,0U}},
{CHK_41B0,{7U,2U,0U}},
{CHK_41B8,{0U,2U,0U}},
{CHK_41B9,{0U,2U,0U}},
{CHK_41BA,{0U,2U,0U}},
{CHK_41BB,{0U,2U,0U}},
{CHK_41BC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41D0,{0U,2U,0U}},
{LEA_41D0,{1U,2U,0U}},
{LEA_41D0,{2U,2U,0U}},
{LEA_41D0,{3U,2U,0U}},
{LEA_41D0,{4U,2U,0U}},
{LEA_41D0,{5U,2U,0U}},
{LEA_41D0,{6U,2U,0U}},
{LEA_41D0,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41E8,{0U,2U,0U}},
{LEA_41E8,{1U,2U,0U}},
{LEA_41E8,{2U,2U,0U}},
{LEA_41E8,{3U,2U,0U}},
{LEA_41E8,{4U,2U,0U}},
{LEA_41E8,{5U,2U,0U}},
{LEA_41E8,{6U,2U,0U}},
{LEA_41E8,{7U,2U,0U}},
{LEA_41F0,{0U,2U,0U}},
{LEA_41F0,{1U,2U,0U}},
{LEA_41F0,{2U,2U,0U}},
{LEA_41F0,{3U,2U,0U}},
{LEA_41F0,{4U,2U,0U}},
{LEA_41F0,{5U,2U,0U}},
{LEA_41F0,{6U,2U,0U}},
{LEA_41F0,{7U,2U,0U}},
{LEA_41F8,{0U,2U,0U}},
{LEA_41F9,{0U,2U,0U}},
{LEA_41FA,{0U,2U,0U}},
{LEA_41FB,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NOT_4600,{0U,0U,0U}},
{NOT_4600,{1U,0U,0U}},
{NOT_4600,{2U,0U,0U}},
{NOT_4600,{3U,0U,0U}},
{NOT_4600,{4U,0U,0U}},
{NOT_4600,{5U,0U,0U}},
{NOT_4600,{6U,0U,0U}},
{NOT_4600,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NOT_4610,{0U,0U,0U}},
{NOT_4610,{1U,0U,0U}},
{NOT_4610,{2U,0U,0U}},
{NOT_4610,{3U,0U,0U}},
{NOT_4610,{4U,0U,0U}},
{NOT_4610,{5U,0U,0U}},
{NOT_4610,{6U,0U,0U}},
{NOT_4610,{7U,0U,0U}},
{NOT_4618,{0U,0U,0U}},
{NOT_4618,{1U,0U,0U}},
{NOT_4618,{2U,0U,0U}},
{NOT_4618,{3U,0U,0U}},
{NOT_4618,{4U,0U,0U}},
{NOT_4618,{5U,0U,0U}},
{NOT_4618,{6U,0U,0U}},
{NOT_4618,{7U,0U,0U}},
{NOT_4620,{0U,0U,0U}},
{NOT_4620,{1U,0U,0U}},
{NOT_4620,{2U,0U,0U}},
{NOT_4620,{3U,0U,0U}},
{NOT_4620,{4U,0U,0U}},
{NOT_4620,{5U,0U,0U}},
{NOT_4620,{6U,0U,0U}},
{NOT_4620,{7U,0U,0U}},
{NOT_4628,{0U,0U,0U}},
{NOT_4628,{1U,0U,0U}},
{NOT_4628,{2U,0U,0U}},
{NOT_4628,{3U,0U,0U}},
{NOT_4628,{4U,0U,0U}},
{NOT_4628,{5U,0U,0U}},
{NOT_4628,{6U,0U,0U}},
{NOT_4628,{7U,0U,0U}},
{NOT_4630,{0U,0U,0U}},
{NOT_4630,{1U,0U,0U}},
{NOT_4630,{2U,0U,0U}},
{NOT_4630,{3U,0U,0U}},
{NOT_4630,{4U,0U,0U}},
{NOT_4630,{5U,0U,0U}},
{NOT_4630,{6U,0U,0U}},
{NOT_4630,{7U,0U,0U}},
{NOT_4638,{0U,0U,0U}},
{NOT_4639,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NOT_4640,{0U,0U,0U}},
{NOT_4640,{1U,0U,0U}},
{NOT_4640,{2U,0U,0U}},
{NOT_4640,{3U,0U,0U}},
{NOT_4640,{4U,0U,0U}},
{NOT_4640,{5U,0U,0U}},
{NOT_4640,{6U,0U,0U}},
{NOT_4640,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NOT_4650,{0U,0U,0U}},
{NOT_4650,{1U,0U,0U}},
{NOT_4650,{2U,0U,0U}},
{NOT_4650,{3U,0U,0U}},
{NOT_4650,{4U,0U,0U}},
{NOT_4650,{5U,0U,0U}},
{NOT_4650,{6U,0U,0U}},
{NOT_4650,{7U,0U,0U}},
{NOT_4658,{0U,0U,0U}},
{NOT_4658,{1U,0U,0U}},
{NOT_4658,{2U,0U,0U}},
{NOT_4658,{3U,0U,0U}},
{NOT_4658,{4U,0U,0U}},
{NOT_4658,{5U,0U,0U}},
{NOT_4658,{6U,0U,0U}},
{NOT_4658,{7U,0U,0U}},
{NOT_4660,{0U,0U,0U}},
{NOT_4660,{1U,0U,0U}},
{NOT_4660,{2U,0U,0U}},
{NOT_4660,{3U,0U,0U}},
{NOT_4660,{4U,0U,0U}},
{NOT_4660,{5U,0U,0U}},
{NOT_4660,{6U,0U,0U}},
{NOT_4660,{7U,0U,0U}},
{NOT_4668,{0U,0U,0U}},
{NOT_4668,{1U,0U,0U}},
{NOT_4668,{2U,0U,0U}},
{NOT_4668,{3U,0U,0U}},
{NOT_4668,{4U,0U,0U}},
{NOT_4668,{5U,0U,0U}},
{NOT_4668,{6U,0U,0U}},
{NOT_4668,{7U,0U,0U}},
{NOT_4670,{0U,0U,0U}},
{NOT_4670,{1U,0U,0U}},
{NOT_4670,{2U,0U,0U}},
{NOT_4670,{3U,0U,0U}},
{NOT_4670,{4U,0U,0U}},
{NOT_4670,{5U,0U,0U}},
{NOT_4670,{6U,0U,0U}},
{NOT_4670,{7U,0U,0U}},
{NOT_4678,{0U,0U,0U}},
{NOT_4679,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NOT_4680,{0U,0U,0U}},
{NOT_4680,{1U,0U,0U}},
{NOT_4680,{2U,0U,0U}},
{NOT_4680,{3U,0U,0U}},
{NOT_4680,{4U,0U,0U}},
{NOT_4680,{5U,0U,0U}},
{NOT_4680,{6U,0U,0U}},
{NOT_4680,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NOT_4690,{0U,0U,0U}},
{NOT_4690,{1U,0U,0U}},
{NOT_4690,{2U,0U,0U}},
{NOT_4690,{3U,0U,0U}},
{NOT_4690,{4U,0U,0U}},
{NOT_4690,{5U,0U,0U}},
{NOT_4690,{6U,0U,0U}},
{NOT_4690,{7U,0U,0U}},
{NOT_4698,{0U,0U,0U}},
{NOT_4698,{1U,0U,0U}},
{NOT_4698,{2U,0U,0U}},
{NOT_4698,{3U,0U,0U}},
{NOT_4698,{4U,0U,0U}},
{NOT_4698,{5U,0U,0U}},
{NOT_4698,{6U,0U,0U}},
{NOT_4698,{7U,0U,0U}},
{NOT_46A0,{0U,0U,0U}},
{NOT_46A0,{1U,0U,0U}},
{NOT_46A0,{2U,0U,0U}},
{NOT_46A0,{3U,0U,0U}},
{NOT_46A0,{4U,0U,0U}},
{NOT_46A0,{5U,0U,0U}},
{NOT_46A0,{6U,0U,0U}},
{NOT_46A0,{7U,0U,0U}},
{NOT_46A8,{0U,0U,0U}},
{NOT_46A8,{1U,0U,0U}},
{NOT_46A8,{2U,0U,0U}},
{NOT_46A8,{3U,0U,0U}},
{NOT_46A8,{4U,0U,0U}},
{NOT_46A8,{5U,0U,0U}},
{NOT_46A8,{6U,0U,0U}},
{NOT_46A8,{7U,0U,0U}},
{NOT_46B0,{0U,0U,0U}},
{NOT_46B0,{1U,0U,0U}},
{NOT_46B0,{2U,0U,0U}},
{NOT_46B0,{3U,0U,0U}},
{NOT_46B0,{4U,0U,0U}},
{NOT_46B0,{5U,0U,0U}},
{NOT_46B0,{6U,0U,0U}},
{NOT_46B0,{7U,0U,0U}},
{NOT_46B8,{0U,0U,0U}},
{NOT_46B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVETOSR_46C0,{0U,0U,0U}},
{MOVETOSR_46C0,{1U,0U,0U}},
{MOVETOSR_46C0,{2U,0U,0U}},
{MOVETOSR_46C0,{3U,0U,0U}},
{MOVETOSR_46C0,{4U,0U,0U}},
{MOVETOSR_46C0,{5U,0U,0U}},
{MOVETOSR_46C0,{6U,0U,0U}},
{MOVETOSR_46C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVETOSR_46D0,{0U,0U,0U}},
{MOVETOSR_46D0,{1U,0U,0U}},
{MOVETOSR_46D0,{2U,0U,0U}},
{MOVETOSR_46D0,{3U,0U,0U}},
{MOVETOSR_46D0,{4U,0U,0U}},
{MOVETOSR_46D0,{5U,0U,0U}},
{MOVETOSR_46D0,{6U,0U,0U}},
{MOVETOSR_46D0,{7U,0U,0U}},
{MOVETOSR_46D8,{0U,0U,0U}},
{MOVETOSR_46D8,{1U,0U,0U}},
{MOVETOSR_46D8,{2U,0U,0U}},
{MOVETOSR_46D8,{3U,0U,0U}},
{MOVETOSR_46D8,{4U,0U,0U}},
{MOVETOSR_46D8,{5U,0U,0U}},
{MOVETOSR_46D8,{6U,0U,0U}},
{MOVETOSR_46D8,{7U,0U,0U}},
{MOVETOSR_46E0,{0U,0U,0U}},
{MOVETOSR_46E0,{1U,0U,0U}},
{MOVETOSR_46E0,{2U,0U,0U}},
{MOVETOSR_46E0,{3U,0U,0U}},
{MOVETOSR_46E0,{4U,0U,0U}},
{MOVETOSR_46E0,{5U,0U,0U}},
{MOVETOSR_46E0,{6U,0U,0U}},
{MOVETOSR_46E0,{7U,0U,0U}},
{MOVETOSR_46E8,{0U,0U,0U}},
{MOVETOSR_46E8,{1U,0U,0U}},
{MOVETOSR_46E8,{2U,0U,0U}},
{MOVETOSR_46E8,{3U,0U,0U}},
{MOVETOSR_46E8,{4U,0U,0U}},
{MOVETOSR_46E8,{5U,0U,0U}},
{MOVETOSR_46E8,{6U,0U,0U}},
{MOVETOSR_46E8,{7U,0U,0U}},
{MOVETOSR_46F0,{0U,0U,0U}},
{MOVETOSR_46F0,{1U,0U,0U}},
{MOVETOSR_46F0,{2U,0U,0U}},
{MOVETOSR_46F0,{3U,0U,0U}},
{MOVETOSR_46F0,{4U,0U,0U}},
{MOVETOSR_46F0,{5U,0U,0U}},
{MOVETOSR_46F0,{6U,0U,0U}},
{MOVETOSR_46F0,{7U,0U,0U}},
{MOVETOSR_46F8,{0U,0U,0U}},
{MOVETOSR_46F9,{0U,0U,0U}},
{MOVETOSR_46FA,{0U,0U,0U}},
{MOVETOSR_46FB,{0U,0U,0U}},
{MOVETOSR_46FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4100,{0U,3U,0U}},
{CHK_4100,{1U,3U,0U}},
{CHK_4100,{2U,3U,0U}},
{CHK_4100,{3U,3U,0U}},
{CHK_4100,{4U,3U,0U}},
{CHK_4100,{5U,3U,0U}},
{CHK_4100,{6U,3U,0U}},
{CHK_4100,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4110,{0U,3U,0U}},
{CHK_4110,{1U,3U,0U}},
{CHK_4110,{2U,3U,0U}},
{CHK_4110,{3U,3U,0U}},
{CHK_4110,{4U,3U,0U}},
{CHK_4110,{5U,3U,0U}},
{CHK_4110,{6U,3U,0U}},
{CHK_4110,{7U,3U,0U}},
{CHK_4118,{0U,3U,0U}},
{CHK_4118,{1U,3U,0U}},
{CHK_4118,{2U,3U,0U}},
{CHK_4118,{3U,3U,0U}},
{CHK_4118,{4U,3U,0U}},
{CHK_4118,{5U,3U,0U}},
{CHK_4118,{6U,3U,0U}},
{CHK_4118,{7U,3U,0U}},
{CHK_4120,{0U,3U,0U}},
{CHK_4120,{1U,3U,0U}},
{CHK_4120,{2U,3U,0U}},
{CHK_4120,{3U,3U,0U}},
{CHK_4120,{4U,3U,0U}},
{CHK_4120,{5U,3U,0U}},
{CHK_4120,{6U,3U,0U}},
{CHK_4120,{7U,3U,0U}},
{CHK_4128,{0U,3U,0U}},
{CHK_4128,{1U,3U,0U}},
{CHK_4128,{2U,3U,0U}},
{CHK_4128,{3U,3U,0U}},
{CHK_4128,{4U,3U,0U}},
{CHK_4128,{5U,3U,0U}},
{CHK_4128,{6U,3U,0U}},
{CHK_4128,{7U,3U,0U}},
{CHK_4130,{0U,3U,0U}},
{CHK_4130,{1U,3U,0U}},
{CHK_4130,{2U,3U,0U}},
{CHK_4130,{3U,3U,0U}},
{CHK_4130,{4U,3U,0U}},
{CHK_4130,{5U,3U,0U}},
{CHK_4130,{6U,3U,0U}},
{CHK_4130,{7U,3U,0U}},
{CHK_4138,{0U,3U,0U}},
{CHK_4139,{0U,3U,0U}},
{CHK_413A,{0U,3U,0U}},
{CHK_413B,{0U,3U,0U}},
{CHK_413C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4180,{0U,3U,0U}},
{CHK_4180,{1U,3U,0U}},
{CHK_4180,{2U,3U,0U}},
{CHK_4180,{3U,3U,0U}},
{CHK_4180,{4U,3U,0U}},
{CHK_4180,{5U,3U,0U}},
{CHK_4180,{6U,3U,0U}},
{CHK_4180,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4190,{0U,3U,0U}},
{CHK_4190,{1U,3U,0U}},
{CHK_4190,{2U,3U,0U}},
{CHK_4190,{3U,3U,0U}},
{CHK_4190,{4U,3U,0U}},
{CHK_4190,{5U,3U,0U}},
{CHK_4190,{6U,3U,0U}},
{CHK_4190,{7U,3U,0U}},
{CHK_4198,{0U,3U,0U}},
{CHK_4198,{1U,3U,0U}},
{CHK_4198,{2U,3U,0U}},
{CHK_4198,{3U,3U,0U}},
{CHK_4198,{4U,3U,0U}},
{CHK_4198,{5U,3U,0U}},
{CHK_4198,{6U,3U,0U}},
{CHK_4198,{7U,3U,0U}},
{CHK_41A0,{0U,3U,0U}},
{CHK_41A0,{1U,3U,0U}},
{CHK_41A0,{2U,3U,0U}},
{CHK_41A0,{3U,3U,0U}},
{CHK_41A0,{4U,3U,0U}},
{CHK_41A0,{5U,3U,0U}},
{CHK_41A0,{6U,3U,0U}},
{CHK_41A0,{7U,3U,0U}},
{CHK_41A8,{0U,3U,0U}},
{CHK_41A8,{1U,3U,0U}},
{CHK_41A8,{2U,3U,0U}},
{CHK_41A8,{3U,3U,0U}},
{CHK_41A8,{4U,3U,0U}},
{CHK_41A8,{5U,3U,0U}},
{CHK_41A8,{6U,3U,0U}},
{CHK_41A8,{7U,3U,0U}},
{CHK_41B0,{0U,3U,0U}},
{CHK_41B0,{1U,3U,0U}},
{CHK_41B0,{2U,3U,0U}},
{CHK_41B0,{3U,3U,0U}},
{CHK_41B0,{4U,3U,0U}},
{CHK_41B0,{5U,3U,0U}},
{CHK_41B0,{6U,3U,0U}},
{CHK_41B0,{7U,3U,0U}},
{CHK_41B8,{0U,3U,0U}},
{CHK_41B9,{0U,3U,0U}},
{CHK_41BA,{0U,3U,0U}},
{CHK_41BB,{0U,3U,0U}},
{CHK_41BC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41D0,{0U,3U,0U}},
{LEA_41D0,{1U,3U,0U}},
{LEA_41D0,{2U,3U,0U}},
{LEA_41D0,{3U,3U,0U}},
{LEA_41D0,{4U,3U,0U}},
{LEA_41D0,{5U,3U,0U}},
{LEA_41D0,{6U,3U,0U}},
{LEA_41D0,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41E8,{0U,3U,0U}},
{LEA_41E8,{1U,3U,0U}},
{LEA_41E8,{2U,3U,0U}},
{LEA_41E8,{3U,3U,0U}},
{LEA_41E8,{4U,3U,0U}},
{LEA_41E8,{5U,3U,0U}},
{LEA_41E8,{6U,3U,0U}},
{LEA_41E8,{7U,3U,0U}},
{LEA_41F0,{0U,3U,0U}},
{LEA_41F0,{1U,3U,0U}},
{LEA_41F0,{2U,3U,0U}},
{LEA_41F0,{3U,3U,0U}},
{LEA_41F0,{4U,3U,0U}},
{LEA_41F0,{5U,3U,0U}},
{LEA_41F0,{6U,3U,0U}},
{LEA_41F0,{7U,3U,0U}},
{LEA_41F8,{0U,3U,0U}},
{LEA_41F9,{0U,3U,0U}},
{LEA_41FA,{0U,3U,0U}},
{LEA_41FB,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{NBCD_4800,{0U,0U,0U}},
{NBCD_4800,{1U,0U,0U}},
{NBCD_4800,{2U,0U,0U}},
{NBCD_4800,{3U,0U,0U}},
{NBCD_4800,{4U,0U,0U}},
{NBCD_4800,{5U,0U,0U}},
{NBCD_4800,{6U,0U,0U}},
{NBCD_4800,{7U,0U,0U}},
{LINK_4808,{0U,0U,0U}},
{LINK_4808,{1U,0U,0U}},
{LINK_4808,{2U,0U,0U}},
{LINK_4808,{3U,0U,0U}},
{LINK_4808,{4U,0U,0U}},
{LINK_4808,{5U,0U,0U}},
{LINK_4808,{6U,0U,0U}},
{LINK_4808,{7U,0U,0U}},
{NBCD_4810,{0U,0U,0U}},
{NBCD_4810,{1U,0U,0U}},
{NBCD_4810,{2U,0U,0U}},
{NBCD_4810,{3U,0U,0U}},
{NBCD_4810,{4U,0U,0U}},
{NBCD_4810,{5U,0U,0U}},
{NBCD_4810,{6U,0U,0U}},
{NBCD_4810,{7U,0U,0U}},
{NBCD_4818,{0U,0U,0U}},
{NBCD_4818,{1U,0U,0U}},
{NBCD_4818,{2U,0U,0U}},
{NBCD_4818,{3U,0U,0U}},
{NBCD_4818,{4U,0U,0U}},
{NBCD_4818,{5U,0U,0U}},
{NBCD_4818,{6U,0U,0U}},
{NBCD_4818,{7U,0U,0U}},
{NBCD_4820,{0U,0U,0U}},
{NBCD_4820,{1U,0U,0U}},
{NBCD_4820,{2U,0U,0U}},
{NBCD_4820,{3U,0U,0U}},
{NBCD_4820,{4U,0U,0U}},
{NBCD_4820,{5U,0U,0U}},
{NBCD_4820,{6U,0U,0U}},
{NBCD_4820,{7U,0U,0U}},
{NBCD_4828,{0U,0U,0U}},
{NBCD_4828,{1U,0U,0U}},
{NBCD_4828,{2U,0U,0U}},
{NBCD_4828,{3U,0U,0U}},
{NBCD_4828,{4U,0U,0U}},
{NBCD_4828,{5U,0U,0U}},
{NBCD_4828,{6U,0U,0U}},
{NBCD_4828,{7U,0U,0U}},
{NBCD_4830,{0U,0U,0U}},
{NBCD_4830,{1U,0U,0U}},
{NBCD_4830,{2U,0U,0U}},
{NBCD_4830,{3U,0U,0U}},
{NBCD_4830,{4U,0U,0U}},
{NBCD_4830,{5U,0U,0U}},
{NBCD_4830,{6U,0U,0U}},
{NBCD_4830,{7U,0U,0U}},
{NBCD_4838,{0U,0U,0U}},
{NBCD_4839,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SWAP_4840,{0U,0U,0U}},
{SWAP_4840,{1U,0U,0U}},
{SWAP_4840,{2U,0U,0U}},
{SWAP_4840,{3U,0U,0U}},
{SWAP_4840,{4U,0U,0U}},
{SWAP_4840,{5U,0U,0U}},
{SWAP_4840,{6U,0U,0U}},
{SWAP_4840,{7U,0U,0U}},
{BKPT_4848,{0U,0U,0U}},
{BKPT_4848,{1U,0U,0U}},
{BKPT_4848,{2U,0U,0U}},
{BKPT_4848,{3U,0U,0U}},
{BKPT_4848,{4U,0U,0U}},
{BKPT_4848,{5U,0U,0U}},
{BKPT_4848,{6U,0U,0U}},
{BKPT_4848,{7U,0U,0U}},
{PEA_4850,{0U,0U,0U}},
{PEA_4850,{1U,0U,0U}},
{PEA_4850,{2U,0U,0U}},
{PEA_4850,{3U,0U,0U}},
{PEA_4850,{4U,0U,0U}},
{PEA_4850,{5U,0U,0U}},
{PEA_4850,{6U,0U,0U}},
{PEA_4850,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PEA_4868,{0U,0U,0U}},
{PEA_4868,{1U,0U,0U}},
{PEA_4868,{2U,0U,0U}},
{PEA_4868,{3U,0U,0U}},
{PEA_4868,{4U,0U,0U}},
{PEA_4868,{5U,0U,0U}},
{PEA_4868,{6U,0U,0U}},
{PEA_4868,{7U,0U,0U}},
{PEA_4870,{0U,0U,0U}},
{PEA_4870,{1U,0U,0U}},
{PEA_4870,{2U,0U,0U}},
{PEA_4870,{3U,0U,0U}},
{PEA_4870,{4U,0U,0U}},
{PEA_4870,{5U,0U,0U}},
{PEA_4870,{6U,0U,0U}},
{PEA_4870,{7U,0U,0U}},
{PEA_4878,{0U,0U,0U}},
{PEA_4879,{0U,0U,0U}},
{PEA_487A,{0U,0U,0U}},
{PEA_487B,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXT_4880,{0U,0U,0U}},
{EXT_4880,{1U,0U,0U}},
{EXT_4880,{2U,0U,0U}},
{EXT_4880,{3U,0U,0U}},
{EXT_4880,{4U,0U,0U}},
{EXT_4880,{5U,0U,0U}},
{EXT_4880,{6U,0U,0U}},
{EXT_4880,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEM_4890,{0U,8U,0U}},
{MOVEM_4890,{1U,8U,0U}},
{MOVEM_4890,{2U,8U,0U}},
{MOVEM_4890,{3U,8U,0U}},
{MOVEM_4890,{4U,8U,0U}},
{MOVEM_4890,{5U,8U,0U}},
{MOVEM_4890,{6U,8U,0U}},
{MOVEM_4890,{7U,8U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEM_48A0,{0U,0U,0U}},
{MOVEM_48A0,{1U,0U,0U}},
{MOVEM_48A0,{2U,0U,0U}},
{MOVEM_48A0,{3U,0U,0U}},
{MOVEM_48A0,{4U,0U,0U}},
{MOVEM_48A0,{5U,0U,0U}},
{MOVEM_48A0,{6U,0U,0U}},
{MOVEM_48A0,{7U,0U,0U}},
{MOVEM_48A8,{0U,12U,0U}},
{MOVEM_48A8,{1U,12U,0U}},
{MOVEM_48A8,{2U,12U,0U}},
{MOVEM_48A8,{3U,12U,0U}},
{MOVEM_48A8,{4U,12U,0U}},
{MOVEM_48A8,{5U,12U,0U}},
{MOVEM_48A8,{6U,12U,0U}},
{MOVEM_48A8,{7U,12U,0U}},
{MOVEM_48B0,{0U,14U,0U}},
{MOVEM_48B0,{1U,14U,0U}},
{MOVEM_48B0,{2U,14U,0U}},
{MOVEM_48B0,{3U,14U,0U}},
{MOVEM_48B0,{4U,14U,0U}},
{MOVEM_48B0,{5U,14U,0U}},
{MOVEM_48B0,{6U,14U,0U}},
{MOVEM_48B0,{7U,14U,0U}},
{MOVEM_48B8,{0U,12U,0U}},
{MOVEM_48B9,{0U,16U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXT_48C0,{0U,0U,0U}},
{EXT_48C0,{1U,0U,0U}},
{EXT_48C0,{2U,0U,0U}},
{EXT_48C0,{3U,0U,0U}},
{EXT_48C0,{4U,0U,0U}},
{EXT_48C0,{5U,0U,0U}},
{EXT_48C0,{6U,0U,0U}},
{EXT_48C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEM_48D0,{0U,8U,0U}},
{MOVEM_48D0,{1U,8U,0U}},
{MOVEM_48D0,{2U,8U,0U}},
{MOVEM_48D0,{3U,8U,0U}},
{MOVEM_48D0,{4U,8U,0U}},
{MOVEM_48D0,{5U,8U,0U}},
{MOVEM_48D0,{6U,8U,0U}},
{MOVEM_48D0,{7U,8U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEM_48E0,{0U,0U,0U}},
{MOVEM_48E0,{1U,0U,0U}},
{MOVEM_48E0,{2U,0U,0U}},
{MOVEM_48E0,{3U,0U,0U}},
{MOVEM_48E0,{4U,0U,0U}},
{MOVEM_48E0,{5U,0U,0U}},
{MOVEM_48E0,{6U,0U,0U}},
{MOVEM_48E0,{7U,0U,0U}},
{MOVEM_48E8,{0U,12U,0U}},
{MOVEM_48E8,{1U,12U,0U}},
{MOVEM_48E8,{2U,12U,0U}},
{MOVEM_48E8,{3U,12U,0U}},
{MOVEM_48E8,{4U,12U,0U}},
{MOVEM_48E8,{5U,12U,0U}},
{MOVEM_48E8,{6U,12U,0U}},
{MOVEM_48E8,{7U,12U,0U}},
{MOVEM_48F0,{0U,14U,0U}},
{MOVEM_48F0,{1U,14U,0U}},
{MOVEM_48F0,{2U,14U,0U}},
{MOVEM_48F0,{3U,14U,0U}},
{MOVEM_48F0,{4U,14U,0U}},
{MOVEM_48F0,{5U,14U,0U}},
{MOVEM_48F0,{6U,14U,0U}},
{MOVEM_48F0,{7U,14U,0U}},
{MOVEM_48F8,{0U,12U,0U}},
{MOVEM_48F9,{0U,16U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4100,{0U,4U,0U}},
{CHK_4100,{1U,4U,0U}},
{CHK_4100,{2U,4U,0U}},
{CHK_4100,{3U,4U,0U}},
{CHK_4100,{4U,4U,0U}},
{CHK_4100,{5U,4U,0U}},
{CHK_4100,{6U,4U,0U}},
{CHK_4100,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4110,{0U,4U,0U}},
{CHK_4110,{1U,4U,0U}},
{CHK_4110,{2U,4U,0U}},
{CHK_4110,{3U,4U,0U}},
{CHK_4110,{4U,4U,0U}},
{CHK_4110,{5U,4U,0U}},
{CHK_4110,{6U,4U,0U}},
{CHK_4110,{7U,4U,0U}},
{CHK_4118,{0U,4U,0U}},
{CHK_4118,{1U,4U,0U}},
{CHK_4118,{2U,4U,0U}},
{CHK_4118,{3U,4U,0U}},
{CHK_4118,{4U,4U,0U}},
{CHK_4118,{5U,4U,0U}},
{CHK_4118,{6U,4U,0U}},
{CHK_4118,{7U,4U,0U}},
{CHK_4120,{0U,4U,0U}},
{CHK_4120,{1U,4U,0U}},
{CHK_4120,{2U,4U,0U}},
{CHK_4120,{3U,4U,0U}},
{CHK_4120,{4U,4U,0U}},
{CHK_4120,{5U,4U,0U}},
{CHK_4120,{6U,4U,0U}},
{CHK_4120,{7U,4U,0U}},
{CHK_4128,{0U,4U,0U}},
{CHK_4128,{1U,4U,0U}},
{CHK_4128,{2U,4U,0U}},
{CHK_4128,{3U,4U,0U}},
{CHK_4128,{4U,4U,0U}},
{CHK_4128,{5U,4U,0U}},
{CHK_4128,{6U,4U,0U}},
{CHK_4128,{7U,4U,0U}},
{CHK_4130,{0U,4U,0U}},
{CHK_4130,{1U,4U,0U}},
{CHK_4130,{2U,4U,0U}},
{CHK_4130,{3U,4U,0U}},
{CHK_4130,{4U,4U,0U}},
{CHK_4130,{5U,4U,0U}},
{CHK_4130,{6U,4U,0U}},
{CHK_4130,{7U,4U,0U}},
{CHK_4138,{0U,4U,0U}},
{CHK_4139,{0U,4U,0U}},
{CHK_413A,{0U,4U,0U}},
{CHK_413B,{0U,4U,0U}},
{CHK_413C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4180,{0U,4U,0U}},
{CHK_4180,{1U,4U,0U}},
{CHK_4180,{2U,4U,0U}},
{CHK_4180,{3U,4U,0U}},
{CHK_4180,{4U,4U,0U}},
{CHK_4180,{5U,4U,0U}},
{CHK_4180,{6U,4U,0U}},
{CHK_4180,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4190,{0U,4U,0U}},
{CHK_4190,{1U,4U,0U}},
{CHK_4190,{2U,4U,0U}},
{CHK_4190,{3U,4U,0U}},
{CHK_4190,{4U,4U,0U}},
{CHK_4190,{5U,4U,0U}},
{CHK_4190,{6U,4U,0U}},
{CHK_4190,{7U,4U,0U}},
{CHK_4198,{0U,4U,0U}},
{CHK_4198,{1U,4U,0U}},
{CHK_4198,{2U,4U,0U}},
{CHK_4198,{3U,4U,0U}},
{CHK_4198,{4U,4U,0U}},
{CHK_4198,{5U,4U,0U}},
{CHK_4198,{6U,4U,0U}},
{CHK_4198,{7U,4U,0U}},
{CHK_41A0,{0U,4U,0U}},
{CHK_41A0,{1U,4U,0U}},
{CHK_41A0,{2U,4U,0U}},
{CHK_41A0,{3U,4U,0U}},
{CHK_41A0,{4U,4U,0U}},
{CHK_41A0,{5U,4U,0U}},
{CHK_41A0,{6U,4U,0U}},
{CHK_41A0,{7U,4U,0U}},
{CHK_41A8,{0U,4U,0U}},
{CHK_41A8,{1U,4U,0U}},
{CHK_41A8,{2U,4U,0U}},
{CHK_41A8,{3U,4U,0U}},
{CHK_41A8,{4U,4U,0U}},
{CHK_41A8,{5U,4U,0U}},
{CHK_41A8,{6U,4U,0U}},
{CHK_41A8,{7U,4U,0U}},
{CHK_41B0,{0U,4U,0U}},
{CHK_41B0,{1U,4U,0U}},
{CHK_41B0,{2U,4U,0U}},
{CHK_41B0,{3U,4U,0U}},
{CHK_41B0,{4U,4U,0U}},
{CHK_41B0,{5U,4U,0U}},
{CHK_41B0,{6U,4U,0U}},
{CHK_41B0,{7U,4U,0U}},
{CHK_41B8,{0U,4U,0U}},
{CHK_41B9,{0U,4U,0U}},
{CHK_41BA,{0U,4U,0U}},
{CHK_41BB,{0U,4U,0U}},
{CHK_41BC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXT_49C0,{0U,0U,0U}},
{EXT_49C0,{1U,0U,0U}},
{EXT_49C0,{2U,0U,0U}},
{EXT_49C0,{3U,0U,0U}},
{EXT_49C0,{4U,0U,0U}},
{EXT_49C0,{5U,0U,0U}},
{EXT_49C0,{6U,0U,0U}},
{EXT_49C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41D0,{0U,4U,0U}},
{LEA_41D0,{1U,4U,0U}},
{LEA_41D0,{2U,4U,0U}},
{LEA_41D0,{3U,4U,0U}},
{LEA_41D0,{4U,4U,0U}},
{LEA_41D0,{5U,4U,0U}},
{LEA_41D0,{6U,4U,0U}},
{LEA_41D0,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41E8,{0U,4U,0U}},
{LEA_41E8,{1U,4U,0U}},
{LEA_41E8,{2U,4U,0U}},
{LEA_41E8,{3U,4U,0U}},
{LEA_41E8,{4U,4U,0U}},
{LEA_41E8,{5U,4U,0U}},
{LEA_41E8,{6U,4U,0U}},
{LEA_41E8,{7U,4U,0U}},
{LEA_41F0,{0U,4U,0U}},
{LEA_41F0,{1U,4U,0U}},
{LEA_41F0,{2U,4U,0U}},
{LEA_41F0,{3U,4U,0U}},
{LEA_41F0,{4U,4U,0U}},
{LEA_41F0,{5U,4U,0U}},
{LEA_41F0,{6U,4U,0U}},
{LEA_41F0,{7U,4U,0U}},
{LEA_41F8,{0U,4U,0U}},
{LEA_41F9,{0U,4U,0U}},
{LEA_41FA,{0U,4U,0U}},
{LEA_41FB,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{TST_4A00,{0U,0U,0U}},
{TST_4A00,{1U,0U,0U}},
{TST_4A00,{2U,0U,0U}},
{TST_4A00,{3U,0U,0U}},
{TST_4A00,{4U,0U,0U}},
{TST_4A00,{5U,0U,0U}},
{TST_4A00,{6U,0U,0U}},
{TST_4A00,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{TST_4A10,{0U,0U,0U}},
{TST_4A10,{1U,0U,0U}},
{TST_4A10,{2U,0U,0U}},
{TST_4A10,{3U,0U,0U}},
{TST_4A10,{4U,0U,0U}},
{TST_4A10,{5U,0U,0U}},
{TST_4A10,{6U,0U,0U}},
{TST_4A10,{7U,0U,0U}},
{TST_4A18,{0U,0U,0U}},
{TST_4A18,{1U,0U,0U}},
{TST_4A18,{2U,0U,0U}},
{TST_4A18,{3U,0U,0U}},
{TST_4A18,{4U,0U,0U}},
{TST_4A18,{5U,0U,0U}},
{TST_4A18,{6U,0U,0U}},
{TST_4A18,{7U,0U,0U}},
{TST_4A20,{0U,0U,0U}},
{TST_4A20,{1U,0U,0U}},
{TST_4A20,{2U,0U,0U}},
{TST_4A20,{3U,0U,0U}},
{TST_4A20,{4U,0U,0U}},
{TST_4A20,{5U,0U,0U}},
{TST_4A20,{6U,0U,0U}},
{TST_4A20,{7U,0U,0U}},
{TST_4A28,{0U,0U,0U}},
{TST_4A28,{1U,0U,0U}},
{TST_4A28,{2U,0U,0U}},
{TST_4A28,{3U,0U,0U}},
{TST_4A28,{4U,0U,0U}},
{TST_4A28,{5U,0U,0U}},
{TST_4A28,{6U,0U,0U}},
{TST_4A28,{7U,0U,0U}},
{TST_4A30,{0U,0U,0U}},
{TST_4A30,{1U,0U,0U}},
{TST_4A30,{2U,0U,0U}},
{TST_4A30,{3U,0U,0U}},
{TST_4A30,{4U,0U,0U}},
{TST_4A30,{5U,0U,0U}},
{TST_4A30,{6U,0U,0U}},
{TST_4A30,{7U,0U,0U}},
{TST_4A38,{0U,0U,0U}},
{TST_4A39,{0U,0U,0U}},
{TST_4A3A,{0U,0U,0U}},
{TST_4A3B,{0U,0U,0U}},
{TST_4A3C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{TST_4A40,{0U,0U,0U}},
{TST_4A40,{1U,0U,0U}},
{TST_4A40,{2U,0U,0U}},
{TST_4A40,{3U,0U,0U}},
{TST_4A40,{4U,0U,0U}},
{TST_4A40,{5U,0U,0U}},
{TST_4A40,{6U,0U,0U}},
{TST_4A40,{7U,0U,0U}},
{TST_4A48,{0U,0U,0U}},
{TST_4A48,{1U,0U,0U}},
{TST_4A48,{2U,0U,0U}},
{TST_4A48,{3U,0U,0U}},
{TST_4A48,{4U,0U,0U}},
{TST_4A48,{5U,0U,0U}},
{TST_4A48,{6U,0U,0U}},
{TST_4A48,{7U,0U,0U}},
{TST_4A50,{0U,0U,0U}},
{TST_4A50,{1U,0U,0U}},
{TST_4A50,{2U,0U,0U}},
{TST_4A50,{3U,0U,0U}},
{TST_4A50,{4U,0U,0U}},
{TST_4A50,{5U,0U,0U}},
{TST_4A50,{6U,0U,0U}},
{TST_4A50,{7U,0U,0U}},
{TST_4A58,{0U,0U,0U}},
{TST_4A58,{1U,0U,0U}},
{TST_4A58,{2U,0U,0U}},
{TST_4A58,{3U,0U,0U}},
{TST_4A58,{4U,0U,0U}},
{TST_4A58,{5U,0U,0U}},
{TST_4A58,{6U,0U,0U}},
{TST_4A58,{7U,0U,0U}},
{TST_4A60,{0U,0U,0U}},
{TST_4A60,{1U,0U,0U}},
{TST_4A60,{2U,0U,0U}},
{TST_4A60,{3U,0U,0U}},
{TST_4A60,{4U,0U,0U}},
{TST_4A60,{5U,0U,0U}},
{TST_4A60,{6U,0U,0U}},
{TST_4A60,{7U,0U,0U}},
{TST_4A68,{0U,0U,0U}},
{TST_4A68,{1U,0U,0U}},
{TST_4A68,{2U,0U,0U}},
{TST_4A68,{3U,0U,0U}},
{TST_4A68,{4U,0U,0U}},
{TST_4A68,{5U,0U,0U}},
{TST_4A68,{6U,0U,0U}},
{TST_4A68,{7U,0U,0U}},
{TST_4A70,{0U,0U,0U}},
{TST_4A70,{1U,0U,0U}},
{TST_4A70,{2U,0U,0U}},
{TST_4A70,{3U,0U,0U}},
{TST_4A70,{4U,0U,0U}},
{TST_4A70,{5U,0U,0U}},
{TST_4A70,{6U,0U,0U}},
{TST_4A70,{7U,0U,0U}},
{TST_4A78,{0U,0U,0U}},
{TST_4A79,{0U,0U,0U}},
{TST_4A7A,{0U,0U,0U}},
{TST_4A7B,{0U,0U,0U}},
{TST_4A7C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{TST_4A80,{0U,0U,0U}},
{TST_4A80,{1U,0U,0U}},
{TST_4A80,{2U,0U,0U}},
{TST_4A80,{3U,0U,0U}},
{TST_4A80,{4U,0U,0U}},
{TST_4A80,{5U,0U,0U}},
{TST_4A80,{6U,0U,0U}},
{TST_4A80,{7U,0U,0U}},
{TST_4A88,{0U,0U,0U}},
{TST_4A88,{1U,0U,0U}},
{TST_4A88,{2U,0U,0U}},
{TST_4A88,{3U,0U,0U}},
{TST_4A88,{4U,0U,0U}},
{TST_4A88,{5U,0U,0U}},
{TST_4A88,{6U,0U,0U}},
{TST_4A88,{7U,0U,0U}},
{TST_4A90,{0U,0U,0U}},
{TST_4A90,{1U,0U,0U}},
{TST_4A90,{2U,0U,0U}},
{TST_4A90,{3U,0U,0U}},
{TST_4A90,{4U,0U,0U}},
{TST_4A90,{5U,0U,0U}},
{TST_4A90,{6U,0U,0U}},
{TST_4A90,{7U,0U,0U}},
{TST_4A98,{0U,0U,0U}},
{TST_4A98,{1U,0U,0U}},
{TST_4A98,{2U,0U,0U}},
{TST_4A98,{3U,0U,0U}},
{TST_4A98,{4U,0U,0U}},
{TST_4A98,{5U,0U,0U}},
{TST_4A98,{6U,0U,0U}},
{TST_4A98,{7U,0U,0U}},
{TST_4AA0,{0U,0U,0U}},
{TST_4AA0,{1U,0U,0U}},
{TST_4AA0,{2U,0U,0U}},
{TST_4AA0,{3U,0U,0U}},
{TST_4AA0,{4U,0U,0U}},
{TST_4AA0,{5U,0U,0U}},
{TST_4AA0,{6U,0U,0U}},
{TST_4AA0,{7U,0U,0U}},
{TST_4AA8,{0U,0U,0U}},
{TST_4AA8,{1U,0U,0U}},
{TST_4AA8,{2U,0U,0U}},
{TST_4AA8,{3U,0U,0U}},
{TST_4AA8,{4U,0U,0U}},
{TST_4AA8,{5U,0U,0U}},
{TST_4AA8,{6U,0U,0U}},
{TST_4AA8,{7U,0U,0U}},
{TST_4AB0,{0U,0U,0U}},
{TST_4AB0,{1U,0U,0U}},
{TST_4AB0,{2U,0U,0U}},
{TST_4AB0,{3U,0U,0U}},
{TST_4AB0,{4U,0U,0U}},
{TST_4AB0,{5U,0U,0U}},
{TST_4AB0,{6U,0U,0U}},
{TST_4AB0,{7U,0U,0U}},
{TST_4AB8,{0U,0U,0U}},
{TST_4AB9,{0U,0U,0U}},
{TST_4ABA,{0U,0U,0U}},
{TST_4ABB,{0U,0U,0U}},
{TST_4ABC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{TAS_4AC0,{0U,0U,0U}},
{TAS_4AC0,{1U,0U,0U}},
{TAS_4AC0,{2U,0U,0U}},
{TAS_4AC0,{3U,0U,0U}},
{TAS_4AC0,{4U,0U,0U}},
{TAS_4AC0,{5U,0U,0U}},
{TAS_4AC0,{6U,0U,0U}},
{TAS_4AC0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{TAS_4AD0,{0U,0U,0U}},
{TAS_4AD0,{1U,0U,0U}},
{TAS_4AD0,{2U,0U,0U}},
{TAS_4AD0,{3U,0U,0U}},
{TAS_4AD0,{4U,0U,0U}},
{TAS_4AD0,{5U,0U,0U}},
{TAS_4AD0,{6U,0U,0U}},
{TAS_4AD0,{7U,0U,0U}},
{TAS_4AD8,{0U,0U,0U}},
{TAS_4AD8,{1U,0U,0U}},
{TAS_4AD8,{2U,0U,0U}},
{TAS_4AD8,{3U,0U,0U}},
{TAS_4AD8,{4U,0U,0U}},
{TAS_4AD8,{5U,0U,0U}},
{TAS_4AD8,{6U,0U,0U}},
{TAS_4AD8,{7U,0U,0U}},
{TAS_4AE0,{0U,0U,0U}},
{TAS_4AE0,{1U,0U,0U}},
{TAS_4AE0,{2U,0U,0U}},
{TAS_4AE0,{3U,0U,0U}},
{TAS_4AE0,{4U,0U,0U}},
{TAS_4AE0,{5U,0U,0U}},
{TAS_4AE0,{6U,0U,0U}},
{TAS_4AE0,{7U,0U,0U}},
{TAS_4AE8,{0U,0U,0U}},
{TAS_4AE8,{1U,0U,0U}},
{TAS_4AE8,{2U,0U,0U}},
{TAS_4AE8,{3U,0U,0U}},
{TAS_4AE8,{4U,0U,0U}},
{TAS_4AE8,{5U,0U,0U}},
{TAS_4AE8,{6U,0U,0U}},
{TAS_4AE8,{7U,0U,0U}},
{TAS_4AF0,{0U,0U,0U}},
{TAS_4AF0,{1U,0U,0U}},
{TAS_4AF0,{2U,0U,0U}},
{TAS_4AF0,{3U,0U,0U}},
{TAS_4AF0,{4U,0U,0U}},
{TAS_4AF0,{5U,0U,0U}},
{TAS_4AF0,{6U,0U,0U}},
{TAS_4AF0,{7U,0U,0U}},
{TAS_4AF8,{0U,0U,0U}},
{TAS_4AF9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4100,{0U,5U,0U}},
{CHK_4100,{1U,5U,0U}},
{CHK_4100,{2U,5U,0U}},
{CHK_4100,{3U,5U,0U}},
{CHK_4100,{4U,5U,0U}},
{CHK_4100,{5U,5U,0U}},
{CHK_4100,{6U,5U,0U}},
{CHK_4100,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4110,{0U,5U,0U}},
{CHK_4110,{1U,5U,0U}},
{CHK_4110,{2U,5U,0U}},
{CHK_4110,{3U,5U,0U}},
{CHK_4110,{4U,5U,0U}},
{CHK_4110,{5U,5U,0U}},
{CHK_4110,{6U,5U,0U}},
{CHK_4110,{7U,5U,0U}},
{CHK_4118,{0U,5U,0U}},
{CHK_4118,{1U,5U,0U}},
{CHK_4118,{2U,5U,0U}},
{CHK_4118,{3U,5U,0U}},
{CHK_4118,{4U,5U,0U}},
{CHK_4118,{5U,5U,0U}},
{CHK_4118,{6U,5U,0U}},
{CHK_4118,{7U,5U,0U}},
{CHK_4120,{0U,5U,0U}},
{CHK_4120,{1U,5U,0U}},
{CHK_4120,{2U,5U,0U}},
{CHK_4120,{3U,5U,0U}},
{CHK_4120,{4U,5U,0U}},
{CHK_4120,{5U,5U,0U}},
{CHK_4120,{6U,5U,0U}},
{CHK_4120,{7U,5U,0U}},
{CHK_4128,{0U,5U,0U}},
{CHK_4128,{1U,5U,0U}},
{CHK_4128,{2U,5U,0U}},
{CHK_4128,{3U,5U,0U}},
{CHK_4128,{4U,5U,0U}},
{CHK_4128,{5U,5U,0U}},
{CHK_4128,{6U,5U,0U}},
{CHK_4128,{7U,5U,0U}},
{CHK_4130,{0U,5U,0U}},
{CHK_4130,{1U,5U,0U}},
{CHK_4130,{2U,5U,0U}},
{CHK_4130,{3U,5U,0U}},
{CHK_4130,{4U,5U,0U}},
{CHK_4130,{5U,5U,0U}},
{CHK_4130,{6U,5U,0U}},
{CHK_4130,{7U,5U,0U}},
{CHK_4138,{0U,5U,0U}},
{CHK_4139,{0U,5U,0U}},
{CHK_413A,{0U,5U,0U}},
{CHK_413B,{0U,5U,0U}},
{CHK_413C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4180,{0U,5U,0U}},
{CHK_4180,{1U,5U,0U}},
{CHK_4180,{2U,5U,0U}},
{CHK_4180,{3U,5U,0U}},
{CHK_4180,{4U,5U,0U}},
{CHK_4180,{5U,5U,0U}},
{CHK_4180,{6U,5U,0U}},
{CHK_4180,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4190,{0U,5U,0U}},
{CHK_4190,{1U,5U,0U}},
{CHK_4190,{2U,5U,0U}},
{CHK_4190,{3U,5U,0U}},
{CHK_4190,{4U,5U,0U}},
{CHK_4190,{5U,5U,0U}},
{CHK_4190,{6U,5U,0U}},
{CHK_4190,{7U,5U,0U}},
{CHK_4198,{0U,5U,0U}},
{CHK_4198,{1U,5U,0U}},
{CHK_4198,{2U,5U,0U}},
{CHK_4198,{3U,5U,0U}},
{CHK_4198,{4U,5U,0U}},
{CHK_4198,{5U,5U,0U}},
{CHK_4198,{6U,5U,0U}},
{CHK_4198,{7U,5U,0U}},
{CHK_41A0,{0U,5U,0U}},
{CHK_41A0,{1U,5U,0U}},
{CHK_41A0,{2U,5U,0U}},
{CHK_41A0,{3U,5U,0U}},
{CHK_41A0,{4U,5U,0U}},
{CHK_41A0,{5U,5U,0U}},
{CHK_41A0,{6U,5U,0U}},
{CHK_41A0,{7U,5U,0U}},
{CHK_41A8,{0U,5U,0U}},
{CHK_41A8,{1U,5U,0U}},
{CHK_41A8,{2U,5U,0U}},
{CHK_41A8,{3U,5U,0U}},
{CHK_41A8,{4U,5U,0U}},
{CHK_41A8,{5U,5U,0U}},
{CHK_41A8,{6U,5U,0U}},
{CHK_41A8,{7U,5U,0U}},
{CHK_41B0,{0U,5U,0U}},
{CHK_41B0,{1U,5U,0U}},
{CHK_41B0,{2U,5U,0U}},
{CHK_41B0,{3U,5U,0U}},
{CHK_41B0,{4U,5U,0U}},
{CHK_41B0,{5U,5U,0U}},
{CHK_41B0,{6U,5U,0U}},
{CHK_41B0,{7U,5U,0U}},
{CHK_41B8,{0U,5U,0U}},
{CHK_41B9,{0U,5U,0U}},
{CHK_41BA,{0U,5U,0U}},
{CHK_41BB,{0U,5U,0U}},
{CHK_41BC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41D0,{0U,5U,0U}},
{LEA_41D0,{1U,5U,0U}},
{LEA_41D0,{2U,5U,0U}},
{LEA_41D0,{3U,5U,0U}},
{LEA_41D0,{4U,5U,0U}},
{LEA_41D0,{5U,5U,0U}},
{LEA_41D0,{6U,5U,0U}},
{LEA_41D0,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41E8,{0U,5U,0U}},
{LEA_41E8,{1U,5U,0U}},
{LEA_41E8,{2U,5U,0U}},
{LEA_41E8,{3U,5U,0U}},
{LEA_41E8,{4U,5U,0U}},
{LEA_41E8,{5U,5U,0U}},
{LEA_41E8,{6U,5U,0U}},
{LEA_41E8,{7U,5U,0U}},
{LEA_41F0,{0U,5U,0U}},
{LEA_41F0,{1U,5U,0U}},
{LEA_41F0,{2U,5U,0U}},
{LEA_41F0,{3U,5U,0U}},
{LEA_41F0,{4U,5U,0U}},
{LEA_41F0,{5U,5U,0U}},
{LEA_41F0,{6U,5U,0U}},
{LEA_41F0,{7U,5U,0U}},
{LEA_41F8,{0U,5U,0U}},
{LEA_41F9,{0U,5U,0U}},
{LEA_41FA,{0U,5U,0U}},
{LEA_41FB,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULL_4C00,{0U,0U,0U}},
{MULL_4C00,{1U,0U,0U}},
{MULL_4C00,{2U,0U,0U}},
{MULL_4C00,{3U,0U,0U}},
{MULL_4C00,{4U,0U,0U}},
{MULL_4C00,{5U,0U,0U}},
{MULL_4C00,{6U,0U,0U}},
{MULL_4C00,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULL_4C10,{0U,0U,0U}},
{MULL_4C10,{1U,0U,0U}},
{MULL_4C10,{2U,0U,0U}},
{MULL_4C10,{3U,0U,0U}},
{MULL_4C10,{4U,0U,0U}},
{MULL_4C10,{5U,0U,0U}},
{MULL_4C10,{6U,0U,0U}},
{MULL_4C10,{7U,0U,0U}},
{MULL_4C18,{0U,0U,0U}},
{MULL_4C18,{1U,0U,0U}},
{MULL_4C18,{2U,0U,0U}},
{MULL_4C18,{3U,0U,0U}},
{MULL_4C18,{4U,0U,0U}},
{MULL_4C18,{5U,0U,0U}},
{MULL_4C18,{6U,0U,0U}},
{MULL_4C18,{7U,0U,0U}},
{MULL_4C20,{0U,0U,0U}},
{MULL_4C20,{1U,0U,0U}},
{MULL_4C20,{2U,0U,0U}},
{MULL_4C20,{3U,0U,0U}},
{MULL_4C20,{4U,0U,0U}},
{MULL_4C20,{5U,0U,0U}},
{MULL_4C20,{6U,0U,0U}},
{MULL_4C20,{7U,0U,0U}},
{MULL_4C28,{0U,0U,0U}},
{MULL_4C28,{1U,0U,0U}},
{MULL_4C28,{2U,0U,0U}},
{MULL_4C28,{3U,0U,0U}},
{MULL_4C28,{4U,0U,0U}},
{MULL_4C28,{5U,0U,0U}},
{MULL_4C28,{6U,0U,0U}},
{MULL_4C28,{7U,0U,0U}},
{MULL_4C30,{0U,0U,0U}},
{MULL_4C30,{1U,0U,0U}},
{MULL_4C30,{2U,0U,0U}},
{MULL_4C30,{3U,0U,0U}},
{MULL_4C30,{4U,0U,0U}},
{MULL_4C30,{5U,0U,0U}},
{MULL_4C30,{6U,0U,0U}},
{MULL_4C30,{7U,0U,0U}},
{MULL_4C38,{0U,0U,0U}},
{MULL_4C39,{0U,0U,0U}},
{MULL_4C3A,{0U,0U,0U}},
{MULL_4C3B,{0U,0U,0U}},
{MULL_4C3C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVL_4C40,{0U,0U,4U}},
{DIVL_4C40,{1U,0U,4U}},
{DIVL_4C40,{2U,0U,4U}},
{DIVL_4C40,{3U,0U,4U}},
{DIVL_4C40,{4U,0U,4U}},
{DIVL_4C40,{5U,0U,4U}},
{DIVL_4C40,{6U,0U,4U}},
{DIVL_4C40,{7U,0U,4U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVL_4C50,{0U,0U,12U}},
{DIVL_4C50,{1U,0U,12U}},
{DIVL_4C50,{2U,0U,12U}},
{DIVL_4C50,{3U,0U,12U}},
{DIVL_4C50,{4U,0U,12U}},
{DIVL_4C50,{5U,0U,12U}},
{DIVL_4C50,{6U,0U,12U}},
{DIVL_4C50,{7U,0U,12U}},
{DIVL_4C58,{0U,0U,12U}},
{DIVL_4C58,{1U,0U,12U}},
{DIVL_4C58,{2U,0U,12U}},
{DIVL_4C58,{3U,0U,12U}},
{DIVL_4C58,{4U,0U,12U}},
{DIVL_4C58,{5U,0U,12U}},
{DIVL_4C58,{6U,0U,12U}},
{DIVL_4C58,{7U,0U,12U}},
{DIVL_4C60,{0U,0U,14U}},
{DIVL_4C60,{1U,0U,14U}},
{DIVL_4C60,{2U,0U,14U}},
{DIVL_4C60,{3U,0U,14U}},
{DIVL_4C60,{4U,0U,14U}},
{DIVL_4C60,{5U,0U,14U}},
{DIVL_4C60,{6U,0U,14U}},
{DIVL_4C60,{7U,0U,14U}},
{DIVL_4C68,{0U,0U,16U}},
{DIVL_4C68,{1U,0U,16U}},
{DIVL_4C68,{2U,0U,16U}},
{DIVL_4C68,{3U,0U,16U}},
{DIVL_4C68,{4U,0U,16U}},
{DIVL_4C68,{5U,0U,16U}},
{DIVL_4C68,{6U,0U,16U}},
{DIVL_4C68,{7U,0U,16U}},
{DIVL_4C70,{0U,0U,18U}},
{DIVL_4C70,{1U,0U,18U}},
{DIVL_4C70,{2U,0U,18U}},
{DIVL_4C70,{3U,0U,18U}},
{DIVL_4C70,{4U,0U,18U}},
{DIVL_4C70,{5U,0U,18U}},
{DIVL_4C70,{6U,0U,18U}},
{DIVL_4C70,{7U,0U,18U}},
{DIVL_4C78,{0U,0U,16U}},
{DIVL_4C79,{0U,0U,20U}},
{DIVL_4C7A,{0U,0U,16U}},
{DIVL_4C7B,{0U,0U,18U}},
{DIVL_4C7C,{0U,0U,12U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEM_4C90,{0U,12U,0U}},
{MOVEM_4C90,{1U,12U,0U}},
{MOVEM_4C90,{2U,12U,0U}},
{MOVEM_4C90,{3U,12U,0U}},
{MOVEM_4C90,{4U,12U,0U}},
{MOVEM_4C90,{5U,12U,0U}},
{MOVEM_4C90,{6U,12U,0U}},
{MOVEM_4C90,{7U,12U,0U}},
{MOVEM_4C98,{0U,0U,0U}},
{MOVEM_4C98,{1U,0U,0U}},
{MOVEM_4C98,{2U,0U,0U}},
{MOVEM_4C98,{3U,0U,0U}},
{MOVEM_4C98,{4U,0U,0U}},
{MOVEM_4C98,{5U,0U,0U}},
{MOVEM_4C98,{6U,0U,0U}},
{MOVEM_4C98,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEM_4CA8,{0U,16U,0U}},
{MOVEM_4CA8,{1U,16U,0U}},
{MOVEM_4CA8,{2U,16U,0U}},
{MOVEM_4CA8,{3U,16U,0U}},
{MOVEM_4CA8,{4U,16U,0U}},
{MOVEM_4CA8,{5U,16U,0U}},
{MOVEM_4CA8,{6U,16U,0U}},
{MOVEM_4CA8,{7U,16U,0U}},
{MOVEM_4CB0,{0U,18U,0U}},
{MOVEM_4CB0,{1U,18U,0U}},
{MOVEM_4CB0,{2U,18U,0U}},
{MOVEM_4CB0,{3U,18U,0U}},
{MOVEM_4CB0,{4U,18U,0U}},
{MOVEM_4CB0,{5U,18U,0U}},
{MOVEM_4CB0,{6U,18U,0U}},
{MOVEM_4CB0,{7U,18U,0U}},
{MOVEM_4CB8,{0U,16U,0U}},
{MOVEM_4CB9,{0U,20U,0U}},
{MOVEM_4CBA,{0U,16U,0U}},
{MOVEM_4CBB,{0U,18U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEM_4CD0,{0U,12U,0U}},
{MOVEM_4CD0,{1U,12U,0U}},
{MOVEM_4CD0,{2U,12U,0U}},
{MOVEM_4CD0,{3U,12U,0U}},
{MOVEM_4CD0,{4U,12U,0U}},
{MOVEM_4CD0,{5U,12U,0U}},
{MOVEM_4CD0,{6U,12U,0U}},
{MOVEM_4CD0,{7U,12U,0U}},
{MOVEM_4CD8,{0U,0U,0U}},
{MOVEM_4CD8,{1U,0U,0U}},
{MOVEM_4CD8,{2U,0U,0U}},
{MOVEM_4CD8,{3U,0U,0U}},
{MOVEM_4CD8,{4U,0U,0U}},
{MOVEM_4CD8,{5U,0U,0U}},
{MOVEM_4CD8,{6U,0U,0U}},
{MOVEM_4CD8,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEM_4CE8,{0U,16U,0U}},
{MOVEM_4CE8,{1U,16U,0U}},
{MOVEM_4CE8,{2U,16U,0U}},
{MOVEM_4CE8,{3U,16U,0U}},
{MOVEM_4CE8,{4U,16U,0U}},
{MOVEM_4CE8,{5U,16U,0U}},
{MOVEM_4CE8,{6U,16U,0U}},
{MOVEM_4CE8,{7U,16U,0U}},
{MOVEM_4CF0,{0U,18U,0U}},
{MOVEM_4CF0,{1U,18U,0U}},
{MOVEM_4CF0,{2U,18U,0U}},
{MOVEM_4CF0,{3U,18U,0U}},
{MOVEM_4CF0,{4U,18U,0U}},
{MOVEM_4CF0,{5U,18U,0U}},
{MOVEM_4CF0,{6U,18U,0U}},
{MOVEM_4CF0,{7U,18U,0U}},
{MOVEM_4CF8,{0U,16U,0U}},
{MOVEM_4CF9,{0U,20U,0U}},
{MOVEM_4CFA,{0U,16U,0U}},
{MOVEM_4CFB,{0U,18U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4100,{0U,6U,0U}},
{CHK_4100,{1U,6U,0U}},
{CHK_4100,{2U,6U,0U}},
{CHK_4100,{3U,6U,0U}},
{CHK_4100,{4U,6U,0U}},
{CHK_4100,{5U,6U,0U}},
{CHK_4100,{6U,6U,0U}},
{CHK_4100,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4110,{0U,6U,0U}},
{CHK_4110,{1U,6U,0U}},
{CHK_4110,{2U,6U,0U}},
{CHK_4110,{3U,6U,0U}},
{CHK_4110,{4U,6U,0U}},
{CHK_4110,{5U,6U,0U}},
{CHK_4110,{6U,6U,0U}},
{CHK_4110,{7U,6U,0U}},
{CHK_4118,{0U,6U,0U}},
{CHK_4118,{1U,6U,0U}},
{CHK_4118,{2U,6U,0U}},
{CHK_4118,{3U,6U,0U}},
{CHK_4118,{4U,6U,0U}},
{CHK_4118,{5U,6U,0U}},
{CHK_4118,{6U,6U,0U}},
{CHK_4118,{7U,6U,0U}},
{CHK_4120,{0U,6U,0U}},
{CHK_4120,{1U,6U,0U}},
{CHK_4120,{2U,6U,0U}},
{CHK_4120,{3U,6U,0U}},
{CHK_4120,{4U,6U,0U}},
{CHK_4120,{5U,6U,0U}},
{CHK_4120,{6U,6U,0U}},
{CHK_4120,{7U,6U,0U}},
{CHK_4128,{0U,6U,0U}},
{CHK_4128,{1U,6U,0U}},
{CHK_4128,{2U,6U,0U}},
{CHK_4128,{3U,6U,0U}},
{CHK_4128,{4U,6U,0U}},
{CHK_4128,{5U,6U,0U}},
{CHK_4128,{6U,6U,0U}},
{CHK_4128,{7U,6U,0U}},
{CHK_4130,{0U,6U,0U}},
{CHK_4130,{1U,6U,0U}},
{CHK_4130,{2U,6U,0U}},
{CHK_4130,{3U,6U,0U}},
{CHK_4130,{4U,6U,0U}},
{CHK_4130,{5U,6U,0U}},
{CHK_4130,{6U,6U,0U}},
{CHK_4130,{7U,6U,0U}},
{CHK_4138,{0U,6U,0U}},
{CHK_4139,{0U,6U,0U}},
{CHK_413A,{0U,6U,0U}},
{CHK_413B,{0U,6U,0U}},
{CHK_413C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4180,{0U,6U,0U}},
{CHK_4180,{1U,6U,0U}},
{CHK_4180,{2U,6U,0U}},
{CHK_4180,{3U,6U,0U}},
{CHK_4180,{4U,6U,0U}},
{CHK_4180,{5U,6U,0U}},
{CHK_4180,{6U,6U,0U}},
{CHK_4180,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4190,{0U,6U,0U}},
{CHK_4190,{1U,6U,0U}},
{CHK_4190,{2U,6U,0U}},
{CHK_4190,{3U,6U,0U}},
{CHK_4190,{4U,6U,0U}},
{CHK_4190,{5U,6U,0U}},
{CHK_4190,{6U,6U,0U}},
{CHK_4190,{7U,6U,0U}},
{CHK_4198,{0U,6U,0U}},
{CHK_4198,{1U,6U,0U}},
{CHK_4198,{2U,6U,0U}},
{CHK_4198,{3U,6U,0U}},
{CHK_4198,{4U,6U,0U}},
{CHK_4198,{5U,6U,0U}},
{CHK_4198,{6U,6U,0U}},
{CHK_4198,{7U,6U,0U}},
{CHK_41A0,{0U,6U,0U}},
{CHK_41A0,{1U,6U,0U}},
{CHK_41A0,{2U,6U,0U}},
{CHK_41A0,{3U,6U,0U}},
{CHK_41A0,{4U,6U,0U}},
{CHK_41A0,{5U,6U,0U}},
{CHK_41A0,{6U,6U,0U}},
{CHK_41A0,{7U,6U,0U}},
{CHK_41A8,{0U,6U,0U}},
{CHK_41A8,{1U,6U,0U}},
{CHK_41A8,{2U,6U,0U}},
{CHK_41A8,{3U,6U,0U}},
{CHK_41A8,{4U,6U,0U}},
{CHK_41A8,{5U,6U,0U}},
{CHK_41A8,{6U,6U,0U}},
{CHK_41A8,{7U,6U,0U}},
{CHK_41B0,{0U,6U,0U}},
{CHK_41B0,{1U,6U,0U}},
{CHK_41B0,{2U,6U,0U}},
{CHK_41B0,{3U,6U,0U}},
{CHK_41B0,{4U,6U,0U}},
{CHK_41B0,{5U,6U,0U}},
{CHK_41B0,{6U,6U,0U}},
{CHK_41B0,{7U,6U,0U}},
{CHK_41B8,{0U,6U,0U}},
{CHK_41B9,{0U,6U,0U}},
{CHK_41BA,{0U,6U,0U}},
{CHK_41BB,{0U,6U,0U}},
{CHK_41BC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41D0,{0U,6U,0U}},
{LEA_41D0,{1U,6U,0U}},
{LEA_41D0,{2U,6U,0U}},
{LEA_41D0,{3U,6U,0U}},
{LEA_41D0,{4U,6U,0U}},
{LEA_41D0,{5U,6U,0U}},
{LEA_41D0,{6U,6U,0U}},
{LEA_41D0,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41E8,{0U,6U,0U}},
{LEA_41E8,{1U,6U,0U}},
{LEA_41E8,{2U,6U,0U}},
{LEA_41E8,{3U,6U,0U}},
{LEA_41E8,{4U,6U,0U}},
{LEA_41E8,{5U,6U,0U}},
{LEA_41E8,{6U,6U,0U}},
{LEA_41E8,{7U,6U,0U}},
{LEA_41F0,{0U,6U,0U}},
{LEA_41F0,{1U,6U,0U}},
{LEA_41F0,{2U,6U,0U}},
{LEA_41F0,{3U,6U,0U}},
{LEA_41F0,{4U,6U,0U}},
{LEA_41F0,{5U,6U,0U}},
{LEA_41F0,{6U,6U,0U}},
{LEA_41F0,{7U,6U,0U}},
{LEA_41F8,{0U,6U,0U}},
{LEA_41F9,{0U,6U,0U}},
{LEA_41FA,{0U,6U,0U}},
{LEA_41FB,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{TRAP_4E40,{0U,0U,0U}},
{TRAP_4E40,{1U,0U,0U}},
{TRAP_4E40,{2U,0U,0U}},
{TRAP_4E40,{3U,0U,0U}},
{TRAP_4E40,{4U,0U,0U}},
{TRAP_4E40,{5U,0U,0U}},
{TRAP_4E40,{6U,0U,0U}},
{TRAP_4E40,{7U,0U,0U}},
{TRAP_4E40,{8U,0U,0U}},
{TRAP_4E40,{9U,0U,0U}},
{TRAP_4E40,{10U,0U,0U}},
{TRAP_4E40,{11U,0U,0U}},
{TRAP_4E40,{12U,0U,0U}},
{TRAP_4E40,{13U,0U,0U}},
{TRAP_4E40,{14U,0U,0U}},
{TRAP_4E40,{15U,0U,0U}},
{LINK_4E50,{0U,0U,0U}},
{LINK_4E50,{1U,0U,0U}},
{LINK_4E50,{2U,0U,0U}},
{LINK_4E50,{3U,0U,0U}},
{LINK_4E50,{4U,0U,0U}},
{LINK_4E50,{5U,0U,0U}},
{LINK_4E50,{6U,0U,0U}},
{LINK_4E50,{7U,0U,0U}},
{UNLK_4E58,{0U,0U,0U}},
{UNLK_4E58,{1U,0U,0U}},
{UNLK_4E58,{2U,0U,0U}},
{UNLK_4E58,{3U,0U,0U}},
{UNLK_4E58,{4U,0U,0U}},
{UNLK_4E58,{5U,0U,0U}},
{UNLK_4E58,{6U,0U,0U}},
{UNLK_4E58,{7U,0U,0U}},
{MOVEUSP_4E60,{0U,0U,0U}},
{MOVEUSP_4E60,{1U,0U,0U}},
{MOVEUSP_4E60,{2U,0U,0U}},
{MOVEUSP_4E60,{3U,0U,0U}},
{MOVEUSP_4E60,{4U,0U,0U}},
{MOVEUSP_4E60,{5U,0U,0U}},
{MOVEUSP_4E60,{6U,0U,0U}},
{MOVEUSP_4E60,{7U,0U,0U}},
{MOVEUSP_4E68,{0U,0U,0U}},
{MOVEUSP_4E68,{1U,0U,0U}},
{MOVEUSP_4E68,{2U,0U,0U}},
{MOVEUSP_4E68,{3U,0U,0U}},
{MOVEUSP_4E68,{4U,0U,0U}},
{MOVEUSP_4E68,{5U,0U,0U}},
{MOVEUSP_4E68,{6U,0U,0U}},
{MOVEUSP_4E68,{7U,0U,0U}},
{RESET_4E70,{0U,0U,0U}},
{NOP_4E71,{0U,0U,0U}},
{STOP_4E72,{0U,0U,0U}},
{RTE_4E73,{0U,0U,0U}},
{RTD_4E74,{0U,0U,0U}},
{RTS_4E75,{0U,0U,0U}},
{TRAPV_4E76,{0U,0U,0U}},
{RTR_4E77,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEC_4E7A,{0U,0U,0U}},
{MOVEC_4E7B,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{JSR_4E90,{0U,0U,0U}},
{JSR_4E90,{1U,0U,0U}},
{JSR_4E90,{2U,0U,0U}},
{JSR_4E90,{3U,0U,0U}},
{JSR_4E90,{4U,0U,0U}},
{JSR_4E90,{5U,0U,0U}},
{JSR_4E90,{6U,0U,0U}},
{JSR_4E90,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{JSR_4EA8,{0U,0U,0U}},
{JSR_4EA8,{1U,0U,0U}},
{JSR_4EA8,{2U,0U,0U}},
{JSR_4EA8,{3U,0U,0U}},
{JSR_4EA8,{4U,0U,0U}},
{JSR_4EA8,{5U,0U,0U}},
{JSR_4EA8,{6U,0U,0U}},
{JSR_4EA8,{7U,0U,0U}},
{JSR_4EB0,{0U,0U,0U}},
{JSR_4EB0,{1U,0U,0U}},
{JSR_4EB0,{2U,0U,0U}},
{JSR_4EB0,{3U,0U,0U}},
{JSR_4EB0,{4U,0U,0U}},
{JSR_4EB0,{5U,0U,0U}},
{JSR_4EB0,{6U,0U,0U}},
{JSR_4EB0,{7U,0U,0U}},
{JSR_4EB8,{0U,0U,0U}},
{JSR_4EB9,{0U,0U,0U}},
{JSR_4EBA,{0U,0U,0U}},
{JSR_4EBB,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{JMP_4ED0,{0U,0U,0U}},
{JMP_4ED0,{1U,0U,0U}},
{JMP_4ED0,{2U,0U,0U}},
{JMP_4ED0,{3U,0U,0U}},
{JMP_4ED0,{4U,0U,0U}},
{JMP_4ED0,{5U,0U,0U}},
{JMP_4ED0,{6U,0U,0U}},
{JMP_4ED0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{JMP_4EE8,{0U,0U,0U}},
{JMP_4EE8,{1U,0U,0U}},
{JMP_4EE8,{2U,0U,0U}},
{JMP_4EE8,{3U,0U,0U}},
{JMP_4EE8,{4U,0U,0U}},
{JMP_4EE8,{5U,0U,0U}},
{JMP_4EE8,{6U,0U,0U}},
{JMP_4EE8,{7U,0U,0U}},
{JMP_4EF0,{0U,0U,0U}},
{JMP_4EF0,{1U,0U,0U}},
{JMP_4EF0,{2U,0U,0U}},
{JMP_4EF0,{3U,0U,0U}},
{JMP_4EF0,{4U,0U,0U}},
{JMP_4EF0,{5U,0U,0U}},
{JMP_4EF0,{6U,0U,0U}},
{JMP_4EF0,{7U,0U,0U}},
{JMP_4EF8,{0U,0U,0U}},
{JMP_4EF9,{0U,0U,0U}},
{JMP_4EFA,{0U,0U,0U}},
{JMP_4EFB,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4100,{0U,7U,0U}},
{CHK_4100,{1U,7U,0U}},
{CHK_4100,{2U,7U,0U}},
{CHK_4100,{3U,7U,0U}},
{CHK_4100,{4U,7U,0U}},
{CHK_4100,{5U,7U,0U}},
{CHK_4100,{6U,7U,0U}},
{CHK_4100,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4110,{0U,7U,0U}},
{CHK_4110,{1U,7U,0U}},
{CHK_4110,{2U,7U,0U}},
{CHK_4110,{3U,7U,0U}},
{CHK_4110,{4U,7U,0U}},
{CHK_4110,{5U,7U,0U}},
{CHK_4110,{6U,7U,0U}},
{CHK_4110,{7U,7U,0U}},
{CHK_4118,{0U,7U,0U}},
{CHK_4118,{1U,7U,0U}},
{CHK_4118,{2U,7U,0U}},
{CHK_4118,{3U,7U,0U}},
{CHK_4118,{4U,7U,0U}},
{CHK_4118,{5U,7U,0U}},
{CHK_4118,{6U,7U,0U}},
{CHK_4118,{7U,7U,0U}},
{CHK_4120,{0U,7U,0U}},
{CHK_4120,{1U,7U,0U}},
{CHK_4120,{2U,7U,0U}},
{CHK_4120,{3U,7U,0U}},
{CHK_4120,{4U,7U,0U}},
{CHK_4120,{5U,7U,0U}},
{CHK_4120,{6U,7U,0U}},
{CHK_4120,{7U,7U,0U}},
{CHK_4128,{0U,7U,0U}},
{CHK_4128,{1U,7U,0U}},
{CHK_4128,{2U,7U,0U}},
{CHK_4128,{3U,7U,0U}},
{CHK_4128,{4U,7U,0U}},
{CHK_4128,{5U,7U,0U}},
{CHK_4128,{6U,7U,0U}},
{CHK_4128,{7U,7U,0U}},
{CHK_4130,{0U,7U,0U}},
{CHK_4130,{1U,7U,0U}},
{CHK_4130,{2U,7U,0U}},
{CHK_4130,{3U,7U,0U}},
{CHK_4130,{4U,7U,0U}},
{CHK_4130,{5U,7U,0U}},
{CHK_4130,{6U,7U,0U}},
{CHK_4130,{7U,7U,0U}},
{CHK_4138,{0U,7U,0U}},
{CHK_4139,{0U,7U,0U}},
{CHK_413A,{0U,7U,0U}},
{CHK_413B,{0U,7U,0U}},
{CHK_413C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4180,{0U,7U,0U}},
{CHK_4180,{1U,7U,0U}},
{CHK_4180,{2U,7U,0U}},
{CHK_4180,{3U,7U,0U}},
{CHK_4180,{4U,7U,0U}},
{CHK_4180,{5U,7U,0U}},
{CHK_4180,{6U,7U,0U}},
{CHK_4180,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CHK_4190,{0U,7U,0U}},
{CHK_4190,{1U,7U,0U}},
{CHK_4190,{2U,7U,0U}},
{CHK_4190,{3U,7U,0U}},
{CHK_4190,{4U,7U,0U}},
{CHK_4190,{5U,7U,0U}},
{CHK_4190,{6U,7U,0U}},
{CHK_4190,{7U,7U,0U}},
{CHK_4198,{0U,7U,0U}},
{CHK_4198,{1U,7U,0U}},
{CHK_4198,{2U,7U,0U}},
{CHK_4198,{3U,7U,0U}},
{CHK_4198,{4U,7U,0U}},
{CHK_4198,{5U,7U,0U}},
{CHK_4198,{6U,7U,0U}},
{CHK_4198,{7U,7U,0U}},
{CHK_41A0,{0U,7U,0U}},
{CHK_41A0,{1U,7U,0U}},
{CHK_41A0,{2U,7U,0U}},
{CHK_41A0,{3U,7U,0U}},
{CHK_41A0,{4U,7U,0U}},
{CHK_41A0,{5U,7U,0U}},
{CHK_41A0,{6U,7U,0U}},
{CHK_41A0,{7U,7U,0U}},
{CHK_41A8,{0U,7U,0U}},
{CHK_41A8,{1U,7U,0U}},
{CHK_41A8,{2U,7U,0U}},
{CHK_41A8,{3U,7U,0U}},
{CHK_41A8,{4U,7U,0U}},
{CHK_41A8,{5U,7U,0U}},
{CHK_41A8,{6U,7U,0U}},
{CHK_41A8,{7U,7U,0U}},
{CHK_41B0,{0U,7U,0U}},
{CHK_41B0,{1U,7U,0U}},
{CHK_41B0,{2U,7U,0U}},
{CHK_41B0,{3U,7U,0U}},
{CHK_41B0,{4U,7U,0U}},
{CHK_41B0,{5U,7U,0U}},
{CHK_41B0,{6U,7U,0U}},
{CHK_41B0,{7U,7U,0U}},
{CHK_41B8,{0U,7U,0U}},
{CHK_41B9,{0U,7U,0U}},
{CHK_41BA,{0U,7U,0U}},
{CHK_41BB,{0U,7U,0U}},
{CHK_41BC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41D0,{0U,7U,0U}},
{LEA_41D0,{1U,7U,0U}},
{LEA_41D0,{2U,7U,0U}},
{LEA_41D0,{3U,7U,0U}},
{LEA_41D0,{4U,7U,0U}},
{LEA_41D0,{5U,7U,0U}},
{LEA_41D0,{6U,7U,0U}},
{LEA_41D0,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LEA_41E8,{0U,7U,0U}},
{LEA_41E8,{1U,7U,0U}},
{LEA_41E8,{2U,7U,0U}},
{LEA_41E8,{3U,7U,0U}},
{LEA_41E8,{4U,7U,0U}},
{LEA_41E8,{5U,7U,0U}},
{LEA_41E8,{6U,7U,0U}},
{LEA_41E8,{7U,7U,0U}},
{LEA_41F0,{0U,7U,0U}},
{LEA_41F0,{1U,7U,0U}},
{LEA_41F0,{2U,7U,0U}},
{LEA_41F0,{3U,7U,0U}},
{LEA_41F0,{4U,7U,0U}},
{LEA_41F0,{5U,7U,0U}},
{LEA_41F0,{6U,7U,0U}},
{LEA_41F0,{7U,7U,0U}},
{LEA_41F8,{0U,7U,0U}},
{LEA_41F9,{0U,7U,0U}},
{LEA_41FA,{0U,7U,0U}},
{LEA_41FB,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5000,{0U,8U,0U}},
{ADDQ_5000,{1U,8U,0U}},
{ADDQ_5000,{2U,8U,0U}},
{ADDQ_5000,{3U,8U,0U}},
{ADDQ_5000,{4U,8U,0U}},
{ADDQ_5000,{5U,8U,0U}},
{ADDQ_5000,{6U,8U,0U}},
{ADDQ_5000,{7U,8U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5010,{0U,8U,0U}},
{ADDQ_5010,{1U,8U,0U}},
{ADDQ_5010,{2U,8U,0U}},
{ADDQ_5010,{3U,8U,0U}},
{ADDQ_5010,{4U,8U,0U}},
{ADDQ_5010,{5U,8U,0U}},
{ADDQ_5010,{6U,8U,0U}},
{ADDQ_5010,{7U,8U,0U}},
{ADDQ_5018,{0U,8U,0U}},
{ADDQ_5018,{1U,8U,0U}},
{ADDQ_5018,{2U,8U,0U}},
{ADDQ_5018,{3U,8U,0U}},
{ADDQ_5018,{4U,8U,0U}},
{ADDQ_5018,{5U,8U,0U}},
{ADDQ_5018,{6U,8U,0U}},
{ADDQ_5018,{7U,8U,0U}},
{ADDQ_5020,{0U,8U,0U}},
{ADDQ_5020,{1U,8U,0U}},
{ADDQ_5020,{2U,8U,0U}},
{ADDQ_5020,{3U,8U,0U}},
{ADDQ_5020,{4U,8U,0U}},
{ADDQ_5020,{5U,8U,0U}},
{ADDQ_5020,{6U,8U,0U}},
{ADDQ_5020,{7U,8U,0U}},
{ADDQ_5028,{0U,8U,0U}},
{ADDQ_5028,{1U,8U,0U}},
{ADDQ_5028,{2U,8U,0U}},
{ADDQ_5028,{3U,8U,0U}},
{ADDQ_5028,{4U,8U,0U}},
{ADDQ_5028,{5U,8U,0U}},
{ADDQ_5028,{6U,8U,0U}},
{ADDQ_5028,{7U,8U,0U}},
{ADDQ_5030,{0U,8U,0U}},
{ADDQ_5030,{1U,8U,0U}},
{ADDQ_5030,{2U,8U,0U}},
{ADDQ_5030,{3U,8U,0U}},
{ADDQ_5030,{4U,8U,0U}},
{ADDQ_5030,{5U,8U,0U}},
{ADDQ_5030,{6U,8U,0U}},
{ADDQ_5030,{7U,8U,0U}},
{ADDQ_5038,{0U,8U,0U}},
{ADDQ_5039,{0U,8U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5040,{0U,8U,0U}},
{ADDQ_5040,{1U,8U,0U}},
{ADDQ_5040,{2U,8U,0U}},
{ADDQ_5040,{3U,8U,0U}},
{ADDQ_5040,{4U,8U,0U}},
{ADDQ_5040,{5U,8U,0U}},
{ADDQ_5040,{6U,8U,0U}},
{ADDQ_5040,{7U,8U,0U}},
{ADDQ_5048,{0U,8U,0U}},
{ADDQ_5048,{1U,8U,0U}},
{ADDQ_5048,{2U,8U,0U}},
{ADDQ_5048,{3U,8U,0U}},
{ADDQ_5048,{4U,8U,0U}},
{ADDQ_5048,{5U,8U,0U}},
{ADDQ_5048,{6U,8U,0U}},
{ADDQ_5048,{7U,8U,0U}},
{ADDQ_5050,{0U,8U,0U}},
{ADDQ_5050,{1U,8U,0U}},
{ADDQ_5050,{2U,8U,0U}},
{ADDQ_5050,{3U,8U,0U}},
{ADDQ_5050,{4U,8U,0U}},
{ADDQ_5050,{5U,8U,0U}},
{ADDQ_5050,{6U,8U,0U}},
{ADDQ_5050,{7U,8U,0U}},
{ADDQ_5058,{0U,8U,0U}},
{ADDQ_5058,{1U,8U,0U}},
{ADDQ_5058,{2U,8U,0U}},
{ADDQ_5058,{3U,8U,0U}},
{ADDQ_5058,{4U,8U,0U}},
{ADDQ_5058,{5U,8U,0U}},
{ADDQ_5058,{6U,8U,0U}},
{ADDQ_5058,{7U,8U,0U}},
{ADDQ_5060,{0U,8U,0U}},
{ADDQ_5060,{1U,8U,0U}},
{ADDQ_5060,{2U,8U,0U}},
{ADDQ_5060,{3U,8U,0U}},
{ADDQ_5060,{4U,8U,0U}},
{ADDQ_5060,{5U,8U,0U}},
{ADDQ_5060,{6U,8U,0U}},
{ADDQ_5060,{7U,8U,0U}},
{ADDQ_5068,{0U,8U,0U}},
{ADDQ_5068,{1U,8U,0U}},
{ADDQ_5068,{2U,8U,0U}},
{ADDQ_5068,{3U,8U,0U}},
{ADDQ_5068,{4U,8U,0U}},
{ADDQ_5068,{5U,8U,0U}},
{ADDQ_5068,{6U,8U,0U}},
{ADDQ_5068,{7U,8U,0U}},
{ADDQ_5070,{0U,8U,0U}},
{ADDQ_5070,{1U,8U,0U}},
{ADDQ_5070,{2U,8U,0U}},
{ADDQ_5070,{3U,8U,0U}},
{ADDQ_5070,{4U,8U,0U}},
{ADDQ_5070,{5U,8U,0U}},
{ADDQ_5070,{6U,8U,0U}},
{ADDQ_5070,{7U,8U,0U}},
{ADDQ_5078,{0U,8U,0U}},
{ADDQ_5079,{0U,8U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5080,{0U,8U,0U}},
{ADDQ_5080,{1U,8U,0U}},
{ADDQ_5080,{2U,8U,0U}},
{ADDQ_5080,{3U,8U,0U}},
{ADDQ_5080,{4U,8U,0U}},
{ADDQ_5080,{5U,8U,0U}},
{ADDQ_5080,{6U,8U,0U}},
{ADDQ_5080,{7U,8U,0U}},
{ADDQ_5088,{0U,8U,0U}},
{ADDQ_5088,{1U,8U,0U}},
{ADDQ_5088,{2U,8U,0U}},
{ADDQ_5088,{3U,8U,0U}},
{ADDQ_5088,{4U,8U,0U}},
{ADDQ_5088,{5U,8U,0U}},
{ADDQ_5088,{6U,8U,0U}},
{ADDQ_5088,{7U,8U,0U}},
{ADDQ_5090,{0U,8U,0U}},
{ADDQ_5090,{1U,8U,0U}},
{ADDQ_5090,{2U,8U,0U}},
{ADDQ_5090,{3U,8U,0U}},
{ADDQ_5090,{4U,8U,0U}},
{ADDQ_5090,{5U,8U,0U}},
{ADDQ_5090,{6U,8U,0U}},
{ADDQ_5090,{7U,8U,0U}},
{ADDQ_5098,{0U,8U,0U}},
{ADDQ_5098,{1U,8U,0U}},
{ADDQ_5098,{2U,8U,0U}},
{ADDQ_5098,{3U,8U,0U}},
{ADDQ_5098,{4U,8U,0U}},
{ADDQ_5098,{5U,8U,0U}},
{ADDQ_5098,{6U,8U,0U}},
{ADDQ_5098,{7U,8U,0U}},
{ADDQ_50A0,{0U,8U,0U}},
{ADDQ_50A0,{1U,8U,0U}},
{ADDQ_50A0,{2U,8U,0U}},
{ADDQ_50A0,{3U,8U,0U}},
{ADDQ_50A0,{4U,8U,0U}},
{ADDQ_50A0,{5U,8U,0U}},
{ADDQ_50A0,{6U,8U,0U}},
{ADDQ_50A0,{7U,8U,0U}},
{ADDQ_50A8,{0U,8U,0U}},
{ADDQ_50A8,{1U,8U,0U}},
{ADDQ_50A8,{2U,8U,0U}},
{ADDQ_50A8,{3U,8U,0U}},
{ADDQ_50A8,{4U,8U,0U}},
{ADDQ_50A8,{5U,8U,0U}},
{ADDQ_50A8,{6U,8U,0U}},
{ADDQ_50A8,{7U,8U,0U}},
{ADDQ_50B0,{0U,8U,0U}},
{ADDQ_50B0,{1U,8U,0U}},
{ADDQ_50B0,{2U,8U,0U}},
{ADDQ_50B0,{3U,8U,0U}},
{ADDQ_50B0,{4U,8U,0U}},
{ADDQ_50B0,{5U,8U,0U}},
{ADDQ_50B0,{6U,8U,0U}},
{ADDQ_50B0,{7U,8U,0U}},
{ADDQ_50B8,{0U,8U,0U}},
{ADDQ_50B9,{0U,8U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,0U,0U}},
{SCC_50C0,{1U,0U,0U}},
{SCC_50C0,{2U,0U,0U}},
{SCC_50C0,{3U,0U,0U}},
{SCC_50C0,{4U,0U,0U}},
{SCC_50C0,{5U,0U,0U}},
{SCC_50C0,{6U,0U,0U}},
{SCC_50C0,{7U,0U,0U}},
{DBCC_50C8,{0U,0U,0U}},
{DBCC_50C8,{0U,1U,0U}},
{DBCC_50C8,{0U,2U,0U}},
{DBCC_50C8,{0U,3U,0U}},
{DBCC_50C8,{0U,4U,0U}},
{DBCC_50C8,{0U,5U,0U}},
{DBCC_50C8,{0U,6U,0U}},
{DBCC_50C8,{0U,7U,0U}},
{SCC_50D0,{0U,0U,0U}},
{SCC_50D0,{1U,0U,0U}},
{SCC_50D0,{2U,0U,0U}},
{SCC_50D0,{3U,0U,0U}},
{SCC_50D0,{4U,0U,0U}},
{SCC_50D0,{5U,0U,0U}},
{SCC_50D0,{6U,0U,0U}},
{SCC_50D0,{7U,0U,0U}},
{SCC_50D8,{0U,0U,0U}},
{SCC_50D8,{1U,0U,0U}},
{SCC_50D8,{2U,0U,0U}},
{SCC_50D8,{3U,0U,0U}},
{SCC_50D8,{4U,0U,0U}},
{SCC_50D8,{5U,0U,0U}},
{SCC_50D8,{6U,0U,0U}},
{SCC_50D8,{7U,0U,0U}},
{SCC_50E0,{0U,0U,0U}},
{SCC_50E0,{1U,0U,0U}},
{SCC_50E0,{2U,0U,0U}},
{SCC_50E0,{3U,0U,0U}},
{SCC_50E0,{4U,0U,0U}},
{SCC_50E0,{5U,0U,0U}},
{SCC_50E0,{6U,0U,0U}},
{SCC_50E0,{7U,0U,0U}},
{SCC_50E8,{0U,0U,0U}},
{SCC_50E8,{1U,0U,0U}},
{SCC_50E8,{2U,0U,0U}},
{SCC_50E8,{3U,0U,0U}},
{SCC_50E8,{4U,0U,0U}},
{SCC_50E8,{5U,0U,0U}},
{SCC_50E8,{6U,0U,0U}},
{SCC_50E8,{7U,0U,0U}},
{SCC_50F0,{0U,0U,0U}},
{SCC_50F0,{1U,0U,0U}},
{SCC_50F0,{2U,0U,0U}},
{SCC_50F0,{3U,0U,0U}},
{SCC_50F0,{4U,0U,0U}},
{SCC_50F0,{5U,0U,0U}},
{SCC_50F0,{6U,0U,0U}},
{SCC_50F0,{7U,0U,0U}},
{SCC_50F8,{0U,0U,0U}},
{SCC_50F9,{0U,0U,0U}},
{TRAPCC_50FA,{0U,0U,0U}},
{TRAPCC_50FB,{0U,0U,0U}},
{TRAPCC_50FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5100,{0U,8U,0U}},
{SUBQ_5100,{1U,8U,0U}},
{SUBQ_5100,{2U,8U,0U}},
{SUBQ_5100,{3U,8U,0U}},
{SUBQ_5100,{4U,8U,0U}},
{SUBQ_5100,{5U,8U,0U}},
{SUBQ_5100,{6U,8U,0U}},
{SUBQ_5100,{7U,8U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5110,{0U,8U,0U}},
{SUBQ_5110,{1U,8U,0U}},
{SUBQ_5110,{2U,8U,0U}},
{SUBQ_5110,{3U,8U,0U}},
{SUBQ_5110,{4U,8U,0U}},
{SUBQ_5110,{5U,8U,0U}},
{SUBQ_5110,{6U,8U,0U}},
{SUBQ_5110,{7U,8U,0U}},
{SUBQ_5118,{0U,8U,0U}},
{SUBQ_5118,{1U,8U,0U}},
{SUBQ_5118,{2U,8U,0U}},
{SUBQ_5118,{3U,8U,0U}},
{SUBQ_5118,{4U,8U,0U}},
{SUBQ_5118,{5U,8U,0U}},
{SUBQ_5118,{6U,8U,0U}},
{SUBQ_5118,{7U,8U,0U}},
{SUBQ_5120,{0U,8U,0U}},
{SUBQ_5120,{1U,8U,0U}},
{SUBQ_5120,{2U,8U,0U}},
{SUBQ_5120,{3U,8U,0U}},
{SUBQ_5120,{4U,8U,0U}},
{SUBQ_5120,{5U,8U,0U}},
{SUBQ_5120,{6U,8U,0U}},
{SUBQ_5120,{7U,8U,0U}},
{SUBQ_5128,{0U,8U,0U}},
{SUBQ_5128,{1U,8U,0U}},
{SUBQ_5128,{2U,8U,0U}},
{SUBQ_5128,{3U,8U,0U}},
{SUBQ_5128,{4U,8U,0U}},
{SUBQ_5128,{5U,8U,0U}},
{SUBQ_5128,{6U,8U,0U}},
{SUBQ_5128,{7U,8U,0U}},
{SUBQ_5130,{0U,8U,0U}},
{SUBQ_5130,{1U,8U,0U}},
{SUBQ_5130,{2U,8U,0U}},
{SUBQ_5130,{3U,8U,0U}},
{SUBQ_5130,{4U,8U,0U}},
{SUBQ_5130,{5U,8U,0U}},
{SUBQ_5130,{6U,8U,0U}},
{SUBQ_5130,{7U,8U,0U}},
{SUBQ_5138,{0U,8U,0U}},
{SUBQ_5139,{0U,8U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5140,{0U,8U,0U}},
{SUBQ_5140,{1U,8U,0U}},
{SUBQ_5140,{2U,8U,0U}},
{SUBQ_5140,{3U,8U,0U}},
{SUBQ_5140,{4U,8U,0U}},
{SUBQ_5140,{5U,8U,0U}},
{SUBQ_5140,{6U,8U,0U}},
{SUBQ_5140,{7U,8U,0U}},
{SUBQ_5148,{0U,8U,0U}},
{SUBQ_5148,{1U,8U,0U}},
{SUBQ_5148,{2U,8U,0U}},
{SUBQ_5148,{3U,8U,0U}},
{SUBQ_5148,{4U,8U,0U}},
{SUBQ_5148,{5U,8U,0U}},
{SUBQ_5148,{6U,8U,0U}},
{SUBQ_5148,{7U,8U,0U}},
{SUBQ_5150,{0U,8U,0U}},
{SUBQ_5150,{1U,8U,0U}},
{SUBQ_5150,{2U,8U,0U}},
{SUBQ_5150,{3U,8U,0U}},
{SUBQ_5150,{4U,8U,0U}},
{SUBQ_5150,{5U,8U,0U}},
{SUBQ_5150,{6U,8U,0U}},
{SUBQ_5150,{7U,8U,0U}},
{SUBQ_5158,{0U,8U,0U}},
{SUBQ_5158,{1U,8U,0U}},
{SUBQ_5158,{2U,8U,0U}},
{SUBQ_5158,{3U,8U,0U}},
{SUBQ_5158,{4U,8U,0U}},
{SUBQ_5158,{5U,8U,0U}},
{SUBQ_5158,{6U,8U,0U}},
{SUBQ_5158,{7U,8U,0U}},
{SUBQ_5160,{0U,8U,0U}},
{SUBQ_5160,{1U,8U,0U}},
{SUBQ_5160,{2U,8U,0U}},
{SUBQ_5160,{3U,8U,0U}},
{SUBQ_5160,{4U,8U,0U}},
{SUBQ_5160,{5U,8U,0U}},
{SUBQ_5160,{6U,8U,0U}},
{SUBQ_5160,{7U,8U,0U}},
{SUBQ_5168,{0U,8U,0U}},
{SUBQ_5168,{1U,8U,0U}},
{SUBQ_5168,{2U,8U,0U}},
{SUBQ_5168,{3U,8U,0U}},
{SUBQ_5168,{4U,8U,0U}},
{SUBQ_5168,{5U,8U,0U}},
{SUBQ_5168,{6U,8U,0U}},
{SUBQ_5168,{7U,8U,0U}},
{SUBQ_5170,{0U,8U,0U}},
{SUBQ_5170,{1U,8U,0U}},
{SUBQ_5170,{2U,8U,0U}},
{SUBQ_5170,{3U,8U,0U}},
{SUBQ_5170,{4U,8U,0U}},
{SUBQ_5170,{5U,8U,0U}},
{SUBQ_5170,{6U,8U,0U}},
{SUBQ_5170,{7U,8U,0U}},
{SUBQ_5178,{0U,8U,0U}},
{SUBQ_5179,{0U,8U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5180,{0U,8U,0U}},
{SUBQ_5180,{1U,8U,0U}},
{SUBQ_5180,{2U,8U,0U}},
{SUBQ_5180,{3U,8U,0U}},
{SUBQ_5180,{4U,8U,0U}},
{SUBQ_5180,{5U,8U,0U}},
{SUBQ_5180,{6U,8U,0U}},
{SUBQ_5180,{7U,8U,0U}},
{SUBQ_5188,{0U,8U,0U}},
{SUBQ_5188,{1U,8U,0U}},
{SUBQ_5188,{2U,8U,0U}},
{SUBQ_5188,{3U,8U,0U}},
{SUBQ_5188,{4U,8U,0U}},
{SUBQ_5188,{5U,8U,0U}},
{SUBQ_5188,{6U,8U,0U}},
{SUBQ_5188,{7U,8U,0U}},
{SUBQ_5190,{0U,8U,0U}},
{SUBQ_5190,{1U,8U,0U}},
{SUBQ_5190,{2U,8U,0U}},
{SUBQ_5190,{3U,8U,0U}},
{SUBQ_5190,{4U,8U,0U}},
{SUBQ_5190,{5U,8U,0U}},
{SUBQ_5190,{6U,8U,0U}},
{SUBQ_5190,{7U,8U,0U}},
{SUBQ_5198,{0U,8U,0U}},
{SUBQ_5198,{1U,8U,0U}},
{SUBQ_5198,{2U,8U,0U}},
{SUBQ_5198,{3U,8U,0U}},
{SUBQ_5198,{4U,8U,0U}},
{SUBQ_5198,{5U,8U,0U}},
{SUBQ_5198,{6U,8U,0U}},
{SUBQ_5198,{7U,8U,0U}},
{SUBQ_51A0,{0U,8U,0U}},
{SUBQ_51A0,{1U,8U,0U}},
{SUBQ_51A0,{2U,8U,0U}},
{SUBQ_51A0,{3U,8U,0U}},
{SUBQ_51A0,{4U,8U,0U}},
{SUBQ_51A0,{5U,8U,0U}},
{SUBQ_51A0,{6U,8U,0U}},
{SUBQ_51A0,{7U,8U,0U}},
{SUBQ_51A8,{0U,8U,0U}},
{SUBQ_51A8,{1U,8U,0U}},
{SUBQ_51A8,{2U,8U,0U}},
{SUBQ_51A8,{3U,8U,0U}},
{SUBQ_51A8,{4U,8U,0U}},
{SUBQ_51A8,{5U,8U,0U}},
{SUBQ_51A8,{6U,8U,0U}},
{SUBQ_51A8,{7U,8U,0U}},
{SUBQ_51B0,{0U,8U,0U}},
{SUBQ_51B0,{1U,8U,0U}},
{SUBQ_51B0,{2U,8U,0U}},
{SUBQ_51B0,{3U,8U,0U}},
{SUBQ_51B0,{4U,8U,0U}},
{SUBQ_51B0,{5U,8U,0U}},
{SUBQ_51B0,{6U,8U,0U}},
{SUBQ_51B0,{7U,8U,0U}},
{SUBQ_51B8,{0U,8U,0U}},
{SUBQ_51B9,{0U,8U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,1U,0U}},
{SCC_50C0,{1U,1U,0U}},
{SCC_50C0,{2U,1U,0U}},
{SCC_50C0,{3U,1U,0U}},
{SCC_50C0,{4U,1U,0U}},
{SCC_50C0,{5U,1U,0U}},
{SCC_50C0,{6U,1U,0U}},
{SCC_50C0,{7U,1U,0U}},
{DBCC_51C8,{0U,0U,0U}},
{DBCC_51C8,{0U,1U,0U}},
{DBCC_51C8,{0U,2U,0U}},
{DBCC_51C8,{0U,3U,0U}},
{DBCC_51C8,{0U,4U,0U}},
{DBCC_51C8,{0U,5U,0U}},
{DBCC_51C8,{0U,6U,0U}},
{DBCC_51C8,{0U,7U,0U}},
{SCC_50D0,{0U,1U,0U}},
{SCC_50D0,{1U,1U,0U}},
{SCC_50D0,{2U,1U,0U}},
{SCC_50D0,{3U,1U,0U}},
{SCC_50D0,{4U,1U,0U}},
{SCC_50D0,{5U,1U,0U}},
{SCC_50D0,{6U,1U,0U}},
{SCC_50D0,{7U,1U,0U}},
{SCC_50D8,{0U,1U,0U}},
{SCC_50D8,{1U,1U,0U}},
{SCC_50D8,{2U,1U,0U}},
{SCC_50D8,{3U,1U,0U}},
{SCC_50D8,{4U,1U,0U}},
{SCC_50D8,{5U,1U,0U}},
{SCC_50D8,{6U,1U,0U}},
{SCC_50D8,{7U,1U,0U}},
{SCC_50E0,{0U,1U,0U}},
{SCC_50E0,{1U,1U,0U}},
{SCC_50E0,{2U,1U,0U}},
{SCC_50E0,{3U,1U,0U}},
{SCC_50E0,{4U,1U,0U}},
{SCC_50E0,{5U,1U,0U}},
{SCC_50E0,{6U,1U,0U}},
{SCC_50E0,{7U,1U,0U}},
{SCC_50E8,{0U,1U,0U}},
{SCC_50E8,{1U,1U,0U}},
{SCC_50E8,{2U,1U,0U}},
{SCC_50E8,{3U,1U,0U}},
{SCC_50E8,{4U,1U,0U}},
{SCC_50E8,{5U,1U,0U}},
{SCC_50E8,{6U,1U,0U}},
{SCC_50E8,{7U,1U,0U}},
{SCC_50F0,{0U,1U,0U}},
{SCC_50F0,{1U,1U,0U}},
{SCC_50F0,{2U,1U,0U}},
{SCC_50F0,{3U,1U,0U}},
{SCC_50F0,{4U,1U,0U}},
{SCC_50F0,{5U,1U,0U}},
{SCC_50F0,{6U,1U,0U}},
{SCC_50F0,{7U,1U,0U}},
{SCC_50F8,{0U,1U,0U}},
{SCC_50F9,{0U,1U,0U}},
{TRAPCC_51FA,{0U,0U,0U}},
{TRAPCC_51FB,{0U,0U,0U}},
{TRAPCC_51FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5000,{0U,1U,0U}},
{ADDQ_5000,{1U,1U,0U}},
{ADDQ_5000,{2U,1U,0U}},
{ADDQ_5000,{3U,1U,0U}},
{ADDQ_5000,{4U,1U,0U}},
{ADDQ_5000,{5U,1U,0U}},
{ADDQ_5000,{6U,1U,0U}},
{ADDQ_5000,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5010,{0U,1U,0U}},
{ADDQ_5010,{1U,1U,0U}},
{ADDQ_5010,{2U,1U,0U}},
{ADDQ_5010,{3U,1U,0U}},
{ADDQ_5010,{4U,1U,0U}},
{ADDQ_5010,{5U,1U,0U}},
{ADDQ_5010,{6U,1U,0U}},
{ADDQ_5010,{7U,1U,0U}},
{ADDQ_5018,{0U,1U,0U}},
{ADDQ_5018,{1U,1U,0U}},
{ADDQ_5018,{2U,1U,0U}},
{ADDQ_5018,{3U,1U,0U}},
{ADDQ_5018,{4U,1U,0U}},
{ADDQ_5018,{5U,1U,0U}},
{ADDQ_5018,{6U,1U,0U}},
{ADDQ_5018,{7U,1U,0U}},
{ADDQ_5020,{0U,1U,0U}},
{ADDQ_5020,{1U,1U,0U}},
{ADDQ_5020,{2U,1U,0U}},
{ADDQ_5020,{3U,1U,0U}},
{ADDQ_5020,{4U,1U,0U}},
{ADDQ_5020,{5U,1U,0U}},
{ADDQ_5020,{6U,1U,0U}},
{ADDQ_5020,{7U,1U,0U}},
{ADDQ_5028,{0U,1U,0U}},
{ADDQ_5028,{1U,1U,0U}},
{ADDQ_5028,{2U,1U,0U}},
{ADDQ_5028,{3U,1U,0U}},
{ADDQ_5028,{4U,1U,0U}},
{ADDQ_5028,{5U,1U,0U}},
{ADDQ_5028,{6U,1U,0U}},
{ADDQ_5028,{7U,1U,0U}},
{ADDQ_5030,{0U,1U,0U}},
{ADDQ_5030,{1U,1U,0U}},
{ADDQ_5030,{2U,1U,0U}},
{ADDQ_5030,{3U,1U,0U}},
{ADDQ_5030,{4U,1U,0U}},
{ADDQ_5030,{5U,1U,0U}},
{ADDQ_5030,{6U,1U,0U}},
{ADDQ_5030,{7U,1U,0U}},
{ADDQ_5038,{0U,1U,0U}},
{ADDQ_5039,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5040,{0U,1U,0U}},
{ADDQ_5040,{1U,1U,0U}},
{ADDQ_5040,{2U,1U,0U}},
{ADDQ_5040,{3U,1U,0U}},
{ADDQ_5040,{4U,1U,0U}},
{ADDQ_5040,{5U,1U,0U}},
{ADDQ_5040,{6U,1U,0U}},
{ADDQ_5040,{7U,1U,0U}},
{ADDQ_5048,{0U,1U,0U}},
{ADDQ_5048,{1U,1U,0U}},
{ADDQ_5048,{2U,1U,0U}},
{ADDQ_5048,{3U,1U,0U}},
{ADDQ_5048,{4U,1U,0U}},
{ADDQ_5048,{5U,1U,0U}},
{ADDQ_5048,{6U,1U,0U}},
{ADDQ_5048,{7U,1U,0U}},
{ADDQ_5050,{0U,1U,0U}},
{ADDQ_5050,{1U,1U,0U}},
{ADDQ_5050,{2U,1U,0U}},
{ADDQ_5050,{3U,1U,0U}},
{ADDQ_5050,{4U,1U,0U}},
{ADDQ_5050,{5U,1U,0U}},
{ADDQ_5050,{6U,1U,0U}},
{ADDQ_5050,{7U,1U,0U}},
{ADDQ_5058,{0U,1U,0U}},
{ADDQ_5058,{1U,1U,0U}},
{ADDQ_5058,{2U,1U,0U}},
{ADDQ_5058,{3U,1U,0U}},
{ADDQ_5058,{4U,1U,0U}},
{ADDQ_5058,{5U,1U,0U}},
{ADDQ_5058,{6U,1U,0U}},
{ADDQ_5058,{7U,1U,0U}},
{ADDQ_5060,{0U,1U,0U}},
{ADDQ_5060,{1U,1U,0U}},
{ADDQ_5060,{2U,1U,0U}},
{ADDQ_5060,{3U,1U,0U}},
{ADDQ_5060,{4U,1U,0U}},
{ADDQ_5060,{5U,1U,0U}},
{ADDQ_5060,{6U,1U,0U}},
{ADDQ_5060,{7U,1U,0U}},
{ADDQ_5068,{0U,1U,0U}},
{ADDQ_5068,{1U,1U,0U}},
{ADDQ_5068,{2U,1U,0U}},
{ADDQ_5068,{3U,1U,0U}},
{ADDQ_5068,{4U,1U,0U}},
{ADDQ_5068,{5U,1U,0U}},
{ADDQ_5068,{6U,1U,0U}},
{ADDQ_5068,{7U,1U,0U}},
{ADDQ_5070,{0U,1U,0U}},
{ADDQ_5070,{1U,1U,0U}},
{ADDQ_5070,{2U,1U,0U}},
{ADDQ_5070,{3U,1U,0U}},
{ADDQ_5070,{4U,1U,0U}},
{ADDQ_5070,{5U,1U,0U}},
{ADDQ_5070,{6U,1U,0U}},
{ADDQ_5070,{7U,1U,0U}},
{ADDQ_5078,{0U,1U,0U}},
{ADDQ_5079,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5080,{0U,1U,0U}},
{ADDQ_5080,{1U,1U,0U}},
{ADDQ_5080,{2U,1U,0U}},
{ADDQ_5080,{3U,1U,0U}},
{ADDQ_5080,{4U,1U,0U}},
{ADDQ_5080,{5U,1U,0U}},
{ADDQ_5080,{6U,1U,0U}},
{ADDQ_5080,{7U,1U,0U}},
{ADDQ_5088,{0U,1U,0U}},
{ADDQ_5088,{1U,1U,0U}},
{ADDQ_5088,{2U,1U,0U}},
{ADDQ_5088,{3U,1U,0U}},
{ADDQ_5088,{4U,1U,0U}},
{ADDQ_5088,{5U,1U,0U}},
{ADDQ_5088,{6U,1U,0U}},
{ADDQ_5088,{7U,1U,0U}},
{ADDQ_5090,{0U,1U,0U}},
{ADDQ_5090,{1U,1U,0U}},
{ADDQ_5090,{2U,1U,0U}},
{ADDQ_5090,{3U,1U,0U}},
{ADDQ_5090,{4U,1U,0U}},
{ADDQ_5090,{5U,1U,0U}},
{ADDQ_5090,{6U,1U,0U}},
{ADDQ_5090,{7U,1U,0U}},
{ADDQ_5098,{0U,1U,0U}},
{ADDQ_5098,{1U,1U,0U}},
{ADDQ_5098,{2U,1U,0U}},
{ADDQ_5098,{3U,1U,0U}},
{ADDQ_5098,{4U,1U,0U}},
{ADDQ_5098,{5U,1U,0U}},
{ADDQ_5098,{6U,1U,0U}},
{ADDQ_5098,{7U,1U,0U}},
{ADDQ_50A0,{0U,1U,0U}},
{ADDQ_50A0,{1U,1U,0U}},
{ADDQ_50A0,{2U,1U,0U}},
{ADDQ_50A0,{3U,1U,0U}},
{ADDQ_50A0,{4U,1U,0U}},
{ADDQ_50A0,{5U,1U,0U}},
{ADDQ_50A0,{6U,1U,0U}},
{ADDQ_50A0,{7U,1U,0U}},
{ADDQ_50A8,{0U,1U,0U}},
{ADDQ_50A8,{1U,1U,0U}},
{ADDQ_50A8,{2U,1U,0U}},
{ADDQ_50A8,{3U,1U,0U}},
{ADDQ_50A8,{4U,1U,0U}},
{ADDQ_50A8,{5U,1U,0U}},
{ADDQ_50A8,{6U,1U,0U}},
{ADDQ_50A8,{7U,1U,0U}},
{ADDQ_50B0,{0U,1U,0U}},
{ADDQ_50B0,{1U,1U,0U}},
{ADDQ_50B0,{2U,1U,0U}},
{ADDQ_50B0,{3U,1U,0U}},
{ADDQ_50B0,{4U,1U,0U}},
{ADDQ_50B0,{5U,1U,0U}},
{ADDQ_50B0,{6U,1U,0U}},
{ADDQ_50B0,{7U,1U,0U}},
{ADDQ_50B8,{0U,1U,0U}},
{ADDQ_50B9,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,2U,0U}},
{SCC_50C0,{1U,2U,0U}},
{SCC_50C0,{2U,2U,0U}},
{SCC_50C0,{3U,2U,0U}},
{SCC_50C0,{4U,2U,0U}},
{SCC_50C0,{5U,2U,0U}},
{SCC_50C0,{6U,2U,0U}},
{SCC_50C0,{7U,2U,0U}},
{DBCC_52C8,{0U,0U,0U}},
{DBCC_52C8,{0U,1U,0U}},
{DBCC_52C8,{0U,2U,0U}},
{DBCC_52C8,{0U,3U,0U}},
{DBCC_52C8,{0U,4U,0U}},
{DBCC_52C8,{0U,5U,0U}},
{DBCC_52C8,{0U,6U,0U}},
{DBCC_52C8,{0U,7U,0U}},
{SCC_50D0,{0U,2U,0U}},
{SCC_50D0,{1U,2U,0U}},
{SCC_50D0,{2U,2U,0U}},
{SCC_50D0,{3U,2U,0U}},
{SCC_50D0,{4U,2U,0U}},
{SCC_50D0,{5U,2U,0U}},
{SCC_50D0,{6U,2U,0U}},
{SCC_50D0,{7U,2U,0U}},
{SCC_50D8,{0U,2U,0U}},
{SCC_50D8,{1U,2U,0U}},
{SCC_50D8,{2U,2U,0U}},
{SCC_50D8,{3U,2U,0U}},
{SCC_50D8,{4U,2U,0U}},
{SCC_50D8,{5U,2U,0U}},
{SCC_50D8,{6U,2U,0U}},
{SCC_50D8,{7U,2U,0U}},
{SCC_50E0,{0U,2U,0U}},
{SCC_50E0,{1U,2U,0U}},
{SCC_50E0,{2U,2U,0U}},
{SCC_50E0,{3U,2U,0U}},
{SCC_50E0,{4U,2U,0U}},
{SCC_50E0,{5U,2U,0U}},
{SCC_50E0,{6U,2U,0U}},
{SCC_50E0,{7U,2U,0U}},
{SCC_50E8,{0U,2U,0U}},
{SCC_50E8,{1U,2U,0U}},
{SCC_50E8,{2U,2U,0U}},
{SCC_50E8,{3U,2U,0U}},
{SCC_50E8,{4U,2U,0U}},
{SCC_50E8,{5U,2U,0U}},
{SCC_50E8,{6U,2U,0U}},
{SCC_50E8,{7U,2U,0U}},
{SCC_50F0,{0U,2U,0U}},
{SCC_50F0,{1U,2U,0U}},
{SCC_50F0,{2U,2U,0U}},
{SCC_50F0,{3U,2U,0U}},
{SCC_50F0,{4U,2U,0U}},
{SCC_50F0,{5U,2U,0U}},
{SCC_50F0,{6U,2U,0U}},
{SCC_50F0,{7U,2U,0U}},
{SCC_50F8,{0U,2U,0U}},
{SCC_50F9,{0U,2U,0U}},
{TRAPCC_52FA,{0U,0U,0U}},
{TRAPCC_52FB,{0U,0U,0U}},
{TRAPCC_52FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5100,{0U,1U,0U}},
{SUBQ_5100,{1U,1U,0U}},
{SUBQ_5100,{2U,1U,0U}},
{SUBQ_5100,{3U,1U,0U}},
{SUBQ_5100,{4U,1U,0U}},
{SUBQ_5100,{5U,1U,0U}},
{SUBQ_5100,{6U,1U,0U}},
{SUBQ_5100,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5110,{0U,1U,0U}},
{SUBQ_5110,{1U,1U,0U}},
{SUBQ_5110,{2U,1U,0U}},
{SUBQ_5110,{3U,1U,0U}},
{SUBQ_5110,{4U,1U,0U}},
{SUBQ_5110,{5U,1U,0U}},
{SUBQ_5110,{6U,1U,0U}},
{SUBQ_5110,{7U,1U,0U}},
{SUBQ_5118,{0U,1U,0U}},
{SUBQ_5118,{1U,1U,0U}},
{SUBQ_5118,{2U,1U,0U}},
{SUBQ_5118,{3U,1U,0U}},
{SUBQ_5118,{4U,1U,0U}},
{SUBQ_5118,{5U,1U,0U}},
{SUBQ_5118,{6U,1U,0U}},
{SUBQ_5118,{7U,1U,0U}},
{SUBQ_5120,{0U,1U,0U}},
{SUBQ_5120,{1U,1U,0U}},
{SUBQ_5120,{2U,1U,0U}},
{SUBQ_5120,{3U,1U,0U}},
{SUBQ_5120,{4U,1U,0U}},
{SUBQ_5120,{5U,1U,0U}},
{SUBQ_5120,{6U,1U,0U}},
{SUBQ_5120,{7U,1U,0U}},
{SUBQ_5128,{0U,1U,0U}},
{SUBQ_5128,{1U,1U,0U}},
{SUBQ_5128,{2U,1U,0U}},
{SUBQ_5128,{3U,1U,0U}},
{SUBQ_5128,{4U,1U,0U}},
{SUBQ_5128,{5U,1U,0U}},
{SUBQ_5128,{6U,1U,0U}},
{SUBQ_5128,{7U,1U,0U}},
{SUBQ_5130,{0U,1U,0U}},
{SUBQ_5130,{1U,1U,0U}},
{SUBQ_5130,{2U,1U,0U}},
{SUBQ_5130,{3U,1U,0U}},
{SUBQ_5130,{4U,1U,0U}},
{SUBQ_5130,{5U,1U,0U}},
{SUBQ_5130,{6U,1U,0U}},
{SUBQ_5130,{7U,1U,0U}},
{SUBQ_5138,{0U,1U,0U}},
{SUBQ_5139,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5140,{0U,1U,0U}},
{SUBQ_5140,{1U,1U,0U}},
{SUBQ_5140,{2U,1U,0U}},
{SUBQ_5140,{3U,1U,0U}},
{SUBQ_5140,{4U,1U,0U}},
{SUBQ_5140,{5U,1U,0U}},
{SUBQ_5140,{6U,1U,0U}},
{SUBQ_5140,{7U,1U,0U}},
{SUBQ_5148,{0U,1U,0U}},
{SUBQ_5148,{1U,1U,0U}},
{SUBQ_5148,{2U,1U,0U}},
{SUBQ_5148,{3U,1U,0U}},
{SUBQ_5148,{4U,1U,0U}},
{SUBQ_5148,{5U,1U,0U}},
{SUBQ_5148,{6U,1U,0U}},
{SUBQ_5148,{7U,1U,0U}},
{SUBQ_5150,{0U,1U,0U}},
{SUBQ_5150,{1U,1U,0U}},
{SUBQ_5150,{2U,1U,0U}},
{SUBQ_5150,{3U,1U,0U}},
{SUBQ_5150,{4U,1U,0U}},
{SUBQ_5150,{5U,1U,0U}},
{SUBQ_5150,{6U,1U,0U}},
{SUBQ_5150,{7U,1U,0U}},
{SUBQ_5158,{0U,1U,0U}},
{SUBQ_5158,{1U,1U,0U}},
{SUBQ_5158,{2U,1U,0U}},
{SUBQ_5158,{3U,1U,0U}},
{SUBQ_5158,{4U,1U,0U}},
{SUBQ_5158,{5U,1U,0U}},
{SUBQ_5158,{6U,1U,0U}},
{SUBQ_5158,{7U,1U,0U}},
{SUBQ_5160,{0U,1U,0U}},
{SUBQ_5160,{1U,1U,0U}},
{SUBQ_5160,{2U,1U,0U}},
{SUBQ_5160,{3U,1U,0U}},
{SUBQ_5160,{4U,1U,0U}},
{SUBQ_5160,{5U,1U,0U}},
{SUBQ_5160,{6U,1U,0U}},
{SUBQ_5160,{7U,1U,0U}},
{SUBQ_5168,{0U,1U,0U}},
{SUBQ_5168,{1U,1U,0U}},
{SUBQ_5168,{2U,1U,0U}},
{SUBQ_5168,{3U,1U,0U}},
{SUBQ_5168,{4U,1U,0U}},
{SUBQ_5168,{5U,1U,0U}},
{SUBQ_5168,{6U,1U,0U}},
{SUBQ_5168,{7U,1U,0U}},
{SUBQ_5170,{0U,1U,0U}},
{SUBQ_5170,{1U,1U,0U}},
{SUBQ_5170,{2U,1U,0U}},
{SUBQ_5170,{3U,1U,0U}},
{SUBQ_5170,{4U,1U,0U}},
{SUBQ_5170,{5U,1U,0U}},
{SUBQ_5170,{6U,1U,0U}},
{SUBQ_5170,{7U,1U,0U}},
{SUBQ_5178,{0U,1U,0U}},
{SUBQ_5179,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5180,{0U,1U,0U}},
{SUBQ_5180,{1U,1U,0U}},
{SUBQ_5180,{2U,1U,0U}},
{SUBQ_5180,{3U,1U,0U}},
{SUBQ_5180,{4U,1U,0U}},
{SUBQ_5180,{5U,1U,0U}},
{SUBQ_5180,{6U,1U,0U}},
{SUBQ_5180,{7U,1U,0U}},
{SUBQ_5188,{0U,1U,0U}},
{SUBQ_5188,{1U,1U,0U}},
{SUBQ_5188,{2U,1U,0U}},
{SUBQ_5188,{3U,1U,0U}},
{SUBQ_5188,{4U,1U,0U}},
{SUBQ_5188,{5U,1U,0U}},
{SUBQ_5188,{6U,1U,0U}},
{SUBQ_5188,{7U,1U,0U}},
{SUBQ_5190,{0U,1U,0U}},
{SUBQ_5190,{1U,1U,0U}},
{SUBQ_5190,{2U,1U,0U}},
{SUBQ_5190,{3U,1U,0U}},
{SUBQ_5190,{4U,1U,0U}},
{SUBQ_5190,{5U,1U,0U}},
{SUBQ_5190,{6U,1U,0U}},
{SUBQ_5190,{7U,1U,0U}},
{SUBQ_5198,{0U,1U,0U}},
{SUBQ_5198,{1U,1U,0U}},
{SUBQ_5198,{2U,1U,0U}},
{SUBQ_5198,{3U,1U,0U}},
{SUBQ_5198,{4U,1U,0U}},
{SUBQ_5198,{5U,1U,0U}},
{SUBQ_5198,{6U,1U,0U}},
{SUBQ_5198,{7U,1U,0U}},
{SUBQ_51A0,{0U,1U,0U}},
{SUBQ_51A0,{1U,1U,0U}},
{SUBQ_51A0,{2U,1U,0U}},
{SUBQ_51A0,{3U,1U,0U}},
{SUBQ_51A0,{4U,1U,0U}},
{SUBQ_51A0,{5U,1U,0U}},
{SUBQ_51A0,{6U,1U,0U}},
{SUBQ_51A0,{7U,1U,0U}},
{SUBQ_51A8,{0U,1U,0U}},
{SUBQ_51A8,{1U,1U,0U}},
{SUBQ_51A8,{2U,1U,0U}},
{SUBQ_51A8,{3U,1U,0U}},
{SUBQ_51A8,{4U,1U,0U}},
{SUBQ_51A8,{5U,1U,0U}},
{SUBQ_51A8,{6U,1U,0U}},
{SUBQ_51A8,{7U,1U,0U}},
{SUBQ_51B0,{0U,1U,0U}},
{SUBQ_51B0,{1U,1U,0U}},
{SUBQ_51B0,{2U,1U,0U}},
{SUBQ_51B0,{3U,1U,0U}},
{SUBQ_51B0,{4U,1U,0U}},
{SUBQ_51B0,{5U,1U,0U}},
{SUBQ_51B0,{6U,1U,0U}},
{SUBQ_51B0,{7U,1U,0U}},
{SUBQ_51B8,{0U,1U,0U}},
{SUBQ_51B9,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,3U,0U}},
{SCC_50C0,{1U,3U,0U}},
{SCC_50C0,{2U,3U,0U}},
{SCC_50C0,{3U,3U,0U}},
{SCC_50C0,{4U,3U,0U}},
{SCC_50C0,{5U,3U,0U}},
{SCC_50C0,{6U,3U,0U}},
{SCC_50C0,{7U,3U,0U}},
{DBCC_53C8,{0U,0U,0U}},
{DBCC_53C8,{0U,1U,0U}},
{DBCC_53C8,{0U,2U,0U}},
{DBCC_53C8,{0U,3U,0U}},
{DBCC_53C8,{0U,4U,0U}},
{DBCC_53C8,{0U,5U,0U}},
{DBCC_53C8,{0U,6U,0U}},
{DBCC_53C8,{0U,7U,0U}},
{SCC_50D0,{0U,3U,0U}},
{SCC_50D0,{1U,3U,0U}},
{SCC_50D0,{2U,3U,0U}},
{SCC_50D0,{3U,3U,0U}},
{SCC_50D0,{4U,3U,0U}},
{SCC_50D0,{5U,3U,0U}},
{SCC_50D0,{6U,3U,0U}},
{SCC_50D0,{7U,3U,0U}},
{SCC_50D8,{0U,3U,0U}},
{SCC_50D8,{1U,3U,0U}},
{SCC_50D8,{2U,3U,0U}},
{SCC_50D8,{3U,3U,0U}},
{SCC_50D8,{4U,3U,0U}},
{SCC_50D8,{5U,3U,0U}},
{SCC_50D8,{6U,3U,0U}},
{SCC_50D8,{7U,3U,0U}},
{SCC_50E0,{0U,3U,0U}},
{SCC_50E0,{1U,3U,0U}},
{SCC_50E0,{2U,3U,0U}},
{SCC_50E0,{3U,3U,0U}},
{SCC_50E0,{4U,3U,0U}},
{SCC_50E0,{5U,3U,0U}},
{SCC_50E0,{6U,3U,0U}},
{SCC_50E0,{7U,3U,0U}},
{SCC_50E8,{0U,3U,0U}},
{SCC_50E8,{1U,3U,0U}},
{SCC_50E8,{2U,3U,0U}},
{SCC_50E8,{3U,3U,0U}},
{SCC_50E8,{4U,3U,0U}},
{SCC_50E8,{5U,3U,0U}},
{SCC_50E8,{6U,3U,0U}},
{SCC_50E8,{7U,3U,0U}},
{SCC_50F0,{0U,3U,0U}},
{SCC_50F0,{1U,3U,0U}},
{SCC_50F0,{2U,3U,0U}},
{SCC_50F0,{3U,3U,0U}},
{SCC_50F0,{4U,3U,0U}},
{SCC_50F0,{5U,3U,0U}},
{SCC_50F0,{6U,3U,0U}},
{SCC_50F0,{7U,3U,0U}},
{SCC_50F8,{0U,3U,0U}},
{SCC_50F9,{0U,3U,0U}},
{TRAPCC_53FA,{0U,0U,0U}},
{TRAPCC_53FB,{0U,0U,0U}},
{TRAPCC_53FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5000,{0U,2U,0U}},
{ADDQ_5000,{1U,2U,0U}},
{ADDQ_5000,{2U,2U,0U}},
{ADDQ_5000,{3U,2U,0U}},
{ADDQ_5000,{4U,2U,0U}},
{ADDQ_5000,{5U,2U,0U}},
{ADDQ_5000,{6U,2U,0U}},
{ADDQ_5000,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5010,{0U,2U,0U}},
{ADDQ_5010,{1U,2U,0U}},
{ADDQ_5010,{2U,2U,0U}},
{ADDQ_5010,{3U,2U,0U}},
{ADDQ_5010,{4U,2U,0U}},
{ADDQ_5010,{5U,2U,0U}},
{ADDQ_5010,{6U,2U,0U}},
{ADDQ_5010,{7U,2U,0U}},
{ADDQ_5018,{0U,2U,0U}},
{ADDQ_5018,{1U,2U,0U}},
{ADDQ_5018,{2U,2U,0U}},
{ADDQ_5018,{3U,2U,0U}},
{ADDQ_5018,{4U,2U,0U}},
{ADDQ_5018,{5U,2U,0U}},
{ADDQ_5018,{6U,2U,0U}},
{ADDQ_5018,{7U,2U,0U}},
{ADDQ_5020,{0U,2U,0U}},
{ADDQ_5020,{1U,2U,0U}},
{ADDQ_5020,{2U,2U,0U}},
{ADDQ_5020,{3U,2U,0U}},
{ADDQ_5020,{4U,2U,0U}},
{ADDQ_5020,{5U,2U,0U}},
{ADDQ_5020,{6U,2U,0U}},
{ADDQ_5020,{7U,2U,0U}},
{ADDQ_5028,{0U,2U,0U}},
{ADDQ_5028,{1U,2U,0U}},
{ADDQ_5028,{2U,2U,0U}},
{ADDQ_5028,{3U,2U,0U}},
{ADDQ_5028,{4U,2U,0U}},
{ADDQ_5028,{5U,2U,0U}},
{ADDQ_5028,{6U,2U,0U}},
{ADDQ_5028,{7U,2U,0U}},
{ADDQ_5030,{0U,2U,0U}},
{ADDQ_5030,{1U,2U,0U}},
{ADDQ_5030,{2U,2U,0U}},
{ADDQ_5030,{3U,2U,0U}},
{ADDQ_5030,{4U,2U,0U}},
{ADDQ_5030,{5U,2U,0U}},
{ADDQ_5030,{6U,2U,0U}},
{ADDQ_5030,{7U,2U,0U}},
{ADDQ_5038,{0U,2U,0U}},
{ADDQ_5039,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5040,{0U,2U,0U}},
{ADDQ_5040,{1U,2U,0U}},
{ADDQ_5040,{2U,2U,0U}},
{ADDQ_5040,{3U,2U,0U}},
{ADDQ_5040,{4U,2U,0U}},
{ADDQ_5040,{5U,2U,0U}},
{ADDQ_5040,{6U,2U,0U}},
{ADDQ_5040,{7U,2U,0U}},
{ADDQ_5048,{0U,2U,0U}},
{ADDQ_5048,{1U,2U,0U}},
{ADDQ_5048,{2U,2U,0U}},
{ADDQ_5048,{3U,2U,0U}},
{ADDQ_5048,{4U,2U,0U}},
{ADDQ_5048,{5U,2U,0U}},
{ADDQ_5048,{6U,2U,0U}},
{ADDQ_5048,{7U,2U,0U}},
{ADDQ_5050,{0U,2U,0U}},
{ADDQ_5050,{1U,2U,0U}},
{ADDQ_5050,{2U,2U,0U}},
{ADDQ_5050,{3U,2U,0U}},
{ADDQ_5050,{4U,2U,0U}},
{ADDQ_5050,{5U,2U,0U}},
{ADDQ_5050,{6U,2U,0U}},
{ADDQ_5050,{7U,2U,0U}},
{ADDQ_5058,{0U,2U,0U}},
{ADDQ_5058,{1U,2U,0U}},
{ADDQ_5058,{2U,2U,0U}},
{ADDQ_5058,{3U,2U,0U}},
{ADDQ_5058,{4U,2U,0U}},
{ADDQ_5058,{5U,2U,0U}},
{ADDQ_5058,{6U,2U,0U}},
{ADDQ_5058,{7U,2U,0U}},
{ADDQ_5060,{0U,2U,0U}},
{ADDQ_5060,{1U,2U,0U}},
{ADDQ_5060,{2U,2U,0U}},
{ADDQ_5060,{3U,2U,0U}},
{ADDQ_5060,{4U,2U,0U}},
{ADDQ_5060,{5U,2U,0U}},
{ADDQ_5060,{6U,2U,0U}},
{ADDQ_5060,{7U,2U,0U}},
{ADDQ_5068,{0U,2U,0U}},
{ADDQ_5068,{1U,2U,0U}},
{ADDQ_5068,{2U,2U,0U}},
{ADDQ_5068,{3U,2U,0U}},
{ADDQ_5068,{4U,2U,0U}},
{ADDQ_5068,{5U,2U,0U}},
{ADDQ_5068,{6U,2U,0U}},
{ADDQ_5068,{7U,2U,0U}},
{ADDQ_5070,{0U,2U,0U}},
{ADDQ_5070,{1U,2U,0U}},
{ADDQ_5070,{2U,2U,0U}},
{ADDQ_5070,{3U,2U,0U}},
{ADDQ_5070,{4U,2U,0U}},
{ADDQ_5070,{5U,2U,0U}},
{ADDQ_5070,{6U,2U,0U}},
{ADDQ_5070,{7U,2U,0U}},
{ADDQ_5078,{0U,2U,0U}},
{ADDQ_5079,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5080,{0U,2U,0U}},
{ADDQ_5080,{1U,2U,0U}},
{ADDQ_5080,{2U,2U,0U}},
{ADDQ_5080,{3U,2U,0U}},
{ADDQ_5080,{4U,2U,0U}},
{ADDQ_5080,{5U,2U,0U}},
{ADDQ_5080,{6U,2U,0U}},
{ADDQ_5080,{7U,2U,0U}},
{ADDQ_5088,{0U,2U,0U}},
{ADDQ_5088,{1U,2U,0U}},
{ADDQ_5088,{2U,2U,0U}},
{ADDQ_5088,{3U,2U,0U}},
{ADDQ_5088,{4U,2U,0U}},
{ADDQ_5088,{5U,2U,0U}},
{ADDQ_5088,{6U,2U,0U}},
{ADDQ_5088,{7U,2U,0U}},
{ADDQ_5090,{0U,2U,0U}},
{ADDQ_5090,{1U,2U,0U}},
{ADDQ_5090,{2U,2U,0U}},
{ADDQ_5090,{3U,2U,0U}},
{ADDQ_5090,{4U,2U,0U}},
{ADDQ_5090,{5U,2U,0U}},
{ADDQ_5090,{6U,2U,0U}},
{ADDQ_5090,{7U,2U,0U}},
{ADDQ_5098,{0U,2U,0U}},
{ADDQ_5098,{1U,2U,0U}},
{ADDQ_5098,{2U,2U,0U}},
{ADDQ_5098,{3U,2U,0U}},
{ADDQ_5098,{4U,2U,0U}},
{ADDQ_5098,{5U,2U,0U}},
{ADDQ_5098,{6U,2U,0U}},
{ADDQ_5098,{7U,2U,0U}},
{ADDQ_50A0,{0U,2U,0U}},
{ADDQ_50A0,{1U,2U,0U}},
{ADDQ_50A0,{2U,2U,0U}},
{ADDQ_50A0,{3U,2U,0U}},
{ADDQ_50A0,{4U,2U,0U}},
{ADDQ_50A0,{5U,2U,0U}},
{ADDQ_50A0,{6U,2U,0U}},
{ADDQ_50A0,{7U,2U,0U}},
{ADDQ_50A8,{0U,2U,0U}},
{ADDQ_50A8,{1U,2U,0U}},
{ADDQ_50A8,{2U,2U,0U}},
{ADDQ_50A8,{3U,2U,0U}},
{ADDQ_50A8,{4U,2U,0U}},
{ADDQ_50A8,{5U,2U,0U}},
{ADDQ_50A8,{6U,2U,0U}},
{ADDQ_50A8,{7U,2U,0U}},
{ADDQ_50B0,{0U,2U,0U}},
{ADDQ_50B0,{1U,2U,0U}},
{ADDQ_50B0,{2U,2U,0U}},
{ADDQ_50B0,{3U,2U,0U}},
{ADDQ_50B0,{4U,2U,0U}},
{ADDQ_50B0,{5U,2U,0U}},
{ADDQ_50B0,{6U,2U,0U}},
{ADDQ_50B0,{7U,2U,0U}},
{ADDQ_50B8,{0U,2U,0U}},
{ADDQ_50B9,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,4U,0U}},
{SCC_50C0,{1U,4U,0U}},
{SCC_50C0,{2U,4U,0U}},
{SCC_50C0,{3U,4U,0U}},
{SCC_50C0,{4U,4U,0U}},
{SCC_50C0,{5U,4U,0U}},
{SCC_50C0,{6U,4U,0U}},
{SCC_50C0,{7U,4U,0U}},
{DBCC_54C8,{0U,0U,0U}},
{DBCC_54C8,{0U,1U,0U}},
{DBCC_54C8,{0U,2U,0U}},
{DBCC_54C8,{0U,3U,0U}},
{DBCC_54C8,{0U,4U,0U}},
{DBCC_54C8,{0U,5U,0U}},
{DBCC_54C8,{0U,6U,0U}},
{DBCC_54C8,{0U,7U,0U}},
{SCC_50D0,{0U,4U,0U}},
{SCC_50D0,{1U,4U,0U}},
{SCC_50D0,{2U,4U,0U}},
{SCC_50D0,{3U,4U,0U}},
{SCC_50D0,{4U,4U,0U}},
{SCC_50D0,{5U,4U,0U}},
{SCC_50D0,{6U,4U,0U}},
{SCC_50D0,{7U,4U,0U}},
{SCC_50D8,{0U,4U,0U}},
{SCC_50D8,{1U,4U,0U}},
{SCC_50D8,{2U,4U,0U}},
{SCC_50D8,{3U,4U,0U}},
{SCC_50D8,{4U,4U,0U}},
{SCC_50D8,{5U,4U,0U}},
{SCC_50D8,{6U,4U,0U}},
{SCC_50D8,{7U,4U,0U}},
{SCC_50E0,{0U,4U,0U}},
{SCC_50E0,{1U,4U,0U}},
{SCC_50E0,{2U,4U,0U}},
{SCC_50E0,{3U,4U,0U}},
{SCC_50E0,{4U,4U,0U}},
{SCC_50E0,{5U,4U,0U}},
{SCC_50E0,{6U,4U,0U}},
{SCC_50E0,{7U,4U,0U}},
{SCC_50E8,{0U,4U,0U}},
{SCC_50E8,{1U,4U,0U}},
{SCC_50E8,{2U,4U,0U}},
{SCC_50E8,{3U,4U,0U}},
{SCC_50E8,{4U,4U,0U}},
{SCC_50E8,{5U,4U,0U}},
{SCC_50E8,{6U,4U,0U}},
{SCC_50E8,{7U,4U,0U}},
{SCC_50F0,{0U,4U,0U}},
{SCC_50F0,{1U,4U,0U}},
{SCC_50F0,{2U,4U,0U}},
{SCC_50F0,{3U,4U,0U}},
{SCC_50F0,{4U,4U,0U}},
{SCC_50F0,{5U,4U,0U}},
{SCC_50F0,{6U,4U,0U}},
{SCC_50F0,{7U,4U,0U}},
{SCC_50F8,{0U,4U,0U}},
{SCC_50F9,{0U,4U,0U}},
{TRAPCC_54FA,{0U,0U,0U}},
{TRAPCC_54FB,{0U,0U,0U}},
{TRAPCC_54FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5100,{0U,2U,0U}},
{SUBQ_5100,{1U,2U,0U}},
{SUBQ_5100,{2U,2U,0U}},
{SUBQ_5100,{3U,2U,0U}},
{SUBQ_5100,{4U,2U,0U}},
{SUBQ_5100,{5U,2U,0U}},
{SUBQ_5100,{6U,2U,0U}},
{SUBQ_5100,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5110,{0U,2U,0U}},
{SUBQ_5110,{1U,2U,0U}},
{SUBQ_5110,{2U,2U,0U}},
{SUBQ_5110,{3U,2U,0U}},
{SUBQ_5110,{4U,2U,0U}},
{SUBQ_5110,{5U,2U,0U}},
{SUBQ_5110,{6U,2U,0U}},
{SUBQ_5110,{7U,2U,0U}},
{SUBQ_5118,{0U,2U,0U}},
{SUBQ_5118,{1U,2U,0U}},
{SUBQ_5118,{2U,2U,0U}},
{SUBQ_5118,{3U,2U,0U}},
{SUBQ_5118,{4U,2U,0U}},
{SUBQ_5118,{5U,2U,0U}},
{SUBQ_5118,{6U,2U,0U}},
{SUBQ_5118,{7U,2U,0U}},
{SUBQ_5120,{0U,2U,0U}},
{SUBQ_5120,{1U,2U,0U}},
{SUBQ_5120,{2U,2U,0U}},
{SUBQ_5120,{3U,2U,0U}},
{SUBQ_5120,{4U,2U,0U}},
{SUBQ_5120,{5U,2U,0U}},
{SUBQ_5120,{6U,2U,0U}},
{SUBQ_5120,{7U,2U,0U}},
{SUBQ_5128,{0U,2U,0U}},
{SUBQ_5128,{1U,2U,0U}},
{SUBQ_5128,{2U,2U,0U}},
{SUBQ_5128,{3U,2U,0U}},
{SUBQ_5128,{4U,2U,0U}},
{SUBQ_5128,{5U,2U,0U}},
{SUBQ_5128,{6U,2U,0U}},
{SUBQ_5128,{7U,2U,0U}},
{SUBQ_5130,{0U,2U,0U}},
{SUBQ_5130,{1U,2U,0U}},
{SUBQ_5130,{2U,2U,0U}},
{SUBQ_5130,{3U,2U,0U}},
{SUBQ_5130,{4U,2U,0U}},
{SUBQ_5130,{5U,2U,0U}},
{SUBQ_5130,{6U,2U,0U}},
{SUBQ_5130,{7U,2U,0U}},
{SUBQ_5138,{0U,2U,0U}},
{SUBQ_5139,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5140,{0U,2U,0U}},
{SUBQ_5140,{1U,2U,0U}},
{SUBQ_5140,{2U,2U,0U}},
{SUBQ_5140,{3U,2U,0U}},
{SUBQ_5140,{4U,2U,0U}},
{SUBQ_5140,{5U,2U,0U}},
{SUBQ_5140,{6U,2U,0U}},
{SUBQ_5140,{7U,2U,0U}},
{SUBQ_5148,{0U,2U,0U}},
{SUBQ_5148,{1U,2U,0U}},
{SUBQ_5148,{2U,2U,0U}},
{SUBQ_5148,{3U,2U,0U}},
{SUBQ_5148,{4U,2U,0U}},
{SUBQ_5148,{5U,2U,0U}},
{SUBQ_5148,{6U,2U,0U}},
{SUBQ_5148,{7U,2U,0U}},
{SUBQ_5150,{0U,2U,0U}},
{SUBQ_5150,{1U,2U,0U}},
{SUBQ_5150,{2U,2U,0U}},
{SUBQ_5150,{3U,2U,0U}},
{SUBQ_5150,{4U,2U,0U}},
{SUBQ_5150,{5U,2U,0U}},
{SUBQ_5150,{6U,2U,0U}},
{SUBQ_5150,{7U,2U,0U}},
{SUBQ_5158,{0U,2U,0U}},
{SUBQ_5158,{1U,2U,0U}},
{SUBQ_5158,{2U,2U,0U}},
{SUBQ_5158,{3U,2U,0U}},
{SUBQ_5158,{4U,2U,0U}},
{SUBQ_5158,{5U,2U,0U}},
{SUBQ_5158,{6U,2U,0U}},
{SUBQ_5158,{7U,2U,0U}},
{SUBQ_5160,{0U,2U,0U}},
{SUBQ_5160,{1U,2U,0U}},
{SUBQ_5160,{2U,2U,0U}},
{SUBQ_5160,{3U,2U,0U}},
{SUBQ_5160,{4U,2U,0U}},
{SUBQ_5160,{5U,2U,0U}},
{SUBQ_5160,{6U,2U,0U}},
{SUBQ_5160,{7U,2U,0U}},
{SUBQ_5168,{0U,2U,0U}},
{SUBQ_5168,{1U,2U,0U}},
{SUBQ_5168,{2U,2U,0U}},
{SUBQ_5168,{3U,2U,0U}},
{SUBQ_5168,{4U,2U,0U}},
{SUBQ_5168,{5U,2U,0U}},
{SUBQ_5168,{6U,2U,0U}},
{SUBQ_5168,{7U,2U,0U}},
{SUBQ_5170,{0U,2U,0U}},
{SUBQ_5170,{1U,2U,0U}},
{SUBQ_5170,{2U,2U,0U}},
{SUBQ_5170,{3U,2U,0U}},
{SUBQ_5170,{4U,2U,0U}},
{SUBQ_5170,{5U,2U,0U}},
{SUBQ_5170,{6U,2U,0U}},
{SUBQ_5170,{7U,2U,0U}},
{SUBQ_5178,{0U,2U,0U}},
{SUBQ_5179,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5180,{0U,2U,0U}},
{SUBQ_5180,{1U,2U,0U}},
{SUBQ_5180,{2U,2U,0U}},
{SUBQ_5180,{3U,2U,0U}},
{SUBQ_5180,{4U,2U,0U}},
{SUBQ_5180,{5U,2U,0U}},
{SUBQ_5180,{6U,2U,0U}},
{SUBQ_5180,{7U,2U,0U}},
{SUBQ_5188,{0U,2U,0U}},
{SUBQ_5188,{1U,2U,0U}},
{SUBQ_5188,{2U,2U,0U}},
{SUBQ_5188,{3U,2U,0U}},
{SUBQ_5188,{4U,2U,0U}},
{SUBQ_5188,{5U,2U,0U}},
{SUBQ_5188,{6U,2U,0U}},
{SUBQ_5188,{7U,2U,0U}},
{SUBQ_5190,{0U,2U,0U}},
{SUBQ_5190,{1U,2U,0U}},
{SUBQ_5190,{2U,2U,0U}},
{SUBQ_5190,{3U,2U,0U}},
{SUBQ_5190,{4U,2U,0U}},
{SUBQ_5190,{5U,2U,0U}},
{SUBQ_5190,{6U,2U,0U}},
{SUBQ_5190,{7U,2U,0U}},
{SUBQ_5198,{0U,2U,0U}},
{SUBQ_5198,{1U,2U,0U}},
{SUBQ_5198,{2U,2U,0U}},
{SUBQ_5198,{3U,2U,0U}},
{SUBQ_5198,{4U,2U,0U}},
{SUBQ_5198,{5U,2U,0U}},
{SUBQ_5198,{6U,2U,0U}},
{SUBQ_5198,{7U,2U,0U}},
{SUBQ_51A0,{0U,2U,0U}},
{SUBQ_51A0,{1U,2U,0U}},
{SUBQ_51A0,{2U,2U,0U}},
{SUBQ_51A0,{3U,2U,0U}},
{SUBQ_51A0,{4U,2U,0U}},
{SUBQ_51A0,{5U,2U,0U}},
{SUBQ_51A0,{6U,2U,0U}},
{SUBQ_51A0,{7U,2U,0U}},
{SUBQ_51A8,{0U,2U,0U}},
{SUBQ_51A8,{1U,2U,0U}},
{SUBQ_51A8,{2U,2U,0U}},
{SUBQ_51A8,{3U,2U,0U}},
{SUBQ_51A8,{4U,2U,0U}},
{SUBQ_51A8,{5U,2U,0U}},
{SUBQ_51A8,{6U,2U,0U}},
{SUBQ_51A8,{7U,2U,0U}},
{SUBQ_51B0,{0U,2U,0U}},
{SUBQ_51B0,{1U,2U,0U}},
{SUBQ_51B0,{2U,2U,0U}},
{SUBQ_51B0,{3U,2U,0U}},
{SUBQ_51B0,{4U,2U,0U}},
{SUBQ_51B0,{5U,2U,0U}},
{SUBQ_51B0,{6U,2U,0U}},
{SUBQ_51B0,{7U,2U,0U}},
{SUBQ_51B8,{0U,2U,0U}},
{SUBQ_51B9,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,5U,0U}},
{SCC_50C0,{1U,5U,0U}},
{SCC_50C0,{2U,5U,0U}},
{SCC_50C0,{3U,5U,0U}},
{SCC_50C0,{4U,5U,0U}},
{SCC_50C0,{5U,5U,0U}},
{SCC_50C0,{6U,5U,0U}},
{SCC_50C0,{7U,5U,0U}},
{DBCC_55C8,{0U,0U,0U}},
{DBCC_55C8,{0U,1U,0U}},
{DBCC_55C8,{0U,2U,0U}},
{DBCC_55C8,{0U,3U,0U}},
{DBCC_55C8,{0U,4U,0U}},
{DBCC_55C8,{0U,5U,0U}},
{DBCC_55C8,{0U,6U,0U}},
{DBCC_55C8,{0U,7U,0U}},
{SCC_50D0,{0U,5U,0U}},
{SCC_50D0,{1U,5U,0U}},
{SCC_50D0,{2U,5U,0U}},
{SCC_50D0,{3U,5U,0U}},
{SCC_50D0,{4U,5U,0U}},
{SCC_50D0,{5U,5U,0U}},
{SCC_50D0,{6U,5U,0U}},
{SCC_50D0,{7U,5U,0U}},
{SCC_50D8,{0U,5U,0U}},
{SCC_50D8,{1U,5U,0U}},
{SCC_50D8,{2U,5U,0U}},
{SCC_50D8,{3U,5U,0U}},
{SCC_50D8,{4U,5U,0U}},
{SCC_50D8,{5U,5U,0U}},
{SCC_50D8,{6U,5U,0U}},
{SCC_50D8,{7U,5U,0U}},
{SCC_50E0,{0U,5U,0U}},
{SCC_50E0,{1U,5U,0U}},
{SCC_50E0,{2U,5U,0U}},
{SCC_50E0,{3U,5U,0U}},
{SCC_50E0,{4U,5U,0U}},
{SCC_50E0,{5U,5U,0U}},
{SCC_50E0,{6U,5U,0U}},
{SCC_50E0,{7U,5U,0U}},
{SCC_50E8,{0U,5U,0U}},
{SCC_50E8,{1U,5U,0U}},
{SCC_50E8,{2U,5U,0U}},
{SCC_50E8,{3U,5U,0U}},
{SCC_50E8,{4U,5U,0U}},
{SCC_50E8,{5U,5U,0U}},
{SCC_50E8,{6U,5U,0U}},
{SCC_50E8,{7U,5U,0U}},
{SCC_50F0,{0U,5U,0U}},
{SCC_50F0,{1U,5U,0U}},
{SCC_50F0,{2U,5U,0U}},
{SCC_50F0,{3U,5U,0U}},
{SCC_50F0,{4U,5U,0U}},
{SCC_50F0,{5U,5U,0U}},
{SCC_50F0,{6U,5U,0U}},
{SCC_50F0,{7U,5U,0U}},
{SCC_50F8,{0U,5U,0U}},
{SCC_50F9,{0U,5U,0U}},
{TRAPCC_55FA,{0U,0U,0U}},
{TRAPCC_55FB,{0U,0U,0U}},
{TRAPCC_55FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5000,{0U,3U,0U}},
{ADDQ_5000,{1U,3U,0U}},
{ADDQ_5000,{2U,3U,0U}},
{ADDQ_5000,{3U,3U,0U}},
{ADDQ_5000,{4U,3U,0U}},
{ADDQ_5000,{5U,3U,0U}},
{ADDQ_5000,{6U,3U,0U}},
{ADDQ_5000,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5010,{0U,3U,0U}},
{ADDQ_5010,{1U,3U,0U}},
{ADDQ_5010,{2U,3U,0U}},
{ADDQ_5010,{3U,3U,0U}},
{ADDQ_5010,{4U,3U,0U}},
{ADDQ_5010,{5U,3U,0U}},
{ADDQ_5010,{6U,3U,0U}},
{ADDQ_5010,{7U,3U,0U}},
{ADDQ_5018,{0U,3U,0U}},
{ADDQ_5018,{1U,3U,0U}},
{ADDQ_5018,{2U,3U,0U}},
{ADDQ_5018,{3U,3U,0U}},
{ADDQ_5018,{4U,3U,0U}},
{ADDQ_5018,{5U,3U,0U}},
{ADDQ_5018,{6U,3U,0U}},
{ADDQ_5018,{7U,3U,0U}},
{ADDQ_5020,{0U,3U,0U}},
{ADDQ_5020,{1U,3U,0U}},
{ADDQ_5020,{2U,3U,0U}},
{ADDQ_5020,{3U,3U,0U}},
{ADDQ_5020,{4U,3U,0U}},
{ADDQ_5020,{5U,3U,0U}},
{ADDQ_5020,{6U,3U,0U}},
{ADDQ_5020,{7U,3U,0U}},
{ADDQ_5028,{0U,3U,0U}},
{ADDQ_5028,{1U,3U,0U}},
{ADDQ_5028,{2U,3U,0U}},
{ADDQ_5028,{3U,3U,0U}},
{ADDQ_5028,{4U,3U,0U}},
{ADDQ_5028,{5U,3U,0U}},
{ADDQ_5028,{6U,3U,0U}},
{ADDQ_5028,{7U,3U,0U}},
{ADDQ_5030,{0U,3U,0U}},
{ADDQ_5030,{1U,3U,0U}},
{ADDQ_5030,{2U,3U,0U}},
{ADDQ_5030,{3U,3U,0U}},
{ADDQ_5030,{4U,3U,0U}},
{ADDQ_5030,{5U,3U,0U}},
{ADDQ_5030,{6U,3U,0U}},
{ADDQ_5030,{7U,3U,0U}},
{ADDQ_5038,{0U,3U,0U}},
{ADDQ_5039,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5040,{0U,3U,0U}},
{ADDQ_5040,{1U,3U,0U}},
{ADDQ_5040,{2U,3U,0U}},
{ADDQ_5040,{3U,3U,0U}},
{ADDQ_5040,{4U,3U,0U}},
{ADDQ_5040,{5U,3U,0U}},
{ADDQ_5040,{6U,3U,0U}},
{ADDQ_5040,{7U,3U,0U}},
{ADDQ_5048,{0U,3U,0U}},
{ADDQ_5048,{1U,3U,0U}},
{ADDQ_5048,{2U,3U,0U}},
{ADDQ_5048,{3U,3U,0U}},
{ADDQ_5048,{4U,3U,0U}},
{ADDQ_5048,{5U,3U,0U}},
{ADDQ_5048,{6U,3U,0U}},
{ADDQ_5048,{7U,3U,0U}},
{ADDQ_5050,{0U,3U,0U}},
{ADDQ_5050,{1U,3U,0U}},
{ADDQ_5050,{2U,3U,0U}},
{ADDQ_5050,{3U,3U,0U}},
{ADDQ_5050,{4U,3U,0U}},
{ADDQ_5050,{5U,3U,0U}},
{ADDQ_5050,{6U,3U,0U}},
{ADDQ_5050,{7U,3U,0U}},
{ADDQ_5058,{0U,3U,0U}},
{ADDQ_5058,{1U,3U,0U}},
{ADDQ_5058,{2U,3U,0U}},
{ADDQ_5058,{3U,3U,0U}},
{ADDQ_5058,{4U,3U,0U}},
{ADDQ_5058,{5U,3U,0U}},
{ADDQ_5058,{6U,3U,0U}},
{ADDQ_5058,{7U,3U,0U}},
{ADDQ_5060,{0U,3U,0U}},
{ADDQ_5060,{1U,3U,0U}},
{ADDQ_5060,{2U,3U,0U}},
{ADDQ_5060,{3U,3U,0U}},
{ADDQ_5060,{4U,3U,0U}},
{ADDQ_5060,{5U,3U,0U}},
{ADDQ_5060,{6U,3U,0U}},
{ADDQ_5060,{7U,3U,0U}},
{ADDQ_5068,{0U,3U,0U}},
{ADDQ_5068,{1U,3U,0U}},
{ADDQ_5068,{2U,3U,0U}},
{ADDQ_5068,{3U,3U,0U}},
{ADDQ_5068,{4U,3U,0U}},
{ADDQ_5068,{5U,3U,0U}},
{ADDQ_5068,{6U,3U,0U}},
{ADDQ_5068,{7U,3U,0U}},
{ADDQ_5070,{0U,3U,0U}},
{ADDQ_5070,{1U,3U,0U}},
{ADDQ_5070,{2U,3U,0U}},
{ADDQ_5070,{3U,3U,0U}},
{ADDQ_5070,{4U,3U,0U}},
{ADDQ_5070,{5U,3U,0U}},
{ADDQ_5070,{6U,3U,0U}},
{ADDQ_5070,{7U,3U,0U}},
{ADDQ_5078,{0U,3U,0U}},
{ADDQ_5079,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5080,{0U,3U,0U}},
{ADDQ_5080,{1U,3U,0U}},
{ADDQ_5080,{2U,3U,0U}},
{ADDQ_5080,{3U,3U,0U}},
{ADDQ_5080,{4U,3U,0U}},
{ADDQ_5080,{5U,3U,0U}},
{ADDQ_5080,{6U,3U,0U}},
{ADDQ_5080,{7U,3U,0U}},
{ADDQ_5088,{0U,3U,0U}},
{ADDQ_5088,{1U,3U,0U}},
{ADDQ_5088,{2U,3U,0U}},
{ADDQ_5088,{3U,3U,0U}},
{ADDQ_5088,{4U,3U,0U}},
{ADDQ_5088,{5U,3U,0U}},
{ADDQ_5088,{6U,3U,0U}},
{ADDQ_5088,{7U,3U,0U}},
{ADDQ_5090,{0U,3U,0U}},
{ADDQ_5090,{1U,3U,0U}},
{ADDQ_5090,{2U,3U,0U}},
{ADDQ_5090,{3U,3U,0U}},
{ADDQ_5090,{4U,3U,0U}},
{ADDQ_5090,{5U,3U,0U}},
{ADDQ_5090,{6U,3U,0U}},
{ADDQ_5090,{7U,3U,0U}},
{ADDQ_5098,{0U,3U,0U}},
{ADDQ_5098,{1U,3U,0U}},
{ADDQ_5098,{2U,3U,0U}},
{ADDQ_5098,{3U,3U,0U}},
{ADDQ_5098,{4U,3U,0U}},
{ADDQ_5098,{5U,3U,0U}},
{ADDQ_5098,{6U,3U,0U}},
{ADDQ_5098,{7U,3U,0U}},
{ADDQ_50A0,{0U,3U,0U}},
{ADDQ_50A0,{1U,3U,0U}},
{ADDQ_50A0,{2U,3U,0U}},
{ADDQ_50A0,{3U,3U,0U}},
{ADDQ_50A0,{4U,3U,0U}},
{ADDQ_50A0,{5U,3U,0U}},
{ADDQ_50A0,{6U,3U,0U}},
{ADDQ_50A0,{7U,3U,0U}},
{ADDQ_50A8,{0U,3U,0U}},
{ADDQ_50A8,{1U,3U,0U}},
{ADDQ_50A8,{2U,3U,0U}},
{ADDQ_50A8,{3U,3U,0U}},
{ADDQ_50A8,{4U,3U,0U}},
{ADDQ_50A8,{5U,3U,0U}},
{ADDQ_50A8,{6U,3U,0U}},
{ADDQ_50A8,{7U,3U,0U}},
{ADDQ_50B0,{0U,3U,0U}},
{ADDQ_50B0,{1U,3U,0U}},
{ADDQ_50B0,{2U,3U,0U}},
{ADDQ_50B0,{3U,3U,0U}},
{ADDQ_50B0,{4U,3U,0U}},
{ADDQ_50B0,{5U,3U,0U}},
{ADDQ_50B0,{6U,3U,0U}},
{ADDQ_50B0,{7U,3U,0U}},
{ADDQ_50B8,{0U,3U,0U}},
{ADDQ_50B9,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,6U,0U}},
{SCC_50C0,{1U,6U,0U}},
{SCC_50C0,{2U,6U,0U}},
{SCC_50C0,{3U,6U,0U}},
{SCC_50C0,{4U,6U,0U}},
{SCC_50C0,{5U,6U,0U}},
{SCC_50C0,{6U,6U,0U}},
{SCC_50C0,{7U,6U,0U}},
{DBCC_56C8,{0U,0U,0U}},
{DBCC_56C8,{0U,1U,0U}},
{DBCC_56C8,{0U,2U,0U}},
{DBCC_56C8,{0U,3U,0U}},
{DBCC_56C8,{0U,4U,0U}},
{DBCC_56C8,{0U,5U,0U}},
{DBCC_56C8,{0U,6U,0U}},
{DBCC_56C8,{0U,7U,0U}},
{SCC_50D0,{0U,6U,0U}},
{SCC_50D0,{1U,6U,0U}},
{SCC_50D0,{2U,6U,0U}},
{SCC_50D0,{3U,6U,0U}},
{SCC_50D0,{4U,6U,0U}},
{SCC_50D0,{5U,6U,0U}},
{SCC_50D0,{6U,6U,0U}},
{SCC_50D0,{7U,6U,0U}},
{SCC_50D8,{0U,6U,0U}},
{SCC_50D8,{1U,6U,0U}},
{SCC_50D8,{2U,6U,0U}},
{SCC_50D8,{3U,6U,0U}},
{SCC_50D8,{4U,6U,0U}},
{SCC_50D8,{5U,6U,0U}},
{SCC_50D8,{6U,6U,0U}},
{SCC_50D8,{7U,6U,0U}},
{SCC_50E0,{0U,6U,0U}},
{SCC_50E0,{1U,6U,0U}},
{SCC_50E0,{2U,6U,0U}},
{SCC_50E0,{3U,6U,0U}},
{SCC_50E0,{4U,6U,0U}},
{SCC_50E0,{5U,6U,0U}},
{SCC_50E0,{6U,6U,0U}},
{SCC_50E0,{7U,6U,0U}},
{SCC_50E8,{0U,6U,0U}},
{SCC_50E8,{1U,6U,0U}},
{SCC_50E8,{2U,6U,0U}},
{SCC_50E8,{3U,6U,0U}},
{SCC_50E8,{4U,6U,0U}},
{SCC_50E8,{5U,6U,0U}},
{SCC_50E8,{6U,6U,0U}},
{SCC_50E8,{7U,6U,0U}},
{SCC_50F0,{0U,6U,0U}},
{SCC_50F0,{1U,6U,0U}},
{SCC_50F0,{2U,6U,0U}},
{SCC_50F0,{3U,6U,0U}},
{SCC_50F0,{4U,6U,0U}},
{SCC_50F0,{5U,6U,0U}},
{SCC_50F0,{6U,6U,0U}},
{SCC_50F0,{7U,6U,0U}},
{SCC_50F8,{0U,6U,0U}},
{SCC_50F9,{0U,6U,0U}},
{TRAPCC_56FA,{0U,0U,0U}},
{TRAPCC_56FB,{0U,0U,0U}},
{TRAPCC_56FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5100,{0U,3U,0U}},
{SUBQ_5100,{1U,3U,0U}},
{SUBQ_5100,{2U,3U,0U}},
{SUBQ_5100,{3U,3U,0U}},
{SUBQ_5100,{4U,3U,0U}},
{SUBQ_5100,{5U,3U,0U}},
{SUBQ_5100,{6U,3U,0U}},
{SUBQ_5100,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5110,{0U,3U,0U}},
{SUBQ_5110,{1U,3U,0U}},
{SUBQ_5110,{2U,3U,0U}},
{SUBQ_5110,{3U,3U,0U}},
{SUBQ_5110,{4U,3U,0U}},
{SUBQ_5110,{5U,3U,0U}},
{SUBQ_5110,{6U,3U,0U}},
{SUBQ_5110,{7U,3U,0U}},
{SUBQ_5118,{0U,3U,0U}},
{SUBQ_5118,{1U,3U,0U}},
{SUBQ_5118,{2U,3U,0U}},
{SUBQ_5118,{3U,3U,0U}},
{SUBQ_5118,{4U,3U,0U}},
{SUBQ_5118,{5U,3U,0U}},
{SUBQ_5118,{6U,3U,0U}},
{SUBQ_5118,{7U,3U,0U}},
{SUBQ_5120,{0U,3U,0U}},
{SUBQ_5120,{1U,3U,0U}},
{SUBQ_5120,{2U,3U,0U}},
{SUBQ_5120,{3U,3U,0U}},
{SUBQ_5120,{4U,3U,0U}},
{SUBQ_5120,{5U,3U,0U}},
{SUBQ_5120,{6U,3U,0U}},
{SUBQ_5120,{7U,3U,0U}},
{SUBQ_5128,{0U,3U,0U}},
{SUBQ_5128,{1U,3U,0U}},
{SUBQ_5128,{2U,3U,0U}},
{SUBQ_5128,{3U,3U,0U}},
{SUBQ_5128,{4U,3U,0U}},
{SUBQ_5128,{5U,3U,0U}},
{SUBQ_5128,{6U,3U,0U}},
{SUBQ_5128,{7U,3U,0U}},
{SUBQ_5130,{0U,3U,0U}},
{SUBQ_5130,{1U,3U,0U}},
{SUBQ_5130,{2U,3U,0U}},
{SUBQ_5130,{3U,3U,0U}},
{SUBQ_5130,{4U,3U,0U}},
{SUBQ_5130,{5U,3U,0U}},
{SUBQ_5130,{6U,3U,0U}},
{SUBQ_5130,{7U,3U,0U}},
{SUBQ_5138,{0U,3U,0U}},
{SUBQ_5139,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5140,{0U,3U,0U}},
{SUBQ_5140,{1U,3U,0U}},
{SUBQ_5140,{2U,3U,0U}},
{SUBQ_5140,{3U,3U,0U}},
{SUBQ_5140,{4U,3U,0U}},
{SUBQ_5140,{5U,3U,0U}},
{SUBQ_5140,{6U,3U,0U}},
{SUBQ_5140,{7U,3U,0U}},
{SUBQ_5148,{0U,3U,0U}},
{SUBQ_5148,{1U,3U,0U}},
{SUBQ_5148,{2U,3U,0U}},
{SUBQ_5148,{3U,3U,0U}},
{SUBQ_5148,{4U,3U,0U}},
{SUBQ_5148,{5U,3U,0U}},
{SUBQ_5148,{6U,3U,0U}},
{SUBQ_5148,{7U,3U,0U}},
{SUBQ_5150,{0U,3U,0U}},
{SUBQ_5150,{1U,3U,0U}},
{SUBQ_5150,{2U,3U,0U}},
{SUBQ_5150,{3U,3U,0U}},
{SUBQ_5150,{4U,3U,0U}},
{SUBQ_5150,{5U,3U,0U}},
{SUBQ_5150,{6U,3U,0U}},
{SUBQ_5150,{7U,3U,0U}},
{SUBQ_5158,{0U,3U,0U}},
{SUBQ_5158,{1U,3U,0U}},
{SUBQ_5158,{2U,3U,0U}},
{SUBQ_5158,{3U,3U,0U}},
{SUBQ_5158,{4U,3U,0U}},
{SUBQ_5158,{5U,3U,0U}},
{SUBQ_5158,{6U,3U,0U}},
{SUBQ_5158,{7U,3U,0U}},
{SUBQ_5160,{0U,3U,0U}},
{SUBQ_5160,{1U,3U,0U}},
{SUBQ_5160,{2U,3U,0U}},
{SUBQ_5160,{3U,3U,0U}},
{SUBQ_5160,{4U,3U,0U}},
{SUBQ_5160,{5U,3U,0U}},
{SUBQ_5160,{6U,3U,0U}},
{SUBQ_5160,{7U,3U,0U}},
{SUBQ_5168,{0U,3U,0U}},
{SUBQ_5168,{1U,3U,0U}},
{SUBQ_5168,{2U,3U,0U}},
{SUBQ_5168,{3U,3U,0U}},
{SUBQ_5168,{4U,3U,0U}},
{SUBQ_5168,{5U,3U,0U}},
{SUBQ_5168,{6U,3U,0U}},
{SUBQ_5168,{7U,3U,0U}},
{SUBQ_5170,{0U,3U,0U}},
{SUBQ_5170,{1U,3U,0U}},
{SUBQ_5170,{2U,3U,0U}},
{SUBQ_5170,{3U,3U,0U}},
{SUBQ_5170,{4U,3U,0U}},
{SUBQ_5170,{5U,3U,0U}},
{SUBQ_5170,{6U,3U,0U}},
{SUBQ_5170,{7U,3U,0U}},
{SUBQ_5178,{0U,3U,0U}},
{SUBQ_5179,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5180,{0U,3U,0U}},
{SUBQ_5180,{1U,3U,0U}},
{SUBQ_5180,{2U,3U,0U}},
{SUBQ_5180,{3U,3U,0U}},
{SUBQ_5180,{4U,3U,0U}},
{SUBQ_5180,{5U,3U,0U}},
{SUBQ_5180,{6U,3U,0U}},
{SUBQ_5180,{7U,3U,0U}},
{SUBQ_5188,{0U,3U,0U}},
{SUBQ_5188,{1U,3U,0U}},
{SUBQ_5188,{2U,3U,0U}},
{SUBQ_5188,{3U,3U,0U}},
{SUBQ_5188,{4U,3U,0U}},
{SUBQ_5188,{5U,3U,0U}},
{SUBQ_5188,{6U,3U,0U}},
{SUBQ_5188,{7U,3U,0U}},
{SUBQ_5190,{0U,3U,0U}},
{SUBQ_5190,{1U,3U,0U}},
{SUBQ_5190,{2U,3U,0U}},
{SUBQ_5190,{3U,3U,0U}},
{SUBQ_5190,{4U,3U,0U}},
{SUBQ_5190,{5U,3U,0U}},
{SUBQ_5190,{6U,3U,0U}},
{SUBQ_5190,{7U,3U,0U}},
{SUBQ_5198,{0U,3U,0U}},
{SUBQ_5198,{1U,3U,0U}},
{SUBQ_5198,{2U,3U,0U}},
{SUBQ_5198,{3U,3U,0U}},
{SUBQ_5198,{4U,3U,0U}},
{SUBQ_5198,{5U,3U,0U}},
{SUBQ_5198,{6U,3U,0U}},
{SUBQ_5198,{7U,3U,0U}},
{SUBQ_51A0,{0U,3U,0U}},
{SUBQ_51A0,{1U,3U,0U}},
{SUBQ_51A0,{2U,3U,0U}},
{SUBQ_51A0,{3U,3U,0U}},
{SUBQ_51A0,{4U,3U,0U}},
{SUBQ_51A0,{5U,3U,0U}},
{SUBQ_51A0,{6U,3U,0U}},
{SUBQ_51A0,{7U,3U,0U}},
{SUBQ_51A8,{0U,3U,0U}},
{SUBQ_51A8,{1U,3U,0U}},
{SUBQ_51A8,{2U,3U,0U}},
{SUBQ_51A8,{3U,3U,0U}},
{SUBQ_51A8,{4U,3U,0U}},
{SUBQ_51A8,{5U,3U,0U}},
{SUBQ_51A8,{6U,3U,0U}},
{SUBQ_51A8,{7U,3U,0U}},
{SUBQ_51B0,{0U,3U,0U}},
{SUBQ_51B0,{1U,3U,0U}},
{SUBQ_51B0,{2U,3U,0U}},
{SUBQ_51B0,{3U,3U,0U}},
{SUBQ_51B0,{4U,3U,0U}},
{SUBQ_51B0,{5U,3U,0U}},
{SUBQ_51B0,{6U,3U,0U}},
{SUBQ_51B0,{7U,3U,0U}},
{SUBQ_51B8,{0U,3U,0U}},
{SUBQ_51B9,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,7U,0U}},
{SCC_50C0,{1U,7U,0U}},
{SCC_50C0,{2U,7U,0U}},
{SCC_50C0,{3U,7U,0U}},
{SCC_50C0,{4U,7U,0U}},
{SCC_50C0,{5U,7U,0U}},
{SCC_50C0,{6U,7U,0U}},
{SCC_50C0,{7U,7U,0U}},
{DBCC_57C8,{0U,0U,0U}},
{DBCC_57C8,{0U,1U,0U}},
{DBCC_57C8,{0U,2U,0U}},
{DBCC_57C8,{0U,3U,0U}},
{DBCC_57C8,{0U,4U,0U}},
{DBCC_57C8,{0U,5U,0U}},
{DBCC_57C8,{0U,6U,0U}},
{DBCC_57C8,{0U,7U,0U}},
{SCC_50D0,{0U,7U,0U}},
{SCC_50D0,{1U,7U,0U}},
{SCC_50D0,{2U,7U,0U}},
{SCC_50D0,{3U,7U,0U}},
{SCC_50D0,{4U,7U,0U}},
{SCC_50D0,{5U,7U,0U}},
{SCC_50D0,{6U,7U,0U}},
{SCC_50D0,{7U,7U,0U}},
{SCC_50D8,{0U,7U,0U}},
{SCC_50D8,{1U,7U,0U}},
{SCC_50D8,{2U,7U,0U}},
{SCC_50D8,{3U,7U,0U}},
{SCC_50D8,{4U,7U,0U}},
{SCC_50D8,{5U,7U,0U}},
{SCC_50D8,{6U,7U,0U}},
{SCC_50D8,{7U,7U,0U}},
{SCC_50E0,{0U,7U,0U}},
{SCC_50E0,{1U,7U,0U}},
{SCC_50E0,{2U,7U,0U}},
{SCC_50E0,{3U,7U,0U}},
{SCC_50E0,{4U,7U,0U}},
{SCC_50E0,{5U,7U,0U}},
{SCC_50E0,{6U,7U,0U}},
{SCC_50E0,{7U,7U,0U}},
{SCC_50E8,{0U,7U,0U}},
{SCC_50E8,{1U,7U,0U}},
{SCC_50E8,{2U,7U,0U}},
{SCC_50E8,{3U,7U,0U}},
{SCC_50E8,{4U,7U,0U}},
{SCC_50E8,{5U,7U,0U}},
{SCC_50E8,{6U,7U,0U}},
{SCC_50E8,{7U,7U,0U}},
{SCC_50F0,{0U,7U,0U}},
{SCC_50F0,{1U,7U,0U}},
{SCC_50F0,{2U,7U,0U}},
{SCC_50F0,{3U,7U,0U}},
{SCC_50F0,{4U,7U,0U}},
{SCC_50F0,{5U,7U,0U}},
{SCC_50F0,{6U,7U,0U}},
{SCC_50F0,{7U,7U,0U}},
{SCC_50F8,{0U,7U,0U}},
{SCC_50F9,{0U,7U,0U}},
{TRAPCC_57FA,{0U,0U,0U}},
{TRAPCC_57FB,{0U,0U,0U}},
{TRAPCC_57FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5000,{0U,4U,0U}},
{ADDQ_5000,{1U,4U,0U}},
{ADDQ_5000,{2U,4U,0U}},
{ADDQ_5000,{3U,4U,0U}},
{ADDQ_5000,{4U,4U,0U}},
{ADDQ_5000,{5U,4U,0U}},
{ADDQ_5000,{6U,4U,0U}},
{ADDQ_5000,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5010,{0U,4U,0U}},
{ADDQ_5010,{1U,4U,0U}},
{ADDQ_5010,{2U,4U,0U}},
{ADDQ_5010,{3U,4U,0U}},
{ADDQ_5010,{4U,4U,0U}},
{ADDQ_5010,{5U,4U,0U}},
{ADDQ_5010,{6U,4U,0U}},
{ADDQ_5010,{7U,4U,0U}},
{ADDQ_5018,{0U,4U,0U}},
{ADDQ_5018,{1U,4U,0U}},
{ADDQ_5018,{2U,4U,0U}},
{ADDQ_5018,{3U,4U,0U}},
{ADDQ_5018,{4U,4U,0U}},
{ADDQ_5018,{5U,4U,0U}},
{ADDQ_5018,{6U,4U,0U}},
{ADDQ_5018,{7U,4U,0U}},
{ADDQ_5020,{0U,4U,0U}},
{ADDQ_5020,{1U,4U,0U}},
{ADDQ_5020,{2U,4U,0U}},
{ADDQ_5020,{3U,4U,0U}},
{ADDQ_5020,{4U,4U,0U}},
{ADDQ_5020,{5U,4U,0U}},
{ADDQ_5020,{6U,4U,0U}},
{ADDQ_5020,{7U,4U,0U}},
{ADDQ_5028,{0U,4U,0U}},
{ADDQ_5028,{1U,4U,0U}},
{ADDQ_5028,{2U,4U,0U}},
{ADDQ_5028,{3U,4U,0U}},
{ADDQ_5028,{4U,4U,0U}},
{ADDQ_5028,{5U,4U,0U}},
{ADDQ_5028,{6U,4U,0U}},
{ADDQ_5028,{7U,4U,0U}},
{ADDQ_5030,{0U,4U,0U}},
{ADDQ_5030,{1U,4U,0U}},
{ADDQ_5030,{2U,4U,0U}},
{ADDQ_5030,{3U,4U,0U}},
{ADDQ_5030,{4U,4U,0U}},
{ADDQ_5030,{5U,4U,0U}},
{ADDQ_5030,{6U,4U,0U}},
{ADDQ_5030,{7U,4U,0U}},
{ADDQ_5038,{0U,4U,0U}},
{ADDQ_5039,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5040,{0U,4U,0U}},
{ADDQ_5040,{1U,4U,0U}},
{ADDQ_5040,{2U,4U,0U}},
{ADDQ_5040,{3U,4U,0U}},
{ADDQ_5040,{4U,4U,0U}},
{ADDQ_5040,{5U,4U,0U}},
{ADDQ_5040,{6U,4U,0U}},
{ADDQ_5040,{7U,4U,0U}},
{ADDQ_5048,{0U,4U,0U}},
{ADDQ_5048,{1U,4U,0U}},
{ADDQ_5048,{2U,4U,0U}},
{ADDQ_5048,{3U,4U,0U}},
{ADDQ_5048,{4U,4U,0U}},
{ADDQ_5048,{5U,4U,0U}},
{ADDQ_5048,{6U,4U,0U}},
{ADDQ_5048,{7U,4U,0U}},
{ADDQ_5050,{0U,4U,0U}},
{ADDQ_5050,{1U,4U,0U}},
{ADDQ_5050,{2U,4U,0U}},
{ADDQ_5050,{3U,4U,0U}},
{ADDQ_5050,{4U,4U,0U}},
{ADDQ_5050,{5U,4U,0U}},
{ADDQ_5050,{6U,4U,0U}},
{ADDQ_5050,{7U,4U,0U}},
{ADDQ_5058,{0U,4U,0U}},
{ADDQ_5058,{1U,4U,0U}},
{ADDQ_5058,{2U,4U,0U}},
{ADDQ_5058,{3U,4U,0U}},
{ADDQ_5058,{4U,4U,0U}},
{ADDQ_5058,{5U,4U,0U}},
{ADDQ_5058,{6U,4U,0U}},
{ADDQ_5058,{7U,4U,0U}},
{ADDQ_5060,{0U,4U,0U}},
{ADDQ_5060,{1U,4U,0U}},
{ADDQ_5060,{2U,4U,0U}},
{ADDQ_5060,{3U,4U,0U}},
{ADDQ_5060,{4U,4U,0U}},
{ADDQ_5060,{5U,4U,0U}},
{ADDQ_5060,{6U,4U,0U}},
{ADDQ_5060,{7U,4U,0U}},
{ADDQ_5068,{0U,4U,0U}},
{ADDQ_5068,{1U,4U,0U}},
{ADDQ_5068,{2U,4U,0U}},
{ADDQ_5068,{3U,4U,0U}},
{ADDQ_5068,{4U,4U,0U}},
{ADDQ_5068,{5U,4U,0U}},
{ADDQ_5068,{6U,4U,0U}},
{ADDQ_5068,{7U,4U,0U}},
{ADDQ_5070,{0U,4U,0U}},
{ADDQ_5070,{1U,4U,0U}},
{ADDQ_5070,{2U,4U,0U}},
{ADDQ_5070,{3U,4U,0U}},
{ADDQ_5070,{4U,4U,0U}},
{ADDQ_5070,{5U,4U,0U}},
{ADDQ_5070,{6U,4U,0U}},
{ADDQ_5070,{7U,4U,0U}},
{ADDQ_5078,{0U,4U,0U}},
{ADDQ_5079,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5080,{0U,4U,0U}},
{ADDQ_5080,{1U,4U,0U}},
{ADDQ_5080,{2U,4U,0U}},
{ADDQ_5080,{3U,4U,0U}},
{ADDQ_5080,{4U,4U,0U}},
{ADDQ_5080,{5U,4U,0U}},
{ADDQ_5080,{6U,4U,0U}},
{ADDQ_5080,{7U,4U,0U}},
{ADDQ_5088,{0U,4U,0U}},
{ADDQ_5088,{1U,4U,0U}},
{ADDQ_5088,{2U,4U,0U}},
{ADDQ_5088,{3U,4U,0U}},
{ADDQ_5088,{4U,4U,0U}},
{ADDQ_5088,{5U,4U,0U}},
{ADDQ_5088,{6U,4U,0U}},
{ADDQ_5088,{7U,4U,0U}},
{ADDQ_5090,{0U,4U,0U}},
{ADDQ_5090,{1U,4U,0U}},
{ADDQ_5090,{2U,4U,0U}},
{ADDQ_5090,{3U,4U,0U}},
{ADDQ_5090,{4U,4U,0U}},
{ADDQ_5090,{5U,4U,0U}},
{ADDQ_5090,{6U,4U,0U}},
{ADDQ_5090,{7U,4U,0U}},
{ADDQ_5098,{0U,4U,0U}},
{ADDQ_5098,{1U,4U,0U}},
{ADDQ_5098,{2U,4U,0U}},
{ADDQ_5098,{3U,4U,0U}},
{ADDQ_5098,{4U,4U,0U}},
{ADDQ_5098,{5U,4U,0U}},
{ADDQ_5098,{6U,4U,0U}},
{ADDQ_5098,{7U,4U,0U}},
{ADDQ_50A0,{0U,4U,0U}},
{ADDQ_50A0,{1U,4U,0U}},
{ADDQ_50A0,{2U,4U,0U}},
{ADDQ_50A0,{3U,4U,0U}},
{ADDQ_50A0,{4U,4U,0U}},
{ADDQ_50A0,{5U,4U,0U}},
{ADDQ_50A0,{6U,4U,0U}},
{ADDQ_50A0,{7U,4U,0U}},
{ADDQ_50A8,{0U,4U,0U}},
{ADDQ_50A8,{1U,4U,0U}},
{ADDQ_50A8,{2U,4U,0U}},
{ADDQ_50A8,{3U,4U,0U}},
{ADDQ_50A8,{4U,4U,0U}},
{ADDQ_50A8,{5U,4U,0U}},
{ADDQ_50A8,{6U,4U,0U}},
{ADDQ_50A8,{7U,4U,0U}},
{ADDQ_50B0,{0U,4U,0U}},
{ADDQ_50B0,{1U,4U,0U}},
{ADDQ_50B0,{2U,4U,0U}},
{ADDQ_50B0,{3U,4U,0U}},
{ADDQ_50B0,{4U,4U,0U}},
{ADDQ_50B0,{5U,4U,0U}},
{ADDQ_50B0,{6U,4U,0U}},
{ADDQ_50B0,{7U,4U,0U}},
{ADDQ_50B8,{0U,4U,0U}},
{ADDQ_50B9,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,8U,0U}},
{SCC_50C0,{1U,8U,0U}},
{SCC_50C0,{2U,8U,0U}},
{SCC_50C0,{3U,8U,0U}},
{SCC_50C0,{4U,8U,0U}},
{SCC_50C0,{5U,8U,0U}},
{SCC_50C0,{6U,8U,0U}},
{SCC_50C0,{7U,8U,0U}},
{DBCC_58C8,{0U,0U,0U}},
{DBCC_58C8,{0U,1U,0U}},
{DBCC_58C8,{0U,2U,0U}},
{DBCC_58C8,{0U,3U,0U}},
{DBCC_58C8,{0U,4U,0U}},
{DBCC_58C8,{0U,5U,0U}},
{DBCC_58C8,{0U,6U,0U}},
{DBCC_58C8,{0U,7U,0U}},
{SCC_50D0,{0U,8U,0U}},
{SCC_50D0,{1U,8U,0U}},
{SCC_50D0,{2U,8U,0U}},
{SCC_50D0,{3U,8U,0U}},
{SCC_50D0,{4U,8U,0U}},
{SCC_50D0,{5U,8U,0U}},
{SCC_50D0,{6U,8U,0U}},
{SCC_50D0,{7U,8U,0U}},
{SCC_50D8,{0U,8U,0U}},
{SCC_50D8,{1U,8U,0U}},
{SCC_50D8,{2U,8U,0U}},
{SCC_50D8,{3U,8U,0U}},
{SCC_50D8,{4U,8U,0U}},
{SCC_50D8,{5U,8U,0U}},
{SCC_50D8,{6U,8U,0U}},
{SCC_50D8,{7U,8U,0U}},
{SCC_50E0,{0U,8U,0U}},
{SCC_50E0,{1U,8U,0U}},
{SCC_50E0,{2U,8U,0U}},
{SCC_50E0,{3U,8U,0U}},
{SCC_50E0,{4U,8U,0U}},
{SCC_50E0,{5U,8U,0U}},
{SCC_50E0,{6U,8U,0U}},
{SCC_50E0,{7U,8U,0U}},
{SCC_50E8,{0U,8U,0U}},
{SCC_50E8,{1U,8U,0U}},
{SCC_50E8,{2U,8U,0U}},
{SCC_50E8,{3U,8U,0U}},
{SCC_50E8,{4U,8U,0U}},
{SCC_50E8,{5U,8U,0U}},
{SCC_50E8,{6U,8U,0U}},
{SCC_50E8,{7U,8U,0U}},
{SCC_50F0,{0U,8U,0U}},
{SCC_50F0,{1U,8U,0U}},
{SCC_50F0,{2U,8U,0U}},
{SCC_50F0,{3U,8U,0U}},
{SCC_50F0,{4U,8U,0U}},
{SCC_50F0,{5U,8U,0U}},
{SCC_50F0,{6U,8U,0U}},
{SCC_50F0,{7U,8U,0U}},
{SCC_50F8,{0U,8U,0U}},
{SCC_50F9,{0U,8U,0U}},
{TRAPCC_58FA,{0U,0U,0U}},
{TRAPCC_58FB,{0U,0U,0U}},
{TRAPCC_58FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5100,{0U,4U,0U}},
{SUBQ_5100,{1U,4U,0U}},
{SUBQ_5100,{2U,4U,0U}},
{SUBQ_5100,{3U,4U,0U}},
{SUBQ_5100,{4U,4U,0U}},
{SUBQ_5100,{5U,4U,0U}},
{SUBQ_5100,{6U,4U,0U}},
{SUBQ_5100,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5110,{0U,4U,0U}},
{SUBQ_5110,{1U,4U,0U}},
{SUBQ_5110,{2U,4U,0U}},
{SUBQ_5110,{3U,4U,0U}},
{SUBQ_5110,{4U,4U,0U}},
{SUBQ_5110,{5U,4U,0U}},
{SUBQ_5110,{6U,4U,0U}},
{SUBQ_5110,{7U,4U,0U}},
{SUBQ_5118,{0U,4U,0U}},
{SUBQ_5118,{1U,4U,0U}},
{SUBQ_5118,{2U,4U,0U}},
{SUBQ_5118,{3U,4U,0U}},
{SUBQ_5118,{4U,4U,0U}},
{SUBQ_5118,{5U,4U,0U}},
{SUBQ_5118,{6U,4U,0U}},
{SUBQ_5118,{7U,4U,0U}},
{SUBQ_5120,{0U,4U,0U}},
{SUBQ_5120,{1U,4U,0U}},
{SUBQ_5120,{2U,4U,0U}},
{SUBQ_5120,{3U,4U,0U}},
{SUBQ_5120,{4U,4U,0U}},
{SUBQ_5120,{5U,4U,0U}},
{SUBQ_5120,{6U,4U,0U}},
{SUBQ_5120,{7U,4U,0U}},
{SUBQ_5128,{0U,4U,0U}},
{SUBQ_5128,{1U,4U,0U}},
{SUBQ_5128,{2U,4U,0U}},
{SUBQ_5128,{3U,4U,0U}},
{SUBQ_5128,{4U,4U,0U}},
{SUBQ_5128,{5U,4U,0U}},
{SUBQ_5128,{6U,4U,0U}},
{SUBQ_5128,{7U,4U,0U}},
{SUBQ_5130,{0U,4U,0U}},
{SUBQ_5130,{1U,4U,0U}},
{SUBQ_5130,{2U,4U,0U}},
{SUBQ_5130,{3U,4U,0U}},
{SUBQ_5130,{4U,4U,0U}},
{SUBQ_5130,{5U,4U,0U}},
{SUBQ_5130,{6U,4U,0U}},
{SUBQ_5130,{7U,4U,0U}},
{SUBQ_5138,{0U,4U,0U}},
{SUBQ_5139,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5140,{0U,4U,0U}},
{SUBQ_5140,{1U,4U,0U}},
{SUBQ_5140,{2U,4U,0U}},
{SUBQ_5140,{3U,4U,0U}},
{SUBQ_5140,{4U,4U,0U}},
{SUBQ_5140,{5U,4U,0U}},
{SUBQ_5140,{6U,4U,0U}},
{SUBQ_5140,{7U,4U,0U}},
{SUBQ_5148,{0U,4U,0U}},
{SUBQ_5148,{1U,4U,0U}},
{SUBQ_5148,{2U,4U,0U}},
{SUBQ_5148,{3U,4U,0U}},
{SUBQ_5148,{4U,4U,0U}},
{SUBQ_5148,{5U,4U,0U}},
{SUBQ_5148,{6U,4U,0U}},
{SUBQ_5148,{7U,4U,0U}},
{SUBQ_5150,{0U,4U,0U}},
{SUBQ_5150,{1U,4U,0U}},
{SUBQ_5150,{2U,4U,0U}},
{SUBQ_5150,{3U,4U,0U}},
{SUBQ_5150,{4U,4U,0U}},
{SUBQ_5150,{5U,4U,0U}},
{SUBQ_5150,{6U,4U,0U}},
{SUBQ_5150,{7U,4U,0U}},
{SUBQ_5158,{0U,4U,0U}},
{SUBQ_5158,{1U,4U,0U}},
{SUBQ_5158,{2U,4U,0U}},
{SUBQ_5158,{3U,4U,0U}},
{SUBQ_5158,{4U,4U,0U}},
{SUBQ_5158,{5U,4U,0U}},
{SUBQ_5158,{6U,4U,0U}},
{SUBQ_5158,{7U,4U,0U}},
{SUBQ_5160,{0U,4U,0U}},
{SUBQ_5160,{1U,4U,0U}},
{SUBQ_5160,{2U,4U,0U}},
{SUBQ_5160,{3U,4U,0U}},
{SUBQ_5160,{4U,4U,0U}},
{SUBQ_5160,{5U,4U,0U}},
{SUBQ_5160,{6U,4U,0U}},
{SUBQ_5160,{7U,4U,0U}},
{SUBQ_5168,{0U,4U,0U}},
{SUBQ_5168,{1U,4U,0U}},
{SUBQ_5168,{2U,4U,0U}},
{SUBQ_5168,{3U,4U,0U}},
{SUBQ_5168,{4U,4U,0U}},
{SUBQ_5168,{5U,4U,0U}},
{SUBQ_5168,{6U,4U,0U}},
{SUBQ_5168,{7U,4U,0U}},
{SUBQ_5170,{0U,4U,0U}},
{SUBQ_5170,{1U,4U,0U}},
{SUBQ_5170,{2U,4U,0U}},
{SUBQ_5170,{3U,4U,0U}},
{SUBQ_5170,{4U,4U,0U}},
{SUBQ_5170,{5U,4U,0U}},
{SUBQ_5170,{6U,4U,0U}},
{SUBQ_5170,{7U,4U,0U}},
{SUBQ_5178,{0U,4U,0U}},
{SUBQ_5179,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5180,{0U,4U,0U}},
{SUBQ_5180,{1U,4U,0U}},
{SUBQ_5180,{2U,4U,0U}},
{SUBQ_5180,{3U,4U,0U}},
{SUBQ_5180,{4U,4U,0U}},
{SUBQ_5180,{5U,4U,0U}},
{SUBQ_5180,{6U,4U,0U}},
{SUBQ_5180,{7U,4U,0U}},
{SUBQ_5188,{0U,4U,0U}},
{SUBQ_5188,{1U,4U,0U}},
{SUBQ_5188,{2U,4U,0U}},
{SUBQ_5188,{3U,4U,0U}},
{SUBQ_5188,{4U,4U,0U}},
{SUBQ_5188,{5U,4U,0U}},
{SUBQ_5188,{6U,4U,0U}},
{SUBQ_5188,{7U,4U,0U}},
{SUBQ_5190,{0U,4U,0U}},
{SUBQ_5190,{1U,4U,0U}},
{SUBQ_5190,{2U,4U,0U}},
{SUBQ_5190,{3U,4U,0U}},
{SUBQ_5190,{4U,4U,0U}},
{SUBQ_5190,{5U,4U,0U}},
{SUBQ_5190,{6U,4U,0U}},
{SUBQ_5190,{7U,4U,0U}},
{SUBQ_5198,{0U,4U,0U}},
{SUBQ_5198,{1U,4U,0U}},
{SUBQ_5198,{2U,4U,0U}},
{SUBQ_5198,{3U,4U,0U}},
{SUBQ_5198,{4U,4U,0U}},
{SUBQ_5198,{5U,4U,0U}},
{SUBQ_5198,{6U,4U,0U}},
{SUBQ_5198,{7U,4U,0U}},
{SUBQ_51A0,{0U,4U,0U}},
{SUBQ_51A0,{1U,4U,0U}},
{SUBQ_51A0,{2U,4U,0U}},
{SUBQ_51A0,{3U,4U,0U}},
{SUBQ_51A0,{4U,4U,0U}},
{SUBQ_51A0,{5U,4U,0U}},
{SUBQ_51A0,{6U,4U,0U}},
{SUBQ_51A0,{7U,4U,0U}},
{SUBQ_51A8,{0U,4U,0U}},
{SUBQ_51A8,{1U,4U,0U}},
{SUBQ_51A8,{2U,4U,0U}},
{SUBQ_51A8,{3U,4U,0U}},
{SUBQ_51A8,{4U,4U,0U}},
{SUBQ_51A8,{5U,4U,0U}},
{SUBQ_51A8,{6U,4U,0U}},
{SUBQ_51A8,{7U,4U,0U}},
{SUBQ_51B0,{0U,4U,0U}},
{SUBQ_51B0,{1U,4U,0U}},
{SUBQ_51B0,{2U,4U,0U}},
{SUBQ_51B0,{3U,4U,0U}},
{SUBQ_51B0,{4U,4U,0U}},
{SUBQ_51B0,{5U,4U,0U}},
{SUBQ_51B0,{6U,4U,0U}},
{SUBQ_51B0,{7U,4U,0U}},
{SUBQ_51B8,{0U,4U,0U}},
{SUBQ_51B9,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,9U,0U}},
{SCC_50C0,{1U,9U,0U}},
{SCC_50C0,{2U,9U,0U}},
{SCC_50C0,{3U,9U,0U}},
{SCC_50C0,{4U,9U,0U}},
{SCC_50C0,{5U,9U,0U}},
{SCC_50C0,{6U,9U,0U}},
{SCC_50C0,{7U,9U,0U}},
{DBCC_59C8,{0U,0U,0U}},
{DBCC_59C8,{0U,1U,0U}},
{DBCC_59C8,{0U,2U,0U}},
{DBCC_59C8,{0U,3U,0U}},
{DBCC_59C8,{0U,4U,0U}},
{DBCC_59C8,{0U,5U,0U}},
{DBCC_59C8,{0U,6U,0U}},
{DBCC_59C8,{0U,7U,0U}},
{SCC_50D0,{0U,9U,0U}},
{SCC_50D0,{1U,9U,0U}},
{SCC_50D0,{2U,9U,0U}},
{SCC_50D0,{3U,9U,0U}},
{SCC_50D0,{4U,9U,0U}},
{SCC_50D0,{5U,9U,0U}},
{SCC_50D0,{6U,9U,0U}},
{SCC_50D0,{7U,9U,0U}},
{SCC_50D8,{0U,9U,0U}},
{SCC_50D8,{1U,9U,0U}},
{SCC_50D8,{2U,9U,0U}},
{SCC_50D8,{3U,9U,0U}},
{SCC_50D8,{4U,9U,0U}},
{SCC_50D8,{5U,9U,0U}},
{SCC_50D8,{6U,9U,0U}},
{SCC_50D8,{7U,9U,0U}},
{SCC_50E0,{0U,9U,0U}},
{SCC_50E0,{1U,9U,0U}},
{SCC_50E0,{2U,9U,0U}},
{SCC_50E0,{3U,9U,0U}},
{SCC_50E0,{4U,9U,0U}},
{SCC_50E0,{5U,9U,0U}},
{SCC_50E0,{6U,9U,0U}},
{SCC_50E0,{7U,9U,0U}},
{SCC_50E8,{0U,9U,0U}},
{SCC_50E8,{1U,9U,0U}},
{SCC_50E8,{2U,9U,0U}},
{SCC_50E8,{3U,9U,0U}},
{SCC_50E8,{4U,9U,0U}},
{SCC_50E8,{5U,9U,0U}},
{SCC_50E8,{6U,9U,0U}},
{SCC_50E8,{7U,9U,0U}},
{SCC_50F0,{0U,9U,0U}},
{SCC_50F0,{1U,9U,0U}},
{SCC_50F0,{2U,9U,0U}},
{SCC_50F0,{3U,9U,0U}},
{SCC_50F0,{4U,9U,0U}},
{SCC_50F0,{5U,9U,0U}},
{SCC_50F0,{6U,9U,0U}},
{SCC_50F0,{7U,9U,0U}},
{SCC_50F8,{0U,9U,0U}},
{SCC_50F9,{0U,9U,0U}},
{TRAPCC_59FA,{0U,0U,0U}},
{TRAPCC_59FB,{0U,0U,0U}},
{TRAPCC_59FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5000,{0U,5U,0U}},
{ADDQ_5000,{1U,5U,0U}},
{ADDQ_5000,{2U,5U,0U}},
{ADDQ_5000,{3U,5U,0U}},
{ADDQ_5000,{4U,5U,0U}},
{ADDQ_5000,{5U,5U,0U}},
{ADDQ_5000,{6U,5U,0U}},
{ADDQ_5000,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5010,{0U,5U,0U}},
{ADDQ_5010,{1U,5U,0U}},
{ADDQ_5010,{2U,5U,0U}},
{ADDQ_5010,{3U,5U,0U}},
{ADDQ_5010,{4U,5U,0U}},
{ADDQ_5010,{5U,5U,0U}},
{ADDQ_5010,{6U,5U,0U}},
{ADDQ_5010,{7U,5U,0U}},
{ADDQ_5018,{0U,5U,0U}},
{ADDQ_5018,{1U,5U,0U}},
{ADDQ_5018,{2U,5U,0U}},
{ADDQ_5018,{3U,5U,0U}},
{ADDQ_5018,{4U,5U,0U}},
{ADDQ_5018,{5U,5U,0U}},
{ADDQ_5018,{6U,5U,0U}},
{ADDQ_5018,{7U,5U,0U}},
{ADDQ_5020,{0U,5U,0U}},
{ADDQ_5020,{1U,5U,0U}},
{ADDQ_5020,{2U,5U,0U}},
{ADDQ_5020,{3U,5U,0U}},
{ADDQ_5020,{4U,5U,0U}},
{ADDQ_5020,{5U,5U,0U}},
{ADDQ_5020,{6U,5U,0U}},
{ADDQ_5020,{7U,5U,0U}},
{ADDQ_5028,{0U,5U,0U}},
{ADDQ_5028,{1U,5U,0U}},
{ADDQ_5028,{2U,5U,0U}},
{ADDQ_5028,{3U,5U,0U}},
{ADDQ_5028,{4U,5U,0U}},
{ADDQ_5028,{5U,5U,0U}},
{ADDQ_5028,{6U,5U,0U}},
{ADDQ_5028,{7U,5U,0U}},
{ADDQ_5030,{0U,5U,0U}},
{ADDQ_5030,{1U,5U,0U}},
{ADDQ_5030,{2U,5U,0U}},
{ADDQ_5030,{3U,5U,0U}},
{ADDQ_5030,{4U,5U,0U}},
{ADDQ_5030,{5U,5U,0U}},
{ADDQ_5030,{6U,5U,0U}},
{ADDQ_5030,{7U,5U,0U}},
{ADDQ_5038,{0U,5U,0U}},
{ADDQ_5039,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5040,{0U,5U,0U}},
{ADDQ_5040,{1U,5U,0U}},
{ADDQ_5040,{2U,5U,0U}},
{ADDQ_5040,{3U,5U,0U}},
{ADDQ_5040,{4U,5U,0U}},
{ADDQ_5040,{5U,5U,0U}},
{ADDQ_5040,{6U,5U,0U}},
{ADDQ_5040,{7U,5U,0U}},
{ADDQ_5048,{0U,5U,0U}},
{ADDQ_5048,{1U,5U,0U}},
{ADDQ_5048,{2U,5U,0U}},
{ADDQ_5048,{3U,5U,0U}},
{ADDQ_5048,{4U,5U,0U}},
{ADDQ_5048,{5U,5U,0U}},
{ADDQ_5048,{6U,5U,0U}},
{ADDQ_5048,{7U,5U,0U}},
{ADDQ_5050,{0U,5U,0U}},
{ADDQ_5050,{1U,5U,0U}},
{ADDQ_5050,{2U,5U,0U}},
{ADDQ_5050,{3U,5U,0U}},
{ADDQ_5050,{4U,5U,0U}},
{ADDQ_5050,{5U,5U,0U}},
{ADDQ_5050,{6U,5U,0U}},
{ADDQ_5050,{7U,5U,0U}},
{ADDQ_5058,{0U,5U,0U}},
{ADDQ_5058,{1U,5U,0U}},
{ADDQ_5058,{2U,5U,0U}},
{ADDQ_5058,{3U,5U,0U}},
{ADDQ_5058,{4U,5U,0U}},
{ADDQ_5058,{5U,5U,0U}},
{ADDQ_5058,{6U,5U,0U}},
{ADDQ_5058,{7U,5U,0U}},
{ADDQ_5060,{0U,5U,0U}},
{ADDQ_5060,{1U,5U,0U}},
{ADDQ_5060,{2U,5U,0U}},
{ADDQ_5060,{3U,5U,0U}},
{ADDQ_5060,{4U,5U,0U}},
{ADDQ_5060,{5U,5U,0U}},
{ADDQ_5060,{6U,5U,0U}},
{ADDQ_5060,{7U,5U,0U}},
{ADDQ_5068,{0U,5U,0U}},
{ADDQ_5068,{1U,5U,0U}},
{ADDQ_5068,{2U,5U,0U}},
{ADDQ_5068,{3U,5U,0U}},
{ADDQ_5068,{4U,5U,0U}},
{ADDQ_5068,{5U,5U,0U}},
{ADDQ_5068,{6U,5U,0U}},
{ADDQ_5068,{7U,5U,0U}},
{ADDQ_5070,{0U,5U,0U}},
{ADDQ_5070,{1U,5U,0U}},
{ADDQ_5070,{2U,5U,0U}},
{ADDQ_5070,{3U,5U,0U}},
{ADDQ_5070,{4U,5U,0U}},
{ADDQ_5070,{5U,5U,0U}},
{ADDQ_5070,{6U,5U,0U}},
{ADDQ_5070,{7U,5U,0U}},
{ADDQ_5078,{0U,5U,0U}},
{ADDQ_5079,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5080,{0U,5U,0U}},
{ADDQ_5080,{1U,5U,0U}},
{ADDQ_5080,{2U,5U,0U}},
{ADDQ_5080,{3U,5U,0U}},
{ADDQ_5080,{4U,5U,0U}},
{ADDQ_5080,{5U,5U,0U}},
{ADDQ_5080,{6U,5U,0U}},
{ADDQ_5080,{7U,5U,0U}},
{ADDQ_5088,{0U,5U,0U}},
{ADDQ_5088,{1U,5U,0U}},
{ADDQ_5088,{2U,5U,0U}},
{ADDQ_5088,{3U,5U,0U}},
{ADDQ_5088,{4U,5U,0U}},
{ADDQ_5088,{5U,5U,0U}},
{ADDQ_5088,{6U,5U,0U}},
{ADDQ_5088,{7U,5U,0U}},
{ADDQ_5090,{0U,5U,0U}},
{ADDQ_5090,{1U,5U,0U}},
{ADDQ_5090,{2U,5U,0U}},
{ADDQ_5090,{3U,5U,0U}},
{ADDQ_5090,{4U,5U,0U}},
{ADDQ_5090,{5U,5U,0U}},
{ADDQ_5090,{6U,5U,0U}},
{ADDQ_5090,{7U,5U,0U}},
{ADDQ_5098,{0U,5U,0U}},
{ADDQ_5098,{1U,5U,0U}},
{ADDQ_5098,{2U,5U,0U}},
{ADDQ_5098,{3U,5U,0U}},
{ADDQ_5098,{4U,5U,0U}},
{ADDQ_5098,{5U,5U,0U}},
{ADDQ_5098,{6U,5U,0U}},
{ADDQ_5098,{7U,5U,0U}},
{ADDQ_50A0,{0U,5U,0U}},
{ADDQ_50A0,{1U,5U,0U}},
{ADDQ_50A0,{2U,5U,0U}},
{ADDQ_50A0,{3U,5U,0U}},
{ADDQ_50A0,{4U,5U,0U}},
{ADDQ_50A0,{5U,5U,0U}},
{ADDQ_50A0,{6U,5U,0U}},
{ADDQ_50A0,{7U,5U,0U}},
{ADDQ_50A8,{0U,5U,0U}},
{ADDQ_50A8,{1U,5U,0U}},
{ADDQ_50A8,{2U,5U,0U}},
{ADDQ_50A8,{3U,5U,0U}},
{ADDQ_50A8,{4U,5U,0U}},
{ADDQ_50A8,{5U,5U,0U}},
{ADDQ_50A8,{6U,5U,0U}},
{ADDQ_50A8,{7U,5U,0U}},
{ADDQ_50B0,{0U,5U,0U}},
{ADDQ_50B0,{1U,5U,0U}},
{ADDQ_50B0,{2U,5U,0U}},
{ADDQ_50B0,{3U,5U,0U}},
{ADDQ_50B0,{4U,5U,0U}},
{ADDQ_50B0,{5U,5U,0U}},
{ADDQ_50B0,{6U,5U,0U}},
{ADDQ_50B0,{7U,5U,0U}},
{ADDQ_50B8,{0U,5U,0U}},
{ADDQ_50B9,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,10U,0U}},
{SCC_50C0,{1U,10U,0U}},
{SCC_50C0,{2U,10U,0U}},
{SCC_50C0,{3U,10U,0U}},
{SCC_50C0,{4U,10U,0U}},
{SCC_50C0,{5U,10U,0U}},
{SCC_50C0,{6U,10U,0U}},
{SCC_50C0,{7U,10U,0U}},
{DBCC_5AC8,{0U,0U,0U}},
{DBCC_5AC8,{0U,1U,0U}},
{DBCC_5AC8,{0U,2U,0U}},
{DBCC_5AC8,{0U,3U,0U}},
{DBCC_5AC8,{0U,4U,0U}},
{DBCC_5AC8,{0U,5U,0U}},
{DBCC_5AC8,{0U,6U,0U}},
{DBCC_5AC8,{0U,7U,0U}},
{SCC_50D0,{0U,10U,0U}},
{SCC_50D0,{1U,10U,0U}},
{SCC_50D0,{2U,10U,0U}},
{SCC_50D0,{3U,10U,0U}},
{SCC_50D0,{4U,10U,0U}},
{SCC_50D0,{5U,10U,0U}},
{SCC_50D0,{6U,10U,0U}},
{SCC_50D0,{7U,10U,0U}},
{SCC_50D8,{0U,10U,0U}},
{SCC_50D8,{1U,10U,0U}},
{SCC_50D8,{2U,10U,0U}},
{SCC_50D8,{3U,10U,0U}},
{SCC_50D8,{4U,10U,0U}},
{SCC_50D8,{5U,10U,0U}},
{SCC_50D8,{6U,10U,0U}},
{SCC_50D8,{7U,10U,0U}},
{SCC_50E0,{0U,10U,0U}},
{SCC_50E0,{1U,10U,0U}},
{SCC_50E0,{2U,10U,0U}},
{SCC_50E0,{3U,10U,0U}},
{SCC_50E0,{4U,10U,0U}},
{SCC_50E0,{5U,10U,0U}},
{SCC_50E0,{6U,10U,0U}},
{SCC_50E0,{7U,10U,0U}},
{SCC_50E8,{0U,10U,0U}},
{SCC_50E8,{1U,10U,0U}},
{SCC_50E8,{2U,10U,0U}},
{SCC_50E8,{3U,10U,0U}},
{SCC_50E8,{4U,10U,0U}},
{SCC_50E8,{5U,10U,0U}},
{SCC_50E8,{6U,10U,0U}},
{SCC_50E8,{7U,10U,0U}},
{SCC_50F0,{0U,10U,0U}},
{SCC_50F0,{1U,10U,0U}},
{SCC_50F0,{2U,10U,0U}},
{SCC_50F0,{3U,10U,0U}},
{SCC_50F0,{4U,10U,0U}},
{SCC_50F0,{5U,10U,0U}},
{SCC_50F0,{6U,10U,0U}},
{SCC_50F0,{7U,10U,0U}},
{SCC_50F8,{0U,10U,0U}},
{SCC_50F9,{0U,10U,0U}},
{TRAPCC_5AFA,{0U,0U,0U}},
{TRAPCC_5AFB,{0U,0U,0U}},
{TRAPCC_5AFC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5100,{0U,5U,0U}},
{SUBQ_5100,{1U,5U,0U}},
{SUBQ_5100,{2U,5U,0U}},
{SUBQ_5100,{3U,5U,0U}},
{SUBQ_5100,{4U,5U,0U}},
{SUBQ_5100,{5U,5U,0U}},
{SUBQ_5100,{6U,5U,0U}},
{SUBQ_5100,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5110,{0U,5U,0U}},
{SUBQ_5110,{1U,5U,0U}},
{SUBQ_5110,{2U,5U,0U}},
{SUBQ_5110,{3U,5U,0U}},
{SUBQ_5110,{4U,5U,0U}},
{SUBQ_5110,{5U,5U,0U}},
{SUBQ_5110,{6U,5U,0U}},
{SUBQ_5110,{7U,5U,0U}},
{SUBQ_5118,{0U,5U,0U}},
{SUBQ_5118,{1U,5U,0U}},
{SUBQ_5118,{2U,5U,0U}},
{SUBQ_5118,{3U,5U,0U}},
{SUBQ_5118,{4U,5U,0U}},
{SUBQ_5118,{5U,5U,0U}},
{SUBQ_5118,{6U,5U,0U}},
{SUBQ_5118,{7U,5U,0U}},
{SUBQ_5120,{0U,5U,0U}},
{SUBQ_5120,{1U,5U,0U}},
{SUBQ_5120,{2U,5U,0U}},
{SUBQ_5120,{3U,5U,0U}},
{SUBQ_5120,{4U,5U,0U}},
{SUBQ_5120,{5U,5U,0U}},
{SUBQ_5120,{6U,5U,0U}},
{SUBQ_5120,{7U,5U,0U}},
{SUBQ_5128,{0U,5U,0U}},
{SUBQ_5128,{1U,5U,0U}},
{SUBQ_5128,{2U,5U,0U}},
{SUBQ_5128,{3U,5U,0U}},
{SUBQ_5128,{4U,5U,0U}},
{SUBQ_5128,{5U,5U,0U}},
{SUBQ_5128,{6U,5U,0U}},
{SUBQ_5128,{7U,5U,0U}},
{SUBQ_5130,{0U,5U,0U}},
{SUBQ_5130,{1U,5U,0U}},
{SUBQ_5130,{2U,5U,0U}},
{SUBQ_5130,{3U,5U,0U}},
{SUBQ_5130,{4U,5U,0U}},
{SUBQ_5130,{5U,5U,0U}},
{SUBQ_5130,{6U,5U,0U}},
{SUBQ_5130,{7U,5U,0U}},
{SUBQ_5138,{0U,5U,0U}},
{SUBQ_5139,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5140,{0U,5U,0U}},
{SUBQ_5140,{1U,5U,0U}},
{SUBQ_5140,{2U,5U,0U}},
{SUBQ_5140,{3U,5U,0U}},
{SUBQ_5140,{4U,5U,0U}},
{SUBQ_5140,{5U,5U,0U}},
{SUBQ_5140,{6U,5U,0U}},
{SUBQ_5140,{7U,5U,0U}},
{SUBQ_5148,{0U,5U,0U}},
{SUBQ_5148,{1U,5U,0U}},
{SUBQ_5148,{2U,5U,0U}},
{SUBQ_5148,{3U,5U,0U}},
{SUBQ_5148,{4U,5U,0U}},
{SUBQ_5148,{5U,5U,0U}},
{SUBQ_5148,{6U,5U,0U}},
{SUBQ_5148,{7U,5U,0U}},
{SUBQ_5150,{0U,5U,0U}},
{SUBQ_5150,{1U,5U,0U}},
{SUBQ_5150,{2U,5U,0U}},
{SUBQ_5150,{3U,5U,0U}},
{SUBQ_5150,{4U,5U,0U}},
{SUBQ_5150,{5U,5U,0U}},
{SUBQ_5150,{6U,5U,0U}},
{SUBQ_5150,{7U,5U,0U}},
{SUBQ_5158,{0U,5U,0U}},
{SUBQ_5158,{1U,5U,0U}},
{SUBQ_5158,{2U,5U,0U}},
{SUBQ_5158,{3U,5U,0U}},
{SUBQ_5158,{4U,5U,0U}},
{SUBQ_5158,{5U,5U,0U}},
{SUBQ_5158,{6U,5U,0U}},
{SUBQ_5158,{7U,5U,0U}},
{SUBQ_5160,{0U,5U,0U}},
{SUBQ_5160,{1U,5U,0U}},
{SUBQ_5160,{2U,5U,0U}},
{SUBQ_5160,{3U,5U,0U}},
{SUBQ_5160,{4U,5U,0U}},
{SUBQ_5160,{5U,5U,0U}},
{SUBQ_5160,{6U,5U,0U}},
{SUBQ_5160,{7U,5U,0U}},
{SUBQ_5168,{0U,5U,0U}},
{SUBQ_5168,{1U,5U,0U}},
{SUBQ_5168,{2U,5U,0U}},
{SUBQ_5168,{3U,5U,0U}},
{SUBQ_5168,{4U,5U,0U}},
{SUBQ_5168,{5U,5U,0U}},
{SUBQ_5168,{6U,5U,0U}},
{SUBQ_5168,{7U,5U,0U}},
{SUBQ_5170,{0U,5U,0U}},
{SUBQ_5170,{1U,5U,0U}},
{SUBQ_5170,{2U,5U,0U}},
{SUBQ_5170,{3U,5U,0U}},
{SUBQ_5170,{4U,5U,0U}},
{SUBQ_5170,{5U,5U,0U}},
{SUBQ_5170,{6U,5U,0U}},
{SUBQ_5170,{7U,5U,0U}},
{SUBQ_5178,{0U,5U,0U}},
{SUBQ_5179,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5180,{0U,5U,0U}},
{SUBQ_5180,{1U,5U,0U}},
{SUBQ_5180,{2U,5U,0U}},
{SUBQ_5180,{3U,5U,0U}},
{SUBQ_5180,{4U,5U,0U}},
{SUBQ_5180,{5U,5U,0U}},
{SUBQ_5180,{6U,5U,0U}},
{SUBQ_5180,{7U,5U,0U}},
{SUBQ_5188,{0U,5U,0U}},
{SUBQ_5188,{1U,5U,0U}},
{SUBQ_5188,{2U,5U,0U}},
{SUBQ_5188,{3U,5U,0U}},
{SUBQ_5188,{4U,5U,0U}},
{SUBQ_5188,{5U,5U,0U}},
{SUBQ_5188,{6U,5U,0U}},
{SUBQ_5188,{7U,5U,0U}},
{SUBQ_5190,{0U,5U,0U}},
{SUBQ_5190,{1U,5U,0U}},
{SUBQ_5190,{2U,5U,0U}},
{SUBQ_5190,{3U,5U,0U}},
{SUBQ_5190,{4U,5U,0U}},
{SUBQ_5190,{5U,5U,0U}},
{SUBQ_5190,{6U,5U,0U}},
{SUBQ_5190,{7U,5U,0U}},
{SUBQ_5198,{0U,5U,0U}},
{SUBQ_5198,{1U,5U,0U}},
{SUBQ_5198,{2U,5U,0U}},
{SUBQ_5198,{3U,5U,0U}},
{SUBQ_5198,{4U,5U,0U}},
{SUBQ_5198,{5U,5U,0U}},
{SUBQ_5198,{6U,5U,0U}},
{SUBQ_5198,{7U,5U,0U}},
{SUBQ_51A0,{0U,5U,0U}},
{SUBQ_51A0,{1U,5U,0U}},
{SUBQ_51A0,{2U,5U,0U}},
{SUBQ_51A0,{3U,5U,0U}},
{SUBQ_51A0,{4U,5U,0U}},
{SUBQ_51A0,{5U,5U,0U}},
{SUBQ_51A0,{6U,5U,0U}},
{SUBQ_51A0,{7U,5U,0U}},
{SUBQ_51A8,{0U,5U,0U}},
{SUBQ_51A8,{1U,5U,0U}},
{SUBQ_51A8,{2U,5U,0U}},
{SUBQ_51A8,{3U,5U,0U}},
{SUBQ_51A8,{4U,5U,0U}},
{SUBQ_51A8,{5U,5U,0U}},
{SUBQ_51A8,{6U,5U,0U}},
{SUBQ_51A8,{7U,5U,0U}},
{SUBQ_51B0,{0U,5U,0U}},
{SUBQ_51B0,{1U,5U,0U}},
{SUBQ_51B0,{2U,5U,0U}},
{SUBQ_51B0,{3U,5U,0U}},
{SUBQ_51B0,{4U,5U,0U}},
{SUBQ_51B0,{5U,5U,0U}},
{SUBQ_51B0,{6U,5U,0U}},
{SUBQ_51B0,{7U,5U,0U}},
{SUBQ_51B8,{0U,5U,0U}},
{SUBQ_51B9,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,11U,0U}},
{SCC_50C0,{1U,11U,0U}},
{SCC_50C0,{2U,11U,0U}},
{SCC_50C0,{3U,11U,0U}},
{SCC_50C0,{4U,11U,0U}},
{SCC_50C0,{5U,11U,0U}},
{SCC_50C0,{6U,11U,0U}},
{SCC_50C0,{7U,11U,0U}},
{DBCC_5BC8,{0U,0U,0U}},
{DBCC_5BC8,{0U,1U,0U}},
{DBCC_5BC8,{0U,2U,0U}},
{DBCC_5BC8,{0U,3U,0U}},
{DBCC_5BC8,{0U,4U,0U}},
{DBCC_5BC8,{0U,5U,0U}},
{DBCC_5BC8,{0U,6U,0U}},
{DBCC_5BC8,{0U,7U,0U}},
{SCC_50D0,{0U,11U,0U}},
{SCC_50D0,{1U,11U,0U}},
{SCC_50D0,{2U,11U,0U}},
{SCC_50D0,{3U,11U,0U}},
{SCC_50D0,{4U,11U,0U}},
{SCC_50D0,{5U,11U,0U}},
{SCC_50D0,{6U,11U,0U}},
{SCC_50D0,{7U,11U,0U}},
{SCC_50D8,{0U,11U,0U}},
{SCC_50D8,{1U,11U,0U}},
{SCC_50D8,{2U,11U,0U}},
{SCC_50D8,{3U,11U,0U}},
{SCC_50D8,{4U,11U,0U}},
{SCC_50D8,{5U,11U,0U}},
{SCC_50D8,{6U,11U,0U}},
{SCC_50D8,{7U,11U,0U}},
{SCC_50E0,{0U,11U,0U}},
{SCC_50E0,{1U,11U,0U}},
{SCC_50E0,{2U,11U,0U}},
{SCC_50E0,{3U,11U,0U}},
{SCC_50E0,{4U,11U,0U}},
{SCC_50E0,{5U,11U,0U}},
{SCC_50E0,{6U,11U,0U}},
{SCC_50E0,{7U,11U,0U}},
{SCC_50E8,{0U,11U,0U}},
{SCC_50E8,{1U,11U,0U}},
{SCC_50E8,{2U,11U,0U}},
{SCC_50E8,{3U,11U,0U}},
{SCC_50E8,{4U,11U,0U}},
{SCC_50E8,{5U,11U,0U}},
{SCC_50E8,{6U,11U,0U}},
{SCC_50E8,{7U,11U,0U}},
{SCC_50F0,{0U,11U,0U}},
{SCC_50F0,{1U,11U,0U}},
{SCC_50F0,{2U,11U,0U}},
{SCC_50F0,{3U,11U,0U}},
{SCC_50F0,{4U,11U,0U}},
{SCC_50F0,{5U,11U,0U}},
{SCC_50F0,{6U,11U,0U}},
{SCC_50F0,{7U,11U,0U}},
{SCC_50F8,{0U,11U,0U}},
{SCC_50F9,{0U,11U,0U}},
{TRAPCC_5BFA,{0U,0U,0U}},
{TRAPCC_5BFB,{0U,0U,0U}},
{TRAPCC_5BFC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5000,{0U,6U,0U}},
{ADDQ_5000,{1U,6U,0U}},
{ADDQ_5000,{2U,6U,0U}},
{ADDQ_5000,{3U,6U,0U}},
{ADDQ_5000,{4U,6U,0U}},
{ADDQ_5000,{5U,6U,0U}},
{ADDQ_5000,{6U,6U,0U}},
{ADDQ_5000,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5010,{0U,6U,0U}},
{ADDQ_5010,{1U,6U,0U}},
{ADDQ_5010,{2U,6U,0U}},
{ADDQ_5010,{3U,6U,0U}},
{ADDQ_5010,{4U,6U,0U}},
{ADDQ_5010,{5U,6U,0U}},
{ADDQ_5010,{6U,6U,0U}},
{ADDQ_5010,{7U,6U,0U}},
{ADDQ_5018,{0U,6U,0U}},
{ADDQ_5018,{1U,6U,0U}},
{ADDQ_5018,{2U,6U,0U}},
{ADDQ_5018,{3U,6U,0U}},
{ADDQ_5018,{4U,6U,0U}},
{ADDQ_5018,{5U,6U,0U}},
{ADDQ_5018,{6U,6U,0U}},
{ADDQ_5018,{7U,6U,0U}},
{ADDQ_5020,{0U,6U,0U}},
{ADDQ_5020,{1U,6U,0U}},
{ADDQ_5020,{2U,6U,0U}},
{ADDQ_5020,{3U,6U,0U}},
{ADDQ_5020,{4U,6U,0U}},
{ADDQ_5020,{5U,6U,0U}},
{ADDQ_5020,{6U,6U,0U}},
{ADDQ_5020,{7U,6U,0U}},
{ADDQ_5028,{0U,6U,0U}},
{ADDQ_5028,{1U,6U,0U}},
{ADDQ_5028,{2U,6U,0U}},
{ADDQ_5028,{3U,6U,0U}},
{ADDQ_5028,{4U,6U,0U}},
{ADDQ_5028,{5U,6U,0U}},
{ADDQ_5028,{6U,6U,0U}},
{ADDQ_5028,{7U,6U,0U}},
{ADDQ_5030,{0U,6U,0U}},
{ADDQ_5030,{1U,6U,0U}},
{ADDQ_5030,{2U,6U,0U}},
{ADDQ_5030,{3U,6U,0U}},
{ADDQ_5030,{4U,6U,0U}},
{ADDQ_5030,{5U,6U,0U}},
{ADDQ_5030,{6U,6U,0U}},
{ADDQ_5030,{7U,6U,0U}},
{ADDQ_5038,{0U,6U,0U}},
{ADDQ_5039,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5040,{0U,6U,0U}},
{ADDQ_5040,{1U,6U,0U}},
{ADDQ_5040,{2U,6U,0U}},
{ADDQ_5040,{3U,6U,0U}},
{ADDQ_5040,{4U,6U,0U}},
{ADDQ_5040,{5U,6U,0U}},
{ADDQ_5040,{6U,6U,0U}},
{ADDQ_5040,{7U,6U,0U}},
{ADDQ_5048,{0U,6U,0U}},
{ADDQ_5048,{1U,6U,0U}},
{ADDQ_5048,{2U,6U,0U}},
{ADDQ_5048,{3U,6U,0U}},
{ADDQ_5048,{4U,6U,0U}},
{ADDQ_5048,{5U,6U,0U}},
{ADDQ_5048,{6U,6U,0U}},
{ADDQ_5048,{7U,6U,0U}},
{ADDQ_5050,{0U,6U,0U}},
{ADDQ_5050,{1U,6U,0U}},
{ADDQ_5050,{2U,6U,0U}},
{ADDQ_5050,{3U,6U,0U}},
{ADDQ_5050,{4U,6U,0U}},
{ADDQ_5050,{5U,6U,0U}},
{ADDQ_5050,{6U,6U,0U}},
{ADDQ_5050,{7U,6U,0U}},
{ADDQ_5058,{0U,6U,0U}},
{ADDQ_5058,{1U,6U,0U}},
{ADDQ_5058,{2U,6U,0U}},
{ADDQ_5058,{3U,6U,0U}},
{ADDQ_5058,{4U,6U,0U}},
{ADDQ_5058,{5U,6U,0U}},
{ADDQ_5058,{6U,6U,0U}},
{ADDQ_5058,{7U,6U,0U}},
{ADDQ_5060,{0U,6U,0U}},
{ADDQ_5060,{1U,6U,0U}},
{ADDQ_5060,{2U,6U,0U}},
{ADDQ_5060,{3U,6U,0U}},
{ADDQ_5060,{4U,6U,0U}},
{ADDQ_5060,{5U,6U,0U}},
{ADDQ_5060,{6U,6U,0U}},
{ADDQ_5060,{7U,6U,0U}},
{ADDQ_5068,{0U,6U,0U}},
{ADDQ_5068,{1U,6U,0U}},
{ADDQ_5068,{2U,6U,0U}},
{ADDQ_5068,{3U,6U,0U}},
{ADDQ_5068,{4U,6U,0U}},
{ADDQ_5068,{5U,6U,0U}},
{ADDQ_5068,{6U,6U,0U}},
{ADDQ_5068,{7U,6U,0U}},
{ADDQ_5070,{0U,6U,0U}},
{ADDQ_5070,{1U,6U,0U}},
{ADDQ_5070,{2U,6U,0U}},
{ADDQ_5070,{3U,6U,0U}},
{ADDQ_5070,{4U,6U,0U}},
{ADDQ_5070,{5U,6U,0U}},
{ADDQ_5070,{6U,6U,0U}},
{ADDQ_5070,{7U,6U,0U}},
{ADDQ_5078,{0U,6U,0U}},
{ADDQ_5079,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5080,{0U,6U,0U}},
{ADDQ_5080,{1U,6U,0U}},
{ADDQ_5080,{2U,6U,0U}},
{ADDQ_5080,{3U,6U,0U}},
{ADDQ_5080,{4U,6U,0U}},
{ADDQ_5080,{5U,6U,0U}},
{ADDQ_5080,{6U,6U,0U}},
{ADDQ_5080,{7U,6U,0U}},
{ADDQ_5088,{0U,6U,0U}},
{ADDQ_5088,{1U,6U,0U}},
{ADDQ_5088,{2U,6U,0U}},
{ADDQ_5088,{3U,6U,0U}},
{ADDQ_5088,{4U,6U,0U}},
{ADDQ_5088,{5U,6U,0U}},
{ADDQ_5088,{6U,6U,0U}},
{ADDQ_5088,{7U,6U,0U}},
{ADDQ_5090,{0U,6U,0U}},
{ADDQ_5090,{1U,6U,0U}},
{ADDQ_5090,{2U,6U,0U}},
{ADDQ_5090,{3U,6U,0U}},
{ADDQ_5090,{4U,6U,0U}},
{ADDQ_5090,{5U,6U,0U}},
{ADDQ_5090,{6U,6U,0U}},
{ADDQ_5090,{7U,6U,0U}},
{ADDQ_5098,{0U,6U,0U}},
{ADDQ_5098,{1U,6U,0U}},
{ADDQ_5098,{2U,6U,0U}},
{ADDQ_5098,{3U,6U,0U}},
{ADDQ_5098,{4U,6U,0U}},
{ADDQ_5098,{5U,6U,0U}},
{ADDQ_5098,{6U,6U,0U}},
{ADDQ_5098,{7U,6U,0U}},
{ADDQ_50A0,{0U,6U,0U}},
{ADDQ_50A0,{1U,6U,0U}},
{ADDQ_50A0,{2U,6U,0U}},
{ADDQ_50A0,{3U,6U,0U}},
{ADDQ_50A0,{4U,6U,0U}},
{ADDQ_50A0,{5U,6U,0U}},
{ADDQ_50A0,{6U,6U,0U}},
{ADDQ_50A0,{7U,6U,0U}},
{ADDQ_50A8,{0U,6U,0U}},
{ADDQ_50A8,{1U,6U,0U}},
{ADDQ_50A8,{2U,6U,0U}},
{ADDQ_50A8,{3U,6U,0U}},
{ADDQ_50A8,{4U,6U,0U}},
{ADDQ_50A8,{5U,6U,0U}},
{ADDQ_50A8,{6U,6U,0U}},
{ADDQ_50A8,{7U,6U,0U}},
{ADDQ_50B0,{0U,6U,0U}},
{ADDQ_50B0,{1U,6U,0U}},
{ADDQ_50B0,{2U,6U,0U}},
{ADDQ_50B0,{3U,6U,0U}},
{ADDQ_50B0,{4U,6U,0U}},
{ADDQ_50B0,{5U,6U,0U}},
{ADDQ_50B0,{6U,6U,0U}},
{ADDQ_50B0,{7U,6U,0U}},
{ADDQ_50B8,{0U,6U,0U}},
{ADDQ_50B9,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,12U,0U}},
{SCC_50C0,{1U,12U,0U}},
{SCC_50C0,{2U,12U,0U}},
{SCC_50C0,{3U,12U,0U}},
{SCC_50C0,{4U,12U,0U}},
{SCC_50C0,{5U,12U,0U}},
{SCC_50C0,{6U,12U,0U}},
{SCC_50C0,{7U,12U,0U}},
{DBCC_5CC8,{0U,0U,0U}},
{DBCC_5CC8,{0U,1U,0U}},
{DBCC_5CC8,{0U,2U,0U}},
{DBCC_5CC8,{0U,3U,0U}},
{DBCC_5CC8,{0U,4U,0U}},
{DBCC_5CC8,{0U,5U,0U}},
{DBCC_5CC8,{0U,6U,0U}},
{DBCC_5CC8,{0U,7U,0U}},
{SCC_50D0,{0U,12U,0U}},
{SCC_50D0,{1U,12U,0U}},
{SCC_50D0,{2U,12U,0U}},
{SCC_50D0,{3U,12U,0U}},
{SCC_50D0,{4U,12U,0U}},
{SCC_50D0,{5U,12U,0U}},
{SCC_50D0,{6U,12U,0U}},
{SCC_50D0,{7U,12U,0U}},
{SCC_50D8,{0U,12U,0U}},
{SCC_50D8,{1U,12U,0U}},
{SCC_50D8,{2U,12U,0U}},
{SCC_50D8,{3U,12U,0U}},
{SCC_50D8,{4U,12U,0U}},
{SCC_50D8,{5U,12U,0U}},
{SCC_50D8,{6U,12U,0U}},
{SCC_50D8,{7U,12U,0U}},
{SCC_50E0,{0U,12U,0U}},
{SCC_50E0,{1U,12U,0U}},
{SCC_50E0,{2U,12U,0U}},
{SCC_50E0,{3U,12U,0U}},
{SCC_50E0,{4U,12U,0U}},
{SCC_50E0,{5U,12U,0U}},
{SCC_50E0,{6U,12U,0U}},
{SCC_50E0,{7U,12U,0U}},
{SCC_50E8,{0U,12U,0U}},
{SCC_50E8,{1U,12U,0U}},
{SCC_50E8,{2U,12U,0U}},
{SCC_50E8,{3U,12U,0U}},
{SCC_50E8,{4U,12U,0U}},
{SCC_50E8,{5U,12U,0U}},
{SCC_50E8,{6U,12U,0U}},
{SCC_50E8,{7U,12U,0U}},
{SCC_50F0,{0U,12U,0U}},
{SCC_50F0,{1U,12U,0U}},
{SCC_50F0,{2U,12U,0U}},
{SCC_50F0,{3U,12U,0U}},
{SCC_50F0,{4U,12U,0U}},
{SCC_50F0,{5U,12U,0U}},
{SCC_50F0,{6U,12U,0U}},
{SCC_50F0,{7U,12U,0U}},
{SCC_50F8,{0U,12U,0U}},
{SCC_50F9,{0U,12U,0U}},
{TRAPCC_5CFA,{0U,0U,0U}},
{TRAPCC_5CFB,{0U,0U,0U}},
{TRAPCC_5CFC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5100,{0U,6U,0U}},
{SUBQ_5100,{1U,6U,0U}},
{SUBQ_5100,{2U,6U,0U}},
{SUBQ_5100,{3U,6U,0U}},
{SUBQ_5100,{4U,6U,0U}},
{SUBQ_5100,{5U,6U,0U}},
{SUBQ_5100,{6U,6U,0U}},
{SUBQ_5100,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5110,{0U,6U,0U}},
{SUBQ_5110,{1U,6U,0U}},
{SUBQ_5110,{2U,6U,0U}},
{SUBQ_5110,{3U,6U,0U}},
{SUBQ_5110,{4U,6U,0U}},
{SUBQ_5110,{5U,6U,0U}},
{SUBQ_5110,{6U,6U,0U}},
{SUBQ_5110,{7U,6U,0U}},
{SUBQ_5118,{0U,6U,0U}},
{SUBQ_5118,{1U,6U,0U}},
{SUBQ_5118,{2U,6U,0U}},
{SUBQ_5118,{3U,6U,0U}},
{SUBQ_5118,{4U,6U,0U}},
{SUBQ_5118,{5U,6U,0U}},
{SUBQ_5118,{6U,6U,0U}},
{SUBQ_5118,{7U,6U,0U}},
{SUBQ_5120,{0U,6U,0U}},
{SUBQ_5120,{1U,6U,0U}},
{SUBQ_5120,{2U,6U,0U}},
{SUBQ_5120,{3U,6U,0U}},
{SUBQ_5120,{4U,6U,0U}},
{SUBQ_5120,{5U,6U,0U}},
{SUBQ_5120,{6U,6U,0U}},
{SUBQ_5120,{7U,6U,0U}},
{SUBQ_5128,{0U,6U,0U}},
{SUBQ_5128,{1U,6U,0U}},
{SUBQ_5128,{2U,6U,0U}},
{SUBQ_5128,{3U,6U,0U}},
{SUBQ_5128,{4U,6U,0U}},
{SUBQ_5128,{5U,6U,0U}},
{SUBQ_5128,{6U,6U,0U}},
{SUBQ_5128,{7U,6U,0U}},
{SUBQ_5130,{0U,6U,0U}},
{SUBQ_5130,{1U,6U,0U}},
{SUBQ_5130,{2U,6U,0U}},
{SUBQ_5130,{3U,6U,0U}},
{SUBQ_5130,{4U,6U,0U}},
{SUBQ_5130,{5U,6U,0U}},
{SUBQ_5130,{6U,6U,0U}},
{SUBQ_5130,{7U,6U,0U}},
{SUBQ_5138,{0U,6U,0U}},
{SUBQ_5139,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5140,{0U,6U,0U}},
{SUBQ_5140,{1U,6U,0U}},
{SUBQ_5140,{2U,6U,0U}},
{SUBQ_5140,{3U,6U,0U}},
{SUBQ_5140,{4U,6U,0U}},
{SUBQ_5140,{5U,6U,0U}},
{SUBQ_5140,{6U,6U,0U}},
{SUBQ_5140,{7U,6U,0U}},
{SUBQ_5148,{0U,6U,0U}},
{SUBQ_5148,{1U,6U,0U}},
{SUBQ_5148,{2U,6U,0U}},
{SUBQ_5148,{3U,6U,0U}},
{SUBQ_5148,{4U,6U,0U}},
{SUBQ_5148,{5U,6U,0U}},
{SUBQ_5148,{6U,6U,0U}},
{SUBQ_5148,{7U,6U,0U}},
{SUBQ_5150,{0U,6U,0U}},
{SUBQ_5150,{1U,6U,0U}},
{SUBQ_5150,{2U,6U,0U}},
{SUBQ_5150,{3U,6U,0U}},
{SUBQ_5150,{4U,6U,0U}},
{SUBQ_5150,{5U,6U,0U}},
{SUBQ_5150,{6U,6U,0U}},
{SUBQ_5150,{7U,6U,0U}},
{SUBQ_5158,{0U,6U,0U}},
{SUBQ_5158,{1U,6U,0U}},
{SUBQ_5158,{2U,6U,0U}},
{SUBQ_5158,{3U,6U,0U}},
{SUBQ_5158,{4U,6U,0U}},
{SUBQ_5158,{5U,6U,0U}},
{SUBQ_5158,{6U,6U,0U}},
{SUBQ_5158,{7U,6U,0U}},
{SUBQ_5160,{0U,6U,0U}},
{SUBQ_5160,{1U,6U,0U}},
{SUBQ_5160,{2U,6U,0U}},
{SUBQ_5160,{3U,6U,0U}},
{SUBQ_5160,{4U,6U,0U}},
{SUBQ_5160,{5U,6U,0U}},
{SUBQ_5160,{6U,6U,0U}},
{SUBQ_5160,{7U,6U,0U}},
{SUBQ_5168,{0U,6U,0U}},
{SUBQ_5168,{1U,6U,0U}},
{SUBQ_5168,{2U,6U,0U}},
{SUBQ_5168,{3U,6U,0U}},
{SUBQ_5168,{4U,6U,0U}},
{SUBQ_5168,{5U,6U,0U}},
{SUBQ_5168,{6U,6U,0U}},
{SUBQ_5168,{7U,6U,0U}},
{SUBQ_5170,{0U,6U,0U}},
{SUBQ_5170,{1U,6U,0U}},
{SUBQ_5170,{2U,6U,0U}},
{SUBQ_5170,{3U,6U,0U}},
{SUBQ_5170,{4U,6U,0U}},
{SUBQ_5170,{5U,6U,0U}},
{SUBQ_5170,{6U,6U,0U}},
{SUBQ_5170,{7U,6U,0U}},
{SUBQ_5178,{0U,6U,0U}},
{SUBQ_5179,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5180,{0U,6U,0U}},
{SUBQ_5180,{1U,6U,0U}},
{SUBQ_5180,{2U,6U,0U}},
{SUBQ_5180,{3U,6U,0U}},
{SUBQ_5180,{4U,6U,0U}},
{SUBQ_5180,{5U,6U,0U}},
{SUBQ_5180,{6U,6U,0U}},
{SUBQ_5180,{7U,6U,0U}},
{SUBQ_5188,{0U,6U,0U}},
{SUBQ_5188,{1U,6U,0U}},
{SUBQ_5188,{2U,6U,0U}},
{SUBQ_5188,{3U,6U,0U}},
{SUBQ_5188,{4U,6U,0U}},
{SUBQ_5188,{5U,6U,0U}},
{SUBQ_5188,{6U,6U,0U}},
{SUBQ_5188,{7U,6U,0U}},
{SUBQ_5190,{0U,6U,0U}},
{SUBQ_5190,{1U,6U,0U}},
{SUBQ_5190,{2U,6U,0U}},
{SUBQ_5190,{3U,6U,0U}},
{SUBQ_5190,{4U,6U,0U}},
{SUBQ_5190,{5U,6U,0U}},
{SUBQ_5190,{6U,6U,0U}},
{SUBQ_5190,{7U,6U,0U}},
{SUBQ_5198,{0U,6U,0U}},
{SUBQ_5198,{1U,6U,0U}},
{SUBQ_5198,{2U,6U,0U}},
{SUBQ_5198,{3U,6U,0U}},
{SUBQ_5198,{4U,6U,0U}},
{SUBQ_5198,{5U,6U,0U}},
{SUBQ_5198,{6U,6U,0U}},
{SUBQ_5198,{7U,6U,0U}},
{SUBQ_51A0,{0U,6U,0U}},
{SUBQ_51A0,{1U,6U,0U}},
{SUBQ_51A0,{2U,6U,0U}},
{SUBQ_51A0,{3U,6U,0U}},
{SUBQ_51A0,{4U,6U,0U}},
{SUBQ_51A0,{5U,6U,0U}},
{SUBQ_51A0,{6U,6U,0U}},
{SUBQ_51A0,{7U,6U,0U}},
{SUBQ_51A8,{0U,6U,0U}},
{SUBQ_51A8,{1U,6U,0U}},
{SUBQ_51A8,{2U,6U,0U}},
{SUBQ_51A8,{3U,6U,0U}},
{SUBQ_51A8,{4U,6U,0U}},
{SUBQ_51A8,{5U,6U,0U}},
{SUBQ_51A8,{6U,6U,0U}},
{SUBQ_51A8,{7U,6U,0U}},
{SUBQ_51B0,{0U,6U,0U}},
{SUBQ_51B0,{1U,6U,0U}},
{SUBQ_51B0,{2U,6U,0U}},
{SUBQ_51B0,{3U,6U,0U}},
{SUBQ_51B0,{4U,6U,0U}},
{SUBQ_51B0,{5U,6U,0U}},
{SUBQ_51B0,{6U,6U,0U}},
{SUBQ_51B0,{7U,6U,0U}},
{SUBQ_51B8,{0U,6U,0U}},
{SUBQ_51B9,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,13U,0U}},
{SCC_50C0,{1U,13U,0U}},
{SCC_50C0,{2U,13U,0U}},
{SCC_50C0,{3U,13U,0U}},
{SCC_50C0,{4U,13U,0U}},
{SCC_50C0,{5U,13U,0U}},
{SCC_50C0,{6U,13U,0U}},
{SCC_50C0,{7U,13U,0U}},
{DBCC_5DC8,{0U,0U,0U}},
{DBCC_5DC8,{0U,1U,0U}},
{DBCC_5DC8,{0U,2U,0U}},
{DBCC_5DC8,{0U,3U,0U}},
{DBCC_5DC8,{0U,4U,0U}},
{DBCC_5DC8,{0U,5U,0U}},
{DBCC_5DC8,{0U,6U,0U}},
{DBCC_5DC8,{0U,7U,0U}},
{SCC_50D0,{0U,13U,0U}},
{SCC_50D0,{1U,13U,0U}},
{SCC_50D0,{2U,13U,0U}},
{SCC_50D0,{3U,13U,0U}},
{SCC_50D0,{4U,13U,0U}},
{SCC_50D0,{5U,13U,0U}},
{SCC_50D0,{6U,13U,0U}},
{SCC_50D0,{7U,13U,0U}},
{SCC_50D8,{0U,13U,0U}},
{SCC_50D8,{1U,13U,0U}},
{SCC_50D8,{2U,13U,0U}},
{SCC_50D8,{3U,13U,0U}},
{SCC_50D8,{4U,13U,0U}},
{SCC_50D8,{5U,13U,0U}},
{SCC_50D8,{6U,13U,0U}},
{SCC_50D8,{7U,13U,0U}},
{SCC_50E0,{0U,13U,0U}},
{SCC_50E0,{1U,13U,0U}},
{SCC_50E0,{2U,13U,0U}},
{SCC_50E0,{3U,13U,0U}},
{SCC_50E0,{4U,13U,0U}},
{SCC_50E0,{5U,13U,0U}},
{SCC_50E0,{6U,13U,0U}},
{SCC_50E0,{7U,13U,0U}},
{SCC_50E8,{0U,13U,0U}},
{SCC_50E8,{1U,13U,0U}},
{SCC_50E8,{2U,13U,0U}},
{SCC_50E8,{3U,13U,0U}},
{SCC_50E8,{4U,13U,0U}},
{SCC_50E8,{5U,13U,0U}},
{SCC_50E8,{6U,13U,0U}},
{SCC_50E8,{7U,13U,0U}},
{SCC_50F0,{0U,13U,0U}},
{SCC_50F0,{1U,13U,0U}},
{SCC_50F0,{2U,13U,0U}},
{SCC_50F0,{3U,13U,0U}},
{SCC_50F0,{4U,13U,0U}},
{SCC_50F0,{5U,13U,0U}},
{SCC_50F0,{6U,13U,0U}},
{SCC_50F0,{7U,13U,0U}},
{SCC_50F8,{0U,13U,0U}},
{SCC_50F9,{0U,13U,0U}},
{TRAPCC_5DFA,{0U,0U,0U}},
{TRAPCC_5DFB,{0U,0U,0U}},
{TRAPCC_5DFC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5000,{0U,7U,0U}},
{ADDQ_5000,{1U,7U,0U}},
{ADDQ_5000,{2U,7U,0U}},
{ADDQ_5000,{3U,7U,0U}},
{ADDQ_5000,{4U,7U,0U}},
{ADDQ_5000,{5U,7U,0U}},
{ADDQ_5000,{6U,7U,0U}},
{ADDQ_5000,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5010,{0U,7U,0U}},
{ADDQ_5010,{1U,7U,0U}},
{ADDQ_5010,{2U,7U,0U}},
{ADDQ_5010,{3U,7U,0U}},
{ADDQ_5010,{4U,7U,0U}},
{ADDQ_5010,{5U,7U,0U}},
{ADDQ_5010,{6U,7U,0U}},
{ADDQ_5010,{7U,7U,0U}},
{ADDQ_5018,{0U,7U,0U}},
{ADDQ_5018,{1U,7U,0U}},
{ADDQ_5018,{2U,7U,0U}},
{ADDQ_5018,{3U,7U,0U}},
{ADDQ_5018,{4U,7U,0U}},
{ADDQ_5018,{5U,7U,0U}},
{ADDQ_5018,{6U,7U,0U}},
{ADDQ_5018,{7U,7U,0U}},
{ADDQ_5020,{0U,7U,0U}},
{ADDQ_5020,{1U,7U,0U}},
{ADDQ_5020,{2U,7U,0U}},
{ADDQ_5020,{3U,7U,0U}},
{ADDQ_5020,{4U,7U,0U}},
{ADDQ_5020,{5U,7U,0U}},
{ADDQ_5020,{6U,7U,0U}},
{ADDQ_5020,{7U,7U,0U}},
{ADDQ_5028,{0U,7U,0U}},
{ADDQ_5028,{1U,7U,0U}},
{ADDQ_5028,{2U,7U,0U}},
{ADDQ_5028,{3U,7U,0U}},
{ADDQ_5028,{4U,7U,0U}},
{ADDQ_5028,{5U,7U,0U}},
{ADDQ_5028,{6U,7U,0U}},
{ADDQ_5028,{7U,7U,0U}},
{ADDQ_5030,{0U,7U,0U}},
{ADDQ_5030,{1U,7U,0U}},
{ADDQ_5030,{2U,7U,0U}},
{ADDQ_5030,{3U,7U,0U}},
{ADDQ_5030,{4U,7U,0U}},
{ADDQ_5030,{5U,7U,0U}},
{ADDQ_5030,{6U,7U,0U}},
{ADDQ_5030,{7U,7U,0U}},
{ADDQ_5038,{0U,7U,0U}},
{ADDQ_5039,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5040,{0U,7U,0U}},
{ADDQ_5040,{1U,7U,0U}},
{ADDQ_5040,{2U,7U,0U}},
{ADDQ_5040,{3U,7U,0U}},
{ADDQ_5040,{4U,7U,0U}},
{ADDQ_5040,{5U,7U,0U}},
{ADDQ_5040,{6U,7U,0U}},
{ADDQ_5040,{7U,7U,0U}},
{ADDQ_5048,{0U,7U,0U}},
{ADDQ_5048,{1U,7U,0U}},
{ADDQ_5048,{2U,7U,0U}},
{ADDQ_5048,{3U,7U,0U}},
{ADDQ_5048,{4U,7U,0U}},
{ADDQ_5048,{5U,7U,0U}},
{ADDQ_5048,{6U,7U,0U}},
{ADDQ_5048,{7U,7U,0U}},
{ADDQ_5050,{0U,7U,0U}},
{ADDQ_5050,{1U,7U,0U}},
{ADDQ_5050,{2U,7U,0U}},
{ADDQ_5050,{3U,7U,0U}},
{ADDQ_5050,{4U,7U,0U}},
{ADDQ_5050,{5U,7U,0U}},
{ADDQ_5050,{6U,7U,0U}},
{ADDQ_5050,{7U,7U,0U}},
{ADDQ_5058,{0U,7U,0U}},
{ADDQ_5058,{1U,7U,0U}},
{ADDQ_5058,{2U,7U,0U}},
{ADDQ_5058,{3U,7U,0U}},
{ADDQ_5058,{4U,7U,0U}},
{ADDQ_5058,{5U,7U,0U}},
{ADDQ_5058,{6U,7U,0U}},
{ADDQ_5058,{7U,7U,0U}},
{ADDQ_5060,{0U,7U,0U}},
{ADDQ_5060,{1U,7U,0U}},
{ADDQ_5060,{2U,7U,0U}},
{ADDQ_5060,{3U,7U,0U}},
{ADDQ_5060,{4U,7U,0U}},
{ADDQ_5060,{5U,7U,0U}},
{ADDQ_5060,{6U,7U,0U}},
{ADDQ_5060,{7U,7U,0U}},
{ADDQ_5068,{0U,7U,0U}},
{ADDQ_5068,{1U,7U,0U}},
{ADDQ_5068,{2U,7U,0U}},
{ADDQ_5068,{3U,7U,0U}},
{ADDQ_5068,{4U,7U,0U}},
{ADDQ_5068,{5U,7U,0U}},
{ADDQ_5068,{6U,7U,0U}},
{ADDQ_5068,{7U,7U,0U}},
{ADDQ_5070,{0U,7U,0U}},
{ADDQ_5070,{1U,7U,0U}},
{ADDQ_5070,{2U,7U,0U}},
{ADDQ_5070,{3U,7U,0U}},
{ADDQ_5070,{4U,7U,0U}},
{ADDQ_5070,{5U,7U,0U}},
{ADDQ_5070,{6U,7U,0U}},
{ADDQ_5070,{7U,7U,0U}},
{ADDQ_5078,{0U,7U,0U}},
{ADDQ_5079,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDQ_5080,{0U,7U,0U}},
{ADDQ_5080,{1U,7U,0U}},
{ADDQ_5080,{2U,7U,0U}},
{ADDQ_5080,{3U,7U,0U}},
{ADDQ_5080,{4U,7U,0U}},
{ADDQ_5080,{5U,7U,0U}},
{ADDQ_5080,{6U,7U,0U}},
{ADDQ_5080,{7U,7U,0U}},
{ADDQ_5088,{0U,7U,0U}},
{ADDQ_5088,{1U,7U,0U}},
{ADDQ_5088,{2U,7U,0U}},
{ADDQ_5088,{3U,7U,0U}},
{ADDQ_5088,{4U,7U,0U}},
{ADDQ_5088,{5U,7U,0U}},
{ADDQ_5088,{6U,7U,0U}},
{ADDQ_5088,{7U,7U,0U}},
{ADDQ_5090,{0U,7U,0U}},
{ADDQ_5090,{1U,7U,0U}},
{ADDQ_5090,{2U,7U,0U}},
{ADDQ_5090,{3U,7U,0U}},
{ADDQ_5090,{4U,7U,0U}},
{ADDQ_5090,{5U,7U,0U}},
{ADDQ_5090,{6U,7U,0U}},
{ADDQ_5090,{7U,7U,0U}},
{ADDQ_5098,{0U,7U,0U}},
{ADDQ_5098,{1U,7U,0U}},
{ADDQ_5098,{2U,7U,0U}},
{ADDQ_5098,{3U,7U,0U}},
{ADDQ_5098,{4U,7U,0U}},
{ADDQ_5098,{5U,7U,0U}},
{ADDQ_5098,{6U,7U,0U}},
{ADDQ_5098,{7U,7U,0U}},
{ADDQ_50A0,{0U,7U,0U}},
{ADDQ_50A0,{1U,7U,0U}},
{ADDQ_50A0,{2U,7U,0U}},
{ADDQ_50A0,{3U,7U,0U}},
{ADDQ_50A0,{4U,7U,0U}},
{ADDQ_50A0,{5U,7U,0U}},
{ADDQ_50A0,{6U,7U,0U}},
{ADDQ_50A0,{7U,7U,0U}},
{ADDQ_50A8,{0U,7U,0U}},
{ADDQ_50A8,{1U,7U,0U}},
{ADDQ_50A8,{2U,7U,0U}},
{ADDQ_50A8,{3U,7U,0U}},
{ADDQ_50A8,{4U,7U,0U}},
{ADDQ_50A8,{5U,7U,0U}},
{ADDQ_50A8,{6U,7U,0U}},
{ADDQ_50A8,{7U,7U,0U}},
{ADDQ_50B0,{0U,7U,0U}},
{ADDQ_50B0,{1U,7U,0U}},
{ADDQ_50B0,{2U,7U,0U}},
{ADDQ_50B0,{3U,7U,0U}},
{ADDQ_50B0,{4U,7U,0U}},
{ADDQ_50B0,{5U,7U,0U}},
{ADDQ_50B0,{6U,7U,0U}},
{ADDQ_50B0,{7U,7U,0U}},
{ADDQ_50B8,{0U,7U,0U}},
{ADDQ_50B9,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,14U,0U}},
{SCC_50C0,{1U,14U,0U}},
{SCC_50C0,{2U,14U,0U}},
{SCC_50C0,{3U,14U,0U}},
{SCC_50C0,{4U,14U,0U}},
{SCC_50C0,{5U,14U,0U}},
{SCC_50C0,{6U,14U,0U}},
{SCC_50C0,{7U,14U,0U}},
{DBCC_5EC8,{0U,0U,0U}},
{DBCC_5EC8,{0U,1U,0U}},
{DBCC_5EC8,{0U,2U,0U}},
{DBCC_5EC8,{0U,3U,0U}},
{DBCC_5EC8,{0U,4U,0U}},
{DBCC_5EC8,{0U,5U,0U}},
{DBCC_5EC8,{0U,6U,0U}},
{DBCC_5EC8,{0U,7U,0U}},
{SCC_50D0,{0U,14U,0U}},
{SCC_50D0,{1U,14U,0U}},
{SCC_50D0,{2U,14U,0U}},
{SCC_50D0,{3U,14U,0U}},
{SCC_50D0,{4U,14U,0U}},
{SCC_50D0,{5U,14U,0U}},
{SCC_50D0,{6U,14U,0U}},
{SCC_50D0,{7U,14U,0U}},
{SCC_50D8,{0U,14U,0U}},
{SCC_50D8,{1U,14U,0U}},
{SCC_50D8,{2U,14U,0U}},
{SCC_50D8,{3U,14U,0U}},
{SCC_50D8,{4U,14U,0U}},
{SCC_50D8,{5U,14U,0U}},
{SCC_50D8,{6U,14U,0U}},
{SCC_50D8,{7U,14U,0U}},
{SCC_50E0,{0U,14U,0U}},
{SCC_50E0,{1U,14U,0U}},
{SCC_50E0,{2U,14U,0U}},
{SCC_50E0,{3U,14U,0U}},
{SCC_50E0,{4U,14U,0U}},
{SCC_50E0,{5U,14U,0U}},
{SCC_50E0,{6U,14U,0U}},
{SCC_50E0,{7U,14U,0U}},
{SCC_50E8,{0U,14U,0U}},
{SCC_50E8,{1U,14U,0U}},
{SCC_50E8,{2U,14U,0U}},
{SCC_50E8,{3U,14U,0U}},
{SCC_50E8,{4U,14U,0U}},
{SCC_50E8,{5U,14U,0U}},
{SCC_50E8,{6U,14U,0U}},
{SCC_50E8,{7U,14U,0U}},
{SCC_50F0,{0U,14U,0U}},
{SCC_50F0,{1U,14U,0U}},
{SCC_50F0,{2U,14U,0U}},
{SCC_50F0,{3U,14U,0U}},
{SCC_50F0,{4U,14U,0U}},
{SCC_50F0,{5U,14U,0U}},
{SCC_50F0,{6U,14U,0U}},
{SCC_50F0,{7U,14U,0U}},
{SCC_50F8,{0U,14U,0U}},
{SCC_50F9,{0U,14U,0U}},
{TRAPCC_5EFA,{0U,0U,0U}},
{TRAPCC_5EFB,{0U,0U,0U}},
{TRAPCC_5EFC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5100,{0U,7U,0U}},
{SUBQ_5100,{1U,7U,0U}},
{SUBQ_5100,{2U,7U,0U}},
{SUBQ_5100,{3U,7U,0U}},
{SUBQ_5100,{4U,7U,0U}},
{SUBQ_5100,{5U,7U,0U}},
{SUBQ_5100,{6U,7U,0U}},
{SUBQ_5100,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5110,{0U,7U,0U}},
{SUBQ_5110,{1U,7U,0U}},
{SUBQ_5110,{2U,7U,0U}},
{SUBQ_5110,{3U,7U,0U}},
{SUBQ_5110,{4U,7U,0U}},
{SUBQ_5110,{5U,7U,0U}},
{SUBQ_5110,{6U,7U,0U}},
{SUBQ_5110,{7U,7U,0U}},
{SUBQ_5118,{0U,7U,0U}},
{SUBQ_5118,{1U,7U,0U}},
{SUBQ_5118,{2U,7U,0U}},
{SUBQ_5118,{3U,7U,0U}},
{SUBQ_5118,{4U,7U,0U}},
{SUBQ_5118,{5U,7U,0U}},
{SUBQ_5118,{6U,7U,0U}},
{SUBQ_5118,{7U,7U,0U}},
{SUBQ_5120,{0U,7U,0U}},
{SUBQ_5120,{1U,7U,0U}},
{SUBQ_5120,{2U,7U,0U}},
{SUBQ_5120,{3U,7U,0U}},
{SUBQ_5120,{4U,7U,0U}},
{SUBQ_5120,{5U,7U,0U}},
{SUBQ_5120,{6U,7U,0U}},
{SUBQ_5120,{7U,7U,0U}},
{SUBQ_5128,{0U,7U,0U}},
{SUBQ_5128,{1U,7U,0U}},
{SUBQ_5128,{2U,7U,0U}},
{SUBQ_5128,{3U,7U,0U}},
{SUBQ_5128,{4U,7U,0U}},
{SUBQ_5128,{5U,7U,0U}},
{SUBQ_5128,{6U,7U,0U}},
{SUBQ_5128,{7U,7U,0U}},
{SUBQ_5130,{0U,7U,0U}},
{SUBQ_5130,{1U,7U,0U}},
{SUBQ_5130,{2U,7U,0U}},
{SUBQ_5130,{3U,7U,0U}},
{SUBQ_5130,{4U,7U,0U}},
{SUBQ_5130,{5U,7U,0U}},
{SUBQ_5130,{6U,7U,0U}},
{SUBQ_5130,{7U,7U,0U}},
{SUBQ_5138,{0U,7U,0U}},
{SUBQ_5139,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5140,{0U,7U,0U}},
{SUBQ_5140,{1U,7U,0U}},
{SUBQ_5140,{2U,7U,0U}},
{SUBQ_5140,{3U,7U,0U}},
{SUBQ_5140,{4U,7U,0U}},
{SUBQ_5140,{5U,7U,0U}},
{SUBQ_5140,{6U,7U,0U}},
{SUBQ_5140,{7U,7U,0U}},
{SUBQ_5148,{0U,7U,0U}},
{SUBQ_5148,{1U,7U,0U}},
{SUBQ_5148,{2U,7U,0U}},
{SUBQ_5148,{3U,7U,0U}},
{SUBQ_5148,{4U,7U,0U}},
{SUBQ_5148,{5U,7U,0U}},
{SUBQ_5148,{6U,7U,0U}},
{SUBQ_5148,{7U,7U,0U}},
{SUBQ_5150,{0U,7U,0U}},
{SUBQ_5150,{1U,7U,0U}},
{SUBQ_5150,{2U,7U,0U}},
{SUBQ_5150,{3U,7U,0U}},
{SUBQ_5150,{4U,7U,0U}},
{SUBQ_5150,{5U,7U,0U}},
{SUBQ_5150,{6U,7U,0U}},
{SUBQ_5150,{7U,7U,0U}},
{SUBQ_5158,{0U,7U,0U}},
{SUBQ_5158,{1U,7U,0U}},
{SUBQ_5158,{2U,7U,0U}},
{SUBQ_5158,{3U,7U,0U}},
{SUBQ_5158,{4U,7U,0U}},
{SUBQ_5158,{5U,7U,0U}},
{SUBQ_5158,{6U,7U,0U}},
{SUBQ_5158,{7U,7U,0U}},
{SUBQ_5160,{0U,7U,0U}},
{SUBQ_5160,{1U,7U,0U}},
{SUBQ_5160,{2U,7U,0U}},
{SUBQ_5160,{3U,7U,0U}},
{SUBQ_5160,{4U,7U,0U}},
{SUBQ_5160,{5U,7U,0U}},
{SUBQ_5160,{6U,7U,0U}},
{SUBQ_5160,{7U,7U,0U}},
{SUBQ_5168,{0U,7U,0U}},
{SUBQ_5168,{1U,7U,0U}},
{SUBQ_5168,{2U,7U,0U}},
{SUBQ_5168,{3U,7U,0U}},
{SUBQ_5168,{4U,7U,0U}},
{SUBQ_5168,{5U,7U,0U}},
{SUBQ_5168,{6U,7U,0U}},
{SUBQ_5168,{7U,7U,0U}},
{SUBQ_5170,{0U,7U,0U}},
{SUBQ_5170,{1U,7U,0U}},
{SUBQ_5170,{2U,7U,0U}},
{SUBQ_5170,{3U,7U,0U}},
{SUBQ_5170,{4U,7U,0U}},
{SUBQ_5170,{5U,7U,0U}},
{SUBQ_5170,{6U,7U,0U}},
{SUBQ_5170,{7U,7U,0U}},
{SUBQ_5178,{0U,7U,0U}},
{SUBQ_5179,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBQ_5180,{0U,7U,0U}},
{SUBQ_5180,{1U,7U,0U}},
{SUBQ_5180,{2U,7U,0U}},
{SUBQ_5180,{3U,7U,0U}},
{SUBQ_5180,{4U,7U,0U}},
{SUBQ_5180,{5U,7U,0U}},
{SUBQ_5180,{6U,7U,0U}},
{SUBQ_5180,{7U,7U,0U}},
{SUBQ_5188,{0U,7U,0U}},
{SUBQ_5188,{1U,7U,0U}},
{SUBQ_5188,{2U,7U,0U}},
{SUBQ_5188,{3U,7U,0U}},
{SUBQ_5188,{4U,7U,0U}},
{SUBQ_5188,{5U,7U,0U}},
{SUBQ_5188,{6U,7U,0U}},
{SUBQ_5188,{7U,7U,0U}},
{SUBQ_5190,{0U,7U,0U}},
{SUBQ_5190,{1U,7U,0U}},
{SUBQ_5190,{2U,7U,0U}},
{SUBQ_5190,{3U,7U,0U}},
{SUBQ_5190,{4U,7U,0U}},
{SUBQ_5190,{5U,7U,0U}},
{SUBQ_5190,{6U,7U,0U}},
{SUBQ_5190,{7U,7U,0U}},
{SUBQ_5198,{0U,7U,0U}},
{SUBQ_5198,{1U,7U,0U}},
{SUBQ_5198,{2U,7U,0U}},
{SUBQ_5198,{3U,7U,0U}},
{SUBQ_5198,{4U,7U,0U}},
{SUBQ_5198,{5U,7U,0U}},
{SUBQ_5198,{6U,7U,0U}},
{SUBQ_5198,{7U,7U,0U}},
{SUBQ_51A0,{0U,7U,0U}},
{SUBQ_51A0,{1U,7U,0U}},
{SUBQ_51A0,{2U,7U,0U}},
{SUBQ_51A0,{3U,7U,0U}},
{SUBQ_51A0,{4U,7U,0U}},
{SUBQ_51A0,{5U,7U,0U}},
{SUBQ_51A0,{6U,7U,0U}},
{SUBQ_51A0,{7U,7U,0U}},
{SUBQ_51A8,{0U,7U,0U}},
{SUBQ_51A8,{1U,7U,0U}},
{SUBQ_51A8,{2U,7U,0U}},
{SUBQ_51A8,{3U,7U,0U}},
{SUBQ_51A8,{4U,7U,0U}},
{SUBQ_51A8,{5U,7U,0U}},
{SUBQ_51A8,{6U,7U,0U}},
{SUBQ_51A8,{7U,7U,0U}},
{SUBQ_51B0,{0U,7U,0U}},
{SUBQ_51B0,{1U,7U,0U}},
{SUBQ_51B0,{2U,7U,0U}},
{SUBQ_51B0,{3U,7U,0U}},
{SUBQ_51B0,{4U,7U,0U}},
{SUBQ_51B0,{5U,7U,0U}},
{SUBQ_51B0,{6U,7U,0U}},
{SUBQ_51B0,{7U,7U,0U}},
{SUBQ_51B8,{0U,7U,0U}},
{SUBQ_51B9,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SCC_50C0,{0U,15U,0U}},
{SCC_50C0,{1U,15U,0U}},
{SCC_50C0,{2U,15U,0U}},
{SCC_50C0,{3U,15U,0U}},
{SCC_50C0,{4U,15U,0U}},
{SCC_50C0,{5U,15U,0U}},
{SCC_50C0,{6U,15U,0U}},
{SCC_50C0,{7U,15U,0U}},
{DBCC_5FC8,{0U,0U,0U}},
{DBCC_5FC8,{0U,1U,0U}},
{DBCC_5FC8,{0U,2U,0U}},
{DBCC_5FC8,{0U,3U,0U}},
{DBCC_5FC8,{0U,4U,0U}},
{DBCC_5FC8,{0U,5U,0U}},
{DBCC_5FC8,{0U,6U,0U}},
{DBCC_5FC8,{0U,7U,0U}},
{SCC_50D0,{0U,15U,0U}},
{SCC_50D0,{1U,15U,0U}},
{SCC_50D0,{2U,15U,0U}},
{SCC_50D0,{3U,15U,0U}},
{SCC_50D0,{4U,15U,0U}},
{SCC_50D0,{5U,15U,0U}},
{SCC_50D0,{6U,15U,0U}},
{SCC_50D0,{7U,15U,0U}},
{SCC_50D8,{0U,15U,0U}},
{SCC_50D8,{1U,15U,0U}},
{SCC_50D8,{2U,15U,0U}},
{SCC_50D8,{3U,15U,0U}},
{SCC_50D8,{4U,15U,0U}},
{SCC_50D8,{5U,15U,0U}},
{SCC_50D8,{6U,15U,0U}},
{SCC_50D8,{7U,15U,0U}},
{SCC_50E0,{0U,15U,0U}},
{SCC_50E0,{1U,15U,0U}},
{SCC_50E0,{2U,15U,0U}},
{SCC_50E0,{3U,15U,0U}},
{SCC_50E0,{4U,15U,0U}},
{SCC_50E0,{5U,15U,0U}},
{SCC_50E0,{6U,15U,0U}},
{SCC_50E0,{7U,15U,0U}},
{SCC_50E8,{0U,15U,0U}},
{SCC_50E8,{1U,15U,0U}},
{SCC_50E8,{2U,15U,0U}},
{SCC_50E8,{3U,15U,0U}},
{SCC_50E8,{4U,15U,0U}},
{SCC_50E8,{5U,15U,0U}},
{SCC_50E8,{6U,15U,0U}},
{SCC_50E8,{7U,15U,0U}},
{SCC_50F0,{0U,15U,0U}},
{SCC_50F0,{1U,15U,0U}},
{SCC_50F0,{2U,15U,0U}},
{SCC_50F0,{3U,15U,0U}},
{SCC_50F0,{4U,15U,0U}},
{SCC_50F0,{5U,15U,0U}},
{SCC_50F0,{6U,15U,0U}},
{SCC_50F0,{7U,15U,0U}},
{SCC_50F8,{0U,15U,0U}},
{SCC_50F9,{0U,15U,0U}},
{TRAPCC_5FFA,{0U,0U,0U}},
{TRAPCC_5FFB,{0U,0U,0U}},
{TRAPCC_5FFC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BRAW_6000,{0U,0U,0U}},
{BRAB_6000,{0U,1U,0U}},
{BRAB_6000,{0U,2U,0U}},
{BRAB_6000,{0U,3U,0U}},
{BRAB_6000,{0U,4U,0U}},
{BRAB_6000,{0U,5U,0U}},
{BRAB_6000,{0U,6U,0U}},
{BRAB_6000,{0U,7U,0U}},
{BRAB_6000,{0U,8U,0U}},
{BRAB_6000,{0U,9U,0U}},
{BRAB_6000,{0U,10U,0U}},
{BRAB_6000,{0U,11U,0U}},
{BRAB_6000,{0U,12U,0U}},
{BRAB_6000,{0U,13U,0U}},
{BRAB_6000,{0U,14U,0U}},
{BRAB_6000,{0U,15U,0U}},
{BRAB_6000,{0U,16U,0U}},
{BRAB_6000,{0U,17U,0U}},
{BRAB_6000,{0U,18U,0U}},
{BRAB_6000,{0U,19U,0U}},
{BRAB_6000,{0U,20U,0U}},
{BRAB_6000,{0U,21U,0U}},
{BRAB_6000,{0U,22U,0U}},
{BRAB_6000,{0U,23U,0U}},
{BRAB_6000,{0U,24U,0U}},
{BRAB_6000,{0U,25U,0U}},
{BRAB_6000,{0U,26U,0U}},
{BRAB_6000,{0U,27U,0U}},
{BRAB_6000,{0U,28U,0U}},
{BRAB_6000,{0U,29U,0U}},
{BRAB_6000,{0U,30U,0U}},
{BRAB_6000,{0U,31U,0U}},
{BRAB_6000,{0U,32U,0U}},
{BRAB_6000,{0U,33U,0U}},
{BRAB_6000,{0U,34U,0U}},
{BRAB_6000,{0U,35U,0U}},
{BRAB_6000,{0U,36U,0U}},
{BRAB_6000,{0U,37U,0U}},
{BRAB_6000,{0U,38U,0U}},
{BRAB_6000,{0U,39U,0U}},
{BRAB_6000,{0U,40U,0U}},
{BRAB_6000,{0U,41U,0U}},
{BRAB_6000,{0U,42U,0U}},
{BRAB_6000,{0U,43U,0U}},
{BRAB_6000,{0U,44U,0U}},
{BRAB_6000,{0U,45U,0U}},
{BRAB_6000,{0U,46U,0U}},
{BRAB_6000,{0U,47U,0U}},
{BRAB_6000,{0U,48U,0U}},
{BRAB_6000,{0U,49U,0U}},
{BRAB_6000,{0U,50U,0U}},
{BRAB_6000,{0U,51U,0U}},
{BRAB_6000,{0U,52U,0U}},
{BRAB_6000,{0U,53U,0U}},
{BRAB_6000,{0U,54U,0U}},
{BRAB_6000,{0U,55U,0U}},
{BRAB_6000,{0U,56U,0U}},
{BRAB_6000,{0U,57U,0U}},
{BRAB_6000,{0U,58U,0U}},
{BRAB_6000,{0U,59U,0U}},
{BRAB_6000,{0U,60U,0U}},
{BRAB_6000,{0U,61U,0U}},
{BRAB_6000,{0U,62U,0U}},
{BRAB_6000,{0U,63U,0U}},
{BRAB_6000,{0U,64U,0U}},
{BRAB_6000,{0U,65U,0U}},
{BRAB_6000,{0U,66U,0U}},
{BRAB_6000,{0U,67U,0U}},
{BRAB_6000,{0U,68U,0U}},
{BRAB_6000,{0U,69U,0U}},
{BRAB_6000,{0U,70U,0U}},
{BRAB_6000,{0U,71U,0U}},
{BRAB_6000,{0U,72U,0U}},
{BRAB_6000,{0U,73U,0U}},
{BRAB_6000,{0U,74U,0U}},
{BRAB_6000,{0U,75U,0U}},
{BRAB_6000,{0U,76U,0U}},
{BRAB_6000,{0U,77U,0U}},
{BRAB_6000,{0U,78U,0U}},
{BRAB_6000,{0U,79U,0U}},
{BRAB_6000,{0U,80U,0U}},
{BRAB_6000,{0U,81U,0U}},
{BRAB_6000,{0U,82U,0U}},
{BRAB_6000,{0U,83U,0U}},
{BRAB_6000,{0U,84U,0U}},
{BRAB_6000,{0U,85U,0U}},
{BRAB_6000,{0U,86U,0U}},
{BRAB_6000,{0U,87U,0U}},
{BRAB_6000,{0U,88U,0U}},
{BRAB_6000,{0U,89U,0U}},
{BRAB_6000,{0U,90U,0U}},
{BRAB_6000,{0U,91U,0U}},
{BRAB_6000,{0U,92U,0U}},
{BRAB_6000,{0U,93U,0U}},
{BRAB_6000,{0U,94U,0U}},
{BRAB_6000,{0U,95U,0U}},
{BRAB_6000,{0U,96U,0U}},
{BRAB_6000,{0U,97U,0U}},
{BRAB_6000,{0U,98U,0U}},
{BRAB_6000,{0U,99U,0U}},
{BRAB_6000,{0U,100U,0U}},
{BRAB_6000,{0U,101U,0U}},
{BRAB_6000,{0U,102U,0U}},
{BRAB_6000,{0U,103U,0U}},
{BRAB_6000,{0U,104U,0U}},
{BRAB_6000,{0U,105U,0U}},
{BRAB_6000,{0U,106U,0U}},
{BRAB_6000,{0U,107U,0U}},
{BRAB_6000,{0U,108U,0U}},
{BRAB_6000,{0U,109U,0U}},
{BRAB_6000,{0U,110U,0U}},
{BRAB_6000,{0U,111U,0U}},
{BRAB_6000,{0U,112U,0U}},
{BRAB_6000,{0U,113U,0U}},
{BRAB_6000,{0U,114U,0U}},
{BRAB_6000,{0U,115U,0U}},
{BRAB_6000,{0U,116U,0U}},
{BRAB_6000,{0U,117U,0U}},
{BRAB_6000,{0U,118U,0U}},
{BRAB_6000,{0U,119U,0U}},
{BRAB_6000,{0U,120U,0U}},
{BRAB_6000,{0U,121U,0U}},
{BRAB_6000,{0U,122U,0U}},
{BRAB_6000,{0U,123U,0U}},
{BRAB_6000,{0U,124U,0U}},
{BRAB_6000,{0U,125U,0U}},
{BRAB_6000,{0U,126U,0U}},
{BRAB_6000,{0U,127U,0U}},
{BRAB_6000,{0U,4294967168U,0U}},
{BRAB_6000,{0U,4294967169U,0U}},
{BRAB_6000,{0U,4294967170U,0U}},
{BRAB_6000,{0U,4294967171U,0U}},
{BRAB_6000,{0U,4294967172U,0U}},
{BRAB_6000,{0U,4294967173U,0U}},
{BRAB_6000,{0U,4294967174U,0U}},
{BRAB_6000,{0U,4294967175U,0U}},
{BRAB_6000,{0U,4294967176U,0U}},
{BRAB_6000,{0U,4294967177U,0U}},
{BRAB_6000,{0U,4294967178U,0U}},
{BRAB_6000,{0U,4294967179U,0U}},
{BRAB_6000,{0U,4294967180U,0U}},
{BRAB_6000,{0U,4294967181U,0U}},
{BRAB_6000,{0U,4294967182U,0U}},
{BRAB_6000,{0U,4294967183U,0U}},
{BRAB_6000,{0U,4294967184U,0U}},
{BRAB_6000,{0U,4294967185U,0U}},
{BRAB_6000,{0U,4294967186U,0U}},
{BRAB_6000,{0U,4294967187U,0U}},
{BRAB_6000,{0U,4294967188U,0U}},
{BRAB_6000,{0U,4294967189U,0U}},
{BRAB_6000,{0U,4294967190U,0U}},
{BRAB_6000,{0U,4294967191U,0U}},
{BRAB_6000,{0U,4294967192U,0U}},
{BRAB_6000,{0U,4294967193U,0U}},
{BRAB_6000,{0U,4294967194U,0U}},
{BRAB_6000,{0U,4294967195U,0U}},
{BRAB_6000,{0U,4294967196U,0U}},
{BRAB_6000,{0U,4294967197U,0U}},
{BRAB_6000,{0U,4294967198U,0U}},
{BRAB_6000,{0U,4294967199U,0U}},
{BRAB_6000,{0U,4294967200U,0U}},
{BRAB_6000,{0U,4294967201U,0U}},
{BRAB_6000,{0U,4294967202U,0U}},
{BRAB_6000,{0U,4294967203U,0U}},
{BRAB_6000,{0U,4294967204U,0U}},
{BRAB_6000,{0U,4294967205U,0U}},
{BRAB_6000,{0U,4294967206U,0U}},
{BRAB_6000,{0U,4294967207U,0U}},
{BRAB_6000,{0U,4294967208U,0U}},
{BRAB_6000,{0U,4294967209U,0U}},
{BRAB_6000,{0U,4294967210U,0U}},
{BRAB_6000,{0U,4294967211U,0U}},
{BRAB_6000,{0U,4294967212U,0U}},
{BRAB_6000,{0U,4294967213U,0U}},
{BRAB_6000,{0U,4294967214U,0U}},
{BRAB_6000,{0U,4294967215U,0U}},
{BRAB_6000,{0U,4294967216U,0U}},
{BRAB_6000,{0U,4294967217U,0U}},
{BRAB_6000,{0U,4294967218U,0U}},
{BRAB_6000,{0U,4294967219U,0U}},
{BRAB_6000,{0U,4294967220U,0U}},
{BRAB_6000,{0U,4294967221U,0U}},
{BRAB_6000,{0U,4294967222U,0U}},
{BRAB_6000,{0U,4294967223U,0U}},
{BRAB_6000,{0U,4294967224U,0U}},
{BRAB_6000,{0U,4294967225U,0U}},
{BRAB_6000,{0U,4294967226U,0U}},
{BRAB_6000,{0U,4294967227U,0U}},
{BRAB_6000,{0U,4294967228U,0U}},
{BRAB_6000,{0U,4294967229U,0U}},
{BRAB_6000,{0U,4294967230U,0U}},
{BRAB_6000,{0U,4294967231U,0U}},
{BRAB_6000,{0U,4294967232U,0U}},
{BRAB_6000,{0U,4294967233U,0U}},
{BRAB_6000,{0U,4294967234U,0U}},
{BRAB_6000,{0U,4294967235U,0U}},
{BRAB_6000,{0U,4294967236U,0U}},
{BRAB_6000,{0U,4294967237U,0U}},
{BRAB_6000,{0U,4294967238U,0U}},
{BRAB_6000,{0U,4294967239U,0U}},
{BRAB_6000,{0U,4294967240U,0U}},
{BRAB_6000,{0U,4294967241U,0U}},
{BRAB_6000,{0U,4294967242U,0U}},
{BRAB_6000,{0U,4294967243U,0U}},
{BRAB_6000,{0U,4294967244U,0U}},
{BRAB_6000,{0U,4294967245U,0U}},
{BRAB_6000,{0U,4294967246U,0U}},
{BRAB_6000,{0U,4294967247U,0U}},
{BRAB_6000,{0U,4294967248U,0U}},
{BRAB_6000,{0U,4294967249U,0U}},
{BRAB_6000,{0U,4294967250U,0U}},
{BRAB_6000,{0U,4294967251U,0U}},
{BRAB_6000,{0U,4294967252U,0U}},
{BRAB_6000,{0U,4294967253U,0U}},
{BRAB_6000,{0U,4294967254U,0U}},
{BRAB_6000,{0U,4294967255U,0U}},
{BRAB_6000,{0U,4294967256U,0U}},
{BRAB_6000,{0U,4294967257U,0U}},
{BRAB_6000,{0U,4294967258U,0U}},
{BRAB_6000,{0U,4294967259U,0U}},
{BRAB_6000,{0U,4294967260U,0U}},
{BRAB_6000,{0U,4294967261U,0U}},
{BRAB_6000,{0U,4294967262U,0U}},
{BRAB_6000,{0U,4294967263U,0U}},
{BRAB_6000,{0U,4294967264U,0U}},
{BRAB_6000,{0U,4294967265U,0U}},
{BRAB_6000,{0U,4294967266U,0U}},
{BRAB_6000,{0U,4294967267U,0U}},
{BRAB_6000,{0U,4294967268U,0U}},
{BRAB_6000,{0U,4294967269U,0U}},
{BRAB_6000,{0U,4294967270U,0U}},
{BRAB_6000,{0U,4294967271U,0U}},
{BRAB_6000,{0U,4294967272U,0U}},
{BRAB_6000,{0U,4294967273U,0U}},
{BRAB_6000,{0U,4294967274U,0U}},
{BRAB_6000,{0U,4294967275U,0U}},
{BRAB_6000,{0U,4294967276U,0U}},
{BRAB_6000,{0U,4294967277U,0U}},
{BRAB_6000,{0U,4294967278U,0U}},
{BRAB_6000,{0U,4294967279U,0U}},
{BRAB_6000,{0U,4294967280U,0U}},
{BRAB_6000,{0U,4294967281U,0U}},
{BRAB_6000,{0U,4294967282U,0U}},
{BRAB_6000,{0U,4294967283U,0U}},
{BRAB_6000,{0U,4294967284U,0U}},
{BRAB_6000,{0U,4294967285U,0U}},
{BRAB_6000,{0U,4294967286U,0U}},
{BRAB_6000,{0U,4294967287U,0U}},
{BRAB_6000,{0U,4294967288U,0U}},
{BRAB_6000,{0U,4294967289U,0U}},
{BRAB_6000,{0U,4294967290U,0U}},
{BRAB_6000,{0U,4294967291U,0U}},
{BRAB_6000,{0U,4294967292U,0U}},
{BRAB_6000,{0U,4294967293U,0U}},
{BRAB_6000,{0U,4294967294U,0U}},
{BRAL_60FF,{0U,0U,0U}},
{BSRW_6100,{0U,0U,0U}},
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{BCCB_6E00,{0U,4294967242U,0U}},
{BCCB_6E00,{0U,4294967243U,0U}},
{BCCB_6E00,{0U,4294967244U,0U}},
{BCCB_6E00,{0U,4294967245U,0U}},
{BCCB_6E00,{0U,4294967246U,0U}},
{BCCB_6E00,{0U,4294967247U,0U}},
{BCCB_6E00,{0U,4294967248U,0U}},
{BCCB_6E00,{0U,4294967249U,0U}},
{BCCB_6E00,{0U,4294967250U,0U}},
{BCCB_6E00,{0U,4294967251U,0U}},
{BCCB_6E00,{0U,4294967252U,0U}},
{BCCB_6E00,{0U,4294967253U,0U}},
{BCCB_6E00,{0U,4294967254U,0U}},
{BCCB_6E00,{0U,4294967255U,0U}},
{BCCB_6E00,{0U,4294967256U,0U}},
{BCCB_6E00,{0U,4294967257U,0U}},
{BCCB_6E00,{0U,4294967258U,0U}},
{BCCB_6E00,{0U,4294967259U,0U}},
{BCCB_6E00,{0U,4294967260U,0U}},
{BCCB_6E00,{0U,4294967261U,0U}},
{BCCB_6E00,{0U,4294967262U,0U}},
{BCCB_6E00,{0U,4294967263U,0U}},
{BCCB_6E00,{0U,4294967264U,0U}},
{BCCB_6E00,{0U,4294967265U,0U}},
{BCCB_6E00,{0U,4294967266U,0U}},
{BCCB_6E00,{0U,4294967267U,0U}},
{BCCB_6E00,{0U,4294967268U,0U}},
{BCCB_6E00,{0U,4294967269U,0U}},
{BCCB_6E00,{0U,4294967270U,0U}},
{BCCB_6E00,{0U,4294967271U,0U}},
{BCCB_6E00,{0U,4294967272U,0U}},
{BCCB_6E00,{0U,4294967273U,0U}},
{BCCB_6E00,{0U,4294967274U,0U}},
{BCCB_6E00,{0U,4294967275U,0U}},
{BCCB_6E00,{0U,4294967276U,0U}},
{BCCB_6E00,{0U,4294967277U,0U}},
{BCCB_6E00,{0U,4294967278U,0U}},
{BCCB_6E00,{0U,4294967279U,0U}},
{BCCB_6E00,{0U,4294967280U,0U}},
{BCCB_6E00,{0U,4294967281U,0U}},
{BCCB_6E00,{0U,4294967282U,0U}},
{BCCB_6E00,{0U,4294967283U,0U}},
{BCCB_6E00,{0U,4294967284U,0U}},
{BCCB_6E00,{0U,4294967285U,0U}},
{BCCB_6E00,{0U,4294967286U,0U}},
{BCCB_6E00,{0U,4294967287U,0U}},
{BCCB_6E00,{0U,4294967288U,0U}},
{BCCB_6E00,{0U,4294967289U,0U}},
{BCCB_6E00,{0U,4294967290U,0U}},
{BCCB_6E00,{0U,4294967291U,0U}},
{BCCB_6E00,{0U,4294967292U,0U}},
{BCCB_6E00,{0U,4294967293U,0U}},
{BCCB_6E00,{0U,4294967294U,0U}},
{BCCL_6EFF,{0U,0U,0U}},
{BCCW_6F00,{0U,0U,0U}},
{BCCB_6F00,{0U,1U,0U}},
{BCCB_6F00,{0U,2U,0U}},
{BCCB_6F00,{0U,3U,0U}},
{BCCB_6F00,{0U,4U,0U}},
{BCCB_6F00,{0U,5U,0U}},
{BCCB_6F00,{0U,6U,0U}},
{BCCB_6F00,{0U,7U,0U}},
{BCCB_6F00,{0U,8U,0U}},
{BCCB_6F00,{0U,9U,0U}},
{BCCB_6F00,{0U,10U,0U}},
{BCCB_6F00,{0U,11U,0U}},
{BCCB_6F00,{0U,12U,0U}},
{BCCB_6F00,{0U,13U,0U}},
{BCCB_6F00,{0U,14U,0U}},
{BCCB_6F00,{0U,15U,0U}},
{BCCB_6F00,{0U,16U,0U}},
{BCCB_6F00,{0U,17U,0U}},
{BCCB_6F00,{0U,18U,0U}},
{BCCB_6F00,{0U,19U,0U}},
{BCCB_6F00,{0U,20U,0U}},
{BCCB_6F00,{0U,21U,0U}},
{BCCB_6F00,{0U,22U,0U}},
{BCCB_6F00,{0U,23U,0U}},
{BCCB_6F00,{0U,24U,0U}},
{BCCB_6F00,{0U,25U,0U}},
{BCCB_6F00,{0U,26U,0U}},
{BCCB_6F00,{0U,27U,0U}},
{BCCB_6F00,{0U,28U,0U}},
{BCCB_6F00,{0U,29U,0U}},
{BCCB_6F00,{0U,30U,0U}},
{BCCB_6F00,{0U,31U,0U}},
{BCCB_6F00,{0U,32U,0U}},
{BCCB_6F00,{0U,33U,0U}},
{BCCB_6F00,{0U,34U,0U}},
{BCCB_6F00,{0U,35U,0U}},
{BCCB_6F00,{0U,36U,0U}},
{BCCB_6F00,{0U,37U,0U}},
{BCCB_6F00,{0U,38U,0U}},
{BCCB_6F00,{0U,39U,0U}},
{BCCB_6F00,{0U,40U,0U}},
{BCCB_6F00,{0U,41U,0U}},
{BCCB_6F00,{0U,42U,0U}},
{BCCB_6F00,{0U,43U,0U}},
{BCCB_6F00,{0U,44U,0U}},
{BCCB_6F00,{0U,45U,0U}},
{BCCB_6F00,{0U,46U,0U}},
{BCCB_6F00,{0U,47U,0U}},
{BCCB_6F00,{0U,48U,0U}},
{BCCB_6F00,{0U,49U,0U}},
{BCCB_6F00,{0U,50U,0U}},
{BCCB_6F00,{0U,51U,0U}},
{BCCB_6F00,{0U,52U,0U}},
{BCCB_6F00,{0U,53U,0U}},
{BCCB_6F00,{0U,54U,0U}},
{BCCB_6F00,{0U,55U,0U}},
{BCCB_6F00,{0U,56U,0U}},
{BCCB_6F00,{0U,57U,0U}},
{BCCB_6F00,{0U,58U,0U}},
{BCCB_6F00,{0U,59U,0U}},
{BCCB_6F00,{0U,60U,0U}},
{BCCB_6F00,{0U,61U,0U}},
{BCCB_6F00,{0U,62U,0U}},
{BCCB_6F00,{0U,63U,0U}},
{BCCB_6F00,{0U,64U,0U}},
{BCCB_6F00,{0U,65U,0U}},
{BCCB_6F00,{0U,66U,0U}},
{BCCB_6F00,{0U,67U,0U}},
{BCCB_6F00,{0U,68U,0U}},
{BCCB_6F00,{0U,69U,0U}},
{BCCB_6F00,{0U,70U,0U}},
{BCCB_6F00,{0U,71U,0U}},
{BCCB_6F00,{0U,72U,0U}},
{BCCB_6F00,{0U,73U,0U}},
{BCCB_6F00,{0U,74U,0U}},
{BCCB_6F00,{0U,75U,0U}},
{BCCB_6F00,{0U,76U,0U}},
{BCCB_6F00,{0U,77U,0U}},
{BCCB_6F00,{0U,78U,0U}},
{BCCB_6F00,{0U,79U,0U}},
{BCCB_6F00,{0U,80U,0U}},
{BCCB_6F00,{0U,81U,0U}},
{BCCB_6F00,{0U,82U,0U}},
{BCCB_6F00,{0U,83U,0U}},
{BCCB_6F00,{0U,84U,0U}},
{BCCB_6F00,{0U,85U,0U}},
{BCCB_6F00,{0U,86U,0U}},
{BCCB_6F00,{0U,87U,0U}},
{BCCB_6F00,{0U,88U,0U}},
{BCCB_6F00,{0U,89U,0U}},
{BCCB_6F00,{0U,90U,0U}},
{BCCB_6F00,{0U,91U,0U}},
{BCCB_6F00,{0U,92U,0U}},
{BCCB_6F00,{0U,93U,0U}},
{BCCB_6F00,{0U,94U,0U}},
{BCCB_6F00,{0U,95U,0U}},
{BCCB_6F00,{0U,96U,0U}},
{BCCB_6F00,{0U,97U,0U}},
{BCCB_6F00,{0U,98U,0U}},
{BCCB_6F00,{0U,99U,0U}},
{BCCB_6F00,{0U,100U,0U}},
{BCCB_6F00,{0U,101U,0U}},
{BCCB_6F00,{0U,102U,0U}},
{BCCB_6F00,{0U,103U,0U}},
{BCCB_6F00,{0U,104U,0U}},
{BCCB_6F00,{0U,105U,0U}},
{BCCB_6F00,{0U,106U,0U}},
{BCCB_6F00,{0U,107U,0U}},
{BCCB_6F00,{0U,108U,0U}},
{BCCB_6F00,{0U,109U,0U}},
{BCCB_6F00,{0U,110U,0U}},
{BCCB_6F00,{0U,111U,0U}},
{BCCB_6F00,{0U,112U,0U}},
{BCCB_6F00,{0U,113U,0U}},
{BCCB_6F00,{0U,114U,0U}},
{BCCB_6F00,{0U,115U,0U}},
{BCCB_6F00,{0U,116U,0U}},
{BCCB_6F00,{0U,117U,0U}},
{BCCB_6F00,{0U,118U,0U}},
{BCCB_6F00,{0U,119U,0U}},
{BCCB_6F00,{0U,120U,0U}},
{BCCB_6F00,{0U,121U,0U}},
{BCCB_6F00,{0U,122U,0U}},
{BCCB_6F00,{0U,123U,0U}},
{BCCB_6F00,{0U,124U,0U}},
{BCCB_6F00,{0U,125U,0U}},
{BCCB_6F00,{0U,126U,0U}},
{BCCB_6F00,{0U,127U,0U}},
{BCCB_6F00,{0U,4294967168U,0U}},
{BCCB_6F00,{0U,4294967169U,0U}},
{BCCB_6F00,{0U,4294967170U,0U}},
{BCCB_6F00,{0U,4294967171U,0U}},
{BCCB_6F00,{0U,4294967172U,0U}},
{BCCB_6F00,{0U,4294967173U,0U}},
{BCCB_6F00,{0U,4294967174U,0U}},
{BCCB_6F00,{0U,4294967175U,0U}},
{BCCB_6F00,{0U,4294967176U,0U}},
{BCCB_6F00,{0U,4294967177U,0U}},
{BCCB_6F00,{0U,4294967178U,0U}},
{BCCB_6F00,{0U,4294967179U,0U}},
{BCCB_6F00,{0U,4294967180U,0U}},
{BCCB_6F00,{0U,4294967181U,0U}},
{BCCB_6F00,{0U,4294967182U,0U}},
{BCCB_6F00,{0U,4294967183U,0U}},
{BCCB_6F00,{0U,4294967184U,0U}},
{BCCB_6F00,{0U,4294967185U,0U}},
{BCCB_6F00,{0U,4294967186U,0U}},
{BCCB_6F00,{0U,4294967187U,0U}},
{BCCB_6F00,{0U,4294967188U,0U}},
{BCCB_6F00,{0U,4294967189U,0U}},
{BCCB_6F00,{0U,4294967190U,0U}},
{BCCB_6F00,{0U,4294967191U,0U}},
{BCCB_6F00,{0U,4294967192U,0U}},
{BCCB_6F00,{0U,4294967193U,0U}},
{BCCB_6F00,{0U,4294967194U,0U}},
{BCCB_6F00,{0U,4294967195U,0U}},
{BCCB_6F00,{0U,4294967196U,0U}},
{BCCB_6F00,{0U,4294967197U,0U}},
{BCCB_6F00,{0U,4294967198U,0U}},
{BCCB_6F00,{0U,4294967199U,0U}},
{BCCB_6F00,{0U,4294967200U,0U}},
{BCCB_6F00,{0U,4294967201U,0U}},
{BCCB_6F00,{0U,4294967202U,0U}},
{BCCB_6F00,{0U,4294967203U,0U}},
{BCCB_6F00,{0U,4294967204U,0U}},
{BCCB_6F00,{0U,4294967205U,0U}},
{BCCB_6F00,{0U,4294967206U,0U}},
{BCCB_6F00,{0U,4294967207U,0U}},
{BCCB_6F00,{0U,4294967208U,0U}},
{BCCB_6F00,{0U,4294967209U,0U}},
{BCCB_6F00,{0U,4294967210U,0U}},
{BCCB_6F00,{0U,4294967211U,0U}},
{BCCB_6F00,{0U,4294967212U,0U}},
{BCCB_6F00,{0U,4294967213U,0U}},
{BCCB_6F00,{0U,4294967214U,0U}},
{BCCB_6F00,{0U,4294967215U,0U}},
{BCCB_6F00,{0U,4294967216U,0U}},
{BCCB_6F00,{0U,4294967217U,0U}},
{BCCB_6F00,{0U,4294967218U,0U}},
{BCCB_6F00,{0U,4294967219U,0U}},
{BCCB_6F00,{0U,4294967220U,0U}},
{BCCB_6F00,{0U,4294967221U,0U}},
{BCCB_6F00,{0U,4294967222U,0U}},
{BCCB_6F00,{0U,4294967223U,0U}},
{BCCB_6F00,{0U,4294967224U,0U}},
{BCCB_6F00,{0U,4294967225U,0U}},
{BCCB_6F00,{0U,4294967226U,0U}},
{BCCB_6F00,{0U,4294967227U,0U}},
{BCCB_6F00,{0U,4294967228U,0U}},
{BCCB_6F00,{0U,4294967229U,0U}},
{BCCB_6F00,{0U,4294967230U,0U}},
{BCCB_6F00,{0U,4294967231U,0U}},
{BCCB_6F00,{0U,4294967232U,0U}},
{BCCB_6F00,{0U,4294967233U,0U}},
{BCCB_6F00,{0U,4294967234U,0U}},
{BCCB_6F00,{0U,4294967235U,0U}},
{BCCB_6F00,{0U,4294967236U,0U}},
{BCCB_6F00,{0U,4294967237U,0U}},
{BCCB_6F00,{0U,4294967238U,0U}},
{BCCB_6F00,{0U,4294967239U,0U}},
{BCCB_6F00,{0U,4294967240U,0U}},
{BCCB_6F00,{0U,4294967241U,0U}},
{BCCB_6F00,{0U,4294967242U,0U}},
{BCCB_6F00,{0U,4294967243U,0U}},
{BCCB_6F00,{0U,4294967244U,0U}},
{BCCB_6F00,{0U,4294967245U,0U}},
{BCCB_6F00,{0U,4294967246U,0U}},
{BCCB_6F00,{0U,4294967247U,0U}},
{BCCB_6F00,{0U,4294967248U,0U}},
{BCCB_6F00,{0U,4294967249U,0U}},
{BCCB_6F00,{0U,4294967250U,0U}},
{BCCB_6F00,{0U,4294967251U,0U}},
{BCCB_6F00,{0U,4294967252U,0U}},
{BCCB_6F00,{0U,4294967253U,0U}},
{BCCB_6F00,{0U,4294967254U,0U}},
{BCCB_6F00,{0U,4294967255U,0U}},
{BCCB_6F00,{0U,4294967256U,0U}},
{BCCB_6F00,{0U,4294967257U,0U}},
{BCCB_6F00,{0U,4294967258U,0U}},
{BCCB_6F00,{0U,4294967259U,0U}},
{BCCB_6F00,{0U,4294967260U,0U}},
{BCCB_6F00,{0U,4294967261U,0U}},
{BCCB_6F00,{0U,4294967262U,0U}},
{BCCB_6F00,{0U,4294967263U,0U}},
{BCCB_6F00,{0U,4294967264U,0U}},
{BCCB_6F00,{0U,4294967265U,0U}},
{BCCB_6F00,{0U,4294967266U,0U}},
{BCCB_6F00,{0U,4294967267U,0U}},
{BCCB_6F00,{0U,4294967268U,0U}},
{BCCB_6F00,{0U,4294967269U,0U}},
{BCCB_6F00,{0U,4294967270U,0U}},
{BCCB_6F00,{0U,4294967271U,0U}},
{BCCB_6F00,{0U,4294967272U,0U}},
{BCCB_6F00,{0U,4294967273U,0U}},
{BCCB_6F00,{0U,4294967274U,0U}},
{BCCB_6F00,{0U,4294967275U,0U}},
{BCCB_6F00,{0U,4294967276U,0U}},
{BCCB_6F00,{0U,4294967277U,0U}},
{BCCB_6F00,{0U,4294967278U,0U}},
{BCCB_6F00,{0U,4294967279U,0U}},
{BCCB_6F00,{0U,4294967280U,0U}},
{BCCB_6F00,{0U,4294967281U,0U}},
{BCCB_6F00,{0U,4294967282U,0U}},
{BCCB_6F00,{0U,4294967283U,0U}},
{BCCB_6F00,{0U,4294967284U,0U}},
{BCCB_6F00,{0U,4294967285U,0U}},
{BCCB_6F00,{0U,4294967286U,0U}},
{BCCB_6F00,{0U,4294967287U,0U}},
{BCCB_6F00,{0U,4294967288U,0U}},
{BCCB_6F00,{0U,4294967289U,0U}},
{BCCB_6F00,{0U,4294967290U,0U}},
{BCCB_6F00,{0U,4294967291U,0U}},
{BCCB_6F00,{0U,4294967292U,0U}},
{BCCB_6F00,{0U,4294967293U,0U}},
{BCCB_6F00,{0U,4294967294U,0U}},
{BCCL_6FFF,{0U,0U,0U}},
{MOVEQ_7000,{0U,0U,4U}},
{MOVEQ_7000,{0U,1U,0U}},
{MOVEQ_7000,{0U,2U,0U}},
{MOVEQ_7000,{0U,3U,0U}},
{MOVEQ_7000,{0U,4U,0U}},
{MOVEQ_7000,{0U,5U,0U}},
{MOVEQ_7000,{0U,6U,0U}},
{MOVEQ_7000,{0U,7U,0U}},
{MOVEQ_7000,{0U,8U,0U}},
{MOVEQ_7000,{0U,9U,0U}},
{MOVEQ_7000,{0U,10U,0U}},
{MOVEQ_7000,{0U,11U,0U}},
{MOVEQ_7000,{0U,12U,0U}},
{MOVEQ_7000,{0U,13U,0U}},
{MOVEQ_7000,{0U,14U,0U}},
{MOVEQ_7000,{0U,15U,0U}},
{MOVEQ_7000,{0U,16U,0U}},
{MOVEQ_7000,{0U,17U,0U}},
{MOVEQ_7000,{0U,18U,0U}},
{MOVEQ_7000,{0U,19U,0U}},
{MOVEQ_7000,{0U,20U,0U}},
{MOVEQ_7000,{0U,21U,0U}},
{MOVEQ_7000,{0U,22U,0U}},
{MOVEQ_7000,{0U,23U,0U}},
{MOVEQ_7000,{0U,24U,0U}},
{MOVEQ_7000,{0U,25U,0U}},
{MOVEQ_7000,{0U,26U,0U}},
{MOVEQ_7000,{0U,27U,0U}},
{MOVEQ_7000,{0U,28U,0U}},
{MOVEQ_7000,{0U,29U,0U}},
{MOVEQ_7000,{0U,30U,0U}},
{MOVEQ_7000,{0U,31U,0U}},
{MOVEQ_7000,{0U,32U,0U}},
{MOVEQ_7000,{0U,33U,0U}},
{MOVEQ_7000,{0U,34U,0U}},
{MOVEQ_7000,{0U,35U,0U}},
{MOVEQ_7000,{0U,36U,0U}},
{MOVEQ_7000,{0U,37U,0U}},
{MOVEQ_7000,{0U,38U,0U}},
{MOVEQ_7000,{0U,39U,0U}},
{MOVEQ_7000,{0U,40U,0U}},
{MOVEQ_7000,{0U,41U,0U}},
{MOVEQ_7000,{0U,42U,0U}},
{MOVEQ_7000,{0U,43U,0U}},
{MOVEQ_7000,{0U,44U,0U}},
{MOVEQ_7000,{0U,45U,0U}},
{MOVEQ_7000,{0U,46U,0U}},
{MOVEQ_7000,{0U,47U,0U}},
{MOVEQ_7000,{0U,48U,0U}},
{MOVEQ_7000,{0U,49U,0U}},
{MOVEQ_7000,{0U,50U,0U}},
{MOVEQ_7000,{0U,51U,0U}},
{MOVEQ_7000,{0U,52U,0U}},
{MOVEQ_7000,{0U,53U,0U}},
{MOVEQ_7000,{0U,54U,0U}},
{MOVEQ_7000,{0U,55U,0U}},
{MOVEQ_7000,{0U,56U,0U}},
{MOVEQ_7000,{0U,57U,0U}},
{MOVEQ_7000,{0U,58U,0U}},
{MOVEQ_7000,{0U,59U,0U}},
{MOVEQ_7000,{0U,60U,0U}},
{MOVEQ_7000,{0U,61U,0U}},
{MOVEQ_7000,{0U,62U,0U}},
{MOVEQ_7000,{0U,63U,0U}},
{MOVEQ_7000,{0U,64U,0U}},
{MOVEQ_7000,{0U,65U,0U}},
{MOVEQ_7000,{0U,66U,0U}},
{MOVEQ_7000,{0U,67U,0U}},
{MOVEQ_7000,{0U,68U,0U}},
{MOVEQ_7000,{0U,69U,0U}},
{MOVEQ_7000,{0U,70U,0U}},
{MOVEQ_7000,{0U,71U,0U}},
{MOVEQ_7000,{0U,72U,0U}},
{MOVEQ_7000,{0U,73U,0U}},
{MOVEQ_7000,{0U,74U,0U}},
{MOVEQ_7000,{0U,75U,0U}},
{MOVEQ_7000,{0U,76U,0U}},
{MOVEQ_7000,{0U,77U,0U}},
{MOVEQ_7000,{0U,78U,0U}},
{MOVEQ_7000,{0U,79U,0U}},
{MOVEQ_7000,{0U,80U,0U}},
{MOVEQ_7000,{0U,81U,0U}},
{MOVEQ_7000,{0U,82U,0U}},
{MOVEQ_7000,{0U,83U,0U}},
{MOVEQ_7000,{0U,84U,0U}},
{MOVEQ_7000,{0U,85U,0U}},
{MOVEQ_7000,{0U,86U,0U}},
{MOVEQ_7000,{0U,87U,0U}},
{MOVEQ_7000,{0U,88U,0U}},
{MOVEQ_7000,{0U,89U,0U}},
{MOVEQ_7000,{0U,90U,0U}},
{MOVEQ_7000,{0U,91U,0U}},
{MOVEQ_7000,{0U,92U,0U}},
{MOVEQ_7000,{0U,93U,0U}},
{MOVEQ_7000,{0U,94U,0U}},
{MOVEQ_7000,{0U,95U,0U}},
{MOVEQ_7000,{0U,96U,0U}},
{MOVEQ_7000,{0U,97U,0U}},
{MOVEQ_7000,{0U,98U,0U}},
{MOVEQ_7000,{0U,99U,0U}},
{MOVEQ_7000,{0U,100U,0U}},
{MOVEQ_7000,{0U,101U,0U}},
{MOVEQ_7000,{0U,102U,0U}},
{MOVEQ_7000,{0U,103U,0U}},
{MOVEQ_7000,{0U,104U,0U}},
{MOVEQ_7000,{0U,105U,0U}},
{MOVEQ_7000,{0U,106U,0U}},
{MOVEQ_7000,{0U,107U,0U}},
{MOVEQ_7000,{0U,108U,0U}},
{MOVEQ_7000,{0U,109U,0U}},
{MOVEQ_7000,{0U,110U,0U}},
{MOVEQ_7000,{0U,111U,0U}},
{MOVEQ_7000,{0U,112U,0U}},
{MOVEQ_7000,{0U,113U,0U}},
{MOVEQ_7000,{0U,114U,0U}},
{MOVEQ_7000,{0U,115U,0U}},
{MOVEQ_7000,{0U,116U,0U}},
{MOVEQ_7000,{0U,117U,0U}},
{MOVEQ_7000,{0U,118U,0U}},
{MOVEQ_7000,{0U,119U,0U}},
{MOVEQ_7000,{0U,120U,0U}},
{MOVEQ_7000,{0U,121U,0U}},
{MOVEQ_7000,{0U,122U,0U}},
{MOVEQ_7000,{0U,123U,0U}},
{MOVEQ_7000,{0U,124U,0U}},
{MOVEQ_7000,{0U,125U,0U}},
{MOVEQ_7000,{0U,126U,0U}},
{MOVEQ_7000,{0U,127U,0U}},
{MOVEQ_7000,{0U,4294967168U,8U}},
{MOVEQ_7000,{0U,4294967169U,8U}},
{MOVEQ_7000,{0U,4294967170U,8U}},
{MOVEQ_7000,{0U,4294967171U,8U}},
{MOVEQ_7000,{0U,4294967172U,8U}},
{MOVEQ_7000,{0U,4294967173U,8U}},
{MOVEQ_7000,{0U,4294967174U,8U}},
{MOVEQ_7000,{0U,4294967175U,8U}},
{MOVEQ_7000,{0U,4294967176U,8U}},
{MOVEQ_7000,{0U,4294967177U,8U}},
{MOVEQ_7000,{0U,4294967178U,8U}},
{MOVEQ_7000,{0U,4294967179U,8U}},
{MOVEQ_7000,{0U,4294967180U,8U}},
{MOVEQ_7000,{0U,4294967181U,8U}},
{MOVEQ_7000,{0U,4294967182U,8U}},
{MOVEQ_7000,{0U,4294967183U,8U}},
{MOVEQ_7000,{0U,4294967184U,8U}},
{MOVEQ_7000,{0U,4294967185U,8U}},
{MOVEQ_7000,{0U,4294967186U,8U}},
{MOVEQ_7000,{0U,4294967187U,8U}},
{MOVEQ_7000,{0U,4294967188U,8U}},
{MOVEQ_7000,{0U,4294967189U,8U}},
{MOVEQ_7000,{0U,4294967190U,8U}},
{MOVEQ_7000,{0U,4294967191U,8U}},
{MOVEQ_7000,{0U,4294967192U,8U}},
{MOVEQ_7000,{0U,4294967193U,8U}},
{MOVEQ_7000,{0U,4294967194U,8U}},
{MOVEQ_7000,{0U,4294967195U,8U}},
{MOVEQ_7000,{0U,4294967196U,8U}},
{MOVEQ_7000,{0U,4294967197U,8U}},
{MOVEQ_7000,{0U,4294967198U,8U}},
{MOVEQ_7000,{0U,4294967199U,8U}},
{MOVEQ_7000,{0U,4294967200U,8U}},
{MOVEQ_7000,{0U,4294967201U,8U}},
{MOVEQ_7000,{0U,4294967202U,8U}},
{MOVEQ_7000,{0U,4294967203U,8U}},
{MOVEQ_7000,{0U,4294967204U,8U}},
{MOVEQ_7000,{0U,4294967205U,8U}},
{MOVEQ_7000,{0U,4294967206U,8U}},
{MOVEQ_7000,{0U,4294967207U,8U}},
{MOVEQ_7000,{0U,4294967208U,8U}},
{MOVEQ_7000,{0U,4294967209U,8U}},
{MOVEQ_7000,{0U,4294967210U,8U}},
{MOVEQ_7000,{0U,4294967211U,8U}},
{MOVEQ_7000,{0U,4294967212U,8U}},
{MOVEQ_7000,{0U,4294967213U,8U}},
{MOVEQ_7000,{0U,4294967214U,8U}},
{MOVEQ_7000,{0U,4294967215U,8U}},
{MOVEQ_7000,{0U,4294967216U,8U}},
{MOVEQ_7000,{0U,4294967217U,8U}},
{MOVEQ_7000,{0U,4294967218U,8U}},
{MOVEQ_7000,{0U,4294967219U,8U}},
{MOVEQ_7000,{0U,4294967220U,8U}},
{MOVEQ_7000,{0U,4294967221U,8U}},
{MOVEQ_7000,{0U,4294967222U,8U}},
{MOVEQ_7000,{0U,4294967223U,8U}},
{MOVEQ_7000,{0U,4294967224U,8U}},
{MOVEQ_7000,{0U,4294967225U,8U}},
{MOVEQ_7000,{0U,4294967226U,8U}},
{MOVEQ_7000,{0U,4294967227U,8U}},
{MOVEQ_7000,{0U,4294967228U,8U}},
{MOVEQ_7000,{0U,4294967229U,8U}},
{MOVEQ_7000,{0U,4294967230U,8U}},
{MOVEQ_7000,{0U,4294967231U,8U}},
{MOVEQ_7000,{0U,4294967232U,8U}},
{MOVEQ_7000,{0U,4294967233U,8U}},
{MOVEQ_7000,{0U,4294967234U,8U}},
{MOVEQ_7000,{0U,4294967235U,8U}},
{MOVEQ_7000,{0U,4294967236U,8U}},
{MOVEQ_7000,{0U,4294967237U,8U}},
{MOVEQ_7000,{0U,4294967238U,8U}},
{MOVEQ_7000,{0U,4294967239U,8U}},
{MOVEQ_7000,{0U,4294967240U,8U}},
{MOVEQ_7000,{0U,4294967241U,8U}},
{MOVEQ_7000,{0U,4294967242U,8U}},
{MOVEQ_7000,{0U,4294967243U,8U}},
{MOVEQ_7000,{0U,4294967244U,8U}},
{MOVEQ_7000,{0U,4294967245U,8U}},
{MOVEQ_7000,{0U,4294967246U,8U}},
{MOVEQ_7000,{0U,4294967247U,8U}},
{MOVEQ_7000,{0U,4294967248U,8U}},
{MOVEQ_7000,{0U,4294967249U,8U}},
{MOVEQ_7000,{0U,4294967250U,8U}},
{MOVEQ_7000,{0U,4294967251U,8U}},
{MOVEQ_7000,{0U,4294967252U,8U}},
{MOVEQ_7000,{0U,4294967253U,8U}},
{MOVEQ_7000,{0U,4294967254U,8U}},
{MOVEQ_7000,{0U,4294967255U,8U}},
{MOVEQ_7000,{0U,4294967256U,8U}},
{MOVEQ_7000,{0U,4294967257U,8U}},
{MOVEQ_7000,{0U,4294967258U,8U}},
{MOVEQ_7000,{0U,4294967259U,8U}},
{MOVEQ_7000,{0U,4294967260U,8U}},
{MOVEQ_7000,{0U,4294967261U,8U}},
{MOVEQ_7000,{0U,4294967262U,8U}},
{MOVEQ_7000,{0U,4294967263U,8U}},
{MOVEQ_7000,{0U,4294967264U,8U}},
{MOVEQ_7000,{0U,4294967265U,8U}},
{MOVEQ_7000,{0U,4294967266U,8U}},
{MOVEQ_7000,{0U,4294967267U,8U}},
{MOVEQ_7000,{0U,4294967268U,8U}},
{MOVEQ_7000,{0U,4294967269U,8U}},
{MOVEQ_7000,{0U,4294967270U,8U}},
{MOVEQ_7000,{0U,4294967271U,8U}},
{MOVEQ_7000,{0U,4294967272U,8U}},
{MOVEQ_7000,{0U,4294967273U,8U}},
{MOVEQ_7000,{0U,4294967274U,8U}},
{MOVEQ_7000,{0U,4294967275U,8U}},
{MOVEQ_7000,{0U,4294967276U,8U}},
{MOVEQ_7000,{0U,4294967277U,8U}},
{MOVEQ_7000,{0U,4294967278U,8U}},
{MOVEQ_7000,{0U,4294967279U,8U}},
{MOVEQ_7000,{0U,4294967280U,8U}},
{MOVEQ_7000,{0U,4294967281U,8U}},
{MOVEQ_7000,{0U,4294967282U,8U}},
{MOVEQ_7000,{0U,4294967283U,8U}},
{MOVEQ_7000,{0U,4294967284U,8U}},
{MOVEQ_7000,{0U,4294967285U,8U}},
{MOVEQ_7000,{0U,4294967286U,8U}},
{MOVEQ_7000,{0U,4294967287U,8U}},
{MOVEQ_7000,{0U,4294967288U,8U}},
{MOVEQ_7000,{0U,4294967289U,8U}},
{MOVEQ_7000,{0U,4294967290U,8U}},
{MOVEQ_7000,{0U,4294967291U,8U}},
{MOVEQ_7000,{0U,4294967292U,8U}},
{MOVEQ_7000,{0U,4294967293U,8U}},
{MOVEQ_7000,{0U,4294967294U,8U}},
{MOVEQ_7000,{0U,4294967295U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEQ_7000,{1U,0U,4U}},
{MOVEQ_7000,{1U,1U,0U}},
{MOVEQ_7000,{1U,2U,0U}},
{MOVEQ_7000,{1U,3U,0U}},
{MOVEQ_7000,{1U,4U,0U}},
{MOVEQ_7000,{1U,5U,0U}},
{MOVEQ_7000,{1U,6U,0U}},
{MOVEQ_7000,{1U,7U,0U}},
{MOVEQ_7000,{1U,8U,0U}},
{MOVEQ_7000,{1U,9U,0U}},
{MOVEQ_7000,{1U,10U,0U}},
{MOVEQ_7000,{1U,11U,0U}},
{MOVEQ_7000,{1U,12U,0U}},
{MOVEQ_7000,{1U,13U,0U}},
{MOVEQ_7000,{1U,14U,0U}},
{MOVEQ_7000,{1U,15U,0U}},
{MOVEQ_7000,{1U,16U,0U}},
{MOVEQ_7000,{1U,17U,0U}},
{MOVEQ_7000,{1U,18U,0U}},
{MOVEQ_7000,{1U,19U,0U}},
{MOVEQ_7000,{1U,20U,0U}},
{MOVEQ_7000,{1U,21U,0U}},
{MOVEQ_7000,{1U,22U,0U}},
{MOVEQ_7000,{1U,23U,0U}},
{MOVEQ_7000,{1U,24U,0U}},
{MOVEQ_7000,{1U,25U,0U}},
{MOVEQ_7000,{1U,26U,0U}},
{MOVEQ_7000,{1U,27U,0U}},
{MOVEQ_7000,{1U,28U,0U}},
{MOVEQ_7000,{1U,29U,0U}},
{MOVEQ_7000,{1U,30U,0U}},
{MOVEQ_7000,{1U,31U,0U}},
{MOVEQ_7000,{1U,32U,0U}},
{MOVEQ_7000,{1U,33U,0U}},
{MOVEQ_7000,{1U,34U,0U}},
{MOVEQ_7000,{1U,35U,0U}},
{MOVEQ_7000,{1U,36U,0U}},
{MOVEQ_7000,{1U,37U,0U}},
{MOVEQ_7000,{1U,38U,0U}},
{MOVEQ_7000,{1U,39U,0U}},
{MOVEQ_7000,{1U,40U,0U}},
{MOVEQ_7000,{1U,41U,0U}},
{MOVEQ_7000,{1U,42U,0U}},
{MOVEQ_7000,{1U,43U,0U}},
{MOVEQ_7000,{1U,44U,0U}},
{MOVEQ_7000,{1U,45U,0U}},
{MOVEQ_7000,{1U,46U,0U}},
{MOVEQ_7000,{1U,47U,0U}},
{MOVEQ_7000,{1U,48U,0U}},
{MOVEQ_7000,{1U,49U,0U}},
{MOVEQ_7000,{1U,50U,0U}},
{MOVEQ_7000,{1U,51U,0U}},
{MOVEQ_7000,{1U,52U,0U}},
{MOVEQ_7000,{1U,53U,0U}},
{MOVEQ_7000,{1U,54U,0U}},
{MOVEQ_7000,{1U,55U,0U}},
{MOVEQ_7000,{1U,56U,0U}},
{MOVEQ_7000,{1U,57U,0U}},
{MOVEQ_7000,{1U,58U,0U}},
{MOVEQ_7000,{1U,59U,0U}},
{MOVEQ_7000,{1U,60U,0U}},
{MOVEQ_7000,{1U,61U,0U}},
{MOVEQ_7000,{1U,62U,0U}},
{MOVEQ_7000,{1U,63U,0U}},
{MOVEQ_7000,{1U,64U,0U}},
{MOVEQ_7000,{1U,65U,0U}},
{MOVEQ_7000,{1U,66U,0U}},
{MOVEQ_7000,{1U,67U,0U}},
{MOVEQ_7000,{1U,68U,0U}},
{MOVEQ_7000,{1U,69U,0U}},
{MOVEQ_7000,{1U,70U,0U}},
{MOVEQ_7000,{1U,71U,0U}},
{MOVEQ_7000,{1U,72U,0U}},
{MOVEQ_7000,{1U,73U,0U}},
{MOVEQ_7000,{1U,74U,0U}},
{MOVEQ_7000,{1U,75U,0U}},
{MOVEQ_7000,{1U,76U,0U}},
{MOVEQ_7000,{1U,77U,0U}},
{MOVEQ_7000,{1U,78U,0U}},
{MOVEQ_7000,{1U,79U,0U}},
{MOVEQ_7000,{1U,80U,0U}},
{MOVEQ_7000,{1U,81U,0U}},
{MOVEQ_7000,{1U,82U,0U}},
{MOVEQ_7000,{1U,83U,0U}},
{MOVEQ_7000,{1U,84U,0U}},
{MOVEQ_7000,{1U,85U,0U}},
{MOVEQ_7000,{1U,86U,0U}},
{MOVEQ_7000,{1U,87U,0U}},
{MOVEQ_7000,{1U,88U,0U}},
{MOVEQ_7000,{1U,89U,0U}},
{MOVEQ_7000,{1U,90U,0U}},
{MOVEQ_7000,{1U,91U,0U}},
{MOVEQ_7000,{1U,92U,0U}},
{MOVEQ_7000,{1U,93U,0U}},
{MOVEQ_7000,{1U,94U,0U}},
{MOVEQ_7000,{1U,95U,0U}},
{MOVEQ_7000,{1U,96U,0U}},
{MOVEQ_7000,{1U,97U,0U}},
{MOVEQ_7000,{1U,98U,0U}},
{MOVEQ_7000,{1U,99U,0U}},
{MOVEQ_7000,{1U,100U,0U}},
{MOVEQ_7000,{1U,101U,0U}},
{MOVEQ_7000,{1U,102U,0U}},
{MOVEQ_7000,{1U,103U,0U}},
{MOVEQ_7000,{1U,104U,0U}},
{MOVEQ_7000,{1U,105U,0U}},
{MOVEQ_7000,{1U,106U,0U}},
{MOVEQ_7000,{1U,107U,0U}},
{MOVEQ_7000,{1U,108U,0U}},
{MOVEQ_7000,{1U,109U,0U}},
{MOVEQ_7000,{1U,110U,0U}},
{MOVEQ_7000,{1U,111U,0U}},
{MOVEQ_7000,{1U,112U,0U}},
{MOVEQ_7000,{1U,113U,0U}},
{MOVEQ_7000,{1U,114U,0U}},
{MOVEQ_7000,{1U,115U,0U}},
{MOVEQ_7000,{1U,116U,0U}},
{MOVEQ_7000,{1U,117U,0U}},
{MOVEQ_7000,{1U,118U,0U}},
{MOVEQ_7000,{1U,119U,0U}},
{MOVEQ_7000,{1U,120U,0U}},
{MOVEQ_7000,{1U,121U,0U}},
{MOVEQ_7000,{1U,122U,0U}},
{MOVEQ_7000,{1U,123U,0U}},
{MOVEQ_7000,{1U,124U,0U}},
{MOVEQ_7000,{1U,125U,0U}},
{MOVEQ_7000,{1U,126U,0U}},
{MOVEQ_7000,{1U,127U,0U}},
{MOVEQ_7000,{1U,4294967168U,8U}},
{MOVEQ_7000,{1U,4294967169U,8U}},
{MOVEQ_7000,{1U,4294967170U,8U}},
{MOVEQ_7000,{1U,4294967171U,8U}},
{MOVEQ_7000,{1U,4294967172U,8U}},
{MOVEQ_7000,{1U,4294967173U,8U}},
{MOVEQ_7000,{1U,4294967174U,8U}},
{MOVEQ_7000,{1U,4294967175U,8U}},
{MOVEQ_7000,{1U,4294967176U,8U}},
{MOVEQ_7000,{1U,4294967177U,8U}},
{MOVEQ_7000,{1U,4294967178U,8U}},
{MOVEQ_7000,{1U,4294967179U,8U}},
{MOVEQ_7000,{1U,4294967180U,8U}},
{MOVEQ_7000,{1U,4294967181U,8U}},
{MOVEQ_7000,{1U,4294967182U,8U}},
{MOVEQ_7000,{1U,4294967183U,8U}},
{MOVEQ_7000,{1U,4294967184U,8U}},
{MOVEQ_7000,{1U,4294967185U,8U}},
{MOVEQ_7000,{1U,4294967186U,8U}},
{MOVEQ_7000,{1U,4294967187U,8U}},
{MOVEQ_7000,{1U,4294967188U,8U}},
{MOVEQ_7000,{1U,4294967189U,8U}},
{MOVEQ_7000,{1U,4294967190U,8U}},
{MOVEQ_7000,{1U,4294967191U,8U}},
{MOVEQ_7000,{1U,4294967192U,8U}},
{MOVEQ_7000,{1U,4294967193U,8U}},
{MOVEQ_7000,{1U,4294967194U,8U}},
{MOVEQ_7000,{1U,4294967195U,8U}},
{MOVEQ_7000,{1U,4294967196U,8U}},
{MOVEQ_7000,{1U,4294967197U,8U}},
{MOVEQ_7000,{1U,4294967198U,8U}},
{MOVEQ_7000,{1U,4294967199U,8U}},
{MOVEQ_7000,{1U,4294967200U,8U}},
{MOVEQ_7000,{1U,4294967201U,8U}},
{MOVEQ_7000,{1U,4294967202U,8U}},
{MOVEQ_7000,{1U,4294967203U,8U}},
{MOVEQ_7000,{1U,4294967204U,8U}},
{MOVEQ_7000,{1U,4294967205U,8U}},
{MOVEQ_7000,{1U,4294967206U,8U}},
{MOVEQ_7000,{1U,4294967207U,8U}},
{MOVEQ_7000,{1U,4294967208U,8U}},
{MOVEQ_7000,{1U,4294967209U,8U}},
{MOVEQ_7000,{1U,4294967210U,8U}},
{MOVEQ_7000,{1U,4294967211U,8U}},
{MOVEQ_7000,{1U,4294967212U,8U}},
{MOVEQ_7000,{1U,4294967213U,8U}},
{MOVEQ_7000,{1U,4294967214U,8U}},
{MOVEQ_7000,{1U,4294967215U,8U}},
{MOVEQ_7000,{1U,4294967216U,8U}},
{MOVEQ_7000,{1U,4294967217U,8U}},
{MOVEQ_7000,{1U,4294967218U,8U}},
{MOVEQ_7000,{1U,4294967219U,8U}},
{MOVEQ_7000,{1U,4294967220U,8U}},
{MOVEQ_7000,{1U,4294967221U,8U}},
{MOVEQ_7000,{1U,4294967222U,8U}},
{MOVEQ_7000,{1U,4294967223U,8U}},
{MOVEQ_7000,{1U,4294967224U,8U}},
{MOVEQ_7000,{1U,4294967225U,8U}},
{MOVEQ_7000,{1U,4294967226U,8U}},
{MOVEQ_7000,{1U,4294967227U,8U}},
{MOVEQ_7000,{1U,4294967228U,8U}},
{MOVEQ_7000,{1U,4294967229U,8U}},
{MOVEQ_7000,{1U,4294967230U,8U}},
{MOVEQ_7000,{1U,4294967231U,8U}},
{MOVEQ_7000,{1U,4294967232U,8U}},
{MOVEQ_7000,{1U,4294967233U,8U}},
{MOVEQ_7000,{1U,4294967234U,8U}},
{MOVEQ_7000,{1U,4294967235U,8U}},
{MOVEQ_7000,{1U,4294967236U,8U}},
{MOVEQ_7000,{1U,4294967237U,8U}},
{MOVEQ_7000,{1U,4294967238U,8U}},
{MOVEQ_7000,{1U,4294967239U,8U}},
{MOVEQ_7000,{1U,4294967240U,8U}},
{MOVEQ_7000,{1U,4294967241U,8U}},
{MOVEQ_7000,{1U,4294967242U,8U}},
{MOVEQ_7000,{1U,4294967243U,8U}},
{MOVEQ_7000,{1U,4294967244U,8U}},
{MOVEQ_7000,{1U,4294967245U,8U}},
{MOVEQ_7000,{1U,4294967246U,8U}},
{MOVEQ_7000,{1U,4294967247U,8U}},
{MOVEQ_7000,{1U,4294967248U,8U}},
{MOVEQ_7000,{1U,4294967249U,8U}},
{MOVEQ_7000,{1U,4294967250U,8U}},
{MOVEQ_7000,{1U,4294967251U,8U}},
{MOVEQ_7000,{1U,4294967252U,8U}},
{MOVEQ_7000,{1U,4294967253U,8U}},
{MOVEQ_7000,{1U,4294967254U,8U}},
{MOVEQ_7000,{1U,4294967255U,8U}},
{MOVEQ_7000,{1U,4294967256U,8U}},
{MOVEQ_7000,{1U,4294967257U,8U}},
{MOVEQ_7000,{1U,4294967258U,8U}},
{MOVEQ_7000,{1U,4294967259U,8U}},
{MOVEQ_7000,{1U,4294967260U,8U}},
{MOVEQ_7000,{1U,4294967261U,8U}},
{MOVEQ_7000,{1U,4294967262U,8U}},
{MOVEQ_7000,{1U,4294967263U,8U}},
{MOVEQ_7000,{1U,4294967264U,8U}},
{MOVEQ_7000,{1U,4294967265U,8U}},
{MOVEQ_7000,{1U,4294967266U,8U}},
{MOVEQ_7000,{1U,4294967267U,8U}},
{MOVEQ_7000,{1U,4294967268U,8U}},
{MOVEQ_7000,{1U,4294967269U,8U}},
{MOVEQ_7000,{1U,4294967270U,8U}},
{MOVEQ_7000,{1U,4294967271U,8U}},
{MOVEQ_7000,{1U,4294967272U,8U}},
{MOVEQ_7000,{1U,4294967273U,8U}},
{MOVEQ_7000,{1U,4294967274U,8U}},
{MOVEQ_7000,{1U,4294967275U,8U}},
{MOVEQ_7000,{1U,4294967276U,8U}},
{MOVEQ_7000,{1U,4294967277U,8U}},
{MOVEQ_7000,{1U,4294967278U,8U}},
{MOVEQ_7000,{1U,4294967279U,8U}},
{MOVEQ_7000,{1U,4294967280U,8U}},
{MOVEQ_7000,{1U,4294967281U,8U}},
{MOVEQ_7000,{1U,4294967282U,8U}},
{MOVEQ_7000,{1U,4294967283U,8U}},
{MOVEQ_7000,{1U,4294967284U,8U}},
{MOVEQ_7000,{1U,4294967285U,8U}},
{MOVEQ_7000,{1U,4294967286U,8U}},
{MOVEQ_7000,{1U,4294967287U,8U}},
{MOVEQ_7000,{1U,4294967288U,8U}},
{MOVEQ_7000,{1U,4294967289U,8U}},
{MOVEQ_7000,{1U,4294967290U,8U}},
{MOVEQ_7000,{1U,4294967291U,8U}},
{MOVEQ_7000,{1U,4294967292U,8U}},
{MOVEQ_7000,{1U,4294967293U,8U}},
{MOVEQ_7000,{1U,4294967294U,8U}},
{MOVEQ_7000,{1U,4294967295U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEQ_7000,{2U,0U,4U}},
{MOVEQ_7000,{2U,1U,0U}},
{MOVEQ_7000,{2U,2U,0U}},
{MOVEQ_7000,{2U,3U,0U}},
{MOVEQ_7000,{2U,4U,0U}},
{MOVEQ_7000,{2U,5U,0U}},
{MOVEQ_7000,{2U,6U,0U}},
{MOVEQ_7000,{2U,7U,0U}},
{MOVEQ_7000,{2U,8U,0U}},
{MOVEQ_7000,{2U,9U,0U}},
{MOVEQ_7000,{2U,10U,0U}},
{MOVEQ_7000,{2U,11U,0U}},
{MOVEQ_7000,{2U,12U,0U}},
{MOVEQ_7000,{2U,13U,0U}},
{MOVEQ_7000,{2U,14U,0U}},
{MOVEQ_7000,{2U,15U,0U}},
{MOVEQ_7000,{2U,16U,0U}},
{MOVEQ_7000,{2U,17U,0U}},
{MOVEQ_7000,{2U,18U,0U}},
{MOVEQ_7000,{2U,19U,0U}},
{MOVEQ_7000,{2U,20U,0U}},
{MOVEQ_7000,{2U,21U,0U}},
{MOVEQ_7000,{2U,22U,0U}},
{MOVEQ_7000,{2U,23U,0U}},
{MOVEQ_7000,{2U,24U,0U}},
{MOVEQ_7000,{2U,25U,0U}},
{MOVEQ_7000,{2U,26U,0U}},
{MOVEQ_7000,{2U,27U,0U}},
{MOVEQ_7000,{2U,28U,0U}},
{MOVEQ_7000,{2U,29U,0U}},
{MOVEQ_7000,{2U,30U,0U}},
{MOVEQ_7000,{2U,31U,0U}},
{MOVEQ_7000,{2U,32U,0U}},
{MOVEQ_7000,{2U,33U,0U}},
{MOVEQ_7000,{2U,34U,0U}},
{MOVEQ_7000,{2U,35U,0U}},
{MOVEQ_7000,{2U,36U,0U}},
{MOVEQ_7000,{2U,37U,0U}},
{MOVEQ_7000,{2U,38U,0U}},
{MOVEQ_7000,{2U,39U,0U}},
{MOVEQ_7000,{2U,40U,0U}},
{MOVEQ_7000,{2U,41U,0U}},
{MOVEQ_7000,{2U,42U,0U}},
{MOVEQ_7000,{2U,43U,0U}},
{MOVEQ_7000,{2U,44U,0U}},
{MOVEQ_7000,{2U,45U,0U}},
{MOVEQ_7000,{2U,46U,0U}},
{MOVEQ_7000,{2U,47U,0U}},
{MOVEQ_7000,{2U,48U,0U}},
{MOVEQ_7000,{2U,49U,0U}},
{MOVEQ_7000,{2U,50U,0U}},
{MOVEQ_7000,{2U,51U,0U}},
{MOVEQ_7000,{2U,52U,0U}},
{MOVEQ_7000,{2U,53U,0U}},
{MOVEQ_7000,{2U,54U,0U}},
{MOVEQ_7000,{2U,55U,0U}},
{MOVEQ_7000,{2U,56U,0U}},
{MOVEQ_7000,{2U,57U,0U}},
{MOVEQ_7000,{2U,58U,0U}},
{MOVEQ_7000,{2U,59U,0U}},
{MOVEQ_7000,{2U,60U,0U}},
{MOVEQ_7000,{2U,61U,0U}},
{MOVEQ_7000,{2U,62U,0U}},
{MOVEQ_7000,{2U,63U,0U}},
{MOVEQ_7000,{2U,64U,0U}},
{MOVEQ_7000,{2U,65U,0U}},
{MOVEQ_7000,{2U,66U,0U}},
{MOVEQ_7000,{2U,67U,0U}},
{MOVEQ_7000,{2U,68U,0U}},
{MOVEQ_7000,{2U,69U,0U}},
{MOVEQ_7000,{2U,70U,0U}},
{MOVEQ_7000,{2U,71U,0U}},
{MOVEQ_7000,{2U,72U,0U}},
{MOVEQ_7000,{2U,73U,0U}},
{MOVEQ_7000,{2U,74U,0U}},
{MOVEQ_7000,{2U,75U,0U}},
{MOVEQ_7000,{2U,76U,0U}},
{MOVEQ_7000,{2U,77U,0U}},
{MOVEQ_7000,{2U,78U,0U}},
{MOVEQ_7000,{2U,79U,0U}},
{MOVEQ_7000,{2U,80U,0U}},
{MOVEQ_7000,{2U,81U,0U}},
{MOVEQ_7000,{2U,82U,0U}},
{MOVEQ_7000,{2U,83U,0U}},
{MOVEQ_7000,{2U,84U,0U}},
{MOVEQ_7000,{2U,85U,0U}},
{MOVEQ_7000,{2U,86U,0U}},
{MOVEQ_7000,{2U,87U,0U}},
{MOVEQ_7000,{2U,88U,0U}},
{MOVEQ_7000,{2U,89U,0U}},
{MOVEQ_7000,{2U,90U,0U}},
{MOVEQ_7000,{2U,91U,0U}},
{MOVEQ_7000,{2U,92U,0U}},
{MOVEQ_7000,{2U,93U,0U}},
{MOVEQ_7000,{2U,94U,0U}},
{MOVEQ_7000,{2U,95U,0U}},
{MOVEQ_7000,{2U,96U,0U}},
{MOVEQ_7000,{2U,97U,0U}},
{MOVEQ_7000,{2U,98U,0U}},
{MOVEQ_7000,{2U,99U,0U}},
{MOVEQ_7000,{2U,100U,0U}},
{MOVEQ_7000,{2U,101U,0U}},
{MOVEQ_7000,{2U,102U,0U}},
{MOVEQ_7000,{2U,103U,0U}},
{MOVEQ_7000,{2U,104U,0U}},
{MOVEQ_7000,{2U,105U,0U}},
{MOVEQ_7000,{2U,106U,0U}},
{MOVEQ_7000,{2U,107U,0U}},
{MOVEQ_7000,{2U,108U,0U}},
{MOVEQ_7000,{2U,109U,0U}},
{MOVEQ_7000,{2U,110U,0U}},
{MOVEQ_7000,{2U,111U,0U}},
{MOVEQ_7000,{2U,112U,0U}},
{MOVEQ_7000,{2U,113U,0U}},
{MOVEQ_7000,{2U,114U,0U}},
{MOVEQ_7000,{2U,115U,0U}},
{MOVEQ_7000,{2U,116U,0U}},
{MOVEQ_7000,{2U,117U,0U}},
{MOVEQ_7000,{2U,118U,0U}},
{MOVEQ_7000,{2U,119U,0U}},
{MOVEQ_7000,{2U,120U,0U}},
{MOVEQ_7000,{2U,121U,0U}},
{MOVEQ_7000,{2U,122U,0U}},
{MOVEQ_7000,{2U,123U,0U}},
{MOVEQ_7000,{2U,124U,0U}},
{MOVEQ_7000,{2U,125U,0U}},
{MOVEQ_7000,{2U,126U,0U}},
{MOVEQ_7000,{2U,127U,0U}},
{MOVEQ_7000,{2U,4294967168U,8U}},
{MOVEQ_7000,{2U,4294967169U,8U}},
{MOVEQ_7000,{2U,4294967170U,8U}},
{MOVEQ_7000,{2U,4294967171U,8U}},
{MOVEQ_7000,{2U,4294967172U,8U}},
{MOVEQ_7000,{2U,4294967173U,8U}},
{MOVEQ_7000,{2U,4294967174U,8U}},
{MOVEQ_7000,{2U,4294967175U,8U}},
{MOVEQ_7000,{2U,4294967176U,8U}},
{MOVEQ_7000,{2U,4294967177U,8U}},
{MOVEQ_7000,{2U,4294967178U,8U}},
{MOVEQ_7000,{2U,4294967179U,8U}},
{MOVEQ_7000,{2U,4294967180U,8U}},
{MOVEQ_7000,{2U,4294967181U,8U}},
{MOVEQ_7000,{2U,4294967182U,8U}},
{MOVEQ_7000,{2U,4294967183U,8U}},
{MOVEQ_7000,{2U,4294967184U,8U}},
{MOVEQ_7000,{2U,4294967185U,8U}},
{MOVEQ_7000,{2U,4294967186U,8U}},
{MOVEQ_7000,{2U,4294967187U,8U}},
{MOVEQ_7000,{2U,4294967188U,8U}},
{MOVEQ_7000,{2U,4294967189U,8U}},
{MOVEQ_7000,{2U,4294967190U,8U}},
{MOVEQ_7000,{2U,4294967191U,8U}},
{MOVEQ_7000,{2U,4294967192U,8U}},
{MOVEQ_7000,{2U,4294967193U,8U}},
{MOVEQ_7000,{2U,4294967194U,8U}},
{MOVEQ_7000,{2U,4294967195U,8U}},
{MOVEQ_7000,{2U,4294967196U,8U}},
{MOVEQ_7000,{2U,4294967197U,8U}},
{MOVEQ_7000,{2U,4294967198U,8U}},
{MOVEQ_7000,{2U,4294967199U,8U}},
{MOVEQ_7000,{2U,4294967200U,8U}},
{MOVEQ_7000,{2U,4294967201U,8U}},
{MOVEQ_7000,{2U,4294967202U,8U}},
{MOVEQ_7000,{2U,4294967203U,8U}},
{MOVEQ_7000,{2U,4294967204U,8U}},
{MOVEQ_7000,{2U,4294967205U,8U}},
{MOVEQ_7000,{2U,4294967206U,8U}},
{MOVEQ_7000,{2U,4294967207U,8U}},
{MOVEQ_7000,{2U,4294967208U,8U}},
{MOVEQ_7000,{2U,4294967209U,8U}},
{MOVEQ_7000,{2U,4294967210U,8U}},
{MOVEQ_7000,{2U,4294967211U,8U}},
{MOVEQ_7000,{2U,4294967212U,8U}},
{MOVEQ_7000,{2U,4294967213U,8U}},
{MOVEQ_7000,{2U,4294967214U,8U}},
{MOVEQ_7000,{2U,4294967215U,8U}},
{MOVEQ_7000,{2U,4294967216U,8U}},
{MOVEQ_7000,{2U,4294967217U,8U}},
{MOVEQ_7000,{2U,4294967218U,8U}},
{MOVEQ_7000,{2U,4294967219U,8U}},
{MOVEQ_7000,{2U,4294967220U,8U}},
{MOVEQ_7000,{2U,4294967221U,8U}},
{MOVEQ_7000,{2U,4294967222U,8U}},
{MOVEQ_7000,{2U,4294967223U,8U}},
{MOVEQ_7000,{2U,4294967224U,8U}},
{MOVEQ_7000,{2U,4294967225U,8U}},
{MOVEQ_7000,{2U,4294967226U,8U}},
{MOVEQ_7000,{2U,4294967227U,8U}},
{MOVEQ_7000,{2U,4294967228U,8U}},
{MOVEQ_7000,{2U,4294967229U,8U}},
{MOVEQ_7000,{2U,4294967230U,8U}},
{MOVEQ_7000,{2U,4294967231U,8U}},
{MOVEQ_7000,{2U,4294967232U,8U}},
{MOVEQ_7000,{2U,4294967233U,8U}},
{MOVEQ_7000,{2U,4294967234U,8U}},
{MOVEQ_7000,{2U,4294967235U,8U}},
{MOVEQ_7000,{2U,4294967236U,8U}},
{MOVEQ_7000,{2U,4294967237U,8U}},
{MOVEQ_7000,{2U,4294967238U,8U}},
{MOVEQ_7000,{2U,4294967239U,8U}},
{MOVEQ_7000,{2U,4294967240U,8U}},
{MOVEQ_7000,{2U,4294967241U,8U}},
{MOVEQ_7000,{2U,4294967242U,8U}},
{MOVEQ_7000,{2U,4294967243U,8U}},
{MOVEQ_7000,{2U,4294967244U,8U}},
{MOVEQ_7000,{2U,4294967245U,8U}},
{MOVEQ_7000,{2U,4294967246U,8U}},
{MOVEQ_7000,{2U,4294967247U,8U}},
{MOVEQ_7000,{2U,4294967248U,8U}},
{MOVEQ_7000,{2U,4294967249U,8U}},
{MOVEQ_7000,{2U,4294967250U,8U}},
{MOVEQ_7000,{2U,4294967251U,8U}},
{MOVEQ_7000,{2U,4294967252U,8U}},
{MOVEQ_7000,{2U,4294967253U,8U}},
{MOVEQ_7000,{2U,4294967254U,8U}},
{MOVEQ_7000,{2U,4294967255U,8U}},
{MOVEQ_7000,{2U,4294967256U,8U}},
{MOVEQ_7000,{2U,4294967257U,8U}},
{MOVEQ_7000,{2U,4294967258U,8U}},
{MOVEQ_7000,{2U,4294967259U,8U}},
{MOVEQ_7000,{2U,4294967260U,8U}},
{MOVEQ_7000,{2U,4294967261U,8U}},
{MOVEQ_7000,{2U,4294967262U,8U}},
{MOVEQ_7000,{2U,4294967263U,8U}},
{MOVEQ_7000,{2U,4294967264U,8U}},
{MOVEQ_7000,{2U,4294967265U,8U}},
{MOVEQ_7000,{2U,4294967266U,8U}},
{MOVEQ_7000,{2U,4294967267U,8U}},
{MOVEQ_7000,{2U,4294967268U,8U}},
{MOVEQ_7000,{2U,4294967269U,8U}},
{MOVEQ_7000,{2U,4294967270U,8U}},
{MOVEQ_7000,{2U,4294967271U,8U}},
{MOVEQ_7000,{2U,4294967272U,8U}},
{MOVEQ_7000,{2U,4294967273U,8U}},
{MOVEQ_7000,{2U,4294967274U,8U}},
{MOVEQ_7000,{2U,4294967275U,8U}},
{MOVEQ_7000,{2U,4294967276U,8U}},
{MOVEQ_7000,{2U,4294967277U,8U}},
{MOVEQ_7000,{2U,4294967278U,8U}},
{MOVEQ_7000,{2U,4294967279U,8U}},
{MOVEQ_7000,{2U,4294967280U,8U}},
{MOVEQ_7000,{2U,4294967281U,8U}},
{MOVEQ_7000,{2U,4294967282U,8U}},
{MOVEQ_7000,{2U,4294967283U,8U}},
{MOVEQ_7000,{2U,4294967284U,8U}},
{MOVEQ_7000,{2U,4294967285U,8U}},
{MOVEQ_7000,{2U,4294967286U,8U}},
{MOVEQ_7000,{2U,4294967287U,8U}},
{MOVEQ_7000,{2U,4294967288U,8U}},
{MOVEQ_7000,{2U,4294967289U,8U}},
{MOVEQ_7000,{2U,4294967290U,8U}},
{MOVEQ_7000,{2U,4294967291U,8U}},
{MOVEQ_7000,{2U,4294967292U,8U}},
{MOVEQ_7000,{2U,4294967293U,8U}},
{MOVEQ_7000,{2U,4294967294U,8U}},
{MOVEQ_7000,{2U,4294967295U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEQ_7000,{3U,0U,4U}},
{MOVEQ_7000,{3U,1U,0U}},
{MOVEQ_7000,{3U,2U,0U}},
{MOVEQ_7000,{3U,3U,0U}},
{MOVEQ_7000,{3U,4U,0U}},
{MOVEQ_7000,{3U,5U,0U}},
{MOVEQ_7000,{3U,6U,0U}},
{MOVEQ_7000,{3U,7U,0U}},
{MOVEQ_7000,{3U,8U,0U}},
{MOVEQ_7000,{3U,9U,0U}},
{MOVEQ_7000,{3U,10U,0U}},
{MOVEQ_7000,{3U,11U,0U}},
{MOVEQ_7000,{3U,12U,0U}},
{MOVEQ_7000,{3U,13U,0U}},
{MOVEQ_7000,{3U,14U,0U}},
{MOVEQ_7000,{3U,15U,0U}},
{MOVEQ_7000,{3U,16U,0U}},
{MOVEQ_7000,{3U,17U,0U}},
{MOVEQ_7000,{3U,18U,0U}},
{MOVEQ_7000,{3U,19U,0U}},
{MOVEQ_7000,{3U,20U,0U}},
{MOVEQ_7000,{3U,21U,0U}},
{MOVEQ_7000,{3U,22U,0U}},
{MOVEQ_7000,{3U,23U,0U}},
{MOVEQ_7000,{3U,24U,0U}},
{MOVEQ_7000,{3U,25U,0U}},
{MOVEQ_7000,{3U,26U,0U}},
{MOVEQ_7000,{3U,27U,0U}},
{MOVEQ_7000,{3U,28U,0U}},
{MOVEQ_7000,{3U,29U,0U}},
{MOVEQ_7000,{3U,30U,0U}},
{MOVEQ_7000,{3U,31U,0U}},
{MOVEQ_7000,{3U,32U,0U}},
{MOVEQ_7000,{3U,33U,0U}},
{MOVEQ_7000,{3U,34U,0U}},
{MOVEQ_7000,{3U,35U,0U}},
{MOVEQ_7000,{3U,36U,0U}},
{MOVEQ_7000,{3U,37U,0U}},
{MOVEQ_7000,{3U,38U,0U}},
{MOVEQ_7000,{3U,39U,0U}},
{MOVEQ_7000,{3U,40U,0U}},
{MOVEQ_7000,{3U,41U,0U}},
{MOVEQ_7000,{3U,42U,0U}},
{MOVEQ_7000,{3U,43U,0U}},
{MOVEQ_7000,{3U,44U,0U}},
{MOVEQ_7000,{3U,45U,0U}},
{MOVEQ_7000,{3U,46U,0U}},
{MOVEQ_7000,{3U,47U,0U}},
{MOVEQ_7000,{3U,48U,0U}},
{MOVEQ_7000,{3U,49U,0U}},
{MOVEQ_7000,{3U,50U,0U}},
{MOVEQ_7000,{3U,51U,0U}},
{MOVEQ_7000,{3U,52U,0U}},
{MOVEQ_7000,{3U,53U,0U}},
{MOVEQ_7000,{3U,54U,0U}},
{MOVEQ_7000,{3U,55U,0U}},
{MOVEQ_7000,{3U,56U,0U}},
{MOVEQ_7000,{3U,57U,0U}},
{MOVEQ_7000,{3U,58U,0U}},
{MOVEQ_7000,{3U,59U,0U}},
{MOVEQ_7000,{3U,60U,0U}},
{MOVEQ_7000,{3U,61U,0U}},
{MOVEQ_7000,{3U,62U,0U}},
{MOVEQ_7000,{3U,63U,0U}},
{MOVEQ_7000,{3U,64U,0U}},
{MOVEQ_7000,{3U,65U,0U}},
{MOVEQ_7000,{3U,66U,0U}},
{MOVEQ_7000,{3U,67U,0U}},
{MOVEQ_7000,{3U,68U,0U}},
{MOVEQ_7000,{3U,69U,0U}},
{MOVEQ_7000,{3U,70U,0U}},
{MOVEQ_7000,{3U,71U,0U}},
{MOVEQ_7000,{3U,72U,0U}},
{MOVEQ_7000,{3U,73U,0U}},
{MOVEQ_7000,{3U,74U,0U}},
{MOVEQ_7000,{3U,75U,0U}},
{MOVEQ_7000,{3U,76U,0U}},
{MOVEQ_7000,{3U,77U,0U}},
{MOVEQ_7000,{3U,78U,0U}},
{MOVEQ_7000,{3U,79U,0U}},
{MOVEQ_7000,{3U,80U,0U}},
{MOVEQ_7000,{3U,81U,0U}},
{MOVEQ_7000,{3U,82U,0U}},
{MOVEQ_7000,{3U,83U,0U}},
{MOVEQ_7000,{3U,84U,0U}},
{MOVEQ_7000,{3U,85U,0U}},
{MOVEQ_7000,{3U,86U,0U}},
{MOVEQ_7000,{3U,87U,0U}},
{MOVEQ_7000,{3U,88U,0U}},
{MOVEQ_7000,{3U,89U,0U}},
{MOVEQ_7000,{3U,90U,0U}},
{MOVEQ_7000,{3U,91U,0U}},
{MOVEQ_7000,{3U,92U,0U}},
{MOVEQ_7000,{3U,93U,0U}},
{MOVEQ_7000,{3U,94U,0U}},
{MOVEQ_7000,{3U,95U,0U}},
{MOVEQ_7000,{3U,96U,0U}},
{MOVEQ_7000,{3U,97U,0U}},
{MOVEQ_7000,{3U,98U,0U}},
{MOVEQ_7000,{3U,99U,0U}},
{MOVEQ_7000,{3U,100U,0U}},
{MOVEQ_7000,{3U,101U,0U}},
{MOVEQ_7000,{3U,102U,0U}},
{MOVEQ_7000,{3U,103U,0U}},
{MOVEQ_7000,{3U,104U,0U}},
{MOVEQ_7000,{3U,105U,0U}},
{MOVEQ_7000,{3U,106U,0U}},
{MOVEQ_7000,{3U,107U,0U}},
{MOVEQ_7000,{3U,108U,0U}},
{MOVEQ_7000,{3U,109U,0U}},
{MOVEQ_7000,{3U,110U,0U}},
{MOVEQ_7000,{3U,111U,0U}},
{MOVEQ_7000,{3U,112U,0U}},
{MOVEQ_7000,{3U,113U,0U}},
{MOVEQ_7000,{3U,114U,0U}},
{MOVEQ_7000,{3U,115U,0U}},
{MOVEQ_7000,{3U,116U,0U}},
{MOVEQ_7000,{3U,117U,0U}},
{MOVEQ_7000,{3U,118U,0U}},
{MOVEQ_7000,{3U,119U,0U}},
{MOVEQ_7000,{3U,120U,0U}},
{MOVEQ_7000,{3U,121U,0U}},
{MOVEQ_7000,{3U,122U,0U}},
{MOVEQ_7000,{3U,123U,0U}},
{MOVEQ_7000,{3U,124U,0U}},
{MOVEQ_7000,{3U,125U,0U}},
{MOVEQ_7000,{3U,126U,0U}},
{MOVEQ_7000,{3U,127U,0U}},
{MOVEQ_7000,{3U,4294967168U,8U}},
{MOVEQ_7000,{3U,4294967169U,8U}},
{MOVEQ_7000,{3U,4294967170U,8U}},
{MOVEQ_7000,{3U,4294967171U,8U}},
{MOVEQ_7000,{3U,4294967172U,8U}},
{MOVEQ_7000,{3U,4294967173U,8U}},
{MOVEQ_7000,{3U,4294967174U,8U}},
{MOVEQ_7000,{3U,4294967175U,8U}},
{MOVEQ_7000,{3U,4294967176U,8U}},
{MOVEQ_7000,{3U,4294967177U,8U}},
{MOVEQ_7000,{3U,4294967178U,8U}},
{MOVEQ_7000,{3U,4294967179U,8U}},
{MOVEQ_7000,{3U,4294967180U,8U}},
{MOVEQ_7000,{3U,4294967181U,8U}},
{MOVEQ_7000,{3U,4294967182U,8U}},
{MOVEQ_7000,{3U,4294967183U,8U}},
{MOVEQ_7000,{3U,4294967184U,8U}},
{MOVEQ_7000,{3U,4294967185U,8U}},
{MOVEQ_7000,{3U,4294967186U,8U}},
{MOVEQ_7000,{3U,4294967187U,8U}},
{MOVEQ_7000,{3U,4294967188U,8U}},
{MOVEQ_7000,{3U,4294967189U,8U}},
{MOVEQ_7000,{3U,4294967190U,8U}},
{MOVEQ_7000,{3U,4294967191U,8U}},
{MOVEQ_7000,{3U,4294967192U,8U}},
{MOVEQ_7000,{3U,4294967193U,8U}},
{MOVEQ_7000,{3U,4294967194U,8U}},
{MOVEQ_7000,{3U,4294967195U,8U}},
{MOVEQ_7000,{3U,4294967196U,8U}},
{MOVEQ_7000,{3U,4294967197U,8U}},
{MOVEQ_7000,{3U,4294967198U,8U}},
{MOVEQ_7000,{3U,4294967199U,8U}},
{MOVEQ_7000,{3U,4294967200U,8U}},
{MOVEQ_7000,{3U,4294967201U,8U}},
{MOVEQ_7000,{3U,4294967202U,8U}},
{MOVEQ_7000,{3U,4294967203U,8U}},
{MOVEQ_7000,{3U,4294967204U,8U}},
{MOVEQ_7000,{3U,4294967205U,8U}},
{MOVEQ_7000,{3U,4294967206U,8U}},
{MOVEQ_7000,{3U,4294967207U,8U}},
{MOVEQ_7000,{3U,4294967208U,8U}},
{MOVEQ_7000,{3U,4294967209U,8U}},
{MOVEQ_7000,{3U,4294967210U,8U}},
{MOVEQ_7000,{3U,4294967211U,8U}},
{MOVEQ_7000,{3U,4294967212U,8U}},
{MOVEQ_7000,{3U,4294967213U,8U}},
{MOVEQ_7000,{3U,4294967214U,8U}},
{MOVEQ_7000,{3U,4294967215U,8U}},
{MOVEQ_7000,{3U,4294967216U,8U}},
{MOVEQ_7000,{3U,4294967217U,8U}},
{MOVEQ_7000,{3U,4294967218U,8U}},
{MOVEQ_7000,{3U,4294967219U,8U}},
{MOVEQ_7000,{3U,4294967220U,8U}},
{MOVEQ_7000,{3U,4294967221U,8U}},
{MOVEQ_7000,{3U,4294967222U,8U}},
{MOVEQ_7000,{3U,4294967223U,8U}},
{MOVEQ_7000,{3U,4294967224U,8U}},
{MOVEQ_7000,{3U,4294967225U,8U}},
{MOVEQ_7000,{3U,4294967226U,8U}},
{MOVEQ_7000,{3U,4294967227U,8U}},
{MOVEQ_7000,{3U,4294967228U,8U}},
{MOVEQ_7000,{3U,4294967229U,8U}},
{MOVEQ_7000,{3U,4294967230U,8U}},
{MOVEQ_7000,{3U,4294967231U,8U}},
{MOVEQ_7000,{3U,4294967232U,8U}},
{MOVEQ_7000,{3U,4294967233U,8U}},
{MOVEQ_7000,{3U,4294967234U,8U}},
{MOVEQ_7000,{3U,4294967235U,8U}},
{MOVEQ_7000,{3U,4294967236U,8U}},
{MOVEQ_7000,{3U,4294967237U,8U}},
{MOVEQ_7000,{3U,4294967238U,8U}},
{MOVEQ_7000,{3U,4294967239U,8U}},
{MOVEQ_7000,{3U,4294967240U,8U}},
{MOVEQ_7000,{3U,4294967241U,8U}},
{MOVEQ_7000,{3U,4294967242U,8U}},
{MOVEQ_7000,{3U,4294967243U,8U}},
{MOVEQ_7000,{3U,4294967244U,8U}},
{MOVEQ_7000,{3U,4294967245U,8U}},
{MOVEQ_7000,{3U,4294967246U,8U}},
{MOVEQ_7000,{3U,4294967247U,8U}},
{MOVEQ_7000,{3U,4294967248U,8U}},
{MOVEQ_7000,{3U,4294967249U,8U}},
{MOVEQ_7000,{3U,4294967250U,8U}},
{MOVEQ_7000,{3U,4294967251U,8U}},
{MOVEQ_7000,{3U,4294967252U,8U}},
{MOVEQ_7000,{3U,4294967253U,8U}},
{MOVEQ_7000,{3U,4294967254U,8U}},
{MOVEQ_7000,{3U,4294967255U,8U}},
{MOVEQ_7000,{3U,4294967256U,8U}},
{MOVEQ_7000,{3U,4294967257U,8U}},
{MOVEQ_7000,{3U,4294967258U,8U}},
{MOVEQ_7000,{3U,4294967259U,8U}},
{MOVEQ_7000,{3U,4294967260U,8U}},
{MOVEQ_7000,{3U,4294967261U,8U}},
{MOVEQ_7000,{3U,4294967262U,8U}},
{MOVEQ_7000,{3U,4294967263U,8U}},
{MOVEQ_7000,{3U,4294967264U,8U}},
{MOVEQ_7000,{3U,4294967265U,8U}},
{MOVEQ_7000,{3U,4294967266U,8U}},
{MOVEQ_7000,{3U,4294967267U,8U}},
{MOVEQ_7000,{3U,4294967268U,8U}},
{MOVEQ_7000,{3U,4294967269U,8U}},
{MOVEQ_7000,{3U,4294967270U,8U}},
{MOVEQ_7000,{3U,4294967271U,8U}},
{MOVEQ_7000,{3U,4294967272U,8U}},
{MOVEQ_7000,{3U,4294967273U,8U}},
{MOVEQ_7000,{3U,4294967274U,8U}},
{MOVEQ_7000,{3U,4294967275U,8U}},
{MOVEQ_7000,{3U,4294967276U,8U}},
{MOVEQ_7000,{3U,4294967277U,8U}},
{MOVEQ_7000,{3U,4294967278U,8U}},
{MOVEQ_7000,{3U,4294967279U,8U}},
{MOVEQ_7000,{3U,4294967280U,8U}},
{MOVEQ_7000,{3U,4294967281U,8U}},
{MOVEQ_7000,{3U,4294967282U,8U}},
{MOVEQ_7000,{3U,4294967283U,8U}},
{MOVEQ_7000,{3U,4294967284U,8U}},
{MOVEQ_7000,{3U,4294967285U,8U}},
{MOVEQ_7000,{3U,4294967286U,8U}},
{MOVEQ_7000,{3U,4294967287U,8U}},
{MOVEQ_7000,{3U,4294967288U,8U}},
{MOVEQ_7000,{3U,4294967289U,8U}},
{MOVEQ_7000,{3U,4294967290U,8U}},
{MOVEQ_7000,{3U,4294967291U,8U}},
{MOVEQ_7000,{3U,4294967292U,8U}},
{MOVEQ_7000,{3U,4294967293U,8U}},
{MOVEQ_7000,{3U,4294967294U,8U}},
{MOVEQ_7000,{3U,4294967295U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEQ_7000,{4U,0U,4U}},
{MOVEQ_7000,{4U,1U,0U}},
{MOVEQ_7000,{4U,2U,0U}},
{MOVEQ_7000,{4U,3U,0U}},
{MOVEQ_7000,{4U,4U,0U}},
{MOVEQ_7000,{4U,5U,0U}},
{MOVEQ_7000,{4U,6U,0U}},
{MOVEQ_7000,{4U,7U,0U}},
{MOVEQ_7000,{4U,8U,0U}},
{MOVEQ_7000,{4U,9U,0U}},
{MOVEQ_7000,{4U,10U,0U}},
{MOVEQ_7000,{4U,11U,0U}},
{MOVEQ_7000,{4U,12U,0U}},
{MOVEQ_7000,{4U,13U,0U}},
{MOVEQ_7000,{4U,14U,0U}},
{MOVEQ_7000,{4U,15U,0U}},
{MOVEQ_7000,{4U,16U,0U}},
{MOVEQ_7000,{4U,17U,0U}},
{MOVEQ_7000,{4U,18U,0U}},
{MOVEQ_7000,{4U,19U,0U}},
{MOVEQ_7000,{4U,20U,0U}},
{MOVEQ_7000,{4U,21U,0U}},
{MOVEQ_7000,{4U,22U,0U}},
{MOVEQ_7000,{4U,23U,0U}},
{MOVEQ_7000,{4U,24U,0U}},
{MOVEQ_7000,{4U,25U,0U}},
{MOVEQ_7000,{4U,26U,0U}},
{MOVEQ_7000,{4U,27U,0U}},
{MOVEQ_7000,{4U,28U,0U}},
{MOVEQ_7000,{4U,29U,0U}},
{MOVEQ_7000,{4U,30U,0U}},
{MOVEQ_7000,{4U,31U,0U}},
{MOVEQ_7000,{4U,32U,0U}},
{MOVEQ_7000,{4U,33U,0U}},
{MOVEQ_7000,{4U,34U,0U}},
{MOVEQ_7000,{4U,35U,0U}},
{MOVEQ_7000,{4U,36U,0U}},
{MOVEQ_7000,{4U,37U,0U}},
{MOVEQ_7000,{4U,38U,0U}},
{MOVEQ_7000,{4U,39U,0U}},
{MOVEQ_7000,{4U,40U,0U}},
{MOVEQ_7000,{4U,41U,0U}},
{MOVEQ_7000,{4U,42U,0U}},
{MOVEQ_7000,{4U,43U,0U}},
{MOVEQ_7000,{4U,44U,0U}},
{MOVEQ_7000,{4U,45U,0U}},
{MOVEQ_7000,{4U,46U,0U}},
{MOVEQ_7000,{4U,47U,0U}},
{MOVEQ_7000,{4U,48U,0U}},
{MOVEQ_7000,{4U,49U,0U}},
{MOVEQ_7000,{4U,50U,0U}},
{MOVEQ_7000,{4U,51U,0U}},
{MOVEQ_7000,{4U,52U,0U}},
{MOVEQ_7000,{4U,53U,0U}},
{MOVEQ_7000,{4U,54U,0U}},
{MOVEQ_7000,{4U,55U,0U}},
{MOVEQ_7000,{4U,56U,0U}},
{MOVEQ_7000,{4U,57U,0U}},
{MOVEQ_7000,{4U,58U,0U}},
{MOVEQ_7000,{4U,59U,0U}},
{MOVEQ_7000,{4U,60U,0U}},
{MOVEQ_7000,{4U,61U,0U}},
{MOVEQ_7000,{4U,62U,0U}},
{MOVEQ_7000,{4U,63U,0U}},
{MOVEQ_7000,{4U,64U,0U}},
{MOVEQ_7000,{4U,65U,0U}},
{MOVEQ_7000,{4U,66U,0U}},
{MOVEQ_7000,{4U,67U,0U}},
{MOVEQ_7000,{4U,68U,0U}},
{MOVEQ_7000,{4U,69U,0U}},
{MOVEQ_7000,{4U,70U,0U}},
{MOVEQ_7000,{4U,71U,0U}},
{MOVEQ_7000,{4U,72U,0U}},
{MOVEQ_7000,{4U,73U,0U}},
{MOVEQ_7000,{4U,74U,0U}},
{MOVEQ_7000,{4U,75U,0U}},
{MOVEQ_7000,{4U,76U,0U}},
{MOVEQ_7000,{4U,77U,0U}},
{MOVEQ_7000,{4U,78U,0U}},
{MOVEQ_7000,{4U,79U,0U}},
{MOVEQ_7000,{4U,80U,0U}},
{MOVEQ_7000,{4U,81U,0U}},
{MOVEQ_7000,{4U,82U,0U}},
{MOVEQ_7000,{4U,83U,0U}},
{MOVEQ_7000,{4U,84U,0U}},
{MOVEQ_7000,{4U,85U,0U}},
{MOVEQ_7000,{4U,86U,0U}},
{MOVEQ_7000,{4U,87U,0U}},
{MOVEQ_7000,{4U,88U,0U}},
{MOVEQ_7000,{4U,89U,0U}},
{MOVEQ_7000,{4U,90U,0U}},
{MOVEQ_7000,{4U,91U,0U}},
{MOVEQ_7000,{4U,92U,0U}},
{MOVEQ_7000,{4U,93U,0U}},
{MOVEQ_7000,{4U,94U,0U}},
{MOVEQ_7000,{4U,95U,0U}},
{MOVEQ_7000,{4U,96U,0U}},
{MOVEQ_7000,{4U,97U,0U}},
{MOVEQ_7000,{4U,98U,0U}},
{MOVEQ_7000,{4U,99U,0U}},
{MOVEQ_7000,{4U,100U,0U}},
{MOVEQ_7000,{4U,101U,0U}},
{MOVEQ_7000,{4U,102U,0U}},
{MOVEQ_7000,{4U,103U,0U}},
{MOVEQ_7000,{4U,104U,0U}},
{MOVEQ_7000,{4U,105U,0U}},
{MOVEQ_7000,{4U,106U,0U}},
{MOVEQ_7000,{4U,107U,0U}},
{MOVEQ_7000,{4U,108U,0U}},
{MOVEQ_7000,{4U,109U,0U}},
{MOVEQ_7000,{4U,110U,0U}},
{MOVEQ_7000,{4U,111U,0U}},
{MOVEQ_7000,{4U,112U,0U}},
{MOVEQ_7000,{4U,113U,0U}},
{MOVEQ_7000,{4U,114U,0U}},
{MOVEQ_7000,{4U,115U,0U}},
{MOVEQ_7000,{4U,116U,0U}},
{MOVEQ_7000,{4U,117U,0U}},
{MOVEQ_7000,{4U,118U,0U}},
{MOVEQ_7000,{4U,119U,0U}},
{MOVEQ_7000,{4U,120U,0U}},
{MOVEQ_7000,{4U,121U,0U}},
{MOVEQ_7000,{4U,122U,0U}},
{MOVEQ_7000,{4U,123U,0U}},
{MOVEQ_7000,{4U,124U,0U}},
{MOVEQ_7000,{4U,125U,0U}},
{MOVEQ_7000,{4U,126U,0U}},
{MOVEQ_7000,{4U,127U,0U}},
{MOVEQ_7000,{4U,4294967168U,8U}},
{MOVEQ_7000,{4U,4294967169U,8U}},
{MOVEQ_7000,{4U,4294967170U,8U}},
{MOVEQ_7000,{4U,4294967171U,8U}},
{MOVEQ_7000,{4U,4294967172U,8U}},
{MOVEQ_7000,{4U,4294967173U,8U}},
{MOVEQ_7000,{4U,4294967174U,8U}},
{MOVEQ_7000,{4U,4294967175U,8U}},
{MOVEQ_7000,{4U,4294967176U,8U}},
{MOVEQ_7000,{4U,4294967177U,8U}},
{MOVEQ_7000,{4U,4294967178U,8U}},
{MOVEQ_7000,{4U,4294967179U,8U}},
{MOVEQ_7000,{4U,4294967180U,8U}},
{MOVEQ_7000,{4U,4294967181U,8U}},
{MOVEQ_7000,{4U,4294967182U,8U}},
{MOVEQ_7000,{4U,4294967183U,8U}},
{MOVEQ_7000,{4U,4294967184U,8U}},
{MOVEQ_7000,{4U,4294967185U,8U}},
{MOVEQ_7000,{4U,4294967186U,8U}},
{MOVEQ_7000,{4U,4294967187U,8U}},
{MOVEQ_7000,{4U,4294967188U,8U}},
{MOVEQ_7000,{4U,4294967189U,8U}},
{MOVEQ_7000,{4U,4294967190U,8U}},
{MOVEQ_7000,{4U,4294967191U,8U}},
{MOVEQ_7000,{4U,4294967192U,8U}},
{MOVEQ_7000,{4U,4294967193U,8U}},
{MOVEQ_7000,{4U,4294967194U,8U}},
{MOVEQ_7000,{4U,4294967195U,8U}},
{MOVEQ_7000,{4U,4294967196U,8U}},
{MOVEQ_7000,{4U,4294967197U,8U}},
{MOVEQ_7000,{4U,4294967198U,8U}},
{MOVEQ_7000,{4U,4294967199U,8U}},
{MOVEQ_7000,{4U,4294967200U,8U}},
{MOVEQ_7000,{4U,4294967201U,8U}},
{MOVEQ_7000,{4U,4294967202U,8U}},
{MOVEQ_7000,{4U,4294967203U,8U}},
{MOVEQ_7000,{4U,4294967204U,8U}},
{MOVEQ_7000,{4U,4294967205U,8U}},
{MOVEQ_7000,{4U,4294967206U,8U}},
{MOVEQ_7000,{4U,4294967207U,8U}},
{MOVEQ_7000,{4U,4294967208U,8U}},
{MOVEQ_7000,{4U,4294967209U,8U}},
{MOVEQ_7000,{4U,4294967210U,8U}},
{MOVEQ_7000,{4U,4294967211U,8U}},
{MOVEQ_7000,{4U,4294967212U,8U}},
{MOVEQ_7000,{4U,4294967213U,8U}},
{MOVEQ_7000,{4U,4294967214U,8U}},
{MOVEQ_7000,{4U,4294967215U,8U}},
{MOVEQ_7000,{4U,4294967216U,8U}},
{MOVEQ_7000,{4U,4294967217U,8U}},
{MOVEQ_7000,{4U,4294967218U,8U}},
{MOVEQ_7000,{4U,4294967219U,8U}},
{MOVEQ_7000,{4U,4294967220U,8U}},
{MOVEQ_7000,{4U,4294967221U,8U}},
{MOVEQ_7000,{4U,4294967222U,8U}},
{MOVEQ_7000,{4U,4294967223U,8U}},
{MOVEQ_7000,{4U,4294967224U,8U}},
{MOVEQ_7000,{4U,4294967225U,8U}},
{MOVEQ_7000,{4U,4294967226U,8U}},
{MOVEQ_7000,{4U,4294967227U,8U}},
{MOVEQ_7000,{4U,4294967228U,8U}},
{MOVEQ_7000,{4U,4294967229U,8U}},
{MOVEQ_7000,{4U,4294967230U,8U}},
{MOVEQ_7000,{4U,4294967231U,8U}},
{MOVEQ_7000,{4U,4294967232U,8U}},
{MOVEQ_7000,{4U,4294967233U,8U}},
{MOVEQ_7000,{4U,4294967234U,8U}},
{MOVEQ_7000,{4U,4294967235U,8U}},
{MOVEQ_7000,{4U,4294967236U,8U}},
{MOVEQ_7000,{4U,4294967237U,8U}},
{MOVEQ_7000,{4U,4294967238U,8U}},
{MOVEQ_7000,{4U,4294967239U,8U}},
{MOVEQ_7000,{4U,4294967240U,8U}},
{MOVEQ_7000,{4U,4294967241U,8U}},
{MOVEQ_7000,{4U,4294967242U,8U}},
{MOVEQ_7000,{4U,4294967243U,8U}},
{MOVEQ_7000,{4U,4294967244U,8U}},
{MOVEQ_7000,{4U,4294967245U,8U}},
{MOVEQ_7000,{4U,4294967246U,8U}},
{MOVEQ_7000,{4U,4294967247U,8U}},
{MOVEQ_7000,{4U,4294967248U,8U}},
{MOVEQ_7000,{4U,4294967249U,8U}},
{MOVEQ_7000,{4U,4294967250U,8U}},
{MOVEQ_7000,{4U,4294967251U,8U}},
{MOVEQ_7000,{4U,4294967252U,8U}},
{MOVEQ_7000,{4U,4294967253U,8U}},
{MOVEQ_7000,{4U,4294967254U,8U}},
{MOVEQ_7000,{4U,4294967255U,8U}},
{MOVEQ_7000,{4U,4294967256U,8U}},
{MOVEQ_7000,{4U,4294967257U,8U}},
{MOVEQ_7000,{4U,4294967258U,8U}},
{MOVEQ_7000,{4U,4294967259U,8U}},
{MOVEQ_7000,{4U,4294967260U,8U}},
{MOVEQ_7000,{4U,4294967261U,8U}},
{MOVEQ_7000,{4U,4294967262U,8U}},
{MOVEQ_7000,{4U,4294967263U,8U}},
{MOVEQ_7000,{4U,4294967264U,8U}},
{MOVEQ_7000,{4U,4294967265U,8U}},
{MOVEQ_7000,{4U,4294967266U,8U}},
{MOVEQ_7000,{4U,4294967267U,8U}},
{MOVEQ_7000,{4U,4294967268U,8U}},
{MOVEQ_7000,{4U,4294967269U,8U}},
{MOVEQ_7000,{4U,4294967270U,8U}},
{MOVEQ_7000,{4U,4294967271U,8U}},
{MOVEQ_7000,{4U,4294967272U,8U}},
{MOVEQ_7000,{4U,4294967273U,8U}},
{MOVEQ_7000,{4U,4294967274U,8U}},
{MOVEQ_7000,{4U,4294967275U,8U}},
{MOVEQ_7000,{4U,4294967276U,8U}},
{MOVEQ_7000,{4U,4294967277U,8U}},
{MOVEQ_7000,{4U,4294967278U,8U}},
{MOVEQ_7000,{4U,4294967279U,8U}},
{MOVEQ_7000,{4U,4294967280U,8U}},
{MOVEQ_7000,{4U,4294967281U,8U}},
{MOVEQ_7000,{4U,4294967282U,8U}},
{MOVEQ_7000,{4U,4294967283U,8U}},
{MOVEQ_7000,{4U,4294967284U,8U}},
{MOVEQ_7000,{4U,4294967285U,8U}},
{MOVEQ_7000,{4U,4294967286U,8U}},
{MOVEQ_7000,{4U,4294967287U,8U}},
{MOVEQ_7000,{4U,4294967288U,8U}},
{MOVEQ_7000,{4U,4294967289U,8U}},
{MOVEQ_7000,{4U,4294967290U,8U}},
{MOVEQ_7000,{4U,4294967291U,8U}},
{MOVEQ_7000,{4U,4294967292U,8U}},
{MOVEQ_7000,{4U,4294967293U,8U}},
{MOVEQ_7000,{4U,4294967294U,8U}},
{MOVEQ_7000,{4U,4294967295U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEQ_7000,{5U,0U,4U}},
{MOVEQ_7000,{5U,1U,0U}},
{MOVEQ_7000,{5U,2U,0U}},
{MOVEQ_7000,{5U,3U,0U}},
{MOVEQ_7000,{5U,4U,0U}},
{MOVEQ_7000,{5U,5U,0U}},
{MOVEQ_7000,{5U,6U,0U}},
{MOVEQ_7000,{5U,7U,0U}},
{MOVEQ_7000,{5U,8U,0U}},
{MOVEQ_7000,{5U,9U,0U}},
{MOVEQ_7000,{5U,10U,0U}},
{MOVEQ_7000,{5U,11U,0U}},
{MOVEQ_7000,{5U,12U,0U}},
{MOVEQ_7000,{5U,13U,0U}},
{MOVEQ_7000,{5U,14U,0U}},
{MOVEQ_7000,{5U,15U,0U}},
{MOVEQ_7000,{5U,16U,0U}},
{MOVEQ_7000,{5U,17U,0U}},
{MOVEQ_7000,{5U,18U,0U}},
{MOVEQ_7000,{5U,19U,0U}},
{MOVEQ_7000,{5U,20U,0U}},
{MOVEQ_7000,{5U,21U,0U}},
{MOVEQ_7000,{5U,22U,0U}},
{MOVEQ_7000,{5U,23U,0U}},
{MOVEQ_7000,{5U,24U,0U}},
{MOVEQ_7000,{5U,25U,0U}},
{MOVEQ_7000,{5U,26U,0U}},
{MOVEQ_7000,{5U,27U,0U}},
{MOVEQ_7000,{5U,28U,0U}},
{MOVEQ_7000,{5U,29U,0U}},
{MOVEQ_7000,{5U,30U,0U}},
{MOVEQ_7000,{5U,31U,0U}},
{MOVEQ_7000,{5U,32U,0U}},
{MOVEQ_7000,{5U,33U,0U}},
{MOVEQ_7000,{5U,34U,0U}},
{MOVEQ_7000,{5U,35U,0U}},
{MOVEQ_7000,{5U,36U,0U}},
{MOVEQ_7000,{5U,37U,0U}},
{MOVEQ_7000,{5U,38U,0U}},
{MOVEQ_7000,{5U,39U,0U}},
{MOVEQ_7000,{5U,40U,0U}},
{MOVEQ_7000,{5U,41U,0U}},
{MOVEQ_7000,{5U,42U,0U}},
{MOVEQ_7000,{5U,43U,0U}},
{MOVEQ_7000,{5U,44U,0U}},
{MOVEQ_7000,{5U,45U,0U}},
{MOVEQ_7000,{5U,46U,0U}},
{MOVEQ_7000,{5U,47U,0U}},
{MOVEQ_7000,{5U,48U,0U}},
{MOVEQ_7000,{5U,49U,0U}},
{MOVEQ_7000,{5U,50U,0U}},
{MOVEQ_7000,{5U,51U,0U}},
{MOVEQ_7000,{5U,52U,0U}},
{MOVEQ_7000,{5U,53U,0U}},
{MOVEQ_7000,{5U,54U,0U}},
{MOVEQ_7000,{5U,55U,0U}},
{MOVEQ_7000,{5U,56U,0U}},
{MOVEQ_7000,{5U,57U,0U}},
{MOVEQ_7000,{5U,58U,0U}},
{MOVEQ_7000,{5U,59U,0U}},
{MOVEQ_7000,{5U,60U,0U}},
{MOVEQ_7000,{5U,61U,0U}},
{MOVEQ_7000,{5U,62U,0U}},
{MOVEQ_7000,{5U,63U,0U}},
{MOVEQ_7000,{5U,64U,0U}},
{MOVEQ_7000,{5U,65U,0U}},
{MOVEQ_7000,{5U,66U,0U}},
{MOVEQ_7000,{5U,67U,0U}},
{MOVEQ_7000,{5U,68U,0U}},
{MOVEQ_7000,{5U,69U,0U}},
{MOVEQ_7000,{5U,70U,0U}},
{MOVEQ_7000,{5U,71U,0U}},
{MOVEQ_7000,{5U,72U,0U}},
{MOVEQ_7000,{5U,73U,0U}},
{MOVEQ_7000,{5U,74U,0U}},
{MOVEQ_7000,{5U,75U,0U}},
{MOVEQ_7000,{5U,76U,0U}},
{MOVEQ_7000,{5U,77U,0U}},
{MOVEQ_7000,{5U,78U,0U}},
{MOVEQ_7000,{5U,79U,0U}},
{MOVEQ_7000,{5U,80U,0U}},
{MOVEQ_7000,{5U,81U,0U}},
{MOVEQ_7000,{5U,82U,0U}},
{MOVEQ_7000,{5U,83U,0U}},
{MOVEQ_7000,{5U,84U,0U}},
{MOVEQ_7000,{5U,85U,0U}},
{MOVEQ_7000,{5U,86U,0U}},
{MOVEQ_7000,{5U,87U,0U}},
{MOVEQ_7000,{5U,88U,0U}},
{MOVEQ_7000,{5U,89U,0U}},
{MOVEQ_7000,{5U,90U,0U}},
{MOVEQ_7000,{5U,91U,0U}},
{MOVEQ_7000,{5U,92U,0U}},
{MOVEQ_7000,{5U,93U,0U}},
{MOVEQ_7000,{5U,94U,0U}},
{MOVEQ_7000,{5U,95U,0U}},
{MOVEQ_7000,{5U,96U,0U}},
{MOVEQ_7000,{5U,97U,0U}},
{MOVEQ_7000,{5U,98U,0U}},
{MOVEQ_7000,{5U,99U,0U}},
{MOVEQ_7000,{5U,100U,0U}},
{MOVEQ_7000,{5U,101U,0U}},
{MOVEQ_7000,{5U,102U,0U}},
{MOVEQ_7000,{5U,103U,0U}},
{MOVEQ_7000,{5U,104U,0U}},
{MOVEQ_7000,{5U,105U,0U}},
{MOVEQ_7000,{5U,106U,0U}},
{MOVEQ_7000,{5U,107U,0U}},
{MOVEQ_7000,{5U,108U,0U}},
{MOVEQ_7000,{5U,109U,0U}},
{MOVEQ_7000,{5U,110U,0U}},
{MOVEQ_7000,{5U,111U,0U}},
{MOVEQ_7000,{5U,112U,0U}},
{MOVEQ_7000,{5U,113U,0U}},
{MOVEQ_7000,{5U,114U,0U}},
{MOVEQ_7000,{5U,115U,0U}},
{MOVEQ_7000,{5U,116U,0U}},
{MOVEQ_7000,{5U,117U,0U}},
{MOVEQ_7000,{5U,118U,0U}},
{MOVEQ_7000,{5U,119U,0U}},
{MOVEQ_7000,{5U,120U,0U}},
{MOVEQ_7000,{5U,121U,0U}},
{MOVEQ_7000,{5U,122U,0U}},
{MOVEQ_7000,{5U,123U,0U}},
{MOVEQ_7000,{5U,124U,0U}},
{MOVEQ_7000,{5U,125U,0U}},
{MOVEQ_7000,{5U,126U,0U}},
{MOVEQ_7000,{5U,127U,0U}},
{MOVEQ_7000,{5U,4294967168U,8U}},
{MOVEQ_7000,{5U,4294967169U,8U}},
{MOVEQ_7000,{5U,4294967170U,8U}},
{MOVEQ_7000,{5U,4294967171U,8U}},
{MOVEQ_7000,{5U,4294967172U,8U}},
{MOVEQ_7000,{5U,4294967173U,8U}},
{MOVEQ_7000,{5U,4294967174U,8U}},
{MOVEQ_7000,{5U,4294967175U,8U}},
{MOVEQ_7000,{5U,4294967176U,8U}},
{MOVEQ_7000,{5U,4294967177U,8U}},
{MOVEQ_7000,{5U,4294967178U,8U}},
{MOVEQ_7000,{5U,4294967179U,8U}},
{MOVEQ_7000,{5U,4294967180U,8U}},
{MOVEQ_7000,{5U,4294967181U,8U}},
{MOVEQ_7000,{5U,4294967182U,8U}},
{MOVEQ_7000,{5U,4294967183U,8U}},
{MOVEQ_7000,{5U,4294967184U,8U}},
{MOVEQ_7000,{5U,4294967185U,8U}},
{MOVEQ_7000,{5U,4294967186U,8U}},
{MOVEQ_7000,{5U,4294967187U,8U}},
{MOVEQ_7000,{5U,4294967188U,8U}},
{MOVEQ_7000,{5U,4294967189U,8U}},
{MOVEQ_7000,{5U,4294967190U,8U}},
{MOVEQ_7000,{5U,4294967191U,8U}},
{MOVEQ_7000,{5U,4294967192U,8U}},
{MOVEQ_7000,{5U,4294967193U,8U}},
{MOVEQ_7000,{5U,4294967194U,8U}},
{MOVEQ_7000,{5U,4294967195U,8U}},
{MOVEQ_7000,{5U,4294967196U,8U}},
{MOVEQ_7000,{5U,4294967197U,8U}},
{MOVEQ_7000,{5U,4294967198U,8U}},
{MOVEQ_7000,{5U,4294967199U,8U}},
{MOVEQ_7000,{5U,4294967200U,8U}},
{MOVEQ_7000,{5U,4294967201U,8U}},
{MOVEQ_7000,{5U,4294967202U,8U}},
{MOVEQ_7000,{5U,4294967203U,8U}},
{MOVEQ_7000,{5U,4294967204U,8U}},
{MOVEQ_7000,{5U,4294967205U,8U}},
{MOVEQ_7000,{5U,4294967206U,8U}},
{MOVEQ_7000,{5U,4294967207U,8U}},
{MOVEQ_7000,{5U,4294967208U,8U}},
{MOVEQ_7000,{5U,4294967209U,8U}},
{MOVEQ_7000,{5U,4294967210U,8U}},
{MOVEQ_7000,{5U,4294967211U,8U}},
{MOVEQ_7000,{5U,4294967212U,8U}},
{MOVEQ_7000,{5U,4294967213U,8U}},
{MOVEQ_7000,{5U,4294967214U,8U}},
{MOVEQ_7000,{5U,4294967215U,8U}},
{MOVEQ_7000,{5U,4294967216U,8U}},
{MOVEQ_7000,{5U,4294967217U,8U}},
{MOVEQ_7000,{5U,4294967218U,8U}},
{MOVEQ_7000,{5U,4294967219U,8U}},
{MOVEQ_7000,{5U,4294967220U,8U}},
{MOVEQ_7000,{5U,4294967221U,8U}},
{MOVEQ_7000,{5U,4294967222U,8U}},
{MOVEQ_7000,{5U,4294967223U,8U}},
{MOVEQ_7000,{5U,4294967224U,8U}},
{MOVEQ_7000,{5U,4294967225U,8U}},
{MOVEQ_7000,{5U,4294967226U,8U}},
{MOVEQ_7000,{5U,4294967227U,8U}},
{MOVEQ_7000,{5U,4294967228U,8U}},
{MOVEQ_7000,{5U,4294967229U,8U}},
{MOVEQ_7000,{5U,4294967230U,8U}},
{MOVEQ_7000,{5U,4294967231U,8U}},
{MOVEQ_7000,{5U,4294967232U,8U}},
{MOVEQ_7000,{5U,4294967233U,8U}},
{MOVEQ_7000,{5U,4294967234U,8U}},
{MOVEQ_7000,{5U,4294967235U,8U}},
{MOVEQ_7000,{5U,4294967236U,8U}},
{MOVEQ_7000,{5U,4294967237U,8U}},
{MOVEQ_7000,{5U,4294967238U,8U}},
{MOVEQ_7000,{5U,4294967239U,8U}},
{MOVEQ_7000,{5U,4294967240U,8U}},
{MOVEQ_7000,{5U,4294967241U,8U}},
{MOVEQ_7000,{5U,4294967242U,8U}},
{MOVEQ_7000,{5U,4294967243U,8U}},
{MOVEQ_7000,{5U,4294967244U,8U}},
{MOVEQ_7000,{5U,4294967245U,8U}},
{MOVEQ_7000,{5U,4294967246U,8U}},
{MOVEQ_7000,{5U,4294967247U,8U}},
{MOVEQ_7000,{5U,4294967248U,8U}},
{MOVEQ_7000,{5U,4294967249U,8U}},
{MOVEQ_7000,{5U,4294967250U,8U}},
{MOVEQ_7000,{5U,4294967251U,8U}},
{MOVEQ_7000,{5U,4294967252U,8U}},
{MOVEQ_7000,{5U,4294967253U,8U}},
{MOVEQ_7000,{5U,4294967254U,8U}},
{MOVEQ_7000,{5U,4294967255U,8U}},
{MOVEQ_7000,{5U,4294967256U,8U}},
{MOVEQ_7000,{5U,4294967257U,8U}},
{MOVEQ_7000,{5U,4294967258U,8U}},
{MOVEQ_7000,{5U,4294967259U,8U}},
{MOVEQ_7000,{5U,4294967260U,8U}},
{MOVEQ_7000,{5U,4294967261U,8U}},
{MOVEQ_7000,{5U,4294967262U,8U}},
{MOVEQ_7000,{5U,4294967263U,8U}},
{MOVEQ_7000,{5U,4294967264U,8U}},
{MOVEQ_7000,{5U,4294967265U,8U}},
{MOVEQ_7000,{5U,4294967266U,8U}},
{MOVEQ_7000,{5U,4294967267U,8U}},
{MOVEQ_7000,{5U,4294967268U,8U}},
{MOVEQ_7000,{5U,4294967269U,8U}},
{MOVEQ_7000,{5U,4294967270U,8U}},
{MOVEQ_7000,{5U,4294967271U,8U}},
{MOVEQ_7000,{5U,4294967272U,8U}},
{MOVEQ_7000,{5U,4294967273U,8U}},
{MOVEQ_7000,{5U,4294967274U,8U}},
{MOVEQ_7000,{5U,4294967275U,8U}},
{MOVEQ_7000,{5U,4294967276U,8U}},
{MOVEQ_7000,{5U,4294967277U,8U}},
{MOVEQ_7000,{5U,4294967278U,8U}},
{MOVEQ_7000,{5U,4294967279U,8U}},
{MOVEQ_7000,{5U,4294967280U,8U}},
{MOVEQ_7000,{5U,4294967281U,8U}},
{MOVEQ_7000,{5U,4294967282U,8U}},
{MOVEQ_7000,{5U,4294967283U,8U}},
{MOVEQ_7000,{5U,4294967284U,8U}},
{MOVEQ_7000,{5U,4294967285U,8U}},
{MOVEQ_7000,{5U,4294967286U,8U}},
{MOVEQ_7000,{5U,4294967287U,8U}},
{MOVEQ_7000,{5U,4294967288U,8U}},
{MOVEQ_7000,{5U,4294967289U,8U}},
{MOVEQ_7000,{5U,4294967290U,8U}},
{MOVEQ_7000,{5U,4294967291U,8U}},
{MOVEQ_7000,{5U,4294967292U,8U}},
{MOVEQ_7000,{5U,4294967293U,8U}},
{MOVEQ_7000,{5U,4294967294U,8U}},
{MOVEQ_7000,{5U,4294967295U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEQ_7000,{6U,0U,4U}},
{MOVEQ_7000,{6U,1U,0U}},
{MOVEQ_7000,{6U,2U,0U}},
{MOVEQ_7000,{6U,3U,0U}},
{MOVEQ_7000,{6U,4U,0U}},
{MOVEQ_7000,{6U,5U,0U}},
{MOVEQ_7000,{6U,6U,0U}},
{MOVEQ_7000,{6U,7U,0U}},
{MOVEQ_7000,{6U,8U,0U}},
{MOVEQ_7000,{6U,9U,0U}},
{MOVEQ_7000,{6U,10U,0U}},
{MOVEQ_7000,{6U,11U,0U}},
{MOVEQ_7000,{6U,12U,0U}},
{MOVEQ_7000,{6U,13U,0U}},
{MOVEQ_7000,{6U,14U,0U}},
{MOVEQ_7000,{6U,15U,0U}},
{MOVEQ_7000,{6U,16U,0U}},
{MOVEQ_7000,{6U,17U,0U}},
{MOVEQ_7000,{6U,18U,0U}},
{MOVEQ_7000,{6U,19U,0U}},
{MOVEQ_7000,{6U,20U,0U}},
{MOVEQ_7000,{6U,21U,0U}},
{MOVEQ_7000,{6U,22U,0U}},
{MOVEQ_7000,{6U,23U,0U}},
{MOVEQ_7000,{6U,24U,0U}},
{MOVEQ_7000,{6U,25U,0U}},
{MOVEQ_7000,{6U,26U,0U}},
{MOVEQ_7000,{6U,27U,0U}},
{MOVEQ_7000,{6U,28U,0U}},
{MOVEQ_7000,{6U,29U,0U}},
{MOVEQ_7000,{6U,30U,0U}},
{MOVEQ_7000,{6U,31U,0U}},
{MOVEQ_7000,{6U,32U,0U}},
{MOVEQ_7000,{6U,33U,0U}},
{MOVEQ_7000,{6U,34U,0U}},
{MOVEQ_7000,{6U,35U,0U}},
{MOVEQ_7000,{6U,36U,0U}},
{MOVEQ_7000,{6U,37U,0U}},
{MOVEQ_7000,{6U,38U,0U}},
{MOVEQ_7000,{6U,39U,0U}},
{MOVEQ_7000,{6U,40U,0U}},
{MOVEQ_7000,{6U,41U,0U}},
{MOVEQ_7000,{6U,42U,0U}},
{MOVEQ_7000,{6U,43U,0U}},
{MOVEQ_7000,{6U,44U,0U}},
{MOVEQ_7000,{6U,45U,0U}},
{MOVEQ_7000,{6U,46U,0U}},
{MOVEQ_7000,{6U,47U,0U}},
{MOVEQ_7000,{6U,48U,0U}},
{MOVEQ_7000,{6U,49U,0U}},
{MOVEQ_7000,{6U,50U,0U}},
{MOVEQ_7000,{6U,51U,0U}},
{MOVEQ_7000,{6U,52U,0U}},
{MOVEQ_7000,{6U,53U,0U}},
{MOVEQ_7000,{6U,54U,0U}},
{MOVEQ_7000,{6U,55U,0U}},
{MOVEQ_7000,{6U,56U,0U}},
{MOVEQ_7000,{6U,57U,0U}},
{MOVEQ_7000,{6U,58U,0U}},
{MOVEQ_7000,{6U,59U,0U}},
{MOVEQ_7000,{6U,60U,0U}},
{MOVEQ_7000,{6U,61U,0U}},
{MOVEQ_7000,{6U,62U,0U}},
{MOVEQ_7000,{6U,63U,0U}},
{MOVEQ_7000,{6U,64U,0U}},
{MOVEQ_7000,{6U,65U,0U}},
{MOVEQ_7000,{6U,66U,0U}},
{MOVEQ_7000,{6U,67U,0U}},
{MOVEQ_7000,{6U,68U,0U}},
{MOVEQ_7000,{6U,69U,0U}},
{MOVEQ_7000,{6U,70U,0U}},
{MOVEQ_7000,{6U,71U,0U}},
{MOVEQ_7000,{6U,72U,0U}},
{MOVEQ_7000,{6U,73U,0U}},
{MOVEQ_7000,{6U,74U,0U}},
{MOVEQ_7000,{6U,75U,0U}},
{MOVEQ_7000,{6U,76U,0U}},
{MOVEQ_7000,{6U,77U,0U}},
{MOVEQ_7000,{6U,78U,0U}},
{MOVEQ_7000,{6U,79U,0U}},
{MOVEQ_7000,{6U,80U,0U}},
{MOVEQ_7000,{6U,81U,0U}},
{MOVEQ_7000,{6U,82U,0U}},
{MOVEQ_7000,{6U,83U,0U}},
{MOVEQ_7000,{6U,84U,0U}},
{MOVEQ_7000,{6U,85U,0U}},
{MOVEQ_7000,{6U,86U,0U}},
{MOVEQ_7000,{6U,87U,0U}},
{MOVEQ_7000,{6U,88U,0U}},
{MOVEQ_7000,{6U,89U,0U}},
{MOVEQ_7000,{6U,90U,0U}},
{MOVEQ_7000,{6U,91U,0U}},
{MOVEQ_7000,{6U,92U,0U}},
{MOVEQ_7000,{6U,93U,0U}},
{MOVEQ_7000,{6U,94U,0U}},
{MOVEQ_7000,{6U,95U,0U}},
{MOVEQ_7000,{6U,96U,0U}},
{MOVEQ_7000,{6U,97U,0U}},
{MOVEQ_7000,{6U,98U,0U}},
{MOVEQ_7000,{6U,99U,0U}},
{MOVEQ_7000,{6U,100U,0U}},
{MOVEQ_7000,{6U,101U,0U}},
{MOVEQ_7000,{6U,102U,0U}},
{MOVEQ_7000,{6U,103U,0U}},
{MOVEQ_7000,{6U,104U,0U}},
{MOVEQ_7000,{6U,105U,0U}},
{MOVEQ_7000,{6U,106U,0U}},
{MOVEQ_7000,{6U,107U,0U}},
{MOVEQ_7000,{6U,108U,0U}},
{MOVEQ_7000,{6U,109U,0U}},
{MOVEQ_7000,{6U,110U,0U}},
{MOVEQ_7000,{6U,111U,0U}},
{MOVEQ_7000,{6U,112U,0U}},
{MOVEQ_7000,{6U,113U,0U}},
{MOVEQ_7000,{6U,114U,0U}},
{MOVEQ_7000,{6U,115U,0U}},
{MOVEQ_7000,{6U,116U,0U}},
{MOVEQ_7000,{6U,117U,0U}},
{MOVEQ_7000,{6U,118U,0U}},
{MOVEQ_7000,{6U,119U,0U}},
{MOVEQ_7000,{6U,120U,0U}},
{MOVEQ_7000,{6U,121U,0U}},
{MOVEQ_7000,{6U,122U,0U}},
{MOVEQ_7000,{6U,123U,0U}},
{MOVEQ_7000,{6U,124U,0U}},
{MOVEQ_7000,{6U,125U,0U}},
{MOVEQ_7000,{6U,126U,0U}},
{MOVEQ_7000,{6U,127U,0U}},
{MOVEQ_7000,{6U,4294967168U,8U}},
{MOVEQ_7000,{6U,4294967169U,8U}},
{MOVEQ_7000,{6U,4294967170U,8U}},
{MOVEQ_7000,{6U,4294967171U,8U}},
{MOVEQ_7000,{6U,4294967172U,8U}},
{MOVEQ_7000,{6U,4294967173U,8U}},
{MOVEQ_7000,{6U,4294967174U,8U}},
{MOVEQ_7000,{6U,4294967175U,8U}},
{MOVEQ_7000,{6U,4294967176U,8U}},
{MOVEQ_7000,{6U,4294967177U,8U}},
{MOVEQ_7000,{6U,4294967178U,8U}},
{MOVEQ_7000,{6U,4294967179U,8U}},
{MOVEQ_7000,{6U,4294967180U,8U}},
{MOVEQ_7000,{6U,4294967181U,8U}},
{MOVEQ_7000,{6U,4294967182U,8U}},
{MOVEQ_7000,{6U,4294967183U,8U}},
{MOVEQ_7000,{6U,4294967184U,8U}},
{MOVEQ_7000,{6U,4294967185U,8U}},
{MOVEQ_7000,{6U,4294967186U,8U}},
{MOVEQ_7000,{6U,4294967187U,8U}},
{MOVEQ_7000,{6U,4294967188U,8U}},
{MOVEQ_7000,{6U,4294967189U,8U}},
{MOVEQ_7000,{6U,4294967190U,8U}},
{MOVEQ_7000,{6U,4294967191U,8U}},
{MOVEQ_7000,{6U,4294967192U,8U}},
{MOVEQ_7000,{6U,4294967193U,8U}},
{MOVEQ_7000,{6U,4294967194U,8U}},
{MOVEQ_7000,{6U,4294967195U,8U}},
{MOVEQ_7000,{6U,4294967196U,8U}},
{MOVEQ_7000,{6U,4294967197U,8U}},
{MOVEQ_7000,{6U,4294967198U,8U}},
{MOVEQ_7000,{6U,4294967199U,8U}},
{MOVEQ_7000,{6U,4294967200U,8U}},
{MOVEQ_7000,{6U,4294967201U,8U}},
{MOVEQ_7000,{6U,4294967202U,8U}},
{MOVEQ_7000,{6U,4294967203U,8U}},
{MOVEQ_7000,{6U,4294967204U,8U}},
{MOVEQ_7000,{6U,4294967205U,8U}},
{MOVEQ_7000,{6U,4294967206U,8U}},
{MOVEQ_7000,{6U,4294967207U,8U}},
{MOVEQ_7000,{6U,4294967208U,8U}},
{MOVEQ_7000,{6U,4294967209U,8U}},
{MOVEQ_7000,{6U,4294967210U,8U}},
{MOVEQ_7000,{6U,4294967211U,8U}},
{MOVEQ_7000,{6U,4294967212U,8U}},
{MOVEQ_7000,{6U,4294967213U,8U}},
{MOVEQ_7000,{6U,4294967214U,8U}},
{MOVEQ_7000,{6U,4294967215U,8U}},
{MOVEQ_7000,{6U,4294967216U,8U}},
{MOVEQ_7000,{6U,4294967217U,8U}},
{MOVEQ_7000,{6U,4294967218U,8U}},
{MOVEQ_7000,{6U,4294967219U,8U}},
{MOVEQ_7000,{6U,4294967220U,8U}},
{MOVEQ_7000,{6U,4294967221U,8U}},
{MOVEQ_7000,{6U,4294967222U,8U}},
{MOVEQ_7000,{6U,4294967223U,8U}},
{MOVEQ_7000,{6U,4294967224U,8U}},
{MOVEQ_7000,{6U,4294967225U,8U}},
{MOVEQ_7000,{6U,4294967226U,8U}},
{MOVEQ_7000,{6U,4294967227U,8U}},
{MOVEQ_7000,{6U,4294967228U,8U}},
{MOVEQ_7000,{6U,4294967229U,8U}},
{MOVEQ_7000,{6U,4294967230U,8U}},
{MOVEQ_7000,{6U,4294967231U,8U}},
{MOVEQ_7000,{6U,4294967232U,8U}},
{MOVEQ_7000,{6U,4294967233U,8U}},
{MOVEQ_7000,{6U,4294967234U,8U}},
{MOVEQ_7000,{6U,4294967235U,8U}},
{MOVEQ_7000,{6U,4294967236U,8U}},
{MOVEQ_7000,{6U,4294967237U,8U}},
{MOVEQ_7000,{6U,4294967238U,8U}},
{MOVEQ_7000,{6U,4294967239U,8U}},
{MOVEQ_7000,{6U,4294967240U,8U}},
{MOVEQ_7000,{6U,4294967241U,8U}},
{MOVEQ_7000,{6U,4294967242U,8U}},
{MOVEQ_7000,{6U,4294967243U,8U}},
{MOVEQ_7000,{6U,4294967244U,8U}},
{MOVEQ_7000,{6U,4294967245U,8U}},
{MOVEQ_7000,{6U,4294967246U,8U}},
{MOVEQ_7000,{6U,4294967247U,8U}},
{MOVEQ_7000,{6U,4294967248U,8U}},
{MOVEQ_7000,{6U,4294967249U,8U}},
{MOVEQ_7000,{6U,4294967250U,8U}},
{MOVEQ_7000,{6U,4294967251U,8U}},
{MOVEQ_7000,{6U,4294967252U,8U}},
{MOVEQ_7000,{6U,4294967253U,8U}},
{MOVEQ_7000,{6U,4294967254U,8U}},
{MOVEQ_7000,{6U,4294967255U,8U}},
{MOVEQ_7000,{6U,4294967256U,8U}},
{MOVEQ_7000,{6U,4294967257U,8U}},
{MOVEQ_7000,{6U,4294967258U,8U}},
{MOVEQ_7000,{6U,4294967259U,8U}},
{MOVEQ_7000,{6U,4294967260U,8U}},
{MOVEQ_7000,{6U,4294967261U,8U}},
{MOVEQ_7000,{6U,4294967262U,8U}},
{MOVEQ_7000,{6U,4294967263U,8U}},
{MOVEQ_7000,{6U,4294967264U,8U}},
{MOVEQ_7000,{6U,4294967265U,8U}},
{MOVEQ_7000,{6U,4294967266U,8U}},
{MOVEQ_7000,{6U,4294967267U,8U}},
{MOVEQ_7000,{6U,4294967268U,8U}},
{MOVEQ_7000,{6U,4294967269U,8U}},
{MOVEQ_7000,{6U,4294967270U,8U}},
{MOVEQ_7000,{6U,4294967271U,8U}},
{MOVEQ_7000,{6U,4294967272U,8U}},
{MOVEQ_7000,{6U,4294967273U,8U}},
{MOVEQ_7000,{6U,4294967274U,8U}},
{MOVEQ_7000,{6U,4294967275U,8U}},
{MOVEQ_7000,{6U,4294967276U,8U}},
{MOVEQ_7000,{6U,4294967277U,8U}},
{MOVEQ_7000,{6U,4294967278U,8U}},
{MOVEQ_7000,{6U,4294967279U,8U}},
{MOVEQ_7000,{6U,4294967280U,8U}},
{MOVEQ_7000,{6U,4294967281U,8U}},
{MOVEQ_7000,{6U,4294967282U,8U}},
{MOVEQ_7000,{6U,4294967283U,8U}},
{MOVEQ_7000,{6U,4294967284U,8U}},
{MOVEQ_7000,{6U,4294967285U,8U}},
{MOVEQ_7000,{6U,4294967286U,8U}},
{MOVEQ_7000,{6U,4294967287U,8U}},
{MOVEQ_7000,{6U,4294967288U,8U}},
{MOVEQ_7000,{6U,4294967289U,8U}},
{MOVEQ_7000,{6U,4294967290U,8U}},
{MOVEQ_7000,{6U,4294967291U,8U}},
{MOVEQ_7000,{6U,4294967292U,8U}},
{MOVEQ_7000,{6U,4294967293U,8U}},
{MOVEQ_7000,{6U,4294967294U,8U}},
{MOVEQ_7000,{6U,4294967295U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MOVEQ_7000,{7U,0U,4U}},
{MOVEQ_7000,{7U,1U,0U}},
{MOVEQ_7000,{7U,2U,0U}},
{MOVEQ_7000,{7U,3U,0U}},
{MOVEQ_7000,{7U,4U,0U}},
{MOVEQ_7000,{7U,5U,0U}},
{MOVEQ_7000,{7U,6U,0U}},
{MOVEQ_7000,{7U,7U,0U}},
{MOVEQ_7000,{7U,8U,0U}},
{MOVEQ_7000,{7U,9U,0U}},
{MOVEQ_7000,{7U,10U,0U}},
{MOVEQ_7000,{7U,11U,0U}},
{MOVEQ_7000,{7U,12U,0U}},
{MOVEQ_7000,{7U,13U,0U}},
{MOVEQ_7000,{7U,14U,0U}},
{MOVEQ_7000,{7U,15U,0U}},
{MOVEQ_7000,{7U,16U,0U}},
{MOVEQ_7000,{7U,17U,0U}},
{MOVEQ_7000,{7U,18U,0U}},
{MOVEQ_7000,{7U,19U,0U}},
{MOVEQ_7000,{7U,20U,0U}},
{MOVEQ_7000,{7U,21U,0U}},
{MOVEQ_7000,{7U,22U,0U}},
{MOVEQ_7000,{7U,23U,0U}},
{MOVEQ_7000,{7U,24U,0U}},
{MOVEQ_7000,{7U,25U,0U}},
{MOVEQ_7000,{7U,26U,0U}},
{MOVEQ_7000,{7U,27U,0U}},
{MOVEQ_7000,{7U,28U,0U}},
{MOVEQ_7000,{7U,29U,0U}},
{MOVEQ_7000,{7U,30U,0U}},
{MOVEQ_7000,{7U,31U,0U}},
{MOVEQ_7000,{7U,32U,0U}},
{MOVEQ_7000,{7U,33U,0U}},
{MOVEQ_7000,{7U,34U,0U}},
{MOVEQ_7000,{7U,35U,0U}},
{MOVEQ_7000,{7U,36U,0U}},
{MOVEQ_7000,{7U,37U,0U}},
{MOVEQ_7000,{7U,38U,0U}},
{MOVEQ_7000,{7U,39U,0U}},
{MOVEQ_7000,{7U,40U,0U}},
{MOVEQ_7000,{7U,41U,0U}},
{MOVEQ_7000,{7U,42U,0U}},
{MOVEQ_7000,{7U,43U,0U}},
{MOVEQ_7000,{7U,44U,0U}},
{MOVEQ_7000,{7U,45U,0U}},
{MOVEQ_7000,{7U,46U,0U}},
{MOVEQ_7000,{7U,47U,0U}},
{MOVEQ_7000,{7U,48U,0U}},
{MOVEQ_7000,{7U,49U,0U}},
{MOVEQ_7000,{7U,50U,0U}},
{MOVEQ_7000,{7U,51U,0U}},
{MOVEQ_7000,{7U,52U,0U}},
{MOVEQ_7000,{7U,53U,0U}},
{MOVEQ_7000,{7U,54U,0U}},
{MOVEQ_7000,{7U,55U,0U}},
{MOVEQ_7000,{7U,56U,0U}},
{MOVEQ_7000,{7U,57U,0U}},
{MOVEQ_7000,{7U,58U,0U}},
{MOVEQ_7000,{7U,59U,0U}},
{MOVEQ_7000,{7U,60U,0U}},
{MOVEQ_7000,{7U,61U,0U}},
{MOVEQ_7000,{7U,62U,0U}},
{MOVEQ_7000,{7U,63U,0U}},
{MOVEQ_7000,{7U,64U,0U}},
{MOVEQ_7000,{7U,65U,0U}},
{MOVEQ_7000,{7U,66U,0U}},
{MOVEQ_7000,{7U,67U,0U}},
{MOVEQ_7000,{7U,68U,0U}},
{MOVEQ_7000,{7U,69U,0U}},
{MOVEQ_7000,{7U,70U,0U}},
{MOVEQ_7000,{7U,71U,0U}},
{MOVEQ_7000,{7U,72U,0U}},
{MOVEQ_7000,{7U,73U,0U}},
{MOVEQ_7000,{7U,74U,0U}},
{MOVEQ_7000,{7U,75U,0U}},
{MOVEQ_7000,{7U,76U,0U}},
{MOVEQ_7000,{7U,77U,0U}},
{MOVEQ_7000,{7U,78U,0U}},
{MOVEQ_7000,{7U,79U,0U}},
{MOVEQ_7000,{7U,80U,0U}},
{MOVEQ_7000,{7U,81U,0U}},
{MOVEQ_7000,{7U,82U,0U}},
{MOVEQ_7000,{7U,83U,0U}},
{MOVEQ_7000,{7U,84U,0U}},
{MOVEQ_7000,{7U,85U,0U}},
{MOVEQ_7000,{7U,86U,0U}},
{MOVEQ_7000,{7U,87U,0U}},
{MOVEQ_7000,{7U,88U,0U}},
{MOVEQ_7000,{7U,89U,0U}},
{MOVEQ_7000,{7U,90U,0U}},
{MOVEQ_7000,{7U,91U,0U}},
{MOVEQ_7000,{7U,92U,0U}},
{MOVEQ_7000,{7U,93U,0U}},
{MOVEQ_7000,{7U,94U,0U}},
{MOVEQ_7000,{7U,95U,0U}},
{MOVEQ_7000,{7U,96U,0U}},
{MOVEQ_7000,{7U,97U,0U}},
{MOVEQ_7000,{7U,98U,0U}},
{MOVEQ_7000,{7U,99U,0U}},
{MOVEQ_7000,{7U,100U,0U}},
{MOVEQ_7000,{7U,101U,0U}},
{MOVEQ_7000,{7U,102U,0U}},
{MOVEQ_7000,{7U,103U,0U}},
{MOVEQ_7000,{7U,104U,0U}},
{MOVEQ_7000,{7U,105U,0U}},
{MOVEQ_7000,{7U,106U,0U}},
{MOVEQ_7000,{7U,107U,0U}},
{MOVEQ_7000,{7U,108U,0U}},
{MOVEQ_7000,{7U,109U,0U}},
{MOVEQ_7000,{7U,110U,0U}},
{MOVEQ_7000,{7U,111U,0U}},
{MOVEQ_7000,{7U,112U,0U}},
{MOVEQ_7000,{7U,113U,0U}},
{MOVEQ_7000,{7U,114U,0U}},
{MOVEQ_7000,{7U,115U,0U}},
{MOVEQ_7000,{7U,116U,0U}},
{MOVEQ_7000,{7U,117U,0U}},
{MOVEQ_7000,{7U,118U,0U}},
{MOVEQ_7000,{7U,119U,0U}},
{MOVEQ_7000,{7U,120U,0U}},
{MOVEQ_7000,{7U,121U,0U}},
{MOVEQ_7000,{7U,122U,0U}},
{MOVEQ_7000,{7U,123U,0U}},
{MOVEQ_7000,{7U,124U,0U}},
{MOVEQ_7000,{7U,125U,0U}},
{MOVEQ_7000,{7U,126U,0U}},
{MOVEQ_7000,{7U,127U,0U}},
{MOVEQ_7000,{7U,4294967168U,8U}},
{MOVEQ_7000,{7U,4294967169U,8U}},
{MOVEQ_7000,{7U,4294967170U,8U}},
{MOVEQ_7000,{7U,4294967171U,8U}},
{MOVEQ_7000,{7U,4294967172U,8U}},
{MOVEQ_7000,{7U,4294967173U,8U}},
{MOVEQ_7000,{7U,4294967174U,8U}},
{MOVEQ_7000,{7U,4294967175U,8U}},
{MOVEQ_7000,{7U,4294967176U,8U}},
{MOVEQ_7000,{7U,4294967177U,8U}},
{MOVEQ_7000,{7U,4294967178U,8U}},
{MOVEQ_7000,{7U,4294967179U,8U}},
{MOVEQ_7000,{7U,4294967180U,8U}},
{MOVEQ_7000,{7U,4294967181U,8U}},
{MOVEQ_7000,{7U,4294967182U,8U}},
{MOVEQ_7000,{7U,4294967183U,8U}},
{MOVEQ_7000,{7U,4294967184U,8U}},
{MOVEQ_7000,{7U,4294967185U,8U}},
{MOVEQ_7000,{7U,4294967186U,8U}},
{MOVEQ_7000,{7U,4294967187U,8U}},
{MOVEQ_7000,{7U,4294967188U,8U}},
{MOVEQ_7000,{7U,4294967189U,8U}},
{MOVEQ_7000,{7U,4294967190U,8U}},
{MOVEQ_7000,{7U,4294967191U,8U}},
{MOVEQ_7000,{7U,4294967192U,8U}},
{MOVEQ_7000,{7U,4294967193U,8U}},
{MOVEQ_7000,{7U,4294967194U,8U}},
{MOVEQ_7000,{7U,4294967195U,8U}},
{MOVEQ_7000,{7U,4294967196U,8U}},
{MOVEQ_7000,{7U,4294967197U,8U}},
{MOVEQ_7000,{7U,4294967198U,8U}},
{MOVEQ_7000,{7U,4294967199U,8U}},
{MOVEQ_7000,{7U,4294967200U,8U}},
{MOVEQ_7000,{7U,4294967201U,8U}},
{MOVEQ_7000,{7U,4294967202U,8U}},
{MOVEQ_7000,{7U,4294967203U,8U}},
{MOVEQ_7000,{7U,4294967204U,8U}},
{MOVEQ_7000,{7U,4294967205U,8U}},
{MOVEQ_7000,{7U,4294967206U,8U}},
{MOVEQ_7000,{7U,4294967207U,8U}},
{MOVEQ_7000,{7U,4294967208U,8U}},
{MOVEQ_7000,{7U,4294967209U,8U}},
{MOVEQ_7000,{7U,4294967210U,8U}},
{MOVEQ_7000,{7U,4294967211U,8U}},
{MOVEQ_7000,{7U,4294967212U,8U}},
{MOVEQ_7000,{7U,4294967213U,8U}},
{MOVEQ_7000,{7U,4294967214U,8U}},
{MOVEQ_7000,{7U,4294967215U,8U}},
{MOVEQ_7000,{7U,4294967216U,8U}},
{MOVEQ_7000,{7U,4294967217U,8U}},
{MOVEQ_7000,{7U,4294967218U,8U}},
{MOVEQ_7000,{7U,4294967219U,8U}},
{MOVEQ_7000,{7U,4294967220U,8U}},
{MOVEQ_7000,{7U,4294967221U,8U}},
{MOVEQ_7000,{7U,4294967222U,8U}},
{MOVEQ_7000,{7U,4294967223U,8U}},
{MOVEQ_7000,{7U,4294967224U,8U}},
{MOVEQ_7000,{7U,4294967225U,8U}},
{MOVEQ_7000,{7U,4294967226U,8U}},
{MOVEQ_7000,{7U,4294967227U,8U}},
{MOVEQ_7000,{7U,4294967228U,8U}},
{MOVEQ_7000,{7U,4294967229U,8U}},
{MOVEQ_7000,{7U,4294967230U,8U}},
{MOVEQ_7000,{7U,4294967231U,8U}},
{MOVEQ_7000,{7U,4294967232U,8U}},
{MOVEQ_7000,{7U,4294967233U,8U}},
{MOVEQ_7000,{7U,4294967234U,8U}},
{MOVEQ_7000,{7U,4294967235U,8U}},
{MOVEQ_7000,{7U,4294967236U,8U}},
{MOVEQ_7000,{7U,4294967237U,8U}},
{MOVEQ_7000,{7U,4294967238U,8U}},
{MOVEQ_7000,{7U,4294967239U,8U}},
{MOVEQ_7000,{7U,4294967240U,8U}},
{MOVEQ_7000,{7U,4294967241U,8U}},
{MOVEQ_7000,{7U,4294967242U,8U}},
{MOVEQ_7000,{7U,4294967243U,8U}},
{MOVEQ_7000,{7U,4294967244U,8U}},
{MOVEQ_7000,{7U,4294967245U,8U}},
{MOVEQ_7000,{7U,4294967246U,8U}},
{MOVEQ_7000,{7U,4294967247U,8U}},
{MOVEQ_7000,{7U,4294967248U,8U}},
{MOVEQ_7000,{7U,4294967249U,8U}},
{MOVEQ_7000,{7U,4294967250U,8U}},
{MOVEQ_7000,{7U,4294967251U,8U}},
{MOVEQ_7000,{7U,4294967252U,8U}},
{MOVEQ_7000,{7U,4294967253U,8U}},
{MOVEQ_7000,{7U,4294967254U,8U}},
{MOVEQ_7000,{7U,4294967255U,8U}},
{MOVEQ_7000,{7U,4294967256U,8U}},
{MOVEQ_7000,{7U,4294967257U,8U}},
{MOVEQ_7000,{7U,4294967258U,8U}},
{MOVEQ_7000,{7U,4294967259U,8U}},
{MOVEQ_7000,{7U,4294967260U,8U}},
{MOVEQ_7000,{7U,4294967261U,8U}},
{MOVEQ_7000,{7U,4294967262U,8U}},
{MOVEQ_7000,{7U,4294967263U,8U}},
{MOVEQ_7000,{7U,4294967264U,8U}},
{MOVEQ_7000,{7U,4294967265U,8U}},
{MOVEQ_7000,{7U,4294967266U,8U}},
{MOVEQ_7000,{7U,4294967267U,8U}},
{MOVEQ_7000,{7U,4294967268U,8U}},
{MOVEQ_7000,{7U,4294967269U,8U}},
{MOVEQ_7000,{7U,4294967270U,8U}},
{MOVEQ_7000,{7U,4294967271U,8U}},
{MOVEQ_7000,{7U,4294967272U,8U}},
{MOVEQ_7000,{7U,4294967273U,8U}},
{MOVEQ_7000,{7U,4294967274U,8U}},
{MOVEQ_7000,{7U,4294967275U,8U}},
{MOVEQ_7000,{7U,4294967276U,8U}},
{MOVEQ_7000,{7U,4294967277U,8U}},
{MOVEQ_7000,{7U,4294967278U,8U}},
{MOVEQ_7000,{7U,4294967279U,8U}},
{MOVEQ_7000,{7U,4294967280U,8U}},
{MOVEQ_7000,{7U,4294967281U,8U}},
{MOVEQ_7000,{7U,4294967282U,8U}},
{MOVEQ_7000,{7U,4294967283U,8U}},
{MOVEQ_7000,{7U,4294967284U,8U}},
{MOVEQ_7000,{7U,4294967285U,8U}},
{MOVEQ_7000,{7U,4294967286U,8U}},
{MOVEQ_7000,{7U,4294967287U,8U}},
{MOVEQ_7000,{7U,4294967288U,8U}},
{MOVEQ_7000,{7U,4294967289U,8U}},
{MOVEQ_7000,{7U,4294967290U,8U}},
{MOVEQ_7000,{7U,4294967291U,8U}},
{MOVEQ_7000,{7U,4294967292U,8U}},
{MOVEQ_7000,{7U,4294967293U,8U}},
{MOVEQ_7000,{7U,4294967294U,8U}},
{MOVEQ_7000,{7U,4294967295U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8000,{0U,0U,0U}},
{OR_8000,{1U,0U,0U}},
{OR_8000,{2U,0U,0U}},
{OR_8000,{3U,0U,0U}},
{OR_8000,{4U,0U,0U}},
{OR_8000,{5U,0U,0U}},
{OR_8000,{6U,0U,0U}},
{OR_8000,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8010,{0U,0U,0U}},
{OR_8010,{1U,0U,0U}},
{OR_8010,{2U,0U,0U}},
{OR_8010,{3U,0U,0U}},
{OR_8010,{4U,0U,0U}},
{OR_8010,{5U,0U,0U}},
{OR_8010,{6U,0U,0U}},
{OR_8010,{7U,0U,0U}},
{OR_8018,{0U,0U,0U}},
{OR_8018,{1U,0U,0U}},
{OR_8018,{2U,0U,0U}},
{OR_8018,{3U,0U,0U}},
{OR_8018,{4U,0U,0U}},
{OR_8018,{5U,0U,0U}},
{OR_8018,{6U,0U,0U}},
{OR_8018,{7U,0U,0U}},
{OR_8020,{0U,0U,0U}},
{OR_8020,{1U,0U,0U}},
{OR_8020,{2U,0U,0U}},
{OR_8020,{3U,0U,0U}},
{OR_8020,{4U,0U,0U}},
{OR_8020,{5U,0U,0U}},
{OR_8020,{6U,0U,0U}},
{OR_8020,{7U,0U,0U}},
{OR_8028,{0U,0U,0U}},
{OR_8028,{1U,0U,0U}},
{OR_8028,{2U,0U,0U}},
{OR_8028,{3U,0U,0U}},
{OR_8028,{4U,0U,0U}},
{OR_8028,{5U,0U,0U}},
{OR_8028,{6U,0U,0U}},
{OR_8028,{7U,0U,0U}},
{OR_8030,{0U,0U,0U}},
{OR_8030,{1U,0U,0U}},
{OR_8030,{2U,0U,0U}},
{OR_8030,{3U,0U,0U}},
{OR_8030,{4U,0U,0U}},
{OR_8030,{5U,0U,0U}},
{OR_8030,{6U,0U,0U}},
{OR_8030,{7U,0U,0U}},
{OR_8038,{0U,0U,0U}},
{OR_8039,{0U,0U,0U}},
{OR_803A,{0U,0U,0U}},
{OR_803B,{0U,0U,0U}},
{OR_803C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8040,{0U,0U,0U}},
{OR_8040,{1U,0U,0U}},
{OR_8040,{2U,0U,0U}},
{OR_8040,{3U,0U,0U}},
{OR_8040,{4U,0U,0U}},
{OR_8040,{5U,0U,0U}},
{OR_8040,{6U,0U,0U}},
{OR_8040,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8050,{0U,0U,0U}},
{OR_8050,{1U,0U,0U}},
{OR_8050,{2U,0U,0U}},
{OR_8050,{3U,0U,0U}},
{OR_8050,{4U,0U,0U}},
{OR_8050,{5U,0U,0U}},
{OR_8050,{6U,0U,0U}},
{OR_8050,{7U,0U,0U}},
{OR_8058,{0U,0U,0U}},
{OR_8058,{1U,0U,0U}},
{OR_8058,{2U,0U,0U}},
{OR_8058,{3U,0U,0U}},
{OR_8058,{4U,0U,0U}},
{OR_8058,{5U,0U,0U}},
{OR_8058,{6U,0U,0U}},
{OR_8058,{7U,0U,0U}},
{OR_8060,{0U,0U,0U}},
{OR_8060,{1U,0U,0U}},
{OR_8060,{2U,0U,0U}},
{OR_8060,{3U,0U,0U}},
{OR_8060,{4U,0U,0U}},
{OR_8060,{5U,0U,0U}},
{OR_8060,{6U,0U,0U}},
{OR_8060,{7U,0U,0U}},
{OR_8068,{0U,0U,0U}},
{OR_8068,{1U,0U,0U}},
{OR_8068,{2U,0U,0U}},
{OR_8068,{3U,0U,0U}},
{OR_8068,{4U,0U,0U}},
{OR_8068,{5U,0U,0U}},
{OR_8068,{6U,0U,0U}},
{OR_8068,{7U,0U,0U}},
{OR_8070,{0U,0U,0U}},
{OR_8070,{1U,0U,0U}},
{OR_8070,{2U,0U,0U}},
{OR_8070,{3U,0U,0U}},
{OR_8070,{4U,0U,0U}},
{OR_8070,{5U,0U,0U}},
{OR_8070,{6U,0U,0U}},
{OR_8070,{7U,0U,0U}},
{OR_8078,{0U,0U,0U}},
{OR_8079,{0U,0U,0U}},
{OR_807A,{0U,0U,0U}},
{OR_807B,{0U,0U,0U}},
{OR_807C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8080,{0U,0U,0U}},
{OR_8080,{1U,0U,0U}},
{OR_8080,{2U,0U,0U}},
{OR_8080,{3U,0U,0U}},
{OR_8080,{4U,0U,0U}},
{OR_8080,{5U,0U,0U}},
{OR_8080,{6U,0U,0U}},
{OR_8080,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8090,{0U,0U,0U}},
{OR_8090,{1U,0U,0U}},
{OR_8090,{2U,0U,0U}},
{OR_8090,{3U,0U,0U}},
{OR_8090,{4U,0U,0U}},
{OR_8090,{5U,0U,0U}},
{OR_8090,{6U,0U,0U}},
{OR_8090,{7U,0U,0U}},
{OR_8098,{0U,0U,0U}},
{OR_8098,{1U,0U,0U}},
{OR_8098,{2U,0U,0U}},
{OR_8098,{3U,0U,0U}},
{OR_8098,{4U,0U,0U}},
{OR_8098,{5U,0U,0U}},
{OR_8098,{6U,0U,0U}},
{OR_8098,{7U,0U,0U}},
{OR_80A0,{0U,0U,0U}},
{OR_80A0,{1U,0U,0U}},
{OR_80A0,{2U,0U,0U}},
{OR_80A0,{3U,0U,0U}},
{OR_80A0,{4U,0U,0U}},
{OR_80A0,{5U,0U,0U}},
{OR_80A0,{6U,0U,0U}},
{OR_80A0,{7U,0U,0U}},
{OR_80A8,{0U,0U,0U}},
{OR_80A8,{1U,0U,0U}},
{OR_80A8,{2U,0U,0U}},
{OR_80A8,{3U,0U,0U}},
{OR_80A8,{4U,0U,0U}},
{OR_80A8,{5U,0U,0U}},
{OR_80A8,{6U,0U,0U}},
{OR_80A8,{7U,0U,0U}},
{OR_80B0,{0U,0U,0U}},
{OR_80B0,{1U,0U,0U}},
{OR_80B0,{2U,0U,0U}},
{OR_80B0,{3U,0U,0U}},
{OR_80B0,{4U,0U,0U}},
{OR_80B0,{5U,0U,0U}},
{OR_80B0,{6U,0U,0U}},
{OR_80B0,{7U,0U,0U}},
{OR_80B8,{0U,0U,0U}},
{OR_80B9,{0U,0U,0U}},
{OR_80BA,{0U,0U,0U}},
{OR_80BB,{0U,0U,0U}},
{OR_80BC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80C0,{0U,0U,132U}},
{DIVU_80C0,{1U,0U,132U}},
{DIVU_80C0,{2U,0U,132U}},
{DIVU_80C0,{3U,0U,132U}},
{DIVU_80C0,{4U,0U,132U}},
{DIVU_80C0,{5U,0U,132U}},
{DIVU_80C0,{6U,0U,132U}},
{DIVU_80C0,{7U,0U,132U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80D0,{0U,0U,136U}},
{DIVU_80D0,{1U,0U,136U}},
{DIVU_80D0,{2U,0U,136U}},
{DIVU_80D0,{3U,0U,136U}},
{DIVU_80D0,{4U,0U,136U}},
{DIVU_80D0,{5U,0U,136U}},
{DIVU_80D0,{6U,0U,136U}},
{DIVU_80D0,{7U,0U,136U}},
{DIVU_80D8,{0U,0U,136U}},
{DIVU_80D8,{1U,0U,136U}},
{DIVU_80D8,{2U,0U,136U}},
{DIVU_80D8,{3U,0U,136U}},
{DIVU_80D8,{4U,0U,136U}},
{DIVU_80D8,{5U,0U,136U}},
{DIVU_80D8,{6U,0U,136U}},
{DIVU_80D8,{7U,0U,136U}},
{DIVU_80E0,{0U,0U,138U}},
{DIVU_80E0,{1U,0U,138U}},
{DIVU_80E0,{2U,0U,138U}},
{DIVU_80E0,{3U,0U,138U}},
{DIVU_80E0,{4U,0U,138U}},
{DIVU_80E0,{5U,0U,138U}},
{DIVU_80E0,{6U,0U,138U}},
{DIVU_80E0,{7U,0U,138U}},
{DIVU_80E8,{0U,0U,140U}},
{DIVU_80E8,{1U,0U,140U}},
{DIVU_80E8,{2U,0U,140U}},
{DIVU_80E8,{3U,0U,140U}},
{DIVU_80E8,{4U,0U,140U}},
{DIVU_80E8,{5U,0U,140U}},
{DIVU_80E8,{6U,0U,140U}},
{DIVU_80E8,{7U,0U,140U}},
{DIVU_80F0,{0U,0U,142U}},
{DIVU_80F0,{1U,0U,142U}},
{DIVU_80F0,{2U,0U,142U}},
{DIVU_80F0,{3U,0U,142U}},
{DIVU_80F0,{4U,0U,142U}},
{DIVU_80F0,{5U,0U,142U}},
{DIVU_80F0,{6U,0U,142U}},
{DIVU_80F0,{7U,0U,142U}},
{DIVU_80F8,{0U,0U,140U}},
{DIVU_80F9,{0U,0U,144U}},
{DIVU_80FA,{0U,0U,140U}},
{DIVU_80FB,{0U,0U,142U}},
{DIVU_80FC,{0U,0U,136U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SBCD_8100,{0U,0U,0U}},
{SBCD_8100,{1U,0U,0U}},
{SBCD_8100,{2U,0U,0U}},
{SBCD_8100,{3U,0U,0U}},
{SBCD_8100,{4U,0U,0U}},
{SBCD_8100,{5U,0U,0U}},
{SBCD_8100,{6U,0U,0U}},
{SBCD_8100,{7U,0U,0U}},
{SBCD_8108,{0U,0U,0U}},
{SBCD_8108,{1U,0U,0U}},
{SBCD_8108,{2U,0U,0U}},
{SBCD_8108,{3U,0U,0U}},
{SBCD_8108,{4U,0U,0U}},
{SBCD_8108,{5U,0U,0U}},
{SBCD_8108,{6U,0U,0U}},
{SBCD_8108,{7U,0U,0U}},
{OR_8110,{0U,0U,0U}},
{OR_8110,{1U,0U,0U}},
{OR_8110,{2U,0U,0U}},
{OR_8110,{3U,0U,0U}},
{OR_8110,{4U,0U,0U}},
{OR_8110,{5U,0U,0U}},
{OR_8110,{6U,0U,0U}},
{OR_8110,{7U,0U,0U}},
{OR_8118,{0U,0U,0U}},
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{OR_8118,{2U,0U,0U}},
{OR_8118,{3U,0U,0U}},
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{OR_8118,{5U,0U,0U}},
{OR_8118,{6U,0U,0U}},
{OR_8118,{7U,0U,0U}},
{OR_8120,{0U,0U,0U}},
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{OR_8120,{2U,0U,0U}},
{OR_8120,{3U,0U,0U}},
{OR_8120,{4U,0U,0U}},
{OR_8120,{5U,0U,0U}},
{OR_8120,{6U,0U,0U}},
{OR_8120,{7U,0U,0U}},
{OR_8128,{0U,0U,0U}},
{OR_8128,{1U,0U,0U}},
{OR_8128,{2U,0U,0U}},
{OR_8128,{3U,0U,0U}},
{OR_8128,{4U,0U,0U}},
{OR_8128,{5U,0U,0U}},
{OR_8128,{6U,0U,0U}},
{OR_8128,{7U,0U,0U}},
{OR_8130,{0U,0U,0U}},
{OR_8130,{1U,0U,0U}},
{OR_8130,{2U,0U,0U}},
{OR_8130,{3U,0U,0U}},
{OR_8130,{4U,0U,0U}},
{OR_8130,{5U,0U,0U}},
{OR_8130,{6U,0U,0U}},
{OR_8130,{7U,0U,0U}},
{OR_8138,{0U,0U,0U}},
{OR_8139,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PACK_8140,{0U,0U,0U}},
{PACK_8140,{0U,1U,0U}},
{PACK_8140,{0U,2U,0U}},
{PACK_8140,{0U,3U,0U}},
{PACK_8140,{0U,4U,0U}},
{PACK_8140,{0U,5U,0U}},
{PACK_8140,{0U,6U,0U}},
{PACK_8140,{0U,7U,0U}},
{PACK_8148,{0U,0U,0U}},
{PACK_8148,{0U,1U,0U}},
{PACK_8148,{0U,2U,0U}},
{PACK_8148,{0U,3U,0U}},
{PACK_8148,{0U,4U,0U}},
{PACK_8148,{0U,5U,0U}},
{PACK_8148,{0U,6U,0U}},
{PACK_8148,{0U,7U,0U}},
{OR_8150,{0U,0U,0U}},
{OR_8150,{1U,0U,0U}},
{OR_8150,{2U,0U,0U}},
{OR_8150,{3U,0U,0U}},
{OR_8150,{4U,0U,0U}},
{OR_8150,{5U,0U,0U}},
{OR_8150,{6U,0U,0U}},
{OR_8150,{7U,0U,0U}},
{OR_8158,{0U,0U,0U}},
{OR_8158,{1U,0U,0U}},
{OR_8158,{2U,0U,0U}},
{OR_8158,{3U,0U,0U}},
{OR_8158,{4U,0U,0U}},
{OR_8158,{5U,0U,0U}},
{OR_8158,{6U,0U,0U}},
{OR_8158,{7U,0U,0U}},
{OR_8160,{0U,0U,0U}},
{OR_8160,{1U,0U,0U}},
{OR_8160,{2U,0U,0U}},
{OR_8160,{3U,0U,0U}},
{OR_8160,{4U,0U,0U}},
{OR_8160,{5U,0U,0U}},
{OR_8160,{6U,0U,0U}},
{OR_8160,{7U,0U,0U}},
{OR_8168,{0U,0U,0U}},
{OR_8168,{1U,0U,0U}},
{OR_8168,{2U,0U,0U}},
{OR_8168,{3U,0U,0U}},
{OR_8168,{4U,0U,0U}},
{OR_8168,{5U,0U,0U}},
{OR_8168,{6U,0U,0U}},
{OR_8168,{7U,0U,0U}},
{OR_8170,{0U,0U,0U}},
{OR_8170,{1U,0U,0U}},
{OR_8170,{2U,0U,0U}},
{OR_8170,{3U,0U,0U}},
{OR_8170,{4U,0U,0U}},
{OR_8170,{5U,0U,0U}},
{OR_8170,{6U,0U,0U}},
{OR_8170,{7U,0U,0U}},
{OR_8178,{0U,0U,0U}},
{OR_8179,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{UNPK_8180,{0U,0U,0U}},
{UNPK_8180,{0U,1U,0U}},
{UNPK_8180,{0U,2U,0U}},
{UNPK_8180,{0U,3U,0U}},
{UNPK_8180,{0U,4U,0U}},
{UNPK_8180,{0U,5U,0U}},
{UNPK_8180,{0U,6U,0U}},
{UNPK_8180,{0U,7U,0U}},
{UNPK_8188,{0U,0U,0U}},
{UNPK_8188,{0U,1U,0U}},
{UNPK_8188,{0U,2U,0U}},
{UNPK_8188,{0U,3U,0U}},
{UNPK_8188,{0U,4U,0U}},
{UNPK_8188,{0U,5U,0U}},
{UNPK_8188,{0U,6U,0U}},
{UNPK_8188,{0U,7U,0U}},
{OR_8190,{0U,0U,0U}},
{OR_8190,{1U,0U,0U}},
{OR_8190,{2U,0U,0U}},
{OR_8190,{3U,0U,0U}},
{OR_8190,{4U,0U,0U}},
{OR_8190,{5U,0U,0U}},
{OR_8190,{6U,0U,0U}},
{OR_8190,{7U,0U,0U}},
{OR_8198,{0U,0U,0U}},
{OR_8198,{1U,0U,0U}},
{OR_8198,{2U,0U,0U}},
{OR_8198,{3U,0U,0U}},
{OR_8198,{4U,0U,0U}},
{OR_8198,{5U,0U,0U}},
{OR_8198,{6U,0U,0U}},
{OR_8198,{7U,0U,0U}},
{OR_81A0,{0U,0U,0U}},
{OR_81A0,{1U,0U,0U}},
{OR_81A0,{2U,0U,0U}},
{OR_81A0,{3U,0U,0U}},
{OR_81A0,{4U,0U,0U}},
{OR_81A0,{5U,0U,0U}},
{OR_81A0,{6U,0U,0U}},
{OR_81A0,{7U,0U,0U}},
{OR_81A8,{0U,0U,0U}},
{OR_81A8,{1U,0U,0U}},
{OR_81A8,{2U,0U,0U}},
{OR_81A8,{3U,0U,0U}},
{OR_81A8,{4U,0U,0U}},
{OR_81A8,{5U,0U,0U}},
{OR_81A8,{6U,0U,0U}},
{OR_81A8,{7U,0U,0U}},
{OR_81B0,{0U,0U,0U}},
{OR_81B0,{1U,0U,0U}},
{OR_81B0,{2U,0U,0U}},
{OR_81B0,{3U,0U,0U}},
{OR_81B0,{4U,0U,0U}},
{OR_81B0,{5U,0U,0U}},
{OR_81B0,{6U,0U,0U}},
{OR_81B0,{7U,0U,0U}},
{OR_81B8,{0U,0U,0U}},
{OR_81B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81C0,{0U,0U,150U}},
{DIVS_81C0,{1U,0U,150U}},
{DIVS_81C0,{2U,0U,150U}},
{DIVS_81C0,{3U,0U,150U}},
{DIVS_81C0,{4U,0U,150U}},
{DIVS_81C0,{5U,0U,150U}},
{DIVS_81C0,{6U,0U,150U}},
{DIVS_81C0,{7U,0U,150U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81D0,{0U,0U,154U}},
{DIVS_81D0,{1U,0U,154U}},
{DIVS_81D0,{2U,0U,154U}},
{DIVS_81D0,{3U,0U,154U}},
{DIVS_81D0,{4U,0U,154U}},
{DIVS_81D0,{5U,0U,154U}},
{DIVS_81D0,{6U,0U,154U}},
{DIVS_81D0,{7U,0U,154U}},
{DIVS_81D8,{0U,0U,154U}},
{DIVS_81D8,{1U,0U,154U}},
{DIVS_81D8,{2U,0U,154U}},
{DIVS_81D8,{3U,0U,154U}},
{DIVS_81D8,{4U,0U,154U}},
{DIVS_81D8,{5U,0U,154U}},
{DIVS_81D8,{6U,0U,154U}},
{DIVS_81D8,{7U,0U,154U}},
{DIVS_81E0,{0U,0U,156U}},
{DIVS_81E0,{1U,0U,156U}},
{DIVS_81E0,{2U,0U,156U}},
{DIVS_81E0,{3U,0U,156U}},
{DIVS_81E0,{4U,0U,156U}},
{DIVS_81E0,{5U,0U,156U}},
{DIVS_81E0,{6U,0U,156U}},
{DIVS_81E0,{7U,0U,156U}},
{DIVS_81E8,{0U,0U,158U}},
{DIVS_81E8,{1U,0U,158U}},
{DIVS_81E8,{2U,0U,158U}},
{DIVS_81E8,{3U,0U,158U}},
{DIVS_81E8,{4U,0U,158U}},
{DIVS_81E8,{5U,0U,158U}},
{DIVS_81E8,{6U,0U,158U}},
{DIVS_81E8,{7U,0U,158U}},
{DIVS_81F0,{0U,0U,160U}},
{DIVS_81F0,{1U,0U,160U}},
{DIVS_81F0,{2U,0U,160U}},
{DIVS_81F0,{3U,0U,160U}},
{DIVS_81F0,{4U,0U,160U}},
{DIVS_81F0,{5U,0U,160U}},
{DIVS_81F0,{6U,0U,160U}},
{DIVS_81F0,{7U,0U,160U}},
{DIVS_81F8,{0U,0U,158U}},
{DIVS_81F9,{0U,0U,162U}},
{DIVS_81FA,{0U,0U,158U}},
{DIVS_81FB,{0U,0U,160U}},
{DIVS_81FC,{0U,0U,154U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8000,{0U,1U,0U}},
{OR_8000,{1U,1U,0U}},
{OR_8000,{2U,1U,0U}},
{OR_8000,{3U,1U,0U}},
{OR_8000,{4U,1U,0U}},
{OR_8000,{5U,1U,0U}},
{OR_8000,{6U,1U,0U}},
{OR_8000,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8010,{0U,1U,0U}},
{OR_8010,{1U,1U,0U}},
{OR_8010,{2U,1U,0U}},
{OR_8010,{3U,1U,0U}},
{OR_8010,{4U,1U,0U}},
{OR_8010,{5U,1U,0U}},
{OR_8010,{6U,1U,0U}},
{OR_8010,{7U,1U,0U}},
{OR_8018,{0U,1U,0U}},
{OR_8018,{1U,1U,0U}},
{OR_8018,{2U,1U,0U}},
{OR_8018,{3U,1U,0U}},
{OR_8018,{4U,1U,0U}},
{OR_8018,{5U,1U,0U}},
{OR_8018,{6U,1U,0U}},
{OR_8018,{7U,1U,0U}},
{OR_8020,{0U,1U,0U}},
{OR_8020,{1U,1U,0U}},
{OR_8020,{2U,1U,0U}},
{OR_8020,{3U,1U,0U}},
{OR_8020,{4U,1U,0U}},
{OR_8020,{5U,1U,0U}},
{OR_8020,{6U,1U,0U}},
{OR_8020,{7U,1U,0U}},
{OR_8028,{0U,1U,0U}},
{OR_8028,{1U,1U,0U}},
{OR_8028,{2U,1U,0U}},
{OR_8028,{3U,1U,0U}},
{OR_8028,{4U,1U,0U}},
{OR_8028,{5U,1U,0U}},
{OR_8028,{6U,1U,0U}},
{OR_8028,{7U,1U,0U}},
{OR_8030,{0U,1U,0U}},
{OR_8030,{1U,1U,0U}},
{OR_8030,{2U,1U,0U}},
{OR_8030,{3U,1U,0U}},
{OR_8030,{4U,1U,0U}},
{OR_8030,{5U,1U,0U}},
{OR_8030,{6U,1U,0U}},
{OR_8030,{7U,1U,0U}},
{OR_8038,{0U,1U,0U}},
{OR_8039,{0U,1U,0U}},
{OR_803A,{0U,1U,0U}},
{OR_803B,{0U,1U,0U}},
{OR_803C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8040,{0U,1U,0U}},
{OR_8040,{1U,1U,0U}},
{OR_8040,{2U,1U,0U}},
{OR_8040,{3U,1U,0U}},
{OR_8040,{4U,1U,0U}},
{OR_8040,{5U,1U,0U}},
{OR_8040,{6U,1U,0U}},
{OR_8040,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8050,{0U,1U,0U}},
{OR_8050,{1U,1U,0U}},
{OR_8050,{2U,1U,0U}},
{OR_8050,{3U,1U,0U}},
{OR_8050,{4U,1U,0U}},
{OR_8050,{5U,1U,0U}},
{OR_8050,{6U,1U,0U}},
{OR_8050,{7U,1U,0U}},
{OR_8058,{0U,1U,0U}},
{OR_8058,{1U,1U,0U}},
{OR_8058,{2U,1U,0U}},
{OR_8058,{3U,1U,0U}},
{OR_8058,{4U,1U,0U}},
{OR_8058,{5U,1U,0U}},
{OR_8058,{6U,1U,0U}},
{OR_8058,{7U,1U,0U}},
{OR_8060,{0U,1U,0U}},
{OR_8060,{1U,1U,0U}},
{OR_8060,{2U,1U,0U}},
{OR_8060,{3U,1U,0U}},
{OR_8060,{4U,1U,0U}},
{OR_8060,{5U,1U,0U}},
{OR_8060,{6U,1U,0U}},
{OR_8060,{7U,1U,0U}},
{OR_8068,{0U,1U,0U}},
{OR_8068,{1U,1U,0U}},
{OR_8068,{2U,1U,0U}},
{OR_8068,{3U,1U,0U}},
{OR_8068,{4U,1U,0U}},
{OR_8068,{5U,1U,0U}},
{OR_8068,{6U,1U,0U}},
{OR_8068,{7U,1U,0U}},
{OR_8070,{0U,1U,0U}},
{OR_8070,{1U,1U,0U}},
{OR_8070,{2U,1U,0U}},
{OR_8070,{3U,1U,0U}},
{OR_8070,{4U,1U,0U}},
{OR_8070,{5U,1U,0U}},
{OR_8070,{6U,1U,0U}},
{OR_8070,{7U,1U,0U}},
{OR_8078,{0U,1U,0U}},
{OR_8079,{0U,1U,0U}},
{OR_807A,{0U,1U,0U}},
{OR_807B,{0U,1U,0U}},
{OR_807C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8080,{0U,1U,0U}},
{OR_8080,{1U,1U,0U}},
{OR_8080,{2U,1U,0U}},
{OR_8080,{3U,1U,0U}},
{OR_8080,{4U,1U,0U}},
{OR_8080,{5U,1U,0U}},
{OR_8080,{6U,1U,0U}},
{OR_8080,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8090,{0U,1U,0U}},
{OR_8090,{1U,1U,0U}},
{OR_8090,{2U,1U,0U}},
{OR_8090,{3U,1U,0U}},
{OR_8090,{4U,1U,0U}},
{OR_8090,{5U,1U,0U}},
{OR_8090,{6U,1U,0U}},
{OR_8090,{7U,1U,0U}},
{OR_8098,{0U,1U,0U}},
{OR_8098,{1U,1U,0U}},
{OR_8098,{2U,1U,0U}},
{OR_8098,{3U,1U,0U}},
{OR_8098,{4U,1U,0U}},
{OR_8098,{5U,1U,0U}},
{OR_8098,{6U,1U,0U}},
{OR_8098,{7U,1U,0U}},
{OR_80A0,{0U,1U,0U}},
{OR_80A0,{1U,1U,0U}},
{OR_80A0,{2U,1U,0U}},
{OR_80A0,{3U,1U,0U}},
{OR_80A0,{4U,1U,0U}},
{OR_80A0,{5U,1U,0U}},
{OR_80A0,{6U,1U,0U}},
{OR_80A0,{7U,1U,0U}},
{OR_80A8,{0U,1U,0U}},
{OR_80A8,{1U,1U,0U}},
{OR_80A8,{2U,1U,0U}},
{OR_80A8,{3U,1U,0U}},
{OR_80A8,{4U,1U,0U}},
{OR_80A8,{5U,1U,0U}},
{OR_80A8,{6U,1U,0U}},
{OR_80A8,{7U,1U,0U}},
{OR_80B0,{0U,1U,0U}},
{OR_80B0,{1U,1U,0U}},
{OR_80B0,{2U,1U,0U}},
{OR_80B0,{3U,1U,0U}},
{OR_80B0,{4U,1U,0U}},
{OR_80B0,{5U,1U,0U}},
{OR_80B0,{6U,1U,0U}},
{OR_80B0,{7U,1U,0U}},
{OR_80B8,{0U,1U,0U}},
{OR_80B9,{0U,1U,0U}},
{OR_80BA,{0U,1U,0U}},
{OR_80BB,{0U,1U,0U}},
{OR_80BC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80C0,{0U,1U,132U}},
{DIVU_80C0,{1U,1U,132U}},
{DIVU_80C0,{2U,1U,132U}},
{DIVU_80C0,{3U,1U,132U}},
{DIVU_80C0,{4U,1U,132U}},
{DIVU_80C0,{5U,1U,132U}},
{DIVU_80C0,{6U,1U,132U}},
{DIVU_80C0,{7U,1U,132U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80D0,{0U,1U,136U}},
{DIVU_80D0,{1U,1U,136U}},
{DIVU_80D0,{2U,1U,136U}},
{DIVU_80D0,{3U,1U,136U}},
{DIVU_80D0,{4U,1U,136U}},
{DIVU_80D0,{5U,1U,136U}},
{DIVU_80D0,{6U,1U,136U}},
{DIVU_80D0,{7U,1U,136U}},
{DIVU_80D8,{0U,1U,136U}},
{DIVU_80D8,{1U,1U,136U}},
{DIVU_80D8,{2U,1U,136U}},
{DIVU_80D8,{3U,1U,136U}},
{DIVU_80D8,{4U,1U,136U}},
{DIVU_80D8,{5U,1U,136U}},
{DIVU_80D8,{6U,1U,136U}},
{DIVU_80D8,{7U,1U,136U}},
{DIVU_80E0,{0U,1U,138U}},
{DIVU_80E0,{1U,1U,138U}},
{DIVU_80E0,{2U,1U,138U}},
{DIVU_80E0,{3U,1U,138U}},
{DIVU_80E0,{4U,1U,138U}},
{DIVU_80E0,{5U,1U,138U}},
{DIVU_80E0,{6U,1U,138U}},
{DIVU_80E0,{7U,1U,138U}},
{DIVU_80E8,{0U,1U,140U}},
{DIVU_80E8,{1U,1U,140U}},
{DIVU_80E8,{2U,1U,140U}},
{DIVU_80E8,{3U,1U,140U}},
{DIVU_80E8,{4U,1U,140U}},
{DIVU_80E8,{5U,1U,140U}},
{DIVU_80E8,{6U,1U,140U}},
{DIVU_80E8,{7U,1U,140U}},
{DIVU_80F0,{0U,1U,142U}},
{DIVU_80F0,{1U,1U,142U}},
{DIVU_80F0,{2U,1U,142U}},
{DIVU_80F0,{3U,1U,142U}},
{DIVU_80F0,{4U,1U,142U}},
{DIVU_80F0,{5U,1U,142U}},
{DIVU_80F0,{6U,1U,142U}},
{DIVU_80F0,{7U,1U,142U}},
{DIVU_80F8,{0U,1U,140U}},
{DIVU_80F9,{0U,1U,144U}},
{DIVU_80FA,{0U,1U,140U}},
{DIVU_80FB,{0U,1U,142U}},
{DIVU_80FC,{0U,1U,136U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SBCD_8100,{0U,1U,0U}},
{SBCD_8100,{1U,1U,0U}},
{SBCD_8100,{2U,1U,0U}},
{SBCD_8100,{3U,1U,0U}},
{SBCD_8100,{4U,1U,0U}},
{SBCD_8100,{5U,1U,0U}},
{SBCD_8100,{6U,1U,0U}},
{SBCD_8100,{7U,1U,0U}},
{SBCD_8108,{0U,1U,0U}},
{SBCD_8108,{1U,1U,0U}},
{SBCD_8108,{2U,1U,0U}},
{SBCD_8108,{3U,1U,0U}},
{SBCD_8108,{4U,1U,0U}},
{SBCD_8108,{5U,1U,0U}},
{SBCD_8108,{6U,1U,0U}},
{SBCD_8108,{7U,1U,0U}},
{OR_8110,{0U,1U,0U}},
{OR_8110,{1U,1U,0U}},
{OR_8110,{2U,1U,0U}},
{OR_8110,{3U,1U,0U}},
{OR_8110,{4U,1U,0U}},
{OR_8110,{5U,1U,0U}},
{OR_8110,{6U,1U,0U}},
{OR_8110,{7U,1U,0U}},
{OR_8118,{0U,1U,0U}},
{OR_8118,{1U,1U,0U}},
{OR_8118,{2U,1U,0U}},
{OR_8118,{3U,1U,0U}},
{OR_8118,{4U,1U,0U}},
{OR_8118,{5U,1U,0U}},
{OR_8118,{6U,1U,0U}},
{OR_8118,{7U,1U,0U}},
{OR_8120,{0U,1U,0U}},
{OR_8120,{1U,1U,0U}},
{OR_8120,{2U,1U,0U}},
{OR_8120,{3U,1U,0U}},
{OR_8120,{4U,1U,0U}},
{OR_8120,{5U,1U,0U}},
{OR_8120,{6U,1U,0U}},
{OR_8120,{7U,1U,0U}},
{OR_8128,{0U,1U,0U}},
{OR_8128,{1U,1U,0U}},
{OR_8128,{2U,1U,0U}},
{OR_8128,{3U,1U,0U}},
{OR_8128,{4U,1U,0U}},
{OR_8128,{5U,1U,0U}},
{OR_8128,{6U,1U,0U}},
{OR_8128,{7U,1U,0U}},
{OR_8130,{0U,1U,0U}},
{OR_8130,{1U,1U,0U}},
{OR_8130,{2U,1U,0U}},
{OR_8130,{3U,1U,0U}},
{OR_8130,{4U,1U,0U}},
{OR_8130,{5U,1U,0U}},
{OR_8130,{6U,1U,0U}},
{OR_8130,{7U,1U,0U}},
{OR_8138,{0U,1U,0U}},
{OR_8139,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PACK_8140,{1U,0U,0U}},
{PACK_8140,{1U,1U,0U}},
{PACK_8140,{1U,2U,0U}},
{PACK_8140,{1U,3U,0U}},
{PACK_8140,{1U,4U,0U}},
{PACK_8140,{1U,5U,0U}},
{PACK_8140,{1U,6U,0U}},
{PACK_8140,{1U,7U,0U}},
{PACK_8148,{1U,0U,0U}},
{PACK_8148,{1U,1U,0U}},
{PACK_8148,{1U,2U,0U}},
{PACK_8148,{1U,3U,0U}},
{PACK_8148,{1U,4U,0U}},
{PACK_8148,{1U,5U,0U}},
{PACK_8148,{1U,6U,0U}},
{PACK_8148,{1U,7U,0U}},
{OR_8150,{0U,1U,0U}},
{OR_8150,{1U,1U,0U}},
{OR_8150,{2U,1U,0U}},
{OR_8150,{3U,1U,0U}},
{OR_8150,{4U,1U,0U}},
{OR_8150,{5U,1U,0U}},
{OR_8150,{6U,1U,0U}},
{OR_8150,{7U,1U,0U}},
{OR_8158,{0U,1U,0U}},
{OR_8158,{1U,1U,0U}},
{OR_8158,{2U,1U,0U}},
{OR_8158,{3U,1U,0U}},
{OR_8158,{4U,1U,0U}},
{OR_8158,{5U,1U,0U}},
{OR_8158,{6U,1U,0U}},
{OR_8158,{7U,1U,0U}},
{OR_8160,{0U,1U,0U}},
{OR_8160,{1U,1U,0U}},
{OR_8160,{2U,1U,0U}},
{OR_8160,{3U,1U,0U}},
{OR_8160,{4U,1U,0U}},
{OR_8160,{5U,1U,0U}},
{OR_8160,{6U,1U,0U}},
{OR_8160,{7U,1U,0U}},
{OR_8168,{0U,1U,0U}},
{OR_8168,{1U,1U,0U}},
{OR_8168,{2U,1U,0U}},
{OR_8168,{3U,1U,0U}},
{OR_8168,{4U,1U,0U}},
{OR_8168,{5U,1U,0U}},
{OR_8168,{6U,1U,0U}},
{OR_8168,{7U,1U,0U}},
{OR_8170,{0U,1U,0U}},
{OR_8170,{1U,1U,0U}},
{OR_8170,{2U,1U,0U}},
{OR_8170,{3U,1U,0U}},
{OR_8170,{4U,1U,0U}},
{OR_8170,{5U,1U,0U}},
{OR_8170,{6U,1U,0U}},
{OR_8170,{7U,1U,0U}},
{OR_8178,{0U,1U,0U}},
{OR_8179,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{UNPK_8180,{1U,0U,0U}},
{UNPK_8180,{1U,1U,0U}},
{UNPK_8180,{1U,2U,0U}},
{UNPK_8180,{1U,3U,0U}},
{UNPK_8180,{1U,4U,0U}},
{UNPK_8180,{1U,5U,0U}},
{UNPK_8180,{1U,6U,0U}},
{UNPK_8180,{1U,7U,0U}},
{UNPK_8188,{1U,0U,0U}},
{UNPK_8188,{1U,1U,0U}},
{UNPK_8188,{1U,2U,0U}},
{UNPK_8188,{1U,3U,0U}},
{UNPK_8188,{1U,4U,0U}},
{UNPK_8188,{1U,5U,0U}},
{UNPK_8188,{1U,6U,0U}},
{UNPK_8188,{1U,7U,0U}},
{OR_8190,{0U,1U,0U}},
{OR_8190,{1U,1U,0U}},
{OR_8190,{2U,1U,0U}},
{OR_8190,{3U,1U,0U}},
{OR_8190,{4U,1U,0U}},
{OR_8190,{5U,1U,0U}},
{OR_8190,{6U,1U,0U}},
{OR_8190,{7U,1U,0U}},
{OR_8198,{0U,1U,0U}},
{OR_8198,{1U,1U,0U}},
{OR_8198,{2U,1U,0U}},
{OR_8198,{3U,1U,0U}},
{OR_8198,{4U,1U,0U}},
{OR_8198,{5U,1U,0U}},
{OR_8198,{6U,1U,0U}},
{OR_8198,{7U,1U,0U}},
{OR_81A0,{0U,1U,0U}},
{OR_81A0,{1U,1U,0U}},
{OR_81A0,{2U,1U,0U}},
{OR_81A0,{3U,1U,0U}},
{OR_81A0,{4U,1U,0U}},
{OR_81A0,{5U,1U,0U}},
{OR_81A0,{6U,1U,0U}},
{OR_81A0,{7U,1U,0U}},
{OR_81A8,{0U,1U,0U}},
{OR_81A8,{1U,1U,0U}},
{OR_81A8,{2U,1U,0U}},
{OR_81A8,{3U,1U,0U}},
{OR_81A8,{4U,1U,0U}},
{OR_81A8,{5U,1U,0U}},
{OR_81A8,{6U,1U,0U}},
{OR_81A8,{7U,1U,0U}},
{OR_81B0,{0U,1U,0U}},
{OR_81B0,{1U,1U,0U}},
{OR_81B0,{2U,1U,0U}},
{OR_81B0,{3U,1U,0U}},
{OR_81B0,{4U,1U,0U}},
{OR_81B0,{5U,1U,0U}},
{OR_81B0,{6U,1U,0U}},
{OR_81B0,{7U,1U,0U}},
{OR_81B8,{0U,1U,0U}},
{OR_81B9,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81C0,{0U,1U,150U}},
{DIVS_81C0,{1U,1U,150U}},
{DIVS_81C0,{2U,1U,150U}},
{DIVS_81C0,{3U,1U,150U}},
{DIVS_81C0,{4U,1U,150U}},
{DIVS_81C0,{5U,1U,150U}},
{DIVS_81C0,{6U,1U,150U}},
{DIVS_81C0,{7U,1U,150U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81D0,{0U,1U,154U}},
{DIVS_81D0,{1U,1U,154U}},
{DIVS_81D0,{2U,1U,154U}},
{DIVS_81D0,{3U,1U,154U}},
{DIVS_81D0,{4U,1U,154U}},
{DIVS_81D0,{5U,1U,154U}},
{DIVS_81D0,{6U,1U,154U}},
{DIVS_81D0,{7U,1U,154U}},
{DIVS_81D8,{0U,1U,154U}},
{DIVS_81D8,{1U,1U,154U}},
{DIVS_81D8,{2U,1U,154U}},
{DIVS_81D8,{3U,1U,154U}},
{DIVS_81D8,{4U,1U,154U}},
{DIVS_81D8,{5U,1U,154U}},
{DIVS_81D8,{6U,1U,154U}},
{DIVS_81D8,{7U,1U,154U}},
{DIVS_81E0,{0U,1U,156U}},
{DIVS_81E0,{1U,1U,156U}},
{DIVS_81E0,{2U,1U,156U}},
{DIVS_81E0,{3U,1U,156U}},
{DIVS_81E0,{4U,1U,156U}},
{DIVS_81E0,{5U,1U,156U}},
{DIVS_81E0,{6U,1U,156U}},
{DIVS_81E0,{7U,1U,156U}},
{DIVS_81E8,{0U,1U,158U}},
{DIVS_81E8,{1U,1U,158U}},
{DIVS_81E8,{2U,1U,158U}},
{DIVS_81E8,{3U,1U,158U}},
{DIVS_81E8,{4U,1U,158U}},
{DIVS_81E8,{5U,1U,158U}},
{DIVS_81E8,{6U,1U,158U}},
{DIVS_81E8,{7U,1U,158U}},
{DIVS_81F0,{0U,1U,160U}},
{DIVS_81F0,{1U,1U,160U}},
{DIVS_81F0,{2U,1U,160U}},
{DIVS_81F0,{3U,1U,160U}},
{DIVS_81F0,{4U,1U,160U}},
{DIVS_81F0,{5U,1U,160U}},
{DIVS_81F0,{6U,1U,160U}},
{DIVS_81F0,{7U,1U,160U}},
{DIVS_81F8,{0U,1U,158U}},
{DIVS_81F9,{0U,1U,162U}},
{DIVS_81FA,{0U,1U,158U}},
{DIVS_81FB,{0U,1U,160U}},
{DIVS_81FC,{0U,1U,154U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8000,{0U,2U,0U}},
{OR_8000,{1U,2U,0U}},
{OR_8000,{2U,2U,0U}},
{OR_8000,{3U,2U,0U}},
{OR_8000,{4U,2U,0U}},
{OR_8000,{5U,2U,0U}},
{OR_8000,{6U,2U,0U}},
{OR_8000,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8010,{0U,2U,0U}},
{OR_8010,{1U,2U,0U}},
{OR_8010,{2U,2U,0U}},
{OR_8010,{3U,2U,0U}},
{OR_8010,{4U,2U,0U}},
{OR_8010,{5U,2U,0U}},
{OR_8010,{6U,2U,0U}},
{OR_8010,{7U,2U,0U}},
{OR_8018,{0U,2U,0U}},
{OR_8018,{1U,2U,0U}},
{OR_8018,{2U,2U,0U}},
{OR_8018,{3U,2U,0U}},
{OR_8018,{4U,2U,0U}},
{OR_8018,{5U,2U,0U}},
{OR_8018,{6U,2U,0U}},
{OR_8018,{7U,2U,0U}},
{OR_8020,{0U,2U,0U}},
{OR_8020,{1U,2U,0U}},
{OR_8020,{2U,2U,0U}},
{OR_8020,{3U,2U,0U}},
{OR_8020,{4U,2U,0U}},
{OR_8020,{5U,2U,0U}},
{OR_8020,{6U,2U,0U}},
{OR_8020,{7U,2U,0U}},
{OR_8028,{0U,2U,0U}},
{OR_8028,{1U,2U,0U}},
{OR_8028,{2U,2U,0U}},
{OR_8028,{3U,2U,0U}},
{OR_8028,{4U,2U,0U}},
{OR_8028,{5U,2U,0U}},
{OR_8028,{6U,2U,0U}},
{OR_8028,{7U,2U,0U}},
{OR_8030,{0U,2U,0U}},
{OR_8030,{1U,2U,0U}},
{OR_8030,{2U,2U,0U}},
{OR_8030,{3U,2U,0U}},
{OR_8030,{4U,2U,0U}},
{OR_8030,{5U,2U,0U}},
{OR_8030,{6U,2U,0U}},
{OR_8030,{7U,2U,0U}},
{OR_8038,{0U,2U,0U}},
{OR_8039,{0U,2U,0U}},
{OR_803A,{0U,2U,0U}},
{OR_803B,{0U,2U,0U}},
{OR_803C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8040,{0U,2U,0U}},
{OR_8040,{1U,2U,0U}},
{OR_8040,{2U,2U,0U}},
{OR_8040,{3U,2U,0U}},
{OR_8040,{4U,2U,0U}},
{OR_8040,{5U,2U,0U}},
{OR_8040,{6U,2U,0U}},
{OR_8040,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8050,{0U,2U,0U}},
{OR_8050,{1U,2U,0U}},
{OR_8050,{2U,2U,0U}},
{OR_8050,{3U,2U,0U}},
{OR_8050,{4U,2U,0U}},
{OR_8050,{5U,2U,0U}},
{OR_8050,{6U,2U,0U}},
{OR_8050,{7U,2U,0U}},
{OR_8058,{0U,2U,0U}},
{OR_8058,{1U,2U,0U}},
{OR_8058,{2U,2U,0U}},
{OR_8058,{3U,2U,0U}},
{OR_8058,{4U,2U,0U}},
{OR_8058,{5U,2U,0U}},
{OR_8058,{6U,2U,0U}},
{OR_8058,{7U,2U,0U}},
{OR_8060,{0U,2U,0U}},
{OR_8060,{1U,2U,0U}},
{OR_8060,{2U,2U,0U}},
{OR_8060,{3U,2U,0U}},
{OR_8060,{4U,2U,0U}},
{OR_8060,{5U,2U,0U}},
{OR_8060,{6U,2U,0U}},
{OR_8060,{7U,2U,0U}},
{OR_8068,{0U,2U,0U}},
{OR_8068,{1U,2U,0U}},
{OR_8068,{2U,2U,0U}},
{OR_8068,{3U,2U,0U}},
{OR_8068,{4U,2U,0U}},
{OR_8068,{5U,2U,0U}},
{OR_8068,{6U,2U,0U}},
{OR_8068,{7U,2U,0U}},
{OR_8070,{0U,2U,0U}},
{OR_8070,{1U,2U,0U}},
{OR_8070,{2U,2U,0U}},
{OR_8070,{3U,2U,0U}},
{OR_8070,{4U,2U,0U}},
{OR_8070,{5U,2U,0U}},
{OR_8070,{6U,2U,0U}},
{OR_8070,{7U,2U,0U}},
{OR_8078,{0U,2U,0U}},
{OR_8079,{0U,2U,0U}},
{OR_807A,{0U,2U,0U}},
{OR_807B,{0U,2U,0U}},
{OR_807C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8080,{0U,2U,0U}},
{OR_8080,{1U,2U,0U}},
{OR_8080,{2U,2U,0U}},
{OR_8080,{3U,2U,0U}},
{OR_8080,{4U,2U,0U}},
{OR_8080,{5U,2U,0U}},
{OR_8080,{6U,2U,0U}},
{OR_8080,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8090,{0U,2U,0U}},
{OR_8090,{1U,2U,0U}},
{OR_8090,{2U,2U,0U}},
{OR_8090,{3U,2U,0U}},
{OR_8090,{4U,2U,0U}},
{OR_8090,{5U,2U,0U}},
{OR_8090,{6U,2U,0U}},
{OR_8090,{7U,2U,0U}},
{OR_8098,{0U,2U,0U}},
{OR_8098,{1U,2U,0U}},
{OR_8098,{2U,2U,0U}},
{OR_8098,{3U,2U,0U}},
{OR_8098,{4U,2U,0U}},
{OR_8098,{5U,2U,0U}},
{OR_8098,{6U,2U,0U}},
{OR_8098,{7U,2U,0U}},
{OR_80A0,{0U,2U,0U}},
{OR_80A0,{1U,2U,0U}},
{OR_80A0,{2U,2U,0U}},
{OR_80A0,{3U,2U,0U}},
{OR_80A0,{4U,2U,0U}},
{OR_80A0,{5U,2U,0U}},
{OR_80A0,{6U,2U,0U}},
{OR_80A0,{7U,2U,0U}},
{OR_80A8,{0U,2U,0U}},
{OR_80A8,{1U,2U,0U}},
{OR_80A8,{2U,2U,0U}},
{OR_80A8,{3U,2U,0U}},
{OR_80A8,{4U,2U,0U}},
{OR_80A8,{5U,2U,0U}},
{OR_80A8,{6U,2U,0U}},
{OR_80A8,{7U,2U,0U}},
{OR_80B0,{0U,2U,0U}},
{OR_80B0,{1U,2U,0U}},
{OR_80B0,{2U,2U,0U}},
{OR_80B0,{3U,2U,0U}},
{OR_80B0,{4U,2U,0U}},
{OR_80B0,{5U,2U,0U}},
{OR_80B0,{6U,2U,0U}},
{OR_80B0,{7U,2U,0U}},
{OR_80B8,{0U,2U,0U}},
{OR_80B9,{0U,2U,0U}},
{OR_80BA,{0U,2U,0U}},
{OR_80BB,{0U,2U,0U}},
{OR_80BC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80C0,{0U,2U,132U}},
{DIVU_80C0,{1U,2U,132U}},
{DIVU_80C0,{2U,2U,132U}},
{DIVU_80C0,{3U,2U,132U}},
{DIVU_80C0,{4U,2U,132U}},
{DIVU_80C0,{5U,2U,132U}},
{DIVU_80C0,{6U,2U,132U}},
{DIVU_80C0,{7U,2U,132U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80D0,{0U,2U,136U}},
{DIVU_80D0,{1U,2U,136U}},
{DIVU_80D0,{2U,2U,136U}},
{DIVU_80D0,{3U,2U,136U}},
{DIVU_80D0,{4U,2U,136U}},
{DIVU_80D0,{5U,2U,136U}},
{DIVU_80D0,{6U,2U,136U}},
{DIVU_80D0,{7U,2U,136U}},
{DIVU_80D8,{0U,2U,136U}},
{DIVU_80D8,{1U,2U,136U}},
{DIVU_80D8,{2U,2U,136U}},
{DIVU_80D8,{3U,2U,136U}},
{DIVU_80D8,{4U,2U,136U}},
{DIVU_80D8,{5U,2U,136U}},
{DIVU_80D8,{6U,2U,136U}},
{DIVU_80D8,{7U,2U,136U}},
{DIVU_80E0,{0U,2U,138U}},
{DIVU_80E0,{1U,2U,138U}},
{DIVU_80E0,{2U,2U,138U}},
{DIVU_80E0,{3U,2U,138U}},
{DIVU_80E0,{4U,2U,138U}},
{DIVU_80E0,{5U,2U,138U}},
{DIVU_80E0,{6U,2U,138U}},
{DIVU_80E0,{7U,2U,138U}},
{DIVU_80E8,{0U,2U,140U}},
{DIVU_80E8,{1U,2U,140U}},
{DIVU_80E8,{2U,2U,140U}},
{DIVU_80E8,{3U,2U,140U}},
{DIVU_80E8,{4U,2U,140U}},
{DIVU_80E8,{5U,2U,140U}},
{DIVU_80E8,{6U,2U,140U}},
{DIVU_80E8,{7U,2U,140U}},
{DIVU_80F0,{0U,2U,142U}},
{DIVU_80F0,{1U,2U,142U}},
{DIVU_80F0,{2U,2U,142U}},
{DIVU_80F0,{3U,2U,142U}},
{DIVU_80F0,{4U,2U,142U}},
{DIVU_80F0,{5U,2U,142U}},
{DIVU_80F0,{6U,2U,142U}},
{DIVU_80F0,{7U,2U,142U}},
{DIVU_80F8,{0U,2U,140U}},
{DIVU_80F9,{0U,2U,144U}},
{DIVU_80FA,{0U,2U,140U}},
{DIVU_80FB,{0U,2U,142U}},
{DIVU_80FC,{0U,2U,136U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SBCD_8100,{0U,2U,0U}},
{SBCD_8100,{1U,2U,0U}},
{SBCD_8100,{2U,2U,0U}},
{SBCD_8100,{3U,2U,0U}},
{SBCD_8100,{4U,2U,0U}},
{SBCD_8100,{5U,2U,0U}},
{SBCD_8100,{6U,2U,0U}},
{SBCD_8100,{7U,2U,0U}},
{SBCD_8108,{0U,2U,0U}},
{SBCD_8108,{1U,2U,0U}},
{SBCD_8108,{2U,2U,0U}},
{SBCD_8108,{3U,2U,0U}},
{SBCD_8108,{4U,2U,0U}},
{SBCD_8108,{5U,2U,0U}},
{SBCD_8108,{6U,2U,0U}},
{SBCD_8108,{7U,2U,0U}},
{OR_8110,{0U,2U,0U}},
{OR_8110,{1U,2U,0U}},
{OR_8110,{2U,2U,0U}},
{OR_8110,{3U,2U,0U}},
{OR_8110,{4U,2U,0U}},
{OR_8110,{5U,2U,0U}},
{OR_8110,{6U,2U,0U}},
{OR_8110,{7U,2U,0U}},
{OR_8118,{0U,2U,0U}},
{OR_8118,{1U,2U,0U}},
{OR_8118,{2U,2U,0U}},
{OR_8118,{3U,2U,0U}},
{OR_8118,{4U,2U,0U}},
{OR_8118,{5U,2U,0U}},
{OR_8118,{6U,2U,0U}},
{OR_8118,{7U,2U,0U}},
{OR_8120,{0U,2U,0U}},
{OR_8120,{1U,2U,0U}},
{OR_8120,{2U,2U,0U}},
{OR_8120,{3U,2U,0U}},
{OR_8120,{4U,2U,0U}},
{OR_8120,{5U,2U,0U}},
{OR_8120,{6U,2U,0U}},
{OR_8120,{7U,2U,0U}},
{OR_8128,{0U,2U,0U}},
{OR_8128,{1U,2U,0U}},
{OR_8128,{2U,2U,0U}},
{OR_8128,{3U,2U,0U}},
{OR_8128,{4U,2U,0U}},
{OR_8128,{5U,2U,0U}},
{OR_8128,{6U,2U,0U}},
{OR_8128,{7U,2U,0U}},
{OR_8130,{0U,2U,0U}},
{OR_8130,{1U,2U,0U}},
{OR_8130,{2U,2U,0U}},
{OR_8130,{3U,2U,0U}},
{OR_8130,{4U,2U,0U}},
{OR_8130,{5U,2U,0U}},
{OR_8130,{6U,2U,0U}},
{OR_8130,{7U,2U,0U}},
{OR_8138,{0U,2U,0U}},
{OR_8139,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PACK_8140,{2U,0U,0U}},
{PACK_8140,{2U,1U,0U}},
{PACK_8140,{2U,2U,0U}},
{PACK_8140,{2U,3U,0U}},
{PACK_8140,{2U,4U,0U}},
{PACK_8140,{2U,5U,0U}},
{PACK_8140,{2U,6U,0U}},
{PACK_8140,{2U,7U,0U}},
{PACK_8148,{2U,0U,0U}},
{PACK_8148,{2U,1U,0U}},
{PACK_8148,{2U,2U,0U}},
{PACK_8148,{2U,3U,0U}},
{PACK_8148,{2U,4U,0U}},
{PACK_8148,{2U,5U,0U}},
{PACK_8148,{2U,6U,0U}},
{PACK_8148,{2U,7U,0U}},
{OR_8150,{0U,2U,0U}},
{OR_8150,{1U,2U,0U}},
{OR_8150,{2U,2U,0U}},
{OR_8150,{3U,2U,0U}},
{OR_8150,{4U,2U,0U}},
{OR_8150,{5U,2U,0U}},
{OR_8150,{6U,2U,0U}},
{OR_8150,{7U,2U,0U}},
{OR_8158,{0U,2U,0U}},
{OR_8158,{1U,2U,0U}},
{OR_8158,{2U,2U,0U}},
{OR_8158,{3U,2U,0U}},
{OR_8158,{4U,2U,0U}},
{OR_8158,{5U,2U,0U}},
{OR_8158,{6U,2U,0U}},
{OR_8158,{7U,2U,0U}},
{OR_8160,{0U,2U,0U}},
{OR_8160,{1U,2U,0U}},
{OR_8160,{2U,2U,0U}},
{OR_8160,{3U,2U,0U}},
{OR_8160,{4U,2U,0U}},
{OR_8160,{5U,2U,0U}},
{OR_8160,{6U,2U,0U}},
{OR_8160,{7U,2U,0U}},
{OR_8168,{0U,2U,0U}},
{OR_8168,{1U,2U,0U}},
{OR_8168,{2U,2U,0U}},
{OR_8168,{3U,2U,0U}},
{OR_8168,{4U,2U,0U}},
{OR_8168,{5U,2U,0U}},
{OR_8168,{6U,2U,0U}},
{OR_8168,{7U,2U,0U}},
{OR_8170,{0U,2U,0U}},
{OR_8170,{1U,2U,0U}},
{OR_8170,{2U,2U,0U}},
{OR_8170,{3U,2U,0U}},
{OR_8170,{4U,2U,0U}},
{OR_8170,{5U,2U,0U}},
{OR_8170,{6U,2U,0U}},
{OR_8170,{7U,2U,0U}},
{OR_8178,{0U,2U,0U}},
{OR_8179,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{UNPK_8180,{2U,0U,0U}},
{UNPK_8180,{2U,1U,0U}},
{UNPK_8180,{2U,2U,0U}},
{UNPK_8180,{2U,3U,0U}},
{UNPK_8180,{2U,4U,0U}},
{UNPK_8180,{2U,5U,0U}},
{UNPK_8180,{2U,6U,0U}},
{UNPK_8180,{2U,7U,0U}},
{UNPK_8188,{2U,0U,0U}},
{UNPK_8188,{2U,1U,0U}},
{UNPK_8188,{2U,2U,0U}},
{UNPK_8188,{2U,3U,0U}},
{UNPK_8188,{2U,4U,0U}},
{UNPK_8188,{2U,5U,0U}},
{UNPK_8188,{2U,6U,0U}},
{UNPK_8188,{2U,7U,0U}},
{OR_8190,{0U,2U,0U}},
{OR_8190,{1U,2U,0U}},
{OR_8190,{2U,2U,0U}},
{OR_8190,{3U,2U,0U}},
{OR_8190,{4U,2U,0U}},
{OR_8190,{5U,2U,0U}},
{OR_8190,{6U,2U,0U}},
{OR_8190,{7U,2U,0U}},
{OR_8198,{0U,2U,0U}},
{OR_8198,{1U,2U,0U}},
{OR_8198,{2U,2U,0U}},
{OR_8198,{3U,2U,0U}},
{OR_8198,{4U,2U,0U}},
{OR_8198,{5U,2U,0U}},
{OR_8198,{6U,2U,0U}},
{OR_8198,{7U,2U,0U}},
{OR_81A0,{0U,2U,0U}},
{OR_81A0,{1U,2U,0U}},
{OR_81A0,{2U,2U,0U}},
{OR_81A0,{3U,2U,0U}},
{OR_81A0,{4U,2U,0U}},
{OR_81A0,{5U,2U,0U}},
{OR_81A0,{6U,2U,0U}},
{OR_81A0,{7U,2U,0U}},
{OR_81A8,{0U,2U,0U}},
{OR_81A8,{1U,2U,0U}},
{OR_81A8,{2U,2U,0U}},
{OR_81A8,{3U,2U,0U}},
{OR_81A8,{4U,2U,0U}},
{OR_81A8,{5U,2U,0U}},
{OR_81A8,{6U,2U,0U}},
{OR_81A8,{7U,2U,0U}},
{OR_81B0,{0U,2U,0U}},
{OR_81B0,{1U,2U,0U}},
{OR_81B0,{2U,2U,0U}},
{OR_81B0,{3U,2U,0U}},
{OR_81B0,{4U,2U,0U}},
{OR_81B0,{5U,2U,0U}},
{OR_81B0,{6U,2U,0U}},
{OR_81B0,{7U,2U,0U}},
{OR_81B8,{0U,2U,0U}},
{OR_81B9,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81C0,{0U,2U,150U}},
{DIVS_81C0,{1U,2U,150U}},
{DIVS_81C0,{2U,2U,150U}},
{DIVS_81C0,{3U,2U,150U}},
{DIVS_81C0,{4U,2U,150U}},
{DIVS_81C0,{5U,2U,150U}},
{DIVS_81C0,{6U,2U,150U}},
{DIVS_81C0,{7U,2U,150U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81D0,{0U,2U,154U}},
{DIVS_81D0,{1U,2U,154U}},
{DIVS_81D0,{2U,2U,154U}},
{DIVS_81D0,{3U,2U,154U}},
{DIVS_81D0,{4U,2U,154U}},
{DIVS_81D0,{5U,2U,154U}},
{DIVS_81D0,{6U,2U,154U}},
{DIVS_81D0,{7U,2U,154U}},
{DIVS_81D8,{0U,2U,154U}},
{DIVS_81D8,{1U,2U,154U}},
{DIVS_81D8,{2U,2U,154U}},
{DIVS_81D8,{3U,2U,154U}},
{DIVS_81D8,{4U,2U,154U}},
{DIVS_81D8,{5U,2U,154U}},
{DIVS_81D8,{6U,2U,154U}},
{DIVS_81D8,{7U,2U,154U}},
{DIVS_81E0,{0U,2U,156U}},
{DIVS_81E0,{1U,2U,156U}},
{DIVS_81E0,{2U,2U,156U}},
{DIVS_81E0,{3U,2U,156U}},
{DIVS_81E0,{4U,2U,156U}},
{DIVS_81E0,{5U,2U,156U}},
{DIVS_81E0,{6U,2U,156U}},
{DIVS_81E0,{7U,2U,156U}},
{DIVS_81E8,{0U,2U,158U}},
{DIVS_81E8,{1U,2U,158U}},
{DIVS_81E8,{2U,2U,158U}},
{DIVS_81E8,{3U,2U,158U}},
{DIVS_81E8,{4U,2U,158U}},
{DIVS_81E8,{5U,2U,158U}},
{DIVS_81E8,{6U,2U,158U}},
{DIVS_81E8,{7U,2U,158U}},
{DIVS_81F0,{0U,2U,160U}},
{DIVS_81F0,{1U,2U,160U}},
{DIVS_81F0,{2U,2U,160U}},
{DIVS_81F0,{3U,2U,160U}},
{DIVS_81F0,{4U,2U,160U}},
{DIVS_81F0,{5U,2U,160U}},
{DIVS_81F0,{6U,2U,160U}},
{DIVS_81F0,{7U,2U,160U}},
{DIVS_81F8,{0U,2U,158U}},
{DIVS_81F9,{0U,2U,162U}},
{DIVS_81FA,{0U,2U,158U}},
{DIVS_81FB,{0U,2U,160U}},
{DIVS_81FC,{0U,2U,154U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8000,{0U,3U,0U}},
{OR_8000,{1U,3U,0U}},
{OR_8000,{2U,3U,0U}},
{OR_8000,{3U,3U,0U}},
{OR_8000,{4U,3U,0U}},
{OR_8000,{5U,3U,0U}},
{OR_8000,{6U,3U,0U}},
{OR_8000,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8010,{0U,3U,0U}},
{OR_8010,{1U,3U,0U}},
{OR_8010,{2U,3U,0U}},
{OR_8010,{3U,3U,0U}},
{OR_8010,{4U,3U,0U}},
{OR_8010,{5U,3U,0U}},
{OR_8010,{6U,3U,0U}},
{OR_8010,{7U,3U,0U}},
{OR_8018,{0U,3U,0U}},
{OR_8018,{1U,3U,0U}},
{OR_8018,{2U,3U,0U}},
{OR_8018,{3U,3U,0U}},
{OR_8018,{4U,3U,0U}},
{OR_8018,{5U,3U,0U}},
{OR_8018,{6U,3U,0U}},
{OR_8018,{7U,3U,0U}},
{OR_8020,{0U,3U,0U}},
{OR_8020,{1U,3U,0U}},
{OR_8020,{2U,3U,0U}},
{OR_8020,{3U,3U,0U}},
{OR_8020,{4U,3U,0U}},
{OR_8020,{5U,3U,0U}},
{OR_8020,{6U,3U,0U}},
{OR_8020,{7U,3U,0U}},
{OR_8028,{0U,3U,0U}},
{OR_8028,{1U,3U,0U}},
{OR_8028,{2U,3U,0U}},
{OR_8028,{3U,3U,0U}},
{OR_8028,{4U,3U,0U}},
{OR_8028,{5U,3U,0U}},
{OR_8028,{6U,3U,0U}},
{OR_8028,{7U,3U,0U}},
{OR_8030,{0U,3U,0U}},
{OR_8030,{1U,3U,0U}},
{OR_8030,{2U,3U,0U}},
{OR_8030,{3U,3U,0U}},
{OR_8030,{4U,3U,0U}},
{OR_8030,{5U,3U,0U}},
{OR_8030,{6U,3U,0U}},
{OR_8030,{7U,3U,0U}},
{OR_8038,{0U,3U,0U}},
{OR_8039,{0U,3U,0U}},
{OR_803A,{0U,3U,0U}},
{OR_803B,{0U,3U,0U}},
{OR_803C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8040,{0U,3U,0U}},
{OR_8040,{1U,3U,0U}},
{OR_8040,{2U,3U,0U}},
{OR_8040,{3U,3U,0U}},
{OR_8040,{4U,3U,0U}},
{OR_8040,{5U,3U,0U}},
{OR_8040,{6U,3U,0U}},
{OR_8040,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8050,{0U,3U,0U}},
{OR_8050,{1U,3U,0U}},
{OR_8050,{2U,3U,0U}},
{OR_8050,{3U,3U,0U}},
{OR_8050,{4U,3U,0U}},
{OR_8050,{5U,3U,0U}},
{OR_8050,{6U,3U,0U}},
{OR_8050,{7U,3U,0U}},
{OR_8058,{0U,3U,0U}},
{OR_8058,{1U,3U,0U}},
{OR_8058,{2U,3U,0U}},
{OR_8058,{3U,3U,0U}},
{OR_8058,{4U,3U,0U}},
{OR_8058,{5U,3U,0U}},
{OR_8058,{6U,3U,0U}},
{OR_8058,{7U,3U,0U}},
{OR_8060,{0U,3U,0U}},
{OR_8060,{1U,3U,0U}},
{OR_8060,{2U,3U,0U}},
{OR_8060,{3U,3U,0U}},
{OR_8060,{4U,3U,0U}},
{OR_8060,{5U,3U,0U}},
{OR_8060,{6U,3U,0U}},
{OR_8060,{7U,3U,0U}},
{OR_8068,{0U,3U,0U}},
{OR_8068,{1U,3U,0U}},
{OR_8068,{2U,3U,0U}},
{OR_8068,{3U,3U,0U}},
{OR_8068,{4U,3U,0U}},
{OR_8068,{5U,3U,0U}},
{OR_8068,{6U,3U,0U}},
{OR_8068,{7U,3U,0U}},
{OR_8070,{0U,3U,0U}},
{OR_8070,{1U,3U,0U}},
{OR_8070,{2U,3U,0U}},
{OR_8070,{3U,3U,0U}},
{OR_8070,{4U,3U,0U}},
{OR_8070,{5U,3U,0U}},
{OR_8070,{6U,3U,0U}},
{OR_8070,{7U,3U,0U}},
{OR_8078,{0U,3U,0U}},
{OR_8079,{0U,3U,0U}},
{OR_807A,{0U,3U,0U}},
{OR_807B,{0U,3U,0U}},
{OR_807C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8080,{0U,3U,0U}},
{OR_8080,{1U,3U,0U}},
{OR_8080,{2U,3U,0U}},
{OR_8080,{3U,3U,0U}},
{OR_8080,{4U,3U,0U}},
{OR_8080,{5U,3U,0U}},
{OR_8080,{6U,3U,0U}},
{OR_8080,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8090,{0U,3U,0U}},
{OR_8090,{1U,3U,0U}},
{OR_8090,{2U,3U,0U}},
{OR_8090,{3U,3U,0U}},
{OR_8090,{4U,3U,0U}},
{OR_8090,{5U,3U,0U}},
{OR_8090,{6U,3U,0U}},
{OR_8090,{7U,3U,0U}},
{OR_8098,{0U,3U,0U}},
{OR_8098,{1U,3U,0U}},
{OR_8098,{2U,3U,0U}},
{OR_8098,{3U,3U,0U}},
{OR_8098,{4U,3U,0U}},
{OR_8098,{5U,3U,0U}},
{OR_8098,{6U,3U,0U}},
{OR_8098,{7U,3U,0U}},
{OR_80A0,{0U,3U,0U}},
{OR_80A0,{1U,3U,0U}},
{OR_80A0,{2U,3U,0U}},
{OR_80A0,{3U,3U,0U}},
{OR_80A0,{4U,3U,0U}},
{OR_80A0,{5U,3U,0U}},
{OR_80A0,{6U,3U,0U}},
{OR_80A0,{7U,3U,0U}},
{OR_80A8,{0U,3U,0U}},
{OR_80A8,{1U,3U,0U}},
{OR_80A8,{2U,3U,0U}},
{OR_80A8,{3U,3U,0U}},
{OR_80A8,{4U,3U,0U}},
{OR_80A8,{5U,3U,0U}},
{OR_80A8,{6U,3U,0U}},
{OR_80A8,{7U,3U,0U}},
{OR_80B0,{0U,3U,0U}},
{OR_80B0,{1U,3U,0U}},
{OR_80B0,{2U,3U,0U}},
{OR_80B0,{3U,3U,0U}},
{OR_80B0,{4U,3U,0U}},
{OR_80B0,{5U,3U,0U}},
{OR_80B0,{6U,3U,0U}},
{OR_80B0,{7U,3U,0U}},
{OR_80B8,{0U,3U,0U}},
{OR_80B9,{0U,3U,0U}},
{OR_80BA,{0U,3U,0U}},
{OR_80BB,{0U,3U,0U}},
{OR_80BC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80C0,{0U,3U,132U}},
{DIVU_80C0,{1U,3U,132U}},
{DIVU_80C0,{2U,3U,132U}},
{DIVU_80C0,{3U,3U,132U}},
{DIVU_80C0,{4U,3U,132U}},
{DIVU_80C0,{5U,3U,132U}},
{DIVU_80C0,{6U,3U,132U}},
{DIVU_80C0,{7U,3U,132U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80D0,{0U,3U,136U}},
{DIVU_80D0,{1U,3U,136U}},
{DIVU_80D0,{2U,3U,136U}},
{DIVU_80D0,{3U,3U,136U}},
{DIVU_80D0,{4U,3U,136U}},
{DIVU_80D0,{5U,3U,136U}},
{DIVU_80D0,{6U,3U,136U}},
{DIVU_80D0,{7U,3U,136U}},
{DIVU_80D8,{0U,3U,136U}},
{DIVU_80D8,{1U,3U,136U}},
{DIVU_80D8,{2U,3U,136U}},
{DIVU_80D8,{3U,3U,136U}},
{DIVU_80D8,{4U,3U,136U}},
{DIVU_80D8,{5U,3U,136U}},
{DIVU_80D8,{6U,3U,136U}},
{DIVU_80D8,{7U,3U,136U}},
{DIVU_80E0,{0U,3U,138U}},
{DIVU_80E0,{1U,3U,138U}},
{DIVU_80E0,{2U,3U,138U}},
{DIVU_80E0,{3U,3U,138U}},
{DIVU_80E0,{4U,3U,138U}},
{DIVU_80E0,{5U,3U,138U}},
{DIVU_80E0,{6U,3U,138U}},
{DIVU_80E0,{7U,3U,138U}},
{DIVU_80E8,{0U,3U,140U}},
{DIVU_80E8,{1U,3U,140U}},
{DIVU_80E8,{2U,3U,140U}},
{DIVU_80E8,{3U,3U,140U}},
{DIVU_80E8,{4U,3U,140U}},
{DIVU_80E8,{5U,3U,140U}},
{DIVU_80E8,{6U,3U,140U}},
{DIVU_80E8,{7U,3U,140U}},
{DIVU_80F0,{0U,3U,142U}},
{DIVU_80F0,{1U,3U,142U}},
{DIVU_80F0,{2U,3U,142U}},
{DIVU_80F0,{3U,3U,142U}},
{DIVU_80F0,{4U,3U,142U}},
{DIVU_80F0,{5U,3U,142U}},
{DIVU_80F0,{6U,3U,142U}},
{DIVU_80F0,{7U,3U,142U}},
{DIVU_80F8,{0U,3U,140U}},
{DIVU_80F9,{0U,3U,144U}},
{DIVU_80FA,{0U,3U,140U}},
{DIVU_80FB,{0U,3U,142U}},
{DIVU_80FC,{0U,3U,136U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SBCD_8100,{0U,3U,0U}},
{SBCD_8100,{1U,3U,0U}},
{SBCD_8100,{2U,3U,0U}},
{SBCD_8100,{3U,3U,0U}},
{SBCD_8100,{4U,3U,0U}},
{SBCD_8100,{5U,3U,0U}},
{SBCD_8100,{6U,3U,0U}},
{SBCD_8100,{7U,3U,0U}},
{SBCD_8108,{0U,3U,0U}},
{SBCD_8108,{1U,3U,0U}},
{SBCD_8108,{2U,3U,0U}},
{SBCD_8108,{3U,3U,0U}},
{SBCD_8108,{4U,3U,0U}},
{SBCD_8108,{5U,3U,0U}},
{SBCD_8108,{6U,3U,0U}},
{SBCD_8108,{7U,3U,0U}},
{OR_8110,{0U,3U,0U}},
{OR_8110,{1U,3U,0U}},
{OR_8110,{2U,3U,0U}},
{OR_8110,{3U,3U,0U}},
{OR_8110,{4U,3U,0U}},
{OR_8110,{5U,3U,0U}},
{OR_8110,{6U,3U,0U}},
{OR_8110,{7U,3U,0U}},
{OR_8118,{0U,3U,0U}},
{OR_8118,{1U,3U,0U}},
{OR_8118,{2U,3U,0U}},
{OR_8118,{3U,3U,0U}},
{OR_8118,{4U,3U,0U}},
{OR_8118,{5U,3U,0U}},
{OR_8118,{6U,3U,0U}},
{OR_8118,{7U,3U,0U}},
{OR_8120,{0U,3U,0U}},
{OR_8120,{1U,3U,0U}},
{OR_8120,{2U,3U,0U}},
{OR_8120,{3U,3U,0U}},
{OR_8120,{4U,3U,0U}},
{OR_8120,{5U,3U,0U}},
{OR_8120,{6U,3U,0U}},
{OR_8120,{7U,3U,0U}},
{OR_8128,{0U,3U,0U}},
{OR_8128,{1U,3U,0U}},
{OR_8128,{2U,3U,0U}},
{OR_8128,{3U,3U,0U}},
{OR_8128,{4U,3U,0U}},
{OR_8128,{5U,3U,0U}},
{OR_8128,{6U,3U,0U}},
{OR_8128,{7U,3U,0U}},
{OR_8130,{0U,3U,0U}},
{OR_8130,{1U,3U,0U}},
{OR_8130,{2U,3U,0U}},
{OR_8130,{3U,3U,0U}},
{OR_8130,{4U,3U,0U}},
{OR_8130,{5U,3U,0U}},
{OR_8130,{6U,3U,0U}},
{OR_8130,{7U,3U,0U}},
{OR_8138,{0U,3U,0U}},
{OR_8139,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PACK_8140,{3U,0U,0U}},
{PACK_8140,{3U,1U,0U}},
{PACK_8140,{3U,2U,0U}},
{PACK_8140,{3U,3U,0U}},
{PACK_8140,{3U,4U,0U}},
{PACK_8140,{3U,5U,0U}},
{PACK_8140,{3U,6U,0U}},
{PACK_8140,{3U,7U,0U}},
{PACK_8148,{3U,0U,0U}},
{PACK_8148,{3U,1U,0U}},
{PACK_8148,{3U,2U,0U}},
{PACK_8148,{3U,3U,0U}},
{PACK_8148,{3U,4U,0U}},
{PACK_8148,{3U,5U,0U}},
{PACK_8148,{3U,6U,0U}},
{PACK_8148,{3U,7U,0U}},
{OR_8150,{0U,3U,0U}},
{OR_8150,{1U,3U,0U}},
{OR_8150,{2U,3U,0U}},
{OR_8150,{3U,3U,0U}},
{OR_8150,{4U,3U,0U}},
{OR_8150,{5U,3U,0U}},
{OR_8150,{6U,3U,0U}},
{OR_8150,{7U,3U,0U}},
{OR_8158,{0U,3U,0U}},
{OR_8158,{1U,3U,0U}},
{OR_8158,{2U,3U,0U}},
{OR_8158,{3U,3U,0U}},
{OR_8158,{4U,3U,0U}},
{OR_8158,{5U,3U,0U}},
{OR_8158,{6U,3U,0U}},
{OR_8158,{7U,3U,0U}},
{OR_8160,{0U,3U,0U}},
{OR_8160,{1U,3U,0U}},
{OR_8160,{2U,3U,0U}},
{OR_8160,{3U,3U,0U}},
{OR_8160,{4U,3U,0U}},
{OR_8160,{5U,3U,0U}},
{OR_8160,{6U,3U,0U}},
{OR_8160,{7U,3U,0U}},
{OR_8168,{0U,3U,0U}},
{OR_8168,{1U,3U,0U}},
{OR_8168,{2U,3U,0U}},
{OR_8168,{3U,3U,0U}},
{OR_8168,{4U,3U,0U}},
{OR_8168,{5U,3U,0U}},
{OR_8168,{6U,3U,0U}},
{OR_8168,{7U,3U,0U}},
{OR_8170,{0U,3U,0U}},
{OR_8170,{1U,3U,0U}},
{OR_8170,{2U,3U,0U}},
{OR_8170,{3U,3U,0U}},
{OR_8170,{4U,3U,0U}},
{OR_8170,{5U,3U,0U}},
{OR_8170,{6U,3U,0U}},
{OR_8170,{7U,3U,0U}},
{OR_8178,{0U,3U,0U}},
{OR_8179,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{UNPK_8180,{3U,0U,0U}},
{UNPK_8180,{3U,1U,0U}},
{UNPK_8180,{3U,2U,0U}},
{UNPK_8180,{3U,3U,0U}},
{UNPK_8180,{3U,4U,0U}},
{UNPK_8180,{3U,5U,0U}},
{UNPK_8180,{3U,6U,0U}},
{UNPK_8180,{3U,7U,0U}},
{UNPK_8188,{3U,0U,0U}},
{UNPK_8188,{3U,1U,0U}},
{UNPK_8188,{3U,2U,0U}},
{UNPK_8188,{3U,3U,0U}},
{UNPK_8188,{3U,4U,0U}},
{UNPK_8188,{3U,5U,0U}},
{UNPK_8188,{3U,6U,0U}},
{UNPK_8188,{3U,7U,0U}},
{OR_8190,{0U,3U,0U}},
{OR_8190,{1U,3U,0U}},
{OR_8190,{2U,3U,0U}},
{OR_8190,{3U,3U,0U}},
{OR_8190,{4U,3U,0U}},
{OR_8190,{5U,3U,0U}},
{OR_8190,{6U,3U,0U}},
{OR_8190,{7U,3U,0U}},
{OR_8198,{0U,3U,0U}},
{OR_8198,{1U,3U,0U}},
{OR_8198,{2U,3U,0U}},
{OR_8198,{3U,3U,0U}},
{OR_8198,{4U,3U,0U}},
{OR_8198,{5U,3U,0U}},
{OR_8198,{6U,3U,0U}},
{OR_8198,{7U,3U,0U}},
{OR_81A0,{0U,3U,0U}},
{OR_81A0,{1U,3U,0U}},
{OR_81A0,{2U,3U,0U}},
{OR_81A0,{3U,3U,0U}},
{OR_81A0,{4U,3U,0U}},
{OR_81A0,{5U,3U,0U}},
{OR_81A0,{6U,3U,0U}},
{OR_81A0,{7U,3U,0U}},
{OR_81A8,{0U,3U,0U}},
{OR_81A8,{1U,3U,0U}},
{OR_81A8,{2U,3U,0U}},
{OR_81A8,{3U,3U,0U}},
{OR_81A8,{4U,3U,0U}},
{OR_81A8,{5U,3U,0U}},
{OR_81A8,{6U,3U,0U}},
{OR_81A8,{7U,3U,0U}},
{OR_81B0,{0U,3U,0U}},
{OR_81B0,{1U,3U,0U}},
{OR_81B0,{2U,3U,0U}},
{OR_81B0,{3U,3U,0U}},
{OR_81B0,{4U,3U,0U}},
{OR_81B0,{5U,3U,0U}},
{OR_81B0,{6U,3U,0U}},
{OR_81B0,{7U,3U,0U}},
{OR_81B8,{0U,3U,0U}},
{OR_81B9,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81C0,{0U,3U,150U}},
{DIVS_81C0,{1U,3U,150U}},
{DIVS_81C0,{2U,3U,150U}},
{DIVS_81C0,{3U,3U,150U}},
{DIVS_81C0,{4U,3U,150U}},
{DIVS_81C0,{5U,3U,150U}},
{DIVS_81C0,{6U,3U,150U}},
{DIVS_81C0,{7U,3U,150U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81D0,{0U,3U,154U}},
{DIVS_81D0,{1U,3U,154U}},
{DIVS_81D0,{2U,3U,154U}},
{DIVS_81D0,{3U,3U,154U}},
{DIVS_81D0,{4U,3U,154U}},
{DIVS_81D0,{5U,3U,154U}},
{DIVS_81D0,{6U,3U,154U}},
{DIVS_81D0,{7U,3U,154U}},
{DIVS_81D8,{0U,3U,154U}},
{DIVS_81D8,{1U,3U,154U}},
{DIVS_81D8,{2U,3U,154U}},
{DIVS_81D8,{3U,3U,154U}},
{DIVS_81D8,{4U,3U,154U}},
{DIVS_81D8,{5U,3U,154U}},
{DIVS_81D8,{6U,3U,154U}},
{DIVS_81D8,{7U,3U,154U}},
{DIVS_81E0,{0U,3U,156U}},
{DIVS_81E0,{1U,3U,156U}},
{DIVS_81E0,{2U,3U,156U}},
{DIVS_81E0,{3U,3U,156U}},
{DIVS_81E0,{4U,3U,156U}},
{DIVS_81E0,{5U,3U,156U}},
{DIVS_81E0,{6U,3U,156U}},
{DIVS_81E0,{7U,3U,156U}},
{DIVS_81E8,{0U,3U,158U}},
{DIVS_81E8,{1U,3U,158U}},
{DIVS_81E8,{2U,3U,158U}},
{DIVS_81E8,{3U,3U,158U}},
{DIVS_81E8,{4U,3U,158U}},
{DIVS_81E8,{5U,3U,158U}},
{DIVS_81E8,{6U,3U,158U}},
{DIVS_81E8,{7U,3U,158U}},
{DIVS_81F0,{0U,3U,160U}},
{DIVS_81F0,{1U,3U,160U}},
{DIVS_81F0,{2U,3U,160U}},
{DIVS_81F0,{3U,3U,160U}},
{DIVS_81F0,{4U,3U,160U}},
{DIVS_81F0,{5U,3U,160U}},
{DIVS_81F0,{6U,3U,160U}},
{DIVS_81F0,{7U,3U,160U}},
{DIVS_81F8,{0U,3U,158U}},
{DIVS_81F9,{0U,3U,162U}},
{DIVS_81FA,{0U,3U,158U}},
{DIVS_81FB,{0U,3U,160U}},
{DIVS_81FC,{0U,3U,154U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8000,{0U,4U,0U}},
{OR_8000,{1U,4U,0U}},
{OR_8000,{2U,4U,0U}},
{OR_8000,{3U,4U,0U}},
{OR_8000,{4U,4U,0U}},
{OR_8000,{5U,4U,0U}},
{OR_8000,{6U,4U,0U}},
{OR_8000,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8010,{0U,4U,0U}},
{OR_8010,{1U,4U,0U}},
{OR_8010,{2U,4U,0U}},
{OR_8010,{3U,4U,0U}},
{OR_8010,{4U,4U,0U}},
{OR_8010,{5U,4U,0U}},
{OR_8010,{6U,4U,0U}},
{OR_8010,{7U,4U,0U}},
{OR_8018,{0U,4U,0U}},
{OR_8018,{1U,4U,0U}},
{OR_8018,{2U,4U,0U}},
{OR_8018,{3U,4U,0U}},
{OR_8018,{4U,4U,0U}},
{OR_8018,{5U,4U,0U}},
{OR_8018,{6U,4U,0U}},
{OR_8018,{7U,4U,0U}},
{OR_8020,{0U,4U,0U}},
{OR_8020,{1U,4U,0U}},
{OR_8020,{2U,4U,0U}},
{OR_8020,{3U,4U,0U}},
{OR_8020,{4U,4U,0U}},
{OR_8020,{5U,4U,0U}},
{OR_8020,{6U,4U,0U}},
{OR_8020,{7U,4U,0U}},
{OR_8028,{0U,4U,0U}},
{OR_8028,{1U,4U,0U}},
{OR_8028,{2U,4U,0U}},
{OR_8028,{3U,4U,0U}},
{OR_8028,{4U,4U,0U}},
{OR_8028,{5U,4U,0U}},
{OR_8028,{6U,4U,0U}},
{OR_8028,{7U,4U,0U}},
{OR_8030,{0U,4U,0U}},
{OR_8030,{1U,4U,0U}},
{OR_8030,{2U,4U,0U}},
{OR_8030,{3U,4U,0U}},
{OR_8030,{4U,4U,0U}},
{OR_8030,{5U,4U,0U}},
{OR_8030,{6U,4U,0U}},
{OR_8030,{7U,4U,0U}},
{OR_8038,{0U,4U,0U}},
{OR_8039,{0U,4U,0U}},
{OR_803A,{0U,4U,0U}},
{OR_803B,{0U,4U,0U}},
{OR_803C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8040,{0U,4U,0U}},
{OR_8040,{1U,4U,0U}},
{OR_8040,{2U,4U,0U}},
{OR_8040,{3U,4U,0U}},
{OR_8040,{4U,4U,0U}},
{OR_8040,{5U,4U,0U}},
{OR_8040,{6U,4U,0U}},
{OR_8040,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8050,{0U,4U,0U}},
{OR_8050,{1U,4U,0U}},
{OR_8050,{2U,4U,0U}},
{OR_8050,{3U,4U,0U}},
{OR_8050,{4U,4U,0U}},
{OR_8050,{5U,4U,0U}},
{OR_8050,{6U,4U,0U}},
{OR_8050,{7U,4U,0U}},
{OR_8058,{0U,4U,0U}},
{OR_8058,{1U,4U,0U}},
{OR_8058,{2U,4U,0U}},
{OR_8058,{3U,4U,0U}},
{OR_8058,{4U,4U,0U}},
{OR_8058,{5U,4U,0U}},
{OR_8058,{6U,4U,0U}},
{OR_8058,{7U,4U,0U}},
{OR_8060,{0U,4U,0U}},
{OR_8060,{1U,4U,0U}},
{OR_8060,{2U,4U,0U}},
{OR_8060,{3U,4U,0U}},
{OR_8060,{4U,4U,0U}},
{OR_8060,{5U,4U,0U}},
{OR_8060,{6U,4U,0U}},
{OR_8060,{7U,4U,0U}},
{OR_8068,{0U,4U,0U}},
{OR_8068,{1U,4U,0U}},
{OR_8068,{2U,4U,0U}},
{OR_8068,{3U,4U,0U}},
{OR_8068,{4U,4U,0U}},
{OR_8068,{5U,4U,0U}},
{OR_8068,{6U,4U,0U}},
{OR_8068,{7U,4U,0U}},
{OR_8070,{0U,4U,0U}},
{OR_8070,{1U,4U,0U}},
{OR_8070,{2U,4U,0U}},
{OR_8070,{3U,4U,0U}},
{OR_8070,{4U,4U,0U}},
{OR_8070,{5U,4U,0U}},
{OR_8070,{6U,4U,0U}},
{OR_8070,{7U,4U,0U}},
{OR_8078,{0U,4U,0U}},
{OR_8079,{0U,4U,0U}},
{OR_807A,{0U,4U,0U}},
{OR_807B,{0U,4U,0U}},
{OR_807C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8080,{0U,4U,0U}},
{OR_8080,{1U,4U,0U}},
{OR_8080,{2U,4U,0U}},
{OR_8080,{3U,4U,0U}},
{OR_8080,{4U,4U,0U}},
{OR_8080,{5U,4U,0U}},
{OR_8080,{6U,4U,0U}},
{OR_8080,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8090,{0U,4U,0U}},
{OR_8090,{1U,4U,0U}},
{OR_8090,{2U,4U,0U}},
{OR_8090,{3U,4U,0U}},
{OR_8090,{4U,4U,0U}},
{OR_8090,{5U,4U,0U}},
{OR_8090,{6U,4U,0U}},
{OR_8090,{7U,4U,0U}},
{OR_8098,{0U,4U,0U}},
{OR_8098,{1U,4U,0U}},
{OR_8098,{2U,4U,0U}},
{OR_8098,{3U,4U,0U}},
{OR_8098,{4U,4U,0U}},
{OR_8098,{5U,4U,0U}},
{OR_8098,{6U,4U,0U}},
{OR_8098,{7U,4U,0U}},
{OR_80A0,{0U,4U,0U}},
{OR_80A0,{1U,4U,0U}},
{OR_80A0,{2U,4U,0U}},
{OR_80A0,{3U,4U,0U}},
{OR_80A0,{4U,4U,0U}},
{OR_80A0,{5U,4U,0U}},
{OR_80A0,{6U,4U,0U}},
{OR_80A0,{7U,4U,0U}},
{OR_80A8,{0U,4U,0U}},
{OR_80A8,{1U,4U,0U}},
{OR_80A8,{2U,4U,0U}},
{OR_80A8,{3U,4U,0U}},
{OR_80A8,{4U,4U,0U}},
{OR_80A8,{5U,4U,0U}},
{OR_80A8,{6U,4U,0U}},
{OR_80A8,{7U,4U,0U}},
{OR_80B0,{0U,4U,0U}},
{OR_80B0,{1U,4U,0U}},
{OR_80B0,{2U,4U,0U}},
{OR_80B0,{3U,4U,0U}},
{OR_80B0,{4U,4U,0U}},
{OR_80B0,{5U,4U,0U}},
{OR_80B0,{6U,4U,0U}},
{OR_80B0,{7U,4U,0U}},
{OR_80B8,{0U,4U,0U}},
{OR_80B9,{0U,4U,0U}},
{OR_80BA,{0U,4U,0U}},
{OR_80BB,{0U,4U,0U}},
{OR_80BC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80C0,{0U,4U,132U}},
{DIVU_80C0,{1U,4U,132U}},
{DIVU_80C0,{2U,4U,132U}},
{DIVU_80C0,{3U,4U,132U}},
{DIVU_80C0,{4U,4U,132U}},
{DIVU_80C0,{5U,4U,132U}},
{DIVU_80C0,{6U,4U,132U}},
{DIVU_80C0,{7U,4U,132U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80D0,{0U,4U,136U}},
{DIVU_80D0,{1U,4U,136U}},
{DIVU_80D0,{2U,4U,136U}},
{DIVU_80D0,{3U,4U,136U}},
{DIVU_80D0,{4U,4U,136U}},
{DIVU_80D0,{5U,4U,136U}},
{DIVU_80D0,{6U,4U,136U}},
{DIVU_80D0,{7U,4U,136U}},
{DIVU_80D8,{0U,4U,136U}},
{DIVU_80D8,{1U,4U,136U}},
{DIVU_80D8,{2U,4U,136U}},
{DIVU_80D8,{3U,4U,136U}},
{DIVU_80D8,{4U,4U,136U}},
{DIVU_80D8,{5U,4U,136U}},
{DIVU_80D8,{6U,4U,136U}},
{DIVU_80D8,{7U,4U,136U}},
{DIVU_80E0,{0U,4U,138U}},
{DIVU_80E0,{1U,4U,138U}},
{DIVU_80E0,{2U,4U,138U}},
{DIVU_80E0,{3U,4U,138U}},
{DIVU_80E0,{4U,4U,138U}},
{DIVU_80E0,{5U,4U,138U}},
{DIVU_80E0,{6U,4U,138U}},
{DIVU_80E0,{7U,4U,138U}},
{DIVU_80E8,{0U,4U,140U}},
{DIVU_80E8,{1U,4U,140U}},
{DIVU_80E8,{2U,4U,140U}},
{DIVU_80E8,{3U,4U,140U}},
{DIVU_80E8,{4U,4U,140U}},
{DIVU_80E8,{5U,4U,140U}},
{DIVU_80E8,{6U,4U,140U}},
{DIVU_80E8,{7U,4U,140U}},
{DIVU_80F0,{0U,4U,142U}},
{DIVU_80F0,{1U,4U,142U}},
{DIVU_80F0,{2U,4U,142U}},
{DIVU_80F0,{3U,4U,142U}},
{DIVU_80F0,{4U,4U,142U}},
{DIVU_80F0,{5U,4U,142U}},
{DIVU_80F0,{6U,4U,142U}},
{DIVU_80F0,{7U,4U,142U}},
{DIVU_80F8,{0U,4U,140U}},
{DIVU_80F9,{0U,4U,144U}},
{DIVU_80FA,{0U,4U,140U}},
{DIVU_80FB,{0U,4U,142U}},
{DIVU_80FC,{0U,4U,136U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SBCD_8100,{0U,4U,0U}},
{SBCD_8100,{1U,4U,0U}},
{SBCD_8100,{2U,4U,0U}},
{SBCD_8100,{3U,4U,0U}},
{SBCD_8100,{4U,4U,0U}},
{SBCD_8100,{5U,4U,0U}},
{SBCD_8100,{6U,4U,0U}},
{SBCD_8100,{7U,4U,0U}},
{SBCD_8108,{0U,4U,0U}},
{SBCD_8108,{1U,4U,0U}},
{SBCD_8108,{2U,4U,0U}},
{SBCD_8108,{3U,4U,0U}},
{SBCD_8108,{4U,4U,0U}},
{SBCD_8108,{5U,4U,0U}},
{SBCD_8108,{6U,4U,0U}},
{SBCD_8108,{7U,4U,0U}},
{OR_8110,{0U,4U,0U}},
{OR_8110,{1U,4U,0U}},
{OR_8110,{2U,4U,0U}},
{OR_8110,{3U,4U,0U}},
{OR_8110,{4U,4U,0U}},
{OR_8110,{5U,4U,0U}},
{OR_8110,{6U,4U,0U}},
{OR_8110,{7U,4U,0U}},
{OR_8118,{0U,4U,0U}},
{OR_8118,{1U,4U,0U}},
{OR_8118,{2U,4U,0U}},
{OR_8118,{3U,4U,0U}},
{OR_8118,{4U,4U,0U}},
{OR_8118,{5U,4U,0U}},
{OR_8118,{6U,4U,0U}},
{OR_8118,{7U,4U,0U}},
{OR_8120,{0U,4U,0U}},
{OR_8120,{1U,4U,0U}},
{OR_8120,{2U,4U,0U}},
{OR_8120,{3U,4U,0U}},
{OR_8120,{4U,4U,0U}},
{OR_8120,{5U,4U,0U}},
{OR_8120,{6U,4U,0U}},
{OR_8120,{7U,4U,0U}},
{OR_8128,{0U,4U,0U}},
{OR_8128,{1U,4U,0U}},
{OR_8128,{2U,4U,0U}},
{OR_8128,{3U,4U,0U}},
{OR_8128,{4U,4U,0U}},
{OR_8128,{5U,4U,0U}},
{OR_8128,{6U,4U,0U}},
{OR_8128,{7U,4U,0U}},
{OR_8130,{0U,4U,0U}},
{OR_8130,{1U,4U,0U}},
{OR_8130,{2U,4U,0U}},
{OR_8130,{3U,4U,0U}},
{OR_8130,{4U,4U,0U}},
{OR_8130,{5U,4U,0U}},
{OR_8130,{6U,4U,0U}},
{OR_8130,{7U,4U,0U}},
{OR_8138,{0U,4U,0U}},
{OR_8139,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PACK_8140,{4U,0U,0U}},
{PACK_8140,{4U,1U,0U}},
{PACK_8140,{4U,2U,0U}},
{PACK_8140,{4U,3U,0U}},
{PACK_8140,{4U,4U,0U}},
{PACK_8140,{4U,5U,0U}},
{PACK_8140,{4U,6U,0U}},
{PACK_8140,{4U,7U,0U}},
{PACK_8148,{4U,0U,0U}},
{PACK_8148,{4U,1U,0U}},
{PACK_8148,{4U,2U,0U}},
{PACK_8148,{4U,3U,0U}},
{PACK_8148,{4U,4U,0U}},
{PACK_8148,{4U,5U,0U}},
{PACK_8148,{4U,6U,0U}},
{PACK_8148,{4U,7U,0U}},
{OR_8150,{0U,4U,0U}},
{OR_8150,{1U,4U,0U}},
{OR_8150,{2U,4U,0U}},
{OR_8150,{3U,4U,0U}},
{OR_8150,{4U,4U,0U}},
{OR_8150,{5U,4U,0U}},
{OR_8150,{6U,4U,0U}},
{OR_8150,{7U,4U,0U}},
{OR_8158,{0U,4U,0U}},
{OR_8158,{1U,4U,0U}},
{OR_8158,{2U,4U,0U}},
{OR_8158,{3U,4U,0U}},
{OR_8158,{4U,4U,0U}},
{OR_8158,{5U,4U,0U}},
{OR_8158,{6U,4U,0U}},
{OR_8158,{7U,4U,0U}},
{OR_8160,{0U,4U,0U}},
{OR_8160,{1U,4U,0U}},
{OR_8160,{2U,4U,0U}},
{OR_8160,{3U,4U,0U}},
{OR_8160,{4U,4U,0U}},
{OR_8160,{5U,4U,0U}},
{OR_8160,{6U,4U,0U}},
{OR_8160,{7U,4U,0U}},
{OR_8168,{0U,4U,0U}},
{OR_8168,{1U,4U,0U}},
{OR_8168,{2U,4U,0U}},
{OR_8168,{3U,4U,0U}},
{OR_8168,{4U,4U,0U}},
{OR_8168,{5U,4U,0U}},
{OR_8168,{6U,4U,0U}},
{OR_8168,{7U,4U,0U}},
{OR_8170,{0U,4U,0U}},
{OR_8170,{1U,4U,0U}},
{OR_8170,{2U,4U,0U}},
{OR_8170,{3U,4U,0U}},
{OR_8170,{4U,4U,0U}},
{OR_8170,{5U,4U,0U}},
{OR_8170,{6U,4U,0U}},
{OR_8170,{7U,4U,0U}},
{OR_8178,{0U,4U,0U}},
{OR_8179,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{UNPK_8180,{4U,0U,0U}},
{UNPK_8180,{4U,1U,0U}},
{UNPK_8180,{4U,2U,0U}},
{UNPK_8180,{4U,3U,0U}},
{UNPK_8180,{4U,4U,0U}},
{UNPK_8180,{4U,5U,0U}},
{UNPK_8180,{4U,6U,0U}},
{UNPK_8180,{4U,7U,0U}},
{UNPK_8188,{4U,0U,0U}},
{UNPK_8188,{4U,1U,0U}},
{UNPK_8188,{4U,2U,0U}},
{UNPK_8188,{4U,3U,0U}},
{UNPK_8188,{4U,4U,0U}},
{UNPK_8188,{4U,5U,0U}},
{UNPK_8188,{4U,6U,0U}},
{UNPK_8188,{4U,7U,0U}},
{OR_8190,{0U,4U,0U}},
{OR_8190,{1U,4U,0U}},
{OR_8190,{2U,4U,0U}},
{OR_8190,{3U,4U,0U}},
{OR_8190,{4U,4U,0U}},
{OR_8190,{5U,4U,0U}},
{OR_8190,{6U,4U,0U}},
{OR_8190,{7U,4U,0U}},
{OR_8198,{0U,4U,0U}},
{OR_8198,{1U,4U,0U}},
{OR_8198,{2U,4U,0U}},
{OR_8198,{3U,4U,0U}},
{OR_8198,{4U,4U,0U}},
{OR_8198,{5U,4U,0U}},
{OR_8198,{6U,4U,0U}},
{OR_8198,{7U,4U,0U}},
{OR_81A0,{0U,4U,0U}},
{OR_81A0,{1U,4U,0U}},
{OR_81A0,{2U,4U,0U}},
{OR_81A0,{3U,4U,0U}},
{OR_81A0,{4U,4U,0U}},
{OR_81A0,{5U,4U,0U}},
{OR_81A0,{6U,4U,0U}},
{OR_81A0,{7U,4U,0U}},
{OR_81A8,{0U,4U,0U}},
{OR_81A8,{1U,4U,0U}},
{OR_81A8,{2U,4U,0U}},
{OR_81A8,{3U,4U,0U}},
{OR_81A8,{4U,4U,0U}},
{OR_81A8,{5U,4U,0U}},
{OR_81A8,{6U,4U,0U}},
{OR_81A8,{7U,4U,0U}},
{OR_81B0,{0U,4U,0U}},
{OR_81B0,{1U,4U,0U}},
{OR_81B0,{2U,4U,0U}},
{OR_81B0,{3U,4U,0U}},
{OR_81B0,{4U,4U,0U}},
{OR_81B0,{5U,4U,0U}},
{OR_81B0,{6U,4U,0U}},
{OR_81B0,{7U,4U,0U}},
{OR_81B8,{0U,4U,0U}},
{OR_81B9,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81C0,{0U,4U,150U}},
{DIVS_81C0,{1U,4U,150U}},
{DIVS_81C0,{2U,4U,150U}},
{DIVS_81C0,{3U,4U,150U}},
{DIVS_81C0,{4U,4U,150U}},
{DIVS_81C0,{5U,4U,150U}},
{DIVS_81C0,{6U,4U,150U}},
{DIVS_81C0,{7U,4U,150U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81D0,{0U,4U,154U}},
{DIVS_81D0,{1U,4U,154U}},
{DIVS_81D0,{2U,4U,154U}},
{DIVS_81D0,{3U,4U,154U}},
{DIVS_81D0,{4U,4U,154U}},
{DIVS_81D0,{5U,4U,154U}},
{DIVS_81D0,{6U,4U,154U}},
{DIVS_81D0,{7U,4U,154U}},
{DIVS_81D8,{0U,4U,154U}},
{DIVS_81D8,{1U,4U,154U}},
{DIVS_81D8,{2U,4U,154U}},
{DIVS_81D8,{3U,4U,154U}},
{DIVS_81D8,{4U,4U,154U}},
{DIVS_81D8,{5U,4U,154U}},
{DIVS_81D8,{6U,4U,154U}},
{DIVS_81D8,{7U,4U,154U}},
{DIVS_81E0,{0U,4U,156U}},
{DIVS_81E0,{1U,4U,156U}},
{DIVS_81E0,{2U,4U,156U}},
{DIVS_81E0,{3U,4U,156U}},
{DIVS_81E0,{4U,4U,156U}},
{DIVS_81E0,{5U,4U,156U}},
{DIVS_81E0,{6U,4U,156U}},
{DIVS_81E0,{7U,4U,156U}},
{DIVS_81E8,{0U,4U,158U}},
{DIVS_81E8,{1U,4U,158U}},
{DIVS_81E8,{2U,4U,158U}},
{DIVS_81E8,{3U,4U,158U}},
{DIVS_81E8,{4U,4U,158U}},
{DIVS_81E8,{5U,4U,158U}},
{DIVS_81E8,{6U,4U,158U}},
{DIVS_81E8,{7U,4U,158U}},
{DIVS_81F0,{0U,4U,160U}},
{DIVS_81F0,{1U,4U,160U}},
{DIVS_81F0,{2U,4U,160U}},
{DIVS_81F0,{3U,4U,160U}},
{DIVS_81F0,{4U,4U,160U}},
{DIVS_81F0,{5U,4U,160U}},
{DIVS_81F0,{6U,4U,160U}},
{DIVS_81F0,{7U,4U,160U}},
{DIVS_81F8,{0U,4U,158U}},
{DIVS_81F9,{0U,4U,162U}},
{DIVS_81FA,{0U,4U,158U}},
{DIVS_81FB,{0U,4U,160U}},
{DIVS_81FC,{0U,4U,154U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8000,{0U,5U,0U}},
{OR_8000,{1U,5U,0U}},
{OR_8000,{2U,5U,0U}},
{OR_8000,{3U,5U,0U}},
{OR_8000,{4U,5U,0U}},
{OR_8000,{5U,5U,0U}},
{OR_8000,{6U,5U,0U}},
{OR_8000,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8010,{0U,5U,0U}},
{OR_8010,{1U,5U,0U}},
{OR_8010,{2U,5U,0U}},
{OR_8010,{3U,5U,0U}},
{OR_8010,{4U,5U,0U}},
{OR_8010,{5U,5U,0U}},
{OR_8010,{6U,5U,0U}},
{OR_8010,{7U,5U,0U}},
{OR_8018,{0U,5U,0U}},
{OR_8018,{1U,5U,0U}},
{OR_8018,{2U,5U,0U}},
{OR_8018,{3U,5U,0U}},
{OR_8018,{4U,5U,0U}},
{OR_8018,{5U,5U,0U}},
{OR_8018,{6U,5U,0U}},
{OR_8018,{7U,5U,0U}},
{OR_8020,{0U,5U,0U}},
{OR_8020,{1U,5U,0U}},
{OR_8020,{2U,5U,0U}},
{OR_8020,{3U,5U,0U}},
{OR_8020,{4U,5U,0U}},
{OR_8020,{5U,5U,0U}},
{OR_8020,{6U,5U,0U}},
{OR_8020,{7U,5U,0U}},
{OR_8028,{0U,5U,0U}},
{OR_8028,{1U,5U,0U}},
{OR_8028,{2U,5U,0U}},
{OR_8028,{3U,5U,0U}},
{OR_8028,{4U,5U,0U}},
{OR_8028,{5U,5U,0U}},
{OR_8028,{6U,5U,0U}},
{OR_8028,{7U,5U,0U}},
{OR_8030,{0U,5U,0U}},
{OR_8030,{1U,5U,0U}},
{OR_8030,{2U,5U,0U}},
{OR_8030,{3U,5U,0U}},
{OR_8030,{4U,5U,0U}},
{OR_8030,{5U,5U,0U}},
{OR_8030,{6U,5U,0U}},
{OR_8030,{7U,5U,0U}},
{OR_8038,{0U,5U,0U}},
{OR_8039,{0U,5U,0U}},
{OR_803A,{0U,5U,0U}},
{OR_803B,{0U,5U,0U}},
{OR_803C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8040,{0U,5U,0U}},
{OR_8040,{1U,5U,0U}},
{OR_8040,{2U,5U,0U}},
{OR_8040,{3U,5U,0U}},
{OR_8040,{4U,5U,0U}},
{OR_8040,{5U,5U,0U}},
{OR_8040,{6U,5U,0U}},
{OR_8040,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8050,{0U,5U,0U}},
{OR_8050,{1U,5U,0U}},
{OR_8050,{2U,5U,0U}},
{OR_8050,{3U,5U,0U}},
{OR_8050,{4U,5U,0U}},
{OR_8050,{5U,5U,0U}},
{OR_8050,{6U,5U,0U}},
{OR_8050,{7U,5U,0U}},
{OR_8058,{0U,5U,0U}},
{OR_8058,{1U,5U,0U}},
{OR_8058,{2U,5U,0U}},
{OR_8058,{3U,5U,0U}},
{OR_8058,{4U,5U,0U}},
{OR_8058,{5U,5U,0U}},
{OR_8058,{6U,5U,0U}},
{OR_8058,{7U,5U,0U}},
{OR_8060,{0U,5U,0U}},
{OR_8060,{1U,5U,0U}},
{OR_8060,{2U,5U,0U}},
{OR_8060,{3U,5U,0U}},
{OR_8060,{4U,5U,0U}},
{OR_8060,{5U,5U,0U}},
{OR_8060,{6U,5U,0U}},
{OR_8060,{7U,5U,0U}},
{OR_8068,{0U,5U,0U}},
{OR_8068,{1U,5U,0U}},
{OR_8068,{2U,5U,0U}},
{OR_8068,{3U,5U,0U}},
{OR_8068,{4U,5U,0U}},
{OR_8068,{5U,5U,0U}},
{OR_8068,{6U,5U,0U}},
{OR_8068,{7U,5U,0U}},
{OR_8070,{0U,5U,0U}},
{OR_8070,{1U,5U,0U}},
{OR_8070,{2U,5U,0U}},
{OR_8070,{3U,5U,0U}},
{OR_8070,{4U,5U,0U}},
{OR_8070,{5U,5U,0U}},
{OR_8070,{6U,5U,0U}},
{OR_8070,{7U,5U,0U}},
{OR_8078,{0U,5U,0U}},
{OR_8079,{0U,5U,0U}},
{OR_807A,{0U,5U,0U}},
{OR_807B,{0U,5U,0U}},
{OR_807C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8080,{0U,5U,0U}},
{OR_8080,{1U,5U,0U}},
{OR_8080,{2U,5U,0U}},
{OR_8080,{3U,5U,0U}},
{OR_8080,{4U,5U,0U}},
{OR_8080,{5U,5U,0U}},
{OR_8080,{6U,5U,0U}},
{OR_8080,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8090,{0U,5U,0U}},
{OR_8090,{1U,5U,0U}},
{OR_8090,{2U,5U,0U}},
{OR_8090,{3U,5U,0U}},
{OR_8090,{4U,5U,0U}},
{OR_8090,{5U,5U,0U}},
{OR_8090,{6U,5U,0U}},
{OR_8090,{7U,5U,0U}},
{OR_8098,{0U,5U,0U}},
{OR_8098,{1U,5U,0U}},
{OR_8098,{2U,5U,0U}},
{OR_8098,{3U,5U,0U}},
{OR_8098,{4U,5U,0U}},
{OR_8098,{5U,5U,0U}},
{OR_8098,{6U,5U,0U}},
{OR_8098,{7U,5U,0U}},
{OR_80A0,{0U,5U,0U}},
{OR_80A0,{1U,5U,0U}},
{OR_80A0,{2U,5U,0U}},
{OR_80A0,{3U,5U,0U}},
{OR_80A0,{4U,5U,0U}},
{OR_80A0,{5U,5U,0U}},
{OR_80A0,{6U,5U,0U}},
{OR_80A0,{7U,5U,0U}},
{OR_80A8,{0U,5U,0U}},
{OR_80A8,{1U,5U,0U}},
{OR_80A8,{2U,5U,0U}},
{OR_80A8,{3U,5U,0U}},
{OR_80A8,{4U,5U,0U}},
{OR_80A8,{5U,5U,0U}},
{OR_80A8,{6U,5U,0U}},
{OR_80A8,{7U,5U,0U}},
{OR_80B0,{0U,5U,0U}},
{OR_80B0,{1U,5U,0U}},
{OR_80B0,{2U,5U,0U}},
{OR_80B0,{3U,5U,0U}},
{OR_80B0,{4U,5U,0U}},
{OR_80B0,{5U,5U,0U}},
{OR_80B0,{6U,5U,0U}},
{OR_80B0,{7U,5U,0U}},
{OR_80B8,{0U,5U,0U}},
{OR_80B9,{0U,5U,0U}},
{OR_80BA,{0U,5U,0U}},
{OR_80BB,{0U,5U,0U}},
{OR_80BC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80C0,{0U,5U,132U}},
{DIVU_80C0,{1U,5U,132U}},
{DIVU_80C0,{2U,5U,132U}},
{DIVU_80C0,{3U,5U,132U}},
{DIVU_80C0,{4U,5U,132U}},
{DIVU_80C0,{5U,5U,132U}},
{DIVU_80C0,{6U,5U,132U}},
{DIVU_80C0,{7U,5U,132U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80D0,{0U,5U,136U}},
{DIVU_80D0,{1U,5U,136U}},
{DIVU_80D0,{2U,5U,136U}},
{DIVU_80D0,{3U,5U,136U}},
{DIVU_80D0,{4U,5U,136U}},
{DIVU_80D0,{5U,5U,136U}},
{DIVU_80D0,{6U,5U,136U}},
{DIVU_80D0,{7U,5U,136U}},
{DIVU_80D8,{0U,5U,136U}},
{DIVU_80D8,{1U,5U,136U}},
{DIVU_80D8,{2U,5U,136U}},
{DIVU_80D8,{3U,5U,136U}},
{DIVU_80D8,{4U,5U,136U}},
{DIVU_80D8,{5U,5U,136U}},
{DIVU_80D8,{6U,5U,136U}},
{DIVU_80D8,{7U,5U,136U}},
{DIVU_80E0,{0U,5U,138U}},
{DIVU_80E0,{1U,5U,138U}},
{DIVU_80E0,{2U,5U,138U}},
{DIVU_80E0,{3U,5U,138U}},
{DIVU_80E0,{4U,5U,138U}},
{DIVU_80E0,{5U,5U,138U}},
{DIVU_80E0,{6U,5U,138U}},
{DIVU_80E0,{7U,5U,138U}},
{DIVU_80E8,{0U,5U,140U}},
{DIVU_80E8,{1U,5U,140U}},
{DIVU_80E8,{2U,5U,140U}},
{DIVU_80E8,{3U,5U,140U}},
{DIVU_80E8,{4U,5U,140U}},
{DIVU_80E8,{5U,5U,140U}},
{DIVU_80E8,{6U,5U,140U}},
{DIVU_80E8,{7U,5U,140U}},
{DIVU_80F0,{0U,5U,142U}},
{DIVU_80F0,{1U,5U,142U}},
{DIVU_80F0,{2U,5U,142U}},
{DIVU_80F0,{3U,5U,142U}},
{DIVU_80F0,{4U,5U,142U}},
{DIVU_80F0,{5U,5U,142U}},
{DIVU_80F0,{6U,5U,142U}},
{DIVU_80F0,{7U,5U,142U}},
{DIVU_80F8,{0U,5U,140U}},
{DIVU_80F9,{0U,5U,144U}},
{DIVU_80FA,{0U,5U,140U}},
{DIVU_80FB,{0U,5U,142U}},
{DIVU_80FC,{0U,5U,136U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SBCD_8100,{0U,5U,0U}},
{SBCD_8100,{1U,5U,0U}},
{SBCD_8100,{2U,5U,0U}},
{SBCD_8100,{3U,5U,0U}},
{SBCD_8100,{4U,5U,0U}},
{SBCD_8100,{5U,5U,0U}},
{SBCD_8100,{6U,5U,0U}},
{SBCD_8100,{7U,5U,0U}},
{SBCD_8108,{0U,5U,0U}},
{SBCD_8108,{1U,5U,0U}},
{SBCD_8108,{2U,5U,0U}},
{SBCD_8108,{3U,5U,0U}},
{SBCD_8108,{4U,5U,0U}},
{SBCD_8108,{5U,5U,0U}},
{SBCD_8108,{6U,5U,0U}},
{SBCD_8108,{7U,5U,0U}},
{OR_8110,{0U,5U,0U}},
{OR_8110,{1U,5U,0U}},
{OR_8110,{2U,5U,0U}},
{OR_8110,{3U,5U,0U}},
{OR_8110,{4U,5U,0U}},
{OR_8110,{5U,5U,0U}},
{OR_8110,{6U,5U,0U}},
{OR_8110,{7U,5U,0U}},
{OR_8118,{0U,5U,0U}},
{OR_8118,{1U,5U,0U}},
{OR_8118,{2U,5U,0U}},
{OR_8118,{3U,5U,0U}},
{OR_8118,{4U,5U,0U}},
{OR_8118,{5U,5U,0U}},
{OR_8118,{6U,5U,0U}},
{OR_8118,{7U,5U,0U}},
{OR_8120,{0U,5U,0U}},
{OR_8120,{1U,5U,0U}},
{OR_8120,{2U,5U,0U}},
{OR_8120,{3U,5U,0U}},
{OR_8120,{4U,5U,0U}},
{OR_8120,{5U,5U,0U}},
{OR_8120,{6U,5U,0U}},
{OR_8120,{7U,5U,0U}},
{OR_8128,{0U,5U,0U}},
{OR_8128,{1U,5U,0U}},
{OR_8128,{2U,5U,0U}},
{OR_8128,{3U,5U,0U}},
{OR_8128,{4U,5U,0U}},
{OR_8128,{5U,5U,0U}},
{OR_8128,{6U,5U,0U}},
{OR_8128,{7U,5U,0U}},
{OR_8130,{0U,5U,0U}},
{OR_8130,{1U,5U,0U}},
{OR_8130,{2U,5U,0U}},
{OR_8130,{3U,5U,0U}},
{OR_8130,{4U,5U,0U}},
{OR_8130,{5U,5U,0U}},
{OR_8130,{6U,5U,0U}},
{OR_8130,{7U,5U,0U}},
{OR_8138,{0U,5U,0U}},
{OR_8139,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PACK_8140,{5U,0U,0U}},
{PACK_8140,{5U,1U,0U}},
{PACK_8140,{5U,2U,0U}},
{PACK_8140,{5U,3U,0U}},
{PACK_8140,{5U,4U,0U}},
{PACK_8140,{5U,5U,0U}},
{PACK_8140,{5U,6U,0U}},
{PACK_8140,{5U,7U,0U}},
{PACK_8148,{5U,0U,0U}},
{PACK_8148,{5U,1U,0U}},
{PACK_8148,{5U,2U,0U}},
{PACK_8148,{5U,3U,0U}},
{PACK_8148,{5U,4U,0U}},
{PACK_8148,{5U,5U,0U}},
{PACK_8148,{5U,6U,0U}},
{PACK_8148,{5U,7U,0U}},
{OR_8150,{0U,5U,0U}},
{OR_8150,{1U,5U,0U}},
{OR_8150,{2U,5U,0U}},
{OR_8150,{3U,5U,0U}},
{OR_8150,{4U,5U,0U}},
{OR_8150,{5U,5U,0U}},
{OR_8150,{6U,5U,0U}},
{OR_8150,{7U,5U,0U}},
{OR_8158,{0U,5U,0U}},
{OR_8158,{1U,5U,0U}},
{OR_8158,{2U,5U,0U}},
{OR_8158,{3U,5U,0U}},
{OR_8158,{4U,5U,0U}},
{OR_8158,{5U,5U,0U}},
{OR_8158,{6U,5U,0U}},
{OR_8158,{7U,5U,0U}},
{OR_8160,{0U,5U,0U}},
{OR_8160,{1U,5U,0U}},
{OR_8160,{2U,5U,0U}},
{OR_8160,{3U,5U,0U}},
{OR_8160,{4U,5U,0U}},
{OR_8160,{5U,5U,0U}},
{OR_8160,{6U,5U,0U}},
{OR_8160,{7U,5U,0U}},
{OR_8168,{0U,5U,0U}},
{OR_8168,{1U,5U,0U}},
{OR_8168,{2U,5U,0U}},
{OR_8168,{3U,5U,0U}},
{OR_8168,{4U,5U,0U}},
{OR_8168,{5U,5U,0U}},
{OR_8168,{6U,5U,0U}},
{OR_8168,{7U,5U,0U}},
{OR_8170,{0U,5U,0U}},
{OR_8170,{1U,5U,0U}},
{OR_8170,{2U,5U,0U}},
{OR_8170,{3U,5U,0U}},
{OR_8170,{4U,5U,0U}},
{OR_8170,{5U,5U,0U}},
{OR_8170,{6U,5U,0U}},
{OR_8170,{7U,5U,0U}},
{OR_8178,{0U,5U,0U}},
{OR_8179,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{UNPK_8180,{5U,0U,0U}},
{UNPK_8180,{5U,1U,0U}},
{UNPK_8180,{5U,2U,0U}},
{UNPK_8180,{5U,3U,0U}},
{UNPK_8180,{5U,4U,0U}},
{UNPK_8180,{5U,5U,0U}},
{UNPK_8180,{5U,6U,0U}},
{UNPK_8180,{5U,7U,0U}},
{UNPK_8188,{5U,0U,0U}},
{UNPK_8188,{5U,1U,0U}},
{UNPK_8188,{5U,2U,0U}},
{UNPK_8188,{5U,3U,0U}},
{UNPK_8188,{5U,4U,0U}},
{UNPK_8188,{5U,5U,0U}},
{UNPK_8188,{5U,6U,0U}},
{UNPK_8188,{5U,7U,0U}},
{OR_8190,{0U,5U,0U}},
{OR_8190,{1U,5U,0U}},
{OR_8190,{2U,5U,0U}},
{OR_8190,{3U,5U,0U}},
{OR_8190,{4U,5U,0U}},
{OR_8190,{5U,5U,0U}},
{OR_8190,{6U,5U,0U}},
{OR_8190,{7U,5U,0U}},
{OR_8198,{0U,5U,0U}},
{OR_8198,{1U,5U,0U}},
{OR_8198,{2U,5U,0U}},
{OR_8198,{3U,5U,0U}},
{OR_8198,{4U,5U,0U}},
{OR_8198,{5U,5U,0U}},
{OR_8198,{6U,5U,0U}},
{OR_8198,{7U,5U,0U}},
{OR_81A0,{0U,5U,0U}},
{OR_81A0,{1U,5U,0U}},
{OR_81A0,{2U,5U,0U}},
{OR_81A0,{3U,5U,0U}},
{OR_81A0,{4U,5U,0U}},
{OR_81A0,{5U,5U,0U}},
{OR_81A0,{6U,5U,0U}},
{OR_81A0,{7U,5U,0U}},
{OR_81A8,{0U,5U,0U}},
{OR_81A8,{1U,5U,0U}},
{OR_81A8,{2U,5U,0U}},
{OR_81A8,{3U,5U,0U}},
{OR_81A8,{4U,5U,0U}},
{OR_81A8,{5U,5U,0U}},
{OR_81A8,{6U,5U,0U}},
{OR_81A8,{7U,5U,0U}},
{OR_81B0,{0U,5U,0U}},
{OR_81B0,{1U,5U,0U}},
{OR_81B0,{2U,5U,0U}},
{OR_81B0,{3U,5U,0U}},
{OR_81B0,{4U,5U,0U}},
{OR_81B0,{5U,5U,0U}},
{OR_81B0,{6U,5U,0U}},
{OR_81B0,{7U,5U,0U}},
{OR_81B8,{0U,5U,0U}},
{OR_81B9,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81C0,{0U,5U,150U}},
{DIVS_81C0,{1U,5U,150U}},
{DIVS_81C0,{2U,5U,150U}},
{DIVS_81C0,{3U,5U,150U}},
{DIVS_81C0,{4U,5U,150U}},
{DIVS_81C0,{5U,5U,150U}},
{DIVS_81C0,{6U,5U,150U}},
{DIVS_81C0,{7U,5U,150U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81D0,{0U,5U,154U}},
{DIVS_81D0,{1U,5U,154U}},
{DIVS_81D0,{2U,5U,154U}},
{DIVS_81D0,{3U,5U,154U}},
{DIVS_81D0,{4U,5U,154U}},
{DIVS_81D0,{5U,5U,154U}},
{DIVS_81D0,{6U,5U,154U}},
{DIVS_81D0,{7U,5U,154U}},
{DIVS_81D8,{0U,5U,154U}},
{DIVS_81D8,{1U,5U,154U}},
{DIVS_81D8,{2U,5U,154U}},
{DIVS_81D8,{3U,5U,154U}},
{DIVS_81D8,{4U,5U,154U}},
{DIVS_81D8,{5U,5U,154U}},
{DIVS_81D8,{6U,5U,154U}},
{DIVS_81D8,{7U,5U,154U}},
{DIVS_81E0,{0U,5U,156U}},
{DIVS_81E0,{1U,5U,156U}},
{DIVS_81E0,{2U,5U,156U}},
{DIVS_81E0,{3U,5U,156U}},
{DIVS_81E0,{4U,5U,156U}},
{DIVS_81E0,{5U,5U,156U}},
{DIVS_81E0,{6U,5U,156U}},
{DIVS_81E0,{7U,5U,156U}},
{DIVS_81E8,{0U,5U,158U}},
{DIVS_81E8,{1U,5U,158U}},
{DIVS_81E8,{2U,5U,158U}},
{DIVS_81E8,{3U,5U,158U}},
{DIVS_81E8,{4U,5U,158U}},
{DIVS_81E8,{5U,5U,158U}},
{DIVS_81E8,{6U,5U,158U}},
{DIVS_81E8,{7U,5U,158U}},
{DIVS_81F0,{0U,5U,160U}},
{DIVS_81F0,{1U,5U,160U}},
{DIVS_81F0,{2U,5U,160U}},
{DIVS_81F0,{3U,5U,160U}},
{DIVS_81F0,{4U,5U,160U}},
{DIVS_81F0,{5U,5U,160U}},
{DIVS_81F0,{6U,5U,160U}},
{DIVS_81F0,{7U,5U,160U}},
{DIVS_81F8,{0U,5U,158U}},
{DIVS_81F9,{0U,5U,162U}},
{DIVS_81FA,{0U,5U,158U}},
{DIVS_81FB,{0U,5U,160U}},
{DIVS_81FC,{0U,5U,154U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8000,{0U,6U,0U}},
{OR_8000,{1U,6U,0U}},
{OR_8000,{2U,6U,0U}},
{OR_8000,{3U,6U,0U}},
{OR_8000,{4U,6U,0U}},
{OR_8000,{5U,6U,0U}},
{OR_8000,{6U,6U,0U}},
{OR_8000,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8010,{0U,6U,0U}},
{OR_8010,{1U,6U,0U}},
{OR_8010,{2U,6U,0U}},
{OR_8010,{3U,6U,0U}},
{OR_8010,{4U,6U,0U}},
{OR_8010,{5U,6U,0U}},
{OR_8010,{6U,6U,0U}},
{OR_8010,{7U,6U,0U}},
{OR_8018,{0U,6U,0U}},
{OR_8018,{1U,6U,0U}},
{OR_8018,{2U,6U,0U}},
{OR_8018,{3U,6U,0U}},
{OR_8018,{4U,6U,0U}},
{OR_8018,{5U,6U,0U}},
{OR_8018,{6U,6U,0U}},
{OR_8018,{7U,6U,0U}},
{OR_8020,{0U,6U,0U}},
{OR_8020,{1U,6U,0U}},
{OR_8020,{2U,6U,0U}},
{OR_8020,{3U,6U,0U}},
{OR_8020,{4U,6U,0U}},
{OR_8020,{5U,6U,0U}},
{OR_8020,{6U,6U,0U}},
{OR_8020,{7U,6U,0U}},
{OR_8028,{0U,6U,0U}},
{OR_8028,{1U,6U,0U}},
{OR_8028,{2U,6U,0U}},
{OR_8028,{3U,6U,0U}},
{OR_8028,{4U,6U,0U}},
{OR_8028,{5U,6U,0U}},
{OR_8028,{6U,6U,0U}},
{OR_8028,{7U,6U,0U}},
{OR_8030,{0U,6U,0U}},
{OR_8030,{1U,6U,0U}},
{OR_8030,{2U,6U,0U}},
{OR_8030,{3U,6U,0U}},
{OR_8030,{4U,6U,0U}},
{OR_8030,{5U,6U,0U}},
{OR_8030,{6U,6U,0U}},
{OR_8030,{7U,6U,0U}},
{OR_8038,{0U,6U,0U}},
{OR_8039,{0U,6U,0U}},
{OR_803A,{0U,6U,0U}},
{OR_803B,{0U,6U,0U}},
{OR_803C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8040,{0U,6U,0U}},
{OR_8040,{1U,6U,0U}},
{OR_8040,{2U,6U,0U}},
{OR_8040,{3U,6U,0U}},
{OR_8040,{4U,6U,0U}},
{OR_8040,{5U,6U,0U}},
{OR_8040,{6U,6U,0U}},
{OR_8040,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8050,{0U,6U,0U}},
{OR_8050,{1U,6U,0U}},
{OR_8050,{2U,6U,0U}},
{OR_8050,{3U,6U,0U}},
{OR_8050,{4U,6U,0U}},
{OR_8050,{5U,6U,0U}},
{OR_8050,{6U,6U,0U}},
{OR_8050,{7U,6U,0U}},
{OR_8058,{0U,6U,0U}},
{OR_8058,{1U,6U,0U}},
{OR_8058,{2U,6U,0U}},
{OR_8058,{3U,6U,0U}},
{OR_8058,{4U,6U,0U}},
{OR_8058,{5U,6U,0U}},
{OR_8058,{6U,6U,0U}},
{OR_8058,{7U,6U,0U}},
{OR_8060,{0U,6U,0U}},
{OR_8060,{1U,6U,0U}},
{OR_8060,{2U,6U,0U}},
{OR_8060,{3U,6U,0U}},
{OR_8060,{4U,6U,0U}},
{OR_8060,{5U,6U,0U}},
{OR_8060,{6U,6U,0U}},
{OR_8060,{7U,6U,0U}},
{OR_8068,{0U,6U,0U}},
{OR_8068,{1U,6U,0U}},
{OR_8068,{2U,6U,0U}},
{OR_8068,{3U,6U,0U}},
{OR_8068,{4U,6U,0U}},
{OR_8068,{5U,6U,0U}},
{OR_8068,{6U,6U,0U}},
{OR_8068,{7U,6U,0U}},
{OR_8070,{0U,6U,0U}},
{OR_8070,{1U,6U,0U}},
{OR_8070,{2U,6U,0U}},
{OR_8070,{3U,6U,0U}},
{OR_8070,{4U,6U,0U}},
{OR_8070,{5U,6U,0U}},
{OR_8070,{6U,6U,0U}},
{OR_8070,{7U,6U,0U}},
{OR_8078,{0U,6U,0U}},
{OR_8079,{0U,6U,0U}},
{OR_807A,{0U,6U,0U}},
{OR_807B,{0U,6U,0U}},
{OR_807C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8080,{0U,6U,0U}},
{OR_8080,{1U,6U,0U}},
{OR_8080,{2U,6U,0U}},
{OR_8080,{3U,6U,0U}},
{OR_8080,{4U,6U,0U}},
{OR_8080,{5U,6U,0U}},
{OR_8080,{6U,6U,0U}},
{OR_8080,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8090,{0U,6U,0U}},
{OR_8090,{1U,6U,0U}},
{OR_8090,{2U,6U,0U}},
{OR_8090,{3U,6U,0U}},
{OR_8090,{4U,6U,0U}},
{OR_8090,{5U,6U,0U}},
{OR_8090,{6U,6U,0U}},
{OR_8090,{7U,6U,0U}},
{OR_8098,{0U,6U,0U}},
{OR_8098,{1U,6U,0U}},
{OR_8098,{2U,6U,0U}},
{OR_8098,{3U,6U,0U}},
{OR_8098,{4U,6U,0U}},
{OR_8098,{5U,6U,0U}},
{OR_8098,{6U,6U,0U}},
{OR_8098,{7U,6U,0U}},
{OR_80A0,{0U,6U,0U}},
{OR_80A0,{1U,6U,0U}},
{OR_80A0,{2U,6U,0U}},
{OR_80A0,{3U,6U,0U}},
{OR_80A0,{4U,6U,0U}},
{OR_80A0,{5U,6U,0U}},
{OR_80A0,{6U,6U,0U}},
{OR_80A0,{7U,6U,0U}},
{OR_80A8,{0U,6U,0U}},
{OR_80A8,{1U,6U,0U}},
{OR_80A8,{2U,6U,0U}},
{OR_80A8,{3U,6U,0U}},
{OR_80A8,{4U,6U,0U}},
{OR_80A8,{5U,6U,0U}},
{OR_80A8,{6U,6U,0U}},
{OR_80A8,{7U,6U,0U}},
{OR_80B0,{0U,6U,0U}},
{OR_80B0,{1U,6U,0U}},
{OR_80B0,{2U,6U,0U}},
{OR_80B0,{3U,6U,0U}},
{OR_80B0,{4U,6U,0U}},
{OR_80B0,{5U,6U,0U}},
{OR_80B0,{6U,6U,0U}},
{OR_80B0,{7U,6U,0U}},
{OR_80B8,{0U,6U,0U}},
{OR_80B9,{0U,6U,0U}},
{OR_80BA,{0U,6U,0U}},
{OR_80BB,{0U,6U,0U}},
{OR_80BC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80C0,{0U,6U,132U}},
{DIVU_80C0,{1U,6U,132U}},
{DIVU_80C0,{2U,6U,132U}},
{DIVU_80C0,{3U,6U,132U}},
{DIVU_80C0,{4U,6U,132U}},
{DIVU_80C0,{5U,6U,132U}},
{DIVU_80C0,{6U,6U,132U}},
{DIVU_80C0,{7U,6U,132U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80D0,{0U,6U,136U}},
{DIVU_80D0,{1U,6U,136U}},
{DIVU_80D0,{2U,6U,136U}},
{DIVU_80D0,{3U,6U,136U}},
{DIVU_80D0,{4U,6U,136U}},
{DIVU_80D0,{5U,6U,136U}},
{DIVU_80D0,{6U,6U,136U}},
{DIVU_80D0,{7U,6U,136U}},
{DIVU_80D8,{0U,6U,136U}},
{DIVU_80D8,{1U,6U,136U}},
{DIVU_80D8,{2U,6U,136U}},
{DIVU_80D8,{3U,6U,136U}},
{DIVU_80D8,{4U,6U,136U}},
{DIVU_80D8,{5U,6U,136U}},
{DIVU_80D8,{6U,6U,136U}},
{DIVU_80D8,{7U,6U,136U}},
{DIVU_80E0,{0U,6U,138U}},
{DIVU_80E0,{1U,6U,138U}},
{DIVU_80E0,{2U,6U,138U}},
{DIVU_80E0,{3U,6U,138U}},
{DIVU_80E0,{4U,6U,138U}},
{DIVU_80E0,{5U,6U,138U}},
{DIVU_80E0,{6U,6U,138U}},
{DIVU_80E0,{7U,6U,138U}},
{DIVU_80E8,{0U,6U,140U}},
{DIVU_80E8,{1U,6U,140U}},
{DIVU_80E8,{2U,6U,140U}},
{DIVU_80E8,{3U,6U,140U}},
{DIVU_80E8,{4U,6U,140U}},
{DIVU_80E8,{5U,6U,140U}},
{DIVU_80E8,{6U,6U,140U}},
{DIVU_80E8,{7U,6U,140U}},
{DIVU_80F0,{0U,6U,142U}},
{DIVU_80F0,{1U,6U,142U}},
{DIVU_80F0,{2U,6U,142U}},
{DIVU_80F0,{3U,6U,142U}},
{DIVU_80F0,{4U,6U,142U}},
{DIVU_80F0,{5U,6U,142U}},
{DIVU_80F0,{6U,6U,142U}},
{DIVU_80F0,{7U,6U,142U}},
{DIVU_80F8,{0U,6U,140U}},
{DIVU_80F9,{0U,6U,144U}},
{DIVU_80FA,{0U,6U,140U}},
{DIVU_80FB,{0U,6U,142U}},
{DIVU_80FC,{0U,6U,136U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SBCD_8100,{0U,6U,0U}},
{SBCD_8100,{1U,6U,0U}},
{SBCD_8100,{2U,6U,0U}},
{SBCD_8100,{3U,6U,0U}},
{SBCD_8100,{4U,6U,0U}},
{SBCD_8100,{5U,6U,0U}},
{SBCD_8100,{6U,6U,0U}},
{SBCD_8100,{7U,6U,0U}},
{SBCD_8108,{0U,6U,0U}},
{SBCD_8108,{1U,6U,0U}},
{SBCD_8108,{2U,6U,0U}},
{SBCD_8108,{3U,6U,0U}},
{SBCD_8108,{4U,6U,0U}},
{SBCD_8108,{5U,6U,0U}},
{SBCD_8108,{6U,6U,0U}},
{SBCD_8108,{7U,6U,0U}},
{OR_8110,{0U,6U,0U}},
{OR_8110,{1U,6U,0U}},
{OR_8110,{2U,6U,0U}},
{OR_8110,{3U,6U,0U}},
{OR_8110,{4U,6U,0U}},
{OR_8110,{5U,6U,0U}},
{OR_8110,{6U,6U,0U}},
{OR_8110,{7U,6U,0U}},
{OR_8118,{0U,6U,0U}},
{OR_8118,{1U,6U,0U}},
{OR_8118,{2U,6U,0U}},
{OR_8118,{3U,6U,0U}},
{OR_8118,{4U,6U,0U}},
{OR_8118,{5U,6U,0U}},
{OR_8118,{6U,6U,0U}},
{OR_8118,{7U,6U,0U}},
{OR_8120,{0U,6U,0U}},
{OR_8120,{1U,6U,0U}},
{OR_8120,{2U,6U,0U}},
{OR_8120,{3U,6U,0U}},
{OR_8120,{4U,6U,0U}},
{OR_8120,{5U,6U,0U}},
{OR_8120,{6U,6U,0U}},
{OR_8120,{7U,6U,0U}},
{OR_8128,{0U,6U,0U}},
{OR_8128,{1U,6U,0U}},
{OR_8128,{2U,6U,0U}},
{OR_8128,{3U,6U,0U}},
{OR_8128,{4U,6U,0U}},
{OR_8128,{5U,6U,0U}},
{OR_8128,{6U,6U,0U}},
{OR_8128,{7U,6U,0U}},
{OR_8130,{0U,6U,0U}},
{OR_8130,{1U,6U,0U}},
{OR_8130,{2U,6U,0U}},
{OR_8130,{3U,6U,0U}},
{OR_8130,{4U,6U,0U}},
{OR_8130,{5U,6U,0U}},
{OR_8130,{6U,6U,0U}},
{OR_8130,{7U,6U,0U}},
{OR_8138,{0U,6U,0U}},
{OR_8139,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PACK_8140,{6U,0U,0U}},
{PACK_8140,{6U,1U,0U}},
{PACK_8140,{6U,2U,0U}},
{PACK_8140,{6U,3U,0U}},
{PACK_8140,{6U,4U,0U}},
{PACK_8140,{6U,5U,0U}},
{PACK_8140,{6U,6U,0U}},
{PACK_8140,{6U,7U,0U}},
{PACK_8148,{6U,0U,0U}},
{PACK_8148,{6U,1U,0U}},
{PACK_8148,{6U,2U,0U}},
{PACK_8148,{6U,3U,0U}},
{PACK_8148,{6U,4U,0U}},
{PACK_8148,{6U,5U,0U}},
{PACK_8148,{6U,6U,0U}},
{PACK_8148,{6U,7U,0U}},
{OR_8150,{0U,6U,0U}},
{OR_8150,{1U,6U,0U}},
{OR_8150,{2U,6U,0U}},
{OR_8150,{3U,6U,0U}},
{OR_8150,{4U,6U,0U}},
{OR_8150,{5U,6U,0U}},
{OR_8150,{6U,6U,0U}},
{OR_8150,{7U,6U,0U}},
{OR_8158,{0U,6U,0U}},
{OR_8158,{1U,6U,0U}},
{OR_8158,{2U,6U,0U}},
{OR_8158,{3U,6U,0U}},
{OR_8158,{4U,6U,0U}},
{OR_8158,{5U,6U,0U}},
{OR_8158,{6U,6U,0U}},
{OR_8158,{7U,6U,0U}},
{OR_8160,{0U,6U,0U}},
{OR_8160,{1U,6U,0U}},
{OR_8160,{2U,6U,0U}},
{OR_8160,{3U,6U,0U}},
{OR_8160,{4U,6U,0U}},
{OR_8160,{5U,6U,0U}},
{OR_8160,{6U,6U,0U}},
{OR_8160,{7U,6U,0U}},
{OR_8168,{0U,6U,0U}},
{OR_8168,{1U,6U,0U}},
{OR_8168,{2U,6U,0U}},
{OR_8168,{3U,6U,0U}},
{OR_8168,{4U,6U,0U}},
{OR_8168,{5U,6U,0U}},
{OR_8168,{6U,6U,0U}},
{OR_8168,{7U,6U,0U}},
{OR_8170,{0U,6U,0U}},
{OR_8170,{1U,6U,0U}},
{OR_8170,{2U,6U,0U}},
{OR_8170,{3U,6U,0U}},
{OR_8170,{4U,6U,0U}},
{OR_8170,{5U,6U,0U}},
{OR_8170,{6U,6U,0U}},
{OR_8170,{7U,6U,0U}},
{OR_8178,{0U,6U,0U}},
{OR_8179,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{UNPK_8180,{6U,0U,0U}},
{UNPK_8180,{6U,1U,0U}},
{UNPK_8180,{6U,2U,0U}},
{UNPK_8180,{6U,3U,0U}},
{UNPK_8180,{6U,4U,0U}},
{UNPK_8180,{6U,5U,0U}},
{UNPK_8180,{6U,6U,0U}},
{UNPK_8180,{6U,7U,0U}},
{UNPK_8188,{6U,0U,0U}},
{UNPK_8188,{6U,1U,0U}},
{UNPK_8188,{6U,2U,0U}},
{UNPK_8188,{6U,3U,0U}},
{UNPK_8188,{6U,4U,0U}},
{UNPK_8188,{6U,5U,0U}},
{UNPK_8188,{6U,6U,0U}},
{UNPK_8188,{6U,7U,0U}},
{OR_8190,{0U,6U,0U}},
{OR_8190,{1U,6U,0U}},
{OR_8190,{2U,6U,0U}},
{OR_8190,{3U,6U,0U}},
{OR_8190,{4U,6U,0U}},
{OR_8190,{5U,6U,0U}},
{OR_8190,{6U,6U,0U}},
{OR_8190,{7U,6U,0U}},
{OR_8198,{0U,6U,0U}},
{OR_8198,{1U,6U,0U}},
{OR_8198,{2U,6U,0U}},
{OR_8198,{3U,6U,0U}},
{OR_8198,{4U,6U,0U}},
{OR_8198,{5U,6U,0U}},
{OR_8198,{6U,6U,0U}},
{OR_8198,{7U,6U,0U}},
{OR_81A0,{0U,6U,0U}},
{OR_81A0,{1U,6U,0U}},
{OR_81A0,{2U,6U,0U}},
{OR_81A0,{3U,6U,0U}},
{OR_81A0,{4U,6U,0U}},
{OR_81A0,{5U,6U,0U}},
{OR_81A0,{6U,6U,0U}},
{OR_81A0,{7U,6U,0U}},
{OR_81A8,{0U,6U,0U}},
{OR_81A8,{1U,6U,0U}},
{OR_81A8,{2U,6U,0U}},
{OR_81A8,{3U,6U,0U}},
{OR_81A8,{4U,6U,0U}},
{OR_81A8,{5U,6U,0U}},
{OR_81A8,{6U,6U,0U}},
{OR_81A8,{7U,6U,0U}},
{OR_81B0,{0U,6U,0U}},
{OR_81B0,{1U,6U,0U}},
{OR_81B0,{2U,6U,0U}},
{OR_81B0,{3U,6U,0U}},
{OR_81B0,{4U,6U,0U}},
{OR_81B0,{5U,6U,0U}},
{OR_81B0,{6U,6U,0U}},
{OR_81B0,{7U,6U,0U}},
{OR_81B8,{0U,6U,0U}},
{OR_81B9,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81C0,{0U,6U,150U}},
{DIVS_81C0,{1U,6U,150U}},
{DIVS_81C0,{2U,6U,150U}},
{DIVS_81C0,{3U,6U,150U}},
{DIVS_81C0,{4U,6U,150U}},
{DIVS_81C0,{5U,6U,150U}},
{DIVS_81C0,{6U,6U,150U}},
{DIVS_81C0,{7U,6U,150U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81D0,{0U,6U,154U}},
{DIVS_81D0,{1U,6U,154U}},
{DIVS_81D0,{2U,6U,154U}},
{DIVS_81D0,{3U,6U,154U}},
{DIVS_81D0,{4U,6U,154U}},
{DIVS_81D0,{5U,6U,154U}},
{DIVS_81D0,{6U,6U,154U}},
{DIVS_81D0,{7U,6U,154U}},
{DIVS_81D8,{0U,6U,154U}},
{DIVS_81D8,{1U,6U,154U}},
{DIVS_81D8,{2U,6U,154U}},
{DIVS_81D8,{3U,6U,154U}},
{DIVS_81D8,{4U,6U,154U}},
{DIVS_81D8,{5U,6U,154U}},
{DIVS_81D8,{6U,6U,154U}},
{DIVS_81D8,{7U,6U,154U}},
{DIVS_81E0,{0U,6U,156U}},
{DIVS_81E0,{1U,6U,156U}},
{DIVS_81E0,{2U,6U,156U}},
{DIVS_81E0,{3U,6U,156U}},
{DIVS_81E0,{4U,6U,156U}},
{DIVS_81E0,{5U,6U,156U}},
{DIVS_81E0,{6U,6U,156U}},
{DIVS_81E0,{7U,6U,156U}},
{DIVS_81E8,{0U,6U,158U}},
{DIVS_81E8,{1U,6U,158U}},
{DIVS_81E8,{2U,6U,158U}},
{DIVS_81E8,{3U,6U,158U}},
{DIVS_81E8,{4U,6U,158U}},
{DIVS_81E8,{5U,6U,158U}},
{DIVS_81E8,{6U,6U,158U}},
{DIVS_81E8,{7U,6U,158U}},
{DIVS_81F0,{0U,6U,160U}},
{DIVS_81F0,{1U,6U,160U}},
{DIVS_81F0,{2U,6U,160U}},
{DIVS_81F0,{3U,6U,160U}},
{DIVS_81F0,{4U,6U,160U}},
{DIVS_81F0,{5U,6U,160U}},
{DIVS_81F0,{6U,6U,160U}},
{DIVS_81F0,{7U,6U,160U}},
{DIVS_81F8,{0U,6U,158U}},
{DIVS_81F9,{0U,6U,162U}},
{DIVS_81FA,{0U,6U,158U}},
{DIVS_81FB,{0U,6U,160U}},
{DIVS_81FC,{0U,6U,154U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8000,{0U,7U,0U}},
{OR_8000,{1U,7U,0U}},
{OR_8000,{2U,7U,0U}},
{OR_8000,{3U,7U,0U}},
{OR_8000,{4U,7U,0U}},
{OR_8000,{5U,7U,0U}},
{OR_8000,{6U,7U,0U}},
{OR_8000,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8010,{0U,7U,0U}},
{OR_8010,{1U,7U,0U}},
{OR_8010,{2U,7U,0U}},
{OR_8010,{3U,7U,0U}},
{OR_8010,{4U,7U,0U}},
{OR_8010,{5U,7U,0U}},
{OR_8010,{6U,7U,0U}},
{OR_8010,{7U,7U,0U}},
{OR_8018,{0U,7U,0U}},
{OR_8018,{1U,7U,0U}},
{OR_8018,{2U,7U,0U}},
{OR_8018,{3U,7U,0U}},
{OR_8018,{4U,7U,0U}},
{OR_8018,{5U,7U,0U}},
{OR_8018,{6U,7U,0U}},
{OR_8018,{7U,7U,0U}},
{OR_8020,{0U,7U,0U}},
{OR_8020,{1U,7U,0U}},
{OR_8020,{2U,7U,0U}},
{OR_8020,{3U,7U,0U}},
{OR_8020,{4U,7U,0U}},
{OR_8020,{5U,7U,0U}},
{OR_8020,{6U,7U,0U}},
{OR_8020,{7U,7U,0U}},
{OR_8028,{0U,7U,0U}},
{OR_8028,{1U,7U,0U}},
{OR_8028,{2U,7U,0U}},
{OR_8028,{3U,7U,0U}},
{OR_8028,{4U,7U,0U}},
{OR_8028,{5U,7U,0U}},
{OR_8028,{6U,7U,0U}},
{OR_8028,{7U,7U,0U}},
{OR_8030,{0U,7U,0U}},
{OR_8030,{1U,7U,0U}},
{OR_8030,{2U,7U,0U}},
{OR_8030,{3U,7U,0U}},
{OR_8030,{4U,7U,0U}},
{OR_8030,{5U,7U,0U}},
{OR_8030,{6U,7U,0U}},
{OR_8030,{7U,7U,0U}},
{OR_8038,{0U,7U,0U}},
{OR_8039,{0U,7U,0U}},
{OR_803A,{0U,7U,0U}},
{OR_803B,{0U,7U,0U}},
{OR_803C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8040,{0U,7U,0U}},
{OR_8040,{1U,7U,0U}},
{OR_8040,{2U,7U,0U}},
{OR_8040,{3U,7U,0U}},
{OR_8040,{4U,7U,0U}},
{OR_8040,{5U,7U,0U}},
{OR_8040,{6U,7U,0U}},
{OR_8040,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8050,{0U,7U,0U}},
{OR_8050,{1U,7U,0U}},
{OR_8050,{2U,7U,0U}},
{OR_8050,{3U,7U,0U}},
{OR_8050,{4U,7U,0U}},
{OR_8050,{5U,7U,0U}},
{OR_8050,{6U,7U,0U}},
{OR_8050,{7U,7U,0U}},
{OR_8058,{0U,7U,0U}},
{OR_8058,{1U,7U,0U}},
{OR_8058,{2U,7U,0U}},
{OR_8058,{3U,7U,0U}},
{OR_8058,{4U,7U,0U}},
{OR_8058,{5U,7U,0U}},
{OR_8058,{6U,7U,0U}},
{OR_8058,{7U,7U,0U}},
{OR_8060,{0U,7U,0U}},
{OR_8060,{1U,7U,0U}},
{OR_8060,{2U,7U,0U}},
{OR_8060,{3U,7U,0U}},
{OR_8060,{4U,7U,0U}},
{OR_8060,{5U,7U,0U}},
{OR_8060,{6U,7U,0U}},
{OR_8060,{7U,7U,0U}},
{OR_8068,{0U,7U,0U}},
{OR_8068,{1U,7U,0U}},
{OR_8068,{2U,7U,0U}},
{OR_8068,{3U,7U,0U}},
{OR_8068,{4U,7U,0U}},
{OR_8068,{5U,7U,0U}},
{OR_8068,{6U,7U,0U}},
{OR_8068,{7U,7U,0U}},
{OR_8070,{0U,7U,0U}},
{OR_8070,{1U,7U,0U}},
{OR_8070,{2U,7U,0U}},
{OR_8070,{3U,7U,0U}},
{OR_8070,{4U,7U,0U}},
{OR_8070,{5U,7U,0U}},
{OR_8070,{6U,7U,0U}},
{OR_8070,{7U,7U,0U}},
{OR_8078,{0U,7U,0U}},
{OR_8079,{0U,7U,0U}},
{OR_807A,{0U,7U,0U}},
{OR_807B,{0U,7U,0U}},
{OR_807C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8080,{0U,7U,0U}},
{OR_8080,{1U,7U,0U}},
{OR_8080,{2U,7U,0U}},
{OR_8080,{3U,7U,0U}},
{OR_8080,{4U,7U,0U}},
{OR_8080,{5U,7U,0U}},
{OR_8080,{6U,7U,0U}},
{OR_8080,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{OR_8090,{0U,7U,0U}},
{OR_8090,{1U,7U,0U}},
{OR_8090,{2U,7U,0U}},
{OR_8090,{3U,7U,0U}},
{OR_8090,{4U,7U,0U}},
{OR_8090,{5U,7U,0U}},
{OR_8090,{6U,7U,0U}},
{OR_8090,{7U,7U,0U}},
{OR_8098,{0U,7U,0U}},
{OR_8098,{1U,7U,0U}},
{OR_8098,{2U,7U,0U}},
{OR_8098,{3U,7U,0U}},
{OR_8098,{4U,7U,0U}},
{OR_8098,{5U,7U,0U}},
{OR_8098,{6U,7U,0U}},
{OR_8098,{7U,7U,0U}},
{OR_80A0,{0U,7U,0U}},
{OR_80A0,{1U,7U,0U}},
{OR_80A0,{2U,7U,0U}},
{OR_80A0,{3U,7U,0U}},
{OR_80A0,{4U,7U,0U}},
{OR_80A0,{5U,7U,0U}},
{OR_80A0,{6U,7U,0U}},
{OR_80A0,{7U,7U,0U}},
{OR_80A8,{0U,7U,0U}},
{OR_80A8,{1U,7U,0U}},
{OR_80A8,{2U,7U,0U}},
{OR_80A8,{3U,7U,0U}},
{OR_80A8,{4U,7U,0U}},
{OR_80A8,{5U,7U,0U}},
{OR_80A8,{6U,7U,0U}},
{OR_80A8,{7U,7U,0U}},
{OR_80B0,{0U,7U,0U}},
{OR_80B0,{1U,7U,0U}},
{OR_80B0,{2U,7U,0U}},
{OR_80B0,{3U,7U,0U}},
{OR_80B0,{4U,7U,0U}},
{OR_80B0,{5U,7U,0U}},
{OR_80B0,{6U,7U,0U}},
{OR_80B0,{7U,7U,0U}},
{OR_80B8,{0U,7U,0U}},
{OR_80B9,{0U,7U,0U}},
{OR_80BA,{0U,7U,0U}},
{OR_80BB,{0U,7U,0U}},
{OR_80BC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80C0,{0U,7U,132U}},
{DIVU_80C0,{1U,7U,132U}},
{DIVU_80C0,{2U,7U,132U}},
{DIVU_80C0,{3U,7U,132U}},
{DIVU_80C0,{4U,7U,132U}},
{DIVU_80C0,{5U,7U,132U}},
{DIVU_80C0,{6U,7U,132U}},
{DIVU_80C0,{7U,7U,132U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVU_80D0,{0U,7U,136U}},
{DIVU_80D0,{1U,7U,136U}},
{DIVU_80D0,{2U,7U,136U}},
{DIVU_80D0,{3U,7U,136U}},
{DIVU_80D0,{4U,7U,136U}},
{DIVU_80D0,{5U,7U,136U}},
{DIVU_80D0,{6U,7U,136U}},
{DIVU_80D0,{7U,7U,136U}},
{DIVU_80D8,{0U,7U,136U}},
{DIVU_80D8,{1U,7U,136U}},
{DIVU_80D8,{2U,7U,136U}},
{DIVU_80D8,{3U,7U,136U}},
{DIVU_80D8,{4U,7U,136U}},
{DIVU_80D8,{5U,7U,136U}},
{DIVU_80D8,{6U,7U,136U}},
{DIVU_80D8,{7U,7U,136U}},
{DIVU_80E0,{0U,7U,138U}},
{DIVU_80E0,{1U,7U,138U}},
{DIVU_80E0,{2U,7U,138U}},
{DIVU_80E0,{3U,7U,138U}},
{DIVU_80E0,{4U,7U,138U}},
{DIVU_80E0,{5U,7U,138U}},
{DIVU_80E0,{6U,7U,138U}},
{DIVU_80E0,{7U,7U,138U}},
{DIVU_80E8,{0U,7U,140U}},
{DIVU_80E8,{1U,7U,140U}},
{DIVU_80E8,{2U,7U,140U}},
{DIVU_80E8,{3U,7U,140U}},
{DIVU_80E8,{4U,7U,140U}},
{DIVU_80E8,{5U,7U,140U}},
{DIVU_80E8,{6U,7U,140U}},
{DIVU_80E8,{7U,7U,140U}},
{DIVU_80F0,{0U,7U,142U}},
{DIVU_80F0,{1U,7U,142U}},
{DIVU_80F0,{2U,7U,142U}},
{DIVU_80F0,{3U,7U,142U}},
{DIVU_80F0,{4U,7U,142U}},
{DIVU_80F0,{5U,7U,142U}},
{DIVU_80F0,{6U,7U,142U}},
{DIVU_80F0,{7U,7U,142U}},
{DIVU_80F8,{0U,7U,140U}},
{DIVU_80F9,{0U,7U,144U}},
{DIVU_80FA,{0U,7U,140U}},
{DIVU_80FB,{0U,7U,142U}},
{DIVU_80FC,{0U,7U,136U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SBCD_8100,{0U,7U,0U}},
{SBCD_8100,{1U,7U,0U}},
{SBCD_8100,{2U,7U,0U}},
{SBCD_8100,{3U,7U,0U}},
{SBCD_8100,{4U,7U,0U}},
{SBCD_8100,{5U,7U,0U}},
{SBCD_8100,{6U,7U,0U}},
{SBCD_8100,{7U,7U,0U}},
{SBCD_8108,{0U,7U,0U}},
{SBCD_8108,{1U,7U,0U}},
{SBCD_8108,{2U,7U,0U}},
{SBCD_8108,{3U,7U,0U}},
{SBCD_8108,{4U,7U,0U}},
{SBCD_8108,{5U,7U,0U}},
{SBCD_8108,{6U,7U,0U}},
{SBCD_8108,{7U,7U,0U}},
{OR_8110,{0U,7U,0U}},
{OR_8110,{1U,7U,0U}},
{OR_8110,{2U,7U,0U}},
{OR_8110,{3U,7U,0U}},
{OR_8110,{4U,7U,0U}},
{OR_8110,{5U,7U,0U}},
{OR_8110,{6U,7U,0U}},
{OR_8110,{7U,7U,0U}},
{OR_8118,{0U,7U,0U}},
{OR_8118,{1U,7U,0U}},
{OR_8118,{2U,7U,0U}},
{OR_8118,{3U,7U,0U}},
{OR_8118,{4U,7U,0U}},
{OR_8118,{5U,7U,0U}},
{OR_8118,{6U,7U,0U}},
{OR_8118,{7U,7U,0U}},
{OR_8120,{0U,7U,0U}},
{OR_8120,{1U,7U,0U}},
{OR_8120,{2U,7U,0U}},
{OR_8120,{3U,7U,0U}},
{OR_8120,{4U,7U,0U}},
{OR_8120,{5U,7U,0U}},
{OR_8120,{6U,7U,0U}},
{OR_8120,{7U,7U,0U}},
{OR_8128,{0U,7U,0U}},
{OR_8128,{1U,7U,0U}},
{OR_8128,{2U,7U,0U}},
{OR_8128,{3U,7U,0U}},
{OR_8128,{4U,7U,0U}},
{OR_8128,{5U,7U,0U}},
{OR_8128,{6U,7U,0U}},
{OR_8128,{7U,7U,0U}},
{OR_8130,{0U,7U,0U}},
{OR_8130,{1U,7U,0U}},
{OR_8130,{2U,7U,0U}},
{OR_8130,{3U,7U,0U}},
{OR_8130,{4U,7U,0U}},
{OR_8130,{5U,7U,0U}},
{OR_8130,{6U,7U,0U}},
{OR_8130,{7U,7U,0U}},
{OR_8138,{0U,7U,0U}},
{OR_8139,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PACK_8140,{7U,0U,0U}},
{PACK_8140,{7U,1U,0U}},
{PACK_8140,{7U,2U,0U}},
{PACK_8140,{7U,3U,0U}},
{PACK_8140,{7U,4U,0U}},
{PACK_8140,{7U,5U,0U}},
{PACK_8140,{7U,6U,0U}},
{PACK_8140,{7U,7U,0U}},
{PACK_8148,{7U,0U,0U}},
{PACK_8148,{7U,1U,0U}},
{PACK_8148,{7U,2U,0U}},
{PACK_8148,{7U,3U,0U}},
{PACK_8148,{7U,4U,0U}},
{PACK_8148,{7U,5U,0U}},
{PACK_8148,{7U,6U,0U}},
{PACK_8148,{7U,7U,0U}},
{OR_8150,{0U,7U,0U}},
{OR_8150,{1U,7U,0U}},
{OR_8150,{2U,7U,0U}},
{OR_8150,{3U,7U,0U}},
{OR_8150,{4U,7U,0U}},
{OR_8150,{5U,7U,0U}},
{OR_8150,{6U,7U,0U}},
{OR_8150,{7U,7U,0U}},
{OR_8158,{0U,7U,0U}},
{OR_8158,{1U,7U,0U}},
{OR_8158,{2U,7U,0U}},
{OR_8158,{3U,7U,0U}},
{OR_8158,{4U,7U,0U}},
{OR_8158,{5U,7U,0U}},
{OR_8158,{6U,7U,0U}},
{OR_8158,{7U,7U,0U}},
{OR_8160,{0U,7U,0U}},
{OR_8160,{1U,7U,0U}},
{OR_8160,{2U,7U,0U}},
{OR_8160,{3U,7U,0U}},
{OR_8160,{4U,7U,0U}},
{OR_8160,{5U,7U,0U}},
{OR_8160,{6U,7U,0U}},
{OR_8160,{7U,7U,0U}},
{OR_8168,{0U,7U,0U}},
{OR_8168,{1U,7U,0U}},
{OR_8168,{2U,7U,0U}},
{OR_8168,{3U,7U,0U}},
{OR_8168,{4U,7U,0U}},
{OR_8168,{5U,7U,0U}},
{OR_8168,{6U,7U,0U}},
{OR_8168,{7U,7U,0U}},
{OR_8170,{0U,7U,0U}},
{OR_8170,{1U,7U,0U}},
{OR_8170,{2U,7U,0U}},
{OR_8170,{3U,7U,0U}},
{OR_8170,{4U,7U,0U}},
{OR_8170,{5U,7U,0U}},
{OR_8170,{6U,7U,0U}},
{OR_8170,{7U,7U,0U}},
{OR_8178,{0U,7U,0U}},
{OR_8179,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{UNPK_8180,{7U,0U,0U}},
{UNPK_8180,{7U,1U,0U}},
{UNPK_8180,{7U,2U,0U}},
{UNPK_8180,{7U,3U,0U}},
{UNPK_8180,{7U,4U,0U}},
{UNPK_8180,{7U,5U,0U}},
{UNPK_8180,{7U,6U,0U}},
{UNPK_8180,{7U,7U,0U}},
{UNPK_8188,{7U,0U,0U}},
{UNPK_8188,{7U,1U,0U}},
{UNPK_8188,{7U,2U,0U}},
{UNPK_8188,{7U,3U,0U}},
{UNPK_8188,{7U,4U,0U}},
{UNPK_8188,{7U,5U,0U}},
{UNPK_8188,{7U,6U,0U}},
{UNPK_8188,{7U,7U,0U}},
{OR_8190,{0U,7U,0U}},
{OR_8190,{1U,7U,0U}},
{OR_8190,{2U,7U,0U}},
{OR_8190,{3U,7U,0U}},
{OR_8190,{4U,7U,0U}},
{OR_8190,{5U,7U,0U}},
{OR_8190,{6U,7U,0U}},
{OR_8190,{7U,7U,0U}},
{OR_8198,{0U,7U,0U}},
{OR_8198,{1U,7U,0U}},
{OR_8198,{2U,7U,0U}},
{OR_8198,{3U,7U,0U}},
{OR_8198,{4U,7U,0U}},
{OR_8198,{5U,7U,0U}},
{OR_8198,{6U,7U,0U}},
{OR_8198,{7U,7U,0U}},
{OR_81A0,{0U,7U,0U}},
{OR_81A0,{1U,7U,0U}},
{OR_81A0,{2U,7U,0U}},
{OR_81A0,{3U,7U,0U}},
{OR_81A0,{4U,7U,0U}},
{OR_81A0,{5U,7U,0U}},
{OR_81A0,{6U,7U,0U}},
{OR_81A0,{7U,7U,0U}},
{OR_81A8,{0U,7U,0U}},
{OR_81A8,{1U,7U,0U}},
{OR_81A8,{2U,7U,0U}},
{OR_81A8,{3U,7U,0U}},
{OR_81A8,{4U,7U,0U}},
{OR_81A8,{5U,7U,0U}},
{OR_81A8,{6U,7U,0U}},
{OR_81A8,{7U,7U,0U}},
{OR_81B0,{0U,7U,0U}},
{OR_81B0,{1U,7U,0U}},
{OR_81B0,{2U,7U,0U}},
{OR_81B0,{3U,7U,0U}},
{OR_81B0,{4U,7U,0U}},
{OR_81B0,{5U,7U,0U}},
{OR_81B0,{6U,7U,0U}},
{OR_81B0,{7U,7U,0U}},
{OR_81B8,{0U,7U,0U}},
{OR_81B9,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81C0,{0U,7U,150U}},
{DIVS_81C0,{1U,7U,150U}},
{DIVS_81C0,{2U,7U,150U}},
{DIVS_81C0,{3U,7U,150U}},
{DIVS_81C0,{4U,7U,150U}},
{DIVS_81C0,{5U,7U,150U}},
{DIVS_81C0,{6U,7U,150U}},
{DIVS_81C0,{7U,7U,150U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{DIVS_81D0,{0U,7U,154U}},
{DIVS_81D0,{1U,7U,154U}},
{DIVS_81D0,{2U,7U,154U}},
{DIVS_81D0,{3U,7U,154U}},
{DIVS_81D0,{4U,7U,154U}},
{DIVS_81D0,{5U,7U,154U}},
{DIVS_81D0,{6U,7U,154U}},
{DIVS_81D0,{7U,7U,154U}},
{DIVS_81D8,{0U,7U,154U}},
{DIVS_81D8,{1U,7U,154U}},
{DIVS_81D8,{2U,7U,154U}},
{DIVS_81D8,{3U,7U,154U}},
{DIVS_81D8,{4U,7U,154U}},
{DIVS_81D8,{5U,7U,154U}},
{DIVS_81D8,{6U,7U,154U}},
{DIVS_81D8,{7U,7U,154U}},
{DIVS_81E0,{0U,7U,156U}},
{DIVS_81E0,{1U,7U,156U}},
{DIVS_81E0,{2U,7U,156U}},
{DIVS_81E0,{3U,7U,156U}},
{DIVS_81E0,{4U,7U,156U}},
{DIVS_81E0,{5U,7U,156U}},
{DIVS_81E0,{6U,7U,156U}},
{DIVS_81E0,{7U,7U,156U}},
{DIVS_81E8,{0U,7U,158U}},
{DIVS_81E8,{1U,7U,158U}},
{DIVS_81E8,{2U,7U,158U}},
{DIVS_81E8,{3U,7U,158U}},
{DIVS_81E8,{4U,7U,158U}},
{DIVS_81E8,{5U,7U,158U}},
{DIVS_81E8,{6U,7U,158U}},
{DIVS_81E8,{7U,7U,158U}},
{DIVS_81F0,{0U,7U,160U}},
{DIVS_81F0,{1U,7U,160U}},
{DIVS_81F0,{2U,7U,160U}},
{DIVS_81F0,{3U,7U,160U}},
{DIVS_81F0,{4U,7U,160U}},
{DIVS_81F0,{5U,7U,160U}},
{DIVS_81F0,{6U,7U,160U}},
{DIVS_81F0,{7U,7U,160U}},
{DIVS_81F8,{0U,7U,158U}},
{DIVS_81F9,{0U,7U,162U}},
{DIVS_81FA,{0U,7U,158U}},
{DIVS_81FB,{0U,7U,160U}},
{DIVS_81FC,{0U,7U,154U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9000,{0U,0U,0U}},
{SUB_9000,{1U,0U,0U}},
{SUB_9000,{2U,0U,0U}},
{SUB_9000,{3U,0U,0U}},
{SUB_9000,{4U,0U,0U}},
{SUB_9000,{5U,0U,0U}},
{SUB_9000,{6U,0U,0U}},
{SUB_9000,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9010,{0U,0U,0U}},
{SUB_9010,{1U,0U,0U}},
{SUB_9010,{2U,0U,0U}},
{SUB_9010,{3U,0U,0U}},
{SUB_9010,{4U,0U,0U}},
{SUB_9010,{5U,0U,0U}},
{SUB_9010,{6U,0U,0U}},
{SUB_9010,{7U,0U,0U}},
{SUB_9018,{0U,0U,0U}},
{SUB_9018,{1U,0U,0U}},
{SUB_9018,{2U,0U,0U}},
{SUB_9018,{3U,0U,0U}},
{SUB_9018,{4U,0U,0U}},
{SUB_9018,{5U,0U,0U}},
{SUB_9018,{6U,0U,0U}},
{SUB_9018,{7U,0U,0U}},
{SUB_9020,{0U,0U,0U}},
{SUB_9020,{1U,0U,0U}},
{SUB_9020,{2U,0U,0U}},
{SUB_9020,{3U,0U,0U}},
{SUB_9020,{4U,0U,0U}},
{SUB_9020,{5U,0U,0U}},
{SUB_9020,{6U,0U,0U}},
{SUB_9020,{7U,0U,0U}},
{SUB_9028,{0U,0U,0U}},
{SUB_9028,{1U,0U,0U}},
{SUB_9028,{2U,0U,0U}},
{SUB_9028,{3U,0U,0U}},
{SUB_9028,{4U,0U,0U}},
{SUB_9028,{5U,0U,0U}},
{SUB_9028,{6U,0U,0U}},
{SUB_9028,{7U,0U,0U}},
{SUB_9030,{0U,0U,0U}},
{SUB_9030,{1U,0U,0U}},
{SUB_9030,{2U,0U,0U}},
{SUB_9030,{3U,0U,0U}},
{SUB_9030,{4U,0U,0U}},
{SUB_9030,{5U,0U,0U}},
{SUB_9030,{6U,0U,0U}},
{SUB_9030,{7U,0U,0U}},
{SUB_9038,{0U,0U,0U}},
{SUB_9039,{0U,0U,0U}},
{SUB_903A,{0U,0U,0U}},
{SUB_903B,{0U,0U,0U}},
{SUB_903C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9040,{0U,0U,0U}},
{SUB_9040,{1U,0U,0U}},
{SUB_9040,{2U,0U,0U}},
{SUB_9040,{3U,0U,0U}},
{SUB_9040,{4U,0U,0U}},
{SUB_9040,{5U,0U,0U}},
{SUB_9040,{6U,0U,0U}},
{SUB_9040,{7U,0U,0U}},
{SUB_9048,{0U,0U,0U}},
{SUB_9048,{1U,0U,0U}},
{SUB_9048,{2U,0U,0U}},
{SUB_9048,{3U,0U,0U}},
{SUB_9048,{4U,0U,0U}},
{SUB_9048,{5U,0U,0U}},
{SUB_9048,{6U,0U,0U}},
{SUB_9048,{7U,0U,0U}},
{SUB_9050,{0U,0U,0U}},
{SUB_9050,{1U,0U,0U}},
{SUB_9050,{2U,0U,0U}},
{SUB_9050,{3U,0U,0U}},
{SUB_9050,{4U,0U,0U}},
{SUB_9050,{5U,0U,0U}},
{SUB_9050,{6U,0U,0U}},
{SUB_9050,{7U,0U,0U}},
{SUB_9058,{0U,0U,0U}},
{SUB_9058,{1U,0U,0U}},
{SUB_9058,{2U,0U,0U}},
{SUB_9058,{3U,0U,0U}},
{SUB_9058,{4U,0U,0U}},
{SUB_9058,{5U,0U,0U}},
{SUB_9058,{6U,0U,0U}},
{SUB_9058,{7U,0U,0U}},
{SUB_9060,{0U,0U,0U}},
{SUB_9060,{1U,0U,0U}},
{SUB_9060,{2U,0U,0U}},
{SUB_9060,{3U,0U,0U}},
{SUB_9060,{4U,0U,0U}},
{SUB_9060,{5U,0U,0U}},
{SUB_9060,{6U,0U,0U}},
{SUB_9060,{7U,0U,0U}},
{SUB_9068,{0U,0U,0U}},
{SUB_9068,{1U,0U,0U}},
{SUB_9068,{2U,0U,0U}},
{SUB_9068,{3U,0U,0U}},
{SUB_9068,{4U,0U,0U}},
{SUB_9068,{5U,0U,0U}},
{SUB_9068,{6U,0U,0U}},
{SUB_9068,{7U,0U,0U}},
{SUB_9070,{0U,0U,0U}},
{SUB_9070,{1U,0U,0U}},
{SUB_9070,{2U,0U,0U}},
{SUB_9070,{3U,0U,0U}},
{SUB_9070,{4U,0U,0U}},
{SUB_9070,{5U,0U,0U}},
{SUB_9070,{6U,0U,0U}},
{SUB_9070,{7U,0U,0U}},
{SUB_9078,{0U,0U,0U}},
{SUB_9079,{0U,0U,0U}},
{SUB_907A,{0U,0U,0U}},
{SUB_907B,{0U,0U,0U}},
{SUB_907C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9080,{0U,0U,0U}},
{SUB_9080,{1U,0U,0U}},
{SUB_9080,{2U,0U,0U}},
{SUB_9080,{3U,0U,0U}},
{SUB_9080,{4U,0U,0U}},
{SUB_9080,{5U,0U,0U}},
{SUB_9080,{6U,0U,0U}},
{SUB_9080,{7U,0U,0U}},
{SUB_9088,{0U,0U,0U}},
{SUB_9088,{1U,0U,0U}},
{SUB_9088,{2U,0U,0U}},
{SUB_9088,{3U,0U,0U}},
{SUB_9088,{4U,0U,0U}},
{SUB_9088,{5U,0U,0U}},
{SUB_9088,{6U,0U,0U}},
{SUB_9088,{7U,0U,0U}},
{SUB_9090,{0U,0U,0U}},
{SUB_9090,{1U,0U,0U}},
{SUB_9090,{2U,0U,0U}},
{SUB_9090,{3U,0U,0U}},
{SUB_9090,{4U,0U,0U}},
{SUB_9090,{5U,0U,0U}},
{SUB_9090,{6U,0U,0U}},
{SUB_9090,{7U,0U,0U}},
{SUB_9098,{0U,0U,0U}},
{SUB_9098,{1U,0U,0U}},
{SUB_9098,{2U,0U,0U}},
{SUB_9098,{3U,0U,0U}},
{SUB_9098,{4U,0U,0U}},
{SUB_9098,{5U,0U,0U}},
{SUB_9098,{6U,0U,0U}},
{SUB_9098,{7U,0U,0U}},
{SUB_90A0,{0U,0U,0U}},
{SUB_90A0,{1U,0U,0U}},
{SUB_90A0,{2U,0U,0U}},
{SUB_90A0,{3U,0U,0U}},
{SUB_90A0,{4U,0U,0U}},
{SUB_90A0,{5U,0U,0U}},
{SUB_90A0,{6U,0U,0U}},
{SUB_90A0,{7U,0U,0U}},
{SUB_90A8,{0U,0U,0U}},
{SUB_90A8,{1U,0U,0U}},
{SUB_90A8,{2U,0U,0U}},
{SUB_90A8,{3U,0U,0U}},
{SUB_90A8,{4U,0U,0U}},
{SUB_90A8,{5U,0U,0U}},
{SUB_90A8,{6U,0U,0U}},
{SUB_90A8,{7U,0U,0U}},
{SUB_90B0,{0U,0U,0U}},
{SUB_90B0,{1U,0U,0U}},
{SUB_90B0,{2U,0U,0U}},
{SUB_90B0,{3U,0U,0U}},
{SUB_90B0,{4U,0U,0U}},
{SUB_90B0,{5U,0U,0U}},
{SUB_90B0,{6U,0U,0U}},
{SUB_90B0,{7U,0U,0U}},
{SUB_90B8,{0U,0U,0U}},
{SUB_90B9,{0U,0U,0U}},
{SUB_90BA,{0U,0U,0U}},
{SUB_90BB,{0U,0U,0U}},
{SUB_90BC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_90C0,{0U,0U,0U}},
{SUBA_90C0,{1U,0U,0U}},
{SUBA_90C0,{2U,0U,0U}},
{SUBA_90C0,{3U,0U,0U}},
{SUBA_90C0,{4U,0U,0U}},
{SUBA_90C0,{5U,0U,0U}},
{SUBA_90C0,{6U,0U,0U}},
{SUBA_90C0,{7U,0U,0U}},
{SUBA_90C8,{0U,0U,0U}},
{SUBA_90C8,{1U,0U,0U}},
{SUBA_90C8,{2U,0U,0U}},
{SUBA_90C8,{3U,0U,0U}},
{SUBA_90C8,{4U,0U,0U}},
{SUBA_90C8,{5U,0U,0U}},
{SUBA_90C8,{6U,0U,0U}},
{SUBA_90C8,{7U,0U,0U}},
{SUBA_90D0,{0U,0U,0U}},
{SUBA_90D0,{1U,0U,0U}},
{SUBA_90D0,{2U,0U,0U}},
{SUBA_90D0,{3U,0U,0U}},
{SUBA_90D0,{4U,0U,0U}},
{SUBA_90D0,{5U,0U,0U}},
{SUBA_90D0,{6U,0U,0U}},
{SUBA_90D0,{7U,0U,0U}},
{SUBA_90D8,{0U,0U,0U}},
{SUBA_90D8,{1U,0U,0U}},
{SUBA_90D8,{2U,0U,0U}},
{SUBA_90D8,{3U,0U,0U}},
{SUBA_90D8,{4U,0U,0U}},
{SUBA_90D8,{5U,0U,0U}},
{SUBA_90D8,{6U,0U,0U}},
{SUBA_90D8,{7U,0U,0U}},
{SUBA_90E0,{0U,0U,0U}},
{SUBA_90E0,{1U,0U,0U}},
{SUBA_90E0,{2U,0U,0U}},
{SUBA_90E0,{3U,0U,0U}},
{SUBA_90E0,{4U,0U,0U}},
{SUBA_90E0,{5U,0U,0U}},
{SUBA_90E0,{6U,0U,0U}},
{SUBA_90E0,{7U,0U,0U}},
{SUBA_90E8,{0U,0U,0U}},
{SUBA_90E8,{1U,0U,0U}},
{SUBA_90E8,{2U,0U,0U}},
{SUBA_90E8,{3U,0U,0U}},
{SUBA_90E8,{4U,0U,0U}},
{SUBA_90E8,{5U,0U,0U}},
{SUBA_90E8,{6U,0U,0U}},
{SUBA_90E8,{7U,0U,0U}},
{SUBA_90F0,{0U,0U,0U}},
{SUBA_90F0,{1U,0U,0U}},
{SUBA_90F0,{2U,0U,0U}},
{SUBA_90F0,{3U,0U,0U}},
{SUBA_90F0,{4U,0U,0U}},
{SUBA_90F0,{5U,0U,0U}},
{SUBA_90F0,{6U,0U,0U}},
{SUBA_90F0,{7U,0U,0U}},
{SUBA_90F8,{0U,0U,0U}},
{SUBA_90F9,{0U,0U,0U}},
{SUBA_90FA,{0U,0U,0U}},
{SUBA_90FB,{0U,0U,0U}},
{SUBA_90FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9100,{0U,0U,0U}},
{SUBX_9100,{1U,0U,0U}},
{SUBX_9100,{2U,0U,0U}},
{SUBX_9100,{3U,0U,0U}},
{SUBX_9100,{4U,0U,0U}},
{SUBX_9100,{5U,0U,0U}},
{SUBX_9100,{6U,0U,0U}},
{SUBX_9100,{7U,0U,0U}},
{SUBX_9108,{0U,0U,0U}},
{SUBX_9108,{1U,0U,0U}},
{SUBX_9108,{2U,0U,0U}},
{SUBX_9108,{3U,0U,0U}},
{SUBX_9108,{4U,0U,0U}},
{SUBX_9108,{5U,0U,0U}},
{SUBX_9108,{6U,0U,0U}},
{SUBX_9108,{7U,0U,0U}},
{SUB_9110,{0U,0U,0U}},
{SUB_9110,{1U,0U,0U}},
{SUB_9110,{2U,0U,0U}},
{SUB_9110,{3U,0U,0U}},
{SUB_9110,{4U,0U,0U}},
{SUB_9110,{5U,0U,0U}},
{SUB_9110,{6U,0U,0U}},
{SUB_9110,{7U,0U,0U}},
{SUB_9118,{0U,0U,0U}},
{SUB_9118,{1U,0U,0U}},
{SUB_9118,{2U,0U,0U}},
{SUB_9118,{3U,0U,0U}},
{SUB_9118,{4U,0U,0U}},
{SUB_9118,{5U,0U,0U}},
{SUB_9118,{6U,0U,0U}},
{SUB_9118,{7U,0U,0U}},
{SUB_9120,{0U,0U,0U}},
{SUB_9120,{1U,0U,0U}},
{SUB_9120,{2U,0U,0U}},
{SUB_9120,{3U,0U,0U}},
{SUB_9120,{4U,0U,0U}},
{SUB_9120,{5U,0U,0U}},
{SUB_9120,{6U,0U,0U}},
{SUB_9120,{7U,0U,0U}},
{SUB_9128,{0U,0U,0U}},
{SUB_9128,{1U,0U,0U}},
{SUB_9128,{2U,0U,0U}},
{SUB_9128,{3U,0U,0U}},
{SUB_9128,{4U,0U,0U}},
{SUB_9128,{5U,0U,0U}},
{SUB_9128,{6U,0U,0U}},
{SUB_9128,{7U,0U,0U}},
{SUB_9130,{0U,0U,0U}},
{SUB_9130,{1U,0U,0U}},
{SUB_9130,{2U,0U,0U}},
{SUB_9130,{3U,0U,0U}},
{SUB_9130,{4U,0U,0U}},
{SUB_9130,{5U,0U,0U}},
{SUB_9130,{6U,0U,0U}},
{SUB_9130,{7U,0U,0U}},
{SUB_9138,{0U,0U,0U}},
{SUB_9139,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9140,{0U,0U,0U}},
{SUBX_9140,{1U,0U,0U}},
{SUBX_9140,{2U,0U,0U}},
{SUBX_9140,{3U,0U,0U}},
{SUBX_9140,{4U,0U,0U}},
{SUBX_9140,{5U,0U,0U}},
{SUBX_9140,{6U,0U,0U}},
{SUBX_9140,{7U,0U,0U}},
{SUBX_9148,{0U,0U,0U}},
{SUBX_9148,{1U,0U,0U}},
{SUBX_9148,{2U,0U,0U}},
{SUBX_9148,{3U,0U,0U}},
{SUBX_9148,{4U,0U,0U}},
{SUBX_9148,{5U,0U,0U}},
{SUBX_9148,{6U,0U,0U}},
{SUBX_9148,{7U,0U,0U}},
{SUB_9150,{0U,0U,0U}},
{SUB_9150,{1U,0U,0U}},
{SUB_9150,{2U,0U,0U}},
{SUB_9150,{3U,0U,0U}},
{SUB_9150,{4U,0U,0U}},
{SUB_9150,{5U,0U,0U}},
{SUB_9150,{6U,0U,0U}},
{SUB_9150,{7U,0U,0U}},
{SUB_9158,{0U,0U,0U}},
{SUB_9158,{1U,0U,0U}},
{SUB_9158,{2U,0U,0U}},
{SUB_9158,{3U,0U,0U}},
{SUB_9158,{4U,0U,0U}},
{SUB_9158,{5U,0U,0U}},
{SUB_9158,{6U,0U,0U}},
{SUB_9158,{7U,0U,0U}},
{SUB_9160,{0U,0U,0U}},
{SUB_9160,{1U,0U,0U}},
{SUB_9160,{2U,0U,0U}},
{SUB_9160,{3U,0U,0U}},
{SUB_9160,{4U,0U,0U}},
{SUB_9160,{5U,0U,0U}},
{SUB_9160,{6U,0U,0U}},
{SUB_9160,{7U,0U,0U}},
{SUB_9168,{0U,0U,0U}},
{SUB_9168,{1U,0U,0U}},
{SUB_9168,{2U,0U,0U}},
{SUB_9168,{3U,0U,0U}},
{SUB_9168,{4U,0U,0U}},
{SUB_9168,{5U,0U,0U}},
{SUB_9168,{6U,0U,0U}},
{SUB_9168,{7U,0U,0U}},
{SUB_9170,{0U,0U,0U}},
{SUB_9170,{1U,0U,0U}},
{SUB_9170,{2U,0U,0U}},
{SUB_9170,{3U,0U,0U}},
{SUB_9170,{4U,0U,0U}},
{SUB_9170,{5U,0U,0U}},
{SUB_9170,{6U,0U,0U}},
{SUB_9170,{7U,0U,0U}},
{SUB_9178,{0U,0U,0U}},
{SUB_9179,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9180,{0U,0U,0U}},
{SUBX_9180,{1U,0U,0U}},
{SUBX_9180,{2U,0U,0U}},
{SUBX_9180,{3U,0U,0U}},
{SUBX_9180,{4U,0U,0U}},
{SUBX_9180,{5U,0U,0U}},
{SUBX_9180,{6U,0U,0U}},
{SUBX_9180,{7U,0U,0U}},
{SUBX_9188,{0U,0U,0U}},
{SUBX_9188,{1U,0U,0U}},
{SUBX_9188,{2U,0U,0U}},
{SUBX_9188,{3U,0U,0U}},
{SUBX_9188,{4U,0U,0U}},
{SUBX_9188,{5U,0U,0U}},
{SUBX_9188,{6U,0U,0U}},
{SUBX_9188,{7U,0U,0U}},
{SUB_9190,{0U,0U,0U}},
{SUB_9190,{1U,0U,0U}},
{SUB_9190,{2U,0U,0U}},
{SUB_9190,{3U,0U,0U}},
{SUB_9190,{4U,0U,0U}},
{SUB_9190,{5U,0U,0U}},
{SUB_9190,{6U,0U,0U}},
{SUB_9190,{7U,0U,0U}},
{SUB_9198,{0U,0U,0U}},
{SUB_9198,{1U,0U,0U}},
{SUB_9198,{2U,0U,0U}},
{SUB_9198,{3U,0U,0U}},
{SUB_9198,{4U,0U,0U}},
{SUB_9198,{5U,0U,0U}},
{SUB_9198,{6U,0U,0U}},
{SUB_9198,{7U,0U,0U}},
{SUB_91A0,{0U,0U,0U}},
{SUB_91A0,{1U,0U,0U}},
{SUB_91A0,{2U,0U,0U}},
{SUB_91A0,{3U,0U,0U}},
{SUB_91A0,{4U,0U,0U}},
{SUB_91A0,{5U,0U,0U}},
{SUB_91A0,{6U,0U,0U}},
{SUB_91A0,{7U,0U,0U}},
{SUB_91A8,{0U,0U,0U}},
{SUB_91A8,{1U,0U,0U}},
{SUB_91A8,{2U,0U,0U}},
{SUB_91A8,{3U,0U,0U}},
{SUB_91A8,{4U,0U,0U}},
{SUB_91A8,{5U,0U,0U}},
{SUB_91A8,{6U,0U,0U}},
{SUB_91A8,{7U,0U,0U}},
{SUB_91B0,{0U,0U,0U}},
{SUB_91B0,{1U,0U,0U}},
{SUB_91B0,{2U,0U,0U}},
{SUB_91B0,{3U,0U,0U}},
{SUB_91B0,{4U,0U,0U}},
{SUB_91B0,{5U,0U,0U}},
{SUB_91B0,{6U,0U,0U}},
{SUB_91B0,{7U,0U,0U}},
{SUB_91B8,{0U,0U,0U}},
{SUB_91B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_91C0,{0U,0U,0U}},
{SUBA_91C0,{1U,0U,0U}},
{SUBA_91C0,{2U,0U,0U}},
{SUBA_91C0,{3U,0U,0U}},
{SUBA_91C0,{4U,0U,0U}},
{SUBA_91C0,{5U,0U,0U}},
{SUBA_91C0,{6U,0U,0U}},
{SUBA_91C0,{7U,0U,0U}},
{SUBA_91C8,{0U,0U,0U}},
{SUBA_91C8,{1U,0U,0U}},
{SUBA_91C8,{2U,0U,0U}},
{SUBA_91C8,{3U,0U,0U}},
{SUBA_91C8,{4U,0U,0U}},
{SUBA_91C8,{5U,0U,0U}},
{SUBA_91C8,{6U,0U,0U}},
{SUBA_91C8,{7U,0U,0U}},
{SUBA_91D0,{0U,0U,0U}},
{SUBA_91D0,{1U,0U,0U}},
{SUBA_91D0,{2U,0U,0U}},
{SUBA_91D0,{3U,0U,0U}},
{SUBA_91D0,{4U,0U,0U}},
{SUBA_91D0,{5U,0U,0U}},
{SUBA_91D0,{6U,0U,0U}},
{SUBA_91D0,{7U,0U,0U}},
{SUBA_91D8,{0U,0U,0U}},
{SUBA_91D8,{1U,0U,0U}},
{SUBA_91D8,{2U,0U,0U}},
{SUBA_91D8,{3U,0U,0U}},
{SUBA_91D8,{4U,0U,0U}},
{SUBA_91D8,{5U,0U,0U}},
{SUBA_91D8,{6U,0U,0U}},
{SUBA_91D8,{7U,0U,0U}},
{SUBA_91E0,{0U,0U,0U}},
{SUBA_91E0,{1U,0U,0U}},
{SUBA_91E0,{2U,0U,0U}},
{SUBA_91E0,{3U,0U,0U}},
{SUBA_91E0,{4U,0U,0U}},
{SUBA_91E0,{5U,0U,0U}},
{SUBA_91E0,{6U,0U,0U}},
{SUBA_91E0,{7U,0U,0U}},
{SUBA_91E8,{0U,0U,0U}},
{SUBA_91E8,{1U,0U,0U}},
{SUBA_91E8,{2U,0U,0U}},
{SUBA_91E8,{3U,0U,0U}},
{SUBA_91E8,{4U,0U,0U}},
{SUBA_91E8,{5U,0U,0U}},
{SUBA_91E8,{6U,0U,0U}},
{SUBA_91E8,{7U,0U,0U}},
{SUBA_91F0,{0U,0U,0U}},
{SUBA_91F0,{1U,0U,0U}},
{SUBA_91F0,{2U,0U,0U}},
{SUBA_91F0,{3U,0U,0U}},
{SUBA_91F0,{4U,0U,0U}},
{SUBA_91F0,{5U,0U,0U}},
{SUBA_91F0,{6U,0U,0U}},
{SUBA_91F0,{7U,0U,0U}},
{SUBA_91F8,{0U,0U,0U}},
{SUBA_91F9,{0U,0U,0U}},
{SUBA_91FA,{0U,0U,0U}},
{SUBA_91FB,{0U,0U,0U}},
{SUBA_91FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9000,{0U,1U,0U}},
{SUB_9000,{1U,1U,0U}},
{SUB_9000,{2U,1U,0U}},
{SUB_9000,{3U,1U,0U}},
{SUB_9000,{4U,1U,0U}},
{SUB_9000,{5U,1U,0U}},
{SUB_9000,{6U,1U,0U}},
{SUB_9000,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9010,{0U,1U,0U}},
{SUB_9010,{1U,1U,0U}},
{SUB_9010,{2U,1U,0U}},
{SUB_9010,{3U,1U,0U}},
{SUB_9010,{4U,1U,0U}},
{SUB_9010,{5U,1U,0U}},
{SUB_9010,{6U,1U,0U}},
{SUB_9010,{7U,1U,0U}},
{SUB_9018,{0U,1U,0U}},
{SUB_9018,{1U,1U,0U}},
{SUB_9018,{2U,1U,0U}},
{SUB_9018,{3U,1U,0U}},
{SUB_9018,{4U,1U,0U}},
{SUB_9018,{5U,1U,0U}},
{SUB_9018,{6U,1U,0U}},
{SUB_9018,{7U,1U,0U}},
{SUB_9020,{0U,1U,0U}},
{SUB_9020,{1U,1U,0U}},
{SUB_9020,{2U,1U,0U}},
{SUB_9020,{3U,1U,0U}},
{SUB_9020,{4U,1U,0U}},
{SUB_9020,{5U,1U,0U}},
{SUB_9020,{6U,1U,0U}},
{SUB_9020,{7U,1U,0U}},
{SUB_9028,{0U,1U,0U}},
{SUB_9028,{1U,1U,0U}},
{SUB_9028,{2U,1U,0U}},
{SUB_9028,{3U,1U,0U}},
{SUB_9028,{4U,1U,0U}},
{SUB_9028,{5U,1U,0U}},
{SUB_9028,{6U,1U,0U}},
{SUB_9028,{7U,1U,0U}},
{SUB_9030,{0U,1U,0U}},
{SUB_9030,{1U,1U,0U}},
{SUB_9030,{2U,1U,0U}},
{SUB_9030,{3U,1U,0U}},
{SUB_9030,{4U,1U,0U}},
{SUB_9030,{5U,1U,0U}},
{SUB_9030,{6U,1U,0U}},
{SUB_9030,{7U,1U,0U}},
{SUB_9038,{0U,1U,0U}},
{SUB_9039,{0U,1U,0U}},
{SUB_903A,{0U,1U,0U}},
{SUB_903B,{0U,1U,0U}},
{SUB_903C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9040,{0U,1U,0U}},
{SUB_9040,{1U,1U,0U}},
{SUB_9040,{2U,1U,0U}},
{SUB_9040,{3U,1U,0U}},
{SUB_9040,{4U,1U,0U}},
{SUB_9040,{5U,1U,0U}},
{SUB_9040,{6U,1U,0U}},
{SUB_9040,{7U,1U,0U}},
{SUB_9048,{0U,1U,0U}},
{SUB_9048,{1U,1U,0U}},
{SUB_9048,{2U,1U,0U}},
{SUB_9048,{3U,1U,0U}},
{SUB_9048,{4U,1U,0U}},
{SUB_9048,{5U,1U,0U}},
{SUB_9048,{6U,1U,0U}},
{SUB_9048,{7U,1U,0U}},
{SUB_9050,{0U,1U,0U}},
{SUB_9050,{1U,1U,0U}},
{SUB_9050,{2U,1U,0U}},
{SUB_9050,{3U,1U,0U}},
{SUB_9050,{4U,1U,0U}},
{SUB_9050,{5U,1U,0U}},
{SUB_9050,{6U,1U,0U}},
{SUB_9050,{7U,1U,0U}},
{SUB_9058,{0U,1U,0U}},
{SUB_9058,{1U,1U,0U}},
{SUB_9058,{2U,1U,0U}},
{SUB_9058,{3U,1U,0U}},
{SUB_9058,{4U,1U,0U}},
{SUB_9058,{5U,1U,0U}},
{SUB_9058,{6U,1U,0U}},
{SUB_9058,{7U,1U,0U}},
{SUB_9060,{0U,1U,0U}},
{SUB_9060,{1U,1U,0U}},
{SUB_9060,{2U,1U,0U}},
{SUB_9060,{3U,1U,0U}},
{SUB_9060,{4U,1U,0U}},
{SUB_9060,{5U,1U,0U}},
{SUB_9060,{6U,1U,0U}},
{SUB_9060,{7U,1U,0U}},
{SUB_9068,{0U,1U,0U}},
{SUB_9068,{1U,1U,0U}},
{SUB_9068,{2U,1U,0U}},
{SUB_9068,{3U,1U,0U}},
{SUB_9068,{4U,1U,0U}},
{SUB_9068,{5U,1U,0U}},
{SUB_9068,{6U,1U,0U}},
{SUB_9068,{7U,1U,0U}},
{SUB_9070,{0U,1U,0U}},
{SUB_9070,{1U,1U,0U}},
{SUB_9070,{2U,1U,0U}},
{SUB_9070,{3U,1U,0U}},
{SUB_9070,{4U,1U,0U}},
{SUB_9070,{5U,1U,0U}},
{SUB_9070,{6U,1U,0U}},
{SUB_9070,{7U,1U,0U}},
{SUB_9078,{0U,1U,0U}},
{SUB_9079,{0U,1U,0U}},
{SUB_907A,{0U,1U,0U}},
{SUB_907B,{0U,1U,0U}},
{SUB_907C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9080,{0U,1U,0U}},
{SUB_9080,{1U,1U,0U}},
{SUB_9080,{2U,1U,0U}},
{SUB_9080,{3U,1U,0U}},
{SUB_9080,{4U,1U,0U}},
{SUB_9080,{5U,1U,0U}},
{SUB_9080,{6U,1U,0U}},
{SUB_9080,{7U,1U,0U}},
{SUB_9088,{0U,1U,0U}},
{SUB_9088,{1U,1U,0U}},
{SUB_9088,{2U,1U,0U}},
{SUB_9088,{3U,1U,0U}},
{SUB_9088,{4U,1U,0U}},
{SUB_9088,{5U,1U,0U}},
{SUB_9088,{6U,1U,0U}},
{SUB_9088,{7U,1U,0U}},
{SUB_9090,{0U,1U,0U}},
{SUB_9090,{1U,1U,0U}},
{SUB_9090,{2U,1U,0U}},
{SUB_9090,{3U,1U,0U}},
{SUB_9090,{4U,1U,0U}},
{SUB_9090,{5U,1U,0U}},
{SUB_9090,{6U,1U,0U}},
{SUB_9090,{7U,1U,0U}},
{SUB_9098,{0U,1U,0U}},
{SUB_9098,{1U,1U,0U}},
{SUB_9098,{2U,1U,0U}},
{SUB_9098,{3U,1U,0U}},
{SUB_9098,{4U,1U,0U}},
{SUB_9098,{5U,1U,0U}},
{SUB_9098,{6U,1U,0U}},
{SUB_9098,{7U,1U,0U}},
{SUB_90A0,{0U,1U,0U}},
{SUB_90A0,{1U,1U,0U}},
{SUB_90A0,{2U,1U,0U}},
{SUB_90A0,{3U,1U,0U}},
{SUB_90A0,{4U,1U,0U}},
{SUB_90A0,{5U,1U,0U}},
{SUB_90A0,{6U,1U,0U}},
{SUB_90A0,{7U,1U,0U}},
{SUB_90A8,{0U,1U,0U}},
{SUB_90A8,{1U,1U,0U}},
{SUB_90A8,{2U,1U,0U}},
{SUB_90A8,{3U,1U,0U}},
{SUB_90A8,{4U,1U,0U}},
{SUB_90A8,{5U,1U,0U}},
{SUB_90A8,{6U,1U,0U}},
{SUB_90A8,{7U,1U,0U}},
{SUB_90B0,{0U,1U,0U}},
{SUB_90B0,{1U,1U,0U}},
{SUB_90B0,{2U,1U,0U}},
{SUB_90B0,{3U,1U,0U}},
{SUB_90B0,{4U,1U,0U}},
{SUB_90B0,{5U,1U,0U}},
{SUB_90B0,{6U,1U,0U}},
{SUB_90B0,{7U,1U,0U}},
{SUB_90B8,{0U,1U,0U}},
{SUB_90B9,{0U,1U,0U}},
{SUB_90BA,{0U,1U,0U}},
{SUB_90BB,{0U,1U,0U}},
{SUB_90BC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_90C0,{0U,1U,0U}},
{SUBA_90C0,{1U,1U,0U}},
{SUBA_90C0,{2U,1U,0U}},
{SUBA_90C0,{3U,1U,0U}},
{SUBA_90C0,{4U,1U,0U}},
{SUBA_90C0,{5U,1U,0U}},
{SUBA_90C0,{6U,1U,0U}},
{SUBA_90C0,{7U,1U,0U}},
{SUBA_90C8,{0U,1U,0U}},
{SUBA_90C8,{1U,1U,0U}},
{SUBA_90C8,{2U,1U,0U}},
{SUBA_90C8,{3U,1U,0U}},
{SUBA_90C8,{4U,1U,0U}},
{SUBA_90C8,{5U,1U,0U}},
{SUBA_90C8,{6U,1U,0U}},
{SUBA_90C8,{7U,1U,0U}},
{SUBA_90D0,{0U,1U,0U}},
{SUBA_90D0,{1U,1U,0U}},
{SUBA_90D0,{2U,1U,0U}},
{SUBA_90D0,{3U,1U,0U}},
{SUBA_90D0,{4U,1U,0U}},
{SUBA_90D0,{5U,1U,0U}},
{SUBA_90D0,{6U,1U,0U}},
{SUBA_90D0,{7U,1U,0U}},
{SUBA_90D8,{0U,1U,0U}},
{SUBA_90D8,{1U,1U,0U}},
{SUBA_90D8,{2U,1U,0U}},
{SUBA_90D8,{3U,1U,0U}},
{SUBA_90D8,{4U,1U,0U}},
{SUBA_90D8,{5U,1U,0U}},
{SUBA_90D8,{6U,1U,0U}},
{SUBA_90D8,{7U,1U,0U}},
{SUBA_90E0,{0U,1U,0U}},
{SUBA_90E0,{1U,1U,0U}},
{SUBA_90E0,{2U,1U,0U}},
{SUBA_90E0,{3U,1U,0U}},
{SUBA_90E0,{4U,1U,0U}},
{SUBA_90E0,{5U,1U,0U}},
{SUBA_90E0,{6U,1U,0U}},
{SUBA_90E0,{7U,1U,0U}},
{SUBA_90E8,{0U,1U,0U}},
{SUBA_90E8,{1U,1U,0U}},
{SUBA_90E8,{2U,1U,0U}},
{SUBA_90E8,{3U,1U,0U}},
{SUBA_90E8,{4U,1U,0U}},
{SUBA_90E8,{5U,1U,0U}},
{SUBA_90E8,{6U,1U,0U}},
{SUBA_90E8,{7U,1U,0U}},
{SUBA_90F0,{0U,1U,0U}},
{SUBA_90F0,{1U,1U,0U}},
{SUBA_90F0,{2U,1U,0U}},
{SUBA_90F0,{3U,1U,0U}},
{SUBA_90F0,{4U,1U,0U}},
{SUBA_90F0,{5U,1U,0U}},
{SUBA_90F0,{6U,1U,0U}},
{SUBA_90F0,{7U,1U,0U}},
{SUBA_90F8,{0U,1U,0U}},
{SUBA_90F9,{0U,1U,0U}},
{SUBA_90FA,{0U,1U,0U}},
{SUBA_90FB,{0U,1U,0U}},
{SUBA_90FC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9100,{0U,1U,0U}},
{SUBX_9100,{1U,1U,0U}},
{SUBX_9100,{2U,1U,0U}},
{SUBX_9100,{3U,1U,0U}},
{SUBX_9100,{4U,1U,0U}},
{SUBX_9100,{5U,1U,0U}},
{SUBX_9100,{6U,1U,0U}},
{SUBX_9100,{7U,1U,0U}},
{SUBX_9108,{0U,1U,0U}},
{SUBX_9108,{1U,1U,0U}},
{SUBX_9108,{2U,1U,0U}},
{SUBX_9108,{3U,1U,0U}},
{SUBX_9108,{4U,1U,0U}},
{SUBX_9108,{5U,1U,0U}},
{SUBX_9108,{6U,1U,0U}},
{SUBX_9108,{7U,1U,0U}},
{SUB_9110,{0U,1U,0U}},
{SUB_9110,{1U,1U,0U}},
{SUB_9110,{2U,1U,0U}},
{SUB_9110,{3U,1U,0U}},
{SUB_9110,{4U,1U,0U}},
{SUB_9110,{5U,1U,0U}},
{SUB_9110,{6U,1U,0U}},
{SUB_9110,{7U,1U,0U}},
{SUB_9118,{0U,1U,0U}},
{SUB_9118,{1U,1U,0U}},
{SUB_9118,{2U,1U,0U}},
{SUB_9118,{3U,1U,0U}},
{SUB_9118,{4U,1U,0U}},
{SUB_9118,{5U,1U,0U}},
{SUB_9118,{6U,1U,0U}},
{SUB_9118,{7U,1U,0U}},
{SUB_9120,{0U,1U,0U}},
{SUB_9120,{1U,1U,0U}},
{SUB_9120,{2U,1U,0U}},
{SUB_9120,{3U,1U,0U}},
{SUB_9120,{4U,1U,0U}},
{SUB_9120,{5U,1U,0U}},
{SUB_9120,{6U,1U,0U}},
{SUB_9120,{7U,1U,0U}},
{SUB_9128,{0U,1U,0U}},
{SUB_9128,{1U,1U,0U}},
{SUB_9128,{2U,1U,0U}},
{SUB_9128,{3U,1U,0U}},
{SUB_9128,{4U,1U,0U}},
{SUB_9128,{5U,1U,0U}},
{SUB_9128,{6U,1U,0U}},
{SUB_9128,{7U,1U,0U}},
{SUB_9130,{0U,1U,0U}},
{SUB_9130,{1U,1U,0U}},
{SUB_9130,{2U,1U,0U}},
{SUB_9130,{3U,1U,0U}},
{SUB_9130,{4U,1U,0U}},
{SUB_9130,{5U,1U,0U}},
{SUB_9130,{6U,1U,0U}},
{SUB_9130,{7U,1U,0U}},
{SUB_9138,{0U,1U,0U}},
{SUB_9139,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9140,{0U,1U,0U}},
{SUBX_9140,{1U,1U,0U}},
{SUBX_9140,{2U,1U,0U}},
{SUBX_9140,{3U,1U,0U}},
{SUBX_9140,{4U,1U,0U}},
{SUBX_9140,{5U,1U,0U}},
{SUBX_9140,{6U,1U,0U}},
{SUBX_9140,{7U,1U,0U}},
{SUBX_9148,{0U,1U,0U}},
{SUBX_9148,{1U,1U,0U}},
{SUBX_9148,{2U,1U,0U}},
{SUBX_9148,{3U,1U,0U}},
{SUBX_9148,{4U,1U,0U}},
{SUBX_9148,{5U,1U,0U}},
{SUBX_9148,{6U,1U,0U}},
{SUBX_9148,{7U,1U,0U}},
{SUB_9150,{0U,1U,0U}},
{SUB_9150,{1U,1U,0U}},
{SUB_9150,{2U,1U,0U}},
{SUB_9150,{3U,1U,0U}},
{SUB_9150,{4U,1U,0U}},
{SUB_9150,{5U,1U,0U}},
{SUB_9150,{6U,1U,0U}},
{SUB_9150,{7U,1U,0U}},
{SUB_9158,{0U,1U,0U}},
{SUB_9158,{1U,1U,0U}},
{SUB_9158,{2U,1U,0U}},
{SUB_9158,{3U,1U,0U}},
{SUB_9158,{4U,1U,0U}},
{SUB_9158,{5U,1U,0U}},
{SUB_9158,{6U,1U,0U}},
{SUB_9158,{7U,1U,0U}},
{SUB_9160,{0U,1U,0U}},
{SUB_9160,{1U,1U,0U}},
{SUB_9160,{2U,1U,0U}},
{SUB_9160,{3U,1U,0U}},
{SUB_9160,{4U,1U,0U}},
{SUB_9160,{5U,1U,0U}},
{SUB_9160,{6U,1U,0U}},
{SUB_9160,{7U,1U,0U}},
{SUB_9168,{0U,1U,0U}},
{SUB_9168,{1U,1U,0U}},
{SUB_9168,{2U,1U,0U}},
{SUB_9168,{3U,1U,0U}},
{SUB_9168,{4U,1U,0U}},
{SUB_9168,{5U,1U,0U}},
{SUB_9168,{6U,1U,0U}},
{SUB_9168,{7U,1U,0U}},
{SUB_9170,{0U,1U,0U}},
{SUB_9170,{1U,1U,0U}},
{SUB_9170,{2U,1U,0U}},
{SUB_9170,{3U,1U,0U}},
{SUB_9170,{4U,1U,0U}},
{SUB_9170,{5U,1U,0U}},
{SUB_9170,{6U,1U,0U}},
{SUB_9170,{7U,1U,0U}},
{SUB_9178,{0U,1U,0U}},
{SUB_9179,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9180,{0U,1U,0U}},
{SUBX_9180,{1U,1U,0U}},
{SUBX_9180,{2U,1U,0U}},
{SUBX_9180,{3U,1U,0U}},
{SUBX_9180,{4U,1U,0U}},
{SUBX_9180,{5U,1U,0U}},
{SUBX_9180,{6U,1U,0U}},
{SUBX_9180,{7U,1U,0U}},
{SUBX_9188,{0U,1U,0U}},
{SUBX_9188,{1U,1U,0U}},
{SUBX_9188,{2U,1U,0U}},
{SUBX_9188,{3U,1U,0U}},
{SUBX_9188,{4U,1U,0U}},
{SUBX_9188,{5U,1U,0U}},
{SUBX_9188,{6U,1U,0U}},
{SUBX_9188,{7U,1U,0U}},
{SUB_9190,{0U,1U,0U}},
{SUB_9190,{1U,1U,0U}},
{SUB_9190,{2U,1U,0U}},
{SUB_9190,{3U,1U,0U}},
{SUB_9190,{4U,1U,0U}},
{SUB_9190,{5U,1U,0U}},
{SUB_9190,{6U,1U,0U}},
{SUB_9190,{7U,1U,0U}},
{SUB_9198,{0U,1U,0U}},
{SUB_9198,{1U,1U,0U}},
{SUB_9198,{2U,1U,0U}},
{SUB_9198,{3U,1U,0U}},
{SUB_9198,{4U,1U,0U}},
{SUB_9198,{5U,1U,0U}},
{SUB_9198,{6U,1U,0U}},
{SUB_9198,{7U,1U,0U}},
{SUB_91A0,{0U,1U,0U}},
{SUB_91A0,{1U,1U,0U}},
{SUB_91A0,{2U,1U,0U}},
{SUB_91A0,{3U,1U,0U}},
{SUB_91A0,{4U,1U,0U}},
{SUB_91A0,{5U,1U,0U}},
{SUB_91A0,{6U,1U,0U}},
{SUB_91A0,{7U,1U,0U}},
{SUB_91A8,{0U,1U,0U}},
{SUB_91A8,{1U,1U,0U}},
{SUB_91A8,{2U,1U,0U}},
{SUB_91A8,{3U,1U,0U}},
{SUB_91A8,{4U,1U,0U}},
{SUB_91A8,{5U,1U,0U}},
{SUB_91A8,{6U,1U,0U}},
{SUB_91A8,{7U,1U,0U}},
{SUB_91B0,{0U,1U,0U}},
{SUB_91B0,{1U,1U,0U}},
{SUB_91B0,{2U,1U,0U}},
{SUB_91B0,{3U,1U,0U}},
{SUB_91B0,{4U,1U,0U}},
{SUB_91B0,{5U,1U,0U}},
{SUB_91B0,{6U,1U,0U}},
{SUB_91B0,{7U,1U,0U}},
{SUB_91B8,{0U,1U,0U}},
{SUB_91B9,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_91C0,{0U,1U,0U}},
{SUBA_91C0,{1U,1U,0U}},
{SUBA_91C0,{2U,1U,0U}},
{SUBA_91C0,{3U,1U,0U}},
{SUBA_91C0,{4U,1U,0U}},
{SUBA_91C0,{5U,1U,0U}},
{SUBA_91C0,{6U,1U,0U}},
{SUBA_91C0,{7U,1U,0U}},
{SUBA_91C8,{0U,1U,0U}},
{SUBA_91C8,{1U,1U,0U}},
{SUBA_91C8,{2U,1U,0U}},
{SUBA_91C8,{3U,1U,0U}},
{SUBA_91C8,{4U,1U,0U}},
{SUBA_91C8,{5U,1U,0U}},
{SUBA_91C8,{6U,1U,0U}},
{SUBA_91C8,{7U,1U,0U}},
{SUBA_91D0,{0U,1U,0U}},
{SUBA_91D0,{1U,1U,0U}},
{SUBA_91D0,{2U,1U,0U}},
{SUBA_91D0,{3U,1U,0U}},
{SUBA_91D0,{4U,1U,0U}},
{SUBA_91D0,{5U,1U,0U}},
{SUBA_91D0,{6U,1U,0U}},
{SUBA_91D0,{7U,1U,0U}},
{SUBA_91D8,{0U,1U,0U}},
{SUBA_91D8,{1U,1U,0U}},
{SUBA_91D8,{2U,1U,0U}},
{SUBA_91D8,{3U,1U,0U}},
{SUBA_91D8,{4U,1U,0U}},
{SUBA_91D8,{5U,1U,0U}},
{SUBA_91D8,{6U,1U,0U}},
{SUBA_91D8,{7U,1U,0U}},
{SUBA_91E0,{0U,1U,0U}},
{SUBA_91E0,{1U,1U,0U}},
{SUBA_91E0,{2U,1U,0U}},
{SUBA_91E0,{3U,1U,0U}},
{SUBA_91E0,{4U,1U,0U}},
{SUBA_91E0,{5U,1U,0U}},
{SUBA_91E0,{6U,1U,0U}},
{SUBA_91E0,{7U,1U,0U}},
{SUBA_91E8,{0U,1U,0U}},
{SUBA_91E8,{1U,1U,0U}},
{SUBA_91E8,{2U,1U,0U}},
{SUBA_91E8,{3U,1U,0U}},
{SUBA_91E8,{4U,1U,0U}},
{SUBA_91E8,{5U,1U,0U}},
{SUBA_91E8,{6U,1U,0U}},
{SUBA_91E8,{7U,1U,0U}},
{SUBA_91F0,{0U,1U,0U}},
{SUBA_91F0,{1U,1U,0U}},
{SUBA_91F0,{2U,1U,0U}},
{SUBA_91F0,{3U,1U,0U}},
{SUBA_91F0,{4U,1U,0U}},
{SUBA_91F0,{5U,1U,0U}},
{SUBA_91F0,{6U,1U,0U}},
{SUBA_91F0,{7U,1U,0U}},
{SUBA_91F8,{0U,1U,0U}},
{SUBA_91F9,{0U,1U,0U}},
{SUBA_91FA,{0U,1U,0U}},
{SUBA_91FB,{0U,1U,0U}},
{SUBA_91FC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9000,{0U,2U,0U}},
{SUB_9000,{1U,2U,0U}},
{SUB_9000,{2U,2U,0U}},
{SUB_9000,{3U,2U,0U}},
{SUB_9000,{4U,2U,0U}},
{SUB_9000,{5U,2U,0U}},
{SUB_9000,{6U,2U,0U}},
{SUB_9000,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9010,{0U,2U,0U}},
{SUB_9010,{1U,2U,0U}},
{SUB_9010,{2U,2U,0U}},
{SUB_9010,{3U,2U,0U}},
{SUB_9010,{4U,2U,0U}},
{SUB_9010,{5U,2U,0U}},
{SUB_9010,{6U,2U,0U}},
{SUB_9010,{7U,2U,0U}},
{SUB_9018,{0U,2U,0U}},
{SUB_9018,{1U,2U,0U}},
{SUB_9018,{2U,2U,0U}},
{SUB_9018,{3U,2U,0U}},
{SUB_9018,{4U,2U,0U}},
{SUB_9018,{5U,2U,0U}},
{SUB_9018,{6U,2U,0U}},
{SUB_9018,{7U,2U,0U}},
{SUB_9020,{0U,2U,0U}},
{SUB_9020,{1U,2U,0U}},
{SUB_9020,{2U,2U,0U}},
{SUB_9020,{3U,2U,0U}},
{SUB_9020,{4U,2U,0U}},
{SUB_9020,{5U,2U,0U}},
{SUB_9020,{6U,2U,0U}},
{SUB_9020,{7U,2U,0U}},
{SUB_9028,{0U,2U,0U}},
{SUB_9028,{1U,2U,0U}},
{SUB_9028,{2U,2U,0U}},
{SUB_9028,{3U,2U,0U}},
{SUB_9028,{4U,2U,0U}},
{SUB_9028,{5U,2U,0U}},
{SUB_9028,{6U,2U,0U}},
{SUB_9028,{7U,2U,0U}},
{SUB_9030,{0U,2U,0U}},
{SUB_9030,{1U,2U,0U}},
{SUB_9030,{2U,2U,0U}},
{SUB_9030,{3U,2U,0U}},
{SUB_9030,{4U,2U,0U}},
{SUB_9030,{5U,2U,0U}},
{SUB_9030,{6U,2U,0U}},
{SUB_9030,{7U,2U,0U}},
{SUB_9038,{0U,2U,0U}},
{SUB_9039,{0U,2U,0U}},
{SUB_903A,{0U,2U,0U}},
{SUB_903B,{0U,2U,0U}},
{SUB_903C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9040,{0U,2U,0U}},
{SUB_9040,{1U,2U,0U}},
{SUB_9040,{2U,2U,0U}},
{SUB_9040,{3U,2U,0U}},
{SUB_9040,{4U,2U,0U}},
{SUB_9040,{5U,2U,0U}},
{SUB_9040,{6U,2U,0U}},
{SUB_9040,{7U,2U,0U}},
{SUB_9048,{0U,2U,0U}},
{SUB_9048,{1U,2U,0U}},
{SUB_9048,{2U,2U,0U}},
{SUB_9048,{3U,2U,0U}},
{SUB_9048,{4U,2U,0U}},
{SUB_9048,{5U,2U,0U}},
{SUB_9048,{6U,2U,0U}},
{SUB_9048,{7U,2U,0U}},
{SUB_9050,{0U,2U,0U}},
{SUB_9050,{1U,2U,0U}},
{SUB_9050,{2U,2U,0U}},
{SUB_9050,{3U,2U,0U}},
{SUB_9050,{4U,2U,0U}},
{SUB_9050,{5U,2U,0U}},
{SUB_9050,{6U,2U,0U}},
{SUB_9050,{7U,2U,0U}},
{SUB_9058,{0U,2U,0U}},
{SUB_9058,{1U,2U,0U}},
{SUB_9058,{2U,2U,0U}},
{SUB_9058,{3U,2U,0U}},
{SUB_9058,{4U,2U,0U}},
{SUB_9058,{5U,2U,0U}},
{SUB_9058,{6U,2U,0U}},
{SUB_9058,{7U,2U,0U}},
{SUB_9060,{0U,2U,0U}},
{SUB_9060,{1U,2U,0U}},
{SUB_9060,{2U,2U,0U}},
{SUB_9060,{3U,2U,0U}},
{SUB_9060,{4U,2U,0U}},
{SUB_9060,{5U,2U,0U}},
{SUB_9060,{6U,2U,0U}},
{SUB_9060,{7U,2U,0U}},
{SUB_9068,{0U,2U,0U}},
{SUB_9068,{1U,2U,0U}},
{SUB_9068,{2U,2U,0U}},
{SUB_9068,{3U,2U,0U}},
{SUB_9068,{4U,2U,0U}},
{SUB_9068,{5U,2U,0U}},
{SUB_9068,{6U,2U,0U}},
{SUB_9068,{7U,2U,0U}},
{SUB_9070,{0U,2U,0U}},
{SUB_9070,{1U,2U,0U}},
{SUB_9070,{2U,2U,0U}},
{SUB_9070,{3U,2U,0U}},
{SUB_9070,{4U,2U,0U}},
{SUB_9070,{5U,2U,0U}},
{SUB_9070,{6U,2U,0U}},
{SUB_9070,{7U,2U,0U}},
{SUB_9078,{0U,2U,0U}},
{SUB_9079,{0U,2U,0U}},
{SUB_907A,{0U,2U,0U}},
{SUB_907B,{0U,2U,0U}},
{SUB_907C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9080,{0U,2U,0U}},
{SUB_9080,{1U,2U,0U}},
{SUB_9080,{2U,2U,0U}},
{SUB_9080,{3U,2U,0U}},
{SUB_9080,{4U,2U,0U}},
{SUB_9080,{5U,2U,0U}},
{SUB_9080,{6U,2U,0U}},
{SUB_9080,{7U,2U,0U}},
{SUB_9088,{0U,2U,0U}},
{SUB_9088,{1U,2U,0U}},
{SUB_9088,{2U,2U,0U}},
{SUB_9088,{3U,2U,0U}},
{SUB_9088,{4U,2U,0U}},
{SUB_9088,{5U,2U,0U}},
{SUB_9088,{6U,2U,0U}},
{SUB_9088,{7U,2U,0U}},
{SUB_9090,{0U,2U,0U}},
{SUB_9090,{1U,2U,0U}},
{SUB_9090,{2U,2U,0U}},
{SUB_9090,{3U,2U,0U}},
{SUB_9090,{4U,2U,0U}},
{SUB_9090,{5U,2U,0U}},
{SUB_9090,{6U,2U,0U}},
{SUB_9090,{7U,2U,0U}},
{SUB_9098,{0U,2U,0U}},
{SUB_9098,{1U,2U,0U}},
{SUB_9098,{2U,2U,0U}},
{SUB_9098,{3U,2U,0U}},
{SUB_9098,{4U,2U,0U}},
{SUB_9098,{5U,2U,0U}},
{SUB_9098,{6U,2U,0U}},
{SUB_9098,{7U,2U,0U}},
{SUB_90A0,{0U,2U,0U}},
{SUB_90A0,{1U,2U,0U}},
{SUB_90A0,{2U,2U,0U}},
{SUB_90A0,{3U,2U,0U}},
{SUB_90A0,{4U,2U,0U}},
{SUB_90A0,{5U,2U,0U}},
{SUB_90A0,{6U,2U,0U}},
{SUB_90A0,{7U,2U,0U}},
{SUB_90A8,{0U,2U,0U}},
{SUB_90A8,{1U,2U,0U}},
{SUB_90A8,{2U,2U,0U}},
{SUB_90A8,{3U,2U,0U}},
{SUB_90A8,{4U,2U,0U}},
{SUB_90A8,{5U,2U,0U}},
{SUB_90A8,{6U,2U,0U}},
{SUB_90A8,{7U,2U,0U}},
{SUB_90B0,{0U,2U,0U}},
{SUB_90B0,{1U,2U,0U}},
{SUB_90B0,{2U,2U,0U}},
{SUB_90B0,{3U,2U,0U}},
{SUB_90B0,{4U,2U,0U}},
{SUB_90B0,{5U,2U,0U}},
{SUB_90B0,{6U,2U,0U}},
{SUB_90B0,{7U,2U,0U}},
{SUB_90B8,{0U,2U,0U}},
{SUB_90B9,{0U,2U,0U}},
{SUB_90BA,{0U,2U,0U}},
{SUB_90BB,{0U,2U,0U}},
{SUB_90BC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_90C0,{0U,2U,0U}},
{SUBA_90C0,{1U,2U,0U}},
{SUBA_90C0,{2U,2U,0U}},
{SUBA_90C0,{3U,2U,0U}},
{SUBA_90C0,{4U,2U,0U}},
{SUBA_90C0,{5U,2U,0U}},
{SUBA_90C0,{6U,2U,0U}},
{SUBA_90C0,{7U,2U,0U}},
{SUBA_90C8,{0U,2U,0U}},
{SUBA_90C8,{1U,2U,0U}},
{SUBA_90C8,{2U,2U,0U}},
{SUBA_90C8,{3U,2U,0U}},
{SUBA_90C8,{4U,2U,0U}},
{SUBA_90C8,{5U,2U,0U}},
{SUBA_90C8,{6U,2U,0U}},
{SUBA_90C8,{7U,2U,0U}},
{SUBA_90D0,{0U,2U,0U}},
{SUBA_90D0,{1U,2U,0U}},
{SUBA_90D0,{2U,2U,0U}},
{SUBA_90D0,{3U,2U,0U}},
{SUBA_90D0,{4U,2U,0U}},
{SUBA_90D0,{5U,2U,0U}},
{SUBA_90D0,{6U,2U,0U}},
{SUBA_90D0,{7U,2U,0U}},
{SUBA_90D8,{0U,2U,0U}},
{SUBA_90D8,{1U,2U,0U}},
{SUBA_90D8,{2U,2U,0U}},
{SUBA_90D8,{3U,2U,0U}},
{SUBA_90D8,{4U,2U,0U}},
{SUBA_90D8,{5U,2U,0U}},
{SUBA_90D8,{6U,2U,0U}},
{SUBA_90D8,{7U,2U,0U}},
{SUBA_90E0,{0U,2U,0U}},
{SUBA_90E0,{1U,2U,0U}},
{SUBA_90E0,{2U,2U,0U}},
{SUBA_90E0,{3U,2U,0U}},
{SUBA_90E0,{4U,2U,0U}},
{SUBA_90E0,{5U,2U,0U}},
{SUBA_90E0,{6U,2U,0U}},
{SUBA_90E0,{7U,2U,0U}},
{SUBA_90E8,{0U,2U,0U}},
{SUBA_90E8,{1U,2U,0U}},
{SUBA_90E8,{2U,2U,0U}},
{SUBA_90E8,{3U,2U,0U}},
{SUBA_90E8,{4U,2U,0U}},
{SUBA_90E8,{5U,2U,0U}},
{SUBA_90E8,{6U,2U,0U}},
{SUBA_90E8,{7U,2U,0U}},
{SUBA_90F0,{0U,2U,0U}},
{SUBA_90F0,{1U,2U,0U}},
{SUBA_90F0,{2U,2U,0U}},
{SUBA_90F0,{3U,2U,0U}},
{SUBA_90F0,{4U,2U,0U}},
{SUBA_90F0,{5U,2U,0U}},
{SUBA_90F0,{6U,2U,0U}},
{SUBA_90F0,{7U,2U,0U}},
{SUBA_90F8,{0U,2U,0U}},
{SUBA_90F9,{0U,2U,0U}},
{SUBA_90FA,{0U,2U,0U}},
{SUBA_90FB,{0U,2U,0U}},
{SUBA_90FC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9100,{0U,2U,0U}},
{SUBX_9100,{1U,2U,0U}},
{SUBX_9100,{2U,2U,0U}},
{SUBX_9100,{3U,2U,0U}},
{SUBX_9100,{4U,2U,0U}},
{SUBX_9100,{5U,2U,0U}},
{SUBX_9100,{6U,2U,0U}},
{SUBX_9100,{7U,2U,0U}},
{SUBX_9108,{0U,2U,0U}},
{SUBX_9108,{1U,2U,0U}},
{SUBX_9108,{2U,2U,0U}},
{SUBX_9108,{3U,2U,0U}},
{SUBX_9108,{4U,2U,0U}},
{SUBX_9108,{5U,2U,0U}},
{SUBX_9108,{6U,2U,0U}},
{SUBX_9108,{7U,2U,0U}},
{SUB_9110,{0U,2U,0U}},
{SUB_9110,{1U,2U,0U}},
{SUB_9110,{2U,2U,0U}},
{SUB_9110,{3U,2U,0U}},
{SUB_9110,{4U,2U,0U}},
{SUB_9110,{5U,2U,0U}},
{SUB_9110,{6U,2U,0U}},
{SUB_9110,{7U,2U,0U}},
{SUB_9118,{0U,2U,0U}},
{SUB_9118,{1U,2U,0U}},
{SUB_9118,{2U,2U,0U}},
{SUB_9118,{3U,2U,0U}},
{SUB_9118,{4U,2U,0U}},
{SUB_9118,{5U,2U,0U}},
{SUB_9118,{6U,2U,0U}},
{SUB_9118,{7U,2U,0U}},
{SUB_9120,{0U,2U,0U}},
{SUB_9120,{1U,2U,0U}},
{SUB_9120,{2U,2U,0U}},
{SUB_9120,{3U,2U,0U}},
{SUB_9120,{4U,2U,0U}},
{SUB_9120,{5U,2U,0U}},
{SUB_9120,{6U,2U,0U}},
{SUB_9120,{7U,2U,0U}},
{SUB_9128,{0U,2U,0U}},
{SUB_9128,{1U,2U,0U}},
{SUB_9128,{2U,2U,0U}},
{SUB_9128,{3U,2U,0U}},
{SUB_9128,{4U,2U,0U}},
{SUB_9128,{5U,2U,0U}},
{SUB_9128,{6U,2U,0U}},
{SUB_9128,{7U,2U,0U}},
{SUB_9130,{0U,2U,0U}},
{SUB_9130,{1U,2U,0U}},
{SUB_9130,{2U,2U,0U}},
{SUB_9130,{3U,2U,0U}},
{SUB_9130,{4U,2U,0U}},
{SUB_9130,{5U,2U,0U}},
{SUB_9130,{6U,2U,0U}},
{SUB_9130,{7U,2U,0U}},
{SUB_9138,{0U,2U,0U}},
{SUB_9139,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9140,{0U,2U,0U}},
{SUBX_9140,{1U,2U,0U}},
{SUBX_9140,{2U,2U,0U}},
{SUBX_9140,{3U,2U,0U}},
{SUBX_9140,{4U,2U,0U}},
{SUBX_9140,{5U,2U,0U}},
{SUBX_9140,{6U,2U,0U}},
{SUBX_9140,{7U,2U,0U}},
{SUBX_9148,{0U,2U,0U}},
{SUBX_9148,{1U,2U,0U}},
{SUBX_9148,{2U,2U,0U}},
{SUBX_9148,{3U,2U,0U}},
{SUBX_9148,{4U,2U,0U}},
{SUBX_9148,{5U,2U,0U}},
{SUBX_9148,{6U,2U,0U}},
{SUBX_9148,{7U,2U,0U}},
{SUB_9150,{0U,2U,0U}},
{SUB_9150,{1U,2U,0U}},
{SUB_9150,{2U,2U,0U}},
{SUB_9150,{3U,2U,0U}},
{SUB_9150,{4U,2U,0U}},
{SUB_9150,{5U,2U,0U}},
{SUB_9150,{6U,2U,0U}},
{SUB_9150,{7U,2U,0U}},
{SUB_9158,{0U,2U,0U}},
{SUB_9158,{1U,2U,0U}},
{SUB_9158,{2U,2U,0U}},
{SUB_9158,{3U,2U,0U}},
{SUB_9158,{4U,2U,0U}},
{SUB_9158,{5U,2U,0U}},
{SUB_9158,{6U,2U,0U}},
{SUB_9158,{7U,2U,0U}},
{SUB_9160,{0U,2U,0U}},
{SUB_9160,{1U,2U,0U}},
{SUB_9160,{2U,2U,0U}},
{SUB_9160,{3U,2U,0U}},
{SUB_9160,{4U,2U,0U}},
{SUB_9160,{5U,2U,0U}},
{SUB_9160,{6U,2U,0U}},
{SUB_9160,{7U,2U,0U}},
{SUB_9168,{0U,2U,0U}},
{SUB_9168,{1U,2U,0U}},
{SUB_9168,{2U,2U,0U}},
{SUB_9168,{3U,2U,0U}},
{SUB_9168,{4U,2U,0U}},
{SUB_9168,{5U,2U,0U}},
{SUB_9168,{6U,2U,0U}},
{SUB_9168,{7U,2U,0U}},
{SUB_9170,{0U,2U,0U}},
{SUB_9170,{1U,2U,0U}},
{SUB_9170,{2U,2U,0U}},
{SUB_9170,{3U,2U,0U}},
{SUB_9170,{4U,2U,0U}},
{SUB_9170,{5U,2U,0U}},
{SUB_9170,{6U,2U,0U}},
{SUB_9170,{7U,2U,0U}},
{SUB_9178,{0U,2U,0U}},
{SUB_9179,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9180,{0U,2U,0U}},
{SUBX_9180,{1U,2U,0U}},
{SUBX_9180,{2U,2U,0U}},
{SUBX_9180,{3U,2U,0U}},
{SUBX_9180,{4U,2U,0U}},
{SUBX_9180,{5U,2U,0U}},
{SUBX_9180,{6U,2U,0U}},
{SUBX_9180,{7U,2U,0U}},
{SUBX_9188,{0U,2U,0U}},
{SUBX_9188,{1U,2U,0U}},
{SUBX_9188,{2U,2U,0U}},
{SUBX_9188,{3U,2U,0U}},
{SUBX_9188,{4U,2U,0U}},
{SUBX_9188,{5U,2U,0U}},
{SUBX_9188,{6U,2U,0U}},
{SUBX_9188,{7U,2U,0U}},
{SUB_9190,{0U,2U,0U}},
{SUB_9190,{1U,2U,0U}},
{SUB_9190,{2U,2U,0U}},
{SUB_9190,{3U,2U,0U}},
{SUB_9190,{4U,2U,0U}},
{SUB_9190,{5U,2U,0U}},
{SUB_9190,{6U,2U,0U}},
{SUB_9190,{7U,2U,0U}},
{SUB_9198,{0U,2U,0U}},
{SUB_9198,{1U,2U,0U}},
{SUB_9198,{2U,2U,0U}},
{SUB_9198,{3U,2U,0U}},
{SUB_9198,{4U,2U,0U}},
{SUB_9198,{5U,2U,0U}},
{SUB_9198,{6U,2U,0U}},
{SUB_9198,{7U,2U,0U}},
{SUB_91A0,{0U,2U,0U}},
{SUB_91A0,{1U,2U,0U}},
{SUB_91A0,{2U,2U,0U}},
{SUB_91A0,{3U,2U,0U}},
{SUB_91A0,{4U,2U,0U}},
{SUB_91A0,{5U,2U,0U}},
{SUB_91A0,{6U,2U,0U}},
{SUB_91A0,{7U,2U,0U}},
{SUB_91A8,{0U,2U,0U}},
{SUB_91A8,{1U,2U,0U}},
{SUB_91A8,{2U,2U,0U}},
{SUB_91A8,{3U,2U,0U}},
{SUB_91A8,{4U,2U,0U}},
{SUB_91A8,{5U,2U,0U}},
{SUB_91A8,{6U,2U,0U}},
{SUB_91A8,{7U,2U,0U}},
{SUB_91B0,{0U,2U,0U}},
{SUB_91B0,{1U,2U,0U}},
{SUB_91B0,{2U,2U,0U}},
{SUB_91B0,{3U,2U,0U}},
{SUB_91B0,{4U,2U,0U}},
{SUB_91B0,{5U,2U,0U}},
{SUB_91B0,{6U,2U,0U}},
{SUB_91B0,{7U,2U,0U}},
{SUB_91B8,{0U,2U,0U}},
{SUB_91B9,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_91C0,{0U,2U,0U}},
{SUBA_91C0,{1U,2U,0U}},
{SUBA_91C0,{2U,2U,0U}},
{SUBA_91C0,{3U,2U,0U}},
{SUBA_91C0,{4U,2U,0U}},
{SUBA_91C0,{5U,2U,0U}},
{SUBA_91C0,{6U,2U,0U}},
{SUBA_91C0,{7U,2U,0U}},
{SUBA_91C8,{0U,2U,0U}},
{SUBA_91C8,{1U,2U,0U}},
{SUBA_91C8,{2U,2U,0U}},
{SUBA_91C8,{3U,2U,0U}},
{SUBA_91C8,{4U,2U,0U}},
{SUBA_91C8,{5U,2U,0U}},
{SUBA_91C8,{6U,2U,0U}},
{SUBA_91C8,{7U,2U,0U}},
{SUBA_91D0,{0U,2U,0U}},
{SUBA_91D0,{1U,2U,0U}},
{SUBA_91D0,{2U,2U,0U}},
{SUBA_91D0,{3U,2U,0U}},
{SUBA_91D0,{4U,2U,0U}},
{SUBA_91D0,{5U,2U,0U}},
{SUBA_91D0,{6U,2U,0U}},
{SUBA_91D0,{7U,2U,0U}},
{SUBA_91D8,{0U,2U,0U}},
{SUBA_91D8,{1U,2U,0U}},
{SUBA_91D8,{2U,2U,0U}},
{SUBA_91D8,{3U,2U,0U}},
{SUBA_91D8,{4U,2U,0U}},
{SUBA_91D8,{5U,2U,0U}},
{SUBA_91D8,{6U,2U,0U}},
{SUBA_91D8,{7U,2U,0U}},
{SUBA_91E0,{0U,2U,0U}},
{SUBA_91E0,{1U,2U,0U}},
{SUBA_91E0,{2U,2U,0U}},
{SUBA_91E0,{3U,2U,0U}},
{SUBA_91E0,{4U,2U,0U}},
{SUBA_91E0,{5U,2U,0U}},
{SUBA_91E0,{6U,2U,0U}},
{SUBA_91E0,{7U,2U,0U}},
{SUBA_91E8,{0U,2U,0U}},
{SUBA_91E8,{1U,2U,0U}},
{SUBA_91E8,{2U,2U,0U}},
{SUBA_91E8,{3U,2U,0U}},
{SUBA_91E8,{4U,2U,0U}},
{SUBA_91E8,{5U,2U,0U}},
{SUBA_91E8,{6U,2U,0U}},
{SUBA_91E8,{7U,2U,0U}},
{SUBA_91F0,{0U,2U,0U}},
{SUBA_91F0,{1U,2U,0U}},
{SUBA_91F0,{2U,2U,0U}},
{SUBA_91F0,{3U,2U,0U}},
{SUBA_91F0,{4U,2U,0U}},
{SUBA_91F0,{5U,2U,0U}},
{SUBA_91F0,{6U,2U,0U}},
{SUBA_91F0,{7U,2U,0U}},
{SUBA_91F8,{0U,2U,0U}},
{SUBA_91F9,{0U,2U,0U}},
{SUBA_91FA,{0U,2U,0U}},
{SUBA_91FB,{0U,2U,0U}},
{SUBA_91FC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9000,{0U,3U,0U}},
{SUB_9000,{1U,3U,0U}},
{SUB_9000,{2U,3U,0U}},
{SUB_9000,{3U,3U,0U}},
{SUB_9000,{4U,3U,0U}},
{SUB_9000,{5U,3U,0U}},
{SUB_9000,{6U,3U,0U}},
{SUB_9000,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9010,{0U,3U,0U}},
{SUB_9010,{1U,3U,0U}},
{SUB_9010,{2U,3U,0U}},
{SUB_9010,{3U,3U,0U}},
{SUB_9010,{4U,3U,0U}},
{SUB_9010,{5U,3U,0U}},
{SUB_9010,{6U,3U,0U}},
{SUB_9010,{7U,3U,0U}},
{SUB_9018,{0U,3U,0U}},
{SUB_9018,{1U,3U,0U}},
{SUB_9018,{2U,3U,0U}},
{SUB_9018,{3U,3U,0U}},
{SUB_9018,{4U,3U,0U}},
{SUB_9018,{5U,3U,0U}},
{SUB_9018,{6U,3U,0U}},
{SUB_9018,{7U,3U,0U}},
{SUB_9020,{0U,3U,0U}},
{SUB_9020,{1U,3U,0U}},
{SUB_9020,{2U,3U,0U}},
{SUB_9020,{3U,3U,0U}},
{SUB_9020,{4U,3U,0U}},
{SUB_9020,{5U,3U,0U}},
{SUB_9020,{6U,3U,0U}},
{SUB_9020,{7U,3U,0U}},
{SUB_9028,{0U,3U,0U}},
{SUB_9028,{1U,3U,0U}},
{SUB_9028,{2U,3U,0U}},
{SUB_9028,{3U,3U,0U}},
{SUB_9028,{4U,3U,0U}},
{SUB_9028,{5U,3U,0U}},
{SUB_9028,{6U,3U,0U}},
{SUB_9028,{7U,3U,0U}},
{SUB_9030,{0U,3U,0U}},
{SUB_9030,{1U,3U,0U}},
{SUB_9030,{2U,3U,0U}},
{SUB_9030,{3U,3U,0U}},
{SUB_9030,{4U,3U,0U}},
{SUB_9030,{5U,3U,0U}},
{SUB_9030,{6U,3U,0U}},
{SUB_9030,{7U,3U,0U}},
{SUB_9038,{0U,3U,0U}},
{SUB_9039,{0U,3U,0U}},
{SUB_903A,{0U,3U,0U}},
{SUB_903B,{0U,3U,0U}},
{SUB_903C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9040,{0U,3U,0U}},
{SUB_9040,{1U,3U,0U}},
{SUB_9040,{2U,3U,0U}},
{SUB_9040,{3U,3U,0U}},
{SUB_9040,{4U,3U,0U}},
{SUB_9040,{5U,3U,0U}},
{SUB_9040,{6U,3U,0U}},
{SUB_9040,{7U,3U,0U}},
{SUB_9048,{0U,3U,0U}},
{SUB_9048,{1U,3U,0U}},
{SUB_9048,{2U,3U,0U}},
{SUB_9048,{3U,3U,0U}},
{SUB_9048,{4U,3U,0U}},
{SUB_9048,{5U,3U,0U}},
{SUB_9048,{6U,3U,0U}},
{SUB_9048,{7U,3U,0U}},
{SUB_9050,{0U,3U,0U}},
{SUB_9050,{1U,3U,0U}},
{SUB_9050,{2U,3U,0U}},
{SUB_9050,{3U,3U,0U}},
{SUB_9050,{4U,3U,0U}},
{SUB_9050,{5U,3U,0U}},
{SUB_9050,{6U,3U,0U}},
{SUB_9050,{7U,3U,0U}},
{SUB_9058,{0U,3U,0U}},
{SUB_9058,{1U,3U,0U}},
{SUB_9058,{2U,3U,0U}},
{SUB_9058,{3U,3U,0U}},
{SUB_9058,{4U,3U,0U}},
{SUB_9058,{5U,3U,0U}},
{SUB_9058,{6U,3U,0U}},
{SUB_9058,{7U,3U,0U}},
{SUB_9060,{0U,3U,0U}},
{SUB_9060,{1U,3U,0U}},
{SUB_9060,{2U,3U,0U}},
{SUB_9060,{3U,3U,0U}},
{SUB_9060,{4U,3U,0U}},
{SUB_9060,{5U,3U,0U}},
{SUB_9060,{6U,3U,0U}},
{SUB_9060,{7U,3U,0U}},
{SUB_9068,{0U,3U,0U}},
{SUB_9068,{1U,3U,0U}},
{SUB_9068,{2U,3U,0U}},
{SUB_9068,{3U,3U,0U}},
{SUB_9068,{4U,3U,0U}},
{SUB_9068,{5U,3U,0U}},
{SUB_9068,{6U,3U,0U}},
{SUB_9068,{7U,3U,0U}},
{SUB_9070,{0U,3U,0U}},
{SUB_9070,{1U,3U,0U}},
{SUB_9070,{2U,3U,0U}},
{SUB_9070,{3U,3U,0U}},
{SUB_9070,{4U,3U,0U}},
{SUB_9070,{5U,3U,0U}},
{SUB_9070,{6U,3U,0U}},
{SUB_9070,{7U,3U,0U}},
{SUB_9078,{0U,3U,0U}},
{SUB_9079,{0U,3U,0U}},
{SUB_907A,{0U,3U,0U}},
{SUB_907B,{0U,3U,0U}},
{SUB_907C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9080,{0U,3U,0U}},
{SUB_9080,{1U,3U,0U}},
{SUB_9080,{2U,3U,0U}},
{SUB_9080,{3U,3U,0U}},
{SUB_9080,{4U,3U,0U}},
{SUB_9080,{5U,3U,0U}},
{SUB_9080,{6U,3U,0U}},
{SUB_9080,{7U,3U,0U}},
{SUB_9088,{0U,3U,0U}},
{SUB_9088,{1U,3U,0U}},
{SUB_9088,{2U,3U,0U}},
{SUB_9088,{3U,3U,0U}},
{SUB_9088,{4U,3U,0U}},
{SUB_9088,{5U,3U,0U}},
{SUB_9088,{6U,3U,0U}},
{SUB_9088,{7U,3U,0U}},
{SUB_9090,{0U,3U,0U}},
{SUB_9090,{1U,3U,0U}},
{SUB_9090,{2U,3U,0U}},
{SUB_9090,{3U,3U,0U}},
{SUB_9090,{4U,3U,0U}},
{SUB_9090,{5U,3U,0U}},
{SUB_9090,{6U,3U,0U}},
{SUB_9090,{7U,3U,0U}},
{SUB_9098,{0U,3U,0U}},
{SUB_9098,{1U,3U,0U}},
{SUB_9098,{2U,3U,0U}},
{SUB_9098,{3U,3U,0U}},
{SUB_9098,{4U,3U,0U}},
{SUB_9098,{5U,3U,0U}},
{SUB_9098,{6U,3U,0U}},
{SUB_9098,{7U,3U,0U}},
{SUB_90A0,{0U,3U,0U}},
{SUB_90A0,{1U,3U,0U}},
{SUB_90A0,{2U,3U,0U}},
{SUB_90A0,{3U,3U,0U}},
{SUB_90A0,{4U,3U,0U}},
{SUB_90A0,{5U,3U,0U}},
{SUB_90A0,{6U,3U,0U}},
{SUB_90A0,{7U,3U,0U}},
{SUB_90A8,{0U,3U,0U}},
{SUB_90A8,{1U,3U,0U}},
{SUB_90A8,{2U,3U,0U}},
{SUB_90A8,{3U,3U,0U}},
{SUB_90A8,{4U,3U,0U}},
{SUB_90A8,{5U,3U,0U}},
{SUB_90A8,{6U,3U,0U}},
{SUB_90A8,{7U,3U,0U}},
{SUB_90B0,{0U,3U,0U}},
{SUB_90B0,{1U,3U,0U}},
{SUB_90B0,{2U,3U,0U}},
{SUB_90B0,{3U,3U,0U}},
{SUB_90B0,{4U,3U,0U}},
{SUB_90B0,{5U,3U,0U}},
{SUB_90B0,{6U,3U,0U}},
{SUB_90B0,{7U,3U,0U}},
{SUB_90B8,{0U,3U,0U}},
{SUB_90B9,{0U,3U,0U}},
{SUB_90BA,{0U,3U,0U}},
{SUB_90BB,{0U,3U,0U}},
{SUB_90BC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_90C0,{0U,3U,0U}},
{SUBA_90C0,{1U,3U,0U}},
{SUBA_90C0,{2U,3U,0U}},
{SUBA_90C0,{3U,3U,0U}},
{SUBA_90C0,{4U,3U,0U}},
{SUBA_90C0,{5U,3U,0U}},
{SUBA_90C0,{6U,3U,0U}},
{SUBA_90C0,{7U,3U,0U}},
{SUBA_90C8,{0U,3U,0U}},
{SUBA_90C8,{1U,3U,0U}},
{SUBA_90C8,{2U,3U,0U}},
{SUBA_90C8,{3U,3U,0U}},
{SUBA_90C8,{4U,3U,0U}},
{SUBA_90C8,{5U,3U,0U}},
{SUBA_90C8,{6U,3U,0U}},
{SUBA_90C8,{7U,3U,0U}},
{SUBA_90D0,{0U,3U,0U}},
{SUBA_90D0,{1U,3U,0U}},
{SUBA_90D0,{2U,3U,0U}},
{SUBA_90D0,{3U,3U,0U}},
{SUBA_90D0,{4U,3U,0U}},
{SUBA_90D0,{5U,3U,0U}},
{SUBA_90D0,{6U,3U,0U}},
{SUBA_90D0,{7U,3U,0U}},
{SUBA_90D8,{0U,3U,0U}},
{SUBA_90D8,{1U,3U,0U}},
{SUBA_90D8,{2U,3U,0U}},
{SUBA_90D8,{3U,3U,0U}},
{SUBA_90D8,{4U,3U,0U}},
{SUBA_90D8,{5U,3U,0U}},
{SUBA_90D8,{6U,3U,0U}},
{SUBA_90D8,{7U,3U,0U}},
{SUBA_90E0,{0U,3U,0U}},
{SUBA_90E0,{1U,3U,0U}},
{SUBA_90E0,{2U,3U,0U}},
{SUBA_90E0,{3U,3U,0U}},
{SUBA_90E0,{4U,3U,0U}},
{SUBA_90E0,{5U,3U,0U}},
{SUBA_90E0,{6U,3U,0U}},
{SUBA_90E0,{7U,3U,0U}},
{SUBA_90E8,{0U,3U,0U}},
{SUBA_90E8,{1U,3U,0U}},
{SUBA_90E8,{2U,3U,0U}},
{SUBA_90E8,{3U,3U,0U}},
{SUBA_90E8,{4U,3U,0U}},
{SUBA_90E8,{5U,3U,0U}},
{SUBA_90E8,{6U,3U,0U}},
{SUBA_90E8,{7U,3U,0U}},
{SUBA_90F0,{0U,3U,0U}},
{SUBA_90F0,{1U,3U,0U}},
{SUBA_90F0,{2U,3U,0U}},
{SUBA_90F0,{3U,3U,0U}},
{SUBA_90F0,{4U,3U,0U}},
{SUBA_90F0,{5U,3U,0U}},
{SUBA_90F0,{6U,3U,0U}},
{SUBA_90F0,{7U,3U,0U}},
{SUBA_90F8,{0U,3U,0U}},
{SUBA_90F9,{0U,3U,0U}},
{SUBA_90FA,{0U,3U,0U}},
{SUBA_90FB,{0U,3U,0U}},
{SUBA_90FC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9100,{0U,3U,0U}},
{SUBX_9100,{1U,3U,0U}},
{SUBX_9100,{2U,3U,0U}},
{SUBX_9100,{3U,3U,0U}},
{SUBX_9100,{4U,3U,0U}},
{SUBX_9100,{5U,3U,0U}},
{SUBX_9100,{6U,3U,0U}},
{SUBX_9100,{7U,3U,0U}},
{SUBX_9108,{0U,3U,0U}},
{SUBX_9108,{1U,3U,0U}},
{SUBX_9108,{2U,3U,0U}},
{SUBX_9108,{3U,3U,0U}},
{SUBX_9108,{4U,3U,0U}},
{SUBX_9108,{5U,3U,0U}},
{SUBX_9108,{6U,3U,0U}},
{SUBX_9108,{7U,3U,0U}},
{SUB_9110,{0U,3U,0U}},
{SUB_9110,{1U,3U,0U}},
{SUB_9110,{2U,3U,0U}},
{SUB_9110,{3U,3U,0U}},
{SUB_9110,{4U,3U,0U}},
{SUB_9110,{5U,3U,0U}},
{SUB_9110,{6U,3U,0U}},
{SUB_9110,{7U,3U,0U}},
{SUB_9118,{0U,3U,0U}},
{SUB_9118,{1U,3U,0U}},
{SUB_9118,{2U,3U,0U}},
{SUB_9118,{3U,3U,0U}},
{SUB_9118,{4U,3U,0U}},
{SUB_9118,{5U,3U,0U}},
{SUB_9118,{6U,3U,0U}},
{SUB_9118,{7U,3U,0U}},
{SUB_9120,{0U,3U,0U}},
{SUB_9120,{1U,3U,0U}},
{SUB_9120,{2U,3U,0U}},
{SUB_9120,{3U,3U,0U}},
{SUB_9120,{4U,3U,0U}},
{SUB_9120,{5U,3U,0U}},
{SUB_9120,{6U,3U,0U}},
{SUB_9120,{7U,3U,0U}},
{SUB_9128,{0U,3U,0U}},
{SUB_9128,{1U,3U,0U}},
{SUB_9128,{2U,3U,0U}},
{SUB_9128,{3U,3U,0U}},
{SUB_9128,{4U,3U,0U}},
{SUB_9128,{5U,3U,0U}},
{SUB_9128,{6U,3U,0U}},
{SUB_9128,{7U,3U,0U}},
{SUB_9130,{0U,3U,0U}},
{SUB_9130,{1U,3U,0U}},
{SUB_9130,{2U,3U,0U}},
{SUB_9130,{3U,3U,0U}},
{SUB_9130,{4U,3U,0U}},
{SUB_9130,{5U,3U,0U}},
{SUB_9130,{6U,3U,0U}},
{SUB_9130,{7U,3U,0U}},
{SUB_9138,{0U,3U,0U}},
{SUB_9139,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9140,{0U,3U,0U}},
{SUBX_9140,{1U,3U,0U}},
{SUBX_9140,{2U,3U,0U}},
{SUBX_9140,{3U,3U,0U}},
{SUBX_9140,{4U,3U,0U}},
{SUBX_9140,{5U,3U,0U}},
{SUBX_9140,{6U,3U,0U}},
{SUBX_9140,{7U,3U,0U}},
{SUBX_9148,{0U,3U,0U}},
{SUBX_9148,{1U,3U,0U}},
{SUBX_9148,{2U,3U,0U}},
{SUBX_9148,{3U,3U,0U}},
{SUBX_9148,{4U,3U,0U}},
{SUBX_9148,{5U,3U,0U}},
{SUBX_9148,{6U,3U,0U}},
{SUBX_9148,{7U,3U,0U}},
{SUB_9150,{0U,3U,0U}},
{SUB_9150,{1U,3U,0U}},
{SUB_9150,{2U,3U,0U}},
{SUB_9150,{3U,3U,0U}},
{SUB_9150,{4U,3U,0U}},
{SUB_9150,{5U,3U,0U}},
{SUB_9150,{6U,3U,0U}},
{SUB_9150,{7U,3U,0U}},
{SUB_9158,{0U,3U,0U}},
{SUB_9158,{1U,3U,0U}},
{SUB_9158,{2U,3U,0U}},
{SUB_9158,{3U,3U,0U}},
{SUB_9158,{4U,3U,0U}},
{SUB_9158,{5U,3U,0U}},
{SUB_9158,{6U,3U,0U}},
{SUB_9158,{7U,3U,0U}},
{SUB_9160,{0U,3U,0U}},
{SUB_9160,{1U,3U,0U}},
{SUB_9160,{2U,3U,0U}},
{SUB_9160,{3U,3U,0U}},
{SUB_9160,{4U,3U,0U}},
{SUB_9160,{5U,3U,0U}},
{SUB_9160,{6U,3U,0U}},
{SUB_9160,{7U,3U,0U}},
{SUB_9168,{0U,3U,0U}},
{SUB_9168,{1U,3U,0U}},
{SUB_9168,{2U,3U,0U}},
{SUB_9168,{3U,3U,0U}},
{SUB_9168,{4U,3U,0U}},
{SUB_9168,{5U,3U,0U}},
{SUB_9168,{6U,3U,0U}},
{SUB_9168,{7U,3U,0U}},
{SUB_9170,{0U,3U,0U}},
{SUB_9170,{1U,3U,0U}},
{SUB_9170,{2U,3U,0U}},
{SUB_9170,{3U,3U,0U}},
{SUB_9170,{4U,3U,0U}},
{SUB_9170,{5U,3U,0U}},
{SUB_9170,{6U,3U,0U}},
{SUB_9170,{7U,3U,0U}},
{SUB_9178,{0U,3U,0U}},
{SUB_9179,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9180,{0U,3U,0U}},
{SUBX_9180,{1U,3U,0U}},
{SUBX_9180,{2U,3U,0U}},
{SUBX_9180,{3U,3U,0U}},
{SUBX_9180,{4U,3U,0U}},
{SUBX_9180,{5U,3U,0U}},
{SUBX_9180,{6U,3U,0U}},
{SUBX_9180,{7U,3U,0U}},
{SUBX_9188,{0U,3U,0U}},
{SUBX_9188,{1U,3U,0U}},
{SUBX_9188,{2U,3U,0U}},
{SUBX_9188,{3U,3U,0U}},
{SUBX_9188,{4U,3U,0U}},
{SUBX_9188,{5U,3U,0U}},
{SUBX_9188,{6U,3U,0U}},
{SUBX_9188,{7U,3U,0U}},
{SUB_9190,{0U,3U,0U}},
{SUB_9190,{1U,3U,0U}},
{SUB_9190,{2U,3U,0U}},
{SUB_9190,{3U,3U,0U}},
{SUB_9190,{4U,3U,0U}},
{SUB_9190,{5U,3U,0U}},
{SUB_9190,{6U,3U,0U}},
{SUB_9190,{7U,3U,0U}},
{SUB_9198,{0U,3U,0U}},
{SUB_9198,{1U,3U,0U}},
{SUB_9198,{2U,3U,0U}},
{SUB_9198,{3U,3U,0U}},
{SUB_9198,{4U,3U,0U}},
{SUB_9198,{5U,3U,0U}},
{SUB_9198,{6U,3U,0U}},
{SUB_9198,{7U,3U,0U}},
{SUB_91A0,{0U,3U,0U}},
{SUB_91A0,{1U,3U,0U}},
{SUB_91A0,{2U,3U,0U}},
{SUB_91A0,{3U,3U,0U}},
{SUB_91A0,{4U,3U,0U}},
{SUB_91A0,{5U,3U,0U}},
{SUB_91A0,{6U,3U,0U}},
{SUB_91A0,{7U,3U,0U}},
{SUB_91A8,{0U,3U,0U}},
{SUB_91A8,{1U,3U,0U}},
{SUB_91A8,{2U,3U,0U}},
{SUB_91A8,{3U,3U,0U}},
{SUB_91A8,{4U,3U,0U}},
{SUB_91A8,{5U,3U,0U}},
{SUB_91A8,{6U,3U,0U}},
{SUB_91A8,{7U,3U,0U}},
{SUB_91B0,{0U,3U,0U}},
{SUB_91B0,{1U,3U,0U}},
{SUB_91B0,{2U,3U,0U}},
{SUB_91B0,{3U,3U,0U}},
{SUB_91B0,{4U,3U,0U}},
{SUB_91B0,{5U,3U,0U}},
{SUB_91B0,{6U,3U,0U}},
{SUB_91B0,{7U,3U,0U}},
{SUB_91B8,{0U,3U,0U}},
{SUB_91B9,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_91C0,{0U,3U,0U}},
{SUBA_91C0,{1U,3U,0U}},
{SUBA_91C0,{2U,3U,0U}},
{SUBA_91C0,{3U,3U,0U}},
{SUBA_91C0,{4U,3U,0U}},
{SUBA_91C0,{5U,3U,0U}},
{SUBA_91C0,{6U,3U,0U}},
{SUBA_91C0,{7U,3U,0U}},
{SUBA_91C8,{0U,3U,0U}},
{SUBA_91C8,{1U,3U,0U}},
{SUBA_91C8,{2U,3U,0U}},
{SUBA_91C8,{3U,3U,0U}},
{SUBA_91C8,{4U,3U,0U}},
{SUBA_91C8,{5U,3U,0U}},
{SUBA_91C8,{6U,3U,0U}},
{SUBA_91C8,{7U,3U,0U}},
{SUBA_91D0,{0U,3U,0U}},
{SUBA_91D0,{1U,3U,0U}},
{SUBA_91D0,{2U,3U,0U}},
{SUBA_91D0,{3U,3U,0U}},
{SUBA_91D0,{4U,3U,0U}},
{SUBA_91D0,{5U,3U,0U}},
{SUBA_91D0,{6U,3U,0U}},
{SUBA_91D0,{7U,3U,0U}},
{SUBA_91D8,{0U,3U,0U}},
{SUBA_91D8,{1U,3U,0U}},
{SUBA_91D8,{2U,3U,0U}},
{SUBA_91D8,{3U,3U,0U}},
{SUBA_91D8,{4U,3U,0U}},
{SUBA_91D8,{5U,3U,0U}},
{SUBA_91D8,{6U,3U,0U}},
{SUBA_91D8,{7U,3U,0U}},
{SUBA_91E0,{0U,3U,0U}},
{SUBA_91E0,{1U,3U,0U}},
{SUBA_91E0,{2U,3U,0U}},
{SUBA_91E0,{3U,3U,0U}},
{SUBA_91E0,{4U,3U,0U}},
{SUBA_91E0,{5U,3U,0U}},
{SUBA_91E0,{6U,3U,0U}},
{SUBA_91E0,{7U,3U,0U}},
{SUBA_91E8,{0U,3U,0U}},
{SUBA_91E8,{1U,3U,0U}},
{SUBA_91E8,{2U,3U,0U}},
{SUBA_91E8,{3U,3U,0U}},
{SUBA_91E8,{4U,3U,0U}},
{SUBA_91E8,{5U,3U,0U}},
{SUBA_91E8,{6U,3U,0U}},
{SUBA_91E8,{7U,3U,0U}},
{SUBA_91F0,{0U,3U,0U}},
{SUBA_91F0,{1U,3U,0U}},
{SUBA_91F0,{2U,3U,0U}},
{SUBA_91F0,{3U,3U,0U}},
{SUBA_91F0,{4U,3U,0U}},
{SUBA_91F0,{5U,3U,0U}},
{SUBA_91F0,{6U,3U,0U}},
{SUBA_91F0,{7U,3U,0U}},
{SUBA_91F8,{0U,3U,0U}},
{SUBA_91F9,{0U,3U,0U}},
{SUBA_91FA,{0U,3U,0U}},
{SUBA_91FB,{0U,3U,0U}},
{SUBA_91FC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9000,{0U,4U,0U}},
{SUB_9000,{1U,4U,0U}},
{SUB_9000,{2U,4U,0U}},
{SUB_9000,{3U,4U,0U}},
{SUB_9000,{4U,4U,0U}},
{SUB_9000,{5U,4U,0U}},
{SUB_9000,{6U,4U,0U}},
{SUB_9000,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9010,{0U,4U,0U}},
{SUB_9010,{1U,4U,0U}},
{SUB_9010,{2U,4U,0U}},
{SUB_9010,{3U,4U,0U}},
{SUB_9010,{4U,4U,0U}},
{SUB_9010,{5U,4U,0U}},
{SUB_9010,{6U,4U,0U}},
{SUB_9010,{7U,4U,0U}},
{SUB_9018,{0U,4U,0U}},
{SUB_9018,{1U,4U,0U}},
{SUB_9018,{2U,4U,0U}},
{SUB_9018,{3U,4U,0U}},
{SUB_9018,{4U,4U,0U}},
{SUB_9018,{5U,4U,0U}},
{SUB_9018,{6U,4U,0U}},
{SUB_9018,{7U,4U,0U}},
{SUB_9020,{0U,4U,0U}},
{SUB_9020,{1U,4U,0U}},
{SUB_9020,{2U,4U,0U}},
{SUB_9020,{3U,4U,0U}},
{SUB_9020,{4U,4U,0U}},
{SUB_9020,{5U,4U,0U}},
{SUB_9020,{6U,4U,0U}},
{SUB_9020,{7U,4U,0U}},
{SUB_9028,{0U,4U,0U}},
{SUB_9028,{1U,4U,0U}},
{SUB_9028,{2U,4U,0U}},
{SUB_9028,{3U,4U,0U}},
{SUB_9028,{4U,4U,0U}},
{SUB_9028,{5U,4U,0U}},
{SUB_9028,{6U,4U,0U}},
{SUB_9028,{7U,4U,0U}},
{SUB_9030,{0U,4U,0U}},
{SUB_9030,{1U,4U,0U}},
{SUB_9030,{2U,4U,0U}},
{SUB_9030,{3U,4U,0U}},
{SUB_9030,{4U,4U,0U}},
{SUB_9030,{5U,4U,0U}},
{SUB_9030,{6U,4U,0U}},
{SUB_9030,{7U,4U,0U}},
{SUB_9038,{0U,4U,0U}},
{SUB_9039,{0U,4U,0U}},
{SUB_903A,{0U,4U,0U}},
{SUB_903B,{0U,4U,0U}},
{SUB_903C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9040,{0U,4U,0U}},
{SUB_9040,{1U,4U,0U}},
{SUB_9040,{2U,4U,0U}},
{SUB_9040,{3U,4U,0U}},
{SUB_9040,{4U,4U,0U}},
{SUB_9040,{5U,4U,0U}},
{SUB_9040,{6U,4U,0U}},
{SUB_9040,{7U,4U,0U}},
{SUB_9048,{0U,4U,0U}},
{SUB_9048,{1U,4U,0U}},
{SUB_9048,{2U,4U,0U}},
{SUB_9048,{3U,4U,0U}},
{SUB_9048,{4U,4U,0U}},
{SUB_9048,{5U,4U,0U}},
{SUB_9048,{6U,4U,0U}},
{SUB_9048,{7U,4U,0U}},
{SUB_9050,{0U,4U,0U}},
{SUB_9050,{1U,4U,0U}},
{SUB_9050,{2U,4U,0U}},
{SUB_9050,{3U,4U,0U}},
{SUB_9050,{4U,4U,0U}},
{SUB_9050,{5U,4U,0U}},
{SUB_9050,{6U,4U,0U}},
{SUB_9050,{7U,4U,0U}},
{SUB_9058,{0U,4U,0U}},
{SUB_9058,{1U,4U,0U}},
{SUB_9058,{2U,4U,0U}},
{SUB_9058,{3U,4U,0U}},
{SUB_9058,{4U,4U,0U}},
{SUB_9058,{5U,4U,0U}},
{SUB_9058,{6U,4U,0U}},
{SUB_9058,{7U,4U,0U}},
{SUB_9060,{0U,4U,0U}},
{SUB_9060,{1U,4U,0U}},
{SUB_9060,{2U,4U,0U}},
{SUB_9060,{3U,4U,0U}},
{SUB_9060,{4U,4U,0U}},
{SUB_9060,{5U,4U,0U}},
{SUB_9060,{6U,4U,0U}},
{SUB_9060,{7U,4U,0U}},
{SUB_9068,{0U,4U,0U}},
{SUB_9068,{1U,4U,0U}},
{SUB_9068,{2U,4U,0U}},
{SUB_9068,{3U,4U,0U}},
{SUB_9068,{4U,4U,0U}},
{SUB_9068,{5U,4U,0U}},
{SUB_9068,{6U,4U,0U}},
{SUB_9068,{7U,4U,0U}},
{SUB_9070,{0U,4U,0U}},
{SUB_9070,{1U,4U,0U}},
{SUB_9070,{2U,4U,0U}},
{SUB_9070,{3U,4U,0U}},
{SUB_9070,{4U,4U,0U}},
{SUB_9070,{5U,4U,0U}},
{SUB_9070,{6U,4U,0U}},
{SUB_9070,{7U,4U,0U}},
{SUB_9078,{0U,4U,0U}},
{SUB_9079,{0U,4U,0U}},
{SUB_907A,{0U,4U,0U}},
{SUB_907B,{0U,4U,0U}},
{SUB_907C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9080,{0U,4U,0U}},
{SUB_9080,{1U,4U,0U}},
{SUB_9080,{2U,4U,0U}},
{SUB_9080,{3U,4U,0U}},
{SUB_9080,{4U,4U,0U}},
{SUB_9080,{5U,4U,0U}},
{SUB_9080,{6U,4U,0U}},
{SUB_9080,{7U,4U,0U}},
{SUB_9088,{0U,4U,0U}},
{SUB_9088,{1U,4U,0U}},
{SUB_9088,{2U,4U,0U}},
{SUB_9088,{3U,4U,0U}},
{SUB_9088,{4U,4U,0U}},
{SUB_9088,{5U,4U,0U}},
{SUB_9088,{6U,4U,0U}},
{SUB_9088,{7U,4U,0U}},
{SUB_9090,{0U,4U,0U}},
{SUB_9090,{1U,4U,0U}},
{SUB_9090,{2U,4U,0U}},
{SUB_9090,{3U,4U,0U}},
{SUB_9090,{4U,4U,0U}},
{SUB_9090,{5U,4U,0U}},
{SUB_9090,{6U,4U,0U}},
{SUB_9090,{7U,4U,0U}},
{SUB_9098,{0U,4U,0U}},
{SUB_9098,{1U,4U,0U}},
{SUB_9098,{2U,4U,0U}},
{SUB_9098,{3U,4U,0U}},
{SUB_9098,{4U,4U,0U}},
{SUB_9098,{5U,4U,0U}},
{SUB_9098,{6U,4U,0U}},
{SUB_9098,{7U,4U,0U}},
{SUB_90A0,{0U,4U,0U}},
{SUB_90A0,{1U,4U,0U}},
{SUB_90A0,{2U,4U,0U}},
{SUB_90A0,{3U,4U,0U}},
{SUB_90A0,{4U,4U,0U}},
{SUB_90A0,{5U,4U,0U}},
{SUB_90A0,{6U,4U,0U}},
{SUB_90A0,{7U,4U,0U}},
{SUB_90A8,{0U,4U,0U}},
{SUB_90A8,{1U,4U,0U}},
{SUB_90A8,{2U,4U,0U}},
{SUB_90A8,{3U,4U,0U}},
{SUB_90A8,{4U,4U,0U}},
{SUB_90A8,{5U,4U,0U}},
{SUB_90A8,{6U,4U,0U}},
{SUB_90A8,{7U,4U,0U}},
{SUB_90B0,{0U,4U,0U}},
{SUB_90B0,{1U,4U,0U}},
{SUB_90B0,{2U,4U,0U}},
{SUB_90B0,{3U,4U,0U}},
{SUB_90B0,{4U,4U,0U}},
{SUB_90B0,{5U,4U,0U}},
{SUB_90B0,{6U,4U,0U}},
{SUB_90B0,{7U,4U,0U}},
{SUB_90B8,{0U,4U,0U}},
{SUB_90B9,{0U,4U,0U}},
{SUB_90BA,{0U,4U,0U}},
{SUB_90BB,{0U,4U,0U}},
{SUB_90BC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_90C0,{0U,4U,0U}},
{SUBA_90C0,{1U,4U,0U}},
{SUBA_90C0,{2U,4U,0U}},
{SUBA_90C0,{3U,4U,0U}},
{SUBA_90C0,{4U,4U,0U}},
{SUBA_90C0,{5U,4U,0U}},
{SUBA_90C0,{6U,4U,0U}},
{SUBA_90C0,{7U,4U,0U}},
{SUBA_90C8,{0U,4U,0U}},
{SUBA_90C8,{1U,4U,0U}},
{SUBA_90C8,{2U,4U,0U}},
{SUBA_90C8,{3U,4U,0U}},
{SUBA_90C8,{4U,4U,0U}},
{SUBA_90C8,{5U,4U,0U}},
{SUBA_90C8,{6U,4U,0U}},
{SUBA_90C8,{7U,4U,0U}},
{SUBA_90D0,{0U,4U,0U}},
{SUBA_90D0,{1U,4U,0U}},
{SUBA_90D0,{2U,4U,0U}},
{SUBA_90D0,{3U,4U,0U}},
{SUBA_90D0,{4U,4U,0U}},
{SUBA_90D0,{5U,4U,0U}},
{SUBA_90D0,{6U,4U,0U}},
{SUBA_90D0,{7U,4U,0U}},
{SUBA_90D8,{0U,4U,0U}},
{SUBA_90D8,{1U,4U,0U}},
{SUBA_90D8,{2U,4U,0U}},
{SUBA_90D8,{3U,4U,0U}},
{SUBA_90D8,{4U,4U,0U}},
{SUBA_90D8,{5U,4U,0U}},
{SUBA_90D8,{6U,4U,0U}},
{SUBA_90D8,{7U,4U,0U}},
{SUBA_90E0,{0U,4U,0U}},
{SUBA_90E0,{1U,4U,0U}},
{SUBA_90E0,{2U,4U,0U}},
{SUBA_90E0,{3U,4U,0U}},
{SUBA_90E0,{4U,4U,0U}},
{SUBA_90E0,{5U,4U,0U}},
{SUBA_90E0,{6U,4U,0U}},
{SUBA_90E0,{7U,4U,0U}},
{SUBA_90E8,{0U,4U,0U}},
{SUBA_90E8,{1U,4U,0U}},
{SUBA_90E8,{2U,4U,0U}},
{SUBA_90E8,{3U,4U,0U}},
{SUBA_90E8,{4U,4U,0U}},
{SUBA_90E8,{5U,4U,0U}},
{SUBA_90E8,{6U,4U,0U}},
{SUBA_90E8,{7U,4U,0U}},
{SUBA_90F0,{0U,4U,0U}},
{SUBA_90F0,{1U,4U,0U}},
{SUBA_90F0,{2U,4U,0U}},
{SUBA_90F0,{3U,4U,0U}},
{SUBA_90F0,{4U,4U,0U}},
{SUBA_90F0,{5U,4U,0U}},
{SUBA_90F0,{6U,4U,0U}},
{SUBA_90F0,{7U,4U,0U}},
{SUBA_90F8,{0U,4U,0U}},
{SUBA_90F9,{0U,4U,0U}},
{SUBA_90FA,{0U,4U,0U}},
{SUBA_90FB,{0U,4U,0U}},
{SUBA_90FC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9100,{0U,4U,0U}},
{SUBX_9100,{1U,4U,0U}},
{SUBX_9100,{2U,4U,0U}},
{SUBX_9100,{3U,4U,0U}},
{SUBX_9100,{4U,4U,0U}},
{SUBX_9100,{5U,4U,0U}},
{SUBX_9100,{6U,4U,0U}},
{SUBX_9100,{7U,4U,0U}},
{SUBX_9108,{0U,4U,0U}},
{SUBX_9108,{1U,4U,0U}},
{SUBX_9108,{2U,4U,0U}},
{SUBX_9108,{3U,4U,0U}},
{SUBX_9108,{4U,4U,0U}},
{SUBX_9108,{5U,4U,0U}},
{SUBX_9108,{6U,4U,0U}},
{SUBX_9108,{7U,4U,0U}},
{SUB_9110,{0U,4U,0U}},
{SUB_9110,{1U,4U,0U}},
{SUB_9110,{2U,4U,0U}},
{SUB_9110,{3U,4U,0U}},
{SUB_9110,{4U,4U,0U}},
{SUB_9110,{5U,4U,0U}},
{SUB_9110,{6U,4U,0U}},
{SUB_9110,{7U,4U,0U}},
{SUB_9118,{0U,4U,0U}},
{SUB_9118,{1U,4U,0U}},
{SUB_9118,{2U,4U,0U}},
{SUB_9118,{3U,4U,0U}},
{SUB_9118,{4U,4U,0U}},
{SUB_9118,{5U,4U,0U}},
{SUB_9118,{6U,4U,0U}},
{SUB_9118,{7U,4U,0U}},
{SUB_9120,{0U,4U,0U}},
{SUB_9120,{1U,4U,0U}},
{SUB_9120,{2U,4U,0U}},
{SUB_9120,{3U,4U,0U}},
{SUB_9120,{4U,4U,0U}},
{SUB_9120,{5U,4U,0U}},
{SUB_9120,{6U,4U,0U}},
{SUB_9120,{7U,4U,0U}},
{SUB_9128,{0U,4U,0U}},
{SUB_9128,{1U,4U,0U}},
{SUB_9128,{2U,4U,0U}},
{SUB_9128,{3U,4U,0U}},
{SUB_9128,{4U,4U,0U}},
{SUB_9128,{5U,4U,0U}},
{SUB_9128,{6U,4U,0U}},
{SUB_9128,{7U,4U,0U}},
{SUB_9130,{0U,4U,0U}},
{SUB_9130,{1U,4U,0U}},
{SUB_9130,{2U,4U,0U}},
{SUB_9130,{3U,4U,0U}},
{SUB_9130,{4U,4U,0U}},
{SUB_9130,{5U,4U,0U}},
{SUB_9130,{6U,4U,0U}},
{SUB_9130,{7U,4U,0U}},
{SUB_9138,{0U,4U,0U}},
{SUB_9139,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9140,{0U,4U,0U}},
{SUBX_9140,{1U,4U,0U}},
{SUBX_9140,{2U,4U,0U}},
{SUBX_9140,{3U,4U,0U}},
{SUBX_9140,{4U,4U,0U}},
{SUBX_9140,{5U,4U,0U}},
{SUBX_9140,{6U,4U,0U}},
{SUBX_9140,{7U,4U,0U}},
{SUBX_9148,{0U,4U,0U}},
{SUBX_9148,{1U,4U,0U}},
{SUBX_9148,{2U,4U,0U}},
{SUBX_9148,{3U,4U,0U}},
{SUBX_9148,{4U,4U,0U}},
{SUBX_9148,{5U,4U,0U}},
{SUBX_9148,{6U,4U,0U}},
{SUBX_9148,{7U,4U,0U}},
{SUB_9150,{0U,4U,0U}},
{SUB_9150,{1U,4U,0U}},
{SUB_9150,{2U,4U,0U}},
{SUB_9150,{3U,4U,0U}},
{SUB_9150,{4U,4U,0U}},
{SUB_9150,{5U,4U,0U}},
{SUB_9150,{6U,4U,0U}},
{SUB_9150,{7U,4U,0U}},
{SUB_9158,{0U,4U,0U}},
{SUB_9158,{1U,4U,0U}},
{SUB_9158,{2U,4U,0U}},
{SUB_9158,{3U,4U,0U}},
{SUB_9158,{4U,4U,0U}},
{SUB_9158,{5U,4U,0U}},
{SUB_9158,{6U,4U,0U}},
{SUB_9158,{7U,4U,0U}},
{SUB_9160,{0U,4U,0U}},
{SUB_9160,{1U,4U,0U}},
{SUB_9160,{2U,4U,0U}},
{SUB_9160,{3U,4U,0U}},
{SUB_9160,{4U,4U,0U}},
{SUB_9160,{5U,4U,0U}},
{SUB_9160,{6U,4U,0U}},
{SUB_9160,{7U,4U,0U}},
{SUB_9168,{0U,4U,0U}},
{SUB_9168,{1U,4U,0U}},
{SUB_9168,{2U,4U,0U}},
{SUB_9168,{3U,4U,0U}},
{SUB_9168,{4U,4U,0U}},
{SUB_9168,{5U,4U,0U}},
{SUB_9168,{6U,4U,0U}},
{SUB_9168,{7U,4U,0U}},
{SUB_9170,{0U,4U,0U}},
{SUB_9170,{1U,4U,0U}},
{SUB_9170,{2U,4U,0U}},
{SUB_9170,{3U,4U,0U}},
{SUB_9170,{4U,4U,0U}},
{SUB_9170,{5U,4U,0U}},
{SUB_9170,{6U,4U,0U}},
{SUB_9170,{7U,4U,0U}},
{SUB_9178,{0U,4U,0U}},
{SUB_9179,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9180,{0U,4U,0U}},
{SUBX_9180,{1U,4U,0U}},
{SUBX_9180,{2U,4U,0U}},
{SUBX_9180,{3U,4U,0U}},
{SUBX_9180,{4U,4U,0U}},
{SUBX_9180,{5U,4U,0U}},
{SUBX_9180,{6U,4U,0U}},
{SUBX_9180,{7U,4U,0U}},
{SUBX_9188,{0U,4U,0U}},
{SUBX_9188,{1U,4U,0U}},
{SUBX_9188,{2U,4U,0U}},
{SUBX_9188,{3U,4U,0U}},
{SUBX_9188,{4U,4U,0U}},
{SUBX_9188,{5U,4U,0U}},
{SUBX_9188,{6U,4U,0U}},
{SUBX_9188,{7U,4U,0U}},
{SUB_9190,{0U,4U,0U}},
{SUB_9190,{1U,4U,0U}},
{SUB_9190,{2U,4U,0U}},
{SUB_9190,{3U,4U,0U}},
{SUB_9190,{4U,4U,0U}},
{SUB_9190,{5U,4U,0U}},
{SUB_9190,{6U,4U,0U}},
{SUB_9190,{7U,4U,0U}},
{SUB_9198,{0U,4U,0U}},
{SUB_9198,{1U,4U,0U}},
{SUB_9198,{2U,4U,0U}},
{SUB_9198,{3U,4U,0U}},
{SUB_9198,{4U,4U,0U}},
{SUB_9198,{5U,4U,0U}},
{SUB_9198,{6U,4U,0U}},
{SUB_9198,{7U,4U,0U}},
{SUB_91A0,{0U,4U,0U}},
{SUB_91A0,{1U,4U,0U}},
{SUB_91A0,{2U,4U,0U}},
{SUB_91A0,{3U,4U,0U}},
{SUB_91A0,{4U,4U,0U}},
{SUB_91A0,{5U,4U,0U}},
{SUB_91A0,{6U,4U,0U}},
{SUB_91A0,{7U,4U,0U}},
{SUB_91A8,{0U,4U,0U}},
{SUB_91A8,{1U,4U,0U}},
{SUB_91A8,{2U,4U,0U}},
{SUB_91A8,{3U,4U,0U}},
{SUB_91A8,{4U,4U,0U}},
{SUB_91A8,{5U,4U,0U}},
{SUB_91A8,{6U,4U,0U}},
{SUB_91A8,{7U,4U,0U}},
{SUB_91B0,{0U,4U,0U}},
{SUB_91B0,{1U,4U,0U}},
{SUB_91B0,{2U,4U,0U}},
{SUB_91B0,{3U,4U,0U}},
{SUB_91B0,{4U,4U,0U}},
{SUB_91B0,{5U,4U,0U}},
{SUB_91B0,{6U,4U,0U}},
{SUB_91B0,{7U,4U,0U}},
{SUB_91B8,{0U,4U,0U}},
{SUB_91B9,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_91C0,{0U,4U,0U}},
{SUBA_91C0,{1U,4U,0U}},
{SUBA_91C0,{2U,4U,0U}},
{SUBA_91C0,{3U,4U,0U}},
{SUBA_91C0,{4U,4U,0U}},
{SUBA_91C0,{5U,4U,0U}},
{SUBA_91C0,{6U,4U,0U}},
{SUBA_91C0,{7U,4U,0U}},
{SUBA_91C8,{0U,4U,0U}},
{SUBA_91C8,{1U,4U,0U}},
{SUBA_91C8,{2U,4U,0U}},
{SUBA_91C8,{3U,4U,0U}},
{SUBA_91C8,{4U,4U,0U}},
{SUBA_91C8,{5U,4U,0U}},
{SUBA_91C8,{6U,4U,0U}},
{SUBA_91C8,{7U,4U,0U}},
{SUBA_91D0,{0U,4U,0U}},
{SUBA_91D0,{1U,4U,0U}},
{SUBA_91D0,{2U,4U,0U}},
{SUBA_91D0,{3U,4U,0U}},
{SUBA_91D0,{4U,4U,0U}},
{SUBA_91D0,{5U,4U,0U}},
{SUBA_91D0,{6U,4U,0U}},
{SUBA_91D0,{7U,4U,0U}},
{SUBA_91D8,{0U,4U,0U}},
{SUBA_91D8,{1U,4U,0U}},
{SUBA_91D8,{2U,4U,0U}},
{SUBA_91D8,{3U,4U,0U}},
{SUBA_91D8,{4U,4U,0U}},
{SUBA_91D8,{5U,4U,0U}},
{SUBA_91D8,{6U,4U,0U}},
{SUBA_91D8,{7U,4U,0U}},
{SUBA_91E0,{0U,4U,0U}},
{SUBA_91E0,{1U,4U,0U}},
{SUBA_91E0,{2U,4U,0U}},
{SUBA_91E0,{3U,4U,0U}},
{SUBA_91E0,{4U,4U,0U}},
{SUBA_91E0,{5U,4U,0U}},
{SUBA_91E0,{6U,4U,0U}},
{SUBA_91E0,{7U,4U,0U}},
{SUBA_91E8,{0U,4U,0U}},
{SUBA_91E8,{1U,4U,0U}},
{SUBA_91E8,{2U,4U,0U}},
{SUBA_91E8,{3U,4U,0U}},
{SUBA_91E8,{4U,4U,0U}},
{SUBA_91E8,{5U,4U,0U}},
{SUBA_91E8,{6U,4U,0U}},
{SUBA_91E8,{7U,4U,0U}},
{SUBA_91F0,{0U,4U,0U}},
{SUBA_91F0,{1U,4U,0U}},
{SUBA_91F0,{2U,4U,0U}},
{SUBA_91F0,{3U,4U,0U}},
{SUBA_91F0,{4U,4U,0U}},
{SUBA_91F0,{5U,4U,0U}},
{SUBA_91F0,{6U,4U,0U}},
{SUBA_91F0,{7U,4U,0U}},
{SUBA_91F8,{0U,4U,0U}},
{SUBA_91F9,{0U,4U,0U}},
{SUBA_91FA,{0U,4U,0U}},
{SUBA_91FB,{0U,4U,0U}},
{SUBA_91FC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9000,{0U,5U,0U}},
{SUB_9000,{1U,5U,0U}},
{SUB_9000,{2U,5U,0U}},
{SUB_9000,{3U,5U,0U}},
{SUB_9000,{4U,5U,0U}},
{SUB_9000,{5U,5U,0U}},
{SUB_9000,{6U,5U,0U}},
{SUB_9000,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9010,{0U,5U,0U}},
{SUB_9010,{1U,5U,0U}},
{SUB_9010,{2U,5U,0U}},
{SUB_9010,{3U,5U,0U}},
{SUB_9010,{4U,5U,0U}},
{SUB_9010,{5U,5U,0U}},
{SUB_9010,{6U,5U,0U}},
{SUB_9010,{7U,5U,0U}},
{SUB_9018,{0U,5U,0U}},
{SUB_9018,{1U,5U,0U}},
{SUB_9018,{2U,5U,0U}},
{SUB_9018,{3U,5U,0U}},
{SUB_9018,{4U,5U,0U}},
{SUB_9018,{5U,5U,0U}},
{SUB_9018,{6U,5U,0U}},
{SUB_9018,{7U,5U,0U}},
{SUB_9020,{0U,5U,0U}},
{SUB_9020,{1U,5U,0U}},
{SUB_9020,{2U,5U,0U}},
{SUB_9020,{3U,5U,0U}},
{SUB_9020,{4U,5U,0U}},
{SUB_9020,{5U,5U,0U}},
{SUB_9020,{6U,5U,0U}},
{SUB_9020,{7U,5U,0U}},
{SUB_9028,{0U,5U,0U}},
{SUB_9028,{1U,5U,0U}},
{SUB_9028,{2U,5U,0U}},
{SUB_9028,{3U,5U,0U}},
{SUB_9028,{4U,5U,0U}},
{SUB_9028,{5U,5U,0U}},
{SUB_9028,{6U,5U,0U}},
{SUB_9028,{7U,5U,0U}},
{SUB_9030,{0U,5U,0U}},
{SUB_9030,{1U,5U,0U}},
{SUB_9030,{2U,5U,0U}},
{SUB_9030,{3U,5U,0U}},
{SUB_9030,{4U,5U,0U}},
{SUB_9030,{5U,5U,0U}},
{SUB_9030,{6U,5U,0U}},
{SUB_9030,{7U,5U,0U}},
{SUB_9038,{0U,5U,0U}},
{SUB_9039,{0U,5U,0U}},
{SUB_903A,{0U,5U,0U}},
{SUB_903B,{0U,5U,0U}},
{SUB_903C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9040,{0U,5U,0U}},
{SUB_9040,{1U,5U,0U}},
{SUB_9040,{2U,5U,0U}},
{SUB_9040,{3U,5U,0U}},
{SUB_9040,{4U,5U,0U}},
{SUB_9040,{5U,5U,0U}},
{SUB_9040,{6U,5U,0U}},
{SUB_9040,{7U,5U,0U}},
{SUB_9048,{0U,5U,0U}},
{SUB_9048,{1U,5U,0U}},
{SUB_9048,{2U,5U,0U}},
{SUB_9048,{3U,5U,0U}},
{SUB_9048,{4U,5U,0U}},
{SUB_9048,{5U,5U,0U}},
{SUB_9048,{6U,5U,0U}},
{SUB_9048,{7U,5U,0U}},
{SUB_9050,{0U,5U,0U}},
{SUB_9050,{1U,5U,0U}},
{SUB_9050,{2U,5U,0U}},
{SUB_9050,{3U,5U,0U}},
{SUB_9050,{4U,5U,0U}},
{SUB_9050,{5U,5U,0U}},
{SUB_9050,{6U,5U,0U}},
{SUB_9050,{7U,5U,0U}},
{SUB_9058,{0U,5U,0U}},
{SUB_9058,{1U,5U,0U}},
{SUB_9058,{2U,5U,0U}},
{SUB_9058,{3U,5U,0U}},
{SUB_9058,{4U,5U,0U}},
{SUB_9058,{5U,5U,0U}},
{SUB_9058,{6U,5U,0U}},
{SUB_9058,{7U,5U,0U}},
{SUB_9060,{0U,5U,0U}},
{SUB_9060,{1U,5U,0U}},
{SUB_9060,{2U,5U,0U}},
{SUB_9060,{3U,5U,0U}},
{SUB_9060,{4U,5U,0U}},
{SUB_9060,{5U,5U,0U}},
{SUB_9060,{6U,5U,0U}},
{SUB_9060,{7U,5U,0U}},
{SUB_9068,{0U,5U,0U}},
{SUB_9068,{1U,5U,0U}},
{SUB_9068,{2U,5U,0U}},
{SUB_9068,{3U,5U,0U}},
{SUB_9068,{4U,5U,0U}},
{SUB_9068,{5U,5U,0U}},
{SUB_9068,{6U,5U,0U}},
{SUB_9068,{7U,5U,0U}},
{SUB_9070,{0U,5U,0U}},
{SUB_9070,{1U,5U,0U}},
{SUB_9070,{2U,5U,0U}},
{SUB_9070,{3U,5U,0U}},
{SUB_9070,{4U,5U,0U}},
{SUB_9070,{5U,5U,0U}},
{SUB_9070,{6U,5U,0U}},
{SUB_9070,{7U,5U,0U}},
{SUB_9078,{0U,5U,0U}},
{SUB_9079,{0U,5U,0U}},
{SUB_907A,{0U,5U,0U}},
{SUB_907B,{0U,5U,0U}},
{SUB_907C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9080,{0U,5U,0U}},
{SUB_9080,{1U,5U,0U}},
{SUB_9080,{2U,5U,0U}},
{SUB_9080,{3U,5U,0U}},
{SUB_9080,{4U,5U,0U}},
{SUB_9080,{5U,5U,0U}},
{SUB_9080,{6U,5U,0U}},
{SUB_9080,{7U,5U,0U}},
{SUB_9088,{0U,5U,0U}},
{SUB_9088,{1U,5U,0U}},
{SUB_9088,{2U,5U,0U}},
{SUB_9088,{3U,5U,0U}},
{SUB_9088,{4U,5U,0U}},
{SUB_9088,{5U,5U,0U}},
{SUB_9088,{6U,5U,0U}},
{SUB_9088,{7U,5U,0U}},
{SUB_9090,{0U,5U,0U}},
{SUB_9090,{1U,5U,0U}},
{SUB_9090,{2U,5U,0U}},
{SUB_9090,{3U,5U,0U}},
{SUB_9090,{4U,5U,0U}},
{SUB_9090,{5U,5U,0U}},
{SUB_9090,{6U,5U,0U}},
{SUB_9090,{7U,5U,0U}},
{SUB_9098,{0U,5U,0U}},
{SUB_9098,{1U,5U,0U}},
{SUB_9098,{2U,5U,0U}},
{SUB_9098,{3U,5U,0U}},
{SUB_9098,{4U,5U,0U}},
{SUB_9098,{5U,5U,0U}},
{SUB_9098,{6U,5U,0U}},
{SUB_9098,{7U,5U,0U}},
{SUB_90A0,{0U,5U,0U}},
{SUB_90A0,{1U,5U,0U}},
{SUB_90A0,{2U,5U,0U}},
{SUB_90A0,{3U,5U,0U}},
{SUB_90A0,{4U,5U,0U}},
{SUB_90A0,{5U,5U,0U}},
{SUB_90A0,{6U,5U,0U}},
{SUB_90A0,{7U,5U,0U}},
{SUB_90A8,{0U,5U,0U}},
{SUB_90A8,{1U,5U,0U}},
{SUB_90A8,{2U,5U,0U}},
{SUB_90A8,{3U,5U,0U}},
{SUB_90A8,{4U,5U,0U}},
{SUB_90A8,{5U,5U,0U}},
{SUB_90A8,{6U,5U,0U}},
{SUB_90A8,{7U,5U,0U}},
{SUB_90B0,{0U,5U,0U}},
{SUB_90B0,{1U,5U,0U}},
{SUB_90B0,{2U,5U,0U}},
{SUB_90B0,{3U,5U,0U}},
{SUB_90B0,{4U,5U,0U}},
{SUB_90B0,{5U,5U,0U}},
{SUB_90B0,{6U,5U,0U}},
{SUB_90B0,{7U,5U,0U}},
{SUB_90B8,{0U,5U,0U}},
{SUB_90B9,{0U,5U,0U}},
{SUB_90BA,{0U,5U,0U}},
{SUB_90BB,{0U,5U,0U}},
{SUB_90BC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_90C0,{0U,5U,0U}},
{SUBA_90C0,{1U,5U,0U}},
{SUBA_90C0,{2U,5U,0U}},
{SUBA_90C0,{3U,5U,0U}},
{SUBA_90C0,{4U,5U,0U}},
{SUBA_90C0,{5U,5U,0U}},
{SUBA_90C0,{6U,5U,0U}},
{SUBA_90C0,{7U,5U,0U}},
{SUBA_90C8,{0U,5U,0U}},
{SUBA_90C8,{1U,5U,0U}},
{SUBA_90C8,{2U,5U,0U}},
{SUBA_90C8,{3U,5U,0U}},
{SUBA_90C8,{4U,5U,0U}},
{SUBA_90C8,{5U,5U,0U}},
{SUBA_90C8,{6U,5U,0U}},
{SUBA_90C8,{7U,5U,0U}},
{SUBA_90D0,{0U,5U,0U}},
{SUBA_90D0,{1U,5U,0U}},
{SUBA_90D0,{2U,5U,0U}},
{SUBA_90D0,{3U,5U,0U}},
{SUBA_90D0,{4U,5U,0U}},
{SUBA_90D0,{5U,5U,0U}},
{SUBA_90D0,{6U,5U,0U}},
{SUBA_90D0,{7U,5U,0U}},
{SUBA_90D8,{0U,5U,0U}},
{SUBA_90D8,{1U,5U,0U}},
{SUBA_90D8,{2U,5U,0U}},
{SUBA_90D8,{3U,5U,0U}},
{SUBA_90D8,{4U,5U,0U}},
{SUBA_90D8,{5U,5U,0U}},
{SUBA_90D8,{6U,5U,0U}},
{SUBA_90D8,{7U,5U,0U}},
{SUBA_90E0,{0U,5U,0U}},
{SUBA_90E0,{1U,5U,0U}},
{SUBA_90E0,{2U,5U,0U}},
{SUBA_90E0,{3U,5U,0U}},
{SUBA_90E0,{4U,5U,0U}},
{SUBA_90E0,{5U,5U,0U}},
{SUBA_90E0,{6U,5U,0U}},
{SUBA_90E0,{7U,5U,0U}},
{SUBA_90E8,{0U,5U,0U}},
{SUBA_90E8,{1U,5U,0U}},
{SUBA_90E8,{2U,5U,0U}},
{SUBA_90E8,{3U,5U,0U}},
{SUBA_90E8,{4U,5U,0U}},
{SUBA_90E8,{5U,5U,0U}},
{SUBA_90E8,{6U,5U,0U}},
{SUBA_90E8,{7U,5U,0U}},
{SUBA_90F0,{0U,5U,0U}},
{SUBA_90F0,{1U,5U,0U}},
{SUBA_90F0,{2U,5U,0U}},
{SUBA_90F0,{3U,5U,0U}},
{SUBA_90F0,{4U,5U,0U}},
{SUBA_90F0,{5U,5U,0U}},
{SUBA_90F0,{6U,5U,0U}},
{SUBA_90F0,{7U,5U,0U}},
{SUBA_90F8,{0U,5U,0U}},
{SUBA_90F9,{0U,5U,0U}},
{SUBA_90FA,{0U,5U,0U}},
{SUBA_90FB,{0U,5U,0U}},
{SUBA_90FC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9100,{0U,5U,0U}},
{SUBX_9100,{1U,5U,0U}},
{SUBX_9100,{2U,5U,0U}},
{SUBX_9100,{3U,5U,0U}},
{SUBX_9100,{4U,5U,0U}},
{SUBX_9100,{5U,5U,0U}},
{SUBX_9100,{6U,5U,0U}},
{SUBX_9100,{7U,5U,0U}},
{SUBX_9108,{0U,5U,0U}},
{SUBX_9108,{1U,5U,0U}},
{SUBX_9108,{2U,5U,0U}},
{SUBX_9108,{3U,5U,0U}},
{SUBX_9108,{4U,5U,0U}},
{SUBX_9108,{5U,5U,0U}},
{SUBX_9108,{6U,5U,0U}},
{SUBX_9108,{7U,5U,0U}},
{SUB_9110,{0U,5U,0U}},
{SUB_9110,{1U,5U,0U}},
{SUB_9110,{2U,5U,0U}},
{SUB_9110,{3U,5U,0U}},
{SUB_9110,{4U,5U,0U}},
{SUB_9110,{5U,5U,0U}},
{SUB_9110,{6U,5U,0U}},
{SUB_9110,{7U,5U,0U}},
{SUB_9118,{0U,5U,0U}},
{SUB_9118,{1U,5U,0U}},
{SUB_9118,{2U,5U,0U}},
{SUB_9118,{3U,5U,0U}},
{SUB_9118,{4U,5U,0U}},
{SUB_9118,{5U,5U,0U}},
{SUB_9118,{6U,5U,0U}},
{SUB_9118,{7U,5U,0U}},
{SUB_9120,{0U,5U,0U}},
{SUB_9120,{1U,5U,0U}},
{SUB_9120,{2U,5U,0U}},
{SUB_9120,{3U,5U,0U}},
{SUB_9120,{4U,5U,0U}},
{SUB_9120,{5U,5U,0U}},
{SUB_9120,{6U,5U,0U}},
{SUB_9120,{7U,5U,0U}},
{SUB_9128,{0U,5U,0U}},
{SUB_9128,{1U,5U,0U}},
{SUB_9128,{2U,5U,0U}},
{SUB_9128,{3U,5U,0U}},
{SUB_9128,{4U,5U,0U}},
{SUB_9128,{5U,5U,0U}},
{SUB_9128,{6U,5U,0U}},
{SUB_9128,{7U,5U,0U}},
{SUB_9130,{0U,5U,0U}},
{SUB_9130,{1U,5U,0U}},
{SUB_9130,{2U,5U,0U}},
{SUB_9130,{3U,5U,0U}},
{SUB_9130,{4U,5U,0U}},
{SUB_9130,{5U,5U,0U}},
{SUB_9130,{6U,5U,0U}},
{SUB_9130,{7U,5U,0U}},
{SUB_9138,{0U,5U,0U}},
{SUB_9139,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9140,{0U,5U,0U}},
{SUBX_9140,{1U,5U,0U}},
{SUBX_9140,{2U,5U,0U}},
{SUBX_9140,{3U,5U,0U}},
{SUBX_9140,{4U,5U,0U}},
{SUBX_9140,{5U,5U,0U}},
{SUBX_9140,{6U,5U,0U}},
{SUBX_9140,{7U,5U,0U}},
{SUBX_9148,{0U,5U,0U}},
{SUBX_9148,{1U,5U,0U}},
{SUBX_9148,{2U,5U,0U}},
{SUBX_9148,{3U,5U,0U}},
{SUBX_9148,{4U,5U,0U}},
{SUBX_9148,{5U,5U,0U}},
{SUBX_9148,{6U,5U,0U}},
{SUBX_9148,{7U,5U,0U}},
{SUB_9150,{0U,5U,0U}},
{SUB_9150,{1U,5U,0U}},
{SUB_9150,{2U,5U,0U}},
{SUB_9150,{3U,5U,0U}},
{SUB_9150,{4U,5U,0U}},
{SUB_9150,{5U,5U,0U}},
{SUB_9150,{6U,5U,0U}},
{SUB_9150,{7U,5U,0U}},
{SUB_9158,{0U,5U,0U}},
{SUB_9158,{1U,5U,0U}},
{SUB_9158,{2U,5U,0U}},
{SUB_9158,{3U,5U,0U}},
{SUB_9158,{4U,5U,0U}},
{SUB_9158,{5U,5U,0U}},
{SUB_9158,{6U,5U,0U}},
{SUB_9158,{7U,5U,0U}},
{SUB_9160,{0U,5U,0U}},
{SUB_9160,{1U,5U,0U}},
{SUB_9160,{2U,5U,0U}},
{SUB_9160,{3U,5U,0U}},
{SUB_9160,{4U,5U,0U}},
{SUB_9160,{5U,5U,0U}},
{SUB_9160,{6U,5U,0U}},
{SUB_9160,{7U,5U,0U}},
{SUB_9168,{0U,5U,0U}},
{SUB_9168,{1U,5U,0U}},
{SUB_9168,{2U,5U,0U}},
{SUB_9168,{3U,5U,0U}},
{SUB_9168,{4U,5U,0U}},
{SUB_9168,{5U,5U,0U}},
{SUB_9168,{6U,5U,0U}},
{SUB_9168,{7U,5U,0U}},
{SUB_9170,{0U,5U,0U}},
{SUB_9170,{1U,5U,0U}},
{SUB_9170,{2U,5U,0U}},
{SUB_9170,{3U,5U,0U}},
{SUB_9170,{4U,5U,0U}},
{SUB_9170,{5U,5U,0U}},
{SUB_9170,{6U,5U,0U}},
{SUB_9170,{7U,5U,0U}},
{SUB_9178,{0U,5U,0U}},
{SUB_9179,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9180,{0U,5U,0U}},
{SUBX_9180,{1U,5U,0U}},
{SUBX_9180,{2U,5U,0U}},
{SUBX_9180,{3U,5U,0U}},
{SUBX_9180,{4U,5U,0U}},
{SUBX_9180,{5U,5U,0U}},
{SUBX_9180,{6U,5U,0U}},
{SUBX_9180,{7U,5U,0U}},
{SUBX_9188,{0U,5U,0U}},
{SUBX_9188,{1U,5U,0U}},
{SUBX_9188,{2U,5U,0U}},
{SUBX_9188,{3U,5U,0U}},
{SUBX_9188,{4U,5U,0U}},
{SUBX_9188,{5U,5U,0U}},
{SUBX_9188,{6U,5U,0U}},
{SUBX_9188,{7U,5U,0U}},
{SUB_9190,{0U,5U,0U}},
{SUB_9190,{1U,5U,0U}},
{SUB_9190,{2U,5U,0U}},
{SUB_9190,{3U,5U,0U}},
{SUB_9190,{4U,5U,0U}},
{SUB_9190,{5U,5U,0U}},
{SUB_9190,{6U,5U,0U}},
{SUB_9190,{7U,5U,0U}},
{SUB_9198,{0U,5U,0U}},
{SUB_9198,{1U,5U,0U}},
{SUB_9198,{2U,5U,0U}},
{SUB_9198,{3U,5U,0U}},
{SUB_9198,{4U,5U,0U}},
{SUB_9198,{5U,5U,0U}},
{SUB_9198,{6U,5U,0U}},
{SUB_9198,{7U,5U,0U}},
{SUB_91A0,{0U,5U,0U}},
{SUB_91A0,{1U,5U,0U}},
{SUB_91A0,{2U,5U,0U}},
{SUB_91A0,{3U,5U,0U}},
{SUB_91A0,{4U,5U,0U}},
{SUB_91A0,{5U,5U,0U}},
{SUB_91A0,{6U,5U,0U}},
{SUB_91A0,{7U,5U,0U}},
{SUB_91A8,{0U,5U,0U}},
{SUB_91A8,{1U,5U,0U}},
{SUB_91A8,{2U,5U,0U}},
{SUB_91A8,{3U,5U,0U}},
{SUB_91A8,{4U,5U,0U}},
{SUB_91A8,{5U,5U,0U}},
{SUB_91A8,{6U,5U,0U}},
{SUB_91A8,{7U,5U,0U}},
{SUB_91B0,{0U,5U,0U}},
{SUB_91B0,{1U,5U,0U}},
{SUB_91B0,{2U,5U,0U}},
{SUB_91B0,{3U,5U,0U}},
{SUB_91B0,{4U,5U,0U}},
{SUB_91B0,{5U,5U,0U}},
{SUB_91B0,{6U,5U,0U}},
{SUB_91B0,{7U,5U,0U}},
{SUB_91B8,{0U,5U,0U}},
{SUB_91B9,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_91C0,{0U,5U,0U}},
{SUBA_91C0,{1U,5U,0U}},
{SUBA_91C0,{2U,5U,0U}},
{SUBA_91C0,{3U,5U,0U}},
{SUBA_91C0,{4U,5U,0U}},
{SUBA_91C0,{5U,5U,0U}},
{SUBA_91C0,{6U,5U,0U}},
{SUBA_91C0,{7U,5U,0U}},
{SUBA_91C8,{0U,5U,0U}},
{SUBA_91C8,{1U,5U,0U}},
{SUBA_91C8,{2U,5U,0U}},
{SUBA_91C8,{3U,5U,0U}},
{SUBA_91C8,{4U,5U,0U}},
{SUBA_91C8,{5U,5U,0U}},
{SUBA_91C8,{6U,5U,0U}},
{SUBA_91C8,{7U,5U,0U}},
{SUBA_91D0,{0U,5U,0U}},
{SUBA_91D0,{1U,5U,0U}},
{SUBA_91D0,{2U,5U,0U}},
{SUBA_91D0,{3U,5U,0U}},
{SUBA_91D0,{4U,5U,0U}},
{SUBA_91D0,{5U,5U,0U}},
{SUBA_91D0,{6U,5U,0U}},
{SUBA_91D0,{7U,5U,0U}},
{SUBA_91D8,{0U,5U,0U}},
{SUBA_91D8,{1U,5U,0U}},
{SUBA_91D8,{2U,5U,0U}},
{SUBA_91D8,{3U,5U,0U}},
{SUBA_91D8,{4U,5U,0U}},
{SUBA_91D8,{5U,5U,0U}},
{SUBA_91D8,{6U,5U,0U}},
{SUBA_91D8,{7U,5U,0U}},
{SUBA_91E0,{0U,5U,0U}},
{SUBA_91E0,{1U,5U,0U}},
{SUBA_91E0,{2U,5U,0U}},
{SUBA_91E0,{3U,5U,0U}},
{SUBA_91E0,{4U,5U,0U}},
{SUBA_91E0,{5U,5U,0U}},
{SUBA_91E0,{6U,5U,0U}},
{SUBA_91E0,{7U,5U,0U}},
{SUBA_91E8,{0U,5U,0U}},
{SUBA_91E8,{1U,5U,0U}},
{SUBA_91E8,{2U,5U,0U}},
{SUBA_91E8,{3U,5U,0U}},
{SUBA_91E8,{4U,5U,0U}},
{SUBA_91E8,{5U,5U,0U}},
{SUBA_91E8,{6U,5U,0U}},
{SUBA_91E8,{7U,5U,0U}},
{SUBA_91F0,{0U,5U,0U}},
{SUBA_91F0,{1U,5U,0U}},
{SUBA_91F0,{2U,5U,0U}},
{SUBA_91F0,{3U,5U,0U}},
{SUBA_91F0,{4U,5U,0U}},
{SUBA_91F0,{5U,5U,0U}},
{SUBA_91F0,{6U,5U,0U}},
{SUBA_91F0,{7U,5U,0U}},
{SUBA_91F8,{0U,5U,0U}},
{SUBA_91F9,{0U,5U,0U}},
{SUBA_91FA,{0U,5U,0U}},
{SUBA_91FB,{0U,5U,0U}},
{SUBA_91FC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9000,{0U,6U,0U}},
{SUB_9000,{1U,6U,0U}},
{SUB_9000,{2U,6U,0U}},
{SUB_9000,{3U,6U,0U}},
{SUB_9000,{4U,6U,0U}},
{SUB_9000,{5U,6U,0U}},
{SUB_9000,{6U,6U,0U}},
{SUB_9000,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9010,{0U,6U,0U}},
{SUB_9010,{1U,6U,0U}},
{SUB_9010,{2U,6U,0U}},
{SUB_9010,{3U,6U,0U}},
{SUB_9010,{4U,6U,0U}},
{SUB_9010,{5U,6U,0U}},
{SUB_9010,{6U,6U,0U}},
{SUB_9010,{7U,6U,0U}},
{SUB_9018,{0U,6U,0U}},
{SUB_9018,{1U,6U,0U}},
{SUB_9018,{2U,6U,0U}},
{SUB_9018,{3U,6U,0U}},
{SUB_9018,{4U,6U,0U}},
{SUB_9018,{5U,6U,0U}},
{SUB_9018,{6U,6U,0U}},
{SUB_9018,{7U,6U,0U}},
{SUB_9020,{0U,6U,0U}},
{SUB_9020,{1U,6U,0U}},
{SUB_9020,{2U,6U,0U}},
{SUB_9020,{3U,6U,0U}},
{SUB_9020,{4U,6U,0U}},
{SUB_9020,{5U,6U,0U}},
{SUB_9020,{6U,6U,0U}},
{SUB_9020,{7U,6U,0U}},
{SUB_9028,{0U,6U,0U}},
{SUB_9028,{1U,6U,0U}},
{SUB_9028,{2U,6U,0U}},
{SUB_9028,{3U,6U,0U}},
{SUB_9028,{4U,6U,0U}},
{SUB_9028,{5U,6U,0U}},
{SUB_9028,{6U,6U,0U}},
{SUB_9028,{7U,6U,0U}},
{SUB_9030,{0U,6U,0U}},
{SUB_9030,{1U,6U,0U}},
{SUB_9030,{2U,6U,0U}},
{SUB_9030,{3U,6U,0U}},
{SUB_9030,{4U,6U,0U}},
{SUB_9030,{5U,6U,0U}},
{SUB_9030,{6U,6U,0U}},
{SUB_9030,{7U,6U,0U}},
{SUB_9038,{0U,6U,0U}},
{SUB_9039,{0U,6U,0U}},
{SUB_903A,{0U,6U,0U}},
{SUB_903B,{0U,6U,0U}},
{SUB_903C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9040,{0U,6U,0U}},
{SUB_9040,{1U,6U,0U}},
{SUB_9040,{2U,6U,0U}},
{SUB_9040,{3U,6U,0U}},
{SUB_9040,{4U,6U,0U}},
{SUB_9040,{5U,6U,0U}},
{SUB_9040,{6U,6U,0U}},
{SUB_9040,{7U,6U,0U}},
{SUB_9048,{0U,6U,0U}},
{SUB_9048,{1U,6U,0U}},
{SUB_9048,{2U,6U,0U}},
{SUB_9048,{3U,6U,0U}},
{SUB_9048,{4U,6U,0U}},
{SUB_9048,{5U,6U,0U}},
{SUB_9048,{6U,6U,0U}},
{SUB_9048,{7U,6U,0U}},
{SUB_9050,{0U,6U,0U}},
{SUB_9050,{1U,6U,0U}},
{SUB_9050,{2U,6U,0U}},
{SUB_9050,{3U,6U,0U}},
{SUB_9050,{4U,6U,0U}},
{SUB_9050,{5U,6U,0U}},
{SUB_9050,{6U,6U,0U}},
{SUB_9050,{7U,6U,0U}},
{SUB_9058,{0U,6U,0U}},
{SUB_9058,{1U,6U,0U}},
{SUB_9058,{2U,6U,0U}},
{SUB_9058,{3U,6U,0U}},
{SUB_9058,{4U,6U,0U}},
{SUB_9058,{5U,6U,0U}},
{SUB_9058,{6U,6U,0U}},
{SUB_9058,{7U,6U,0U}},
{SUB_9060,{0U,6U,0U}},
{SUB_9060,{1U,6U,0U}},
{SUB_9060,{2U,6U,0U}},
{SUB_9060,{3U,6U,0U}},
{SUB_9060,{4U,6U,0U}},
{SUB_9060,{5U,6U,0U}},
{SUB_9060,{6U,6U,0U}},
{SUB_9060,{7U,6U,0U}},
{SUB_9068,{0U,6U,0U}},
{SUB_9068,{1U,6U,0U}},
{SUB_9068,{2U,6U,0U}},
{SUB_9068,{3U,6U,0U}},
{SUB_9068,{4U,6U,0U}},
{SUB_9068,{5U,6U,0U}},
{SUB_9068,{6U,6U,0U}},
{SUB_9068,{7U,6U,0U}},
{SUB_9070,{0U,6U,0U}},
{SUB_9070,{1U,6U,0U}},
{SUB_9070,{2U,6U,0U}},
{SUB_9070,{3U,6U,0U}},
{SUB_9070,{4U,6U,0U}},
{SUB_9070,{5U,6U,0U}},
{SUB_9070,{6U,6U,0U}},
{SUB_9070,{7U,6U,0U}},
{SUB_9078,{0U,6U,0U}},
{SUB_9079,{0U,6U,0U}},
{SUB_907A,{0U,6U,0U}},
{SUB_907B,{0U,6U,0U}},
{SUB_907C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9080,{0U,6U,0U}},
{SUB_9080,{1U,6U,0U}},
{SUB_9080,{2U,6U,0U}},
{SUB_9080,{3U,6U,0U}},
{SUB_9080,{4U,6U,0U}},
{SUB_9080,{5U,6U,0U}},
{SUB_9080,{6U,6U,0U}},
{SUB_9080,{7U,6U,0U}},
{SUB_9088,{0U,6U,0U}},
{SUB_9088,{1U,6U,0U}},
{SUB_9088,{2U,6U,0U}},
{SUB_9088,{3U,6U,0U}},
{SUB_9088,{4U,6U,0U}},
{SUB_9088,{5U,6U,0U}},
{SUB_9088,{6U,6U,0U}},
{SUB_9088,{7U,6U,0U}},
{SUB_9090,{0U,6U,0U}},
{SUB_9090,{1U,6U,0U}},
{SUB_9090,{2U,6U,0U}},
{SUB_9090,{3U,6U,0U}},
{SUB_9090,{4U,6U,0U}},
{SUB_9090,{5U,6U,0U}},
{SUB_9090,{6U,6U,0U}},
{SUB_9090,{7U,6U,0U}},
{SUB_9098,{0U,6U,0U}},
{SUB_9098,{1U,6U,0U}},
{SUB_9098,{2U,6U,0U}},
{SUB_9098,{3U,6U,0U}},
{SUB_9098,{4U,6U,0U}},
{SUB_9098,{5U,6U,0U}},
{SUB_9098,{6U,6U,0U}},
{SUB_9098,{7U,6U,0U}},
{SUB_90A0,{0U,6U,0U}},
{SUB_90A0,{1U,6U,0U}},
{SUB_90A0,{2U,6U,0U}},
{SUB_90A0,{3U,6U,0U}},
{SUB_90A0,{4U,6U,0U}},
{SUB_90A0,{5U,6U,0U}},
{SUB_90A0,{6U,6U,0U}},
{SUB_90A0,{7U,6U,0U}},
{SUB_90A8,{0U,6U,0U}},
{SUB_90A8,{1U,6U,0U}},
{SUB_90A8,{2U,6U,0U}},
{SUB_90A8,{3U,6U,0U}},
{SUB_90A8,{4U,6U,0U}},
{SUB_90A8,{5U,6U,0U}},
{SUB_90A8,{6U,6U,0U}},
{SUB_90A8,{7U,6U,0U}},
{SUB_90B0,{0U,6U,0U}},
{SUB_90B0,{1U,6U,0U}},
{SUB_90B0,{2U,6U,0U}},
{SUB_90B0,{3U,6U,0U}},
{SUB_90B0,{4U,6U,0U}},
{SUB_90B0,{5U,6U,0U}},
{SUB_90B0,{6U,6U,0U}},
{SUB_90B0,{7U,6U,0U}},
{SUB_90B8,{0U,6U,0U}},
{SUB_90B9,{0U,6U,0U}},
{SUB_90BA,{0U,6U,0U}},
{SUB_90BB,{0U,6U,0U}},
{SUB_90BC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_90C0,{0U,6U,0U}},
{SUBA_90C0,{1U,6U,0U}},
{SUBA_90C0,{2U,6U,0U}},
{SUBA_90C0,{3U,6U,0U}},
{SUBA_90C0,{4U,6U,0U}},
{SUBA_90C0,{5U,6U,0U}},
{SUBA_90C0,{6U,6U,0U}},
{SUBA_90C0,{7U,6U,0U}},
{SUBA_90C8,{0U,6U,0U}},
{SUBA_90C8,{1U,6U,0U}},
{SUBA_90C8,{2U,6U,0U}},
{SUBA_90C8,{3U,6U,0U}},
{SUBA_90C8,{4U,6U,0U}},
{SUBA_90C8,{5U,6U,0U}},
{SUBA_90C8,{6U,6U,0U}},
{SUBA_90C8,{7U,6U,0U}},
{SUBA_90D0,{0U,6U,0U}},
{SUBA_90D0,{1U,6U,0U}},
{SUBA_90D0,{2U,6U,0U}},
{SUBA_90D0,{3U,6U,0U}},
{SUBA_90D0,{4U,6U,0U}},
{SUBA_90D0,{5U,6U,0U}},
{SUBA_90D0,{6U,6U,0U}},
{SUBA_90D0,{7U,6U,0U}},
{SUBA_90D8,{0U,6U,0U}},
{SUBA_90D8,{1U,6U,0U}},
{SUBA_90D8,{2U,6U,0U}},
{SUBA_90D8,{3U,6U,0U}},
{SUBA_90D8,{4U,6U,0U}},
{SUBA_90D8,{5U,6U,0U}},
{SUBA_90D8,{6U,6U,0U}},
{SUBA_90D8,{7U,6U,0U}},
{SUBA_90E0,{0U,6U,0U}},
{SUBA_90E0,{1U,6U,0U}},
{SUBA_90E0,{2U,6U,0U}},
{SUBA_90E0,{3U,6U,0U}},
{SUBA_90E0,{4U,6U,0U}},
{SUBA_90E0,{5U,6U,0U}},
{SUBA_90E0,{6U,6U,0U}},
{SUBA_90E0,{7U,6U,0U}},
{SUBA_90E8,{0U,6U,0U}},
{SUBA_90E8,{1U,6U,0U}},
{SUBA_90E8,{2U,6U,0U}},
{SUBA_90E8,{3U,6U,0U}},
{SUBA_90E8,{4U,6U,0U}},
{SUBA_90E8,{5U,6U,0U}},
{SUBA_90E8,{6U,6U,0U}},
{SUBA_90E8,{7U,6U,0U}},
{SUBA_90F0,{0U,6U,0U}},
{SUBA_90F0,{1U,6U,0U}},
{SUBA_90F0,{2U,6U,0U}},
{SUBA_90F0,{3U,6U,0U}},
{SUBA_90F0,{4U,6U,0U}},
{SUBA_90F0,{5U,6U,0U}},
{SUBA_90F0,{6U,6U,0U}},
{SUBA_90F0,{7U,6U,0U}},
{SUBA_90F8,{0U,6U,0U}},
{SUBA_90F9,{0U,6U,0U}},
{SUBA_90FA,{0U,6U,0U}},
{SUBA_90FB,{0U,6U,0U}},
{SUBA_90FC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9100,{0U,6U,0U}},
{SUBX_9100,{1U,6U,0U}},
{SUBX_9100,{2U,6U,0U}},
{SUBX_9100,{3U,6U,0U}},
{SUBX_9100,{4U,6U,0U}},
{SUBX_9100,{5U,6U,0U}},
{SUBX_9100,{6U,6U,0U}},
{SUBX_9100,{7U,6U,0U}},
{SUBX_9108,{0U,6U,0U}},
{SUBX_9108,{1U,6U,0U}},
{SUBX_9108,{2U,6U,0U}},
{SUBX_9108,{3U,6U,0U}},
{SUBX_9108,{4U,6U,0U}},
{SUBX_9108,{5U,6U,0U}},
{SUBX_9108,{6U,6U,0U}},
{SUBX_9108,{7U,6U,0U}},
{SUB_9110,{0U,6U,0U}},
{SUB_9110,{1U,6U,0U}},
{SUB_9110,{2U,6U,0U}},
{SUB_9110,{3U,6U,0U}},
{SUB_9110,{4U,6U,0U}},
{SUB_9110,{5U,6U,0U}},
{SUB_9110,{6U,6U,0U}},
{SUB_9110,{7U,6U,0U}},
{SUB_9118,{0U,6U,0U}},
{SUB_9118,{1U,6U,0U}},
{SUB_9118,{2U,6U,0U}},
{SUB_9118,{3U,6U,0U}},
{SUB_9118,{4U,6U,0U}},
{SUB_9118,{5U,6U,0U}},
{SUB_9118,{6U,6U,0U}},
{SUB_9118,{7U,6U,0U}},
{SUB_9120,{0U,6U,0U}},
{SUB_9120,{1U,6U,0U}},
{SUB_9120,{2U,6U,0U}},
{SUB_9120,{3U,6U,0U}},
{SUB_9120,{4U,6U,0U}},
{SUB_9120,{5U,6U,0U}},
{SUB_9120,{6U,6U,0U}},
{SUB_9120,{7U,6U,0U}},
{SUB_9128,{0U,6U,0U}},
{SUB_9128,{1U,6U,0U}},
{SUB_9128,{2U,6U,0U}},
{SUB_9128,{3U,6U,0U}},
{SUB_9128,{4U,6U,0U}},
{SUB_9128,{5U,6U,0U}},
{SUB_9128,{6U,6U,0U}},
{SUB_9128,{7U,6U,0U}},
{SUB_9130,{0U,6U,0U}},
{SUB_9130,{1U,6U,0U}},
{SUB_9130,{2U,6U,0U}},
{SUB_9130,{3U,6U,0U}},
{SUB_9130,{4U,6U,0U}},
{SUB_9130,{5U,6U,0U}},
{SUB_9130,{6U,6U,0U}},
{SUB_9130,{7U,6U,0U}},
{SUB_9138,{0U,6U,0U}},
{SUB_9139,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9140,{0U,6U,0U}},
{SUBX_9140,{1U,6U,0U}},
{SUBX_9140,{2U,6U,0U}},
{SUBX_9140,{3U,6U,0U}},
{SUBX_9140,{4U,6U,0U}},
{SUBX_9140,{5U,6U,0U}},
{SUBX_9140,{6U,6U,0U}},
{SUBX_9140,{7U,6U,0U}},
{SUBX_9148,{0U,6U,0U}},
{SUBX_9148,{1U,6U,0U}},
{SUBX_9148,{2U,6U,0U}},
{SUBX_9148,{3U,6U,0U}},
{SUBX_9148,{4U,6U,0U}},
{SUBX_9148,{5U,6U,0U}},
{SUBX_9148,{6U,6U,0U}},
{SUBX_9148,{7U,6U,0U}},
{SUB_9150,{0U,6U,0U}},
{SUB_9150,{1U,6U,0U}},
{SUB_9150,{2U,6U,0U}},
{SUB_9150,{3U,6U,0U}},
{SUB_9150,{4U,6U,0U}},
{SUB_9150,{5U,6U,0U}},
{SUB_9150,{6U,6U,0U}},
{SUB_9150,{7U,6U,0U}},
{SUB_9158,{0U,6U,0U}},
{SUB_9158,{1U,6U,0U}},
{SUB_9158,{2U,6U,0U}},
{SUB_9158,{3U,6U,0U}},
{SUB_9158,{4U,6U,0U}},
{SUB_9158,{5U,6U,0U}},
{SUB_9158,{6U,6U,0U}},
{SUB_9158,{7U,6U,0U}},
{SUB_9160,{0U,6U,0U}},
{SUB_9160,{1U,6U,0U}},
{SUB_9160,{2U,6U,0U}},
{SUB_9160,{3U,6U,0U}},
{SUB_9160,{4U,6U,0U}},
{SUB_9160,{5U,6U,0U}},
{SUB_9160,{6U,6U,0U}},
{SUB_9160,{7U,6U,0U}},
{SUB_9168,{0U,6U,0U}},
{SUB_9168,{1U,6U,0U}},
{SUB_9168,{2U,6U,0U}},
{SUB_9168,{3U,6U,0U}},
{SUB_9168,{4U,6U,0U}},
{SUB_9168,{5U,6U,0U}},
{SUB_9168,{6U,6U,0U}},
{SUB_9168,{7U,6U,0U}},
{SUB_9170,{0U,6U,0U}},
{SUB_9170,{1U,6U,0U}},
{SUB_9170,{2U,6U,0U}},
{SUB_9170,{3U,6U,0U}},
{SUB_9170,{4U,6U,0U}},
{SUB_9170,{5U,6U,0U}},
{SUB_9170,{6U,6U,0U}},
{SUB_9170,{7U,6U,0U}},
{SUB_9178,{0U,6U,0U}},
{SUB_9179,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9180,{0U,6U,0U}},
{SUBX_9180,{1U,6U,0U}},
{SUBX_9180,{2U,6U,0U}},
{SUBX_9180,{3U,6U,0U}},
{SUBX_9180,{4U,6U,0U}},
{SUBX_9180,{5U,6U,0U}},
{SUBX_9180,{6U,6U,0U}},
{SUBX_9180,{7U,6U,0U}},
{SUBX_9188,{0U,6U,0U}},
{SUBX_9188,{1U,6U,0U}},
{SUBX_9188,{2U,6U,0U}},
{SUBX_9188,{3U,6U,0U}},
{SUBX_9188,{4U,6U,0U}},
{SUBX_9188,{5U,6U,0U}},
{SUBX_9188,{6U,6U,0U}},
{SUBX_9188,{7U,6U,0U}},
{SUB_9190,{0U,6U,0U}},
{SUB_9190,{1U,6U,0U}},
{SUB_9190,{2U,6U,0U}},
{SUB_9190,{3U,6U,0U}},
{SUB_9190,{4U,6U,0U}},
{SUB_9190,{5U,6U,0U}},
{SUB_9190,{6U,6U,0U}},
{SUB_9190,{7U,6U,0U}},
{SUB_9198,{0U,6U,0U}},
{SUB_9198,{1U,6U,0U}},
{SUB_9198,{2U,6U,0U}},
{SUB_9198,{3U,6U,0U}},
{SUB_9198,{4U,6U,0U}},
{SUB_9198,{5U,6U,0U}},
{SUB_9198,{6U,6U,0U}},
{SUB_9198,{7U,6U,0U}},
{SUB_91A0,{0U,6U,0U}},
{SUB_91A0,{1U,6U,0U}},
{SUB_91A0,{2U,6U,0U}},
{SUB_91A0,{3U,6U,0U}},
{SUB_91A0,{4U,6U,0U}},
{SUB_91A0,{5U,6U,0U}},
{SUB_91A0,{6U,6U,0U}},
{SUB_91A0,{7U,6U,0U}},
{SUB_91A8,{0U,6U,0U}},
{SUB_91A8,{1U,6U,0U}},
{SUB_91A8,{2U,6U,0U}},
{SUB_91A8,{3U,6U,0U}},
{SUB_91A8,{4U,6U,0U}},
{SUB_91A8,{5U,6U,0U}},
{SUB_91A8,{6U,6U,0U}},
{SUB_91A8,{7U,6U,0U}},
{SUB_91B0,{0U,6U,0U}},
{SUB_91B0,{1U,6U,0U}},
{SUB_91B0,{2U,6U,0U}},
{SUB_91B0,{3U,6U,0U}},
{SUB_91B0,{4U,6U,0U}},
{SUB_91B0,{5U,6U,0U}},
{SUB_91B0,{6U,6U,0U}},
{SUB_91B0,{7U,6U,0U}},
{SUB_91B8,{0U,6U,0U}},
{SUB_91B9,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_91C0,{0U,6U,0U}},
{SUBA_91C0,{1U,6U,0U}},
{SUBA_91C0,{2U,6U,0U}},
{SUBA_91C0,{3U,6U,0U}},
{SUBA_91C0,{4U,6U,0U}},
{SUBA_91C0,{5U,6U,0U}},
{SUBA_91C0,{6U,6U,0U}},
{SUBA_91C0,{7U,6U,0U}},
{SUBA_91C8,{0U,6U,0U}},
{SUBA_91C8,{1U,6U,0U}},
{SUBA_91C8,{2U,6U,0U}},
{SUBA_91C8,{3U,6U,0U}},
{SUBA_91C8,{4U,6U,0U}},
{SUBA_91C8,{5U,6U,0U}},
{SUBA_91C8,{6U,6U,0U}},
{SUBA_91C8,{7U,6U,0U}},
{SUBA_91D0,{0U,6U,0U}},
{SUBA_91D0,{1U,6U,0U}},
{SUBA_91D0,{2U,6U,0U}},
{SUBA_91D0,{3U,6U,0U}},
{SUBA_91D0,{4U,6U,0U}},
{SUBA_91D0,{5U,6U,0U}},
{SUBA_91D0,{6U,6U,0U}},
{SUBA_91D0,{7U,6U,0U}},
{SUBA_91D8,{0U,6U,0U}},
{SUBA_91D8,{1U,6U,0U}},
{SUBA_91D8,{2U,6U,0U}},
{SUBA_91D8,{3U,6U,0U}},
{SUBA_91D8,{4U,6U,0U}},
{SUBA_91D8,{5U,6U,0U}},
{SUBA_91D8,{6U,6U,0U}},
{SUBA_91D8,{7U,6U,0U}},
{SUBA_91E0,{0U,6U,0U}},
{SUBA_91E0,{1U,6U,0U}},
{SUBA_91E0,{2U,6U,0U}},
{SUBA_91E0,{3U,6U,0U}},
{SUBA_91E0,{4U,6U,0U}},
{SUBA_91E0,{5U,6U,0U}},
{SUBA_91E0,{6U,6U,0U}},
{SUBA_91E0,{7U,6U,0U}},
{SUBA_91E8,{0U,6U,0U}},
{SUBA_91E8,{1U,6U,0U}},
{SUBA_91E8,{2U,6U,0U}},
{SUBA_91E8,{3U,6U,0U}},
{SUBA_91E8,{4U,6U,0U}},
{SUBA_91E8,{5U,6U,0U}},
{SUBA_91E8,{6U,6U,0U}},
{SUBA_91E8,{7U,6U,0U}},
{SUBA_91F0,{0U,6U,0U}},
{SUBA_91F0,{1U,6U,0U}},
{SUBA_91F0,{2U,6U,0U}},
{SUBA_91F0,{3U,6U,0U}},
{SUBA_91F0,{4U,6U,0U}},
{SUBA_91F0,{5U,6U,0U}},
{SUBA_91F0,{6U,6U,0U}},
{SUBA_91F0,{7U,6U,0U}},
{SUBA_91F8,{0U,6U,0U}},
{SUBA_91F9,{0U,6U,0U}},
{SUBA_91FA,{0U,6U,0U}},
{SUBA_91FB,{0U,6U,0U}},
{SUBA_91FC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9000,{0U,7U,0U}},
{SUB_9000,{1U,7U,0U}},
{SUB_9000,{2U,7U,0U}},
{SUB_9000,{3U,7U,0U}},
{SUB_9000,{4U,7U,0U}},
{SUB_9000,{5U,7U,0U}},
{SUB_9000,{6U,7U,0U}},
{SUB_9000,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9010,{0U,7U,0U}},
{SUB_9010,{1U,7U,0U}},
{SUB_9010,{2U,7U,0U}},
{SUB_9010,{3U,7U,0U}},
{SUB_9010,{4U,7U,0U}},
{SUB_9010,{5U,7U,0U}},
{SUB_9010,{6U,7U,0U}},
{SUB_9010,{7U,7U,0U}},
{SUB_9018,{0U,7U,0U}},
{SUB_9018,{1U,7U,0U}},
{SUB_9018,{2U,7U,0U}},
{SUB_9018,{3U,7U,0U}},
{SUB_9018,{4U,7U,0U}},
{SUB_9018,{5U,7U,0U}},
{SUB_9018,{6U,7U,0U}},
{SUB_9018,{7U,7U,0U}},
{SUB_9020,{0U,7U,0U}},
{SUB_9020,{1U,7U,0U}},
{SUB_9020,{2U,7U,0U}},
{SUB_9020,{3U,7U,0U}},
{SUB_9020,{4U,7U,0U}},
{SUB_9020,{5U,7U,0U}},
{SUB_9020,{6U,7U,0U}},
{SUB_9020,{7U,7U,0U}},
{SUB_9028,{0U,7U,0U}},
{SUB_9028,{1U,7U,0U}},
{SUB_9028,{2U,7U,0U}},
{SUB_9028,{3U,7U,0U}},
{SUB_9028,{4U,7U,0U}},
{SUB_9028,{5U,7U,0U}},
{SUB_9028,{6U,7U,0U}},
{SUB_9028,{7U,7U,0U}},
{SUB_9030,{0U,7U,0U}},
{SUB_9030,{1U,7U,0U}},
{SUB_9030,{2U,7U,0U}},
{SUB_9030,{3U,7U,0U}},
{SUB_9030,{4U,7U,0U}},
{SUB_9030,{5U,7U,0U}},
{SUB_9030,{6U,7U,0U}},
{SUB_9030,{7U,7U,0U}},
{SUB_9038,{0U,7U,0U}},
{SUB_9039,{0U,7U,0U}},
{SUB_903A,{0U,7U,0U}},
{SUB_903B,{0U,7U,0U}},
{SUB_903C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9040,{0U,7U,0U}},
{SUB_9040,{1U,7U,0U}},
{SUB_9040,{2U,7U,0U}},
{SUB_9040,{3U,7U,0U}},
{SUB_9040,{4U,7U,0U}},
{SUB_9040,{5U,7U,0U}},
{SUB_9040,{6U,7U,0U}},
{SUB_9040,{7U,7U,0U}},
{SUB_9048,{0U,7U,0U}},
{SUB_9048,{1U,7U,0U}},
{SUB_9048,{2U,7U,0U}},
{SUB_9048,{3U,7U,0U}},
{SUB_9048,{4U,7U,0U}},
{SUB_9048,{5U,7U,0U}},
{SUB_9048,{6U,7U,0U}},
{SUB_9048,{7U,7U,0U}},
{SUB_9050,{0U,7U,0U}},
{SUB_9050,{1U,7U,0U}},
{SUB_9050,{2U,7U,0U}},
{SUB_9050,{3U,7U,0U}},
{SUB_9050,{4U,7U,0U}},
{SUB_9050,{5U,7U,0U}},
{SUB_9050,{6U,7U,0U}},
{SUB_9050,{7U,7U,0U}},
{SUB_9058,{0U,7U,0U}},
{SUB_9058,{1U,7U,0U}},
{SUB_9058,{2U,7U,0U}},
{SUB_9058,{3U,7U,0U}},
{SUB_9058,{4U,7U,0U}},
{SUB_9058,{5U,7U,0U}},
{SUB_9058,{6U,7U,0U}},
{SUB_9058,{7U,7U,0U}},
{SUB_9060,{0U,7U,0U}},
{SUB_9060,{1U,7U,0U}},
{SUB_9060,{2U,7U,0U}},
{SUB_9060,{3U,7U,0U}},
{SUB_9060,{4U,7U,0U}},
{SUB_9060,{5U,7U,0U}},
{SUB_9060,{6U,7U,0U}},
{SUB_9060,{7U,7U,0U}},
{SUB_9068,{0U,7U,0U}},
{SUB_9068,{1U,7U,0U}},
{SUB_9068,{2U,7U,0U}},
{SUB_9068,{3U,7U,0U}},
{SUB_9068,{4U,7U,0U}},
{SUB_9068,{5U,7U,0U}},
{SUB_9068,{6U,7U,0U}},
{SUB_9068,{7U,7U,0U}},
{SUB_9070,{0U,7U,0U}},
{SUB_9070,{1U,7U,0U}},
{SUB_9070,{2U,7U,0U}},
{SUB_9070,{3U,7U,0U}},
{SUB_9070,{4U,7U,0U}},
{SUB_9070,{5U,7U,0U}},
{SUB_9070,{6U,7U,0U}},
{SUB_9070,{7U,7U,0U}},
{SUB_9078,{0U,7U,0U}},
{SUB_9079,{0U,7U,0U}},
{SUB_907A,{0U,7U,0U}},
{SUB_907B,{0U,7U,0U}},
{SUB_907C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUB_9080,{0U,7U,0U}},
{SUB_9080,{1U,7U,0U}},
{SUB_9080,{2U,7U,0U}},
{SUB_9080,{3U,7U,0U}},
{SUB_9080,{4U,7U,0U}},
{SUB_9080,{5U,7U,0U}},
{SUB_9080,{6U,7U,0U}},
{SUB_9080,{7U,7U,0U}},
{SUB_9088,{0U,7U,0U}},
{SUB_9088,{1U,7U,0U}},
{SUB_9088,{2U,7U,0U}},
{SUB_9088,{3U,7U,0U}},
{SUB_9088,{4U,7U,0U}},
{SUB_9088,{5U,7U,0U}},
{SUB_9088,{6U,7U,0U}},
{SUB_9088,{7U,7U,0U}},
{SUB_9090,{0U,7U,0U}},
{SUB_9090,{1U,7U,0U}},
{SUB_9090,{2U,7U,0U}},
{SUB_9090,{3U,7U,0U}},
{SUB_9090,{4U,7U,0U}},
{SUB_9090,{5U,7U,0U}},
{SUB_9090,{6U,7U,0U}},
{SUB_9090,{7U,7U,0U}},
{SUB_9098,{0U,7U,0U}},
{SUB_9098,{1U,7U,0U}},
{SUB_9098,{2U,7U,0U}},
{SUB_9098,{3U,7U,0U}},
{SUB_9098,{4U,7U,0U}},
{SUB_9098,{5U,7U,0U}},
{SUB_9098,{6U,7U,0U}},
{SUB_9098,{7U,7U,0U}},
{SUB_90A0,{0U,7U,0U}},
{SUB_90A0,{1U,7U,0U}},
{SUB_90A0,{2U,7U,0U}},
{SUB_90A0,{3U,7U,0U}},
{SUB_90A0,{4U,7U,0U}},
{SUB_90A0,{5U,7U,0U}},
{SUB_90A0,{6U,7U,0U}},
{SUB_90A0,{7U,7U,0U}},
{SUB_90A8,{0U,7U,0U}},
{SUB_90A8,{1U,7U,0U}},
{SUB_90A8,{2U,7U,0U}},
{SUB_90A8,{3U,7U,0U}},
{SUB_90A8,{4U,7U,0U}},
{SUB_90A8,{5U,7U,0U}},
{SUB_90A8,{6U,7U,0U}},
{SUB_90A8,{7U,7U,0U}},
{SUB_90B0,{0U,7U,0U}},
{SUB_90B0,{1U,7U,0U}},
{SUB_90B0,{2U,7U,0U}},
{SUB_90B0,{3U,7U,0U}},
{SUB_90B0,{4U,7U,0U}},
{SUB_90B0,{5U,7U,0U}},
{SUB_90B0,{6U,7U,0U}},
{SUB_90B0,{7U,7U,0U}},
{SUB_90B8,{0U,7U,0U}},
{SUB_90B9,{0U,7U,0U}},
{SUB_90BA,{0U,7U,0U}},
{SUB_90BB,{0U,7U,0U}},
{SUB_90BC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_90C0,{0U,7U,0U}},
{SUBA_90C0,{1U,7U,0U}},
{SUBA_90C0,{2U,7U,0U}},
{SUBA_90C0,{3U,7U,0U}},
{SUBA_90C0,{4U,7U,0U}},
{SUBA_90C0,{5U,7U,0U}},
{SUBA_90C0,{6U,7U,0U}},
{SUBA_90C0,{7U,7U,0U}},
{SUBA_90C8,{0U,7U,0U}},
{SUBA_90C8,{1U,7U,0U}},
{SUBA_90C8,{2U,7U,0U}},
{SUBA_90C8,{3U,7U,0U}},
{SUBA_90C8,{4U,7U,0U}},
{SUBA_90C8,{5U,7U,0U}},
{SUBA_90C8,{6U,7U,0U}},
{SUBA_90C8,{7U,7U,0U}},
{SUBA_90D0,{0U,7U,0U}},
{SUBA_90D0,{1U,7U,0U}},
{SUBA_90D0,{2U,7U,0U}},
{SUBA_90D0,{3U,7U,0U}},
{SUBA_90D0,{4U,7U,0U}},
{SUBA_90D0,{5U,7U,0U}},
{SUBA_90D0,{6U,7U,0U}},
{SUBA_90D0,{7U,7U,0U}},
{SUBA_90D8,{0U,7U,0U}},
{SUBA_90D8,{1U,7U,0U}},
{SUBA_90D8,{2U,7U,0U}},
{SUBA_90D8,{3U,7U,0U}},
{SUBA_90D8,{4U,7U,0U}},
{SUBA_90D8,{5U,7U,0U}},
{SUBA_90D8,{6U,7U,0U}},
{SUBA_90D8,{7U,7U,0U}},
{SUBA_90E0,{0U,7U,0U}},
{SUBA_90E0,{1U,7U,0U}},
{SUBA_90E0,{2U,7U,0U}},
{SUBA_90E0,{3U,7U,0U}},
{SUBA_90E0,{4U,7U,0U}},
{SUBA_90E0,{5U,7U,0U}},
{SUBA_90E0,{6U,7U,0U}},
{SUBA_90E0,{7U,7U,0U}},
{SUBA_90E8,{0U,7U,0U}},
{SUBA_90E8,{1U,7U,0U}},
{SUBA_90E8,{2U,7U,0U}},
{SUBA_90E8,{3U,7U,0U}},
{SUBA_90E8,{4U,7U,0U}},
{SUBA_90E8,{5U,7U,0U}},
{SUBA_90E8,{6U,7U,0U}},
{SUBA_90E8,{7U,7U,0U}},
{SUBA_90F0,{0U,7U,0U}},
{SUBA_90F0,{1U,7U,0U}},
{SUBA_90F0,{2U,7U,0U}},
{SUBA_90F0,{3U,7U,0U}},
{SUBA_90F0,{4U,7U,0U}},
{SUBA_90F0,{5U,7U,0U}},
{SUBA_90F0,{6U,7U,0U}},
{SUBA_90F0,{7U,7U,0U}},
{SUBA_90F8,{0U,7U,0U}},
{SUBA_90F9,{0U,7U,0U}},
{SUBA_90FA,{0U,7U,0U}},
{SUBA_90FB,{0U,7U,0U}},
{SUBA_90FC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9100,{0U,7U,0U}},
{SUBX_9100,{1U,7U,0U}},
{SUBX_9100,{2U,7U,0U}},
{SUBX_9100,{3U,7U,0U}},
{SUBX_9100,{4U,7U,0U}},
{SUBX_9100,{5U,7U,0U}},
{SUBX_9100,{6U,7U,0U}},
{SUBX_9100,{7U,7U,0U}},
{SUBX_9108,{0U,7U,0U}},
{SUBX_9108,{1U,7U,0U}},
{SUBX_9108,{2U,7U,0U}},
{SUBX_9108,{3U,7U,0U}},
{SUBX_9108,{4U,7U,0U}},
{SUBX_9108,{5U,7U,0U}},
{SUBX_9108,{6U,7U,0U}},
{SUBX_9108,{7U,7U,0U}},
{SUB_9110,{0U,7U,0U}},
{SUB_9110,{1U,7U,0U}},
{SUB_9110,{2U,7U,0U}},
{SUB_9110,{3U,7U,0U}},
{SUB_9110,{4U,7U,0U}},
{SUB_9110,{5U,7U,0U}},
{SUB_9110,{6U,7U,0U}},
{SUB_9110,{7U,7U,0U}},
{SUB_9118,{0U,7U,0U}},
{SUB_9118,{1U,7U,0U}},
{SUB_9118,{2U,7U,0U}},
{SUB_9118,{3U,7U,0U}},
{SUB_9118,{4U,7U,0U}},
{SUB_9118,{5U,7U,0U}},
{SUB_9118,{6U,7U,0U}},
{SUB_9118,{7U,7U,0U}},
{SUB_9120,{0U,7U,0U}},
{SUB_9120,{1U,7U,0U}},
{SUB_9120,{2U,7U,0U}},
{SUB_9120,{3U,7U,0U}},
{SUB_9120,{4U,7U,0U}},
{SUB_9120,{5U,7U,0U}},
{SUB_9120,{6U,7U,0U}},
{SUB_9120,{7U,7U,0U}},
{SUB_9128,{0U,7U,0U}},
{SUB_9128,{1U,7U,0U}},
{SUB_9128,{2U,7U,0U}},
{SUB_9128,{3U,7U,0U}},
{SUB_9128,{4U,7U,0U}},
{SUB_9128,{5U,7U,0U}},
{SUB_9128,{6U,7U,0U}},
{SUB_9128,{7U,7U,0U}},
{SUB_9130,{0U,7U,0U}},
{SUB_9130,{1U,7U,0U}},
{SUB_9130,{2U,7U,0U}},
{SUB_9130,{3U,7U,0U}},
{SUB_9130,{4U,7U,0U}},
{SUB_9130,{5U,7U,0U}},
{SUB_9130,{6U,7U,0U}},
{SUB_9130,{7U,7U,0U}},
{SUB_9138,{0U,7U,0U}},
{SUB_9139,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9140,{0U,7U,0U}},
{SUBX_9140,{1U,7U,0U}},
{SUBX_9140,{2U,7U,0U}},
{SUBX_9140,{3U,7U,0U}},
{SUBX_9140,{4U,7U,0U}},
{SUBX_9140,{5U,7U,0U}},
{SUBX_9140,{6U,7U,0U}},
{SUBX_9140,{7U,7U,0U}},
{SUBX_9148,{0U,7U,0U}},
{SUBX_9148,{1U,7U,0U}},
{SUBX_9148,{2U,7U,0U}},
{SUBX_9148,{3U,7U,0U}},
{SUBX_9148,{4U,7U,0U}},
{SUBX_9148,{5U,7U,0U}},
{SUBX_9148,{6U,7U,0U}},
{SUBX_9148,{7U,7U,0U}},
{SUB_9150,{0U,7U,0U}},
{SUB_9150,{1U,7U,0U}},
{SUB_9150,{2U,7U,0U}},
{SUB_9150,{3U,7U,0U}},
{SUB_9150,{4U,7U,0U}},
{SUB_9150,{5U,7U,0U}},
{SUB_9150,{6U,7U,0U}},
{SUB_9150,{7U,7U,0U}},
{SUB_9158,{0U,7U,0U}},
{SUB_9158,{1U,7U,0U}},
{SUB_9158,{2U,7U,0U}},
{SUB_9158,{3U,7U,0U}},
{SUB_9158,{4U,7U,0U}},
{SUB_9158,{5U,7U,0U}},
{SUB_9158,{6U,7U,0U}},
{SUB_9158,{7U,7U,0U}},
{SUB_9160,{0U,7U,0U}},
{SUB_9160,{1U,7U,0U}},
{SUB_9160,{2U,7U,0U}},
{SUB_9160,{3U,7U,0U}},
{SUB_9160,{4U,7U,0U}},
{SUB_9160,{5U,7U,0U}},
{SUB_9160,{6U,7U,0U}},
{SUB_9160,{7U,7U,0U}},
{SUB_9168,{0U,7U,0U}},
{SUB_9168,{1U,7U,0U}},
{SUB_9168,{2U,7U,0U}},
{SUB_9168,{3U,7U,0U}},
{SUB_9168,{4U,7U,0U}},
{SUB_9168,{5U,7U,0U}},
{SUB_9168,{6U,7U,0U}},
{SUB_9168,{7U,7U,0U}},
{SUB_9170,{0U,7U,0U}},
{SUB_9170,{1U,7U,0U}},
{SUB_9170,{2U,7U,0U}},
{SUB_9170,{3U,7U,0U}},
{SUB_9170,{4U,7U,0U}},
{SUB_9170,{5U,7U,0U}},
{SUB_9170,{6U,7U,0U}},
{SUB_9170,{7U,7U,0U}},
{SUB_9178,{0U,7U,0U}},
{SUB_9179,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBX_9180,{0U,7U,0U}},
{SUBX_9180,{1U,7U,0U}},
{SUBX_9180,{2U,7U,0U}},
{SUBX_9180,{3U,7U,0U}},
{SUBX_9180,{4U,7U,0U}},
{SUBX_9180,{5U,7U,0U}},
{SUBX_9180,{6U,7U,0U}},
{SUBX_9180,{7U,7U,0U}},
{SUBX_9188,{0U,7U,0U}},
{SUBX_9188,{1U,7U,0U}},
{SUBX_9188,{2U,7U,0U}},
{SUBX_9188,{3U,7U,0U}},
{SUBX_9188,{4U,7U,0U}},
{SUBX_9188,{5U,7U,0U}},
{SUBX_9188,{6U,7U,0U}},
{SUBX_9188,{7U,7U,0U}},
{SUB_9190,{0U,7U,0U}},
{SUB_9190,{1U,7U,0U}},
{SUB_9190,{2U,7U,0U}},
{SUB_9190,{3U,7U,0U}},
{SUB_9190,{4U,7U,0U}},
{SUB_9190,{5U,7U,0U}},
{SUB_9190,{6U,7U,0U}},
{SUB_9190,{7U,7U,0U}},
{SUB_9198,{0U,7U,0U}},
{SUB_9198,{1U,7U,0U}},
{SUB_9198,{2U,7U,0U}},
{SUB_9198,{3U,7U,0U}},
{SUB_9198,{4U,7U,0U}},
{SUB_9198,{5U,7U,0U}},
{SUB_9198,{6U,7U,0U}},
{SUB_9198,{7U,7U,0U}},
{SUB_91A0,{0U,7U,0U}},
{SUB_91A0,{1U,7U,0U}},
{SUB_91A0,{2U,7U,0U}},
{SUB_91A0,{3U,7U,0U}},
{SUB_91A0,{4U,7U,0U}},
{SUB_91A0,{5U,7U,0U}},
{SUB_91A0,{6U,7U,0U}},
{SUB_91A0,{7U,7U,0U}},
{SUB_91A8,{0U,7U,0U}},
{SUB_91A8,{1U,7U,0U}},
{SUB_91A8,{2U,7U,0U}},
{SUB_91A8,{3U,7U,0U}},
{SUB_91A8,{4U,7U,0U}},
{SUB_91A8,{5U,7U,0U}},
{SUB_91A8,{6U,7U,0U}},
{SUB_91A8,{7U,7U,0U}},
{SUB_91B0,{0U,7U,0U}},
{SUB_91B0,{1U,7U,0U}},
{SUB_91B0,{2U,7U,0U}},
{SUB_91B0,{3U,7U,0U}},
{SUB_91B0,{4U,7U,0U}},
{SUB_91B0,{5U,7U,0U}},
{SUB_91B0,{6U,7U,0U}},
{SUB_91B0,{7U,7U,0U}},
{SUB_91B8,{0U,7U,0U}},
{SUB_91B9,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{SUBA_91C0,{0U,7U,0U}},
{SUBA_91C0,{1U,7U,0U}},
{SUBA_91C0,{2U,7U,0U}},
{SUBA_91C0,{3U,7U,0U}},
{SUBA_91C0,{4U,7U,0U}},
{SUBA_91C0,{5U,7U,0U}},
{SUBA_91C0,{6U,7U,0U}},
{SUBA_91C0,{7U,7U,0U}},
{SUBA_91C8,{0U,7U,0U}},
{SUBA_91C8,{1U,7U,0U}},
{SUBA_91C8,{2U,7U,0U}},
{SUBA_91C8,{3U,7U,0U}},
{SUBA_91C8,{4U,7U,0U}},
{SUBA_91C8,{5U,7U,0U}},
{SUBA_91C8,{6U,7U,0U}},
{SUBA_91C8,{7U,7U,0U}},
{SUBA_91D0,{0U,7U,0U}},
{SUBA_91D0,{1U,7U,0U}},
{SUBA_91D0,{2U,7U,0U}},
{SUBA_91D0,{3U,7U,0U}},
{SUBA_91D0,{4U,7U,0U}},
{SUBA_91D0,{5U,7U,0U}},
{SUBA_91D0,{6U,7U,0U}},
{SUBA_91D0,{7U,7U,0U}},
{SUBA_91D8,{0U,7U,0U}},
{SUBA_91D8,{1U,7U,0U}},
{SUBA_91D8,{2U,7U,0U}},
{SUBA_91D8,{3U,7U,0U}},
{SUBA_91D8,{4U,7U,0U}},
{SUBA_91D8,{5U,7U,0U}},
{SUBA_91D8,{6U,7U,0U}},
{SUBA_91D8,{7U,7U,0U}},
{SUBA_91E0,{0U,7U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B000,{0U,0U,0U}},
{CMP_B000,{1U,0U,0U}},
{CMP_B000,{2U,0U,0U}},
{CMP_B000,{3U,0U,0U}},
{CMP_B000,{4U,0U,0U}},
{CMP_B000,{5U,0U,0U}},
{CMP_B000,{6U,0U,0U}},
{CMP_B000,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B010,{0U,0U,0U}},
{CMP_B010,{1U,0U,0U}},
{CMP_B010,{2U,0U,0U}},
{CMP_B010,{3U,0U,0U}},
{CMP_B010,{4U,0U,0U}},
{CMP_B010,{5U,0U,0U}},
{CMP_B010,{6U,0U,0U}},
{CMP_B010,{7U,0U,0U}},
{CMP_B018,{0U,0U,0U}},
{CMP_B018,{1U,0U,0U}},
{CMP_B018,{2U,0U,0U}},
{CMP_B018,{3U,0U,0U}},
{CMP_B018,{4U,0U,0U}},
{CMP_B018,{5U,0U,0U}},
{CMP_B018,{6U,0U,0U}},
{CMP_B018,{7U,0U,0U}},
{CMP_B020,{0U,0U,0U}},
{CMP_B020,{1U,0U,0U}},
{CMP_B020,{2U,0U,0U}},
{CMP_B020,{3U,0U,0U}},
{CMP_B020,{4U,0U,0U}},
{CMP_B020,{5U,0U,0U}},
{CMP_B020,{6U,0U,0U}},
{CMP_B020,{7U,0U,0U}},
{CMP_B028,{0U,0U,0U}},
{CMP_B028,{1U,0U,0U}},
{CMP_B028,{2U,0U,0U}},
{CMP_B028,{3U,0U,0U}},
{CMP_B028,{4U,0U,0U}},
{CMP_B028,{5U,0U,0U}},
{CMP_B028,{6U,0U,0U}},
{CMP_B028,{7U,0U,0U}},
{CMP_B030,{0U,0U,0U}},
{CMP_B030,{1U,0U,0U}},
{CMP_B030,{2U,0U,0U}},
{CMP_B030,{3U,0U,0U}},
{CMP_B030,{4U,0U,0U}},
{CMP_B030,{5U,0U,0U}},
{CMP_B030,{6U,0U,0U}},
{CMP_B030,{7U,0U,0U}},
{CMP_B038,{0U,0U,0U}},
{CMP_B039,{0U,0U,0U}},
{CMP_B03A,{0U,0U,0U}},
{CMP_B03B,{0U,0U,0U}},
{CMP_B03C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B040,{0U,0U,0U}},
{CMP_B040,{1U,0U,0U}},
{CMP_B040,{2U,0U,0U}},
{CMP_B040,{3U,0U,0U}},
{CMP_B040,{4U,0U,0U}},
{CMP_B040,{5U,0U,0U}},
{CMP_B040,{6U,0U,0U}},
{CMP_B040,{7U,0U,0U}},
{CMP_B048,{0U,0U,0U}},
{CMP_B048,{1U,0U,0U}},
{CMP_B048,{2U,0U,0U}},
{CMP_B048,{3U,0U,0U}},
{CMP_B048,{4U,0U,0U}},
{CMP_B048,{5U,0U,0U}},
{CMP_B048,{6U,0U,0U}},
{CMP_B048,{7U,0U,0U}},
{CMP_B050,{0U,0U,0U}},
{CMP_B050,{1U,0U,0U}},
{CMP_B050,{2U,0U,0U}},
{CMP_B050,{3U,0U,0U}},
{CMP_B050,{4U,0U,0U}},
{CMP_B050,{5U,0U,0U}},
{CMP_B050,{6U,0U,0U}},
{CMP_B050,{7U,0U,0U}},
{CMP_B058,{0U,0U,0U}},
{CMP_B058,{1U,0U,0U}},
{CMP_B058,{2U,0U,0U}},
{CMP_B058,{3U,0U,0U}},
{CMP_B058,{4U,0U,0U}},
{CMP_B058,{5U,0U,0U}},
{CMP_B058,{6U,0U,0U}},
{CMP_B058,{7U,0U,0U}},
{CMP_B060,{0U,0U,0U}},
{CMP_B060,{1U,0U,0U}},
{CMP_B060,{2U,0U,0U}},
{CMP_B060,{3U,0U,0U}},
{CMP_B060,{4U,0U,0U}},
{CMP_B060,{5U,0U,0U}},
{CMP_B060,{6U,0U,0U}},
{CMP_B060,{7U,0U,0U}},
{CMP_B068,{0U,0U,0U}},
{CMP_B068,{1U,0U,0U}},
{CMP_B068,{2U,0U,0U}},
{CMP_B068,{3U,0U,0U}},
{CMP_B068,{4U,0U,0U}},
{CMP_B068,{5U,0U,0U}},
{CMP_B068,{6U,0U,0U}},
{CMP_B068,{7U,0U,0U}},
{CMP_B070,{0U,0U,0U}},
{CMP_B070,{1U,0U,0U}},
{CMP_B070,{2U,0U,0U}},
{CMP_B070,{3U,0U,0U}},
{CMP_B070,{4U,0U,0U}},
{CMP_B070,{5U,0U,0U}},
{CMP_B070,{6U,0U,0U}},
{CMP_B070,{7U,0U,0U}},
{CMP_B078,{0U,0U,0U}},
{CMP_B079,{0U,0U,0U}},
{CMP_B07A,{0U,0U,0U}},
{CMP_B07B,{0U,0U,0U}},
{CMP_B07C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B080,{0U,0U,0U}},
{CMP_B080,{1U,0U,0U}},
{CMP_B080,{2U,0U,0U}},
{CMP_B080,{3U,0U,0U}},
{CMP_B080,{4U,0U,0U}},
{CMP_B080,{5U,0U,0U}},
{CMP_B080,{6U,0U,0U}},
{CMP_B080,{7U,0U,0U}},
{CMP_B088,{0U,0U,0U}},
{CMP_B088,{1U,0U,0U}},
{CMP_B088,{2U,0U,0U}},
{CMP_B088,{3U,0U,0U}},
{CMP_B088,{4U,0U,0U}},
{CMP_B088,{5U,0U,0U}},
{CMP_B088,{6U,0U,0U}},
{CMP_B088,{7U,0U,0U}},
{CMP_B090,{0U,0U,0U}},
{CMP_B090,{1U,0U,0U}},
{CMP_B090,{2U,0U,0U}},
{CMP_B090,{3U,0U,0U}},
{CMP_B090,{4U,0U,0U}},
{CMP_B090,{5U,0U,0U}},
{CMP_B090,{6U,0U,0U}},
{CMP_B090,{7U,0U,0U}},
{CMP_B098,{0U,0U,0U}},
{CMP_B098,{1U,0U,0U}},
{CMP_B098,{2U,0U,0U}},
{CMP_B098,{3U,0U,0U}},
{CMP_B098,{4U,0U,0U}},
{CMP_B098,{5U,0U,0U}},
{CMP_B098,{6U,0U,0U}},
{CMP_B098,{7U,0U,0U}},
{CMP_B0A0,{0U,0U,0U}},
{CMP_B0A0,{1U,0U,0U}},
{CMP_B0A0,{2U,0U,0U}},
{CMP_B0A0,{3U,0U,0U}},
{CMP_B0A0,{4U,0U,0U}},
{CMP_B0A0,{5U,0U,0U}},
{CMP_B0A0,{6U,0U,0U}},
{CMP_B0A0,{7U,0U,0U}},
{CMP_B0A8,{0U,0U,0U}},
{CMP_B0A8,{1U,0U,0U}},
{CMP_B0A8,{2U,0U,0U}},
{CMP_B0A8,{3U,0U,0U}},
{CMP_B0A8,{4U,0U,0U}},
{CMP_B0A8,{5U,0U,0U}},
{CMP_B0A8,{6U,0U,0U}},
{CMP_B0A8,{7U,0U,0U}},
{CMP_B0B0,{0U,0U,0U}},
{CMP_B0B0,{1U,0U,0U}},
{CMP_B0B0,{2U,0U,0U}},
{CMP_B0B0,{3U,0U,0U}},
{CMP_B0B0,{4U,0U,0U}},
{CMP_B0B0,{5U,0U,0U}},
{CMP_B0B0,{6U,0U,0U}},
{CMP_B0B0,{7U,0U,0U}},
{CMP_B0B8,{0U,0U,0U}},
{CMP_B0B9,{0U,0U,0U}},
{CMP_B0BA,{0U,0U,0U}},
{CMP_B0BB,{0U,0U,0U}},
{CMP_B0BC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B0C0,{0U,0U,0U}},
{CMPA_B0C0,{1U,0U,0U}},
{CMPA_B0C0,{2U,0U,0U}},
{CMPA_B0C0,{3U,0U,0U}},
{CMPA_B0C0,{4U,0U,0U}},
{CMPA_B0C0,{5U,0U,0U}},
{CMPA_B0C0,{6U,0U,0U}},
{CMPA_B0C0,{7U,0U,0U}},
{CMPA_B0C8,{0U,0U,0U}},
{CMPA_B0C8,{1U,0U,0U}},
{CMPA_B0C8,{2U,0U,0U}},
{CMPA_B0C8,{3U,0U,0U}},
{CMPA_B0C8,{4U,0U,0U}},
{CMPA_B0C8,{5U,0U,0U}},
{CMPA_B0C8,{6U,0U,0U}},
{CMPA_B0C8,{7U,0U,0U}},
{CMPA_B0D0,{0U,0U,0U}},
{CMPA_B0D0,{1U,0U,0U}},
{CMPA_B0D0,{2U,0U,0U}},
{CMPA_B0D0,{3U,0U,0U}},
{CMPA_B0D0,{4U,0U,0U}},
{CMPA_B0D0,{5U,0U,0U}},
{CMPA_B0D0,{6U,0U,0U}},
{CMPA_B0D0,{7U,0U,0U}},
{CMPA_B0D8,{0U,0U,0U}},
{CMPA_B0D8,{1U,0U,0U}},
{CMPA_B0D8,{2U,0U,0U}},
{CMPA_B0D8,{3U,0U,0U}},
{CMPA_B0D8,{4U,0U,0U}},
{CMPA_B0D8,{5U,0U,0U}},
{CMPA_B0D8,{6U,0U,0U}},
{CMPA_B0D8,{7U,0U,0U}},
{CMPA_B0E0,{0U,0U,0U}},
{CMPA_B0E0,{1U,0U,0U}},
{CMPA_B0E0,{2U,0U,0U}},
{CMPA_B0E0,{3U,0U,0U}},
{CMPA_B0E0,{4U,0U,0U}},
{CMPA_B0E0,{5U,0U,0U}},
{CMPA_B0E0,{6U,0U,0U}},
{CMPA_B0E0,{7U,0U,0U}},
{CMPA_B0E8,{0U,0U,0U}},
{CMPA_B0E8,{1U,0U,0U}},
{CMPA_B0E8,{2U,0U,0U}},
{CMPA_B0E8,{3U,0U,0U}},
{CMPA_B0E8,{4U,0U,0U}},
{CMPA_B0E8,{5U,0U,0U}},
{CMPA_B0E8,{6U,0U,0U}},
{CMPA_B0E8,{7U,0U,0U}},
{CMPA_B0F0,{0U,0U,0U}},
{CMPA_B0F0,{1U,0U,0U}},
{CMPA_B0F0,{2U,0U,0U}},
{CMPA_B0F0,{3U,0U,0U}},
{CMPA_B0F0,{4U,0U,0U}},
{CMPA_B0F0,{5U,0U,0U}},
{CMPA_B0F0,{6U,0U,0U}},
{CMPA_B0F0,{7U,0U,0U}},
{CMPA_B0F8,{0U,0U,0U}},
{CMPA_B0F9,{0U,0U,0U}},
{CMPA_B0FA,{0U,0U,0U}},
{CMPA_B0FB,{0U,0U,0U}},
{CMPA_B0FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B100,{0U,0U,0U}},
{EOR_B100,{1U,0U,0U}},
{EOR_B100,{2U,0U,0U}},
{EOR_B100,{3U,0U,0U}},
{EOR_B100,{4U,0U,0U}},
{EOR_B100,{5U,0U,0U}},
{EOR_B100,{6U,0U,0U}},
{EOR_B100,{7U,0U,0U}},
{CMPM_B108,{0U,0U,0U}},
{CMPM_B108,{0U,1U,0U}},
{CMPM_B108,{0U,2U,0U}},
{CMPM_B108,{0U,3U,0U}},
{CMPM_B108,{0U,4U,0U}},
{CMPM_B108,{0U,5U,0U}},
{CMPM_B108,{0U,6U,0U}},
{CMPM_B108,{0U,7U,0U}},
{EOR_B110,{0U,0U,0U}},
{EOR_B110,{1U,0U,0U}},
{EOR_B110,{2U,0U,0U}},
{EOR_B110,{3U,0U,0U}},
{EOR_B110,{4U,0U,0U}},
{EOR_B110,{5U,0U,0U}},
{EOR_B110,{6U,0U,0U}},
{EOR_B110,{7U,0U,0U}},
{EOR_B118,{0U,0U,0U}},
{EOR_B118,{1U,0U,0U}},
{EOR_B118,{2U,0U,0U}},
{EOR_B118,{3U,0U,0U}},
{EOR_B118,{4U,0U,0U}},
{EOR_B118,{5U,0U,0U}},
{EOR_B118,{6U,0U,0U}},
{EOR_B118,{7U,0U,0U}},
{EOR_B120,{0U,0U,0U}},
{EOR_B120,{1U,0U,0U}},
{EOR_B120,{2U,0U,0U}},
{EOR_B120,{3U,0U,0U}},
{EOR_B120,{4U,0U,0U}},
{EOR_B120,{5U,0U,0U}},
{EOR_B120,{6U,0U,0U}},
{EOR_B120,{7U,0U,0U}},
{EOR_B128,{0U,0U,0U}},
{EOR_B128,{1U,0U,0U}},
{EOR_B128,{2U,0U,0U}},
{EOR_B128,{3U,0U,0U}},
{EOR_B128,{4U,0U,0U}},
{EOR_B128,{5U,0U,0U}},
{EOR_B128,{6U,0U,0U}},
{EOR_B128,{7U,0U,0U}},
{EOR_B130,{0U,0U,0U}},
{EOR_B130,{1U,0U,0U}},
{EOR_B130,{2U,0U,0U}},
{EOR_B130,{3U,0U,0U}},
{EOR_B130,{4U,0U,0U}},
{EOR_B130,{5U,0U,0U}},
{EOR_B130,{6U,0U,0U}},
{EOR_B130,{7U,0U,0U}},
{EOR_B138,{0U,0U,0U}},
{EOR_B139,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B140,{0U,0U,0U}},
{EOR_B140,{1U,0U,0U}},
{EOR_B140,{2U,0U,0U}},
{EOR_B140,{3U,0U,0U}},
{EOR_B140,{4U,0U,0U}},
{EOR_B140,{5U,0U,0U}},
{EOR_B140,{6U,0U,0U}},
{EOR_B140,{7U,0U,0U}},
{CMPM_B148,{0U,0U,0U}},
{CMPM_B148,{0U,1U,0U}},
{CMPM_B148,{0U,2U,0U}},
{CMPM_B148,{0U,3U,0U}},
{CMPM_B148,{0U,4U,0U}},
{CMPM_B148,{0U,5U,0U}},
{CMPM_B148,{0U,6U,0U}},
{CMPM_B148,{0U,7U,0U}},
{EOR_B150,{0U,0U,0U}},
{EOR_B150,{1U,0U,0U}},
{EOR_B150,{2U,0U,0U}},
{EOR_B150,{3U,0U,0U}},
{EOR_B150,{4U,0U,0U}},
{EOR_B150,{5U,0U,0U}},
{EOR_B150,{6U,0U,0U}},
{EOR_B150,{7U,0U,0U}},
{EOR_B158,{0U,0U,0U}},
{EOR_B158,{1U,0U,0U}},
{EOR_B158,{2U,0U,0U}},
{EOR_B158,{3U,0U,0U}},
{EOR_B158,{4U,0U,0U}},
{EOR_B158,{5U,0U,0U}},
{EOR_B158,{6U,0U,0U}},
{EOR_B158,{7U,0U,0U}},
{EOR_B160,{0U,0U,0U}},
{EOR_B160,{1U,0U,0U}},
{EOR_B160,{2U,0U,0U}},
{EOR_B160,{3U,0U,0U}},
{EOR_B160,{4U,0U,0U}},
{EOR_B160,{5U,0U,0U}},
{EOR_B160,{6U,0U,0U}},
{EOR_B160,{7U,0U,0U}},
{EOR_B168,{0U,0U,0U}},
{EOR_B168,{1U,0U,0U}},
{EOR_B168,{2U,0U,0U}},
{EOR_B168,{3U,0U,0U}},
{EOR_B168,{4U,0U,0U}},
{EOR_B168,{5U,0U,0U}},
{EOR_B168,{6U,0U,0U}},
{EOR_B168,{7U,0U,0U}},
{EOR_B170,{0U,0U,0U}},
{EOR_B170,{1U,0U,0U}},
{EOR_B170,{2U,0U,0U}},
{EOR_B170,{3U,0U,0U}},
{EOR_B170,{4U,0U,0U}},
{EOR_B170,{5U,0U,0U}},
{EOR_B170,{6U,0U,0U}},
{EOR_B170,{7U,0U,0U}},
{EOR_B178,{0U,0U,0U}},
{EOR_B179,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B180,{0U,0U,0U}},
{EOR_B180,{1U,0U,0U}},
{EOR_B180,{2U,0U,0U}},
{EOR_B180,{3U,0U,0U}},
{EOR_B180,{4U,0U,0U}},
{EOR_B180,{5U,0U,0U}},
{EOR_B180,{6U,0U,0U}},
{EOR_B180,{7U,0U,0U}},
{CMPM_B188,{0U,0U,0U}},
{CMPM_B188,{0U,1U,0U}},
{CMPM_B188,{0U,2U,0U}},
{CMPM_B188,{0U,3U,0U}},
{CMPM_B188,{0U,4U,0U}},
{CMPM_B188,{0U,5U,0U}},
{CMPM_B188,{0U,6U,0U}},
{CMPM_B188,{0U,7U,0U}},
{EOR_B190,{0U,0U,0U}},
{EOR_B190,{1U,0U,0U}},
{EOR_B190,{2U,0U,0U}},
{EOR_B190,{3U,0U,0U}},
{EOR_B190,{4U,0U,0U}},
{EOR_B190,{5U,0U,0U}},
{EOR_B190,{6U,0U,0U}},
{EOR_B190,{7U,0U,0U}},
{EOR_B198,{0U,0U,0U}},
{EOR_B198,{1U,0U,0U}},
{EOR_B198,{2U,0U,0U}},
{EOR_B198,{3U,0U,0U}},
{EOR_B198,{4U,0U,0U}},
{EOR_B198,{5U,0U,0U}},
{EOR_B198,{6U,0U,0U}},
{EOR_B198,{7U,0U,0U}},
{EOR_B1A0,{0U,0U,0U}},
{EOR_B1A0,{1U,0U,0U}},
{EOR_B1A0,{2U,0U,0U}},
{EOR_B1A0,{3U,0U,0U}},
{EOR_B1A0,{4U,0U,0U}},
{EOR_B1A0,{5U,0U,0U}},
{EOR_B1A0,{6U,0U,0U}},
{EOR_B1A0,{7U,0U,0U}},
{EOR_B1A8,{0U,0U,0U}},
{EOR_B1A8,{1U,0U,0U}},
{EOR_B1A8,{2U,0U,0U}},
{EOR_B1A8,{3U,0U,0U}},
{EOR_B1A8,{4U,0U,0U}},
{EOR_B1A8,{5U,0U,0U}},
{EOR_B1A8,{6U,0U,0U}},
{EOR_B1A8,{7U,0U,0U}},
{EOR_B1B0,{0U,0U,0U}},
{EOR_B1B0,{1U,0U,0U}},
{EOR_B1B0,{2U,0U,0U}},
{EOR_B1B0,{3U,0U,0U}},
{EOR_B1B0,{4U,0U,0U}},
{EOR_B1B0,{5U,0U,0U}},
{EOR_B1B0,{6U,0U,0U}},
{EOR_B1B0,{7U,0U,0U}},
{EOR_B1B8,{0U,0U,0U}},
{EOR_B1B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B1C0,{0U,0U,0U}},
{CMPA_B1C0,{1U,0U,0U}},
{CMPA_B1C0,{2U,0U,0U}},
{CMPA_B1C0,{3U,0U,0U}},
{CMPA_B1C0,{4U,0U,0U}},
{CMPA_B1C0,{5U,0U,0U}},
{CMPA_B1C0,{6U,0U,0U}},
{CMPA_B1C0,{7U,0U,0U}},
{CMPA_B1C8,{0U,0U,0U}},
{CMPA_B1C8,{1U,0U,0U}},
{CMPA_B1C8,{2U,0U,0U}},
{CMPA_B1C8,{3U,0U,0U}},
{CMPA_B1C8,{4U,0U,0U}},
{CMPA_B1C8,{5U,0U,0U}},
{CMPA_B1C8,{6U,0U,0U}},
{CMPA_B1C8,{7U,0U,0U}},
{CMPA_B1D0,{0U,0U,0U}},
{CMPA_B1D0,{1U,0U,0U}},
{CMPA_B1D0,{2U,0U,0U}},
{CMPA_B1D0,{3U,0U,0U}},
{CMPA_B1D0,{4U,0U,0U}},
{CMPA_B1D0,{5U,0U,0U}},
{CMPA_B1D0,{6U,0U,0U}},
{CMPA_B1D0,{7U,0U,0U}},
{CMPA_B1D8,{0U,0U,0U}},
{CMPA_B1D8,{1U,0U,0U}},
{CMPA_B1D8,{2U,0U,0U}},
{CMPA_B1D8,{3U,0U,0U}},
{CMPA_B1D8,{4U,0U,0U}},
{CMPA_B1D8,{5U,0U,0U}},
{CMPA_B1D8,{6U,0U,0U}},
{CMPA_B1D8,{7U,0U,0U}},
{CMPA_B1E0,{0U,0U,0U}},
{CMPA_B1E0,{1U,0U,0U}},
{CMPA_B1E0,{2U,0U,0U}},
{CMPA_B1E0,{3U,0U,0U}},
{CMPA_B1E0,{4U,0U,0U}},
{CMPA_B1E0,{5U,0U,0U}},
{CMPA_B1E0,{6U,0U,0U}},
{CMPA_B1E0,{7U,0U,0U}},
{CMPA_B1E8,{0U,0U,0U}},
{CMPA_B1E8,{1U,0U,0U}},
{CMPA_B1E8,{2U,0U,0U}},
{CMPA_B1E8,{3U,0U,0U}},
{CMPA_B1E8,{4U,0U,0U}},
{CMPA_B1E8,{5U,0U,0U}},
{CMPA_B1E8,{6U,0U,0U}},
{CMPA_B1E8,{7U,0U,0U}},
{CMPA_B1F0,{0U,0U,0U}},
{CMPA_B1F0,{1U,0U,0U}},
{CMPA_B1F0,{2U,0U,0U}},
{CMPA_B1F0,{3U,0U,0U}},
{CMPA_B1F0,{4U,0U,0U}},
{CMPA_B1F0,{5U,0U,0U}},
{CMPA_B1F0,{6U,0U,0U}},
{CMPA_B1F0,{7U,0U,0U}},
{CMPA_B1F8,{0U,0U,0U}},
{CMPA_B1F9,{0U,0U,0U}},
{CMPA_B1FA,{0U,0U,0U}},
{CMPA_B1FB,{0U,0U,0U}},
{CMPA_B1FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B000,{0U,1U,0U}},
{CMP_B000,{1U,1U,0U}},
{CMP_B000,{2U,1U,0U}},
{CMP_B000,{3U,1U,0U}},
{CMP_B000,{4U,1U,0U}},
{CMP_B000,{5U,1U,0U}},
{CMP_B000,{6U,1U,0U}},
{CMP_B000,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B010,{0U,1U,0U}},
{CMP_B010,{1U,1U,0U}},
{CMP_B010,{2U,1U,0U}},
{CMP_B010,{3U,1U,0U}},
{CMP_B010,{4U,1U,0U}},
{CMP_B010,{5U,1U,0U}},
{CMP_B010,{6U,1U,0U}},
{CMP_B010,{7U,1U,0U}},
{CMP_B018,{0U,1U,0U}},
{CMP_B018,{1U,1U,0U}},
{CMP_B018,{2U,1U,0U}},
{CMP_B018,{3U,1U,0U}},
{CMP_B018,{4U,1U,0U}},
{CMP_B018,{5U,1U,0U}},
{CMP_B018,{6U,1U,0U}},
{CMP_B018,{7U,1U,0U}},
{CMP_B020,{0U,1U,0U}},
{CMP_B020,{1U,1U,0U}},
{CMP_B020,{2U,1U,0U}},
{CMP_B020,{3U,1U,0U}},
{CMP_B020,{4U,1U,0U}},
{CMP_B020,{5U,1U,0U}},
{CMP_B020,{6U,1U,0U}},
{CMP_B020,{7U,1U,0U}},
{CMP_B028,{0U,1U,0U}},
{CMP_B028,{1U,1U,0U}},
{CMP_B028,{2U,1U,0U}},
{CMP_B028,{3U,1U,0U}},
{CMP_B028,{4U,1U,0U}},
{CMP_B028,{5U,1U,0U}},
{CMP_B028,{6U,1U,0U}},
{CMP_B028,{7U,1U,0U}},
{CMP_B030,{0U,1U,0U}},
{CMP_B030,{1U,1U,0U}},
{CMP_B030,{2U,1U,0U}},
{CMP_B030,{3U,1U,0U}},
{CMP_B030,{4U,1U,0U}},
{CMP_B030,{5U,1U,0U}},
{CMP_B030,{6U,1U,0U}},
{CMP_B030,{7U,1U,0U}},
{CMP_B038,{0U,1U,0U}},
{CMP_B039,{0U,1U,0U}},
{CMP_B03A,{0U,1U,0U}},
{CMP_B03B,{0U,1U,0U}},
{CMP_B03C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B040,{0U,1U,0U}},
{CMP_B040,{1U,1U,0U}},
{CMP_B040,{2U,1U,0U}},
{CMP_B040,{3U,1U,0U}},
{CMP_B040,{4U,1U,0U}},
{CMP_B040,{5U,1U,0U}},
{CMP_B040,{6U,1U,0U}},
{CMP_B040,{7U,1U,0U}},
{CMP_B048,{0U,1U,0U}},
{CMP_B048,{1U,1U,0U}},
{CMP_B048,{2U,1U,0U}},
{CMP_B048,{3U,1U,0U}},
{CMP_B048,{4U,1U,0U}},
{CMP_B048,{5U,1U,0U}},
{CMP_B048,{6U,1U,0U}},
{CMP_B048,{7U,1U,0U}},
{CMP_B050,{0U,1U,0U}},
{CMP_B050,{1U,1U,0U}},
{CMP_B050,{2U,1U,0U}},
{CMP_B050,{3U,1U,0U}},
{CMP_B050,{4U,1U,0U}},
{CMP_B050,{5U,1U,0U}},
{CMP_B050,{6U,1U,0U}},
{CMP_B050,{7U,1U,0U}},
{CMP_B058,{0U,1U,0U}},
{CMP_B058,{1U,1U,0U}},
{CMP_B058,{2U,1U,0U}},
{CMP_B058,{3U,1U,0U}},
{CMP_B058,{4U,1U,0U}},
{CMP_B058,{5U,1U,0U}},
{CMP_B058,{6U,1U,0U}},
{CMP_B058,{7U,1U,0U}},
{CMP_B060,{0U,1U,0U}},
{CMP_B060,{1U,1U,0U}},
{CMP_B060,{2U,1U,0U}},
{CMP_B060,{3U,1U,0U}},
{CMP_B060,{4U,1U,0U}},
{CMP_B060,{5U,1U,0U}},
{CMP_B060,{6U,1U,0U}},
{CMP_B060,{7U,1U,0U}},
{CMP_B068,{0U,1U,0U}},
{CMP_B068,{1U,1U,0U}},
{CMP_B068,{2U,1U,0U}},
{CMP_B068,{3U,1U,0U}},
{CMP_B068,{4U,1U,0U}},
{CMP_B068,{5U,1U,0U}},
{CMP_B068,{6U,1U,0U}},
{CMP_B068,{7U,1U,0U}},
{CMP_B070,{0U,1U,0U}},
{CMP_B070,{1U,1U,0U}},
{CMP_B070,{2U,1U,0U}},
{CMP_B070,{3U,1U,0U}},
{CMP_B070,{4U,1U,0U}},
{CMP_B070,{5U,1U,0U}},
{CMP_B070,{6U,1U,0U}},
{CMP_B070,{7U,1U,0U}},
{CMP_B078,{0U,1U,0U}},
{CMP_B079,{0U,1U,0U}},
{CMP_B07A,{0U,1U,0U}},
{CMP_B07B,{0U,1U,0U}},
{CMP_B07C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B080,{0U,1U,0U}},
{CMP_B080,{1U,1U,0U}},
{CMP_B080,{2U,1U,0U}},
{CMP_B080,{3U,1U,0U}},
{CMP_B080,{4U,1U,0U}},
{CMP_B080,{5U,1U,0U}},
{CMP_B080,{6U,1U,0U}},
{CMP_B080,{7U,1U,0U}},
{CMP_B088,{0U,1U,0U}},
{CMP_B088,{1U,1U,0U}},
{CMP_B088,{2U,1U,0U}},
{CMP_B088,{3U,1U,0U}},
{CMP_B088,{4U,1U,0U}},
{CMP_B088,{5U,1U,0U}},
{CMP_B088,{6U,1U,0U}},
{CMP_B088,{7U,1U,0U}},
{CMP_B090,{0U,1U,0U}},
{CMP_B090,{1U,1U,0U}},
{CMP_B090,{2U,1U,0U}},
{CMP_B090,{3U,1U,0U}},
{CMP_B090,{4U,1U,0U}},
{CMP_B090,{5U,1U,0U}},
{CMP_B090,{6U,1U,0U}},
{CMP_B090,{7U,1U,0U}},
{CMP_B098,{0U,1U,0U}},
{CMP_B098,{1U,1U,0U}},
{CMP_B098,{2U,1U,0U}},
{CMP_B098,{3U,1U,0U}},
{CMP_B098,{4U,1U,0U}},
{CMP_B098,{5U,1U,0U}},
{CMP_B098,{6U,1U,0U}},
{CMP_B098,{7U,1U,0U}},
{CMP_B0A0,{0U,1U,0U}},
{CMP_B0A0,{1U,1U,0U}},
{CMP_B0A0,{2U,1U,0U}},
{CMP_B0A0,{3U,1U,0U}},
{CMP_B0A0,{4U,1U,0U}},
{CMP_B0A0,{5U,1U,0U}},
{CMP_B0A0,{6U,1U,0U}},
{CMP_B0A0,{7U,1U,0U}},
{CMP_B0A8,{0U,1U,0U}},
{CMP_B0A8,{1U,1U,0U}},
{CMP_B0A8,{2U,1U,0U}},
{CMP_B0A8,{3U,1U,0U}},
{CMP_B0A8,{4U,1U,0U}},
{CMP_B0A8,{5U,1U,0U}},
{CMP_B0A8,{6U,1U,0U}},
{CMP_B0A8,{7U,1U,0U}},
{CMP_B0B0,{0U,1U,0U}},
{CMP_B0B0,{1U,1U,0U}},
{CMP_B0B0,{2U,1U,0U}},
{CMP_B0B0,{3U,1U,0U}},
{CMP_B0B0,{4U,1U,0U}},
{CMP_B0B0,{5U,1U,0U}},
{CMP_B0B0,{6U,1U,0U}},
{CMP_B0B0,{7U,1U,0U}},
{CMP_B0B8,{0U,1U,0U}},
{CMP_B0B9,{0U,1U,0U}},
{CMP_B0BA,{0U,1U,0U}},
{CMP_B0BB,{0U,1U,0U}},
{CMP_B0BC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B0C0,{0U,1U,0U}},
{CMPA_B0C0,{1U,1U,0U}},
{CMPA_B0C0,{2U,1U,0U}},
{CMPA_B0C0,{3U,1U,0U}},
{CMPA_B0C0,{4U,1U,0U}},
{CMPA_B0C0,{5U,1U,0U}},
{CMPA_B0C0,{6U,1U,0U}},
{CMPA_B0C0,{7U,1U,0U}},
{CMPA_B0C8,{0U,1U,0U}},
{CMPA_B0C8,{1U,1U,0U}},
{CMPA_B0C8,{2U,1U,0U}},
{CMPA_B0C8,{3U,1U,0U}},
{CMPA_B0C8,{4U,1U,0U}},
{CMPA_B0C8,{5U,1U,0U}},
{CMPA_B0C8,{6U,1U,0U}},
{CMPA_B0C8,{7U,1U,0U}},
{CMPA_B0D0,{0U,1U,0U}},
{CMPA_B0D0,{1U,1U,0U}},
{CMPA_B0D0,{2U,1U,0U}},
{CMPA_B0D0,{3U,1U,0U}},
{CMPA_B0D0,{4U,1U,0U}},
{CMPA_B0D0,{5U,1U,0U}},
{CMPA_B0D0,{6U,1U,0U}},
{CMPA_B0D0,{7U,1U,0U}},
{CMPA_B0D8,{0U,1U,0U}},
{CMPA_B0D8,{1U,1U,0U}},
{CMPA_B0D8,{2U,1U,0U}},
{CMPA_B0D8,{3U,1U,0U}},
{CMPA_B0D8,{4U,1U,0U}},
{CMPA_B0D8,{5U,1U,0U}},
{CMPA_B0D8,{6U,1U,0U}},
{CMPA_B0D8,{7U,1U,0U}},
{CMPA_B0E0,{0U,1U,0U}},
{CMPA_B0E0,{1U,1U,0U}},
{CMPA_B0E0,{2U,1U,0U}},
{CMPA_B0E0,{3U,1U,0U}},
{CMPA_B0E0,{4U,1U,0U}},
{CMPA_B0E0,{5U,1U,0U}},
{CMPA_B0E0,{6U,1U,0U}},
{CMPA_B0E0,{7U,1U,0U}},
{CMPA_B0E8,{0U,1U,0U}},
{CMPA_B0E8,{1U,1U,0U}},
{CMPA_B0E8,{2U,1U,0U}},
{CMPA_B0E8,{3U,1U,0U}},
{CMPA_B0E8,{4U,1U,0U}},
{CMPA_B0E8,{5U,1U,0U}},
{CMPA_B0E8,{6U,1U,0U}},
{CMPA_B0E8,{7U,1U,0U}},
{CMPA_B0F0,{0U,1U,0U}},
{CMPA_B0F0,{1U,1U,0U}},
{CMPA_B0F0,{2U,1U,0U}},
{CMPA_B0F0,{3U,1U,0U}},
{CMPA_B0F0,{4U,1U,0U}},
{CMPA_B0F0,{5U,1U,0U}},
{CMPA_B0F0,{6U,1U,0U}},
{CMPA_B0F0,{7U,1U,0U}},
{CMPA_B0F8,{0U,1U,0U}},
{CMPA_B0F9,{0U,1U,0U}},
{CMPA_B0FA,{0U,1U,0U}},
{CMPA_B0FB,{0U,1U,0U}},
{CMPA_B0FC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B100,{0U,1U,0U}},
{EOR_B100,{1U,1U,0U}},
{EOR_B100,{2U,1U,0U}},
{EOR_B100,{3U,1U,0U}},
{EOR_B100,{4U,1U,0U}},
{EOR_B100,{5U,1U,0U}},
{EOR_B100,{6U,1U,0U}},
{EOR_B100,{7U,1U,0U}},
{CMPM_B108,{1U,0U,0U}},
{CMPM_B108,{1U,1U,0U}},
{CMPM_B108,{1U,2U,0U}},
{CMPM_B108,{1U,3U,0U}},
{CMPM_B108,{1U,4U,0U}},
{CMPM_B108,{1U,5U,0U}},
{CMPM_B108,{1U,6U,0U}},
{CMPM_B108,{1U,7U,0U}},
{EOR_B110,{0U,1U,0U}},
{EOR_B110,{1U,1U,0U}},
{EOR_B110,{2U,1U,0U}},
{EOR_B110,{3U,1U,0U}},
{EOR_B110,{4U,1U,0U}},
{EOR_B110,{5U,1U,0U}},
{EOR_B110,{6U,1U,0U}},
{EOR_B110,{7U,1U,0U}},
{EOR_B118,{0U,1U,0U}},
{EOR_B118,{1U,1U,0U}},
{EOR_B118,{2U,1U,0U}},
{EOR_B118,{3U,1U,0U}},
{EOR_B118,{4U,1U,0U}},
{EOR_B118,{5U,1U,0U}},
{EOR_B118,{6U,1U,0U}},
{EOR_B118,{7U,1U,0U}},
{EOR_B120,{0U,1U,0U}},
{EOR_B120,{1U,1U,0U}},
{EOR_B120,{2U,1U,0U}},
{EOR_B120,{3U,1U,0U}},
{EOR_B120,{4U,1U,0U}},
{EOR_B120,{5U,1U,0U}},
{EOR_B120,{6U,1U,0U}},
{EOR_B120,{7U,1U,0U}},
{EOR_B128,{0U,1U,0U}},
{EOR_B128,{1U,1U,0U}},
{EOR_B128,{2U,1U,0U}},
{EOR_B128,{3U,1U,0U}},
{EOR_B128,{4U,1U,0U}},
{EOR_B128,{5U,1U,0U}},
{EOR_B128,{6U,1U,0U}},
{EOR_B128,{7U,1U,0U}},
{EOR_B130,{0U,1U,0U}},
{EOR_B130,{1U,1U,0U}},
{EOR_B130,{2U,1U,0U}},
{EOR_B130,{3U,1U,0U}},
{EOR_B130,{4U,1U,0U}},
{EOR_B130,{5U,1U,0U}},
{EOR_B130,{6U,1U,0U}},
{EOR_B130,{7U,1U,0U}},
{EOR_B138,{0U,1U,0U}},
{EOR_B139,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B140,{0U,1U,0U}},
{EOR_B140,{1U,1U,0U}},
{EOR_B140,{2U,1U,0U}},
{EOR_B140,{3U,1U,0U}},
{EOR_B140,{4U,1U,0U}},
{EOR_B140,{5U,1U,0U}},
{EOR_B140,{6U,1U,0U}},
{EOR_B140,{7U,1U,0U}},
{CMPM_B148,{1U,0U,0U}},
{CMPM_B148,{1U,1U,0U}},
{CMPM_B148,{1U,2U,0U}},
{CMPM_B148,{1U,3U,0U}},
{CMPM_B148,{1U,4U,0U}},
{CMPM_B148,{1U,5U,0U}},
{CMPM_B148,{1U,6U,0U}},
{CMPM_B148,{1U,7U,0U}},
{EOR_B150,{0U,1U,0U}},
{EOR_B150,{1U,1U,0U}},
{EOR_B150,{2U,1U,0U}},
{EOR_B150,{3U,1U,0U}},
{EOR_B150,{4U,1U,0U}},
{EOR_B150,{5U,1U,0U}},
{EOR_B150,{6U,1U,0U}},
{EOR_B150,{7U,1U,0U}},
{EOR_B158,{0U,1U,0U}},
{EOR_B158,{1U,1U,0U}},
{EOR_B158,{2U,1U,0U}},
{EOR_B158,{3U,1U,0U}},
{EOR_B158,{4U,1U,0U}},
{EOR_B158,{5U,1U,0U}},
{EOR_B158,{6U,1U,0U}},
{EOR_B158,{7U,1U,0U}},
{EOR_B160,{0U,1U,0U}},
{EOR_B160,{1U,1U,0U}},
{EOR_B160,{2U,1U,0U}},
{EOR_B160,{3U,1U,0U}},
{EOR_B160,{4U,1U,0U}},
{EOR_B160,{5U,1U,0U}},
{EOR_B160,{6U,1U,0U}},
{EOR_B160,{7U,1U,0U}},
{EOR_B168,{0U,1U,0U}},
{EOR_B168,{1U,1U,0U}},
{EOR_B168,{2U,1U,0U}},
{EOR_B168,{3U,1U,0U}},
{EOR_B168,{4U,1U,0U}},
{EOR_B168,{5U,1U,0U}},
{EOR_B168,{6U,1U,0U}},
{EOR_B168,{7U,1U,0U}},
{EOR_B170,{0U,1U,0U}},
{EOR_B170,{1U,1U,0U}},
{EOR_B170,{2U,1U,0U}},
{EOR_B170,{3U,1U,0U}},
{EOR_B170,{4U,1U,0U}},
{EOR_B170,{5U,1U,0U}},
{EOR_B170,{6U,1U,0U}},
{EOR_B170,{7U,1U,0U}},
{EOR_B178,{0U,1U,0U}},
{EOR_B179,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B180,{0U,1U,0U}},
{EOR_B180,{1U,1U,0U}},
{EOR_B180,{2U,1U,0U}},
{EOR_B180,{3U,1U,0U}},
{EOR_B180,{4U,1U,0U}},
{EOR_B180,{5U,1U,0U}},
{EOR_B180,{6U,1U,0U}},
{EOR_B180,{7U,1U,0U}},
{CMPM_B188,{1U,0U,0U}},
{CMPM_B188,{1U,1U,0U}},
{CMPM_B188,{1U,2U,0U}},
{CMPM_B188,{1U,3U,0U}},
{CMPM_B188,{1U,4U,0U}},
{CMPM_B188,{1U,5U,0U}},
{CMPM_B188,{1U,6U,0U}},
{CMPM_B188,{1U,7U,0U}},
{EOR_B190,{0U,1U,0U}},
{EOR_B190,{1U,1U,0U}},
{EOR_B190,{2U,1U,0U}},
{EOR_B190,{3U,1U,0U}},
{EOR_B190,{4U,1U,0U}},
{EOR_B190,{5U,1U,0U}},
{EOR_B190,{6U,1U,0U}},
{EOR_B190,{7U,1U,0U}},
{EOR_B198,{0U,1U,0U}},
{EOR_B198,{1U,1U,0U}},
{EOR_B198,{2U,1U,0U}},
{EOR_B198,{3U,1U,0U}},
{EOR_B198,{4U,1U,0U}},
{EOR_B198,{5U,1U,0U}},
{EOR_B198,{6U,1U,0U}},
{EOR_B198,{7U,1U,0U}},
{EOR_B1A0,{0U,1U,0U}},
{EOR_B1A0,{1U,1U,0U}},
{EOR_B1A0,{2U,1U,0U}},
{EOR_B1A0,{3U,1U,0U}},
{EOR_B1A0,{4U,1U,0U}},
{EOR_B1A0,{5U,1U,0U}},
{EOR_B1A0,{6U,1U,0U}},
{EOR_B1A0,{7U,1U,0U}},
{EOR_B1A8,{0U,1U,0U}},
{EOR_B1A8,{1U,1U,0U}},
{EOR_B1A8,{2U,1U,0U}},
{EOR_B1A8,{3U,1U,0U}},
{EOR_B1A8,{4U,1U,0U}},
{EOR_B1A8,{5U,1U,0U}},
{EOR_B1A8,{6U,1U,0U}},
{EOR_B1A8,{7U,1U,0U}},
{EOR_B1B0,{0U,1U,0U}},
{EOR_B1B0,{1U,1U,0U}},
{EOR_B1B0,{2U,1U,0U}},
{EOR_B1B0,{3U,1U,0U}},
{EOR_B1B0,{4U,1U,0U}},
{EOR_B1B0,{5U,1U,0U}},
{EOR_B1B0,{6U,1U,0U}},
{EOR_B1B0,{7U,1U,0U}},
{EOR_B1B8,{0U,1U,0U}},
{EOR_B1B9,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B1C0,{0U,1U,0U}},
{CMPA_B1C0,{1U,1U,0U}},
{CMPA_B1C0,{2U,1U,0U}},
{CMPA_B1C0,{3U,1U,0U}},
{CMPA_B1C0,{4U,1U,0U}},
{CMPA_B1C0,{5U,1U,0U}},
{CMPA_B1C0,{6U,1U,0U}},
{CMPA_B1C0,{7U,1U,0U}},
{CMPA_B1C8,{0U,1U,0U}},
{CMPA_B1C8,{1U,1U,0U}},
{CMPA_B1C8,{2U,1U,0U}},
{CMPA_B1C8,{3U,1U,0U}},
{CMPA_B1C8,{4U,1U,0U}},
{CMPA_B1C8,{5U,1U,0U}},
{CMPA_B1C8,{6U,1U,0U}},
{CMPA_B1C8,{7U,1U,0U}},
{CMPA_B1D0,{0U,1U,0U}},
{CMPA_B1D0,{1U,1U,0U}},
{CMPA_B1D0,{2U,1U,0U}},
{CMPA_B1D0,{3U,1U,0U}},
{CMPA_B1D0,{4U,1U,0U}},
{CMPA_B1D0,{5U,1U,0U}},
{CMPA_B1D0,{6U,1U,0U}},
{CMPA_B1D0,{7U,1U,0U}},
{CMPA_B1D8,{0U,1U,0U}},
{CMPA_B1D8,{1U,1U,0U}},
{CMPA_B1D8,{2U,1U,0U}},
{CMPA_B1D8,{3U,1U,0U}},
{CMPA_B1D8,{4U,1U,0U}},
{CMPA_B1D8,{5U,1U,0U}},
{CMPA_B1D8,{6U,1U,0U}},
{CMPA_B1D8,{7U,1U,0U}},
{CMPA_B1E0,{0U,1U,0U}},
{CMPA_B1E0,{1U,1U,0U}},
{CMPA_B1E0,{2U,1U,0U}},
{CMPA_B1E0,{3U,1U,0U}},
{CMPA_B1E0,{4U,1U,0U}},
{CMPA_B1E0,{5U,1U,0U}},
{CMPA_B1E0,{6U,1U,0U}},
{CMPA_B1E0,{7U,1U,0U}},
{CMPA_B1E8,{0U,1U,0U}},
{CMPA_B1E8,{1U,1U,0U}},
{CMPA_B1E8,{2U,1U,0U}},
{CMPA_B1E8,{3U,1U,0U}},
{CMPA_B1E8,{4U,1U,0U}},
{CMPA_B1E8,{5U,1U,0U}},
{CMPA_B1E8,{6U,1U,0U}},
{CMPA_B1E8,{7U,1U,0U}},
{CMPA_B1F0,{0U,1U,0U}},
{CMPA_B1F0,{1U,1U,0U}},
{CMPA_B1F0,{2U,1U,0U}},
{CMPA_B1F0,{3U,1U,0U}},
{CMPA_B1F0,{4U,1U,0U}},
{CMPA_B1F0,{5U,1U,0U}},
{CMPA_B1F0,{6U,1U,0U}},
{CMPA_B1F0,{7U,1U,0U}},
{CMPA_B1F8,{0U,1U,0U}},
{CMPA_B1F9,{0U,1U,0U}},
{CMPA_B1FA,{0U,1U,0U}},
{CMPA_B1FB,{0U,1U,0U}},
{CMPA_B1FC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B000,{0U,2U,0U}},
{CMP_B000,{1U,2U,0U}},
{CMP_B000,{2U,2U,0U}},
{CMP_B000,{3U,2U,0U}},
{CMP_B000,{4U,2U,0U}},
{CMP_B000,{5U,2U,0U}},
{CMP_B000,{6U,2U,0U}},
{CMP_B000,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B010,{0U,2U,0U}},
{CMP_B010,{1U,2U,0U}},
{CMP_B010,{2U,2U,0U}},
{CMP_B010,{3U,2U,0U}},
{CMP_B010,{4U,2U,0U}},
{CMP_B010,{5U,2U,0U}},
{CMP_B010,{6U,2U,0U}},
{CMP_B010,{7U,2U,0U}},
{CMP_B018,{0U,2U,0U}},
{CMP_B018,{1U,2U,0U}},
{CMP_B018,{2U,2U,0U}},
{CMP_B018,{3U,2U,0U}},
{CMP_B018,{4U,2U,0U}},
{CMP_B018,{5U,2U,0U}},
{CMP_B018,{6U,2U,0U}},
{CMP_B018,{7U,2U,0U}},
{CMP_B020,{0U,2U,0U}},
{CMP_B020,{1U,2U,0U}},
{CMP_B020,{2U,2U,0U}},
{CMP_B020,{3U,2U,0U}},
{CMP_B020,{4U,2U,0U}},
{CMP_B020,{5U,2U,0U}},
{CMP_B020,{6U,2U,0U}},
{CMP_B020,{7U,2U,0U}},
{CMP_B028,{0U,2U,0U}},
{CMP_B028,{1U,2U,0U}},
{CMP_B028,{2U,2U,0U}},
{CMP_B028,{3U,2U,0U}},
{CMP_B028,{4U,2U,0U}},
{CMP_B028,{5U,2U,0U}},
{CMP_B028,{6U,2U,0U}},
{CMP_B028,{7U,2U,0U}},
{CMP_B030,{0U,2U,0U}},
{CMP_B030,{1U,2U,0U}},
{CMP_B030,{2U,2U,0U}},
{CMP_B030,{3U,2U,0U}},
{CMP_B030,{4U,2U,0U}},
{CMP_B030,{5U,2U,0U}},
{CMP_B030,{6U,2U,0U}},
{CMP_B030,{7U,2U,0U}},
{CMP_B038,{0U,2U,0U}},
{CMP_B039,{0U,2U,0U}},
{CMP_B03A,{0U,2U,0U}},
{CMP_B03B,{0U,2U,0U}},
{CMP_B03C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B040,{0U,2U,0U}},
{CMP_B040,{1U,2U,0U}},
{CMP_B040,{2U,2U,0U}},
{CMP_B040,{3U,2U,0U}},
{CMP_B040,{4U,2U,0U}},
{CMP_B040,{5U,2U,0U}},
{CMP_B040,{6U,2U,0U}},
{CMP_B040,{7U,2U,0U}},
{CMP_B048,{0U,2U,0U}},
{CMP_B048,{1U,2U,0U}},
{CMP_B048,{2U,2U,0U}},
{CMP_B048,{3U,2U,0U}},
{CMP_B048,{4U,2U,0U}},
{CMP_B048,{5U,2U,0U}},
{CMP_B048,{6U,2U,0U}},
{CMP_B048,{7U,2U,0U}},
{CMP_B050,{0U,2U,0U}},
{CMP_B050,{1U,2U,0U}},
{CMP_B050,{2U,2U,0U}},
{CMP_B050,{3U,2U,0U}},
{CMP_B050,{4U,2U,0U}},
{CMP_B050,{5U,2U,0U}},
{CMP_B050,{6U,2U,0U}},
{CMP_B050,{7U,2U,0U}},
{CMP_B058,{0U,2U,0U}},
{CMP_B058,{1U,2U,0U}},
{CMP_B058,{2U,2U,0U}},
{CMP_B058,{3U,2U,0U}},
{CMP_B058,{4U,2U,0U}},
{CMP_B058,{5U,2U,0U}},
{CMP_B058,{6U,2U,0U}},
{CMP_B058,{7U,2U,0U}},
{CMP_B060,{0U,2U,0U}},
{CMP_B060,{1U,2U,0U}},
{CMP_B060,{2U,2U,0U}},
{CMP_B060,{3U,2U,0U}},
{CMP_B060,{4U,2U,0U}},
{CMP_B060,{5U,2U,0U}},
{CMP_B060,{6U,2U,0U}},
{CMP_B060,{7U,2U,0U}},
{CMP_B068,{0U,2U,0U}},
{CMP_B068,{1U,2U,0U}},
{CMP_B068,{2U,2U,0U}},
{CMP_B068,{3U,2U,0U}},
{CMP_B068,{4U,2U,0U}},
{CMP_B068,{5U,2U,0U}},
{CMP_B068,{6U,2U,0U}},
{CMP_B068,{7U,2U,0U}},
{CMP_B070,{0U,2U,0U}},
{CMP_B070,{1U,2U,0U}},
{CMP_B070,{2U,2U,0U}},
{CMP_B070,{3U,2U,0U}},
{CMP_B070,{4U,2U,0U}},
{CMP_B070,{5U,2U,0U}},
{CMP_B070,{6U,2U,0U}},
{CMP_B070,{7U,2U,0U}},
{CMP_B078,{0U,2U,0U}},
{CMP_B079,{0U,2U,0U}},
{CMP_B07A,{0U,2U,0U}},
{CMP_B07B,{0U,2U,0U}},
{CMP_B07C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B080,{0U,2U,0U}},
{CMP_B080,{1U,2U,0U}},
{CMP_B080,{2U,2U,0U}},
{CMP_B080,{3U,2U,0U}},
{CMP_B080,{4U,2U,0U}},
{CMP_B080,{5U,2U,0U}},
{CMP_B080,{6U,2U,0U}},
{CMP_B080,{7U,2U,0U}},
{CMP_B088,{0U,2U,0U}},
{CMP_B088,{1U,2U,0U}},
{CMP_B088,{2U,2U,0U}},
{CMP_B088,{3U,2U,0U}},
{CMP_B088,{4U,2U,0U}},
{CMP_B088,{5U,2U,0U}},
{CMP_B088,{6U,2U,0U}},
{CMP_B088,{7U,2U,0U}},
{CMP_B090,{0U,2U,0U}},
{CMP_B090,{1U,2U,0U}},
{CMP_B090,{2U,2U,0U}},
{CMP_B090,{3U,2U,0U}},
{CMP_B090,{4U,2U,0U}},
{CMP_B090,{5U,2U,0U}},
{CMP_B090,{6U,2U,0U}},
{CMP_B090,{7U,2U,0U}},
{CMP_B098,{0U,2U,0U}},
{CMP_B098,{1U,2U,0U}},
{CMP_B098,{2U,2U,0U}},
{CMP_B098,{3U,2U,0U}},
{CMP_B098,{4U,2U,0U}},
{CMP_B098,{5U,2U,0U}},
{CMP_B098,{6U,2U,0U}},
{CMP_B098,{7U,2U,0U}},
{CMP_B0A0,{0U,2U,0U}},
{CMP_B0A0,{1U,2U,0U}},
{CMP_B0A0,{2U,2U,0U}},
{CMP_B0A0,{3U,2U,0U}},
{CMP_B0A0,{4U,2U,0U}},
{CMP_B0A0,{5U,2U,0U}},
{CMP_B0A0,{6U,2U,0U}},
{CMP_B0A0,{7U,2U,0U}},
{CMP_B0A8,{0U,2U,0U}},
{CMP_B0A8,{1U,2U,0U}},
{CMP_B0A8,{2U,2U,0U}},
{CMP_B0A8,{3U,2U,0U}},
{CMP_B0A8,{4U,2U,0U}},
{CMP_B0A8,{5U,2U,0U}},
{CMP_B0A8,{6U,2U,0U}},
{CMP_B0A8,{7U,2U,0U}},
{CMP_B0B0,{0U,2U,0U}},
{CMP_B0B0,{1U,2U,0U}},
{CMP_B0B0,{2U,2U,0U}},
{CMP_B0B0,{3U,2U,0U}},
{CMP_B0B0,{4U,2U,0U}},
{CMP_B0B0,{5U,2U,0U}},
{CMP_B0B0,{6U,2U,0U}},
{CMP_B0B0,{7U,2U,0U}},
{CMP_B0B8,{0U,2U,0U}},
{CMP_B0B9,{0U,2U,0U}},
{CMP_B0BA,{0U,2U,0U}},
{CMP_B0BB,{0U,2U,0U}},
{CMP_B0BC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B0C0,{0U,2U,0U}},
{CMPA_B0C0,{1U,2U,0U}},
{CMPA_B0C0,{2U,2U,0U}},
{CMPA_B0C0,{3U,2U,0U}},
{CMPA_B0C0,{4U,2U,0U}},
{CMPA_B0C0,{5U,2U,0U}},
{CMPA_B0C0,{6U,2U,0U}},
{CMPA_B0C0,{7U,2U,0U}},
{CMPA_B0C8,{0U,2U,0U}},
{CMPA_B0C8,{1U,2U,0U}},
{CMPA_B0C8,{2U,2U,0U}},
{CMPA_B0C8,{3U,2U,0U}},
{CMPA_B0C8,{4U,2U,0U}},
{CMPA_B0C8,{5U,2U,0U}},
{CMPA_B0C8,{6U,2U,0U}},
{CMPA_B0C8,{7U,2U,0U}},
{CMPA_B0D0,{0U,2U,0U}},
{CMPA_B0D0,{1U,2U,0U}},
{CMPA_B0D0,{2U,2U,0U}},
{CMPA_B0D0,{3U,2U,0U}},
{CMPA_B0D0,{4U,2U,0U}},
{CMPA_B0D0,{5U,2U,0U}},
{CMPA_B0D0,{6U,2U,0U}},
{CMPA_B0D0,{7U,2U,0U}},
{CMPA_B0D8,{0U,2U,0U}},
{CMPA_B0D8,{1U,2U,0U}},
{CMPA_B0D8,{2U,2U,0U}},
{CMPA_B0D8,{3U,2U,0U}},
{CMPA_B0D8,{4U,2U,0U}},
{CMPA_B0D8,{5U,2U,0U}},
{CMPA_B0D8,{6U,2U,0U}},
{CMPA_B0D8,{7U,2U,0U}},
{CMPA_B0E0,{0U,2U,0U}},
{CMPA_B0E0,{1U,2U,0U}},
{CMPA_B0E0,{2U,2U,0U}},
{CMPA_B0E0,{3U,2U,0U}},
{CMPA_B0E0,{4U,2U,0U}},
{CMPA_B0E0,{5U,2U,0U}},
{CMPA_B0E0,{6U,2U,0U}},
{CMPA_B0E0,{7U,2U,0U}},
{CMPA_B0E8,{0U,2U,0U}},
{CMPA_B0E8,{1U,2U,0U}},
{CMPA_B0E8,{2U,2U,0U}},
{CMPA_B0E8,{3U,2U,0U}},
{CMPA_B0E8,{4U,2U,0U}},
{CMPA_B0E8,{5U,2U,0U}},
{CMPA_B0E8,{6U,2U,0U}},
{CMPA_B0E8,{7U,2U,0U}},
{CMPA_B0F0,{0U,2U,0U}},
{CMPA_B0F0,{1U,2U,0U}},
{CMPA_B0F0,{2U,2U,0U}},
{CMPA_B0F0,{3U,2U,0U}},
{CMPA_B0F0,{4U,2U,0U}},
{CMPA_B0F0,{5U,2U,0U}},
{CMPA_B0F0,{6U,2U,0U}},
{CMPA_B0F0,{7U,2U,0U}},
{CMPA_B0F8,{0U,2U,0U}},
{CMPA_B0F9,{0U,2U,0U}},
{CMPA_B0FA,{0U,2U,0U}},
{CMPA_B0FB,{0U,2U,0U}},
{CMPA_B0FC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B100,{0U,2U,0U}},
{EOR_B100,{1U,2U,0U}},
{EOR_B100,{2U,2U,0U}},
{EOR_B100,{3U,2U,0U}},
{EOR_B100,{4U,2U,0U}},
{EOR_B100,{5U,2U,0U}},
{EOR_B100,{6U,2U,0U}},
{EOR_B100,{7U,2U,0U}},
{CMPM_B108,{2U,0U,0U}},
{CMPM_B108,{2U,1U,0U}},
{CMPM_B108,{2U,2U,0U}},
{CMPM_B108,{2U,3U,0U}},
{CMPM_B108,{2U,4U,0U}},
{CMPM_B108,{2U,5U,0U}},
{CMPM_B108,{2U,6U,0U}},
{CMPM_B108,{2U,7U,0U}},
{EOR_B110,{0U,2U,0U}},
{EOR_B110,{1U,2U,0U}},
{EOR_B110,{2U,2U,0U}},
{EOR_B110,{3U,2U,0U}},
{EOR_B110,{4U,2U,0U}},
{EOR_B110,{5U,2U,0U}},
{EOR_B110,{6U,2U,0U}},
{EOR_B110,{7U,2U,0U}},
{EOR_B118,{0U,2U,0U}},
{EOR_B118,{1U,2U,0U}},
{EOR_B118,{2U,2U,0U}},
{EOR_B118,{3U,2U,0U}},
{EOR_B118,{4U,2U,0U}},
{EOR_B118,{5U,2U,0U}},
{EOR_B118,{6U,2U,0U}},
{EOR_B118,{7U,2U,0U}},
{EOR_B120,{0U,2U,0U}},
{EOR_B120,{1U,2U,0U}},
{EOR_B120,{2U,2U,0U}},
{EOR_B120,{3U,2U,0U}},
{EOR_B120,{4U,2U,0U}},
{EOR_B120,{5U,2U,0U}},
{EOR_B120,{6U,2U,0U}},
{EOR_B120,{7U,2U,0U}},
{EOR_B128,{0U,2U,0U}},
{EOR_B128,{1U,2U,0U}},
{EOR_B128,{2U,2U,0U}},
{EOR_B128,{3U,2U,0U}},
{EOR_B128,{4U,2U,0U}},
{EOR_B128,{5U,2U,0U}},
{EOR_B128,{6U,2U,0U}},
{EOR_B128,{7U,2U,0U}},
{EOR_B130,{0U,2U,0U}},
{EOR_B130,{1U,2U,0U}},
{EOR_B130,{2U,2U,0U}},
{EOR_B130,{3U,2U,0U}},
{EOR_B130,{4U,2U,0U}},
{EOR_B130,{5U,2U,0U}},
{EOR_B130,{6U,2U,0U}},
{EOR_B130,{7U,2U,0U}},
{EOR_B138,{0U,2U,0U}},
{EOR_B139,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B140,{0U,2U,0U}},
{EOR_B140,{1U,2U,0U}},
{EOR_B140,{2U,2U,0U}},
{EOR_B140,{3U,2U,0U}},
{EOR_B140,{4U,2U,0U}},
{EOR_B140,{5U,2U,0U}},
{EOR_B140,{6U,2U,0U}},
{EOR_B140,{7U,2U,0U}},
{CMPM_B148,{2U,0U,0U}},
{CMPM_B148,{2U,1U,0U}},
{CMPM_B148,{2U,2U,0U}},
{CMPM_B148,{2U,3U,0U}},
{CMPM_B148,{2U,4U,0U}},
{CMPM_B148,{2U,5U,0U}},
{CMPM_B148,{2U,6U,0U}},
{CMPM_B148,{2U,7U,0U}},
{EOR_B150,{0U,2U,0U}},
{EOR_B150,{1U,2U,0U}},
{EOR_B150,{2U,2U,0U}},
{EOR_B150,{3U,2U,0U}},
{EOR_B150,{4U,2U,0U}},
{EOR_B150,{5U,2U,0U}},
{EOR_B150,{6U,2U,0U}},
{EOR_B150,{7U,2U,0U}},
{EOR_B158,{0U,2U,0U}},
{EOR_B158,{1U,2U,0U}},
{EOR_B158,{2U,2U,0U}},
{EOR_B158,{3U,2U,0U}},
{EOR_B158,{4U,2U,0U}},
{EOR_B158,{5U,2U,0U}},
{EOR_B158,{6U,2U,0U}},
{EOR_B158,{7U,2U,0U}},
{EOR_B160,{0U,2U,0U}},
{EOR_B160,{1U,2U,0U}},
{EOR_B160,{2U,2U,0U}},
{EOR_B160,{3U,2U,0U}},
{EOR_B160,{4U,2U,0U}},
{EOR_B160,{5U,2U,0U}},
{EOR_B160,{6U,2U,0U}},
{EOR_B160,{7U,2U,0U}},
{EOR_B168,{0U,2U,0U}},
{EOR_B168,{1U,2U,0U}},
{EOR_B168,{2U,2U,0U}},
{EOR_B168,{3U,2U,0U}},
{EOR_B168,{4U,2U,0U}},
{EOR_B168,{5U,2U,0U}},
{EOR_B168,{6U,2U,0U}},
{EOR_B168,{7U,2U,0U}},
{EOR_B170,{0U,2U,0U}},
{EOR_B170,{1U,2U,0U}},
{EOR_B170,{2U,2U,0U}},
{EOR_B170,{3U,2U,0U}},
{EOR_B170,{4U,2U,0U}},
{EOR_B170,{5U,2U,0U}},
{EOR_B170,{6U,2U,0U}},
{EOR_B170,{7U,2U,0U}},
{EOR_B178,{0U,2U,0U}},
{EOR_B179,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B180,{0U,2U,0U}},
{EOR_B180,{1U,2U,0U}},
{EOR_B180,{2U,2U,0U}},
{EOR_B180,{3U,2U,0U}},
{EOR_B180,{4U,2U,0U}},
{EOR_B180,{5U,2U,0U}},
{EOR_B180,{6U,2U,0U}},
{EOR_B180,{7U,2U,0U}},
{CMPM_B188,{2U,0U,0U}},
{CMPM_B188,{2U,1U,0U}},
{CMPM_B188,{2U,2U,0U}},
{CMPM_B188,{2U,3U,0U}},
{CMPM_B188,{2U,4U,0U}},
{CMPM_B188,{2U,5U,0U}},
{CMPM_B188,{2U,6U,0U}},
{CMPM_B188,{2U,7U,0U}},
{EOR_B190,{0U,2U,0U}},
{EOR_B190,{1U,2U,0U}},
{EOR_B190,{2U,2U,0U}},
{EOR_B190,{3U,2U,0U}},
{EOR_B190,{4U,2U,0U}},
{EOR_B190,{5U,2U,0U}},
{EOR_B190,{6U,2U,0U}},
{EOR_B190,{7U,2U,0U}},
{EOR_B198,{0U,2U,0U}},
{EOR_B198,{1U,2U,0U}},
{EOR_B198,{2U,2U,0U}},
{EOR_B198,{3U,2U,0U}},
{EOR_B198,{4U,2U,0U}},
{EOR_B198,{5U,2U,0U}},
{EOR_B198,{6U,2U,0U}},
{EOR_B198,{7U,2U,0U}},
{EOR_B1A0,{0U,2U,0U}},
{EOR_B1A0,{1U,2U,0U}},
{EOR_B1A0,{2U,2U,0U}},
{EOR_B1A0,{3U,2U,0U}},
{EOR_B1A0,{4U,2U,0U}},
{EOR_B1A0,{5U,2U,0U}},
{EOR_B1A0,{6U,2U,0U}},
{EOR_B1A0,{7U,2U,0U}},
{EOR_B1A8,{0U,2U,0U}},
{EOR_B1A8,{1U,2U,0U}},
{EOR_B1A8,{2U,2U,0U}},
{EOR_B1A8,{3U,2U,0U}},
{EOR_B1A8,{4U,2U,0U}},
{EOR_B1A8,{5U,2U,0U}},
{EOR_B1A8,{6U,2U,0U}},
{EOR_B1A8,{7U,2U,0U}},
{EOR_B1B0,{0U,2U,0U}},
{EOR_B1B0,{1U,2U,0U}},
{EOR_B1B0,{2U,2U,0U}},
{EOR_B1B0,{3U,2U,0U}},
{EOR_B1B0,{4U,2U,0U}},
{EOR_B1B0,{5U,2U,0U}},
{EOR_B1B0,{6U,2U,0U}},
{EOR_B1B0,{7U,2U,0U}},
{EOR_B1B8,{0U,2U,0U}},
{EOR_B1B9,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B1C0,{0U,2U,0U}},
{CMPA_B1C0,{1U,2U,0U}},
{CMPA_B1C0,{2U,2U,0U}},
{CMPA_B1C0,{3U,2U,0U}},
{CMPA_B1C0,{4U,2U,0U}},
{CMPA_B1C0,{5U,2U,0U}},
{CMPA_B1C0,{6U,2U,0U}},
{CMPA_B1C0,{7U,2U,0U}},
{CMPA_B1C8,{0U,2U,0U}},
{CMPA_B1C8,{1U,2U,0U}},
{CMPA_B1C8,{2U,2U,0U}},
{CMPA_B1C8,{3U,2U,0U}},
{CMPA_B1C8,{4U,2U,0U}},
{CMPA_B1C8,{5U,2U,0U}},
{CMPA_B1C8,{6U,2U,0U}},
{CMPA_B1C8,{7U,2U,0U}},
{CMPA_B1D0,{0U,2U,0U}},
{CMPA_B1D0,{1U,2U,0U}},
{CMPA_B1D0,{2U,2U,0U}},
{CMPA_B1D0,{3U,2U,0U}},
{CMPA_B1D0,{4U,2U,0U}},
{CMPA_B1D0,{5U,2U,0U}},
{CMPA_B1D0,{6U,2U,0U}},
{CMPA_B1D0,{7U,2U,0U}},
{CMPA_B1D8,{0U,2U,0U}},
{CMPA_B1D8,{1U,2U,0U}},
{CMPA_B1D8,{2U,2U,0U}},
{CMPA_B1D8,{3U,2U,0U}},
{CMPA_B1D8,{4U,2U,0U}},
{CMPA_B1D8,{5U,2U,0U}},
{CMPA_B1D8,{6U,2U,0U}},
{CMPA_B1D8,{7U,2U,0U}},
{CMPA_B1E0,{0U,2U,0U}},
{CMPA_B1E0,{1U,2U,0U}},
{CMPA_B1E0,{2U,2U,0U}},
{CMPA_B1E0,{3U,2U,0U}},
{CMPA_B1E0,{4U,2U,0U}},
{CMPA_B1E0,{5U,2U,0U}},
{CMPA_B1E0,{6U,2U,0U}},
{CMPA_B1E0,{7U,2U,0U}},
{CMPA_B1E8,{0U,2U,0U}},
{CMPA_B1E8,{1U,2U,0U}},
{CMPA_B1E8,{2U,2U,0U}},
{CMPA_B1E8,{3U,2U,0U}},
{CMPA_B1E8,{4U,2U,0U}},
{CMPA_B1E8,{5U,2U,0U}},
{CMPA_B1E8,{6U,2U,0U}},
{CMPA_B1E8,{7U,2U,0U}},
{CMPA_B1F0,{0U,2U,0U}},
{CMPA_B1F0,{1U,2U,0U}},
{CMPA_B1F0,{2U,2U,0U}},
{CMPA_B1F0,{3U,2U,0U}},
{CMPA_B1F0,{4U,2U,0U}},
{CMPA_B1F0,{5U,2U,0U}},
{CMPA_B1F0,{6U,2U,0U}},
{CMPA_B1F0,{7U,2U,0U}},
{CMPA_B1F8,{0U,2U,0U}},
{CMPA_B1F9,{0U,2U,0U}},
{CMPA_B1FA,{0U,2U,0U}},
{CMPA_B1FB,{0U,2U,0U}},
{CMPA_B1FC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B000,{0U,3U,0U}},
{CMP_B000,{1U,3U,0U}},
{CMP_B000,{2U,3U,0U}},
{CMP_B000,{3U,3U,0U}},
{CMP_B000,{4U,3U,0U}},
{CMP_B000,{5U,3U,0U}},
{CMP_B000,{6U,3U,0U}},
{CMP_B000,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B010,{0U,3U,0U}},
{CMP_B010,{1U,3U,0U}},
{CMP_B010,{2U,3U,0U}},
{CMP_B010,{3U,3U,0U}},
{CMP_B010,{4U,3U,0U}},
{CMP_B010,{5U,3U,0U}},
{CMP_B010,{6U,3U,0U}},
{CMP_B010,{7U,3U,0U}},
{CMP_B018,{0U,3U,0U}},
{CMP_B018,{1U,3U,0U}},
{CMP_B018,{2U,3U,0U}},
{CMP_B018,{3U,3U,0U}},
{CMP_B018,{4U,3U,0U}},
{CMP_B018,{5U,3U,0U}},
{CMP_B018,{6U,3U,0U}},
{CMP_B018,{7U,3U,0U}},
{CMP_B020,{0U,3U,0U}},
{CMP_B020,{1U,3U,0U}},
{CMP_B020,{2U,3U,0U}},
{CMP_B020,{3U,3U,0U}},
{CMP_B020,{4U,3U,0U}},
{CMP_B020,{5U,3U,0U}},
{CMP_B020,{6U,3U,0U}},
{CMP_B020,{7U,3U,0U}},
{CMP_B028,{0U,3U,0U}},
{CMP_B028,{1U,3U,0U}},
{CMP_B028,{2U,3U,0U}},
{CMP_B028,{3U,3U,0U}},
{CMP_B028,{4U,3U,0U}},
{CMP_B028,{5U,3U,0U}},
{CMP_B028,{6U,3U,0U}},
{CMP_B028,{7U,3U,0U}},
{CMP_B030,{0U,3U,0U}},
{CMP_B030,{1U,3U,0U}},
{CMP_B030,{2U,3U,0U}},
{CMP_B030,{3U,3U,0U}},
{CMP_B030,{4U,3U,0U}},
{CMP_B030,{5U,3U,0U}},
{CMP_B030,{6U,3U,0U}},
{CMP_B030,{7U,3U,0U}},
{CMP_B038,{0U,3U,0U}},
{CMP_B039,{0U,3U,0U}},
{CMP_B03A,{0U,3U,0U}},
{CMP_B03B,{0U,3U,0U}},
{CMP_B03C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B040,{0U,3U,0U}},
{CMP_B040,{1U,3U,0U}},
{CMP_B040,{2U,3U,0U}},
{CMP_B040,{3U,3U,0U}},
{CMP_B040,{4U,3U,0U}},
{CMP_B040,{5U,3U,0U}},
{CMP_B040,{6U,3U,0U}},
{CMP_B040,{7U,3U,0U}},
{CMP_B048,{0U,3U,0U}},
{CMP_B048,{1U,3U,0U}},
{CMP_B048,{2U,3U,0U}},
{CMP_B048,{3U,3U,0U}},
{CMP_B048,{4U,3U,0U}},
{CMP_B048,{5U,3U,0U}},
{CMP_B048,{6U,3U,0U}},
{CMP_B048,{7U,3U,0U}},
{CMP_B050,{0U,3U,0U}},
{CMP_B050,{1U,3U,0U}},
{CMP_B050,{2U,3U,0U}},
{CMP_B050,{3U,3U,0U}},
{CMP_B050,{4U,3U,0U}},
{CMP_B050,{5U,3U,0U}},
{CMP_B050,{6U,3U,0U}},
{CMP_B050,{7U,3U,0U}},
{CMP_B058,{0U,3U,0U}},
{CMP_B058,{1U,3U,0U}},
{CMP_B058,{2U,3U,0U}},
{CMP_B058,{3U,3U,0U}},
{CMP_B058,{4U,3U,0U}},
{CMP_B058,{5U,3U,0U}},
{CMP_B058,{6U,3U,0U}},
{CMP_B058,{7U,3U,0U}},
{CMP_B060,{0U,3U,0U}},
{CMP_B060,{1U,3U,0U}},
{CMP_B060,{2U,3U,0U}},
{CMP_B060,{3U,3U,0U}},
{CMP_B060,{4U,3U,0U}},
{CMP_B060,{5U,3U,0U}},
{CMP_B060,{6U,3U,0U}},
{CMP_B060,{7U,3U,0U}},
{CMP_B068,{0U,3U,0U}},
{CMP_B068,{1U,3U,0U}},
{CMP_B068,{2U,3U,0U}},
{CMP_B068,{3U,3U,0U}},
{CMP_B068,{4U,3U,0U}},
{CMP_B068,{5U,3U,0U}},
{CMP_B068,{6U,3U,0U}},
{CMP_B068,{7U,3U,0U}},
{CMP_B070,{0U,3U,0U}},
{CMP_B070,{1U,3U,0U}},
{CMP_B070,{2U,3U,0U}},
{CMP_B070,{3U,3U,0U}},
{CMP_B070,{4U,3U,0U}},
{CMP_B070,{5U,3U,0U}},
{CMP_B070,{6U,3U,0U}},
{CMP_B070,{7U,3U,0U}},
{CMP_B078,{0U,3U,0U}},
{CMP_B079,{0U,3U,0U}},
{CMP_B07A,{0U,3U,0U}},
{CMP_B07B,{0U,3U,0U}},
{CMP_B07C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B080,{0U,3U,0U}},
{CMP_B080,{1U,3U,0U}},
{CMP_B080,{2U,3U,0U}},
{CMP_B080,{3U,3U,0U}},
{CMP_B080,{4U,3U,0U}},
{CMP_B080,{5U,3U,0U}},
{CMP_B080,{6U,3U,0U}},
{CMP_B080,{7U,3U,0U}},
{CMP_B088,{0U,3U,0U}},
{CMP_B088,{1U,3U,0U}},
{CMP_B088,{2U,3U,0U}},
{CMP_B088,{3U,3U,0U}},
{CMP_B088,{4U,3U,0U}},
{CMP_B088,{5U,3U,0U}},
{CMP_B088,{6U,3U,0U}},
{CMP_B088,{7U,3U,0U}},
{CMP_B090,{0U,3U,0U}},
{CMP_B090,{1U,3U,0U}},
{CMP_B090,{2U,3U,0U}},
{CMP_B090,{3U,3U,0U}},
{CMP_B090,{4U,3U,0U}},
{CMP_B090,{5U,3U,0U}},
{CMP_B090,{6U,3U,0U}},
{CMP_B090,{7U,3U,0U}},
{CMP_B098,{0U,3U,0U}},
{CMP_B098,{1U,3U,0U}},
{CMP_B098,{2U,3U,0U}},
{CMP_B098,{3U,3U,0U}},
{CMP_B098,{4U,3U,0U}},
{CMP_B098,{5U,3U,0U}},
{CMP_B098,{6U,3U,0U}},
{CMP_B098,{7U,3U,0U}},
{CMP_B0A0,{0U,3U,0U}},
{CMP_B0A0,{1U,3U,0U}},
{CMP_B0A0,{2U,3U,0U}},
{CMP_B0A0,{3U,3U,0U}},
{CMP_B0A0,{4U,3U,0U}},
{CMP_B0A0,{5U,3U,0U}},
{CMP_B0A0,{6U,3U,0U}},
{CMP_B0A0,{7U,3U,0U}},
{CMP_B0A8,{0U,3U,0U}},
{CMP_B0A8,{1U,3U,0U}},
{CMP_B0A8,{2U,3U,0U}},
{CMP_B0A8,{3U,3U,0U}},
{CMP_B0A8,{4U,3U,0U}},
{CMP_B0A8,{5U,3U,0U}},
{CMP_B0A8,{6U,3U,0U}},
{CMP_B0A8,{7U,3U,0U}},
{CMP_B0B0,{0U,3U,0U}},
{CMP_B0B0,{1U,3U,0U}},
{CMP_B0B0,{2U,3U,0U}},
{CMP_B0B0,{3U,3U,0U}},
{CMP_B0B0,{4U,3U,0U}},
{CMP_B0B0,{5U,3U,0U}},
{CMP_B0B0,{6U,3U,0U}},
{CMP_B0B0,{7U,3U,0U}},
{CMP_B0B8,{0U,3U,0U}},
{CMP_B0B9,{0U,3U,0U}},
{CMP_B0BA,{0U,3U,0U}},
{CMP_B0BB,{0U,3U,0U}},
{CMP_B0BC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B0C0,{0U,3U,0U}},
{CMPA_B0C0,{1U,3U,0U}},
{CMPA_B0C0,{2U,3U,0U}},
{CMPA_B0C0,{3U,3U,0U}},
{CMPA_B0C0,{4U,3U,0U}},
{CMPA_B0C0,{5U,3U,0U}},
{CMPA_B0C0,{6U,3U,0U}},
{CMPA_B0C0,{7U,3U,0U}},
{CMPA_B0C8,{0U,3U,0U}},
{CMPA_B0C8,{1U,3U,0U}},
{CMPA_B0C8,{2U,3U,0U}},
{CMPA_B0C8,{3U,3U,0U}},
{CMPA_B0C8,{4U,3U,0U}},
{CMPA_B0C8,{5U,3U,0U}},
{CMPA_B0C8,{6U,3U,0U}},
{CMPA_B0C8,{7U,3U,0U}},
{CMPA_B0D0,{0U,3U,0U}},
{CMPA_B0D0,{1U,3U,0U}},
{CMPA_B0D0,{2U,3U,0U}},
{CMPA_B0D0,{3U,3U,0U}},
{CMPA_B0D0,{4U,3U,0U}},
{CMPA_B0D0,{5U,3U,0U}},
{CMPA_B0D0,{6U,3U,0U}},
{CMPA_B0D0,{7U,3U,0U}},
{CMPA_B0D8,{0U,3U,0U}},
{CMPA_B0D8,{1U,3U,0U}},
{CMPA_B0D8,{2U,3U,0U}},
{CMPA_B0D8,{3U,3U,0U}},
{CMPA_B0D8,{4U,3U,0U}},
{CMPA_B0D8,{5U,3U,0U}},
{CMPA_B0D8,{6U,3U,0U}},
{CMPA_B0D8,{7U,3U,0U}},
{CMPA_B0E0,{0U,3U,0U}},
{CMPA_B0E0,{1U,3U,0U}},
{CMPA_B0E0,{2U,3U,0U}},
{CMPA_B0E0,{3U,3U,0U}},
{CMPA_B0E0,{4U,3U,0U}},
{CMPA_B0E0,{5U,3U,0U}},
{CMPA_B0E0,{6U,3U,0U}},
{CMPA_B0E0,{7U,3U,0U}},
{CMPA_B0E8,{0U,3U,0U}},
{CMPA_B0E8,{1U,3U,0U}},
{CMPA_B0E8,{2U,3U,0U}},
{CMPA_B0E8,{3U,3U,0U}},
{CMPA_B0E8,{4U,3U,0U}},
{CMPA_B0E8,{5U,3U,0U}},
{CMPA_B0E8,{6U,3U,0U}},
{CMPA_B0E8,{7U,3U,0U}},
{CMPA_B0F0,{0U,3U,0U}},
{CMPA_B0F0,{1U,3U,0U}},
{CMPA_B0F0,{2U,3U,0U}},
{CMPA_B0F0,{3U,3U,0U}},
{CMPA_B0F0,{4U,3U,0U}},
{CMPA_B0F0,{5U,3U,0U}},
{CMPA_B0F0,{6U,3U,0U}},
{CMPA_B0F0,{7U,3U,0U}},
{CMPA_B0F8,{0U,3U,0U}},
{CMPA_B0F9,{0U,3U,0U}},
{CMPA_B0FA,{0U,3U,0U}},
{CMPA_B0FB,{0U,3U,0U}},
{CMPA_B0FC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B100,{0U,3U,0U}},
{EOR_B100,{1U,3U,0U}},
{EOR_B100,{2U,3U,0U}},
{EOR_B100,{3U,3U,0U}},
{EOR_B100,{4U,3U,0U}},
{EOR_B100,{5U,3U,0U}},
{EOR_B100,{6U,3U,0U}},
{EOR_B100,{7U,3U,0U}},
{CMPM_B108,{3U,0U,0U}},
{CMPM_B108,{3U,1U,0U}},
{CMPM_B108,{3U,2U,0U}},
{CMPM_B108,{3U,3U,0U}},
{CMPM_B108,{3U,4U,0U}},
{CMPM_B108,{3U,5U,0U}},
{CMPM_B108,{3U,6U,0U}},
{CMPM_B108,{3U,7U,0U}},
{EOR_B110,{0U,3U,0U}},
{EOR_B110,{1U,3U,0U}},
{EOR_B110,{2U,3U,0U}},
{EOR_B110,{3U,3U,0U}},
{EOR_B110,{4U,3U,0U}},
{EOR_B110,{5U,3U,0U}},
{EOR_B110,{6U,3U,0U}},
{EOR_B110,{7U,3U,0U}},
{EOR_B118,{0U,3U,0U}},
{EOR_B118,{1U,3U,0U}},
{EOR_B118,{2U,3U,0U}},
{EOR_B118,{3U,3U,0U}},
{EOR_B118,{4U,3U,0U}},
{EOR_B118,{5U,3U,0U}},
{EOR_B118,{6U,3U,0U}},
{EOR_B118,{7U,3U,0U}},
{EOR_B120,{0U,3U,0U}},
{EOR_B120,{1U,3U,0U}},
{EOR_B120,{2U,3U,0U}},
{EOR_B120,{3U,3U,0U}},
{EOR_B120,{4U,3U,0U}},
{EOR_B120,{5U,3U,0U}},
{EOR_B120,{6U,3U,0U}},
{EOR_B120,{7U,3U,0U}},
{EOR_B128,{0U,3U,0U}},
{EOR_B128,{1U,3U,0U}},
{EOR_B128,{2U,3U,0U}},
{EOR_B128,{3U,3U,0U}},
{EOR_B128,{4U,3U,0U}},
{EOR_B128,{5U,3U,0U}},
{EOR_B128,{6U,3U,0U}},
{EOR_B128,{7U,3U,0U}},
{EOR_B130,{0U,3U,0U}},
{EOR_B130,{1U,3U,0U}},
{EOR_B130,{2U,3U,0U}},
{EOR_B130,{3U,3U,0U}},
{EOR_B130,{4U,3U,0U}},
{EOR_B130,{5U,3U,0U}},
{EOR_B130,{6U,3U,0U}},
{EOR_B130,{7U,3U,0U}},
{EOR_B138,{0U,3U,0U}},
{EOR_B139,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B140,{0U,3U,0U}},
{EOR_B140,{1U,3U,0U}},
{EOR_B140,{2U,3U,0U}},
{EOR_B140,{3U,3U,0U}},
{EOR_B140,{4U,3U,0U}},
{EOR_B140,{5U,3U,0U}},
{EOR_B140,{6U,3U,0U}},
{EOR_B140,{7U,3U,0U}},
{CMPM_B148,{3U,0U,0U}},
{CMPM_B148,{3U,1U,0U}},
{CMPM_B148,{3U,2U,0U}},
{CMPM_B148,{3U,3U,0U}},
{CMPM_B148,{3U,4U,0U}},
{CMPM_B148,{3U,5U,0U}},
{CMPM_B148,{3U,6U,0U}},
{CMPM_B148,{3U,7U,0U}},
{EOR_B150,{0U,3U,0U}},
{EOR_B150,{1U,3U,0U}},
{EOR_B150,{2U,3U,0U}},
{EOR_B150,{3U,3U,0U}},
{EOR_B150,{4U,3U,0U}},
{EOR_B150,{5U,3U,0U}},
{EOR_B150,{6U,3U,0U}},
{EOR_B150,{7U,3U,0U}},
{EOR_B158,{0U,3U,0U}},
{EOR_B158,{1U,3U,0U}},
{EOR_B158,{2U,3U,0U}},
{EOR_B158,{3U,3U,0U}},
{EOR_B158,{4U,3U,0U}},
{EOR_B158,{5U,3U,0U}},
{EOR_B158,{6U,3U,0U}},
{EOR_B158,{7U,3U,0U}},
{EOR_B160,{0U,3U,0U}},
{EOR_B160,{1U,3U,0U}},
{EOR_B160,{2U,3U,0U}},
{EOR_B160,{3U,3U,0U}},
{EOR_B160,{4U,3U,0U}},
{EOR_B160,{5U,3U,0U}},
{EOR_B160,{6U,3U,0U}},
{EOR_B160,{7U,3U,0U}},
{EOR_B168,{0U,3U,0U}},
{EOR_B168,{1U,3U,0U}},
{EOR_B168,{2U,3U,0U}},
{EOR_B168,{3U,3U,0U}},
{EOR_B168,{4U,3U,0U}},
{EOR_B168,{5U,3U,0U}},
{EOR_B168,{6U,3U,0U}},
{EOR_B168,{7U,3U,0U}},
{EOR_B170,{0U,3U,0U}},
{EOR_B170,{1U,3U,0U}},
{EOR_B170,{2U,3U,0U}},
{EOR_B170,{3U,3U,0U}},
{EOR_B170,{4U,3U,0U}},
{EOR_B170,{5U,3U,0U}},
{EOR_B170,{6U,3U,0U}},
{EOR_B170,{7U,3U,0U}},
{EOR_B178,{0U,3U,0U}},
{EOR_B179,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B180,{0U,3U,0U}},
{EOR_B180,{1U,3U,0U}},
{EOR_B180,{2U,3U,0U}},
{EOR_B180,{3U,3U,0U}},
{EOR_B180,{4U,3U,0U}},
{EOR_B180,{5U,3U,0U}},
{EOR_B180,{6U,3U,0U}},
{EOR_B180,{7U,3U,0U}},
{CMPM_B188,{3U,0U,0U}},
{CMPM_B188,{3U,1U,0U}},
{CMPM_B188,{3U,2U,0U}},
{CMPM_B188,{3U,3U,0U}},
{CMPM_B188,{3U,4U,0U}},
{CMPM_B188,{3U,5U,0U}},
{CMPM_B188,{3U,6U,0U}},
{CMPM_B188,{3U,7U,0U}},
{EOR_B190,{0U,3U,0U}},
{EOR_B190,{1U,3U,0U}},
{EOR_B190,{2U,3U,0U}},
{EOR_B190,{3U,3U,0U}},
{EOR_B190,{4U,3U,0U}},
{EOR_B190,{5U,3U,0U}},
{EOR_B190,{6U,3U,0U}},
{EOR_B190,{7U,3U,0U}},
{EOR_B198,{0U,3U,0U}},
{EOR_B198,{1U,3U,0U}},
{EOR_B198,{2U,3U,0U}},
{EOR_B198,{3U,3U,0U}},
{EOR_B198,{4U,3U,0U}},
{EOR_B198,{5U,3U,0U}},
{EOR_B198,{6U,3U,0U}},
{EOR_B198,{7U,3U,0U}},
{EOR_B1A0,{0U,3U,0U}},
{EOR_B1A0,{1U,3U,0U}},
{EOR_B1A0,{2U,3U,0U}},
{EOR_B1A0,{3U,3U,0U}},
{EOR_B1A0,{4U,3U,0U}},
{EOR_B1A0,{5U,3U,0U}},
{EOR_B1A0,{6U,3U,0U}},
{EOR_B1A0,{7U,3U,0U}},
{EOR_B1A8,{0U,3U,0U}},
{EOR_B1A8,{1U,3U,0U}},
{EOR_B1A8,{2U,3U,0U}},
{EOR_B1A8,{3U,3U,0U}},
{EOR_B1A8,{4U,3U,0U}},
{EOR_B1A8,{5U,3U,0U}},
{EOR_B1A8,{6U,3U,0U}},
{EOR_B1A8,{7U,3U,0U}},
{EOR_B1B0,{0U,3U,0U}},
{EOR_B1B0,{1U,3U,0U}},
{EOR_B1B0,{2U,3U,0U}},
{EOR_B1B0,{3U,3U,0U}},
{EOR_B1B0,{4U,3U,0U}},
{EOR_B1B0,{5U,3U,0U}},
{EOR_B1B0,{6U,3U,0U}},
{EOR_B1B0,{7U,3U,0U}},
{EOR_B1B8,{0U,3U,0U}},
{EOR_B1B9,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B1C0,{0U,3U,0U}},
{CMPA_B1C0,{1U,3U,0U}},
{CMPA_B1C0,{2U,3U,0U}},
{CMPA_B1C0,{3U,3U,0U}},
{CMPA_B1C0,{4U,3U,0U}},
{CMPA_B1C0,{5U,3U,0U}},
{CMPA_B1C0,{6U,3U,0U}},
{CMPA_B1C0,{7U,3U,0U}},
{CMPA_B1C8,{0U,3U,0U}},
{CMPA_B1C8,{1U,3U,0U}},
{CMPA_B1C8,{2U,3U,0U}},
{CMPA_B1C8,{3U,3U,0U}},
{CMPA_B1C8,{4U,3U,0U}},
{CMPA_B1C8,{5U,3U,0U}},
{CMPA_B1C8,{6U,3U,0U}},
{CMPA_B1C8,{7U,3U,0U}},
{CMPA_B1D0,{0U,3U,0U}},
{CMPA_B1D0,{1U,3U,0U}},
{CMPA_B1D0,{2U,3U,0U}},
{CMPA_B1D0,{3U,3U,0U}},
{CMPA_B1D0,{4U,3U,0U}},
{CMPA_B1D0,{5U,3U,0U}},
{CMPA_B1D0,{6U,3U,0U}},
{CMPA_B1D0,{7U,3U,0U}},
{CMPA_B1D8,{0U,3U,0U}},
{CMPA_B1D8,{1U,3U,0U}},
{CMPA_B1D8,{2U,3U,0U}},
{CMPA_B1D8,{3U,3U,0U}},
{CMPA_B1D8,{4U,3U,0U}},
{CMPA_B1D8,{5U,3U,0U}},
{CMPA_B1D8,{6U,3U,0U}},
{CMPA_B1D8,{7U,3U,0U}},
{CMPA_B1E0,{0U,3U,0U}},
{CMPA_B1E0,{1U,3U,0U}},
{CMPA_B1E0,{2U,3U,0U}},
{CMPA_B1E0,{3U,3U,0U}},
{CMPA_B1E0,{4U,3U,0U}},
{CMPA_B1E0,{5U,3U,0U}},
{CMPA_B1E0,{6U,3U,0U}},
{CMPA_B1E0,{7U,3U,0U}},
{CMPA_B1E8,{0U,3U,0U}},
{CMPA_B1E8,{1U,3U,0U}},
{CMPA_B1E8,{2U,3U,0U}},
{CMPA_B1E8,{3U,3U,0U}},
{CMPA_B1E8,{4U,3U,0U}},
{CMPA_B1E8,{5U,3U,0U}},
{CMPA_B1E8,{6U,3U,0U}},
{CMPA_B1E8,{7U,3U,0U}},
{CMPA_B1F0,{0U,3U,0U}},
{CMPA_B1F0,{1U,3U,0U}},
{CMPA_B1F0,{2U,3U,0U}},
{CMPA_B1F0,{3U,3U,0U}},
{CMPA_B1F0,{4U,3U,0U}},
{CMPA_B1F0,{5U,3U,0U}},
{CMPA_B1F0,{6U,3U,0U}},
{CMPA_B1F0,{7U,3U,0U}},
{CMPA_B1F8,{0U,3U,0U}},
{CMPA_B1F9,{0U,3U,0U}},
{CMPA_B1FA,{0U,3U,0U}},
{CMPA_B1FB,{0U,3U,0U}},
{CMPA_B1FC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B000,{0U,4U,0U}},
{CMP_B000,{1U,4U,0U}},
{CMP_B000,{2U,4U,0U}},
{CMP_B000,{3U,4U,0U}},
{CMP_B000,{4U,4U,0U}},
{CMP_B000,{5U,4U,0U}},
{CMP_B000,{6U,4U,0U}},
{CMP_B000,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B010,{0U,4U,0U}},
{CMP_B010,{1U,4U,0U}},
{CMP_B010,{2U,4U,0U}},
{CMP_B010,{3U,4U,0U}},
{CMP_B010,{4U,4U,0U}},
{CMP_B010,{5U,4U,0U}},
{CMP_B010,{6U,4U,0U}},
{CMP_B010,{7U,4U,0U}},
{CMP_B018,{0U,4U,0U}},
{CMP_B018,{1U,4U,0U}},
{CMP_B018,{2U,4U,0U}},
{CMP_B018,{3U,4U,0U}},
{CMP_B018,{4U,4U,0U}},
{CMP_B018,{5U,4U,0U}},
{CMP_B018,{6U,4U,0U}},
{CMP_B018,{7U,4U,0U}},
{CMP_B020,{0U,4U,0U}},
{CMP_B020,{1U,4U,0U}},
{CMP_B020,{2U,4U,0U}},
{CMP_B020,{3U,4U,0U}},
{CMP_B020,{4U,4U,0U}},
{CMP_B020,{5U,4U,0U}},
{CMP_B020,{6U,4U,0U}},
{CMP_B020,{7U,4U,0U}},
{CMP_B028,{0U,4U,0U}},
{CMP_B028,{1U,4U,0U}},
{CMP_B028,{2U,4U,0U}},
{CMP_B028,{3U,4U,0U}},
{CMP_B028,{4U,4U,0U}},
{CMP_B028,{5U,4U,0U}},
{CMP_B028,{6U,4U,0U}},
{CMP_B028,{7U,4U,0U}},
{CMP_B030,{0U,4U,0U}},
{CMP_B030,{1U,4U,0U}},
{CMP_B030,{2U,4U,0U}},
{CMP_B030,{3U,4U,0U}},
{CMP_B030,{4U,4U,0U}},
{CMP_B030,{5U,4U,0U}},
{CMP_B030,{6U,4U,0U}},
{CMP_B030,{7U,4U,0U}},
{CMP_B038,{0U,4U,0U}},
{CMP_B039,{0U,4U,0U}},
{CMP_B03A,{0U,4U,0U}},
{CMP_B03B,{0U,4U,0U}},
{CMP_B03C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B040,{0U,4U,0U}},
{CMP_B040,{1U,4U,0U}},
{CMP_B040,{2U,4U,0U}},
{CMP_B040,{3U,4U,0U}},
{CMP_B040,{4U,4U,0U}},
{CMP_B040,{5U,4U,0U}},
{CMP_B040,{6U,4U,0U}},
{CMP_B040,{7U,4U,0U}},
{CMP_B048,{0U,4U,0U}},
{CMP_B048,{1U,4U,0U}},
{CMP_B048,{2U,4U,0U}},
{CMP_B048,{3U,4U,0U}},
{CMP_B048,{4U,4U,0U}},
{CMP_B048,{5U,4U,0U}},
{CMP_B048,{6U,4U,0U}},
{CMP_B048,{7U,4U,0U}},
{CMP_B050,{0U,4U,0U}},
{CMP_B050,{1U,4U,0U}},
{CMP_B050,{2U,4U,0U}},
{CMP_B050,{3U,4U,0U}},
{CMP_B050,{4U,4U,0U}},
{CMP_B050,{5U,4U,0U}},
{CMP_B050,{6U,4U,0U}},
{CMP_B050,{7U,4U,0U}},
{CMP_B058,{0U,4U,0U}},
{CMP_B058,{1U,4U,0U}},
{CMP_B058,{2U,4U,0U}},
{CMP_B058,{3U,4U,0U}},
{CMP_B058,{4U,4U,0U}},
{CMP_B058,{5U,4U,0U}},
{CMP_B058,{6U,4U,0U}},
{CMP_B058,{7U,4U,0U}},
{CMP_B060,{0U,4U,0U}},
{CMP_B060,{1U,4U,0U}},
{CMP_B060,{2U,4U,0U}},
{CMP_B060,{3U,4U,0U}},
{CMP_B060,{4U,4U,0U}},
{CMP_B060,{5U,4U,0U}},
{CMP_B060,{6U,4U,0U}},
{CMP_B060,{7U,4U,0U}},
{CMP_B068,{0U,4U,0U}},
{CMP_B068,{1U,4U,0U}},
{CMP_B068,{2U,4U,0U}},
{CMP_B068,{3U,4U,0U}},
{CMP_B068,{4U,4U,0U}},
{CMP_B068,{5U,4U,0U}},
{CMP_B068,{6U,4U,0U}},
{CMP_B068,{7U,4U,0U}},
{CMP_B070,{0U,4U,0U}},
{CMP_B070,{1U,4U,0U}},
{CMP_B070,{2U,4U,0U}},
{CMP_B070,{3U,4U,0U}},
{CMP_B070,{4U,4U,0U}},
{CMP_B070,{5U,4U,0U}},
{CMP_B070,{6U,4U,0U}},
{CMP_B070,{7U,4U,0U}},
{CMP_B078,{0U,4U,0U}},
{CMP_B079,{0U,4U,0U}},
{CMP_B07A,{0U,4U,0U}},
{CMP_B07B,{0U,4U,0U}},
{CMP_B07C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B080,{0U,4U,0U}},
{CMP_B080,{1U,4U,0U}},
{CMP_B080,{2U,4U,0U}},
{CMP_B080,{3U,4U,0U}},
{CMP_B080,{4U,4U,0U}},
{CMP_B080,{5U,4U,0U}},
{CMP_B080,{6U,4U,0U}},
{CMP_B080,{7U,4U,0U}},
{CMP_B088,{0U,4U,0U}},
{CMP_B088,{1U,4U,0U}},
{CMP_B088,{2U,4U,0U}},
{CMP_B088,{3U,4U,0U}},
{CMP_B088,{4U,4U,0U}},
{CMP_B088,{5U,4U,0U}},
{CMP_B088,{6U,4U,0U}},
{CMP_B088,{7U,4U,0U}},
{CMP_B090,{0U,4U,0U}},
{CMP_B090,{1U,4U,0U}},
{CMP_B090,{2U,4U,0U}},
{CMP_B090,{3U,4U,0U}},
{CMP_B090,{4U,4U,0U}},
{CMP_B090,{5U,4U,0U}},
{CMP_B090,{6U,4U,0U}},
{CMP_B090,{7U,4U,0U}},
{CMP_B098,{0U,4U,0U}},
{CMP_B098,{1U,4U,0U}},
{CMP_B098,{2U,4U,0U}},
{CMP_B098,{3U,4U,0U}},
{CMP_B098,{4U,4U,0U}},
{CMP_B098,{5U,4U,0U}},
{CMP_B098,{6U,4U,0U}},
{CMP_B098,{7U,4U,0U}},
{CMP_B0A0,{0U,4U,0U}},
{CMP_B0A0,{1U,4U,0U}},
{CMP_B0A0,{2U,4U,0U}},
{CMP_B0A0,{3U,4U,0U}},
{CMP_B0A0,{4U,4U,0U}},
{CMP_B0A0,{5U,4U,0U}},
{CMP_B0A0,{6U,4U,0U}},
{CMP_B0A0,{7U,4U,0U}},
{CMP_B0A8,{0U,4U,0U}},
{CMP_B0A8,{1U,4U,0U}},
{CMP_B0A8,{2U,4U,0U}},
{CMP_B0A8,{3U,4U,0U}},
{CMP_B0A8,{4U,4U,0U}},
{CMP_B0A8,{5U,4U,0U}},
{CMP_B0A8,{6U,4U,0U}},
{CMP_B0A8,{7U,4U,0U}},
{CMP_B0B0,{0U,4U,0U}},
{CMP_B0B0,{1U,4U,0U}},
{CMP_B0B0,{2U,4U,0U}},
{CMP_B0B0,{3U,4U,0U}},
{CMP_B0B0,{4U,4U,0U}},
{CMP_B0B0,{5U,4U,0U}},
{CMP_B0B0,{6U,4U,0U}},
{CMP_B0B0,{7U,4U,0U}},
{CMP_B0B8,{0U,4U,0U}},
{CMP_B0B9,{0U,4U,0U}},
{CMP_B0BA,{0U,4U,0U}},
{CMP_B0BB,{0U,4U,0U}},
{CMP_B0BC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B0C0,{0U,4U,0U}},
{CMPA_B0C0,{1U,4U,0U}},
{CMPA_B0C0,{2U,4U,0U}},
{CMPA_B0C0,{3U,4U,0U}},
{CMPA_B0C0,{4U,4U,0U}},
{CMPA_B0C0,{5U,4U,0U}},
{CMPA_B0C0,{6U,4U,0U}},
{CMPA_B0C0,{7U,4U,0U}},
{CMPA_B0C8,{0U,4U,0U}},
{CMPA_B0C8,{1U,4U,0U}},
{CMPA_B0C8,{2U,4U,0U}},
{CMPA_B0C8,{3U,4U,0U}},
{CMPA_B0C8,{4U,4U,0U}},
{CMPA_B0C8,{5U,4U,0U}},
{CMPA_B0C8,{6U,4U,0U}},
{CMPA_B0C8,{7U,4U,0U}},
{CMPA_B0D0,{0U,4U,0U}},
{CMPA_B0D0,{1U,4U,0U}},
{CMPA_B0D0,{2U,4U,0U}},
{CMPA_B0D0,{3U,4U,0U}},
{CMPA_B0D0,{4U,4U,0U}},
{CMPA_B0D0,{5U,4U,0U}},
{CMPA_B0D0,{6U,4U,0U}},
{CMPA_B0D0,{7U,4U,0U}},
{CMPA_B0D8,{0U,4U,0U}},
{CMPA_B0D8,{1U,4U,0U}},
{CMPA_B0D8,{2U,4U,0U}},
{CMPA_B0D8,{3U,4U,0U}},
{CMPA_B0D8,{4U,4U,0U}},
{CMPA_B0D8,{5U,4U,0U}},
{CMPA_B0D8,{6U,4U,0U}},
{CMPA_B0D8,{7U,4U,0U}},
{CMPA_B0E0,{0U,4U,0U}},
{CMPA_B0E0,{1U,4U,0U}},
{CMPA_B0E0,{2U,4U,0U}},
{CMPA_B0E0,{3U,4U,0U}},
{CMPA_B0E0,{4U,4U,0U}},
{CMPA_B0E0,{5U,4U,0U}},
{CMPA_B0E0,{6U,4U,0U}},
{CMPA_B0E0,{7U,4U,0U}},
{CMPA_B0E8,{0U,4U,0U}},
{CMPA_B0E8,{1U,4U,0U}},
{CMPA_B0E8,{2U,4U,0U}},
{CMPA_B0E8,{3U,4U,0U}},
{CMPA_B0E8,{4U,4U,0U}},
{CMPA_B0E8,{5U,4U,0U}},
{CMPA_B0E8,{6U,4U,0U}},
{CMPA_B0E8,{7U,4U,0U}},
{CMPA_B0F0,{0U,4U,0U}},
{CMPA_B0F0,{1U,4U,0U}},
{CMPA_B0F0,{2U,4U,0U}},
{CMPA_B0F0,{3U,4U,0U}},
{CMPA_B0F0,{4U,4U,0U}},
{CMPA_B0F0,{5U,4U,0U}},
{CMPA_B0F0,{6U,4U,0U}},
{CMPA_B0F0,{7U,4U,0U}},
{CMPA_B0F8,{0U,4U,0U}},
{CMPA_B0F9,{0U,4U,0U}},
{CMPA_B0FA,{0U,4U,0U}},
{CMPA_B0FB,{0U,4U,0U}},
{CMPA_B0FC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B100,{0U,4U,0U}},
{EOR_B100,{1U,4U,0U}},
{EOR_B100,{2U,4U,0U}},
{EOR_B100,{3U,4U,0U}},
{EOR_B100,{4U,4U,0U}},
{EOR_B100,{5U,4U,0U}},
{EOR_B100,{6U,4U,0U}},
{EOR_B100,{7U,4U,0U}},
{CMPM_B108,{4U,0U,0U}},
{CMPM_B108,{4U,1U,0U}},
{CMPM_B108,{4U,2U,0U}},
{CMPM_B108,{4U,3U,0U}},
{CMPM_B108,{4U,4U,0U}},
{CMPM_B108,{4U,5U,0U}},
{CMPM_B108,{4U,6U,0U}},
{CMPM_B108,{4U,7U,0U}},
{EOR_B110,{0U,4U,0U}},
{EOR_B110,{1U,4U,0U}},
{EOR_B110,{2U,4U,0U}},
{EOR_B110,{3U,4U,0U}},
{EOR_B110,{4U,4U,0U}},
{EOR_B110,{5U,4U,0U}},
{EOR_B110,{6U,4U,0U}},
{EOR_B110,{7U,4U,0U}},
{EOR_B118,{0U,4U,0U}},
{EOR_B118,{1U,4U,0U}},
{EOR_B118,{2U,4U,0U}},
{EOR_B118,{3U,4U,0U}},
{EOR_B118,{4U,4U,0U}},
{EOR_B118,{5U,4U,0U}},
{EOR_B118,{6U,4U,0U}},
{EOR_B118,{7U,4U,0U}},
{EOR_B120,{0U,4U,0U}},
{EOR_B120,{1U,4U,0U}},
{EOR_B120,{2U,4U,0U}},
{EOR_B120,{3U,4U,0U}},
{EOR_B120,{4U,4U,0U}},
{EOR_B120,{5U,4U,0U}},
{EOR_B120,{6U,4U,0U}},
{EOR_B120,{7U,4U,0U}},
{EOR_B128,{0U,4U,0U}},
{EOR_B128,{1U,4U,0U}},
{EOR_B128,{2U,4U,0U}},
{EOR_B128,{3U,4U,0U}},
{EOR_B128,{4U,4U,0U}},
{EOR_B128,{5U,4U,0U}},
{EOR_B128,{6U,4U,0U}},
{EOR_B128,{7U,4U,0U}},
{EOR_B130,{0U,4U,0U}},
{EOR_B130,{1U,4U,0U}},
{EOR_B130,{2U,4U,0U}},
{EOR_B130,{3U,4U,0U}},
{EOR_B130,{4U,4U,0U}},
{EOR_B130,{5U,4U,0U}},
{EOR_B130,{6U,4U,0U}},
{EOR_B130,{7U,4U,0U}},
{EOR_B138,{0U,4U,0U}},
{EOR_B139,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B140,{0U,4U,0U}},
{EOR_B140,{1U,4U,0U}},
{EOR_B140,{2U,4U,0U}},
{EOR_B140,{3U,4U,0U}},
{EOR_B140,{4U,4U,0U}},
{EOR_B140,{5U,4U,0U}},
{EOR_B140,{6U,4U,0U}},
{EOR_B140,{7U,4U,0U}},
{CMPM_B148,{4U,0U,0U}},
{CMPM_B148,{4U,1U,0U}},
{CMPM_B148,{4U,2U,0U}},
{CMPM_B148,{4U,3U,0U}},
{CMPM_B148,{4U,4U,0U}},
{CMPM_B148,{4U,5U,0U}},
{CMPM_B148,{4U,6U,0U}},
{CMPM_B148,{4U,7U,0U}},
{EOR_B150,{0U,4U,0U}},
{EOR_B150,{1U,4U,0U}},
{EOR_B150,{2U,4U,0U}},
{EOR_B150,{3U,4U,0U}},
{EOR_B150,{4U,4U,0U}},
{EOR_B150,{5U,4U,0U}},
{EOR_B150,{6U,4U,0U}},
{EOR_B150,{7U,4U,0U}},
{EOR_B158,{0U,4U,0U}},
{EOR_B158,{1U,4U,0U}},
{EOR_B158,{2U,4U,0U}},
{EOR_B158,{3U,4U,0U}},
{EOR_B158,{4U,4U,0U}},
{EOR_B158,{5U,4U,0U}},
{EOR_B158,{6U,4U,0U}},
{EOR_B158,{7U,4U,0U}},
{EOR_B160,{0U,4U,0U}},
{EOR_B160,{1U,4U,0U}},
{EOR_B160,{2U,4U,0U}},
{EOR_B160,{3U,4U,0U}},
{EOR_B160,{4U,4U,0U}},
{EOR_B160,{5U,4U,0U}},
{EOR_B160,{6U,4U,0U}},
{EOR_B160,{7U,4U,0U}},
{EOR_B168,{0U,4U,0U}},
{EOR_B168,{1U,4U,0U}},
{EOR_B168,{2U,4U,0U}},
{EOR_B168,{3U,4U,0U}},
{EOR_B168,{4U,4U,0U}},
{EOR_B168,{5U,4U,0U}},
{EOR_B168,{6U,4U,0U}},
{EOR_B168,{7U,4U,0U}},
{EOR_B170,{0U,4U,0U}},
{EOR_B170,{1U,4U,0U}},
{EOR_B170,{2U,4U,0U}},
{EOR_B170,{3U,4U,0U}},
{EOR_B170,{4U,4U,0U}},
{EOR_B170,{5U,4U,0U}},
{EOR_B170,{6U,4U,0U}},
{EOR_B170,{7U,4U,0U}},
{EOR_B178,{0U,4U,0U}},
{EOR_B179,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B180,{0U,4U,0U}},
{EOR_B180,{1U,4U,0U}},
{EOR_B180,{2U,4U,0U}},
{EOR_B180,{3U,4U,0U}},
{EOR_B180,{4U,4U,0U}},
{EOR_B180,{5U,4U,0U}},
{EOR_B180,{6U,4U,0U}},
{EOR_B180,{7U,4U,0U}},
{CMPM_B188,{4U,0U,0U}},
{CMPM_B188,{4U,1U,0U}},
{CMPM_B188,{4U,2U,0U}},
{CMPM_B188,{4U,3U,0U}},
{CMPM_B188,{4U,4U,0U}},
{CMPM_B188,{4U,5U,0U}},
{CMPM_B188,{4U,6U,0U}},
{CMPM_B188,{4U,7U,0U}},
{EOR_B190,{0U,4U,0U}},
{EOR_B190,{1U,4U,0U}},
{EOR_B190,{2U,4U,0U}},
{EOR_B190,{3U,4U,0U}},
{EOR_B190,{4U,4U,0U}},
{EOR_B190,{5U,4U,0U}},
{EOR_B190,{6U,4U,0U}},
{EOR_B190,{7U,4U,0U}},
{EOR_B198,{0U,4U,0U}},
{EOR_B198,{1U,4U,0U}},
{EOR_B198,{2U,4U,0U}},
{EOR_B198,{3U,4U,0U}},
{EOR_B198,{4U,4U,0U}},
{EOR_B198,{5U,4U,0U}},
{EOR_B198,{6U,4U,0U}},
{EOR_B198,{7U,4U,0U}},
{EOR_B1A0,{0U,4U,0U}},
{EOR_B1A0,{1U,4U,0U}},
{EOR_B1A0,{2U,4U,0U}},
{EOR_B1A0,{3U,4U,0U}},
{EOR_B1A0,{4U,4U,0U}},
{EOR_B1A0,{5U,4U,0U}},
{EOR_B1A0,{6U,4U,0U}},
{EOR_B1A0,{7U,4U,0U}},
{EOR_B1A8,{0U,4U,0U}},
{EOR_B1A8,{1U,4U,0U}},
{EOR_B1A8,{2U,4U,0U}},
{EOR_B1A8,{3U,4U,0U}},
{EOR_B1A8,{4U,4U,0U}},
{EOR_B1A8,{5U,4U,0U}},
{EOR_B1A8,{6U,4U,0U}},
{EOR_B1A8,{7U,4U,0U}},
{EOR_B1B0,{0U,4U,0U}},
{EOR_B1B0,{1U,4U,0U}},
{EOR_B1B0,{2U,4U,0U}},
{EOR_B1B0,{3U,4U,0U}},
{EOR_B1B0,{4U,4U,0U}},
{EOR_B1B0,{5U,4U,0U}},
{EOR_B1B0,{6U,4U,0U}},
{EOR_B1B0,{7U,4U,0U}},
{EOR_B1B8,{0U,4U,0U}},
{EOR_B1B9,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B1C0,{0U,4U,0U}},
{CMPA_B1C0,{1U,4U,0U}},
{CMPA_B1C0,{2U,4U,0U}},
{CMPA_B1C0,{3U,4U,0U}},
{CMPA_B1C0,{4U,4U,0U}},
{CMPA_B1C0,{5U,4U,0U}},
{CMPA_B1C0,{6U,4U,0U}},
{CMPA_B1C0,{7U,4U,0U}},
{CMPA_B1C8,{0U,4U,0U}},
{CMPA_B1C8,{1U,4U,0U}},
{CMPA_B1C8,{2U,4U,0U}},
{CMPA_B1C8,{3U,4U,0U}},
{CMPA_B1C8,{4U,4U,0U}},
{CMPA_B1C8,{5U,4U,0U}},
{CMPA_B1C8,{6U,4U,0U}},
{CMPA_B1C8,{7U,4U,0U}},
{CMPA_B1D0,{0U,4U,0U}},
{CMPA_B1D0,{1U,4U,0U}},
{CMPA_B1D0,{2U,4U,0U}},
{CMPA_B1D0,{3U,4U,0U}},
{CMPA_B1D0,{4U,4U,0U}},
{CMPA_B1D0,{5U,4U,0U}},
{CMPA_B1D0,{6U,4U,0U}},
{CMPA_B1D0,{7U,4U,0U}},
{CMPA_B1D8,{0U,4U,0U}},
{CMPA_B1D8,{1U,4U,0U}},
{CMPA_B1D8,{2U,4U,0U}},
{CMPA_B1D8,{3U,4U,0U}},
{CMPA_B1D8,{4U,4U,0U}},
{CMPA_B1D8,{5U,4U,0U}},
{CMPA_B1D8,{6U,4U,0U}},
{CMPA_B1D8,{7U,4U,0U}},
{CMPA_B1E0,{0U,4U,0U}},
{CMPA_B1E0,{1U,4U,0U}},
{CMPA_B1E0,{2U,4U,0U}},
{CMPA_B1E0,{3U,4U,0U}},
{CMPA_B1E0,{4U,4U,0U}},
{CMPA_B1E0,{5U,4U,0U}},
{CMPA_B1E0,{6U,4U,0U}},
{CMPA_B1E0,{7U,4U,0U}},
{CMPA_B1E8,{0U,4U,0U}},
{CMPA_B1E8,{1U,4U,0U}},
{CMPA_B1E8,{2U,4U,0U}},
{CMPA_B1E8,{3U,4U,0U}},
{CMPA_B1E8,{4U,4U,0U}},
{CMPA_B1E8,{5U,4U,0U}},
{CMPA_B1E8,{6U,4U,0U}},
{CMPA_B1E8,{7U,4U,0U}},
{CMPA_B1F0,{0U,4U,0U}},
{CMPA_B1F0,{1U,4U,0U}},
{CMPA_B1F0,{2U,4U,0U}},
{CMPA_B1F0,{3U,4U,0U}},
{CMPA_B1F0,{4U,4U,0U}},
{CMPA_B1F0,{5U,4U,0U}},
{CMPA_B1F0,{6U,4U,0U}},
{CMPA_B1F0,{7U,4U,0U}},
{CMPA_B1F8,{0U,4U,0U}},
{CMPA_B1F9,{0U,4U,0U}},
{CMPA_B1FA,{0U,4U,0U}},
{CMPA_B1FB,{0U,4U,0U}},
{CMPA_B1FC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B000,{0U,5U,0U}},
{CMP_B000,{1U,5U,0U}},
{CMP_B000,{2U,5U,0U}},
{CMP_B000,{3U,5U,0U}},
{CMP_B000,{4U,5U,0U}},
{CMP_B000,{5U,5U,0U}},
{CMP_B000,{6U,5U,0U}},
{CMP_B000,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B010,{0U,5U,0U}},
{CMP_B010,{1U,5U,0U}},
{CMP_B010,{2U,5U,0U}},
{CMP_B010,{3U,5U,0U}},
{CMP_B010,{4U,5U,0U}},
{CMP_B010,{5U,5U,0U}},
{CMP_B010,{6U,5U,0U}},
{CMP_B010,{7U,5U,0U}},
{CMP_B018,{0U,5U,0U}},
{CMP_B018,{1U,5U,0U}},
{CMP_B018,{2U,5U,0U}},
{CMP_B018,{3U,5U,0U}},
{CMP_B018,{4U,5U,0U}},
{CMP_B018,{5U,5U,0U}},
{CMP_B018,{6U,5U,0U}},
{CMP_B018,{7U,5U,0U}},
{CMP_B020,{0U,5U,0U}},
{CMP_B020,{1U,5U,0U}},
{CMP_B020,{2U,5U,0U}},
{CMP_B020,{3U,5U,0U}},
{CMP_B020,{4U,5U,0U}},
{CMP_B020,{5U,5U,0U}},
{CMP_B020,{6U,5U,0U}},
{CMP_B020,{7U,5U,0U}},
{CMP_B028,{0U,5U,0U}},
{CMP_B028,{1U,5U,0U}},
{CMP_B028,{2U,5U,0U}},
{CMP_B028,{3U,5U,0U}},
{CMP_B028,{4U,5U,0U}},
{CMP_B028,{5U,5U,0U}},
{CMP_B028,{6U,5U,0U}},
{CMP_B028,{7U,5U,0U}},
{CMP_B030,{0U,5U,0U}},
{CMP_B030,{1U,5U,0U}},
{CMP_B030,{2U,5U,0U}},
{CMP_B030,{3U,5U,0U}},
{CMP_B030,{4U,5U,0U}},
{CMP_B030,{5U,5U,0U}},
{CMP_B030,{6U,5U,0U}},
{CMP_B030,{7U,5U,0U}},
{CMP_B038,{0U,5U,0U}},
{CMP_B039,{0U,5U,0U}},
{CMP_B03A,{0U,5U,0U}},
{CMP_B03B,{0U,5U,0U}},
{CMP_B03C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B040,{0U,5U,0U}},
{CMP_B040,{1U,5U,0U}},
{CMP_B040,{2U,5U,0U}},
{CMP_B040,{3U,5U,0U}},
{CMP_B040,{4U,5U,0U}},
{CMP_B040,{5U,5U,0U}},
{CMP_B040,{6U,5U,0U}},
{CMP_B040,{7U,5U,0U}},
{CMP_B048,{0U,5U,0U}},
{CMP_B048,{1U,5U,0U}},
{CMP_B048,{2U,5U,0U}},
{CMP_B048,{3U,5U,0U}},
{CMP_B048,{4U,5U,0U}},
{CMP_B048,{5U,5U,0U}},
{CMP_B048,{6U,5U,0U}},
{CMP_B048,{7U,5U,0U}},
{CMP_B050,{0U,5U,0U}},
{CMP_B050,{1U,5U,0U}},
{CMP_B050,{2U,5U,0U}},
{CMP_B050,{3U,5U,0U}},
{CMP_B050,{4U,5U,0U}},
{CMP_B050,{5U,5U,0U}},
{CMP_B050,{6U,5U,0U}},
{CMP_B050,{7U,5U,0U}},
{CMP_B058,{0U,5U,0U}},
{CMP_B058,{1U,5U,0U}},
{CMP_B058,{2U,5U,0U}},
{CMP_B058,{3U,5U,0U}},
{CMP_B058,{4U,5U,0U}},
{CMP_B058,{5U,5U,0U}},
{CMP_B058,{6U,5U,0U}},
{CMP_B058,{7U,5U,0U}},
{CMP_B060,{0U,5U,0U}},
{CMP_B060,{1U,5U,0U}},
{CMP_B060,{2U,5U,0U}},
{CMP_B060,{3U,5U,0U}},
{CMP_B060,{4U,5U,0U}},
{CMP_B060,{5U,5U,0U}},
{CMP_B060,{6U,5U,0U}},
{CMP_B060,{7U,5U,0U}},
{CMP_B068,{0U,5U,0U}},
{CMP_B068,{1U,5U,0U}},
{CMP_B068,{2U,5U,0U}},
{CMP_B068,{3U,5U,0U}},
{CMP_B068,{4U,5U,0U}},
{CMP_B068,{5U,5U,0U}},
{CMP_B068,{6U,5U,0U}},
{CMP_B068,{7U,5U,0U}},
{CMP_B070,{0U,5U,0U}},
{CMP_B070,{1U,5U,0U}},
{CMP_B070,{2U,5U,0U}},
{CMP_B070,{3U,5U,0U}},
{CMP_B070,{4U,5U,0U}},
{CMP_B070,{5U,5U,0U}},
{CMP_B070,{6U,5U,0U}},
{CMP_B070,{7U,5U,0U}},
{CMP_B078,{0U,5U,0U}},
{CMP_B079,{0U,5U,0U}},
{CMP_B07A,{0U,5U,0U}},
{CMP_B07B,{0U,5U,0U}},
{CMP_B07C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B080,{0U,5U,0U}},
{CMP_B080,{1U,5U,0U}},
{CMP_B080,{2U,5U,0U}},
{CMP_B080,{3U,5U,0U}},
{CMP_B080,{4U,5U,0U}},
{CMP_B080,{5U,5U,0U}},
{CMP_B080,{6U,5U,0U}},
{CMP_B080,{7U,5U,0U}},
{CMP_B088,{0U,5U,0U}},
{CMP_B088,{1U,5U,0U}},
{CMP_B088,{2U,5U,0U}},
{CMP_B088,{3U,5U,0U}},
{CMP_B088,{4U,5U,0U}},
{CMP_B088,{5U,5U,0U}},
{CMP_B088,{6U,5U,0U}},
{CMP_B088,{7U,5U,0U}},
{CMP_B090,{0U,5U,0U}},
{CMP_B090,{1U,5U,0U}},
{CMP_B090,{2U,5U,0U}},
{CMP_B090,{3U,5U,0U}},
{CMP_B090,{4U,5U,0U}},
{CMP_B090,{5U,5U,0U}},
{CMP_B090,{6U,5U,0U}},
{CMP_B090,{7U,5U,0U}},
{CMP_B098,{0U,5U,0U}},
{CMP_B098,{1U,5U,0U}},
{CMP_B098,{2U,5U,0U}},
{CMP_B098,{3U,5U,0U}},
{CMP_B098,{4U,5U,0U}},
{CMP_B098,{5U,5U,0U}},
{CMP_B098,{6U,5U,0U}},
{CMP_B098,{7U,5U,0U}},
{CMP_B0A0,{0U,5U,0U}},
{CMP_B0A0,{1U,5U,0U}},
{CMP_B0A0,{2U,5U,0U}},
{CMP_B0A0,{3U,5U,0U}},
{CMP_B0A0,{4U,5U,0U}},
{CMP_B0A0,{5U,5U,0U}},
{CMP_B0A0,{6U,5U,0U}},
{CMP_B0A0,{7U,5U,0U}},
{CMP_B0A8,{0U,5U,0U}},
{CMP_B0A8,{1U,5U,0U}},
{CMP_B0A8,{2U,5U,0U}},
{CMP_B0A8,{3U,5U,0U}},
{CMP_B0A8,{4U,5U,0U}},
{CMP_B0A8,{5U,5U,0U}},
{CMP_B0A8,{6U,5U,0U}},
{CMP_B0A8,{7U,5U,0U}},
{CMP_B0B0,{0U,5U,0U}},
{CMP_B0B0,{1U,5U,0U}},
{CMP_B0B0,{2U,5U,0U}},
{CMP_B0B0,{3U,5U,0U}},
{CMP_B0B0,{4U,5U,0U}},
{CMP_B0B0,{5U,5U,0U}},
{CMP_B0B0,{6U,5U,0U}},
{CMP_B0B0,{7U,5U,0U}},
{CMP_B0B8,{0U,5U,0U}},
{CMP_B0B9,{0U,5U,0U}},
{CMP_B0BA,{0U,5U,0U}},
{CMP_B0BB,{0U,5U,0U}},
{CMP_B0BC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B0C0,{0U,5U,0U}},
{CMPA_B0C0,{1U,5U,0U}},
{CMPA_B0C0,{2U,5U,0U}},
{CMPA_B0C0,{3U,5U,0U}},
{CMPA_B0C0,{4U,5U,0U}},
{CMPA_B0C0,{5U,5U,0U}},
{CMPA_B0C0,{6U,5U,0U}},
{CMPA_B0C0,{7U,5U,0U}},
{CMPA_B0C8,{0U,5U,0U}},
{CMPA_B0C8,{1U,5U,0U}},
{CMPA_B0C8,{2U,5U,0U}},
{CMPA_B0C8,{3U,5U,0U}},
{CMPA_B0C8,{4U,5U,0U}},
{CMPA_B0C8,{5U,5U,0U}},
{CMPA_B0C8,{6U,5U,0U}},
{CMPA_B0C8,{7U,5U,0U}},
{CMPA_B0D0,{0U,5U,0U}},
{CMPA_B0D0,{1U,5U,0U}},
{CMPA_B0D0,{2U,5U,0U}},
{CMPA_B0D0,{3U,5U,0U}},
{CMPA_B0D0,{4U,5U,0U}},
{CMPA_B0D0,{5U,5U,0U}},
{CMPA_B0D0,{6U,5U,0U}},
{CMPA_B0D0,{7U,5U,0U}},
{CMPA_B0D8,{0U,5U,0U}},
{CMPA_B0D8,{1U,5U,0U}},
{CMPA_B0D8,{2U,5U,0U}},
{CMPA_B0D8,{3U,5U,0U}},
{CMPA_B0D8,{4U,5U,0U}},
{CMPA_B0D8,{5U,5U,0U}},
{CMPA_B0D8,{6U,5U,0U}},
{CMPA_B0D8,{7U,5U,0U}},
{CMPA_B0E0,{0U,5U,0U}},
{CMPA_B0E0,{1U,5U,0U}},
{CMPA_B0E0,{2U,5U,0U}},
{CMPA_B0E0,{3U,5U,0U}},
{CMPA_B0E0,{4U,5U,0U}},
{CMPA_B0E0,{5U,5U,0U}},
{CMPA_B0E0,{6U,5U,0U}},
{CMPA_B0E0,{7U,5U,0U}},
{CMPA_B0E8,{0U,5U,0U}},
{CMPA_B0E8,{1U,5U,0U}},
{CMPA_B0E8,{2U,5U,0U}},
{CMPA_B0E8,{3U,5U,0U}},
{CMPA_B0E8,{4U,5U,0U}},
{CMPA_B0E8,{5U,5U,0U}},
{CMPA_B0E8,{6U,5U,0U}},
{CMPA_B0E8,{7U,5U,0U}},
{CMPA_B0F0,{0U,5U,0U}},
{CMPA_B0F0,{1U,5U,0U}},
{CMPA_B0F0,{2U,5U,0U}},
{CMPA_B0F0,{3U,5U,0U}},
{CMPA_B0F0,{4U,5U,0U}},
{CMPA_B0F0,{5U,5U,0U}},
{CMPA_B0F0,{6U,5U,0U}},
{CMPA_B0F0,{7U,5U,0U}},
{CMPA_B0F8,{0U,5U,0U}},
{CMPA_B0F9,{0U,5U,0U}},
{CMPA_B0FA,{0U,5U,0U}},
{CMPA_B0FB,{0U,5U,0U}},
{CMPA_B0FC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B100,{0U,5U,0U}},
{EOR_B100,{1U,5U,0U}},
{EOR_B100,{2U,5U,0U}},
{EOR_B100,{3U,5U,0U}},
{EOR_B100,{4U,5U,0U}},
{EOR_B100,{5U,5U,0U}},
{EOR_B100,{6U,5U,0U}},
{EOR_B100,{7U,5U,0U}},
{CMPM_B108,{5U,0U,0U}},
{CMPM_B108,{5U,1U,0U}},
{CMPM_B108,{5U,2U,0U}},
{CMPM_B108,{5U,3U,0U}},
{CMPM_B108,{5U,4U,0U}},
{CMPM_B108,{5U,5U,0U}},
{CMPM_B108,{5U,6U,0U}},
{CMPM_B108,{5U,7U,0U}},
{EOR_B110,{0U,5U,0U}},
{EOR_B110,{1U,5U,0U}},
{EOR_B110,{2U,5U,0U}},
{EOR_B110,{3U,5U,0U}},
{EOR_B110,{4U,5U,0U}},
{EOR_B110,{5U,5U,0U}},
{EOR_B110,{6U,5U,0U}},
{EOR_B110,{7U,5U,0U}},
{EOR_B118,{0U,5U,0U}},
{EOR_B118,{1U,5U,0U}},
{EOR_B118,{2U,5U,0U}},
{EOR_B118,{3U,5U,0U}},
{EOR_B118,{4U,5U,0U}},
{EOR_B118,{5U,5U,0U}},
{EOR_B118,{6U,5U,0U}},
{EOR_B118,{7U,5U,0U}},
{EOR_B120,{0U,5U,0U}},
{EOR_B120,{1U,5U,0U}},
{EOR_B120,{2U,5U,0U}},
{EOR_B120,{3U,5U,0U}},
{EOR_B120,{4U,5U,0U}},
{EOR_B120,{5U,5U,0U}},
{EOR_B120,{6U,5U,0U}},
{EOR_B120,{7U,5U,0U}},
{EOR_B128,{0U,5U,0U}},
{EOR_B128,{1U,5U,0U}},
{EOR_B128,{2U,5U,0U}},
{EOR_B128,{3U,5U,0U}},
{EOR_B128,{4U,5U,0U}},
{EOR_B128,{5U,5U,0U}},
{EOR_B128,{6U,5U,0U}},
{EOR_B128,{7U,5U,0U}},
{EOR_B130,{0U,5U,0U}},
{EOR_B130,{1U,5U,0U}},
{EOR_B130,{2U,5U,0U}},
{EOR_B130,{3U,5U,0U}},
{EOR_B130,{4U,5U,0U}},
{EOR_B130,{5U,5U,0U}},
{EOR_B130,{6U,5U,0U}},
{EOR_B130,{7U,5U,0U}},
{EOR_B138,{0U,5U,0U}},
{EOR_B139,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B140,{0U,5U,0U}},
{EOR_B140,{1U,5U,0U}},
{EOR_B140,{2U,5U,0U}},
{EOR_B140,{3U,5U,0U}},
{EOR_B140,{4U,5U,0U}},
{EOR_B140,{5U,5U,0U}},
{EOR_B140,{6U,5U,0U}},
{EOR_B140,{7U,5U,0U}},
{CMPM_B148,{5U,0U,0U}},
{CMPM_B148,{5U,1U,0U}},
{CMPM_B148,{5U,2U,0U}},
{CMPM_B148,{5U,3U,0U}},
{CMPM_B148,{5U,4U,0U}},
{CMPM_B148,{5U,5U,0U}},
{CMPM_B148,{5U,6U,0U}},
{CMPM_B148,{5U,7U,0U}},
{EOR_B150,{0U,5U,0U}},
{EOR_B150,{1U,5U,0U}},
{EOR_B150,{2U,5U,0U}},
{EOR_B150,{3U,5U,0U}},
{EOR_B150,{4U,5U,0U}},
{EOR_B150,{5U,5U,0U}},
{EOR_B150,{6U,5U,0U}},
{EOR_B150,{7U,5U,0U}},
{EOR_B158,{0U,5U,0U}},
{EOR_B158,{1U,5U,0U}},
{EOR_B158,{2U,5U,0U}},
{EOR_B158,{3U,5U,0U}},
{EOR_B158,{4U,5U,0U}},
{EOR_B158,{5U,5U,0U}},
{EOR_B158,{6U,5U,0U}},
{EOR_B158,{7U,5U,0U}},
{EOR_B160,{0U,5U,0U}},
{EOR_B160,{1U,5U,0U}},
{EOR_B160,{2U,5U,0U}},
{EOR_B160,{3U,5U,0U}},
{EOR_B160,{4U,5U,0U}},
{EOR_B160,{5U,5U,0U}},
{EOR_B160,{6U,5U,0U}},
{EOR_B160,{7U,5U,0U}},
{EOR_B168,{0U,5U,0U}},
{EOR_B168,{1U,5U,0U}},
{EOR_B168,{2U,5U,0U}},
{EOR_B168,{3U,5U,0U}},
{EOR_B168,{4U,5U,0U}},
{EOR_B168,{5U,5U,0U}},
{EOR_B168,{6U,5U,0U}},
{EOR_B168,{7U,5U,0U}},
{EOR_B170,{0U,5U,0U}},
{EOR_B170,{1U,5U,0U}},
{EOR_B170,{2U,5U,0U}},
{EOR_B170,{3U,5U,0U}},
{EOR_B170,{4U,5U,0U}},
{EOR_B170,{5U,5U,0U}},
{EOR_B170,{6U,5U,0U}},
{EOR_B170,{7U,5U,0U}},
{EOR_B178,{0U,5U,0U}},
{EOR_B179,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B180,{0U,5U,0U}},
{EOR_B180,{1U,5U,0U}},
{EOR_B180,{2U,5U,0U}},
{EOR_B180,{3U,5U,0U}},
{EOR_B180,{4U,5U,0U}},
{EOR_B180,{5U,5U,0U}},
{EOR_B180,{6U,5U,0U}},
{EOR_B180,{7U,5U,0U}},
{CMPM_B188,{5U,0U,0U}},
{CMPM_B188,{5U,1U,0U}},
{CMPM_B188,{5U,2U,0U}},
{CMPM_B188,{5U,3U,0U}},
{CMPM_B188,{5U,4U,0U}},
{CMPM_B188,{5U,5U,0U}},
{CMPM_B188,{5U,6U,0U}},
{CMPM_B188,{5U,7U,0U}},
{EOR_B190,{0U,5U,0U}},
{EOR_B190,{1U,5U,0U}},
{EOR_B190,{2U,5U,0U}},
{EOR_B190,{3U,5U,0U}},
{EOR_B190,{4U,5U,0U}},
{EOR_B190,{5U,5U,0U}},
{EOR_B190,{6U,5U,0U}},
{EOR_B190,{7U,5U,0U}},
{EOR_B198,{0U,5U,0U}},
{EOR_B198,{1U,5U,0U}},
{EOR_B198,{2U,5U,0U}},
{EOR_B198,{3U,5U,0U}},
{EOR_B198,{4U,5U,0U}},
{EOR_B198,{5U,5U,0U}},
{EOR_B198,{6U,5U,0U}},
{EOR_B198,{7U,5U,0U}},
{EOR_B1A0,{0U,5U,0U}},
{EOR_B1A0,{1U,5U,0U}},
{EOR_B1A0,{2U,5U,0U}},
{EOR_B1A0,{3U,5U,0U}},
{EOR_B1A0,{4U,5U,0U}},
{EOR_B1A0,{5U,5U,0U}},
{EOR_B1A0,{6U,5U,0U}},
{EOR_B1A0,{7U,5U,0U}},
{EOR_B1A8,{0U,5U,0U}},
{EOR_B1A8,{1U,5U,0U}},
{EOR_B1A8,{2U,5U,0U}},
{EOR_B1A8,{3U,5U,0U}},
{EOR_B1A8,{4U,5U,0U}},
{EOR_B1A8,{5U,5U,0U}},
{EOR_B1A8,{6U,5U,0U}},
{EOR_B1A8,{7U,5U,0U}},
{EOR_B1B0,{0U,5U,0U}},
{EOR_B1B0,{1U,5U,0U}},
{EOR_B1B0,{2U,5U,0U}},
{EOR_B1B0,{3U,5U,0U}},
{EOR_B1B0,{4U,5U,0U}},
{EOR_B1B0,{5U,5U,0U}},
{EOR_B1B0,{6U,5U,0U}},
{EOR_B1B0,{7U,5U,0U}},
{EOR_B1B8,{0U,5U,0U}},
{EOR_B1B9,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B1C0,{0U,5U,0U}},
{CMPA_B1C0,{1U,5U,0U}},
{CMPA_B1C0,{2U,5U,0U}},
{CMPA_B1C0,{3U,5U,0U}},
{CMPA_B1C0,{4U,5U,0U}},
{CMPA_B1C0,{5U,5U,0U}},
{CMPA_B1C0,{6U,5U,0U}},
{CMPA_B1C0,{7U,5U,0U}},
{CMPA_B1C8,{0U,5U,0U}},
{CMPA_B1C8,{1U,5U,0U}},
{CMPA_B1C8,{2U,5U,0U}},
{CMPA_B1C8,{3U,5U,0U}},
{CMPA_B1C8,{4U,5U,0U}},
{CMPA_B1C8,{5U,5U,0U}},
{CMPA_B1C8,{6U,5U,0U}},
{CMPA_B1C8,{7U,5U,0U}},
{CMPA_B1D0,{0U,5U,0U}},
{CMPA_B1D0,{1U,5U,0U}},
{CMPA_B1D0,{2U,5U,0U}},
{CMPA_B1D0,{3U,5U,0U}},
{CMPA_B1D0,{4U,5U,0U}},
{CMPA_B1D0,{5U,5U,0U}},
{CMPA_B1D0,{6U,5U,0U}},
{CMPA_B1D0,{7U,5U,0U}},
{CMPA_B1D8,{0U,5U,0U}},
{CMPA_B1D8,{1U,5U,0U}},
{CMPA_B1D8,{2U,5U,0U}},
{CMPA_B1D8,{3U,5U,0U}},
{CMPA_B1D8,{4U,5U,0U}},
{CMPA_B1D8,{5U,5U,0U}},
{CMPA_B1D8,{6U,5U,0U}},
{CMPA_B1D8,{7U,5U,0U}},
{CMPA_B1E0,{0U,5U,0U}},
{CMPA_B1E0,{1U,5U,0U}},
{CMPA_B1E0,{2U,5U,0U}},
{CMPA_B1E0,{3U,5U,0U}},
{CMPA_B1E0,{4U,5U,0U}},
{CMPA_B1E0,{5U,5U,0U}},
{CMPA_B1E0,{6U,5U,0U}},
{CMPA_B1E0,{7U,5U,0U}},
{CMPA_B1E8,{0U,5U,0U}},
{CMPA_B1E8,{1U,5U,0U}},
{CMPA_B1E8,{2U,5U,0U}},
{CMPA_B1E8,{3U,5U,0U}},
{CMPA_B1E8,{4U,5U,0U}},
{CMPA_B1E8,{5U,5U,0U}},
{CMPA_B1E8,{6U,5U,0U}},
{CMPA_B1E8,{7U,5U,0U}},
{CMPA_B1F0,{0U,5U,0U}},
{CMPA_B1F0,{1U,5U,0U}},
{CMPA_B1F0,{2U,5U,0U}},
{CMPA_B1F0,{3U,5U,0U}},
{CMPA_B1F0,{4U,5U,0U}},
{CMPA_B1F0,{5U,5U,0U}},
{CMPA_B1F0,{6U,5U,0U}},
{CMPA_B1F0,{7U,5U,0U}},
{CMPA_B1F8,{0U,5U,0U}},
{CMPA_B1F9,{0U,5U,0U}},
{CMPA_B1FA,{0U,5U,0U}},
{CMPA_B1FB,{0U,5U,0U}},
{CMPA_B1FC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B000,{0U,6U,0U}},
{CMP_B000,{1U,6U,0U}},
{CMP_B000,{2U,6U,0U}},
{CMP_B000,{3U,6U,0U}},
{CMP_B000,{4U,6U,0U}},
{CMP_B000,{5U,6U,0U}},
{CMP_B000,{6U,6U,0U}},
{CMP_B000,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B010,{0U,6U,0U}},
{CMP_B010,{1U,6U,0U}},
{CMP_B010,{2U,6U,0U}},
{CMP_B010,{3U,6U,0U}},
{CMP_B010,{4U,6U,0U}},
{CMP_B010,{5U,6U,0U}},
{CMP_B010,{6U,6U,0U}},
{CMP_B010,{7U,6U,0U}},
{CMP_B018,{0U,6U,0U}},
{CMP_B018,{1U,6U,0U}},
{CMP_B018,{2U,6U,0U}},
{CMP_B018,{3U,6U,0U}},
{CMP_B018,{4U,6U,0U}},
{CMP_B018,{5U,6U,0U}},
{CMP_B018,{6U,6U,0U}},
{CMP_B018,{7U,6U,0U}},
{CMP_B020,{0U,6U,0U}},
{CMP_B020,{1U,6U,0U}},
{CMP_B020,{2U,6U,0U}},
{CMP_B020,{3U,6U,0U}},
{CMP_B020,{4U,6U,0U}},
{CMP_B020,{5U,6U,0U}},
{CMP_B020,{6U,6U,0U}},
{CMP_B020,{7U,6U,0U}},
{CMP_B028,{0U,6U,0U}},
{CMP_B028,{1U,6U,0U}},
{CMP_B028,{2U,6U,0U}},
{CMP_B028,{3U,6U,0U}},
{CMP_B028,{4U,6U,0U}},
{CMP_B028,{5U,6U,0U}},
{CMP_B028,{6U,6U,0U}},
{CMP_B028,{7U,6U,0U}},
{CMP_B030,{0U,6U,0U}},
{CMP_B030,{1U,6U,0U}},
{CMP_B030,{2U,6U,0U}},
{CMP_B030,{3U,6U,0U}},
{CMP_B030,{4U,6U,0U}},
{CMP_B030,{5U,6U,0U}},
{CMP_B030,{6U,6U,0U}},
{CMP_B030,{7U,6U,0U}},
{CMP_B038,{0U,6U,0U}},
{CMP_B039,{0U,6U,0U}},
{CMP_B03A,{0U,6U,0U}},
{CMP_B03B,{0U,6U,0U}},
{CMP_B03C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B040,{0U,6U,0U}},
{CMP_B040,{1U,6U,0U}},
{CMP_B040,{2U,6U,0U}},
{CMP_B040,{3U,6U,0U}},
{CMP_B040,{4U,6U,0U}},
{CMP_B040,{5U,6U,0U}},
{CMP_B040,{6U,6U,0U}},
{CMP_B040,{7U,6U,0U}},
{CMP_B048,{0U,6U,0U}},
{CMP_B048,{1U,6U,0U}},
{CMP_B048,{2U,6U,0U}},
{CMP_B048,{3U,6U,0U}},
{CMP_B048,{4U,6U,0U}},
{CMP_B048,{5U,6U,0U}},
{CMP_B048,{6U,6U,0U}},
{CMP_B048,{7U,6U,0U}},
{CMP_B050,{0U,6U,0U}},
{CMP_B050,{1U,6U,0U}},
{CMP_B050,{2U,6U,0U}},
{CMP_B050,{3U,6U,0U}},
{CMP_B050,{4U,6U,0U}},
{CMP_B050,{5U,6U,0U}},
{CMP_B050,{6U,6U,0U}},
{CMP_B050,{7U,6U,0U}},
{CMP_B058,{0U,6U,0U}},
{CMP_B058,{1U,6U,0U}},
{CMP_B058,{2U,6U,0U}},
{CMP_B058,{3U,6U,0U}},
{CMP_B058,{4U,6U,0U}},
{CMP_B058,{5U,6U,0U}},
{CMP_B058,{6U,6U,0U}},
{CMP_B058,{7U,6U,0U}},
{CMP_B060,{0U,6U,0U}},
{CMP_B060,{1U,6U,0U}},
{CMP_B060,{2U,6U,0U}},
{CMP_B060,{3U,6U,0U}},
{CMP_B060,{4U,6U,0U}},
{CMP_B060,{5U,6U,0U}},
{CMP_B060,{6U,6U,0U}},
{CMP_B060,{7U,6U,0U}},
{CMP_B068,{0U,6U,0U}},
{CMP_B068,{1U,6U,0U}},
{CMP_B068,{2U,6U,0U}},
{CMP_B068,{3U,6U,0U}},
{CMP_B068,{4U,6U,0U}},
{CMP_B068,{5U,6U,0U}},
{CMP_B068,{6U,6U,0U}},
{CMP_B068,{7U,6U,0U}},
{CMP_B070,{0U,6U,0U}},
{CMP_B070,{1U,6U,0U}},
{CMP_B070,{2U,6U,0U}},
{CMP_B070,{3U,6U,0U}},
{CMP_B070,{4U,6U,0U}},
{CMP_B070,{5U,6U,0U}},
{CMP_B070,{6U,6U,0U}},
{CMP_B070,{7U,6U,0U}},
{CMP_B078,{0U,6U,0U}},
{CMP_B079,{0U,6U,0U}},
{CMP_B07A,{0U,6U,0U}},
{CMP_B07B,{0U,6U,0U}},
{CMP_B07C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B080,{0U,6U,0U}},
{CMP_B080,{1U,6U,0U}},
{CMP_B080,{2U,6U,0U}},
{CMP_B080,{3U,6U,0U}},
{CMP_B080,{4U,6U,0U}},
{CMP_B080,{5U,6U,0U}},
{CMP_B080,{6U,6U,0U}},
{CMP_B080,{7U,6U,0U}},
{CMP_B088,{0U,6U,0U}},
{CMP_B088,{1U,6U,0U}},
{CMP_B088,{2U,6U,0U}},
{CMP_B088,{3U,6U,0U}},
{CMP_B088,{4U,6U,0U}},
{CMP_B088,{5U,6U,0U}},
{CMP_B088,{6U,6U,0U}},
{CMP_B088,{7U,6U,0U}},
{CMP_B090,{0U,6U,0U}},
{CMP_B090,{1U,6U,0U}},
{CMP_B090,{2U,6U,0U}},
{CMP_B090,{3U,6U,0U}},
{CMP_B090,{4U,6U,0U}},
{CMP_B090,{5U,6U,0U}},
{CMP_B090,{6U,6U,0U}},
{CMP_B090,{7U,6U,0U}},
{CMP_B098,{0U,6U,0U}},
{CMP_B098,{1U,6U,0U}},
{CMP_B098,{2U,6U,0U}},
{CMP_B098,{3U,6U,0U}},
{CMP_B098,{4U,6U,0U}},
{CMP_B098,{5U,6U,0U}},
{CMP_B098,{6U,6U,0U}},
{CMP_B098,{7U,6U,0U}},
{CMP_B0A0,{0U,6U,0U}},
{CMP_B0A0,{1U,6U,0U}},
{CMP_B0A0,{2U,6U,0U}},
{CMP_B0A0,{3U,6U,0U}},
{CMP_B0A0,{4U,6U,0U}},
{CMP_B0A0,{5U,6U,0U}},
{CMP_B0A0,{6U,6U,0U}},
{CMP_B0A0,{7U,6U,0U}},
{CMP_B0A8,{0U,6U,0U}},
{CMP_B0A8,{1U,6U,0U}},
{CMP_B0A8,{2U,6U,0U}},
{CMP_B0A8,{3U,6U,0U}},
{CMP_B0A8,{4U,6U,0U}},
{CMP_B0A8,{5U,6U,0U}},
{CMP_B0A8,{6U,6U,0U}},
{CMP_B0A8,{7U,6U,0U}},
{CMP_B0B0,{0U,6U,0U}},
{CMP_B0B0,{1U,6U,0U}},
{CMP_B0B0,{2U,6U,0U}},
{CMP_B0B0,{3U,6U,0U}},
{CMP_B0B0,{4U,6U,0U}},
{CMP_B0B0,{5U,6U,0U}},
{CMP_B0B0,{6U,6U,0U}},
{CMP_B0B0,{7U,6U,0U}},
{CMP_B0B8,{0U,6U,0U}},
{CMP_B0B9,{0U,6U,0U}},
{CMP_B0BA,{0U,6U,0U}},
{CMP_B0BB,{0U,6U,0U}},
{CMP_B0BC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B0C0,{0U,6U,0U}},
{CMPA_B0C0,{1U,6U,0U}},
{CMPA_B0C0,{2U,6U,0U}},
{CMPA_B0C0,{3U,6U,0U}},
{CMPA_B0C0,{4U,6U,0U}},
{CMPA_B0C0,{5U,6U,0U}},
{CMPA_B0C0,{6U,6U,0U}},
{CMPA_B0C0,{7U,6U,0U}},
{CMPA_B0C8,{0U,6U,0U}},
{CMPA_B0C8,{1U,6U,0U}},
{CMPA_B0C8,{2U,6U,0U}},
{CMPA_B0C8,{3U,6U,0U}},
{CMPA_B0C8,{4U,6U,0U}},
{CMPA_B0C8,{5U,6U,0U}},
{CMPA_B0C8,{6U,6U,0U}},
{CMPA_B0C8,{7U,6U,0U}},
{CMPA_B0D0,{0U,6U,0U}},
{CMPA_B0D0,{1U,6U,0U}},
{CMPA_B0D0,{2U,6U,0U}},
{CMPA_B0D0,{3U,6U,0U}},
{CMPA_B0D0,{4U,6U,0U}},
{CMPA_B0D0,{5U,6U,0U}},
{CMPA_B0D0,{6U,6U,0U}},
{CMPA_B0D0,{7U,6U,0U}},
{CMPA_B0D8,{0U,6U,0U}},
{CMPA_B0D8,{1U,6U,0U}},
{CMPA_B0D8,{2U,6U,0U}},
{CMPA_B0D8,{3U,6U,0U}},
{CMPA_B0D8,{4U,6U,0U}},
{CMPA_B0D8,{5U,6U,0U}},
{CMPA_B0D8,{6U,6U,0U}},
{CMPA_B0D8,{7U,6U,0U}},
{CMPA_B0E0,{0U,6U,0U}},
{CMPA_B0E0,{1U,6U,0U}},
{CMPA_B0E0,{2U,6U,0U}},
{CMPA_B0E0,{3U,6U,0U}},
{CMPA_B0E0,{4U,6U,0U}},
{CMPA_B0E0,{5U,6U,0U}},
{CMPA_B0E0,{6U,6U,0U}},
{CMPA_B0E0,{7U,6U,0U}},
{CMPA_B0E8,{0U,6U,0U}},
{CMPA_B0E8,{1U,6U,0U}},
{CMPA_B0E8,{2U,6U,0U}},
{CMPA_B0E8,{3U,6U,0U}},
{CMPA_B0E8,{4U,6U,0U}},
{CMPA_B0E8,{5U,6U,0U}},
{CMPA_B0E8,{6U,6U,0U}},
{CMPA_B0E8,{7U,6U,0U}},
{CMPA_B0F0,{0U,6U,0U}},
{CMPA_B0F0,{1U,6U,0U}},
{CMPA_B0F0,{2U,6U,0U}},
{CMPA_B0F0,{3U,6U,0U}},
{CMPA_B0F0,{4U,6U,0U}},
{CMPA_B0F0,{5U,6U,0U}},
{CMPA_B0F0,{6U,6U,0U}},
{CMPA_B0F0,{7U,6U,0U}},
{CMPA_B0F8,{0U,6U,0U}},
{CMPA_B0F9,{0U,6U,0U}},
{CMPA_B0FA,{0U,6U,0U}},
{CMPA_B0FB,{0U,6U,0U}},
{CMPA_B0FC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B100,{0U,6U,0U}},
{EOR_B100,{1U,6U,0U}},
{EOR_B100,{2U,6U,0U}},
{EOR_B100,{3U,6U,0U}},
{EOR_B100,{4U,6U,0U}},
{EOR_B100,{5U,6U,0U}},
{EOR_B100,{6U,6U,0U}},
{EOR_B100,{7U,6U,0U}},
{CMPM_B108,{6U,0U,0U}},
{CMPM_B108,{6U,1U,0U}},
{CMPM_B108,{6U,2U,0U}},
{CMPM_B108,{6U,3U,0U}},
{CMPM_B108,{6U,4U,0U}},
{CMPM_B108,{6U,5U,0U}},
{CMPM_B108,{6U,6U,0U}},
{CMPM_B108,{6U,7U,0U}},
{EOR_B110,{0U,6U,0U}},
{EOR_B110,{1U,6U,0U}},
{EOR_B110,{2U,6U,0U}},
{EOR_B110,{3U,6U,0U}},
{EOR_B110,{4U,6U,0U}},
{EOR_B110,{5U,6U,0U}},
{EOR_B110,{6U,6U,0U}},
{EOR_B110,{7U,6U,0U}},
{EOR_B118,{0U,6U,0U}},
{EOR_B118,{1U,6U,0U}},
{EOR_B118,{2U,6U,0U}},
{EOR_B118,{3U,6U,0U}},
{EOR_B118,{4U,6U,0U}},
{EOR_B118,{5U,6U,0U}},
{EOR_B118,{6U,6U,0U}},
{EOR_B118,{7U,6U,0U}},
{EOR_B120,{0U,6U,0U}},
{EOR_B120,{1U,6U,0U}},
{EOR_B120,{2U,6U,0U}},
{EOR_B120,{3U,6U,0U}},
{EOR_B120,{4U,6U,0U}},
{EOR_B120,{5U,6U,0U}},
{EOR_B120,{6U,6U,0U}},
{EOR_B120,{7U,6U,0U}},
{EOR_B128,{0U,6U,0U}},
{EOR_B128,{1U,6U,0U}},
{EOR_B128,{2U,6U,0U}},
{EOR_B128,{3U,6U,0U}},
{EOR_B128,{4U,6U,0U}},
{EOR_B128,{5U,6U,0U}},
{EOR_B128,{6U,6U,0U}},
{EOR_B128,{7U,6U,0U}},
{EOR_B130,{0U,6U,0U}},
{EOR_B130,{1U,6U,0U}},
{EOR_B130,{2U,6U,0U}},
{EOR_B130,{3U,6U,0U}},
{EOR_B130,{4U,6U,0U}},
{EOR_B130,{5U,6U,0U}},
{EOR_B130,{6U,6U,0U}},
{EOR_B130,{7U,6U,0U}},
{EOR_B138,{0U,6U,0U}},
{EOR_B139,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B140,{0U,6U,0U}},
{EOR_B140,{1U,6U,0U}},
{EOR_B140,{2U,6U,0U}},
{EOR_B140,{3U,6U,0U}},
{EOR_B140,{4U,6U,0U}},
{EOR_B140,{5U,6U,0U}},
{EOR_B140,{6U,6U,0U}},
{EOR_B140,{7U,6U,0U}},
{CMPM_B148,{6U,0U,0U}},
{CMPM_B148,{6U,1U,0U}},
{CMPM_B148,{6U,2U,0U}},
{CMPM_B148,{6U,3U,0U}},
{CMPM_B148,{6U,4U,0U}},
{CMPM_B148,{6U,5U,0U}},
{CMPM_B148,{6U,6U,0U}},
{CMPM_B148,{6U,7U,0U}},
{EOR_B150,{0U,6U,0U}},
{EOR_B150,{1U,6U,0U}},
{EOR_B150,{2U,6U,0U}},
{EOR_B150,{3U,6U,0U}},
{EOR_B150,{4U,6U,0U}},
{EOR_B150,{5U,6U,0U}},
{EOR_B150,{6U,6U,0U}},
{EOR_B150,{7U,6U,0U}},
{EOR_B158,{0U,6U,0U}},
{EOR_B158,{1U,6U,0U}},
{EOR_B158,{2U,6U,0U}},
{EOR_B158,{3U,6U,0U}},
{EOR_B158,{4U,6U,0U}},
{EOR_B158,{5U,6U,0U}},
{EOR_B158,{6U,6U,0U}},
{EOR_B158,{7U,6U,0U}},
{EOR_B160,{0U,6U,0U}},
{EOR_B160,{1U,6U,0U}},
{EOR_B160,{2U,6U,0U}},
{EOR_B160,{3U,6U,0U}},
{EOR_B160,{4U,6U,0U}},
{EOR_B160,{5U,6U,0U}},
{EOR_B160,{6U,6U,0U}},
{EOR_B160,{7U,6U,0U}},
{EOR_B168,{0U,6U,0U}},
{EOR_B168,{1U,6U,0U}},
{EOR_B168,{2U,6U,0U}},
{EOR_B168,{3U,6U,0U}},
{EOR_B168,{4U,6U,0U}},
{EOR_B168,{5U,6U,0U}},
{EOR_B168,{6U,6U,0U}},
{EOR_B168,{7U,6U,0U}},
{EOR_B170,{0U,6U,0U}},
{EOR_B170,{1U,6U,0U}},
{EOR_B170,{2U,6U,0U}},
{EOR_B170,{3U,6U,0U}},
{EOR_B170,{4U,6U,0U}},
{EOR_B170,{5U,6U,0U}},
{EOR_B170,{6U,6U,0U}},
{EOR_B170,{7U,6U,0U}},
{EOR_B178,{0U,6U,0U}},
{EOR_B179,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B180,{0U,6U,0U}},
{EOR_B180,{1U,6U,0U}},
{EOR_B180,{2U,6U,0U}},
{EOR_B180,{3U,6U,0U}},
{EOR_B180,{4U,6U,0U}},
{EOR_B180,{5U,6U,0U}},
{EOR_B180,{6U,6U,0U}},
{EOR_B180,{7U,6U,0U}},
{CMPM_B188,{6U,0U,0U}},
{CMPM_B188,{6U,1U,0U}},
{CMPM_B188,{6U,2U,0U}},
{CMPM_B188,{6U,3U,0U}},
{CMPM_B188,{6U,4U,0U}},
{CMPM_B188,{6U,5U,0U}},
{CMPM_B188,{6U,6U,0U}},
{CMPM_B188,{6U,7U,0U}},
{EOR_B190,{0U,6U,0U}},
{EOR_B190,{1U,6U,0U}},
{EOR_B190,{2U,6U,0U}},
{EOR_B190,{3U,6U,0U}},
{EOR_B190,{4U,6U,0U}},
{EOR_B190,{5U,6U,0U}},
{EOR_B190,{6U,6U,0U}},
{EOR_B190,{7U,6U,0U}},
{EOR_B198,{0U,6U,0U}},
{EOR_B198,{1U,6U,0U}},
{EOR_B198,{2U,6U,0U}},
{EOR_B198,{3U,6U,0U}},
{EOR_B198,{4U,6U,0U}},
{EOR_B198,{5U,6U,0U}},
{EOR_B198,{6U,6U,0U}},
{EOR_B198,{7U,6U,0U}},
{EOR_B1A0,{0U,6U,0U}},
{EOR_B1A0,{1U,6U,0U}},
{EOR_B1A0,{2U,6U,0U}},
{EOR_B1A0,{3U,6U,0U}},
{EOR_B1A0,{4U,6U,0U}},
{EOR_B1A0,{5U,6U,0U}},
{EOR_B1A0,{6U,6U,0U}},
{EOR_B1A0,{7U,6U,0U}},
{EOR_B1A8,{0U,6U,0U}},
{EOR_B1A8,{1U,6U,0U}},
{EOR_B1A8,{2U,6U,0U}},
{EOR_B1A8,{3U,6U,0U}},
{EOR_B1A8,{4U,6U,0U}},
{EOR_B1A8,{5U,6U,0U}},
{EOR_B1A8,{6U,6U,0U}},
{EOR_B1A8,{7U,6U,0U}},
{EOR_B1B0,{0U,6U,0U}},
{EOR_B1B0,{1U,6U,0U}},
{EOR_B1B0,{2U,6U,0U}},
{EOR_B1B0,{3U,6U,0U}},
{EOR_B1B0,{4U,6U,0U}},
{EOR_B1B0,{5U,6U,0U}},
{EOR_B1B0,{6U,6U,0U}},
{EOR_B1B0,{7U,6U,0U}},
{EOR_B1B8,{0U,6U,0U}},
{EOR_B1B9,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B1C0,{0U,6U,0U}},
{CMPA_B1C0,{1U,6U,0U}},
{CMPA_B1C0,{2U,6U,0U}},
{CMPA_B1C0,{3U,6U,0U}},
{CMPA_B1C0,{4U,6U,0U}},
{CMPA_B1C0,{5U,6U,0U}},
{CMPA_B1C0,{6U,6U,0U}},
{CMPA_B1C0,{7U,6U,0U}},
{CMPA_B1C8,{0U,6U,0U}},
{CMPA_B1C8,{1U,6U,0U}},
{CMPA_B1C8,{2U,6U,0U}},
{CMPA_B1C8,{3U,6U,0U}},
{CMPA_B1C8,{4U,6U,0U}},
{CMPA_B1C8,{5U,6U,0U}},
{CMPA_B1C8,{6U,6U,0U}},
{CMPA_B1C8,{7U,6U,0U}},
{CMPA_B1D0,{0U,6U,0U}},
{CMPA_B1D0,{1U,6U,0U}},
{CMPA_B1D0,{2U,6U,0U}},
{CMPA_B1D0,{3U,6U,0U}},
{CMPA_B1D0,{4U,6U,0U}},
{CMPA_B1D0,{5U,6U,0U}},
{CMPA_B1D0,{6U,6U,0U}},
{CMPA_B1D0,{7U,6U,0U}},
{CMPA_B1D8,{0U,6U,0U}},
{CMPA_B1D8,{1U,6U,0U}},
{CMPA_B1D8,{2U,6U,0U}},
{CMPA_B1D8,{3U,6U,0U}},
{CMPA_B1D8,{4U,6U,0U}},
{CMPA_B1D8,{5U,6U,0U}},
{CMPA_B1D8,{6U,6U,0U}},
{CMPA_B1D8,{7U,6U,0U}},
{CMPA_B1E0,{0U,6U,0U}},
{CMPA_B1E0,{1U,6U,0U}},
{CMPA_B1E0,{2U,6U,0U}},
{CMPA_B1E0,{3U,6U,0U}},
{CMPA_B1E0,{4U,6U,0U}},
{CMPA_B1E0,{5U,6U,0U}},
{CMPA_B1E0,{6U,6U,0U}},
{CMPA_B1E0,{7U,6U,0U}},
{CMPA_B1E8,{0U,6U,0U}},
{CMPA_B1E8,{1U,6U,0U}},
{CMPA_B1E8,{2U,6U,0U}},
{CMPA_B1E8,{3U,6U,0U}},
{CMPA_B1E8,{4U,6U,0U}},
{CMPA_B1E8,{5U,6U,0U}},
{CMPA_B1E8,{6U,6U,0U}},
{CMPA_B1E8,{7U,6U,0U}},
{CMPA_B1F0,{0U,6U,0U}},
{CMPA_B1F0,{1U,6U,0U}},
{CMPA_B1F0,{2U,6U,0U}},
{CMPA_B1F0,{3U,6U,0U}},
{CMPA_B1F0,{4U,6U,0U}},
{CMPA_B1F0,{5U,6U,0U}},
{CMPA_B1F0,{6U,6U,0U}},
{CMPA_B1F0,{7U,6U,0U}},
{CMPA_B1F8,{0U,6U,0U}},
{CMPA_B1F9,{0U,6U,0U}},
{CMPA_B1FA,{0U,6U,0U}},
{CMPA_B1FB,{0U,6U,0U}},
{CMPA_B1FC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B000,{0U,7U,0U}},
{CMP_B000,{1U,7U,0U}},
{CMP_B000,{2U,7U,0U}},
{CMP_B000,{3U,7U,0U}},
{CMP_B000,{4U,7U,0U}},
{CMP_B000,{5U,7U,0U}},
{CMP_B000,{6U,7U,0U}},
{CMP_B000,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B010,{0U,7U,0U}},
{CMP_B010,{1U,7U,0U}},
{CMP_B010,{2U,7U,0U}},
{CMP_B010,{3U,7U,0U}},
{CMP_B010,{4U,7U,0U}},
{CMP_B010,{5U,7U,0U}},
{CMP_B010,{6U,7U,0U}},
{CMP_B010,{7U,7U,0U}},
{CMP_B018,{0U,7U,0U}},
{CMP_B018,{1U,7U,0U}},
{CMP_B018,{2U,7U,0U}},
{CMP_B018,{3U,7U,0U}},
{CMP_B018,{4U,7U,0U}},
{CMP_B018,{5U,7U,0U}},
{CMP_B018,{6U,7U,0U}},
{CMP_B018,{7U,7U,0U}},
{CMP_B020,{0U,7U,0U}},
{CMP_B020,{1U,7U,0U}},
{CMP_B020,{2U,7U,0U}},
{CMP_B020,{3U,7U,0U}},
{CMP_B020,{4U,7U,0U}},
{CMP_B020,{5U,7U,0U}},
{CMP_B020,{6U,7U,0U}},
{CMP_B020,{7U,7U,0U}},
{CMP_B028,{0U,7U,0U}},
{CMP_B028,{1U,7U,0U}},
{CMP_B028,{2U,7U,0U}},
{CMP_B028,{3U,7U,0U}},
{CMP_B028,{4U,7U,0U}},
{CMP_B028,{5U,7U,0U}},
{CMP_B028,{6U,7U,0U}},
{CMP_B028,{7U,7U,0U}},
{CMP_B030,{0U,7U,0U}},
{CMP_B030,{1U,7U,0U}},
{CMP_B030,{2U,7U,0U}},
{CMP_B030,{3U,7U,0U}},
{CMP_B030,{4U,7U,0U}},
{CMP_B030,{5U,7U,0U}},
{CMP_B030,{6U,7U,0U}},
{CMP_B030,{7U,7U,0U}},
{CMP_B038,{0U,7U,0U}},
{CMP_B039,{0U,7U,0U}},
{CMP_B03A,{0U,7U,0U}},
{CMP_B03B,{0U,7U,0U}},
{CMP_B03C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B040,{0U,7U,0U}},
{CMP_B040,{1U,7U,0U}},
{CMP_B040,{2U,7U,0U}},
{CMP_B040,{3U,7U,0U}},
{CMP_B040,{4U,7U,0U}},
{CMP_B040,{5U,7U,0U}},
{CMP_B040,{6U,7U,0U}},
{CMP_B040,{7U,7U,0U}},
{CMP_B048,{0U,7U,0U}},
{CMP_B048,{1U,7U,0U}},
{CMP_B048,{2U,7U,0U}},
{CMP_B048,{3U,7U,0U}},
{CMP_B048,{4U,7U,0U}},
{CMP_B048,{5U,7U,0U}},
{CMP_B048,{6U,7U,0U}},
{CMP_B048,{7U,7U,0U}},
{CMP_B050,{0U,7U,0U}},
{CMP_B050,{1U,7U,0U}},
{CMP_B050,{2U,7U,0U}},
{CMP_B050,{3U,7U,0U}},
{CMP_B050,{4U,7U,0U}},
{CMP_B050,{5U,7U,0U}},
{CMP_B050,{6U,7U,0U}},
{CMP_B050,{7U,7U,0U}},
{CMP_B058,{0U,7U,0U}},
{CMP_B058,{1U,7U,0U}},
{CMP_B058,{2U,7U,0U}},
{CMP_B058,{3U,7U,0U}},
{CMP_B058,{4U,7U,0U}},
{CMP_B058,{5U,7U,0U}},
{CMP_B058,{6U,7U,0U}},
{CMP_B058,{7U,7U,0U}},
{CMP_B060,{0U,7U,0U}},
{CMP_B060,{1U,7U,0U}},
{CMP_B060,{2U,7U,0U}},
{CMP_B060,{3U,7U,0U}},
{CMP_B060,{4U,7U,0U}},
{CMP_B060,{5U,7U,0U}},
{CMP_B060,{6U,7U,0U}},
{CMP_B060,{7U,7U,0U}},
{CMP_B068,{0U,7U,0U}},
{CMP_B068,{1U,7U,0U}},
{CMP_B068,{2U,7U,0U}},
{CMP_B068,{3U,7U,0U}},
{CMP_B068,{4U,7U,0U}},
{CMP_B068,{5U,7U,0U}},
{CMP_B068,{6U,7U,0U}},
{CMP_B068,{7U,7U,0U}},
{CMP_B070,{0U,7U,0U}},
{CMP_B070,{1U,7U,0U}},
{CMP_B070,{2U,7U,0U}},
{CMP_B070,{3U,7U,0U}},
{CMP_B070,{4U,7U,0U}},
{CMP_B070,{5U,7U,0U}},
{CMP_B070,{6U,7U,0U}},
{CMP_B070,{7U,7U,0U}},
{CMP_B078,{0U,7U,0U}},
{CMP_B079,{0U,7U,0U}},
{CMP_B07A,{0U,7U,0U}},
{CMP_B07B,{0U,7U,0U}},
{CMP_B07C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMP_B080,{0U,7U,0U}},
{CMP_B080,{1U,7U,0U}},
{CMP_B080,{2U,7U,0U}},
{CMP_B080,{3U,7U,0U}},
{CMP_B080,{4U,7U,0U}},
{CMP_B080,{5U,7U,0U}},
{CMP_B080,{6U,7U,0U}},
{CMP_B080,{7U,7U,0U}},
{CMP_B088,{0U,7U,0U}},
{CMP_B088,{1U,7U,0U}},
{CMP_B088,{2U,7U,0U}},
{CMP_B088,{3U,7U,0U}},
{CMP_B088,{4U,7U,0U}},
{CMP_B088,{5U,7U,0U}},
{CMP_B088,{6U,7U,0U}},
{CMP_B088,{7U,7U,0U}},
{CMP_B090,{0U,7U,0U}},
{CMP_B090,{1U,7U,0U}},
{CMP_B090,{2U,7U,0U}},
{CMP_B090,{3U,7U,0U}},
{CMP_B090,{4U,7U,0U}},
{CMP_B090,{5U,7U,0U}},
{CMP_B090,{6U,7U,0U}},
{CMP_B090,{7U,7U,0U}},
{CMP_B098,{0U,7U,0U}},
{CMP_B098,{1U,7U,0U}},
{CMP_B098,{2U,7U,0U}},
{CMP_B098,{3U,7U,0U}},
{CMP_B098,{4U,7U,0U}},
{CMP_B098,{5U,7U,0U}},
{CMP_B098,{6U,7U,0U}},
{CMP_B098,{7U,7U,0U}},
{CMP_B0A0,{0U,7U,0U}},
{CMP_B0A0,{1U,7U,0U}},
{CMP_B0A0,{2U,7U,0U}},
{CMP_B0A0,{3U,7U,0U}},
{CMP_B0A0,{4U,7U,0U}},
{CMP_B0A0,{5U,7U,0U}},
{CMP_B0A0,{6U,7U,0U}},
{CMP_B0A0,{7U,7U,0U}},
{CMP_B0A8,{0U,7U,0U}},
{CMP_B0A8,{1U,7U,0U}},
{CMP_B0A8,{2U,7U,0U}},
{CMP_B0A8,{3U,7U,0U}},
{CMP_B0A8,{4U,7U,0U}},
{CMP_B0A8,{5U,7U,0U}},
{CMP_B0A8,{6U,7U,0U}},
{CMP_B0A8,{7U,7U,0U}},
{CMP_B0B0,{0U,7U,0U}},
{CMP_B0B0,{1U,7U,0U}},
{CMP_B0B0,{2U,7U,0U}},
{CMP_B0B0,{3U,7U,0U}},
{CMP_B0B0,{4U,7U,0U}},
{CMP_B0B0,{5U,7U,0U}},
{CMP_B0B0,{6U,7U,0U}},
{CMP_B0B0,{7U,7U,0U}},
{CMP_B0B8,{0U,7U,0U}},
{CMP_B0B9,{0U,7U,0U}},
{CMP_B0BA,{0U,7U,0U}},
{CMP_B0BB,{0U,7U,0U}},
{CMP_B0BC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B0C0,{0U,7U,0U}},
{CMPA_B0C0,{1U,7U,0U}},
{CMPA_B0C0,{2U,7U,0U}},
{CMPA_B0C0,{3U,7U,0U}},
{CMPA_B0C0,{4U,7U,0U}},
{CMPA_B0C0,{5U,7U,0U}},
{CMPA_B0C0,{6U,7U,0U}},
{CMPA_B0C0,{7U,7U,0U}},
{CMPA_B0C8,{0U,7U,0U}},
{CMPA_B0C8,{1U,7U,0U}},
{CMPA_B0C8,{2U,7U,0U}},
{CMPA_B0C8,{3U,7U,0U}},
{CMPA_B0C8,{4U,7U,0U}},
{CMPA_B0C8,{5U,7U,0U}},
{CMPA_B0C8,{6U,7U,0U}},
{CMPA_B0C8,{7U,7U,0U}},
{CMPA_B0D0,{0U,7U,0U}},
{CMPA_B0D0,{1U,7U,0U}},
{CMPA_B0D0,{2U,7U,0U}},
{CMPA_B0D0,{3U,7U,0U}},
{CMPA_B0D0,{4U,7U,0U}},
{CMPA_B0D0,{5U,7U,0U}},
{CMPA_B0D0,{6U,7U,0U}},
{CMPA_B0D0,{7U,7U,0U}},
{CMPA_B0D8,{0U,7U,0U}},
{CMPA_B0D8,{1U,7U,0U}},
{CMPA_B0D8,{2U,7U,0U}},
{CMPA_B0D8,{3U,7U,0U}},
{CMPA_B0D8,{4U,7U,0U}},
{CMPA_B0D8,{5U,7U,0U}},
{CMPA_B0D8,{6U,7U,0U}},
{CMPA_B0D8,{7U,7U,0U}},
{CMPA_B0E0,{0U,7U,0U}},
{CMPA_B0E0,{1U,7U,0U}},
{CMPA_B0E0,{2U,7U,0U}},
{CMPA_B0E0,{3U,7U,0U}},
{CMPA_B0E0,{4U,7U,0U}},
{CMPA_B0E0,{5U,7U,0U}},
{CMPA_B0E0,{6U,7U,0U}},
{CMPA_B0E0,{7U,7U,0U}},
{CMPA_B0E8,{0U,7U,0U}},
{CMPA_B0E8,{1U,7U,0U}},
{CMPA_B0E8,{2U,7U,0U}},
{CMPA_B0E8,{3U,7U,0U}},
{CMPA_B0E8,{4U,7U,0U}},
{CMPA_B0E8,{5U,7U,0U}},
{CMPA_B0E8,{6U,7U,0U}},
{CMPA_B0E8,{7U,7U,0U}},
{CMPA_B0F0,{0U,7U,0U}},
{CMPA_B0F0,{1U,7U,0U}},
{CMPA_B0F0,{2U,7U,0U}},
{CMPA_B0F0,{3U,7U,0U}},
{CMPA_B0F0,{4U,7U,0U}},
{CMPA_B0F0,{5U,7U,0U}},
{CMPA_B0F0,{6U,7U,0U}},
{CMPA_B0F0,{7U,7U,0U}},
{CMPA_B0F8,{0U,7U,0U}},
{CMPA_B0F9,{0U,7U,0U}},
{CMPA_B0FA,{0U,7U,0U}},
{CMPA_B0FB,{0U,7U,0U}},
{CMPA_B0FC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B100,{0U,7U,0U}},
{EOR_B100,{1U,7U,0U}},
{EOR_B100,{2U,7U,0U}},
{EOR_B100,{3U,7U,0U}},
{EOR_B100,{4U,7U,0U}},
{EOR_B100,{5U,7U,0U}},
{EOR_B100,{6U,7U,0U}},
{EOR_B100,{7U,7U,0U}},
{CMPM_B108,{7U,0U,0U}},
{CMPM_B108,{7U,1U,0U}},
{CMPM_B108,{7U,2U,0U}},
{CMPM_B108,{7U,3U,0U}},
{CMPM_B108,{7U,4U,0U}},
{CMPM_B108,{7U,5U,0U}},
{CMPM_B108,{7U,6U,0U}},
{CMPM_B108,{7U,7U,0U}},
{EOR_B110,{0U,7U,0U}},
{EOR_B110,{1U,7U,0U}},
{EOR_B110,{2U,7U,0U}},
{EOR_B110,{3U,7U,0U}},
{EOR_B110,{4U,7U,0U}},
{EOR_B110,{5U,7U,0U}},
{EOR_B110,{6U,7U,0U}},
{EOR_B110,{7U,7U,0U}},
{EOR_B118,{0U,7U,0U}},
{EOR_B118,{1U,7U,0U}},
{EOR_B118,{2U,7U,0U}},
{EOR_B118,{3U,7U,0U}},
{EOR_B118,{4U,7U,0U}},
{EOR_B118,{5U,7U,0U}},
{EOR_B118,{6U,7U,0U}},
{EOR_B118,{7U,7U,0U}},
{EOR_B120,{0U,7U,0U}},
{EOR_B120,{1U,7U,0U}},
{EOR_B120,{2U,7U,0U}},
{EOR_B120,{3U,7U,0U}},
{EOR_B120,{4U,7U,0U}},
{EOR_B120,{5U,7U,0U}},
{EOR_B120,{6U,7U,0U}},
{EOR_B120,{7U,7U,0U}},
{EOR_B128,{0U,7U,0U}},
{EOR_B128,{1U,7U,0U}},
{EOR_B128,{2U,7U,0U}},
{EOR_B128,{3U,7U,0U}},
{EOR_B128,{4U,7U,0U}},
{EOR_B128,{5U,7U,0U}},
{EOR_B128,{6U,7U,0U}},
{EOR_B128,{7U,7U,0U}},
{EOR_B130,{0U,7U,0U}},
{EOR_B130,{1U,7U,0U}},
{EOR_B130,{2U,7U,0U}},
{EOR_B130,{3U,7U,0U}},
{EOR_B130,{4U,7U,0U}},
{EOR_B130,{5U,7U,0U}},
{EOR_B130,{6U,7U,0U}},
{EOR_B130,{7U,7U,0U}},
{EOR_B138,{0U,7U,0U}},
{EOR_B139,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B140,{0U,7U,0U}},
{EOR_B140,{1U,7U,0U}},
{EOR_B140,{2U,7U,0U}},
{EOR_B140,{3U,7U,0U}},
{EOR_B140,{4U,7U,0U}},
{EOR_B140,{5U,7U,0U}},
{EOR_B140,{6U,7U,0U}},
{EOR_B140,{7U,7U,0U}},
{CMPM_B148,{7U,0U,0U}},
{CMPM_B148,{7U,1U,0U}},
{CMPM_B148,{7U,2U,0U}},
{CMPM_B148,{7U,3U,0U}},
{CMPM_B148,{7U,4U,0U}},
{CMPM_B148,{7U,5U,0U}},
{CMPM_B148,{7U,6U,0U}},
{CMPM_B148,{7U,7U,0U}},
{EOR_B150,{0U,7U,0U}},
{EOR_B150,{1U,7U,0U}},
{EOR_B150,{2U,7U,0U}},
{EOR_B150,{3U,7U,0U}},
{EOR_B150,{4U,7U,0U}},
{EOR_B150,{5U,7U,0U}},
{EOR_B150,{6U,7U,0U}},
{EOR_B150,{7U,7U,0U}},
{EOR_B158,{0U,7U,0U}},
{EOR_B158,{1U,7U,0U}},
{EOR_B158,{2U,7U,0U}},
{EOR_B158,{3U,7U,0U}},
{EOR_B158,{4U,7U,0U}},
{EOR_B158,{5U,7U,0U}},
{EOR_B158,{6U,7U,0U}},
{EOR_B158,{7U,7U,0U}},
{EOR_B160,{0U,7U,0U}},
{EOR_B160,{1U,7U,0U}},
{EOR_B160,{2U,7U,0U}},
{EOR_B160,{3U,7U,0U}},
{EOR_B160,{4U,7U,0U}},
{EOR_B160,{5U,7U,0U}},
{EOR_B160,{6U,7U,0U}},
{EOR_B160,{7U,7U,0U}},
{EOR_B168,{0U,7U,0U}},
{EOR_B168,{1U,7U,0U}},
{EOR_B168,{2U,7U,0U}},
{EOR_B168,{3U,7U,0U}},
{EOR_B168,{4U,7U,0U}},
{EOR_B168,{5U,7U,0U}},
{EOR_B168,{6U,7U,0U}},
{EOR_B168,{7U,7U,0U}},
{EOR_B170,{0U,7U,0U}},
{EOR_B170,{1U,7U,0U}},
{EOR_B170,{2U,7U,0U}},
{EOR_B170,{3U,7U,0U}},
{EOR_B170,{4U,7U,0U}},
{EOR_B170,{5U,7U,0U}},
{EOR_B170,{6U,7U,0U}},
{EOR_B170,{7U,7U,0U}},
{EOR_B178,{0U,7U,0U}},
{EOR_B179,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EOR_B180,{0U,7U,0U}},
{EOR_B180,{1U,7U,0U}},
{EOR_B180,{2U,7U,0U}},
{EOR_B180,{3U,7U,0U}},
{EOR_B180,{4U,7U,0U}},
{EOR_B180,{5U,7U,0U}},
{EOR_B180,{6U,7U,0U}},
{EOR_B180,{7U,7U,0U}},
{CMPM_B188,{7U,0U,0U}},
{CMPM_B188,{7U,1U,0U}},
{CMPM_B188,{7U,2U,0U}},
{CMPM_B188,{7U,3U,0U}},
{CMPM_B188,{7U,4U,0U}},
{CMPM_B188,{7U,5U,0U}},
{CMPM_B188,{7U,6U,0U}},
{CMPM_B188,{7U,7U,0U}},
{EOR_B190,{0U,7U,0U}},
{EOR_B190,{1U,7U,0U}},
{EOR_B190,{2U,7U,0U}},
{EOR_B190,{3U,7U,0U}},
{EOR_B190,{4U,7U,0U}},
{EOR_B190,{5U,7U,0U}},
{EOR_B190,{6U,7U,0U}},
{EOR_B190,{7U,7U,0U}},
{EOR_B198,{0U,7U,0U}},
{EOR_B198,{1U,7U,0U}},
{EOR_B198,{2U,7U,0U}},
{EOR_B198,{3U,7U,0U}},
{EOR_B198,{4U,7U,0U}},
{EOR_B198,{5U,7U,0U}},
{EOR_B198,{6U,7U,0U}},
{EOR_B198,{7U,7U,0U}},
{EOR_B1A0,{0U,7U,0U}},
{EOR_B1A0,{1U,7U,0U}},
{EOR_B1A0,{2U,7U,0U}},
{EOR_B1A0,{3U,7U,0U}},
{EOR_B1A0,{4U,7U,0U}},
{EOR_B1A0,{5U,7U,0U}},
{EOR_B1A0,{6U,7U,0U}},
{EOR_B1A0,{7U,7U,0U}},
{EOR_B1A8,{0U,7U,0U}},
{EOR_B1A8,{1U,7U,0U}},
{EOR_B1A8,{2U,7U,0U}},
{EOR_B1A8,{3U,7U,0U}},
{EOR_B1A8,{4U,7U,0U}},
{EOR_B1A8,{5U,7U,0U}},
{EOR_B1A8,{6U,7U,0U}},
{EOR_B1A8,{7U,7U,0U}},
{EOR_B1B0,{0U,7U,0U}},
{EOR_B1B0,{1U,7U,0U}},
{EOR_B1B0,{2U,7U,0U}},
{EOR_B1B0,{3U,7U,0U}},
{EOR_B1B0,{4U,7U,0U}},
{EOR_B1B0,{5U,7U,0U}},
{EOR_B1B0,{6U,7U,0U}},
{EOR_B1B0,{7U,7U,0U}},
{EOR_B1B8,{0U,7U,0U}},
{EOR_B1B9,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{CMPA_B1C0,{0U,7U,0U}},
{CMPA_B1C0,{1U,7U,0U}},
{CMPA_B1C0,{2U,7U,0U}},
{CMPA_B1C0,{3U,7U,0U}},
{CMPA_B1C0,{4U,7U,0U}},
{CMPA_B1C0,{5U,7U,0U}},
{CMPA_B1C0,{6U,7U,0U}},
{CMPA_B1C0,{7U,7U,0U}},
{CMPA_B1C8,{0U,7U,0U}},
{CMPA_B1C8,{1U,7U,0U}},
{CMPA_B1C8,{2U,7U,0U}},
{CMPA_B1C8,{3U,7U,0U}},
{CMPA_B1C8,{4U,7U,0U}},
{CMPA_B1C8,{5U,7U,0U}},
{CMPA_B1C8,{6U,7U,0U}},
{CMPA_B1C8,{7U,7U,0U}},
{CMPA_B1D0,{0U,7U,0U}},
{CMPA_B1D0,{1U,7U,0U}},
{CMPA_B1D0,{2U,7U,0U}},
{CMPA_B1D0,{3U,7U,0U}},
{CMPA_B1D0,{4U,7U,0U}},
{CMPA_B1D0,{5U,7U,0U}},
{CMPA_B1D0,{6U,7U,0U}},
{CMPA_B1D0,{7U,7U,0U}},
{CMPA_B1D8,{0U,7U,0U}},
{CMPA_B1D8,{1U,7U,0U}},
{CMPA_B1D8,{2U,7U,0U}},
{CMPA_B1D8,{3U,7U,0U}},
{CMPA_B1D8,{4U,7U,0U}},
{CMPA_B1D8,{5U,7U,0U}},
{CMPA_B1D8,{6U,7U,0U}},
{CMPA_B1D8,{7U,7U,0U}},
{CMPA_B1E0,{0U,7U,0U}},
{CMPA_B1E0,{1U,7U,0U}},
{CMPA_B1E0,{2U,7U,0U}},
{CMPA_B1E0,{3U,7U,0U}},
{CMPA_B1E0,{4U,7U,0U}},
{CMPA_B1E0,{5U,7U,0U}},
{CMPA_B1E0,{6U,7U,0U}},
{CMPA_B1E0,{7U,7U,0U}},
{CMPA_B1E8,{0U,7U,0U}},
{CMPA_B1E8,{1U,7U,0U}},
{CMPA_B1E8,{2U,7U,0U}},
{CMPA_B1E8,{3U,7U,0U}},
{CMPA_B1E8,{4U,7U,0U}},
{CMPA_B1E8,{5U,7U,0U}},
{CMPA_B1E8,{6U,7U,0U}},
{CMPA_B1E8,{7U,7U,0U}},
{CMPA_B1F0,{0U,7U,0U}},
{CMPA_B1F0,{1U,7U,0U}},
{CMPA_B1F0,{2U,7U,0U}},
{CMPA_B1F0,{3U,7U,0U}},
{CMPA_B1F0,{4U,7U,0U}},
{CMPA_B1F0,{5U,7U,0U}},
{CMPA_B1F0,{6U,7U,0U}},
{CMPA_B1F0,{7U,7U,0U}},
{CMPA_B1F8,{0U,7U,0U}},
{CMPA_B1F9,{0U,7U,0U}},
{CMPA_B1FA,{0U,7U,0U}},
{CMPA_B1FB,{0U,7U,0U}},
{CMPA_B1FC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C000,{0U,0U,0U}},
{AND_C000,{1U,0U,0U}},
{AND_C000,{2U,0U,0U}},
{AND_C000,{3U,0U,0U}},
{AND_C000,{4U,0U,0U}},
{AND_C000,{5U,0U,0U}},
{AND_C000,{6U,0U,0U}},
{AND_C000,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C010,{0U,0U,0U}},
{AND_C010,{1U,0U,0U}},
{AND_C010,{2U,0U,0U}},
{AND_C010,{3U,0U,0U}},
{AND_C010,{4U,0U,0U}},
{AND_C010,{5U,0U,0U}},
{AND_C010,{6U,0U,0U}},
{AND_C010,{7U,0U,0U}},
{AND_C018,{0U,0U,0U}},
{AND_C018,{1U,0U,0U}},
{AND_C018,{2U,0U,0U}},
{AND_C018,{3U,0U,0U}},
{AND_C018,{4U,0U,0U}},
{AND_C018,{5U,0U,0U}},
{AND_C018,{6U,0U,0U}},
{AND_C018,{7U,0U,0U}},
{AND_C020,{0U,0U,0U}},
{AND_C020,{1U,0U,0U}},
{AND_C020,{2U,0U,0U}},
{AND_C020,{3U,0U,0U}},
{AND_C020,{4U,0U,0U}},
{AND_C020,{5U,0U,0U}},
{AND_C020,{6U,0U,0U}},
{AND_C020,{7U,0U,0U}},
{AND_C028,{0U,0U,0U}},
{AND_C028,{1U,0U,0U}},
{AND_C028,{2U,0U,0U}},
{AND_C028,{3U,0U,0U}},
{AND_C028,{4U,0U,0U}},
{AND_C028,{5U,0U,0U}},
{AND_C028,{6U,0U,0U}},
{AND_C028,{7U,0U,0U}},
{AND_C030,{0U,0U,0U}},
{AND_C030,{1U,0U,0U}},
{AND_C030,{2U,0U,0U}},
{AND_C030,{3U,0U,0U}},
{AND_C030,{4U,0U,0U}},
{AND_C030,{5U,0U,0U}},
{AND_C030,{6U,0U,0U}},
{AND_C030,{7U,0U,0U}},
{AND_C038,{0U,0U,0U}},
{AND_C039,{0U,0U,0U}},
{AND_C03A,{0U,0U,0U}},
{AND_C03B,{0U,0U,0U}},
{AND_C03C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C040,{0U,0U,0U}},
{AND_C040,{1U,0U,0U}},
{AND_C040,{2U,0U,0U}},
{AND_C040,{3U,0U,0U}},
{AND_C040,{4U,0U,0U}},
{AND_C040,{5U,0U,0U}},
{AND_C040,{6U,0U,0U}},
{AND_C040,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C050,{0U,0U,0U}},
{AND_C050,{1U,0U,0U}},
{AND_C050,{2U,0U,0U}},
{AND_C050,{3U,0U,0U}},
{AND_C050,{4U,0U,0U}},
{AND_C050,{5U,0U,0U}},
{AND_C050,{6U,0U,0U}},
{AND_C050,{7U,0U,0U}},
{AND_C058,{0U,0U,0U}},
{AND_C058,{1U,0U,0U}},
{AND_C058,{2U,0U,0U}},
{AND_C058,{3U,0U,0U}},
{AND_C058,{4U,0U,0U}},
{AND_C058,{5U,0U,0U}},
{AND_C058,{6U,0U,0U}},
{AND_C058,{7U,0U,0U}},
{AND_C060,{0U,0U,0U}},
{AND_C060,{1U,0U,0U}},
{AND_C060,{2U,0U,0U}},
{AND_C060,{3U,0U,0U}},
{AND_C060,{4U,0U,0U}},
{AND_C060,{5U,0U,0U}},
{AND_C060,{6U,0U,0U}},
{AND_C060,{7U,0U,0U}},
{AND_C068,{0U,0U,0U}},
{AND_C068,{1U,0U,0U}},
{AND_C068,{2U,0U,0U}},
{AND_C068,{3U,0U,0U}},
{AND_C068,{4U,0U,0U}},
{AND_C068,{5U,0U,0U}},
{AND_C068,{6U,0U,0U}},
{AND_C068,{7U,0U,0U}},
{AND_C070,{0U,0U,0U}},
{AND_C070,{1U,0U,0U}},
{AND_C070,{2U,0U,0U}},
{AND_C070,{3U,0U,0U}},
{AND_C070,{4U,0U,0U}},
{AND_C070,{5U,0U,0U}},
{AND_C070,{6U,0U,0U}},
{AND_C070,{7U,0U,0U}},
{AND_C078,{0U,0U,0U}},
{AND_C079,{0U,0U,0U}},
{AND_C07A,{0U,0U,0U}},
{AND_C07B,{0U,0U,0U}},
{AND_C07C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C080,{0U,0U,0U}},
{AND_C080,{1U,0U,0U}},
{AND_C080,{2U,0U,0U}},
{AND_C080,{3U,0U,0U}},
{AND_C080,{4U,0U,0U}},
{AND_C080,{5U,0U,0U}},
{AND_C080,{6U,0U,0U}},
{AND_C080,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C090,{0U,0U,0U}},
{AND_C090,{1U,0U,0U}},
{AND_C090,{2U,0U,0U}},
{AND_C090,{3U,0U,0U}},
{AND_C090,{4U,0U,0U}},
{AND_C090,{5U,0U,0U}},
{AND_C090,{6U,0U,0U}},
{AND_C090,{7U,0U,0U}},
{AND_C098,{0U,0U,0U}},
{AND_C098,{1U,0U,0U}},
{AND_C098,{2U,0U,0U}},
{AND_C098,{3U,0U,0U}},
{AND_C098,{4U,0U,0U}},
{AND_C098,{5U,0U,0U}},
{AND_C098,{6U,0U,0U}},
{AND_C098,{7U,0U,0U}},
{AND_C0A0,{0U,0U,0U}},
{AND_C0A0,{1U,0U,0U}},
{AND_C0A0,{2U,0U,0U}},
{AND_C0A0,{3U,0U,0U}},
{AND_C0A0,{4U,0U,0U}},
{AND_C0A0,{5U,0U,0U}},
{AND_C0A0,{6U,0U,0U}},
{AND_C0A0,{7U,0U,0U}},
{AND_C0A8,{0U,0U,0U}},
{AND_C0A8,{1U,0U,0U}},
{AND_C0A8,{2U,0U,0U}},
{AND_C0A8,{3U,0U,0U}},
{AND_C0A8,{4U,0U,0U}},
{AND_C0A8,{5U,0U,0U}},
{AND_C0A8,{6U,0U,0U}},
{AND_C0A8,{7U,0U,0U}},
{AND_C0B0,{0U,0U,0U}},
{AND_C0B0,{1U,0U,0U}},
{AND_C0B0,{2U,0U,0U}},
{AND_C0B0,{3U,0U,0U}},
{AND_C0B0,{4U,0U,0U}},
{AND_C0B0,{5U,0U,0U}},
{AND_C0B0,{6U,0U,0U}},
{AND_C0B0,{7U,0U,0U}},
{AND_C0B8,{0U,0U,0U}},
{AND_C0B9,{0U,0U,0U}},
{AND_C0BA,{0U,0U,0U}},
{AND_C0BB,{0U,0U,0U}},
{AND_C0BC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0C0,{0U,0U,0U}},
{MULU_C0C0,{1U,0U,0U}},
{MULU_C0C0,{2U,0U,0U}},
{MULU_C0C0,{3U,0U,0U}},
{MULU_C0C0,{4U,0U,0U}},
{MULU_C0C0,{5U,0U,0U}},
{MULU_C0C0,{6U,0U,0U}},
{MULU_C0C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0D0,{0U,0U,0U}},
{MULU_C0D0,{1U,0U,0U}},
{MULU_C0D0,{2U,0U,0U}},
{MULU_C0D0,{3U,0U,0U}},
{MULU_C0D0,{4U,0U,0U}},
{MULU_C0D0,{5U,0U,0U}},
{MULU_C0D0,{6U,0U,0U}},
{MULU_C0D0,{7U,0U,0U}},
{MULU_C0D8,{0U,0U,0U}},
{MULU_C0D8,{1U,0U,0U}},
{MULU_C0D8,{2U,0U,0U}},
{MULU_C0D8,{3U,0U,0U}},
{MULU_C0D8,{4U,0U,0U}},
{MULU_C0D8,{5U,0U,0U}},
{MULU_C0D8,{6U,0U,0U}},
{MULU_C0D8,{7U,0U,0U}},
{MULU_C0E0,{0U,0U,0U}},
{MULU_C0E0,{1U,0U,0U}},
{MULU_C0E0,{2U,0U,0U}},
{MULU_C0E0,{3U,0U,0U}},
{MULU_C0E0,{4U,0U,0U}},
{MULU_C0E0,{5U,0U,0U}},
{MULU_C0E0,{6U,0U,0U}},
{MULU_C0E0,{7U,0U,0U}},
{MULU_C0E8,{0U,0U,0U}},
{MULU_C0E8,{1U,0U,0U}},
{MULU_C0E8,{2U,0U,0U}},
{MULU_C0E8,{3U,0U,0U}},
{MULU_C0E8,{4U,0U,0U}},
{MULU_C0E8,{5U,0U,0U}},
{MULU_C0E8,{6U,0U,0U}},
{MULU_C0E8,{7U,0U,0U}},
{MULU_C0F0,{0U,0U,0U}},
{MULU_C0F0,{1U,0U,0U}},
{MULU_C0F0,{2U,0U,0U}},
{MULU_C0F0,{3U,0U,0U}},
{MULU_C0F0,{4U,0U,0U}},
{MULU_C0F0,{5U,0U,0U}},
{MULU_C0F0,{6U,0U,0U}},
{MULU_C0F0,{7U,0U,0U}},
{MULU_C0F8,{0U,0U,0U}},
{MULU_C0F9,{0U,0U,0U}},
{MULU_C0FA,{0U,0U,0U}},
{MULU_C0FB,{0U,0U,0U}},
{MULU_C0FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ABCD_C100,{0U,0U,0U}},
{ABCD_C100,{1U,0U,0U}},
{ABCD_C100,{2U,0U,0U}},
{ABCD_C100,{3U,0U,0U}},
{ABCD_C100,{4U,0U,0U}},
{ABCD_C100,{5U,0U,0U}},
{ABCD_C100,{6U,0U,0U}},
{ABCD_C100,{7U,0U,0U}},
{ABCD_C108,{0U,0U,0U}},
{ABCD_C108,{1U,0U,0U}},
{ABCD_C108,{2U,0U,0U}},
{ABCD_C108,{3U,0U,0U}},
{ABCD_C108,{4U,0U,0U}},
{ABCD_C108,{5U,0U,0U}},
{ABCD_C108,{6U,0U,0U}},
{ABCD_C108,{7U,0U,0U}},
{AND_C110,{0U,0U,0U}},
{AND_C110,{1U,0U,0U}},
{AND_C110,{2U,0U,0U}},
{AND_C110,{3U,0U,0U}},
{AND_C110,{4U,0U,0U}},
{AND_C110,{5U,0U,0U}},
{AND_C110,{6U,0U,0U}},
{AND_C110,{7U,0U,0U}},
{AND_C118,{0U,0U,0U}},
{AND_C118,{1U,0U,0U}},
{AND_C118,{2U,0U,0U}},
{AND_C118,{3U,0U,0U}},
{AND_C118,{4U,0U,0U}},
{AND_C118,{5U,0U,0U}},
{AND_C118,{6U,0U,0U}},
{AND_C118,{7U,0U,0U}},
{AND_C120,{0U,0U,0U}},
{AND_C120,{1U,0U,0U}},
{AND_C120,{2U,0U,0U}},
{AND_C120,{3U,0U,0U}},
{AND_C120,{4U,0U,0U}},
{AND_C120,{5U,0U,0U}},
{AND_C120,{6U,0U,0U}},
{AND_C120,{7U,0U,0U}},
{AND_C128,{0U,0U,0U}},
{AND_C128,{1U,0U,0U}},
{AND_C128,{2U,0U,0U}},
{AND_C128,{3U,0U,0U}},
{AND_C128,{4U,0U,0U}},
{AND_C128,{5U,0U,0U}},
{AND_C128,{6U,0U,0U}},
{AND_C128,{7U,0U,0U}},
{AND_C130,{0U,0U,0U}},
{AND_C130,{1U,0U,0U}},
{AND_C130,{2U,0U,0U}},
{AND_C130,{3U,0U,0U}},
{AND_C130,{4U,0U,0U}},
{AND_C130,{5U,0U,0U}},
{AND_C130,{6U,0U,0U}},
{AND_C130,{7U,0U,0U}},
{AND_C138,{0U,0U,0U}},
{AND_C139,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C140,{0U,0U,0U}},
{EXG_C140,{0U,1U,0U}},
{EXG_C140,{0U,2U,0U}},
{EXG_C140,{0U,3U,0U}},
{EXG_C140,{0U,4U,0U}},
{EXG_C140,{0U,5U,0U}},
{EXG_C140,{0U,6U,0U}},
{EXG_C140,{0U,7U,0U}},
{EXG_C148,{0U,0U,0U}},
{EXG_C148,{0U,1U,0U}},
{EXG_C148,{0U,2U,0U}},
{EXG_C148,{0U,3U,0U}},
{EXG_C148,{0U,4U,0U}},
{EXG_C148,{0U,5U,0U}},
{EXG_C148,{0U,6U,0U}},
{EXG_C148,{0U,7U,0U}},
{AND_C150,{0U,0U,0U}},
{AND_C150,{1U,0U,0U}},
{AND_C150,{2U,0U,0U}},
{AND_C150,{3U,0U,0U}},
{AND_C150,{4U,0U,0U}},
{AND_C150,{5U,0U,0U}},
{AND_C150,{6U,0U,0U}},
{AND_C150,{7U,0U,0U}},
{AND_C158,{0U,0U,0U}},
{AND_C158,{1U,0U,0U}},
{AND_C158,{2U,0U,0U}},
{AND_C158,{3U,0U,0U}},
{AND_C158,{4U,0U,0U}},
{AND_C158,{5U,0U,0U}},
{AND_C158,{6U,0U,0U}},
{AND_C158,{7U,0U,0U}},
{AND_C160,{0U,0U,0U}},
{AND_C160,{1U,0U,0U}},
{AND_C160,{2U,0U,0U}},
{AND_C160,{3U,0U,0U}},
{AND_C160,{4U,0U,0U}},
{AND_C160,{5U,0U,0U}},
{AND_C160,{6U,0U,0U}},
{AND_C160,{7U,0U,0U}},
{AND_C168,{0U,0U,0U}},
{AND_C168,{1U,0U,0U}},
{AND_C168,{2U,0U,0U}},
{AND_C168,{3U,0U,0U}},
{AND_C168,{4U,0U,0U}},
{AND_C168,{5U,0U,0U}},
{AND_C168,{6U,0U,0U}},
{AND_C168,{7U,0U,0U}},
{AND_C170,{0U,0U,0U}},
{AND_C170,{1U,0U,0U}},
{AND_C170,{2U,0U,0U}},
{AND_C170,{3U,0U,0U}},
{AND_C170,{4U,0U,0U}},
{AND_C170,{5U,0U,0U}},
{AND_C170,{6U,0U,0U}},
{AND_C170,{7U,0U,0U}},
{AND_C178,{0U,0U,0U}},
{AND_C179,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C188,{0U,0U,0U}},
{EXG_C188,{0U,1U,0U}},
{EXG_C188,{0U,2U,0U}},
{EXG_C188,{0U,3U,0U}},
{EXG_C188,{0U,4U,0U}},
{EXG_C188,{0U,5U,0U}},
{EXG_C188,{0U,6U,0U}},
{EXG_C188,{0U,7U,0U}},
{AND_C190,{0U,0U,0U}},
{AND_C190,{1U,0U,0U}},
{AND_C190,{2U,0U,0U}},
{AND_C190,{3U,0U,0U}},
{AND_C190,{4U,0U,0U}},
{AND_C190,{5U,0U,0U}},
{AND_C190,{6U,0U,0U}},
{AND_C190,{7U,0U,0U}},
{AND_C198,{0U,0U,0U}},
{AND_C198,{1U,0U,0U}},
{AND_C198,{2U,0U,0U}},
{AND_C198,{3U,0U,0U}},
{AND_C198,{4U,0U,0U}},
{AND_C198,{5U,0U,0U}},
{AND_C198,{6U,0U,0U}},
{AND_C198,{7U,0U,0U}},
{AND_C1A0,{0U,0U,0U}},
{AND_C1A0,{1U,0U,0U}},
{AND_C1A0,{2U,0U,0U}},
{AND_C1A0,{3U,0U,0U}},
{AND_C1A0,{4U,0U,0U}},
{AND_C1A0,{5U,0U,0U}},
{AND_C1A0,{6U,0U,0U}},
{AND_C1A0,{7U,0U,0U}},
{AND_C1A8,{0U,0U,0U}},
{AND_C1A8,{1U,0U,0U}},
{AND_C1A8,{2U,0U,0U}},
{AND_C1A8,{3U,0U,0U}},
{AND_C1A8,{4U,0U,0U}},
{AND_C1A8,{5U,0U,0U}},
{AND_C1A8,{6U,0U,0U}},
{AND_C1A8,{7U,0U,0U}},
{AND_C1B0,{0U,0U,0U}},
{AND_C1B0,{1U,0U,0U}},
{AND_C1B0,{2U,0U,0U}},
{AND_C1B0,{3U,0U,0U}},
{AND_C1B0,{4U,0U,0U}},
{AND_C1B0,{5U,0U,0U}},
{AND_C1B0,{6U,0U,0U}},
{AND_C1B0,{7U,0U,0U}},
{AND_C1B8,{0U,0U,0U}},
{AND_C1B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1C0,{0U,0U,0U}},
{MULS_C1C0,{1U,0U,0U}},
{MULS_C1C0,{2U,0U,0U}},
{MULS_C1C0,{3U,0U,0U}},
{MULS_C1C0,{4U,0U,0U}},
{MULS_C1C0,{5U,0U,0U}},
{MULS_C1C0,{6U,0U,0U}},
{MULS_C1C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1D0,{0U,0U,0U}},
{MULS_C1D0,{1U,0U,0U}},
{MULS_C1D0,{2U,0U,0U}},
{MULS_C1D0,{3U,0U,0U}},
{MULS_C1D0,{4U,0U,0U}},
{MULS_C1D0,{5U,0U,0U}},
{MULS_C1D0,{6U,0U,0U}},
{MULS_C1D0,{7U,0U,0U}},
{MULS_C1D8,{0U,0U,0U}},
{MULS_C1D8,{1U,0U,0U}},
{MULS_C1D8,{2U,0U,0U}},
{MULS_C1D8,{3U,0U,0U}},
{MULS_C1D8,{4U,0U,0U}},
{MULS_C1D8,{5U,0U,0U}},
{MULS_C1D8,{6U,0U,0U}},
{MULS_C1D8,{7U,0U,0U}},
{MULS_C1E0,{0U,0U,0U}},
{MULS_C1E0,{1U,0U,0U}},
{MULS_C1E0,{2U,0U,0U}},
{MULS_C1E0,{3U,0U,0U}},
{MULS_C1E0,{4U,0U,0U}},
{MULS_C1E0,{5U,0U,0U}},
{MULS_C1E0,{6U,0U,0U}},
{MULS_C1E0,{7U,0U,0U}},
{MULS_C1E8,{0U,0U,0U}},
{MULS_C1E8,{1U,0U,0U}},
{MULS_C1E8,{2U,0U,0U}},
{MULS_C1E8,{3U,0U,0U}},
{MULS_C1E8,{4U,0U,0U}},
{MULS_C1E8,{5U,0U,0U}},
{MULS_C1E8,{6U,0U,0U}},
{MULS_C1E8,{7U,0U,0U}},
{MULS_C1F0,{0U,0U,0U}},
{MULS_C1F0,{1U,0U,0U}},
{MULS_C1F0,{2U,0U,0U}},
{MULS_C1F0,{3U,0U,0U}},
{MULS_C1F0,{4U,0U,0U}},
{MULS_C1F0,{5U,0U,0U}},
{MULS_C1F0,{6U,0U,0U}},
{MULS_C1F0,{7U,0U,0U}},
{MULS_C1F8,{0U,0U,0U}},
{MULS_C1F9,{0U,0U,0U}},
{MULS_C1FA,{0U,0U,0U}},
{MULS_C1FB,{0U,0U,0U}},
{MULS_C1FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C000,{0U,1U,0U}},
{AND_C000,{1U,1U,0U}},
{AND_C000,{2U,1U,0U}},
{AND_C000,{3U,1U,0U}},
{AND_C000,{4U,1U,0U}},
{AND_C000,{5U,1U,0U}},
{AND_C000,{6U,1U,0U}},
{AND_C000,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C010,{0U,1U,0U}},
{AND_C010,{1U,1U,0U}},
{AND_C010,{2U,1U,0U}},
{AND_C010,{3U,1U,0U}},
{AND_C010,{4U,1U,0U}},
{AND_C010,{5U,1U,0U}},
{AND_C010,{6U,1U,0U}},
{AND_C010,{7U,1U,0U}},
{AND_C018,{0U,1U,0U}},
{AND_C018,{1U,1U,0U}},
{AND_C018,{2U,1U,0U}},
{AND_C018,{3U,1U,0U}},
{AND_C018,{4U,1U,0U}},
{AND_C018,{5U,1U,0U}},
{AND_C018,{6U,1U,0U}},
{AND_C018,{7U,1U,0U}},
{AND_C020,{0U,1U,0U}},
{AND_C020,{1U,1U,0U}},
{AND_C020,{2U,1U,0U}},
{AND_C020,{3U,1U,0U}},
{AND_C020,{4U,1U,0U}},
{AND_C020,{5U,1U,0U}},
{AND_C020,{6U,1U,0U}},
{AND_C020,{7U,1U,0U}},
{AND_C028,{0U,1U,0U}},
{AND_C028,{1U,1U,0U}},
{AND_C028,{2U,1U,0U}},
{AND_C028,{3U,1U,0U}},
{AND_C028,{4U,1U,0U}},
{AND_C028,{5U,1U,0U}},
{AND_C028,{6U,1U,0U}},
{AND_C028,{7U,1U,0U}},
{AND_C030,{0U,1U,0U}},
{AND_C030,{1U,1U,0U}},
{AND_C030,{2U,1U,0U}},
{AND_C030,{3U,1U,0U}},
{AND_C030,{4U,1U,0U}},
{AND_C030,{5U,1U,0U}},
{AND_C030,{6U,1U,0U}},
{AND_C030,{7U,1U,0U}},
{AND_C038,{0U,1U,0U}},
{AND_C039,{0U,1U,0U}},
{AND_C03A,{0U,1U,0U}},
{AND_C03B,{0U,1U,0U}},
{AND_C03C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C040,{0U,1U,0U}},
{AND_C040,{1U,1U,0U}},
{AND_C040,{2U,1U,0U}},
{AND_C040,{3U,1U,0U}},
{AND_C040,{4U,1U,0U}},
{AND_C040,{5U,1U,0U}},
{AND_C040,{6U,1U,0U}},
{AND_C040,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C050,{0U,1U,0U}},
{AND_C050,{1U,1U,0U}},
{AND_C050,{2U,1U,0U}},
{AND_C050,{3U,1U,0U}},
{AND_C050,{4U,1U,0U}},
{AND_C050,{5U,1U,0U}},
{AND_C050,{6U,1U,0U}},
{AND_C050,{7U,1U,0U}},
{AND_C058,{0U,1U,0U}},
{AND_C058,{1U,1U,0U}},
{AND_C058,{2U,1U,0U}},
{AND_C058,{3U,1U,0U}},
{AND_C058,{4U,1U,0U}},
{AND_C058,{5U,1U,0U}},
{AND_C058,{6U,1U,0U}},
{AND_C058,{7U,1U,0U}},
{AND_C060,{0U,1U,0U}},
{AND_C060,{1U,1U,0U}},
{AND_C060,{2U,1U,0U}},
{AND_C060,{3U,1U,0U}},
{AND_C060,{4U,1U,0U}},
{AND_C060,{5U,1U,0U}},
{AND_C060,{6U,1U,0U}},
{AND_C060,{7U,1U,0U}},
{AND_C068,{0U,1U,0U}},
{AND_C068,{1U,1U,0U}},
{AND_C068,{2U,1U,0U}},
{AND_C068,{3U,1U,0U}},
{AND_C068,{4U,1U,0U}},
{AND_C068,{5U,1U,0U}},
{AND_C068,{6U,1U,0U}},
{AND_C068,{7U,1U,0U}},
{AND_C070,{0U,1U,0U}},
{AND_C070,{1U,1U,0U}},
{AND_C070,{2U,1U,0U}},
{AND_C070,{3U,1U,0U}},
{AND_C070,{4U,1U,0U}},
{AND_C070,{5U,1U,0U}},
{AND_C070,{6U,1U,0U}},
{AND_C070,{7U,1U,0U}},
{AND_C078,{0U,1U,0U}},
{AND_C079,{0U,1U,0U}},
{AND_C07A,{0U,1U,0U}},
{AND_C07B,{0U,1U,0U}},
{AND_C07C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C080,{0U,1U,0U}},
{AND_C080,{1U,1U,0U}},
{AND_C080,{2U,1U,0U}},
{AND_C080,{3U,1U,0U}},
{AND_C080,{4U,1U,0U}},
{AND_C080,{5U,1U,0U}},
{AND_C080,{6U,1U,0U}},
{AND_C080,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C090,{0U,1U,0U}},
{AND_C090,{1U,1U,0U}},
{AND_C090,{2U,1U,0U}},
{AND_C090,{3U,1U,0U}},
{AND_C090,{4U,1U,0U}},
{AND_C090,{5U,1U,0U}},
{AND_C090,{6U,1U,0U}},
{AND_C090,{7U,1U,0U}},
{AND_C098,{0U,1U,0U}},
{AND_C098,{1U,1U,0U}},
{AND_C098,{2U,1U,0U}},
{AND_C098,{3U,1U,0U}},
{AND_C098,{4U,1U,0U}},
{AND_C098,{5U,1U,0U}},
{AND_C098,{6U,1U,0U}},
{AND_C098,{7U,1U,0U}},
{AND_C0A0,{0U,1U,0U}},
{AND_C0A0,{1U,1U,0U}},
{AND_C0A0,{2U,1U,0U}},
{AND_C0A0,{3U,1U,0U}},
{AND_C0A0,{4U,1U,0U}},
{AND_C0A0,{5U,1U,0U}},
{AND_C0A0,{6U,1U,0U}},
{AND_C0A0,{7U,1U,0U}},
{AND_C0A8,{0U,1U,0U}},
{AND_C0A8,{1U,1U,0U}},
{AND_C0A8,{2U,1U,0U}},
{AND_C0A8,{3U,1U,0U}},
{AND_C0A8,{4U,1U,0U}},
{AND_C0A8,{5U,1U,0U}},
{AND_C0A8,{6U,1U,0U}},
{AND_C0A8,{7U,1U,0U}},
{AND_C0B0,{0U,1U,0U}},
{AND_C0B0,{1U,1U,0U}},
{AND_C0B0,{2U,1U,0U}},
{AND_C0B0,{3U,1U,0U}},
{AND_C0B0,{4U,1U,0U}},
{AND_C0B0,{5U,1U,0U}},
{AND_C0B0,{6U,1U,0U}},
{AND_C0B0,{7U,1U,0U}},
{AND_C0B8,{0U,1U,0U}},
{AND_C0B9,{0U,1U,0U}},
{AND_C0BA,{0U,1U,0U}},
{AND_C0BB,{0U,1U,0U}},
{AND_C0BC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0C0,{0U,1U,0U}},
{MULU_C0C0,{1U,1U,0U}},
{MULU_C0C0,{2U,1U,0U}},
{MULU_C0C0,{3U,1U,0U}},
{MULU_C0C0,{4U,1U,0U}},
{MULU_C0C0,{5U,1U,0U}},
{MULU_C0C0,{6U,1U,0U}},
{MULU_C0C0,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0D0,{0U,1U,0U}},
{MULU_C0D0,{1U,1U,0U}},
{MULU_C0D0,{2U,1U,0U}},
{MULU_C0D0,{3U,1U,0U}},
{MULU_C0D0,{4U,1U,0U}},
{MULU_C0D0,{5U,1U,0U}},
{MULU_C0D0,{6U,1U,0U}},
{MULU_C0D0,{7U,1U,0U}},
{MULU_C0D8,{0U,1U,0U}},
{MULU_C0D8,{1U,1U,0U}},
{MULU_C0D8,{2U,1U,0U}},
{MULU_C0D8,{3U,1U,0U}},
{MULU_C0D8,{4U,1U,0U}},
{MULU_C0D8,{5U,1U,0U}},
{MULU_C0D8,{6U,1U,0U}},
{MULU_C0D8,{7U,1U,0U}},
{MULU_C0E0,{0U,1U,0U}},
{MULU_C0E0,{1U,1U,0U}},
{MULU_C0E0,{2U,1U,0U}},
{MULU_C0E0,{3U,1U,0U}},
{MULU_C0E0,{4U,1U,0U}},
{MULU_C0E0,{5U,1U,0U}},
{MULU_C0E0,{6U,1U,0U}},
{MULU_C0E0,{7U,1U,0U}},
{MULU_C0E8,{0U,1U,0U}},
{MULU_C0E8,{1U,1U,0U}},
{MULU_C0E8,{2U,1U,0U}},
{MULU_C0E8,{3U,1U,0U}},
{MULU_C0E8,{4U,1U,0U}},
{MULU_C0E8,{5U,1U,0U}},
{MULU_C0E8,{6U,1U,0U}},
{MULU_C0E8,{7U,1U,0U}},
{MULU_C0F0,{0U,1U,0U}},
{MULU_C0F0,{1U,1U,0U}},
{MULU_C0F0,{2U,1U,0U}},
{MULU_C0F0,{3U,1U,0U}},
{MULU_C0F0,{4U,1U,0U}},
{MULU_C0F0,{5U,1U,0U}},
{MULU_C0F0,{6U,1U,0U}},
{MULU_C0F0,{7U,1U,0U}},
{MULU_C0F8,{0U,1U,0U}},
{MULU_C0F9,{0U,1U,0U}},
{MULU_C0FA,{0U,1U,0U}},
{MULU_C0FB,{0U,1U,0U}},
{MULU_C0FC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ABCD_C100,{0U,1U,0U}},
{ABCD_C100,{1U,1U,0U}},
{ABCD_C100,{2U,1U,0U}},
{ABCD_C100,{3U,1U,0U}},
{ABCD_C100,{4U,1U,0U}},
{ABCD_C100,{5U,1U,0U}},
{ABCD_C100,{6U,1U,0U}},
{ABCD_C100,{7U,1U,0U}},
{ABCD_C108,{0U,1U,0U}},
{ABCD_C108,{1U,1U,0U}},
{ABCD_C108,{2U,1U,0U}},
{ABCD_C108,{3U,1U,0U}},
{ABCD_C108,{4U,1U,0U}},
{ABCD_C108,{5U,1U,0U}},
{ABCD_C108,{6U,1U,0U}},
{ABCD_C108,{7U,1U,0U}},
{AND_C110,{0U,1U,0U}},
{AND_C110,{1U,1U,0U}},
{AND_C110,{2U,1U,0U}},
{AND_C110,{3U,1U,0U}},
{AND_C110,{4U,1U,0U}},
{AND_C110,{5U,1U,0U}},
{AND_C110,{6U,1U,0U}},
{AND_C110,{7U,1U,0U}},
{AND_C118,{0U,1U,0U}},
{AND_C118,{1U,1U,0U}},
{AND_C118,{2U,1U,0U}},
{AND_C118,{3U,1U,0U}},
{AND_C118,{4U,1U,0U}},
{AND_C118,{5U,1U,0U}},
{AND_C118,{6U,1U,0U}},
{AND_C118,{7U,1U,0U}},
{AND_C120,{0U,1U,0U}},
{AND_C120,{1U,1U,0U}},
{AND_C120,{2U,1U,0U}},
{AND_C120,{3U,1U,0U}},
{AND_C120,{4U,1U,0U}},
{AND_C120,{5U,1U,0U}},
{AND_C120,{6U,1U,0U}},
{AND_C120,{7U,1U,0U}},
{AND_C128,{0U,1U,0U}},
{AND_C128,{1U,1U,0U}},
{AND_C128,{2U,1U,0U}},
{AND_C128,{3U,1U,0U}},
{AND_C128,{4U,1U,0U}},
{AND_C128,{5U,1U,0U}},
{AND_C128,{6U,1U,0U}},
{AND_C128,{7U,1U,0U}},
{AND_C130,{0U,1U,0U}},
{AND_C130,{1U,1U,0U}},
{AND_C130,{2U,1U,0U}},
{AND_C130,{3U,1U,0U}},
{AND_C130,{4U,1U,0U}},
{AND_C130,{5U,1U,0U}},
{AND_C130,{6U,1U,0U}},
{AND_C130,{7U,1U,0U}},
{AND_C138,{0U,1U,0U}},
{AND_C139,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C140,{1U,0U,0U}},
{EXG_C140,{1U,1U,0U}},
{EXG_C140,{1U,2U,0U}},
{EXG_C140,{1U,3U,0U}},
{EXG_C140,{1U,4U,0U}},
{EXG_C140,{1U,5U,0U}},
{EXG_C140,{1U,6U,0U}},
{EXG_C140,{1U,7U,0U}},
{EXG_C148,{1U,0U,0U}},
{EXG_C148,{1U,1U,0U}},
{EXG_C148,{1U,2U,0U}},
{EXG_C148,{1U,3U,0U}},
{EXG_C148,{1U,4U,0U}},
{EXG_C148,{1U,5U,0U}},
{EXG_C148,{1U,6U,0U}},
{EXG_C148,{1U,7U,0U}},
{AND_C150,{0U,1U,0U}},
{AND_C150,{1U,1U,0U}},
{AND_C150,{2U,1U,0U}},
{AND_C150,{3U,1U,0U}},
{AND_C150,{4U,1U,0U}},
{AND_C150,{5U,1U,0U}},
{AND_C150,{6U,1U,0U}},
{AND_C150,{7U,1U,0U}},
{AND_C158,{0U,1U,0U}},
{AND_C158,{1U,1U,0U}},
{AND_C158,{2U,1U,0U}},
{AND_C158,{3U,1U,0U}},
{AND_C158,{4U,1U,0U}},
{AND_C158,{5U,1U,0U}},
{AND_C158,{6U,1U,0U}},
{AND_C158,{7U,1U,0U}},
{AND_C160,{0U,1U,0U}},
{AND_C160,{1U,1U,0U}},
{AND_C160,{2U,1U,0U}},
{AND_C160,{3U,1U,0U}},
{AND_C160,{4U,1U,0U}},
{AND_C160,{5U,1U,0U}},
{AND_C160,{6U,1U,0U}},
{AND_C160,{7U,1U,0U}},
{AND_C168,{0U,1U,0U}},
{AND_C168,{1U,1U,0U}},
{AND_C168,{2U,1U,0U}},
{AND_C168,{3U,1U,0U}},
{AND_C168,{4U,1U,0U}},
{AND_C168,{5U,1U,0U}},
{AND_C168,{6U,1U,0U}},
{AND_C168,{7U,1U,0U}},
{AND_C170,{0U,1U,0U}},
{AND_C170,{1U,1U,0U}},
{AND_C170,{2U,1U,0U}},
{AND_C170,{3U,1U,0U}},
{AND_C170,{4U,1U,0U}},
{AND_C170,{5U,1U,0U}},
{AND_C170,{6U,1U,0U}},
{AND_C170,{7U,1U,0U}},
{AND_C178,{0U,1U,0U}},
{AND_C179,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C188,{1U,0U,0U}},
{EXG_C188,{1U,1U,0U}},
{EXG_C188,{1U,2U,0U}},
{EXG_C188,{1U,3U,0U}},
{EXG_C188,{1U,4U,0U}},
{EXG_C188,{1U,5U,0U}},
{EXG_C188,{1U,6U,0U}},
{EXG_C188,{1U,7U,0U}},
{AND_C190,{0U,1U,0U}},
{AND_C190,{1U,1U,0U}},
{AND_C190,{2U,1U,0U}},
{AND_C190,{3U,1U,0U}},
{AND_C190,{4U,1U,0U}},
{AND_C190,{5U,1U,0U}},
{AND_C190,{6U,1U,0U}},
{AND_C190,{7U,1U,0U}},
{AND_C198,{0U,1U,0U}},
{AND_C198,{1U,1U,0U}},
{AND_C198,{2U,1U,0U}},
{AND_C198,{3U,1U,0U}},
{AND_C198,{4U,1U,0U}},
{AND_C198,{5U,1U,0U}},
{AND_C198,{6U,1U,0U}},
{AND_C198,{7U,1U,0U}},
{AND_C1A0,{0U,1U,0U}},
{AND_C1A0,{1U,1U,0U}},
{AND_C1A0,{2U,1U,0U}},
{AND_C1A0,{3U,1U,0U}},
{AND_C1A0,{4U,1U,0U}},
{AND_C1A0,{5U,1U,0U}},
{AND_C1A0,{6U,1U,0U}},
{AND_C1A0,{7U,1U,0U}},
{AND_C1A8,{0U,1U,0U}},
{AND_C1A8,{1U,1U,0U}},
{AND_C1A8,{2U,1U,0U}},
{AND_C1A8,{3U,1U,0U}},
{AND_C1A8,{4U,1U,0U}},
{AND_C1A8,{5U,1U,0U}},
{AND_C1A8,{6U,1U,0U}},
{AND_C1A8,{7U,1U,0U}},
{AND_C1B0,{0U,1U,0U}},
{AND_C1B0,{1U,1U,0U}},
{AND_C1B0,{2U,1U,0U}},
{AND_C1B0,{3U,1U,0U}},
{AND_C1B0,{4U,1U,0U}},
{AND_C1B0,{5U,1U,0U}},
{AND_C1B0,{6U,1U,0U}},
{AND_C1B0,{7U,1U,0U}},
{AND_C1B8,{0U,1U,0U}},
{AND_C1B9,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1C0,{0U,1U,0U}},
{MULS_C1C0,{1U,1U,0U}},
{MULS_C1C0,{2U,1U,0U}},
{MULS_C1C0,{3U,1U,0U}},
{MULS_C1C0,{4U,1U,0U}},
{MULS_C1C0,{5U,1U,0U}},
{MULS_C1C0,{6U,1U,0U}},
{MULS_C1C0,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1D0,{0U,1U,0U}},
{MULS_C1D0,{1U,1U,0U}},
{MULS_C1D0,{2U,1U,0U}},
{MULS_C1D0,{3U,1U,0U}},
{MULS_C1D0,{4U,1U,0U}},
{MULS_C1D0,{5U,1U,0U}},
{MULS_C1D0,{6U,1U,0U}},
{MULS_C1D0,{7U,1U,0U}},
{MULS_C1D8,{0U,1U,0U}},
{MULS_C1D8,{1U,1U,0U}},
{MULS_C1D8,{2U,1U,0U}},
{MULS_C1D8,{3U,1U,0U}},
{MULS_C1D8,{4U,1U,0U}},
{MULS_C1D8,{5U,1U,0U}},
{MULS_C1D8,{6U,1U,0U}},
{MULS_C1D8,{7U,1U,0U}},
{MULS_C1E0,{0U,1U,0U}},
{MULS_C1E0,{1U,1U,0U}},
{MULS_C1E0,{2U,1U,0U}},
{MULS_C1E0,{3U,1U,0U}},
{MULS_C1E0,{4U,1U,0U}},
{MULS_C1E0,{5U,1U,0U}},
{MULS_C1E0,{6U,1U,0U}},
{MULS_C1E0,{7U,1U,0U}},
{MULS_C1E8,{0U,1U,0U}},
{MULS_C1E8,{1U,1U,0U}},
{MULS_C1E8,{2U,1U,0U}},
{MULS_C1E8,{3U,1U,0U}},
{MULS_C1E8,{4U,1U,0U}},
{MULS_C1E8,{5U,1U,0U}},
{MULS_C1E8,{6U,1U,0U}},
{MULS_C1E8,{7U,1U,0U}},
{MULS_C1F0,{0U,1U,0U}},
{MULS_C1F0,{1U,1U,0U}},
{MULS_C1F0,{2U,1U,0U}},
{MULS_C1F0,{3U,1U,0U}},
{MULS_C1F0,{4U,1U,0U}},
{MULS_C1F0,{5U,1U,0U}},
{MULS_C1F0,{6U,1U,0U}},
{MULS_C1F0,{7U,1U,0U}},
{MULS_C1F8,{0U,1U,0U}},
{MULS_C1F9,{0U,1U,0U}},
{MULS_C1FA,{0U,1U,0U}},
{MULS_C1FB,{0U,1U,0U}},
{MULS_C1FC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C000,{0U,2U,0U}},
{AND_C000,{1U,2U,0U}},
{AND_C000,{2U,2U,0U}},
{AND_C000,{3U,2U,0U}},
{AND_C000,{4U,2U,0U}},
{AND_C000,{5U,2U,0U}},
{AND_C000,{6U,2U,0U}},
{AND_C000,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C010,{0U,2U,0U}},
{AND_C010,{1U,2U,0U}},
{AND_C010,{2U,2U,0U}},
{AND_C010,{3U,2U,0U}},
{AND_C010,{4U,2U,0U}},
{AND_C010,{5U,2U,0U}},
{AND_C010,{6U,2U,0U}},
{AND_C010,{7U,2U,0U}},
{AND_C018,{0U,2U,0U}},
{AND_C018,{1U,2U,0U}},
{AND_C018,{2U,2U,0U}},
{AND_C018,{3U,2U,0U}},
{AND_C018,{4U,2U,0U}},
{AND_C018,{5U,2U,0U}},
{AND_C018,{6U,2U,0U}},
{AND_C018,{7U,2U,0U}},
{AND_C020,{0U,2U,0U}},
{AND_C020,{1U,2U,0U}},
{AND_C020,{2U,2U,0U}},
{AND_C020,{3U,2U,0U}},
{AND_C020,{4U,2U,0U}},
{AND_C020,{5U,2U,0U}},
{AND_C020,{6U,2U,0U}},
{AND_C020,{7U,2U,0U}},
{AND_C028,{0U,2U,0U}},
{AND_C028,{1U,2U,0U}},
{AND_C028,{2U,2U,0U}},
{AND_C028,{3U,2U,0U}},
{AND_C028,{4U,2U,0U}},
{AND_C028,{5U,2U,0U}},
{AND_C028,{6U,2U,0U}},
{AND_C028,{7U,2U,0U}},
{AND_C030,{0U,2U,0U}},
{AND_C030,{1U,2U,0U}},
{AND_C030,{2U,2U,0U}},
{AND_C030,{3U,2U,0U}},
{AND_C030,{4U,2U,0U}},
{AND_C030,{5U,2U,0U}},
{AND_C030,{6U,2U,0U}},
{AND_C030,{7U,2U,0U}},
{AND_C038,{0U,2U,0U}},
{AND_C039,{0U,2U,0U}},
{AND_C03A,{0U,2U,0U}},
{AND_C03B,{0U,2U,0U}},
{AND_C03C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C040,{0U,2U,0U}},
{AND_C040,{1U,2U,0U}},
{AND_C040,{2U,2U,0U}},
{AND_C040,{3U,2U,0U}},
{AND_C040,{4U,2U,0U}},
{AND_C040,{5U,2U,0U}},
{AND_C040,{6U,2U,0U}},
{AND_C040,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C050,{0U,2U,0U}},
{AND_C050,{1U,2U,0U}},
{AND_C050,{2U,2U,0U}},
{AND_C050,{3U,2U,0U}},
{AND_C050,{4U,2U,0U}},
{AND_C050,{5U,2U,0U}},
{AND_C050,{6U,2U,0U}},
{AND_C050,{7U,2U,0U}},
{AND_C058,{0U,2U,0U}},
{AND_C058,{1U,2U,0U}},
{AND_C058,{2U,2U,0U}},
{AND_C058,{3U,2U,0U}},
{AND_C058,{4U,2U,0U}},
{AND_C058,{5U,2U,0U}},
{AND_C058,{6U,2U,0U}},
{AND_C058,{7U,2U,0U}},
{AND_C060,{0U,2U,0U}},
{AND_C060,{1U,2U,0U}},
{AND_C060,{2U,2U,0U}},
{AND_C060,{3U,2U,0U}},
{AND_C060,{4U,2U,0U}},
{AND_C060,{5U,2U,0U}},
{AND_C060,{6U,2U,0U}},
{AND_C060,{7U,2U,0U}},
{AND_C068,{0U,2U,0U}},
{AND_C068,{1U,2U,0U}},
{AND_C068,{2U,2U,0U}},
{AND_C068,{3U,2U,0U}},
{AND_C068,{4U,2U,0U}},
{AND_C068,{5U,2U,0U}},
{AND_C068,{6U,2U,0U}},
{AND_C068,{7U,2U,0U}},
{AND_C070,{0U,2U,0U}},
{AND_C070,{1U,2U,0U}},
{AND_C070,{2U,2U,0U}},
{AND_C070,{3U,2U,0U}},
{AND_C070,{4U,2U,0U}},
{AND_C070,{5U,2U,0U}},
{AND_C070,{6U,2U,0U}},
{AND_C070,{7U,2U,0U}},
{AND_C078,{0U,2U,0U}},
{AND_C079,{0U,2U,0U}},
{AND_C07A,{0U,2U,0U}},
{AND_C07B,{0U,2U,0U}},
{AND_C07C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C080,{0U,2U,0U}},
{AND_C080,{1U,2U,0U}},
{AND_C080,{2U,2U,0U}},
{AND_C080,{3U,2U,0U}},
{AND_C080,{4U,2U,0U}},
{AND_C080,{5U,2U,0U}},
{AND_C080,{6U,2U,0U}},
{AND_C080,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C090,{0U,2U,0U}},
{AND_C090,{1U,2U,0U}},
{AND_C090,{2U,2U,0U}},
{AND_C090,{3U,2U,0U}},
{AND_C090,{4U,2U,0U}},
{AND_C090,{5U,2U,0U}},
{AND_C090,{6U,2U,0U}},
{AND_C090,{7U,2U,0U}},
{AND_C098,{0U,2U,0U}},
{AND_C098,{1U,2U,0U}},
{AND_C098,{2U,2U,0U}},
{AND_C098,{3U,2U,0U}},
{AND_C098,{4U,2U,0U}},
{AND_C098,{5U,2U,0U}},
{AND_C098,{6U,2U,0U}},
{AND_C098,{7U,2U,0U}},
{AND_C0A0,{0U,2U,0U}},
{AND_C0A0,{1U,2U,0U}},
{AND_C0A0,{2U,2U,0U}},
{AND_C0A0,{3U,2U,0U}},
{AND_C0A0,{4U,2U,0U}},
{AND_C0A0,{5U,2U,0U}},
{AND_C0A0,{6U,2U,0U}},
{AND_C0A0,{7U,2U,0U}},
{AND_C0A8,{0U,2U,0U}},
{AND_C0A8,{1U,2U,0U}},
{AND_C0A8,{2U,2U,0U}},
{AND_C0A8,{3U,2U,0U}},
{AND_C0A8,{4U,2U,0U}},
{AND_C0A8,{5U,2U,0U}},
{AND_C0A8,{6U,2U,0U}},
{AND_C0A8,{7U,2U,0U}},
{AND_C0B0,{0U,2U,0U}},
{AND_C0B0,{1U,2U,0U}},
{AND_C0B0,{2U,2U,0U}},
{AND_C0B0,{3U,2U,0U}},
{AND_C0B0,{4U,2U,0U}},
{AND_C0B0,{5U,2U,0U}},
{AND_C0B0,{6U,2U,0U}},
{AND_C0B0,{7U,2U,0U}},
{AND_C0B8,{0U,2U,0U}},
{AND_C0B9,{0U,2U,0U}},
{AND_C0BA,{0U,2U,0U}},
{AND_C0BB,{0U,2U,0U}},
{AND_C0BC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0C0,{0U,2U,0U}},
{MULU_C0C0,{1U,2U,0U}},
{MULU_C0C0,{2U,2U,0U}},
{MULU_C0C0,{3U,2U,0U}},
{MULU_C0C0,{4U,2U,0U}},
{MULU_C0C0,{5U,2U,0U}},
{MULU_C0C0,{6U,2U,0U}},
{MULU_C0C0,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0D0,{0U,2U,0U}},
{MULU_C0D0,{1U,2U,0U}},
{MULU_C0D0,{2U,2U,0U}},
{MULU_C0D0,{3U,2U,0U}},
{MULU_C0D0,{4U,2U,0U}},
{MULU_C0D0,{5U,2U,0U}},
{MULU_C0D0,{6U,2U,0U}},
{MULU_C0D0,{7U,2U,0U}},
{MULU_C0D8,{0U,2U,0U}},
{MULU_C0D8,{1U,2U,0U}},
{MULU_C0D8,{2U,2U,0U}},
{MULU_C0D8,{3U,2U,0U}},
{MULU_C0D8,{4U,2U,0U}},
{MULU_C0D8,{5U,2U,0U}},
{MULU_C0D8,{6U,2U,0U}},
{MULU_C0D8,{7U,2U,0U}},
{MULU_C0E0,{0U,2U,0U}},
{MULU_C0E0,{1U,2U,0U}},
{MULU_C0E0,{2U,2U,0U}},
{MULU_C0E0,{3U,2U,0U}},
{MULU_C0E0,{4U,2U,0U}},
{MULU_C0E0,{5U,2U,0U}},
{MULU_C0E0,{6U,2U,0U}},
{MULU_C0E0,{7U,2U,0U}},
{MULU_C0E8,{0U,2U,0U}},
{MULU_C0E8,{1U,2U,0U}},
{MULU_C0E8,{2U,2U,0U}},
{MULU_C0E8,{3U,2U,0U}},
{MULU_C0E8,{4U,2U,0U}},
{MULU_C0E8,{5U,2U,0U}},
{MULU_C0E8,{6U,2U,0U}},
{MULU_C0E8,{7U,2U,0U}},
{MULU_C0F0,{0U,2U,0U}},
{MULU_C0F0,{1U,2U,0U}},
{MULU_C0F0,{2U,2U,0U}},
{MULU_C0F0,{3U,2U,0U}},
{MULU_C0F0,{4U,2U,0U}},
{MULU_C0F0,{5U,2U,0U}},
{MULU_C0F0,{6U,2U,0U}},
{MULU_C0F0,{7U,2U,0U}},
{MULU_C0F8,{0U,2U,0U}},
{MULU_C0F9,{0U,2U,0U}},
{MULU_C0FA,{0U,2U,0U}},
{MULU_C0FB,{0U,2U,0U}},
{MULU_C0FC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ABCD_C100,{0U,2U,0U}},
{ABCD_C100,{1U,2U,0U}},
{ABCD_C100,{2U,2U,0U}},
{ABCD_C100,{3U,2U,0U}},
{ABCD_C100,{4U,2U,0U}},
{ABCD_C100,{5U,2U,0U}},
{ABCD_C100,{6U,2U,0U}},
{ABCD_C100,{7U,2U,0U}},
{ABCD_C108,{0U,2U,0U}},
{ABCD_C108,{1U,2U,0U}},
{ABCD_C108,{2U,2U,0U}},
{ABCD_C108,{3U,2U,0U}},
{ABCD_C108,{4U,2U,0U}},
{ABCD_C108,{5U,2U,0U}},
{ABCD_C108,{6U,2U,0U}},
{ABCD_C108,{7U,2U,0U}},
{AND_C110,{0U,2U,0U}},
{AND_C110,{1U,2U,0U}},
{AND_C110,{2U,2U,0U}},
{AND_C110,{3U,2U,0U}},
{AND_C110,{4U,2U,0U}},
{AND_C110,{5U,2U,0U}},
{AND_C110,{6U,2U,0U}},
{AND_C110,{7U,2U,0U}},
{AND_C118,{0U,2U,0U}},
{AND_C118,{1U,2U,0U}},
{AND_C118,{2U,2U,0U}},
{AND_C118,{3U,2U,0U}},
{AND_C118,{4U,2U,0U}},
{AND_C118,{5U,2U,0U}},
{AND_C118,{6U,2U,0U}},
{AND_C118,{7U,2U,0U}},
{AND_C120,{0U,2U,0U}},
{AND_C120,{1U,2U,0U}},
{AND_C120,{2U,2U,0U}},
{AND_C120,{3U,2U,0U}},
{AND_C120,{4U,2U,0U}},
{AND_C120,{5U,2U,0U}},
{AND_C120,{6U,2U,0U}},
{AND_C120,{7U,2U,0U}},
{AND_C128,{0U,2U,0U}},
{AND_C128,{1U,2U,0U}},
{AND_C128,{2U,2U,0U}},
{AND_C128,{3U,2U,0U}},
{AND_C128,{4U,2U,0U}},
{AND_C128,{5U,2U,0U}},
{AND_C128,{6U,2U,0U}},
{AND_C128,{7U,2U,0U}},
{AND_C130,{0U,2U,0U}},
{AND_C130,{1U,2U,0U}},
{AND_C130,{2U,2U,0U}},
{AND_C130,{3U,2U,0U}},
{AND_C130,{4U,2U,0U}},
{AND_C130,{5U,2U,0U}},
{AND_C130,{6U,2U,0U}},
{AND_C130,{7U,2U,0U}},
{AND_C138,{0U,2U,0U}},
{AND_C139,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C140,{2U,0U,0U}},
{EXG_C140,{2U,1U,0U}},
{EXG_C140,{2U,2U,0U}},
{EXG_C140,{2U,3U,0U}},
{EXG_C140,{2U,4U,0U}},
{EXG_C140,{2U,5U,0U}},
{EXG_C140,{2U,6U,0U}},
{EXG_C140,{2U,7U,0U}},
{EXG_C148,{2U,0U,0U}},
{EXG_C148,{2U,1U,0U}},
{EXG_C148,{2U,2U,0U}},
{EXG_C148,{2U,3U,0U}},
{EXG_C148,{2U,4U,0U}},
{EXG_C148,{2U,5U,0U}},
{EXG_C148,{2U,6U,0U}},
{EXG_C148,{2U,7U,0U}},
{AND_C150,{0U,2U,0U}},
{AND_C150,{1U,2U,0U}},
{AND_C150,{2U,2U,0U}},
{AND_C150,{3U,2U,0U}},
{AND_C150,{4U,2U,0U}},
{AND_C150,{5U,2U,0U}},
{AND_C150,{6U,2U,0U}},
{AND_C150,{7U,2U,0U}},
{AND_C158,{0U,2U,0U}},
{AND_C158,{1U,2U,0U}},
{AND_C158,{2U,2U,0U}},
{AND_C158,{3U,2U,0U}},
{AND_C158,{4U,2U,0U}},
{AND_C158,{5U,2U,0U}},
{AND_C158,{6U,2U,0U}},
{AND_C158,{7U,2U,0U}},
{AND_C160,{0U,2U,0U}},
{AND_C160,{1U,2U,0U}},
{AND_C160,{2U,2U,0U}},
{AND_C160,{3U,2U,0U}},
{AND_C160,{4U,2U,0U}},
{AND_C160,{5U,2U,0U}},
{AND_C160,{6U,2U,0U}},
{AND_C160,{7U,2U,0U}},
{AND_C168,{0U,2U,0U}},
{AND_C168,{1U,2U,0U}},
{AND_C168,{2U,2U,0U}},
{AND_C168,{3U,2U,0U}},
{AND_C168,{4U,2U,0U}},
{AND_C168,{5U,2U,0U}},
{AND_C168,{6U,2U,0U}},
{AND_C168,{7U,2U,0U}},
{AND_C170,{0U,2U,0U}},
{AND_C170,{1U,2U,0U}},
{AND_C170,{2U,2U,0U}},
{AND_C170,{3U,2U,0U}},
{AND_C170,{4U,2U,0U}},
{AND_C170,{5U,2U,0U}},
{AND_C170,{6U,2U,0U}},
{AND_C170,{7U,2U,0U}},
{AND_C178,{0U,2U,0U}},
{AND_C179,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C188,{2U,0U,0U}},
{EXG_C188,{2U,1U,0U}},
{EXG_C188,{2U,2U,0U}},
{EXG_C188,{2U,3U,0U}},
{EXG_C188,{2U,4U,0U}},
{EXG_C188,{2U,5U,0U}},
{EXG_C188,{2U,6U,0U}},
{EXG_C188,{2U,7U,0U}},
{AND_C190,{0U,2U,0U}},
{AND_C190,{1U,2U,0U}},
{AND_C190,{2U,2U,0U}},
{AND_C190,{3U,2U,0U}},
{AND_C190,{4U,2U,0U}},
{AND_C190,{5U,2U,0U}},
{AND_C190,{6U,2U,0U}},
{AND_C190,{7U,2U,0U}},
{AND_C198,{0U,2U,0U}},
{AND_C198,{1U,2U,0U}},
{AND_C198,{2U,2U,0U}},
{AND_C198,{3U,2U,0U}},
{AND_C198,{4U,2U,0U}},
{AND_C198,{5U,2U,0U}},
{AND_C198,{6U,2U,0U}},
{AND_C198,{7U,2U,0U}},
{AND_C1A0,{0U,2U,0U}},
{AND_C1A0,{1U,2U,0U}},
{AND_C1A0,{2U,2U,0U}},
{AND_C1A0,{3U,2U,0U}},
{AND_C1A0,{4U,2U,0U}},
{AND_C1A0,{5U,2U,0U}},
{AND_C1A0,{6U,2U,0U}},
{AND_C1A0,{7U,2U,0U}},
{AND_C1A8,{0U,2U,0U}},
{AND_C1A8,{1U,2U,0U}},
{AND_C1A8,{2U,2U,0U}},
{AND_C1A8,{3U,2U,0U}},
{AND_C1A8,{4U,2U,0U}},
{AND_C1A8,{5U,2U,0U}},
{AND_C1A8,{6U,2U,0U}},
{AND_C1A8,{7U,2U,0U}},
{AND_C1B0,{0U,2U,0U}},
{AND_C1B0,{1U,2U,0U}},
{AND_C1B0,{2U,2U,0U}},
{AND_C1B0,{3U,2U,0U}},
{AND_C1B0,{4U,2U,0U}},
{AND_C1B0,{5U,2U,0U}},
{AND_C1B0,{6U,2U,0U}},
{AND_C1B0,{7U,2U,0U}},
{AND_C1B8,{0U,2U,0U}},
{AND_C1B9,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1C0,{0U,2U,0U}},
{MULS_C1C0,{1U,2U,0U}},
{MULS_C1C0,{2U,2U,0U}},
{MULS_C1C0,{3U,2U,0U}},
{MULS_C1C0,{4U,2U,0U}},
{MULS_C1C0,{5U,2U,0U}},
{MULS_C1C0,{6U,2U,0U}},
{MULS_C1C0,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1D0,{0U,2U,0U}},
{MULS_C1D0,{1U,2U,0U}},
{MULS_C1D0,{2U,2U,0U}},
{MULS_C1D0,{3U,2U,0U}},
{MULS_C1D0,{4U,2U,0U}},
{MULS_C1D0,{5U,2U,0U}},
{MULS_C1D0,{6U,2U,0U}},
{MULS_C1D0,{7U,2U,0U}},
{MULS_C1D8,{0U,2U,0U}},
{MULS_C1D8,{1U,2U,0U}},
{MULS_C1D8,{2U,2U,0U}},
{MULS_C1D8,{3U,2U,0U}},
{MULS_C1D8,{4U,2U,0U}},
{MULS_C1D8,{5U,2U,0U}},
{MULS_C1D8,{6U,2U,0U}},
{MULS_C1D8,{7U,2U,0U}},
{MULS_C1E0,{0U,2U,0U}},
{MULS_C1E0,{1U,2U,0U}},
{MULS_C1E0,{2U,2U,0U}},
{MULS_C1E0,{3U,2U,0U}},
{MULS_C1E0,{4U,2U,0U}},
{MULS_C1E0,{5U,2U,0U}},
{MULS_C1E0,{6U,2U,0U}},
{MULS_C1E0,{7U,2U,0U}},
{MULS_C1E8,{0U,2U,0U}},
{MULS_C1E8,{1U,2U,0U}},
{MULS_C1E8,{2U,2U,0U}},
{MULS_C1E8,{3U,2U,0U}},
{MULS_C1E8,{4U,2U,0U}},
{MULS_C1E8,{5U,2U,0U}},
{MULS_C1E8,{6U,2U,0U}},
{MULS_C1E8,{7U,2U,0U}},
{MULS_C1F0,{0U,2U,0U}},
{MULS_C1F0,{1U,2U,0U}},
{MULS_C1F0,{2U,2U,0U}},
{MULS_C1F0,{3U,2U,0U}},
{MULS_C1F0,{4U,2U,0U}},
{MULS_C1F0,{5U,2U,0U}},
{MULS_C1F0,{6U,2U,0U}},
{MULS_C1F0,{7U,2U,0U}},
{MULS_C1F8,{0U,2U,0U}},
{MULS_C1F9,{0U,2U,0U}},
{MULS_C1FA,{0U,2U,0U}},
{MULS_C1FB,{0U,2U,0U}},
{MULS_C1FC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C000,{0U,3U,0U}},
{AND_C000,{1U,3U,0U}},
{AND_C000,{2U,3U,0U}},
{AND_C000,{3U,3U,0U}},
{AND_C000,{4U,3U,0U}},
{AND_C000,{5U,3U,0U}},
{AND_C000,{6U,3U,0U}},
{AND_C000,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C010,{0U,3U,0U}},
{AND_C010,{1U,3U,0U}},
{AND_C010,{2U,3U,0U}},
{AND_C010,{3U,3U,0U}},
{AND_C010,{4U,3U,0U}},
{AND_C010,{5U,3U,0U}},
{AND_C010,{6U,3U,0U}},
{AND_C010,{7U,3U,0U}},
{AND_C018,{0U,3U,0U}},
{AND_C018,{1U,3U,0U}},
{AND_C018,{2U,3U,0U}},
{AND_C018,{3U,3U,0U}},
{AND_C018,{4U,3U,0U}},
{AND_C018,{5U,3U,0U}},
{AND_C018,{6U,3U,0U}},
{AND_C018,{7U,3U,0U}},
{AND_C020,{0U,3U,0U}},
{AND_C020,{1U,3U,0U}},
{AND_C020,{2U,3U,0U}},
{AND_C020,{3U,3U,0U}},
{AND_C020,{4U,3U,0U}},
{AND_C020,{5U,3U,0U}},
{AND_C020,{6U,3U,0U}},
{AND_C020,{7U,3U,0U}},
{AND_C028,{0U,3U,0U}},
{AND_C028,{1U,3U,0U}},
{AND_C028,{2U,3U,0U}},
{AND_C028,{3U,3U,0U}},
{AND_C028,{4U,3U,0U}},
{AND_C028,{5U,3U,0U}},
{AND_C028,{6U,3U,0U}},
{AND_C028,{7U,3U,0U}},
{AND_C030,{0U,3U,0U}},
{AND_C030,{1U,3U,0U}},
{AND_C030,{2U,3U,0U}},
{AND_C030,{3U,3U,0U}},
{AND_C030,{4U,3U,0U}},
{AND_C030,{5U,3U,0U}},
{AND_C030,{6U,3U,0U}},
{AND_C030,{7U,3U,0U}},
{AND_C038,{0U,3U,0U}},
{AND_C039,{0U,3U,0U}},
{AND_C03A,{0U,3U,0U}},
{AND_C03B,{0U,3U,0U}},
{AND_C03C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C040,{0U,3U,0U}},
{AND_C040,{1U,3U,0U}},
{AND_C040,{2U,3U,0U}},
{AND_C040,{3U,3U,0U}},
{AND_C040,{4U,3U,0U}},
{AND_C040,{5U,3U,0U}},
{AND_C040,{6U,3U,0U}},
{AND_C040,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C050,{0U,3U,0U}},
{AND_C050,{1U,3U,0U}},
{AND_C050,{2U,3U,0U}},
{AND_C050,{3U,3U,0U}},
{AND_C050,{4U,3U,0U}},
{AND_C050,{5U,3U,0U}},
{AND_C050,{6U,3U,0U}},
{AND_C050,{7U,3U,0U}},
{AND_C058,{0U,3U,0U}},
{AND_C058,{1U,3U,0U}},
{AND_C058,{2U,3U,0U}},
{AND_C058,{3U,3U,0U}},
{AND_C058,{4U,3U,0U}},
{AND_C058,{5U,3U,0U}},
{AND_C058,{6U,3U,0U}},
{AND_C058,{7U,3U,0U}},
{AND_C060,{0U,3U,0U}},
{AND_C060,{1U,3U,0U}},
{AND_C060,{2U,3U,0U}},
{AND_C060,{3U,3U,0U}},
{AND_C060,{4U,3U,0U}},
{AND_C060,{5U,3U,0U}},
{AND_C060,{6U,3U,0U}},
{AND_C060,{7U,3U,0U}},
{AND_C068,{0U,3U,0U}},
{AND_C068,{1U,3U,0U}},
{AND_C068,{2U,3U,0U}},
{AND_C068,{3U,3U,0U}},
{AND_C068,{4U,3U,0U}},
{AND_C068,{5U,3U,0U}},
{AND_C068,{6U,3U,0U}},
{AND_C068,{7U,3U,0U}},
{AND_C070,{0U,3U,0U}},
{AND_C070,{1U,3U,0U}},
{AND_C070,{2U,3U,0U}},
{AND_C070,{3U,3U,0U}},
{AND_C070,{4U,3U,0U}},
{AND_C070,{5U,3U,0U}},
{AND_C070,{6U,3U,0U}},
{AND_C070,{7U,3U,0U}},
{AND_C078,{0U,3U,0U}},
{AND_C079,{0U,3U,0U}},
{AND_C07A,{0U,3U,0U}},
{AND_C07B,{0U,3U,0U}},
{AND_C07C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C080,{0U,3U,0U}},
{AND_C080,{1U,3U,0U}},
{AND_C080,{2U,3U,0U}},
{AND_C080,{3U,3U,0U}},
{AND_C080,{4U,3U,0U}},
{AND_C080,{5U,3U,0U}},
{AND_C080,{6U,3U,0U}},
{AND_C080,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C090,{0U,3U,0U}},
{AND_C090,{1U,3U,0U}},
{AND_C090,{2U,3U,0U}},
{AND_C090,{3U,3U,0U}},
{AND_C090,{4U,3U,0U}},
{AND_C090,{5U,3U,0U}},
{AND_C090,{6U,3U,0U}},
{AND_C090,{7U,3U,0U}},
{AND_C098,{0U,3U,0U}},
{AND_C098,{1U,3U,0U}},
{AND_C098,{2U,3U,0U}},
{AND_C098,{3U,3U,0U}},
{AND_C098,{4U,3U,0U}},
{AND_C098,{5U,3U,0U}},
{AND_C098,{6U,3U,0U}},
{AND_C098,{7U,3U,0U}},
{AND_C0A0,{0U,3U,0U}},
{AND_C0A0,{1U,3U,0U}},
{AND_C0A0,{2U,3U,0U}},
{AND_C0A0,{3U,3U,0U}},
{AND_C0A0,{4U,3U,0U}},
{AND_C0A0,{5U,3U,0U}},
{AND_C0A0,{6U,3U,0U}},
{AND_C0A0,{7U,3U,0U}},
{AND_C0A8,{0U,3U,0U}},
{AND_C0A8,{1U,3U,0U}},
{AND_C0A8,{2U,3U,0U}},
{AND_C0A8,{3U,3U,0U}},
{AND_C0A8,{4U,3U,0U}},
{AND_C0A8,{5U,3U,0U}},
{AND_C0A8,{6U,3U,0U}},
{AND_C0A8,{7U,3U,0U}},
{AND_C0B0,{0U,3U,0U}},
{AND_C0B0,{1U,3U,0U}},
{AND_C0B0,{2U,3U,0U}},
{AND_C0B0,{3U,3U,0U}},
{AND_C0B0,{4U,3U,0U}},
{AND_C0B0,{5U,3U,0U}},
{AND_C0B0,{6U,3U,0U}},
{AND_C0B0,{7U,3U,0U}},
{AND_C0B8,{0U,3U,0U}},
{AND_C0B9,{0U,3U,0U}},
{AND_C0BA,{0U,3U,0U}},
{AND_C0BB,{0U,3U,0U}},
{AND_C0BC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0C0,{0U,3U,0U}},
{MULU_C0C0,{1U,3U,0U}},
{MULU_C0C0,{2U,3U,0U}},
{MULU_C0C0,{3U,3U,0U}},
{MULU_C0C0,{4U,3U,0U}},
{MULU_C0C0,{5U,3U,0U}},
{MULU_C0C0,{6U,3U,0U}},
{MULU_C0C0,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0D0,{0U,3U,0U}},
{MULU_C0D0,{1U,3U,0U}},
{MULU_C0D0,{2U,3U,0U}},
{MULU_C0D0,{3U,3U,0U}},
{MULU_C0D0,{4U,3U,0U}},
{MULU_C0D0,{5U,3U,0U}},
{MULU_C0D0,{6U,3U,0U}},
{MULU_C0D0,{7U,3U,0U}},
{MULU_C0D8,{0U,3U,0U}},
{MULU_C0D8,{1U,3U,0U}},
{MULU_C0D8,{2U,3U,0U}},
{MULU_C0D8,{3U,3U,0U}},
{MULU_C0D8,{4U,3U,0U}},
{MULU_C0D8,{5U,3U,0U}},
{MULU_C0D8,{6U,3U,0U}},
{MULU_C0D8,{7U,3U,0U}},
{MULU_C0E0,{0U,3U,0U}},
{MULU_C0E0,{1U,3U,0U}},
{MULU_C0E0,{2U,3U,0U}},
{MULU_C0E0,{3U,3U,0U}},
{MULU_C0E0,{4U,3U,0U}},
{MULU_C0E0,{5U,3U,0U}},
{MULU_C0E0,{6U,3U,0U}},
{MULU_C0E0,{7U,3U,0U}},
{MULU_C0E8,{0U,3U,0U}},
{MULU_C0E8,{1U,3U,0U}},
{MULU_C0E8,{2U,3U,0U}},
{MULU_C0E8,{3U,3U,0U}},
{MULU_C0E8,{4U,3U,0U}},
{MULU_C0E8,{5U,3U,0U}},
{MULU_C0E8,{6U,3U,0U}},
{MULU_C0E8,{7U,3U,0U}},
{MULU_C0F0,{0U,3U,0U}},
{MULU_C0F0,{1U,3U,0U}},
{MULU_C0F0,{2U,3U,0U}},
{MULU_C0F0,{3U,3U,0U}},
{MULU_C0F0,{4U,3U,0U}},
{MULU_C0F0,{5U,3U,0U}},
{MULU_C0F0,{6U,3U,0U}},
{MULU_C0F0,{7U,3U,0U}},
{MULU_C0F8,{0U,3U,0U}},
{MULU_C0F9,{0U,3U,0U}},
{MULU_C0FA,{0U,3U,0U}},
{MULU_C0FB,{0U,3U,0U}},
{MULU_C0FC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ABCD_C100,{0U,3U,0U}},
{ABCD_C100,{1U,3U,0U}},
{ABCD_C100,{2U,3U,0U}},
{ABCD_C100,{3U,3U,0U}},
{ABCD_C100,{4U,3U,0U}},
{ABCD_C100,{5U,3U,0U}},
{ABCD_C100,{6U,3U,0U}},
{ABCD_C100,{7U,3U,0U}},
{ABCD_C108,{0U,3U,0U}},
{ABCD_C108,{1U,3U,0U}},
{ABCD_C108,{2U,3U,0U}},
{ABCD_C108,{3U,3U,0U}},
{ABCD_C108,{4U,3U,0U}},
{ABCD_C108,{5U,3U,0U}},
{ABCD_C108,{6U,3U,0U}},
{ABCD_C108,{7U,3U,0U}},
{AND_C110,{0U,3U,0U}},
{AND_C110,{1U,3U,0U}},
{AND_C110,{2U,3U,0U}},
{AND_C110,{3U,3U,0U}},
{AND_C110,{4U,3U,0U}},
{AND_C110,{5U,3U,0U}},
{AND_C110,{6U,3U,0U}},
{AND_C110,{7U,3U,0U}},
{AND_C118,{0U,3U,0U}},
{AND_C118,{1U,3U,0U}},
{AND_C118,{2U,3U,0U}},
{AND_C118,{3U,3U,0U}},
{AND_C118,{4U,3U,0U}},
{AND_C118,{5U,3U,0U}},
{AND_C118,{6U,3U,0U}},
{AND_C118,{7U,3U,0U}},
{AND_C120,{0U,3U,0U}},
{AND_C120,{1U,3U,0U}},
{AND_C120,{2U,3U,0U}},
{AND_C120,{3U,3U,0U}},
{AND_C120,{4U,3U,0U}},
{AND_C120,{5U,3U,0U}},
{AND_C120,{6U,3U,0U}},
{AND_C120,{7U,3U,0U}},
{AND_C128,{0U,3U,0U}},
{AND_C128,{1U,3U,0U}},
{AND_C128,{2U,3U,0U}},
{AND_C128,{3U,3U,0U}},
{AND_C128,{4U,3U,0U}},
{AND_C128,{5U,3U,0U}},
{AND_C128,{6U,3U,0U}},
{AND_C128,{7U,3U,0U}},
{AND_C130,{0U,3U,0U}},
{AND_C130,{1U,3U,0U}},
{AND_C130,{2U,3U,0U}},
{AND_C130,{3U,3U,0U}},
{AND_C130,{4U,3U,0U}},
{AND_C130,{5U,3U,0U}},
{AND_C130,{6U,3U,0U}},
{AND_C130,{7U,3U,0U}},
{AND_C138,{0U,3U,0U}},
{AND_C139,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C140,{3U,0U,0U}},
{EXG_C140,{3U,1U,0U}},
{EXG_C140,{3U,2U,0U}},
{EXG_C140,{3U,3U,0U}},
{EXG_C140,{3U,4U,0U}},
{EXG_C140,{3U,5U,0U}},
{EXG_C140,{3U,6U,0U}},
{EXG_C140,{3U,7U,0U}},
{EXG_C148,{3U,0U,0U}},
{EXG_C148,{3U,1U,0U}},
{EXG_C148,{3U,2U,0U}},
{EXG_C148,{3U,3U,0U}},
{EXG_C148,{3U,4U,0U}},
{EXG_C148,{3U,5U,0U}},
{EXG_C148,{3U,6U,0U}},
{EXG_C148,{3U,7U,0U}},
{AND_C150,{0U,3U,0U}},
{AND_C150,{1U,3U,0U}},
{AND_C150,{2U,3U,0U}},
{AND_C150,{3U,3U,0U}},
{AND_C150,{4U,3U,0U}},
{AND_C150,{5U,3U,0U}},
{AND_C150,{6U,3U,0U}},
{AND_C150,{7U,3U,0U}},
{AND_C158,{0U,3U,0U}},
{AND_C158,{1U,3U,0U}},
{AND_C158,{2U,3U,0U}},
{AND_C158,{3U,3U,0U}},
{AND_C158,{4U,3U,0U}},
{AND_C158,{5U,3U,0U}},
{AND_C158,{6U,3U,0U}},
{AND_C158,{7U,3U,0U}},
{AND_C160,{0U,3U,0U}},
{AND_C160,{1U,3U,0U}},
{AND_C160,{2U,3U,0U}},
{AND_C160,{3U,3U,0U}},
{AND_C160,{4U,3U,0U}},
{AND_C160,{5U,3U,0U}},
{AND_C160,{6U,3U,0U}},
{AND_C160,{7U,3U,0U}},
{AND_C168,{0U,3U,0U}},
{AND_C168,{1U,3U,0U}},
{AND_C168,{2U,3U,0U}},
{AND_C168,{3U,3U,0U}},
{AND_C168,{4U,3U,0U}},
{AND_C168,{5U,3U,0U}},
{AND_C168,{6U,3U,0U}},
{AND_C168,{7U,3U,0U}},
{AND_C170,{0U,3U,0U}},
{AND_C170,{1U,3U,0U}},
{AND_C170,{2U,3U,0U}},
{AND_C170,{3U,3U,0U}},
{AND_C170,{4U,3U,0U}},
{AND_C170,{5U,3U,0U}},
{AND_C170,{6U,3U,0U}},
{AND_C170,{7U,3U,0U}},
{AND_C178,{0U,3U,0U}},
{AND_C179,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C188,{3U,0U,0U}},
{EXG_C188,{3U,1U,0U}},
{EXG_C188,{3U,2U,0U}},
{EXG_C188,{3U,3U,0U}},
{EXG_C188,{3U,4U,0U}},
{EXG_C188,{3U,5U,0U}},
{EXG_C188,{3U,6U,0U}},
{EXG_C188,{3U,7U,0U}},
{AND_C190,{0U,3U,0U}},
{AND_C190,{1U,3U,0U}},
{AND_C190,{2U,3U,0U}},
{AND_C190,{3U,3U,0U}},
{AND_C190,{4U,3U,0U}},
{AND_C190,{5U,3U,0U}},
{AND_C190,{6U,3U,0U}},
{AND_C190,{7U,3U,0U}},
{AND_C198,{0U,3U,0U}},
{AND_C198,{1U,3U,0U}},
{AND_C198,{2U,3U,0U}},
{AND_C198,{3U,3U,0U}},
{AND_C198,{4U,3U,0U}},
{AND_C198,{5U,3U,0U}},
{AND_C198,{6U,3U,0U}},
{AND_C198,{7U,3U,0U}},
{AND_C1A0,{0U,3U,0U}},
{AND_C1A0,{1U,3U,0U}},
{AND_C1A0,{2U,3U,0U}},
{AND_C1A0,{3U,3U,0U}},
{AND_C1A0,{4U,3U,0U}},
{AND_C1A0,{5U,3U,0U}},
{AND_C1A0,{6U,3U,0U}},
{AND_C1A0,{7U,3U,0U}},
{AND_C1A8,{0U,3U,0U}},
{AND_C1A8,{1U,3U,0U}},
{AND_C1A8,{2U,3U,0U}},
{AND_C1A8,{3U,3U,0U}},
{AND_C1A8,{4U,3U,0U}},
{AND_C1A8,{5U,3U,0U}},
{AND_C1A8,{6U,3U,0U}},
{AND_C1A8,{7U,3U,0U}},
{AND_C1B0,{0U,3U,0U}},
{AND_C1B0,{1U,3U,0U}},
{AND_C1B0,{2U,3U,0U}},
{AND_C1B0,{3U,3U,0U}},
{AND_C1B0,{4U,3U,0U}},
{AND_C1B0,{5U,3U,0U}},
{AND_C1B0,{6U,3U,0U}},
{AND_C1B0,{7U,3U,0U}},
{AND_C1B8,{0U,3U,0U}},
{AND_C1B9,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1C0,{0U,3U,0U}},
{MULS_C1C0,{1U,3U,0U}},
{MULS_C1C0,{2U,3U,0U}},
{MULS_C1C0,{3U,3U,0U}},
{MULS_C1C0,{4U,3U,0U}},
{MULS_C1C0,{5U,3U,0U}},
{MULS_C1C0,{6U,3U,0U}},
{MULS_C1C0,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1D0,{0U,3U,0U}},
{MULS_C1D0,{1U,3U,0U}},
{MULS_C1D0,{2U,3U,0U}},
{MULS_C1D0,{3U,3U,0U}},
{MULS_C1D0,{4U,3U,0U}},
{MULS_C1D0,{5U,3U,0U}},
{MULS_C1D0,{6U,3U,0U}},
{MULS_C1D0,{7U,3U,0U}},
{MULS_C1D8,{0U,3U,0U}},
{MULS_C1D8,{1U,3U,0U}},
{MULS_C1D8,{2U,3U,0U}},
{MULS_C1D8,{3U,3U,0U}},
{MULS_C1D8,{4U,3U,0U}},
{MULS_C1D8,{5U,3U,0U}},
{MULS_C1D8,{6U,3U,0U}},
{MULS_C1D8,{7U,3U,0U}},
{MULS_C1E0,{0U,3U,0U}},
{MULS_C1E0,{1U,3U,0U}},
{MULS_C1E0,{2U,3U,0U}},
{MULS_C1E0,{3U,3U,0U}},
{MULS_C1E0,{4U,3U,0U}},
{MULS_C1E0,{5U,3U,0U}},
{MULS_C1E0,{6U,3U,0U}},
{MULS_C1E0,{7U,3U,0U}},
{MULS_C1E8,{0U,3U,0U}},
{MULS_C1E8,{1U,3U,0U}},
{MULS_C1E8,{2U,3U,0U}},
{MULS_C1E8,{3U,3U,0U}},
{MULS_C1E8,{4U,3U,0U}},
{MULS_C1E8,{5U,3U,0U}},
{MULS_C1E8,{6U,3U,0U}},
{MULS_C1E8,{7U,3U,0U}},
{MULS_C1F0,{0U,3U,0U}},
{MULS_C1F0,{1U,3U,0U}},
{MULS_C1F0,{2U,3U,0U}},
{MULS_C1F0,{3U,3U,0U}},
{MULS_C1F0,{4U,3U,0U}},
{MULS_C1F0,{5U,3U,0U}},
{MULS_C1F0,{6U,3U,0U}},
{MULS_C1F0,{7U,3U,0U}},
{MULS_C1F8,{0U,3U,0U}},
{MULS_C1F9,{0U,3U,0U}},
{MULS_C1FA,{0U,3U,0U}},
{MULS_C1FB,{0U,3U,0U}},
{MULS_C1FC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C000,{0U,4U,0U}},
{AND_C000,{1U,4U,0U}},
{AND_C000,{2U,4U,0U}},
{AND_C000,{3U,4U,0U}},
{AND_C000,{4U,4U,0U}},
{AND_C000,{5U,4U,0U}},
{AND_C000,{6U,4U,0U}},
{AND_C000,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C010,{0U,4U,0U}},
{AND_C010,{1U,4U,0U}},
{AND_C010,{2U,4U,0U}},
{AND_C010,{3U,4U,0U}},
{AND_C010,{4U,4U,0U}},
{AND_C010,{5U,4U,0U}},
{AND_C010,{6U,4U,0U}},
{AND_C010,{7U,4U,0U}},
{AND_C018,{0U,4U,0U}},
{AND_C018,{1U,4U,0U}},
{AND_C018,{2U,4U,0U}},
{AND_C018,{3U,4U,0U}},
{AND_C018,{4U,4U,0U}},
{AND_C018,{5U,4U,0U}},
{AND_C018,{6U,4U,0U}},
{AND_C018,{7U,4U,0U}},
{AND_C020,{0U,4U,0U}},
{AND_C020,{1U,4U,0U}},
{AND_C020,{2U,4U,0U}},
{AND_C020,{3U,4U,0U}},
{AND_C020,{4U,4U,0U}},
{AND_C020,{5U,4U,0U}},
{AND_C020,{6U,4U,0U}},
{AND_C020,{7U,4U,0U}},
{AND_C028,{0U,4U,0U}},
{AND_C028,{1U,4U,0U}},
{AND_C028,{2U,4U,0U}},
{AND_C028,{3U,4U,0U}},
{AND_C028,{4U,4U,0U}},
{AND_C028,{5U,4U,0U}},
{AND_C028,{6U,4U,0U}},
{AND_C028,{7U,4U,0U}},
{AND_C030,{0U,4U,0U}},
{AND_C030,{1U,4U,0U}},
{AND_C030,{2U,4U,0U}},
{AND_C030,{3U,4U,0U}},
{AND_C030,{4U,4U,0U}},
{AND_C030,{5U,4U,0U}},
{AND_C030,{6U,4U,0U}},
{AND_C030,{7U,4U,0U}},
{AND_C038,{0U,4U,0U}},
{AND_C039,{0U,4U,0U}},
{AND_C03A,{0U,4U,0U}},
{AND_C03B,{0U,4U,0U}},
{AND_C03C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C040,{0U,4U,0U}},
{AND_C040,{1U,4U,0U}},
{AND_C040,{2U,4U,0U}},
{AND_C040,{3U,4U,0U}},
{AND_C040,{4U,4U,0U}},
{AND_C040,{5U,4U,0U}},
{AND_C040,{6U,4U,0U}},
{AND_C040,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C050,{0U,4U,0U}},
{AND_C050,{1U,4U,0U}},
{AND_C050,{2U,4U,0U}},
{AND_C050,{3U,4U,0U}},
{AND_C050,{4U,4U,0U}},
{AND_C050,{5U,4U,0U}},
{AND_C050,{6U,4U,0U}},
{AND_C050,{7U,4U,0U}},
{AND_C058,{0U,4U,0U}},
{AND_C058,{1U,4U,0U}},
{AND_C058,{2U,4U,0U}},
{AND_C058,{3U,4U,0U}},
{AND_C058,{4U,4U,0U}},
{AND_C058,{5U,4U,0U}},
{AND_C058,{6U,4U,0U}},
{AND_C058,{7U,4U,0U}},
{AND_C060,{0U,4U,0U}},
{AND_C060,{1U,4U,0U}},
{AND_C060,{2U,4U,0U}},
{AND_C060,{3U,4U,0U}},
{AND_C060,{4U,4U,0U}},
{AND_C060,{5U,4U,0U}},
{AND_C060,{6U,4U,0U}},
{AND_C060,{7U,4U,0U}},
{AND_C068,{0U,4U,0U}},
{AND_C068,{1U,4U,0U}},
{AND_C068,{2U,4U,0U}},
{AND_C068,{3U,4U,0U}},
{AND_C068,{4U,4U,0U}},
{AND_C068,{5U,4U,0U}},
{AND_C068,{6U,4U,0U}},
{AND_C068,{7U,4U,0U}},
{AND_C070,{0U,4U,0U}},
{AND_C070,{1U,4U,0U}},
{AND_C070,{2U,4U,0U}},
{AND_C070,{3U,4U,0U}},
{AND_C070,{4U,4U,0U}},
{AND_C070,{5U,4U,0U}},
{AND_C070,{6U,4U,0U}},
{AND_C070,{7U,4U,0U}},
{AND_C078,{0U,4U,0U}},
{AND_C079,{0U,4U,0U}},
{AND_C07A,{0U,4U,0U}},
{AND_C07B,{0U,4U,0U}},
{AND_C07C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C080,{0U,4U,0U}},
{AND_C080,{1U,4U,0U}},
{AND_C080,{2U,4U,0U}},
{AND_C080,{3U,4U,0U}},
{AND_C080,{4U,4U,0U}},
{AND_C080,{5U,4U,0U}},
{AND_C080,{6U,4U,0U}},
{AND_C080,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C090,{0U,4U,0U}},
{AND_C090,{1U,4U,0U}},
{AND_C090,{2U,4U,0U}},
{AND_C090,{3U,4U,0U}},
{AND_C090,{4U,4U,0U}},
{AND_C090,{5U,4U,0U}},
{AND_C090,{6U,4U,0U}},
{AND_C090,{7U,4U,0U}},
{AND_C098,{0U,4U,0U}},
{AND_C098,{1U,4U,0U}},
{AND_C098,{2U,4U,0U}},
{AND_C098,{3U,4U,0U}},
{AND_C098,{4U,4U,0U}},
{AND_C098,{5U,4U,0U}},
{AND_C098,{6U,4U,0U}},
{AND_C098,{7U,4U,0U}},
{AND_C0A0,{0U,4U,0U}},
{AND_C0A0,{1U,4U,0U}},
{AND_C0A0,{2U,4U,0U}},
{AND_C0A0,{3U,4U,0U}},
{AND_C0A0,{4U,4U,0U}},
{AND_C0A0,{5U,4U,0U}},
{AND_C0A0,{6U,4U,0U}},
{AND_C0A0,{7U,4U,0U}},
{AND_C0A8,{0U,4U,0U}},
{AND_C0A8,{1U,4U,0U}},
{AND_C0A8,{2U,4U,0U}},
{AND_C0A8,{3U,4U,0U}},
{AND_C0A8,{4U,4U,0U}},
{AND_C0A8,{5U,4U,0U}},
{AND_C0A8,{6U,4U,0U}},
{AND_C0A8,{7U,4U,0U}},
{AND_C0B0,{0U,4U,0U}},
{AND_C0B0,{1U,4U,0U}},
{AND_C0B0,{2U,4U,0U}},
{AND_C0B0,{3U,4U,0U}},
{AND_C0B0,{4U,4U,0U}},
{AND_C0B0,{5U,4U,0U}},
{AND_C0B0,{6U,4U,0U}},
{AND_C0B0,{7U,4U,0U}},
{AND_C0B8,{0U,4U,0U}},
{AND_C0B9,{0U,4U,0U}},
{AND_C0BA,{0U,4U,0U}},
{AND_C0BB,{0U,4U,0U}},
{AND_C0BC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0C0,{0U,4U,0U}},
{MULU_C0C0,{1U,4U,0U}},
{MULU_C0C0,{2U,4U,0U}},
{MULU_C0C0,{3U,4U,0U}},
{MULU_C0C0,{4U,4U,0U}},
{MULU_C0C0,{5U,4U,0U}},
{MULU_C0C0,{6U,4U,0U}},
{MULU_C0C0,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0D0,{0U,4U,0U}},
{MULU_C0D0,{1U,4U,0U}},
{MULU_C0D0,{2U,4U,0U}},
{MULU_C0D0,{3U,4U,0U}},
{MULU_C0D0,{4U,4U,0U}},
{MULU_C0D0,{5U,4U,0U}},
{MULU_C0D0,{6U,4U,0U}},
{MULU_C0D0,{7U,4U,0U}},
{MULU_C0D8,{0U,4U,0U}},
{MULU_C0D8,{1U,4U,0U}},
{MULU_C0D8,{2U,4U,0U}},
{MULU_C0D8,{3U,4U,0U}},
{MULU_C0D8,{4U,4U,0U}},
{MULU_C0D8,{5U,4U,0U}},
{MULU_C0D8,{6U,4U,0U}},
{MULU_C0D8,{7U,4U,0U}},
{MULU_C0E0,{0U,4U,0U}},
{MULU_C0E0,{1U,4U,0U}},
{MULU_C0E0,{2U,4U,0U}},
{MULU_C0E0,{3U,4U,0U}},
{MULU_C0E0,{4U,4U,0U}},
{MULU_C0E0,{5U,4U,0U}},
{MULU_C0E0,{6U,4U,0U}},
{MULU_C0E0,{7U,4U,0U}},
{MULU_C0E8,{0U,4U,0U}},
{MULU_C0E8,{1U,4U,0U}},
{MULU_C0E8,{2U,4U,0U}},
{MULU_C0E8,{3U,4U,0U}},
{MULU_C0E8,{4U,4U,0U}},
{MULU_C0E8,{5U,4U,0U}},
{MULU_C0E8,{6U,4U,0U}},
{MULU_C0E8,{7U,4U,0U}},
{MULU_C0F0,{0U,4U,0U}},
{MULU_C0F0,{1U,4U,0U}},
{MULU_C0F0,{2U,4U,0U}},
{MULU_C0F0,{3U,4U,0U}},
{MULU_C0F0,{4U,4U,0U}},
{MULU_C0F0,{5U,4U,0U}},
{MULU_C0F0,{6U,4U,0U}},
{MULU_C0F0,{7U,4U,0U}},
{MULU_C0F8,{0U,4U,0U}},
{MULU_C0F9,{0U,4U,0U}},
{MULU_C0FA,{0U,4U,0U}},
{MULU_C0FB,{0U,4U,0U}},
{MULU_C0FC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ABCD_C100,{0U,4U,0U}},
{ABCD_C100,{1U,4U,0U}},
{ABCD_C100,{2U,4U,0U}},
{ABCD_C100,{3U,4U,0U}},
{ABCD_C100,{4U,4U,0U}},
{ABCD_C100,{5U,4U,0U}},
{ABCD_C100,{6U,4U,0U}},
{ABCD_C100,{7U,4U,0U}},
{ABCD_C108,{0U,4U,0U}},
{ABCD_C108,{1U,4U,0U}},
{ABCD_C108,{2U,4U,0U}},
{ABCD_C108,{3U,4U,0U}},
{ABCD_C108,{4U,4U,0U}},
{ABCD_C108,{5U,4U,0U}},
{ABCD_C108,{6U,4U,0U}},
{ABCD_C108,{7U,4U,0U}},
{AND_C110,{0U,4U,0U}},
{AND_C110,{1U,4U,0U}},
{AND_C110,{2U,4U,0U}},
{AND_C110,{3U,4U,0U}},
{AND_C110,{4U,4U,0U}},
{AND_C110,{5U,4U,0U}},
{AND_C110,{6U,4U,0U}},
{AND_C110,{7U,4U,0U}},
{AND_C118,{0U,4U,0U}},
{AND_C118,{1U,4U,0U}},
{AND_C118,{2U,4U,0U}},
{AND_C118,{3U,4U,0U}},
{AND_C118,{4U,4U,0U}},
{AND_C118,{5U,4U,0U}},
{AND_C118,{6U,4U,0U}},
{AND_C118,{7U,4U,0U}},
{AND_C120,{0U,4U,0U}},
{AND_C120,{1U,4U,0U}},
{AND_C120,{2U,4U,0U}},
{AND_C120,{3U,4U,0U}},
{AND_C120,{4U,4U,0U}},
{AND_C120,{5U,4U,0U}},
{AND_C120,{6U,4U,0U}},
{AND_C120,{7U,4U,0U}},
{AND_C128,{0U,4U,0U}},
{AND_C128,{1U,4U,0U}},
{AND_C128,{2U,4U,0U}},
{AND_C128,{3U,4U,0U}},
{AND_C128,{4U,4U,0U}},
{AND_C128,{5U,4U,0U}},
{AND_C128,{6U,4U,0U}},
{AND_C128,{7U,4U,0U}},
{AND_C130,{0U,4U,0U}},
{AND_C130,{1U,4U,0U}},
{AND_C130,{2U,4U,0U}},
{AND_C130,{3U,4U,0U}},
{AND_C130,{4U,4U,0U}},
{AND_C130,{5U,4U,0U}},
{AND_C130,{6U,4U,0U}},
{AND_C130,{7U,4U,0U}},
{AND_C138,{0U,4U,0U}},
{AND_C139,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C140,{4U,0U,0U}},
{EXG_C140,{4U,1U,0U}},
{EXG_C140,{4U,2U,0U}},
{EXG_C140,{4U,3U,0U}},
{EXG_C140,{4U,4U,0U}},
{EXG_C140,{4U,5U,0U}},
{EXG_C140,{4U,6U,0U}},
{EXG_C140,{4U,7U,0U}},
{EXG_C148,{4U,0U,0U}},
{EXG_C148,{4U,1U,0U}},
{EXG_C148,{4U,2U,0U}},
{EXG_C148,{4U,3U,0U}},
{EXG_C148,{4U,4U,0U}},
{EXG_C148,{4U,5U,0U}},
{EXG_C148,{4U,6U,0U}},
{EXG_C148,{4U,7U,0U}},
{AND_C150,{0U,4U,0U}},
{AND_C150,{1U,4U,0U}},
{AND_C150,{2U,4U,0U}},
{AND_C150,{3U,4U,0U}},
{AND_C150,{4U,4U,0U}},
{AND_C150,{5U,4U,0U}},
{AND_C150,{6U,4U,0U}},
{AND_C150,{7U,4U,0U}},
{AND_C158,{0U,4U,0U}},
{AND_C158,{1U,4U,0U}},
{AND_C158,{2U,4U,0U}},
{AND_C158,{3U,4U,0U}},
{AND_C158,{4U,4U,0U}},
{AND_C158,{5U,4U,0U}},
{AND_C158,{6U,4U,0U}},
{AND_C158,{7U,4U,0U}},
{AND_C160,{0U,4U,0U}},
{AND_C160,{1U,4U,0U}},
{AND_C160,{2U,4U,0U}},
{AND_C160,{3U,4U,0U}},
{AND_C160,{4U,4U,0U}},
{AND_C160,{5U,4U,0U}},
{AND_C160,{6U,4U,0U}},
{AND_C160,{7U,4U,0U}},
{AND_C168,{0U,4U,0U}},
{AND_C168,{1U,4U,0U}},
{AND_C168,{2U,4U,0U}},
{AND_C168,{3U,4U,0U}},
{AND_C168,{4U,4U,0U}},
{AND_C168,{5U,4U,0U}},
{AND_C168,{6U,4U,0U}},
{AND_C168,{7U,4U,0U}},
{AND_C170,{0U,4U,0U}},
{AND_C170,{1U,4U,0U}},
{AND_C170,{2U,4U,0U}},
{AND_C170,{3U,4U,0U}},
{AND_C170,{4U,4U,0U}},
{AND_C170,{5U,4U,0U}},
{AND_C170,{6U,4U,0U}},
{AND_C170,{7U,4U,0U}},
{AND_C178,{0U,4U,0U}},
{AND_C179,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C188,{4U,0U,0U}},
{EXG_C188,{4U,1U,0U}},
{EXG_C188,{4U,2U,0U}},
{EXG_C188,{4U,3U,0U}},
{EXG_C188,{4U,4U,0U}},
{EXG_C188,{4U,5U,0U}},
{EXG_C188,{4U,6U,0U}},
{EXG_C188,{4U,7U,0U}},
{AND_C190,{0U,4U,0U}},
{AND_C190,{1U,4U,0U}},
{AND_C190,{2U,4U,0U}},
{AND_C190,{3U,4U,0U}},
{AND_C190,{4U,4U,0U}},
{AND_C190,{5U,4U,0U}},
{AND_C190,{6U,4U,0U}},
{AND_C190,{7U,4U,0U}},
{AND_C198,{0U,4U,0U}},
{AND_C198,{1U,4U,0U}},
{AND_C198,{2U,4U,0U}},
{AND_C198,{3U,4U,0U}},
{AND_C198,{4U,4U,0U}},
{AND_C198,{5U,4U,0U}},
{AND_C198,{6U,4U,0U}},
{AND_C198,{7U,4U,0U}},
{AND_C1A0,{0U,4U,0U}},
{AND_C1A0,{1U,4U,0U}},
{AND_C1A0,{2U,4U,0U}},
{AND_C1A0,{3U,4U,0U}},
{AND_C1A0,{4U,4U,0U}},
{AND_C1A0,{5U,4U,0U}},
{AND_C1A0,{6U,4U,0U}},
{AND_C1A0,{7U,4U,0U}},
{AND_C1A8,{0U,4U,0U}},
{AND_C1A8,{1U,4U,0U}},
{AND_C1A8,{2U,4U,0U}},
{AND_C1A8,{3U,4U,0U}},
{AND_C1A8,{4U,4U,0U}},
{AND_C1A8,{5U,4U,0U}},
{AND_C1A8,{6U,4U,0U}},
{AND_C1A8,{7U,4U,0U}},
{AND_C1B0,{0U,4U,0U}},
{AND_C1B0,{1U,4U,0U}},
{AND_C1B0,{2U,4U,0U}},
{AND_C1B0,{3U,4U,0U}},
{AND_C1B0,{4U,4U,0U}},
{AND_C1B0,{5U,4U,0U}},
{AND_C1B0,{6U,4U,0U}},
{AND_C1B0,{7U,4U,0U}},
{AND_C1B8,{0U,4U,0U}},
{AND_C1B9,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1C0,{0U,4U,0U}},
{MULS_C1C0,{1U,4U,0U}},
{MULS_C1C0,{2U,4U,0U}},
{MULS_C1C0,{3U,4U,0U}},
{MULS_C1C0,{4U,4U,0U}},
{MULS_C1C0,{5U,4U,0U}},
{MULS_C1C0,{6U,4U,0U}},
{MULS_C1C0,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1D0,{0U,4U,0U}},
{MULS_C1D0,{1U,4U,0U}},
{MULS_C1D0,{2U,4U,0U}},
{MULS_C1D0,{3U,4U,0U}},
{MULS_C1D0,{4U,4U,0U}},
{MULS_C1D0,{5U,4U,0U}},
{MULS_C1D0,{6U,4U,0U}},
{MULS_C1D0,{7U,4U,0U}},
{MULS_C1D8,{0U,4U,0U}},
{MULS_C1D8,{1U,4U,0U}},
{MULS_C1D8,{2U,4U,0U}},
{MULS_C1D8,{3U,4U,0U}},
{MULS_C1D8,{4U,4U,0U}},
{MULS_C1D8,{5U,4U,0U}},
{MULS_C1D8,{6U,4U,0U}},
{MULS_C1D8,{7U,4U,0U}},
{MULS_C1E0,{0U,4U,0U}},
{MULS_C1E0,{1U,4U,0U}},
{MULS_C1E0,{2U,4U,0U}},
{MULS_C1E0,{3U,4U,0U}},
{MULS_C1E0,{4U,4U,0U}},
{MULS_C1E0,{5U,4U,0U}},
{MULS_C1E0,{6U,4U,0U}},
{MULS_C1E0,{7U,4U,0U}},
{MULS_C1E8,{0U,4U,0U}},
{MULS_C1E8,{1U,4U,0U}},
{MULS_C1E8,{2U,4U,0U}},
{MULS_C1E8,{3U,4U,0U}},
{MULS_C1E8,{4U,4U,0U}},
{MULS_C1E8,{5U,4U,0U}},
{MULS_C1E8,{6U,4U,0U}},
{MULS_C1E8,{7U,4U,0U}},
{MULS_C1F0,{0U,4U,0U}},
{MULS_C1F0,{1U,4U,0U}},
{MULS_C1F0,{2U,4U,0U}},
{MULS_C1F0,{3U,4U,0U}},
{MULS_C1F0,{4U,4U,0U}},
{MULS_C1F0,{5U,4U,0U}},
{MULS_C1F0,{6U,4U,0U}},
{MULS_C1F0,{7U,4U,0U}},
{MULS_C1F8,{0U,4U,0U}},
{MULS_C1F9,{0U,4U,0U}},
{MULS_C1FA,{0U,4U,0U}},
{MULS_C1FB,{0U,4U,0U}},
{MULS_C1FC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C000,{0U,5U,0U}},
{AND_C000,{1U,5U,0U}},
{AND_C000,{2U,5U,0U}},
{AND_C000,{3U,5U,0U}},
{AND_C000,{4U,5U,0U}},
{AND_C000,{5U,5U,0U}},
{AND_C000,{6U,5U,0U}},
{AND_C000,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C010,{0U,5U,0U}},
{AND_C010,{1U,5U,0U}},
{AND_C010,{2U,5U,0U}},
{AND_C010,{3U,5U,0U}},
{AND_C010,{4U,5U,0U}},
{AND_C010,{5U,5U,0U}},
{AND_C010,{6U,5U,0U}},
{AND_C010,{7U,5U,0U}},
{AND_C018,{0U,5U,0U}},
{AND_C018,{1U,5U,0U}},
{AND_C018,{2U,5U,0U}},
{AND_C018,{3U,5U,0U}},
{AND_C018,{4U,5U,0U}},
{AND_C018,{5U,5U,0U}},
{AND_C018,{6U,5U,0U}},
{AND_C018,{7U,5U,0U}},
{AND_C020,{0U,5U,0U}},
{AND_C020,{1U,5U,0U}},
{AND_C020,{2U,5U,0U}},
{AND_C020,{3U,5U,0U}},
{AND_C020,{4U,5U,0U}},
{AND_C020,{5U,5U,0U}},
{AND_C020,{6U,5U,0U}},
{AND_C020,{7U,5U,0U}},
{AND_C028,{0U,5U,0U}},
{AND_C028,{1U,5U,0U}},
{AND_C028,{2U,5U,0U}},
{AND_C028,{3U,5U,0U}},
{AND_C028,{4U,5U,0U}},
{AND_C028,{5U,5U,0U}},
{AND_C028,{6U,5U,0U}},
{AND_C028,{7U,5U,0U}},
{AND_C030,{0U,5U,0U}},
{AND_C030,{1U,5U,0U}},
{AND_C030,{2U,5U,0U}},
{AND_C030,{3U,5U,0U}},
{AND_C030,{4U,5U,0U}},
{AND_C030,{5U,5U,0U}},
{AND_C030,{6U,5U,0U}},
{AND_C030,{7U,5U,0U}},
{AND_C038,{0U,5U,0U}},
{AND_C039,{0U,5U,0U}},
{AND_C03A,{0U,5U,0U}},
{AND_C03B,{0U,5U,0U}},
{AND_C03C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C040,{0U,5U,0U}},
{AND_C040,{1U,5U,0U}},
{AND_C040,{2U,5U,0U}},
{AND_C040,{3U,5U,0U}},
{AND_C040,{4U,5U,0U}},
{AND_C040,{5U,5U,0U}},
{AND_C040,{6U,5U,0U}},
{AND_C040,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C050,{0U,5U,0U}},
{AND_C050,{1U,5U,0U}},
{AND_C050,{2U,5U,0U}},
{AND_C050,{3U,5U,0U}},
{AND_C050,{4U,5U,0U}},
{AND_C050,{5U,5U,0U}},
{AND_C050,{6U,5U,0U}},
{AND_C050,{7U,5U,0U}},
{AND_C058,{0U,5U,0U}},
{AND_C058,{1U,5U,0U}},
{AND_C058,{2U,5U,0U}},
{AND_C058,{3U,5U,0U}},
{AND_C058,{4U,5U,0U}},
{AND_C058,{5U,5U,0U}},
{AND_C058,{6U,5U,0U}},
{AND_C058,{7U,5U,0U}},
{AND_C060,{0U,5U,0U}},
{AND_C060,{1U,5U,0U}},
{AND_C060,{2U,5U,0U}},
{AND_C060,{3U,5U,0U}},
{AND_C060,{4U,5U,0U}},
{AND_C060,{5U,5U,0U}},
{AND_C060,{6U,5U,0U}},
{AND_C060,{7U,5U,0U}},
{AND_C068,{0U,5U,0U}},
{AND_C068,{1U,5U,0U}},
{AND_C068,{2U,5U,0U}},
{AND_C068,{3U,5U,0U}},
{AND_C068,{4U,5U,0U}},
{AND_C068,{5U,5U,0U}},
{AND_C068,{6U,5U,0U}},
{AND_C068,{7U,5U,0U}},
{AND_C070,{0U,5U,0U}},
{AND_C070,{1U,5U,0U}},
{AND_C070,{2U,5U,0U}},
{AND_C070,{3U,5U,0U}},
{AND_C070,{4U,5U,0U}},
{AND_C070,{5U,5U,0U}},
{AND_C070,{6U,5U,0U}},
{AND_C070,{7U,5U,0U}},
{AND_C078,{0U,5U,0U}},
{AND_C079,{0U,5U,0U}},
{AND_C07A,{0U,5U,0U}},
{AND_C07B,{0U,5U,0U}},
{AND_C07C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C080,{0U,5U,0U}},
{AND_C080,{1U,5U,0U}},
{AND_C080,{2U,5U,0U}},
{AND_C080,{3U,5U,0U}},
{AND_C080,{4U,5U,0U}},
{AND_C080,{5U,5U,0U}},
{AND_C080,{6U,5U,0U}},
{AND_C080,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C090,{0U,5U,0U}},
{AND_C090,{1U,5U,0U}},
{AND_C090,{2U,5U,0U}},
{AND_C090,{3U,5U,0U}},
{AND_C090,{4U,5U,0U}},
{AND_C090,{5U,5U,0U}},
{AND_C090,{6U,5U,0U}},
{AND_C090,{7U,5U,0U}},
{AND_C098,{0U,5U,0U}},
{AND_C098,{1U,5U,0U}},
{AND_C098,{2U,5U,0U}},
{AND_C098,{3U,5U,0U}},
{AND_C098,{4U,5U,0U}},
{AND_C098,{5U,5U,0U}},
{AND_C098,{6U,5U,0U}},
{AND_C098,{7U,5U,0U}},
{AND_C0A0,{0U,5U,0U}},
{AND_C0A0,{1U,5U,0U}},
{AND_C0A0,{2U,5U,0U}},
{AND_C0A0,{3U,5U,0U}},
{AND_C0A0,{4U,5U,0U}},
{AND_C0A0,{5U,5U,0U}},
{AND_C0A0,{6U,5U,0U}},
{AND_C0A0,{7U,5U,0U}},
{AND_C0A8,{0U,5U,0U}},
{AND_C0A8,{1U,5U,0U}},
{AND_C0A8,{2U,5U,0U}},
{AND_C0A8,{3U,5U,0U}},
{AND_C0A8,{4U,5U,0U}},
{AND_C0A8,{5U,5U,0U}},
{AND_C0A8,{6U,5U,0U}},
{AND_C0A8,{7U,5U,0U}},
{AND_C0B0,{0U,5U,0U}},
{AND_C0B0,{1U,5U,0U}},
{AND_C0B0,{2U,5U,0U}},
{AND_C0B0,{3U,5U,0U}},
{AND_C0B0,{4U,5U,0U}},
{AND_C0B0,{5U,5U,0U}},
{AND_C0B0,{6U,5U,0U}},
{AND_C0B0,{7U,5U,0U}},
{AND_C0B8,{0U,5U,0U}},
{AND_C0B9,{0U,5U,0U}},
{AND_C0BA,{0U,5U,0U}},
{AND_C0BB,{0U,5U,0U}},
{AND_C0BC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0C0,{0U,5U,0U}},
{MULU_C0C0,{1U,5U,0U}},
{MULU_C0C0,{2U,5U,0U}},
{MULU_C0C0,{3U,5U,0U}},
{MULU_C0C0,{4U,5U,0U}},
{MULU_C0C0,{5U,5U,0U}},
{MULU_C0C0,{6U,5U,0U}},
{MULU_C0C0,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0D0,{0U,5U,0U}},
{MULU_C0D0,{1U,5U,0U}},
{MULU_C0D0,{2U,5U,0U}},
{MULU_C0D0,{3U,5U,0U}},
{MULU_C0D0,{4U,5U,0U}},
{MULU_C0D0,{5U,5U,0U}},
{MULU_C0D0,{6U,5U,0U}},
{MULU_C0D0,{7U,5U,0U}},
{MULU_C0D8,{0U,5U,0U}},
{MULU_C0D8,{1U,5U,0U}},
{MULU_C0D8,{2U,5U,0U}},
{MULU_C0D8,{3U,5U,0U}},
{MULU_C0D8,{4U,5U,0U}},
{MULU_C0D8,{5U,5U,0U}},
{MULU_C0D8,{6U,5U,0U}},
{MULU_C0D8,{7U,5U,0U}},
{MULU_C0E0,{0U,5U,0U}},
{MULU_C0E0,{1U,5U,0U}},
{MULU_C0E0,{2U,5U,0U}},
{MULU_C0E0,{3U,5U,0U}},
{MULU_C0E0,{4U,5U,0U}},
{MULU_C0E0,{5U,5U,0U}},
{MULU_C0E0,{6U,5U,0U}},
{MULU_C0E0,{7U,5U,0U}},
{MULU_C0E8,{0U,5U,0U}},
{MULU_C0E8,{1U,5U,0U}},
{MULU_C0E8,{2U,5U,0U}},
{MULU_C0E8,{3U,5U,0U}},
{MULU_C0E8,{4U,5U,0U}},
{MULU_C0E8,{5U,5U,0U}},
{MULU_C0E8,{6U,5U,0U}},
{MULU_C0E8,{7U,5U,0U}},
{MULU_C0F0,{0U,5U,0U}},
{MULU_C0F0,{1U,5U,0U}},
{MULU_C0F0,{2U,5U,0U}},
{MULU_C0F0,{3U,5U,0U}},
{MULU_C0F0,{4U,5U,0U}},
{MULU_C0F0,{5U,5U,0U}},
{MULU_C0F0,{6U,5U,0U}},
{MULU_C0F0,{7U,5U,0U}},
{MULU_C0F8,{0U,5U,0U}},
{MULU_C0F9,{0U,5U,0U}},
{MULU_C0FA,{0U,5U,0U}},
{MULU_C0FB,{0U,5U,0U}},
{MULU_C0FC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ABCD_C100,{0U,5U,0U}},
{ABCD_C100,{1U,5U,0U}},
{ABCD_C100,{2U,5U,0U}},
{ABCD_C100,{3U,5U,0U}},
{ABCD_C100,{4U,5U,0U}},
{ABCD_C100,{5U,5U,0U}},
{ABCD_C100,{6U,5U,0U}},
{ABCD_C100,{7U,5U,0U}},
{ABCD_C108,{0U,5U,0U}},
{ABCD_C108,{1U,5U,0U}},
{ABCD_C108,{2U,5U,0U}},
{ABCD_C108,{3U,5U,0U}},
{ABCD_C108,{4U,5U,0U}},
{ABCD_C108,{5U,5U,0U}},
{ABCD_C108,{6U,5U,0U}},
{ABCD_C108,{7U,5U,0U}},
{AND_C110,{0U,5U,0U}},
{AND_C110,{1U,5U,0U}},
{AND_C110,{2U,5U,0U}},
{AND_C110,{3U,5U,0U}},
{AND_C110,{4U,5U,0U}},
{AND_C110,{5U,5U,0U}},
{AND_C110,{6U,5U,0U}},
{AND_C110,{7U,5U,0U}},
{AND_C118,{0U,5U,0U}},
{AND_C118,{1U,5U,0U}},
{AND_C118,{2U,5U,0U}},
{AND_C118,{3U,5U,0U}},
{AND_C118,{4U,5U,0U}},
{AND_C118,{5U,5U,0U}},
{AND_C118,{6U,5U,0U}},
{AND_C118,{7U,5U,0U}},
{AND_C120,{0U,5U,0U}},
{AND_C120,{1U,5U,0U}},
{AND_C120,{2U,5U,0U}},
{AND_C120,{3U,5U,0U}},
{AND_C120,{4U,5U,0U}},
{AND_C120,{5U,5U,0U}},
{AND_C120,{6U,5U,0U}},
{AND_C120,{7U,5U,0U}},
{AND_C128,{0U,5U,0U}},
{AND_C128,{1U,5U,0U}},
{AND_C128,{2U,5U,0U}},
{AND_C128,{3U,5U,0U}},
{AND_C128,{4U,5U,0U}},
{AND_C128,{5U,5U,0U}},
{AND_C128,{6U,5U,0U}},
{AND_C128,{7U,5U,0U}},
{AND_C130,{0U,5U,0U}},
{AND_C130,{1U,5U,0U}},
{AND_C130,{2U,5U,0U}},
{AND_C130,{3U,5U,0U}},
{AND_C130,{4U,5U,0U}},
{AND_C130,{5U,5U,0U}},
{AND_C130,{6U,5U,0U}},
{AND_C130,{7U,5U,0U}},
{AND_C138,{0U,5U,0U}},
{AND_C139,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C140,{5U,0U,0U}},
{EXG_C140,{5U,1U,0U}},
{EXG_C140,{5U,2U,0U}},
{EXG_C140,{5U,3U,0U}},
{EXG_C140,{5U,4U,0U}},
{EXG_C140,{5U,5U,0U}},
{EXG_C140,{5U,6U,0U}},
{EXG_C140,{5U,7U,0U}},
{EXG_C148,{5U,0U,0U}},
{EXG_C148,{5U,1U,0U}},
{EXG_C148,{5U,2U,0U}},
{EXG_C148,{5U,3U,0U}},
{EXG_C148,{5U,4U,0U}},
{EXG_C148,{5U,5U,0U}},
{EXG_C148,{5U,6U,0U}},
{EXG_C148,{5U,7U,0U}},
{AND_C150,{0U,5U,0U}},
{AND_C150,{1U,5U,0U}},
{AND_C150,{2U,5U,0U}},
{AND_C150,{3U,5U,0U}},
{AND_C150,{4U,5U,0U}},
{AND_C150,{5U,5U,0U}},
{AND_C150,{6U,5U,0U}},
{AND_C150,{7U,5U,0U}},
{AND_C158,{0U,5U,0U}},
{AND_C158,{1U,5U,0U}},
{AND_C158,{2U,5U,0U}},
{AND_C158,{3U,5U,0U}},
{AND_C158,{4U,5U,0U}},
{AND_C158,{5U,5U,0U}},
{AND_C158,{6U,5U,0U}},
{AND_C158,{7U,5U,0U}},
{AND_C160,{0U,5U,0U}},
{AND_C160,{1U,5U,0U}},
{AND_C160,{2U,5U,0U}},
{AND_C160,{3U,5U,0U}},
{AND_C160,{4U,5U,0U}},
{AND_C160,{5U,5U,0U}},
{AND_C160,{6U,5U,0U}},
{AND_C160,{7U,5U,0U}},
{AND_C168,{0U,5U,0U}},
{AND_C168,{1U,5U,0U}},
{AND_C168,{2U,5U,0U}},
{AND_C168,{3U,5U,0U}},
{AND_C168,{4U,5U,0U}},
{AND_C168,{5U,5U,0U}},
{AND_C168,{6U,5U,0U}},
{AND_C168,{7U,5U,0U}},
{AND_C170,{0U,5U,0U}},
{AND_C170,{1U,5U,0U}},
{AND_C170,{2U,5U,0U}},
{AND_C170,{3U,5U,0U}},
{AND_C170,{4U,5U,0U}},
{AND_C170,{5U,5U,0U}},
{AND_C170,{6U,5U,0U}},
{AND_C170,{7U,5U,0U}},
{AND_C178,{0U,5U,0U}},
{AND_C179,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C188,{5U,0U,0U}},
{EXG_C188,{5U,1U,0U}},
{EXG_C188,{5U,2U,0U}},
{EXG_C188,{5U,3U,0U}},
{EXG_C188,{5U,4U,0U}},
{EXG_C188,{5U,5U,0U}},
{EXG_C188,{5U,6U,0U}},
{EXG_C188,{5U,7U,0U}},
{AND_C190,{0U,5U,0U}},
{AND_C190,{1U,5U,0U}},
{AND_C190,{2U,5U,0U}},
{AND_C190,{3U,5U,0U}},
{AND_C190,{4U,5U,0U}},
{AND_C190,{5U,5U,0U}},
{AND_C190,{6U,5U,0U}},
{AND_C190,{7U,5U,0U}},
{AND_C198,{0U,5U,0U}},
{AND_C198,{1U,5U,0U}},
{AND_C198,{2U,5U,0U}},
{AND_C198,{3U,5U,0U}},
{AND_C198,{4U,5U,0U}},
{AND_C198,{5U,5U,0U}},
{AND_C198,{6U,5U,0U}},
{AND_C198,{7U,5U,0U}},
{AND_C1A0,{0U,5U,0U}},
{AND_C1A0,{1U,5U,0U}},
{AND_C1A0,{2U,5U,0U}},
{AND_C1A0,{3U,5U,0U}},
{AND_C1A0,{4U,5U,0U}},
{AND_C1A0,{5U,5U,0U}},
{AND_C1A0,{6U,5U,0U}},
{AND_C1A0,{7U,5U,0U}},
{AND_C1A8,{0U,5U,0U}},
{AND_C1A8,{1U,5U,0U}},
{AND_C1A8,{2U,5U,0U}},
{AND_C1A8,{3U,5U,0U}},
{AND_C1A8,{4U,5U,0U}},
{AND_C1A8,{5U,5U,0U}},
{AND_C1A8,{6U,5U,0U}},
{AND_C1A8,{7U,5U,0U}},
{AND_C1B0,{0U,5U,0U}},
{AND_C1B0,{1U,5U,0U}},
{AND_C1B0,{2U,5U,0U}},
{AND_C1B0,{3U,5U,0U}},
{AND_C1B0,{4U,5U,0U}},
{AND_C1B0,{5U,5U,0U}},
{AND_C1B0,{6U,5U,0U}},
{AND_C1B0,{7U,5U,0U}},
{AND_C1B8,{0U,5U,0U}},
{AND_C1B9,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1C0,{0U,5U,0U}},
{MULS_C1C0,{1U,5U,0U}},
{MULS_C1C0,{2U,5U,0U}},
{MULS_C1C0,{3U,5U,0U}},
{MULS_C1C0,{4U,5U,0U}},
{MULS_C1C0,{5U,5U,0U}},
{MULS_C1C0,{6U,5U,0U}},
{MULS_C1C0,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1D0,{0U,5U,0U}},
{MULS_C1D0,{1U,5U,0U}},
{MULS_C1D0,{2U,5U,0U}},
{MULS_C1D0,{3U,5U,0U}},
{MULS_C1D0,{4U,5U,0U}},
{MULS_C1D0,{5U,5U,0U}},
{MULS_C1D0,{6U,5U,0U}},
{MULS_C1D0,{7U,5U,0U}},
{MULS_C1D8,{0U,5U,0U}},
{MULS_C1D8,{1U,5U,0U}},
{MULS_C1D8,{2U,5U,0U}},
{MULS_C1D8,{3U,5U,0U}},
{MULS_C1D8,{4U,5U,0U}},
{MULS_C1D8,{5U,5U,0U}},
{MULS_C1D8,{6U,5U,0U}},
{MULS_C1D8,{7U,5U,0U}},
{MULS_C1E0,{0U,5U,0U}},
{MULS_C1E0,{1U,5U,0U}},
{MULS_C1E0,{2U,5U,0U}},
{MULS_C1E0,{3U,5U,0U}},
{MULS_C1E0,{4U,5U,0U}},
{MULS_C1E0,{5U,5U,0U}},
{MULS_C1E0,{6U,5U,0U}},
{MULS_C1E0,{7U,5U,0U}},
{MULS_C1E8,{0U,5U,0U}},
{MULS_C1E8,{1U,5U,0U}},
{MULS_C1E8,{2U,5U,0U}},
{MULS_C1E8,{3U,5U,0U}},
{MULS_C1E8,{4U,5U,0U}},
{MULS_C1E8,{5U,5U,0U}},
{MULS_C1E8,{6U,5U,0U}},
{MULS_C1E8,{7U,5U,0U}},
{MULS_C1F0,{0U,5U,0U}},
{MULS_C1F0,{1U,5U,0U}},
{MULS_C1F0,{2U,5U,0U}},
{MULS_C1F0,{3U,5U,0U}},
{MULS_C1F0,{4U,5U,0U}},
{MULS_C1F0,{5U,5U,0U}},
{MULS_C1F0,{6U,5U,0U}},
{MULS_C1F0,{7U,5U,0U}},
{MULS_C1F8,{0U,5U,0U}},
{MULS_C1F9,{0U,5U,0U}},
{MULS_C1FA,{0U,5U,0U}},
{MULS_C1FB,{0U,5U,0U}},
{MULS_C1FC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C000,{0U,6U,0U}},
{AND_C000,{1U,6U,0U}},
{AND_C000,{2U,6U,0U}},
{AND_C000,{3U,6U,0U}},
{AND_C000,{4U,6U,0U}},
{AND_C000,{5U,6U,0U}},
{AND_C000,{6U,6U,0U}},
{AND_C000,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C010,{0U,6U,0U}},
{AND_C010,{1U,6U,0U}},
{AND_C010,{2U,6U,0U}},
{AND_C010,{3U,6U,0U}},
{AND_C010,{4U,6U,0U}},
{AND_C010,{5U,6U,0U}},
{AND_C010,{6U,6U,0U}},
{AND_C010,{7U,6U,0U}},
{AND_C018,{0U,6U,0U}},
{AND_C018,{1U,6U,0U}},
{AND_C018,{2U,6U,0U}},
{AND_C018,{3U,6U,0U}},
{AND_C018,{4U,6U,0U}},
{AND_C018,{5U,6U,0U}},
{AND_C018,{6U,6U,0U}},
{AND_C018,{7U,6U,0U}},
{AND_C020,{0U,6U,0U}},
{AND_C020,{1U,6U,0U}},
{AND_C020,{2U,6U,0U}},
{AND_C020,{3U,6U,0U}},
{AND_C020,{4U,6U,0U}},
{AND_C020,{5U,6U,0U}},
{AND_C020,{6U,6U,0U}},
{AND_C020,{7U,6U,0U}},
{AND_C028,{0U,6U,0U}},
{AND_C028,{1U,6U,0U}},
{AND_C028,{2U,6U,0U}},
{AND_C028,{3U,6U,0U}},
{AND_C028,{4U,6U,0U}},
{AND_C028,{5U,6U,0U}},
{AND_C028,{6U,6U,0U}},
{AND_C028,{7U,6U,0U}},
{AND_C030,{0U,6U,0U}},
{AND_C030,{1U,6U,0U}},
{AND_C030,{2U,6U,0U}},
{AND_C030,{3U,6U,0U}},
{AND_C030,{4U,6U,0U}},
{AND_C030,{5U,6U,0U}},
{AND_C030,{6U,6U,0U}},
{AND_C030,{7U,6U,0U}},
{AND_C038,{0U,6U,0U}},
{AND_C039,{0U,6U,0U}},
{AND_C03A,{0U,6U,0U}},
{AND_C03B,{0U,6U,0U}},
{AND_C03C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C040,{0U,6U,0U}},
{AND_C040,{1U,6U,0U}},
{AND_C040,{2U,6U,0U}},
{AND_C040,{3U,6U,0U}},
{AND_C040,{4U,6U,0U}},
{AND_C040,{5U,6U,0U}},
{AND_C040,{6U,6U,0U}},
{AND_C040,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C050,{0U,6U,0U}},
{AND_C050,{1U,6U,0U}},
{AND_C050,{2U,6U,0U}},
{AND_C050,{3U,6U,0U}},
{AND_C050,{4U,6U,0U}},
{AND_C050,{5U,6U,0U}},
{AND_C050,{6U,6U,0U}},
{AND_C050,{7U,6U,0U}},
{AND_C058,{0U,6U,0U}},
{AND_C058,{1U,6U,0U}},
{AND_C058,{2U,6U,0U}},
{AND_C058,{3U,6U,0U}},
{AND_C058,{4U,6U,0U}},
{AND_C058,{5U,6U,0U}},
{AND_C058,{6U,6U,0U}},
{AND_C058,{7U,6U,0U}},
{AND_C060,{0U,6U,0U}},
{AND_C060,{1U,6U,0U}},
{AND_C060,{2U,6U,0U}},
{AND_C060,{3U,6U,0U}},
{AND_C060,{4U,6U,0U}},
{AND_C060,{5U,6U,0U}},
{AND_C060,{6U,6U,0U}},
{AND_C060,{7U,6U,0U}},
{AND_C068,{0U,6U,0U}},
{AND_C068,{1U,6U,0U}},
{AND_C068,{2U,6U,0U}},
{AND_C068,{3U,6U,0U}},
{AND_C068,{4U,6U,0U}},
{AND_C068,{5U,6U,0U}},
{AND_C068,{6U,6U,0U}},
{AND_C068,{7U,6U,0U}},
{AND_C070,{0U,6U,0U}},
{AND_C070,{1U,6U,0U}},
{AND_C070,{2U,6U,0U}},
{AND_C070,{3U,6U,0U}},
{AND_C070,{4U,6U,0U}},
{AND_C070,{5U,6U,0U}},
{AND_C070,{6U,6U,0U}},
{AND_C070,{7U,6U,0U}},
{AND_C078,{0U,6U,0U}},
{AND_C079,{0U,6U,0U}},
{AND_C07A,{0U,6U,0U}},
{AND_C07B,{0U,6U,0U}},
{AND_C07C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C080,{0U,6U,0U}},
{AND_C080,{1U,6U,0U}},
{AND_C080,{2U,6U,0U}},
{AND_C080,{3U,6U,0U}},
{AND_C080,{4U,6U,0U}},
{AND_C080,{5U,6U,0U}},
{AND_C080,{6U,6U,0U}},
{AND_C080,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C090,{0U,6U,0U}},
{AND_C090,{1U,6U,0U}},
{AND_C090,{2U,6U,0U}},
{AND_C090,{3U,6U,0U}},
{AND_C090,{4U,6U,0U}},
{AND_C090,{5U,6U,0U}},
{AND_C090,{6U,6U,0U}},
{AND_C090,{7U,6U,0U}},
{AND_C098,{0U,6U,0U}},
{AND_C098,{1U,6U,0U}},
{AND_C098,{2U,6U,0U}},
{AND_C098,{3U,6U,0U}},
{AND_C098,{4U,6U,0U}},
{AND_C098,{5U,6U,0U}},
{AND_C098,{6U,6U,0U}},
{AND_C098,{7U,6U,0U}},
{AND_C0A0,{0U,6U,0U}},
{AND_C0A0,{1U,6U,0U}},
{AND_C0A0,{2U,6U,0U}},
{AND_C0A0,{3U,6U,0U}},
{AND_C0A0,{4U,6U,0U}},
{AND_C0A0,{5U,6U,0U}},
{AND_C0A0,{6U,6U,0U}},
{AND_C0A0,{7U,6U,0U}},
{AND_C0A8,{0U,6U,0U}},
{AND_C0A8,{1U,6U,0U}},
{AND_C0A8,{2U,6U,0U}},
{AND_C0A8,{3U,6U,0U}},
{AND_C0A8,{4U,6U,0U}},
{AND_C0A8,{5U,6U,0U}},
{AND_C0A8,{6U,6U,0U}},
{AND_C0A8,{7U,6U,0U}},
{AND_C0B0,{0U,6U,0U}},
{AND_C0B0,{1U,6U,0U}},
{AND_C0B0,{2U,6U,0U}},
{AND_C0B0,{3U,6U,0U}},
{AND_C0B0,{4U,6U,0U}},
{AND_C0B0,{5U,6U,0U}},
{AND_C0B0,{6U,6U,0U}},
{AND_C0B0,{7U,6U,0U}},
{AND_C0B8,{0U,6U,0U}},
{AND_C0B9,{0U,6U,0U}},
{AND_C0BA,{0U,6U,0U}},
{AND_C0BB,{0U,6U,0U}},
{AND_C0BC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0C0,{0U,6U,0U}},
{MULU_C0C0,{1U,6U,0U}},
{MULU_C0C0,{2U,6U,0U}},
{MULU_C0C0,{3U,6U,0U}},
{MULU_C0C0,{4U,6U,0U}},
{MULU_C0C0,{5U,6U,0U}},
{MULU_C0C0,{6U,6U,0U}},
{MULU_C0C0,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0D0,{0U,6U,0U}},
{MULU_C0D0,{1U,6U,0U}},
{MULU_C0D0,{2U,6U,0U}},
{MULU_C0D0,{3U,6U,0U}},
{MULU_C0D0,{4U,6U,0U}},
{MULU_C0D0,{5U,6U,0U}},
{MULU_C0D0,{6U,6U,0U}},
{MULU_C0D0,{7U,6U,0U}},
{MULU_C0D8,{0U,6U,0U}},
{MULU_C0D8,{1U,6U,0U}},
{MULU_C0D8,{2U,6U,0U}},
{MULU_C0D8,{3U,6U,0U}},
{MULU_C0D8,{4U,6U,0U}},
{MULU_C0D8,{5U,6U,0U}},
{MULU_C0D8,{6U,6U,0U}},
{MULU_C0D8,{7U,6U,0U}},
{MULU_C0E0,{0U,6U,0U}},
{MULU_C0E0,{1U,6U,0U}},
{MULU_C0E0,{2U,6U,0U}},
{MULU_C0E0,{3U,6U,0U}},
{MULU_C0E0,{4U,6U,0U}},
{MULU_C0E0,{5U,6U,0U}},
{MULU_C0E0,{6U,6U,0U}},
{MULU_C0E0,{7U,6U,0U}},
{MULU_C0E8,{0U,6U,0U}},
{MULU_C0E8,{1U,6U,0U}},
{MULU_C0E8,{2U,6U,0U}},
{MULU_C0E8,{3U,6U,0U}},
{MULU_C0E8,{4U,6U,0U}},
{MULU_C0E8,{5U,6U,0U}},
{MULU_C0E8,{6U,6U,0U}},
{MULU_C0E8,{7U,6U,0U}},
{MULU_C0F0,{0U,6U,0U}},
{MULU_C0F0,{1U,6U,0U}},
{MULU_C0F0,{2U,6U,0U}},
{MULU_C0F0,{3U,6U,0U}},
{MULU_C0F0,{4U,6U,0U}},
{MULU_C0F0,{5U,6U,0U}},
{MULU_C0F0,{6U,6U,0U}},
{MULU_C0F0,{7U,6U,0U}},
{MULU_C0F8,{0U,6U,0U}},
{MULU_C0F9,{0U,6U,0U}},
{MULU_C0FA,{0U,6U,0U}},
{MULU_C0FB,{0U,6U,0U}},
{MULU_C0FC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ABCD_C100,{0U,6U,0U}},
{ABCD_C100,{1U,6U,0U}},
{ABCD_C100,{2U,6U,0U}},
{ABCD_C100,{3U,6U,0U}},
{ABCD_C100,{4U,6U,0U}},
{ABCD_C100,{5U,6U,0U}},
{ABCD_C100,{6U,6U,0U}},
{ABCD_C100,{7U,6U,0U}},
{ABCD_C108,{0U,6U,0U}},
{ABCD_C108,{1U,6U,0U}},
{ABCD_C108,{2U,6U,0U}},
{ABCD_C108,{3U,6U,0U}},
{ABCD_C108,{4U,6U,0U}},
{ABCD_C108,{5U,6U,0U}},
{ABCD_C108,{6U,6U,0U}},
{ABCD_C108,{7U,6U,0U}},
{AND_C110,{0U,6U,0U}},
{AND_C110,{1U,6U,0U}},
{AND_C110,{2U,6U,0U}},
{AND_C110,{3U,6U,0U}},
{AND_C110,{4U,6U,0U}},
{AND_C110,{5U,6U,0U}},
{AND_C110,{6U,6U,0U}},
{AND_C110,{7U,6U,0U}},
{AND_C118,{0U,6U,0U}},
{AND_C118,{1U,6U,0U}},
{AND_C118,{2U,6U,0U}},
{AND_C118,{3U,6U,0U}},
{AND_C118,{4U,6U,0U}},
{AND_C118,{5U,6U,0U}},
{AND_C118,{6U,6U,0U}},
{AND_C118,{7U,6U,0U}},
{AND_C120,{0U,6U,0U}},
{AND_C120,{1U,6U,0U}},
{AND_C120,{2U,6U,0U}},
{AND_C120,{3U,6U,0U}},
{AND_C120,{4U,6U,0U}},
{AND_C120,{5U,6U,0U}},
{AND_C120,{6U,6U,0U}},
{AND_C120,{7U,6U,0U}},
{AND_C128,{0U,6U,0U}},
{AND_C128,{1U,6U,0U}},
{AND_C128,{2U,6U,0U}},
{AND_C128,{3U,6U,0U}},
{AND_C128,{4U,6U,0U}},
{AND_C128,{5U,6U,0U}},
{AND_C128,{6U,6U,0U}},
{AND_C128,{7U,6U,0U}},
{AND_C130,{0U,6U,0U}},
{AND_C130,{1U,6U,0U}},
{AND_C130,{2U,6U,0U}},
{AND_C130,{3U,6U,0U}},
{AND_C130,{4U,6U,0U}},
{AND_C130,{5U,6U,0U}},
{AND_C130,{6U,6U,0U}},
{AND_C130,{7U,6U,0U}},
{AND_C138,{0U,6U,0U}},
{AND_C139,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C140,{6U,0U,0U}},
{EXG_C140,{6U,1U,0U}},
{EXG_C140,{6U,2U,0U}},
{EXG_C140,{6U,3U,0U}},
{EXG_C140,{6U,4U,0U}},
{EXG_C140,{6U,5U,0U}},
{EXG_C140,{6U,6U,0U}},
{EXG_C140,{6U,7U,0U}},
{EXG_C148,{6U,0U,0U}},
{EXG_C148,{6U,1U,0U}},
{EXG_C148,{6U,2U,0U}},
{EXG_C148,{6U,3U,0U}},
{EXG_C148,{6U,4U,0U}},
{EXG_C148,{6U,5U,0U}},
{EXG_C148,{6U,6U,0U}},
{EXG_C148,{6U,7U,0U}},
{AND_C150,{0U,6U,0U}},
{AND_C150,{1U,6U,0U}},
{AND_C150,{2U,6U,0U}},
{AND_C150,{3U,6U,0U}},
{AND_C150,{4U,6U,0U}},
{AND_C150,{5U,6U,0U}},
{AND_C150,{6U,6U,0U}},
{AND_C150,{7U,6U,0U}},
{AND_C158,{0U,6U,0U}},
{AND_C158,{1U,6U,0U}},
{AND_C158,{2U,6U,0U}},
{AND_C158,{3U,6U,0U}},
{AND_C158,{4U,6U,0U}},
{AND_C158,{5U,6U,0U}},
{AND_C158,{6U,6U,0U}},
{AND_C158,{7U,6U,0U}},
{AND_C160,{0U,6U,0U}},
{AND_C160,{1U,6U,0U}},
{AND_C160,{2U,6U,0U}},
{AND_C160,{3U,6U,0U}},
{AND_C160,{4U,6U,0U}},
{AND_C160,{5U,6U,0U}},
{AND_C160,{6U,6U,0U}},
{AND_C160,{7U,6U,0U}},
{AND_C168,{0U,6U,0U}},
{AND_C168,{1U,6U,0U}},
{AND_C168,{2U,6U,0U}},
{AND_C168,{3U,6U,0U}},
{AND_C168,{4U,6U,0U}},
{AND_C168,{5U,6U,0U}},
{AND_C168,{6U,6U,0U}},
{AND_C168,{7U,6U,0U}},
{AND_C170,{0U,6U,0U}},
{AND_C170,{1U,6U,0U}},
{AND_C170,{2U,6U,0U}},
{AND_C170,{3U,6U,0U}},
{AND_C170,{4U,6U,0U}},
{AND_C170,{5U,6U,0U}},
{AND_C170,{6U,6U,0U}},
{AND_C170,{7U,6U,0U}},
{AND_C178,{0U,6U,0U}},
{AND_C179,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C188,{6U,0U,0U}},
{EXG_C188,{6U,1U,0U}},
{EXG_C188,{6U,2U,0U}},
{EXG_C188,{6U,3U,0U}},
{EXG_C188,{6U,4U,0U}},
{EXG_C188,{6U,5U,0U}},
{EXG_C188,{6U,6U,0U}},
{EXG_C188,{6U,7U,0U}},
{AND_C190,{0U,6U,0U}},
{AND_C190,{1U,6U,0U}},
{AND_C190,{2U,6U,0U}},
{AND_C190,{3U,6U,0U}},
{AND_C190,{4U,6U,0U}},
{AND_C190,{5U,6U,0U}},
{AND_C190,{6U,6U,0U}},
{AND_C190,{7U,6U,0U}},
{AND_C198,{0U,6U,0U}},
{AND_C198,{1U,6U,0U}},
{AND_C198,{2U,6U,0U}},
{AND_C198,{3U,6U,0U}},
{AND_C198,{4U,6U,0U}},
{AND_C198,{5U,6U,0U}},
{AND_C198,{6U,6U,0U}},
{AND_C198,{7U,6U,0U}},
{AND_C1A0,{0U,6U,0U}},
{AND_C1A0,{1U,6U,0U}},
{AND_C1A0,{2U,6U,0U}},
{AND_C1A0,{3U,6U,0U}},
{AND_C1A0,{4U,6U,0U}},
{AND_C1A0,{5U,6U,0U}},
{AND_C1A0,{6U,6U,0U}},
{AND_C1A0,{7U,6U,0U}},
{AND_C1A8,{0U,6U,0U}},
{AND_C1A8,{1U,6U,0U}},
{AND_C1A8,{2U,6U,0U}},
{AND_C1A8,{3U,6U,0U}},
{AND_C1A8,{4U,6U,0U}},
{AND_C1A8,{5U,6U,0U}},
{AND_C1A8,{6U,6U,0U}},
{AND_C1A8,{7U,6U,0U}},
{AND_C1B0,{0U,6U,0U}},
{AND_C1B0,{1U,6U,0U}},
{AND_C1B0,{2U,6U,0U}},
{AND_C1B0,{3U,6U,0U}},
{AND_C1B0,{4U,6U,0U}},
{AND_C1B0,{5U,6U,0U}},
{AND_C1B0,{6U,6U,0U}},
{AND_C1B0,{7U,6U,0U}},
{AND_C1B8,{0U,6U,0U}},
{AND_C1B9,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1C0,{0U,6U,0U}},
{MULS_C1C0,{1U,6U,0U}},
{MULS_C1C0,{2U,6U,0U}},
{MULS_C1C0,{3U,6U,0U}},
{MULS_C1C0,{4U,6U,0U}},
{MULS_C1C0,{5U,6U,0U}},
{MULS_C1C0,{6U,6U,0U}},
{MULS_C1C0,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1D0,{0U,6U,0U}},
{MULS_C1D0,{1U,6U,0U}},
{MULS_C1D0,{2U,6U,0U}},
{MULS_C1D0,{3U,6U,0U}},
{MULS_C1D0,{4U,6U,0U}},
{MULS_C1D0,{5U,6U,0U}},
{MULS_C1D0,{6U,6U,0U}},
{MULS_C1D0,{7U,6U,0U}},
{MULS_C1D8,{0U,6U,0U}},
{MULS_C1D8,{1U,6U,0U}},
{MULS_C1D8,{2U,6U,0U}},
{MULS_C1D8,{3U,6U,0U}},
{MULS_C1D8,{4U,6U,0U}},
{MULS_C1D8,{5U,6U,0U}},
{MULS_C1D8,{6U,6U,0U}},
{MULS_C1D8,{7U,6U,0U}},
{MULS_C1E0,{0U,6U,0U}},
{MULS_C1E0,{1U,6U,0U}},
{MULS_C1E0,{2U,6U,0U}},
{MULS_C1E0,{3U,6U,0U}},
{MULS_C1E0,{4U,6U,0U}},
{MULS_C1E0,{5U,6U,0U}},
{MULS_C1E0,{6U,6U,0U}},
{MULS_C1E0,{7U,6U,0U}},
{MULS_C1E8,{0U,6U,0U}},
{MULS_C1E8,{1U,6U,0U}},
{MULS_C1E8,{2U,6U,0U}},
{MULS_C1E8,{3U,6U,0U}},
{MULS_C1E8,{4U,6U,0U}},
{MULS_C1E8,{5U,6U,0U}},
{MULS_C1E8,{6U,6U,0U}},
{MULS_C1E8,{7U,6U,0U}},
{MULS_C1F0,{0U,6U,0U}},
{MULS_C1F0,{1U,6U,0U}},
{MULS_C1F0,{2U,6U,0U}},
{MULS_C1F0,{3U,6U,0U}},
{MULS_C1F0,{4U,6U,0U}},
{MULS_C1F0,{5U,6U,0U}},
{MULS_C1F0,{6U,6U,0U}},
{MULS_C1F0,{7U,6U,0U}},
{MULS_C1F8,{0U,6U,0U}},
{MULS_C1F9,{0U,6U,0U}},
{MULS_C1FA,{0U,6U,0U}},
{MULS_C1FB,{0U,6U,0U}},
{MULS_C1FC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C000,{0U,7U,0U}},
{AND_C000,{1U,7U,0U}},
{AND_C000,{2U,7U,0U}},
{AND_C000,{3U,7U,0U}},
{AND_C000,{4U,7U,0U}},
{AND_C000,{5U,7U,0U}},
{AND_C000,{6U,7U,0U}},
{AND_C000,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C010,{0U,7U,0U}},
{AND_C010,{1U,7U,0U}},
{AND_C010,{2U,7U,0U}},
{AND_C010,{3U,7U,0U}},
{AND_C010,{4U,7U,0U}},
{AND_C010,{5U,7U,0U}},
{AND_C010,{6U,7U,0U}},
{AND_C010,{7U,7U,0U}},
{AND_C018,{0U,7U,0U}},
{AND_C018,{1U,7U,0U}},
{AND_C018,{2U,7U,0U}},
{AND_C018,{3U,7U,0U}},
{AND_C018,{4U,7U,0U}},
{AND_C018,{5U,7U,0U}},
{AND_C018,{6U,7U,0U}},
{AND_C018,{7U,7U,0U}},
{AND_C020,{0U,7U,0U}},
{AND_C020,{1U,7U,0U}},
{AND_C020,{2U,7U,0U}},
{AND_C020,{3U,7U,0U}},
{AND_C020,{4U,7U,0U}},
{AND_C020,{5U,7U,0U}},
{AND_C020,{6U,7U,0U}},
{AND_C020,{7U,7U,0U}},
{AND_C028,{0U,7U,0U}},
{AND_C028,{1U,7U,0U}},
{AND_C028,{2U,7U,0U}},
{AND_C028,{3U,7U,0U}},
{AND_C028,{4U,7U,0U}},
{AND_C028,{5U,7U,0U}},
{AND_C028,{6U,7U,0U}},
{AND_C028,{7U,7U,0U}},
{AND_C030,{0U,7U,0U}},
{AND_C030,{1U,7U,0U}},
{AND_C030,{2U,7U,0U}},
{AND_C030,{3U,7U,0U}},
{AND_C030,{4U,7U,0U}},
{AND_C030,{5U,7U,0U}},
{AND_C030,{6U,7U,0U}},
{AND_C030,{7U,7U,0U}},
{AND_C038,{0U,7U,0U}},
{AND_C039,{0U,7U,0U}},
{AND_C03A,{0U,7U,0U}},
{AND_C03B,{0U,7U,0U}},
{AND_C03C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C040,{0U,7U,0U}},
{AND_C040,{1U,7U,0U}},
{AND_C040,{2U,7U,0U}},
{AND_C040,{3U,7U,0U}},
{AND_C040,{4U,7U,0U}},
{AND_C040,{5U,7U,0U}},
{AND_C040,{6U,7U,0U}},
{AND_C040,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C050,{0U,7U,0U}},
{AND_C050,{1U,7U,0U}},
{AND_C050,{2U,7U,0U}},
{AND_C050,{3U,7U,0U}},
{AND_C050,{4U,7U,0U}},
{AND_C050,{5U,7U,0U}},
{AND_C050,{6U,7U,0U}},
{AND_C050,{7U,7U,0U}},
{AND_C058,{0U,7U,0U}},
{AND_C058,{1U,7U,0U}},
{AND_C058,{2U,7U,0U}},
{AND_C058,{3U,7U,0U}},
{AND_C058,{4U,7U,0U}},
{AND_C058,{5U,7U,0U}},
{AND_C058,{6U,7U,0U}},
{AND_C058,{7U,7U,0U}},
{AND_C060,{0U,7U,0U}},
{AND_C060,{1U,7U,0U}},
{AND_C060,{2U,7U,0U}},
{AND_C060,{3U,7U,0U}},
{AND_C060,{4U,7U,0U}},
{AND_C060,{5U,7U,0U}},
{AND_C060,{6U,7U,0U}},
{AND_C060,{7U,7U,0U}},
{AND_C068,{0U,7U,0U}},
{AND_C068,{1U,7U,0U}},
{AND_C068,{2U,7U,0U}},
{AND_C068,{3U,7U,0U}},
{AND_C068,{4U,7U,0U}},
{AND_C068,{5U,7U,0U}},
{AND_C068,{6U,7U,0U}},
{AND_C068,{7U,7U,0U}},
{AND_C070,{0U,7U,0U}},
{AND_C070,{1U,7U,0U}},
{AND_C070,{2U,7U,0U}},
{AND_C070,{3U,7U,0U}},
{AND_C070,{4U,7U,0U}},
{AND_C070,{5U,7U,0U}},
{AND_C070,{6U,7U,0U}},
{AND_C070,{7U,7U,0U}},
{AND_C078,{0U,7U,0U}},
{AND_C079,{0U,7U,0U}},
{AND_C07A,{0U,7U,0U}},
{AND_C07B,{0U,7U,0U}},
{AND_C07C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C080,{0U,7U,0U}},
{AND_C080,{1U,7U,0U}},
{AND_C080,{2U,7U,0U}},
{AND_C080,{3U,7U,0U}},
{AND_C080,{4U,7U,0U}},
{AND_C080,{5U,7U,0U}},
{AND_C080,{6U,7U,0U}},
{AND_C080,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{AND_C090,{0U,7U,0U}},
{AND_C090,{1U,7U,0U}},
{AND_C090,{2U,7U,0U}},
{AND_C090,{3U,7U,0U}},
{AND_C090,{4U,7U,0U}},
{AND_C090,{5U,7U,0U}},
{AND_C090,{6U,7U,0U}},
{AND_C090,{7U,7U,0U}},
{AND_C098,{0U,7U,0U}},
{AND_C098,{1U,7U,0U}},
{AND_C098,{2U,7U,0U}},
{AND_C098,{3U,7U,0U}},
{AND_C098,{4U,7U,0U}},
{AND_C098,{5U,7U,0U}},
{AND_C098,{6U,7U,0U}},
{AND_C098,{7U,7U,0U}},
{AND_C0A0,{0U,7U,0U}},
{AND_C0A0,{1U,7U,0U}},
{AND_C0A0,{2U,7U,0U}},
{AND_C0A0,{3U,7U,0U}},
{AND_C0A0,{4U,7U,0U}},
{AND_C0A0,{5U,7U,0U}},
{AND_C0A0,{6U,7U,0U}},
{AND_C0A0,{7U,7U,0U}},
{AND_C0A8,{0U,7U,0U}},
{AND_C0A8,{1U,7U,0U}},
{AND_C0A8,{2U,7U,0U}},
{AND_C0A8,{3U,7U,0U}},
{AND_C0A8,{4U,7U,0U}},
{AND_C0A8,{5U,7U,0U}},
{AND_C0A8,{6U,7U,0U}},
{AND_C0A8,{7U,7U,0U}},
{AND_C0B0,{0U,7U,0U}},
{AND_C0B0,{1U,7U,0U}},
{AND_C0B0,{2U,7U,0U}},
{AND_C0B0,{3U,7U,0U}},
{AND_C0B0,{4U,7U,0U}},
{AND_C0B0,{5U,7U,0U}},
{AND_C0B0,{6U,7U,0U}},
{AND_C0B0,{7U,7U,0U}},
{AND_C0B8,{0U,7U,0U}},
{AND_C0B9,{0U,7U,0U}},
{AND_C0BA,{0U,7U,0U}},
{AND_C0BB,{0U,7U,0U}},
{AND_C0BC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0C0,{0U,7U,0U}},
{MULU_C0C0,{1U,7U,0U}},
{MULU_C0C0,{2U,7U,0U}},
{MULU_C0C0,{3U,7U,0U}},
{MULU_C0C0,{4U,7U,0U}},
{MULU_C0C0,{5U,7U,0U}},
{MULU_C0C0,{6U,7U,0U}},
{MULU_C0C0,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULU_C0D0,{0U,7U,0U}},
{MULU_C0D0,{1U,7U,0U}},
{MULU_C0D0,{2U,7U,0U}},
{MULU_C0D0,{3U,7U,0U}},
{MULU_C0D0,{4U,7U,0U}},
{MULU_C0D0,{5U,7U,0U}},
{MULU_C0D0,{6U,7U,0U}},
{MULU_C0D0,{7U,7U,0U}},
{MULU_C0D8,{0U,7U,0U}},
{MULU_C0D8,{1U,7U,0U}},
{MULU_C0D8,{2U,7U,0U}},
{MULU_C0D8,{3U,7U,0U}},
{MULU_C0D8,{4U,7U,0U}},
{MULU_C0D8,{5U,7U,0U}},
{MULU_C0D8,{6U,7U,0U}},
{MULU_C0D8,{7U,7U,0U}},
{MULU_C0E0,{0U,7U,0U}},
{MULU_C0E0,{1U,7U,0U}},
{MULU_C0E0,{2U,7U,0U}},
{MULU_C0E0,{3U,7U,0U}},
{MULU_C0E0,{4U,7U,0U}},
{MULU_C0E0,{5U,7U,0U}},
{MULU_C0E0,{6U,7U,0U}},
{MULU_C0E0,{7U,7U,0U}},
{MULU_C0E8,{0U,7U,0U}},
{MULU_C0E8,{1U,7U,0U}},
{MULU_C0E8,{2U,7U,0U}},
{MULU_C0E8,{3U,7U,0U}},
{MULU_C0E8,{4U,7U,0U}},
{MULU_C0E8,{5U,7U,0U}},
{MULU_C0E8,{6U,7U,0U}},
{MULU_C0E8,{7U,7U,0U}},
{MULU_C0F0,{0U,7U,0U}},
{MULU_C0F0,{1U,7U,0U}},
{MULU_C0F0,{2U,7U,0U}},
{MULU_C0F0,{3U,7U,0U}},
{MULU_C0F0,{4U,7U,0U}},
{MULU_C0F0,{5U,7U,0U}},
{MULU_C0F0,{6U,7U,0U}},
{MULU_C0F0,{7U,7U,0U}},
{MULU_C0F8,{0U,7U,0U}},
{MULU_C0F9,{0U,7U,0U}},
{MULU_C0FA,{0U,7U,0U}},
{MULU_C0FB,{0U,7U,0U}},
{MULU_C0FC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ABCD_C100,{0U,7U,0U}},
{ABCD_C100,{1U,7U,0U}},
{ABCD_C100,{2U,7U,0U}},
{ABCD_C100,{3U,7U,0U}},
{ABCD_C100,{4U,7U,0U}},
{ABCD_C100,{5U,7U,0U}},
{ABCD_C100,{6U,7U,0U}},
{ABCD_C100,{7U,7U,0U}},
{ABCD_C108,{0U,7U,0U}},
{ABCD_C108,{1U,7U,0U}},
{ABCD_C108,{2U,7U,0U}},
{ABCD_C108,{3U,7U,0U}},
{ABCD_C108,{4U,7U,0U}},
{ABCD_C108,{5U,7U,0U}},
{ABCD_C108,{6U,7U,0U}},
{ABCD_C108,{7U,7U,0U}},
{AND_C110,{0U,7U,0U}},
{AND_C110,{1U,7U,0U}},
{AND_C110,{2U,7U,0U}},
{AND_C110,{3U,7U,0U}},
{AND_C110,{4U,7U,0U}},
{AND_C110,{5U,7U,0U}},
{AND_C110,{6U,7U,0U}},
{AND_C110,{7U,7U,0U}},
{AND_C118,{0U,7U,0U}},
{AND_C118,{1U,7U,0U}},
{AND_C118,{2U,7U,0U}},
{AND_C118,{3U,7U,0U}},
{AND_C118,{4U,7U,0U}},
{AND_C118,{5U,7U,0U}},
{AND_C118,{6U,7U,0U}},
{AND_C118,{7U,7U,0U}},
{AND_C120,{0U,7U,0U}},
{AND_C120,{1U,7U,0U}},
{AND_C120,{2U,7U,0U}},
{AND_C120,{3U,7U,0U}},
{AND_C120,{4U,7U,0U}},
{AND_C120,{5U,7U,0U}},
{AND_C120,{6U,7U,0U}},
{AND_C120,{7U,7U,0U}},
{AND_C128,{0U,7U,0U}},
{AND_C128,{1U,7U,0U}},
{AND_C128,{2U,7U,0U}},
{AND_C128,{3U,7U,0U}},
{AND_C128,{4U,7U,0U}},
{AND_C128,{5U,7U,0U}},
{AND_C128,{6U,7U,0U}},
{AND_C128,{7U,7U,0U}},
{AND_C130,{0U,7U,0U}},
{AND_C130,{1U,7U,0U}},
{AND_C130,{2U,7U,0U}},
{AND_C130,{3U,7U,0U}},
{AND_C130,{4U,7U,0U}},
{AND_C130,{5U,7U,0U}},
{AND_C130,{6U,7U,0U}},
{AND_C130,{7U,7U,0U}},
{AND_C138,{0U,7U,0U}},
{AND_C139,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C140,{7U,0U,0U}},
{EXG_C140,{7U,1U,0U}},
{EXG_C140,{7U,2U,0U}},
{EXG_C140,{7U,3U,0U}},
{EXG_C140,{7U,4U,0U}},
{EXG_C140,{7U,5U,0U}},
{EXG_C140,{7U,6U,0U}},
{EXG_C140,{7U,7U,0U}},
{EXG_C148,{7U,0U,0U}},
{EXG_C148,{7U,1U,0U}},
{EXG_C148,{7U,2U,0U}},
{EXG_C148,{7U,3U,0U}},
{EXG_C148,{7U,4U,0U}},
{EXG_C148,{7U,5U,0U}},
{EXG_C148,{7U,6U,0U}},
{EXG_C148,{7U,7U,0U}},
{AND_C150,{0U,7U,0U}},
{AND_C150,{1U,7U,0U}},
{AND_C150,{2U,7U,0U}},
{AND_C150,{3U,7U,0U}},
{AND_C150,{4U,7U,0U}},
{AND_C150,{5U,7U,0U}},
{AND_C150,{6U,7U,0U}},
{AND_C150,{7U,7U,0U}},
{AND_C158,{0U,7U,0U}},
{AND_C158,{1U,7U,0U}},
{AND_C158,{2U,7U,0U}},
{AND_C158,{3U,7U,0U}},
{AND_C158,{4U,7U,0U}},
{AND_C158,{5U,7U,0U}},
{AND_C158,{6U,7U,0U}},
{AND_C158,{7U,7U,0U}},
{AND_C160,{0U,7U,0U}},
{AND_C160,{1U,7U,0U}},
{AND_C160,{2U,7U,0U}},
{AND_C160,{3U,7U,0U}},
{AND_C160,{4U,7U,0U}},
{AND_C160,{5U,7U,0U}},
{AND_C160,{6U,7U,0U}},
{AND_C160,{7U,7U,0U}},
{AND_C168,{0U,7U,0U}},
{AND_C168,{1U,7U,0U}},
{AND_C168,{2U,7U,0U}},
{AND_C168,{3U,7U,0U}},
{AND_C168,{4U,7U,0U}},
{AND_C168,{5U,7U,0U}},
{AND_C168,{6U,7U,0U}},
{AND_C168,{7U,7U,0U}},
{AND_C170,{0U,7U,0U}},
{AND_C170,{1U,7U,0U}},
{AND_C170,{2U,7U,0U}},
{AND_C170,{3U,7U,0U}},
{AND_C170,{4U,7U,0U}},
{AND_C170,{5U,7U,0U}},
{AND_C170,{6U,7U,0U}},
{AND_C170,{7U,7U,0U}},
{AND_C178,{0U,7U,0U}},
{AND_C179,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{EXG_C188,{7U,0U,0U}},
{EXG_C188,{7U,1U,0U}},
{EXG_C188,{7U,2U,0U}},
{EXG_C188,{7U,3U,0U}},
{EXG_C188,{7U,4U,0U}},
{EXG_C188,{7U,5U,0U}},
{EXG_C188,{7U,6U,0U}},
{EXG_C188,{7U,7U,0U}},
{AND_C190,{0U,7U,0U}},
{AND_C190,{1U,7U,0U}},
{AND_C190,{2U,7U,0U}},
{AND_C190,{3U,7U,0U}},
{AND_C190,{4U,7U,0U}},
{AND_C190,{5U,7U,0U}},
{AND_C190,{6U,7U,0U}},
{AND_C190,{7U,7U,0U}},
{AND_C198,{0U,7U,0U}},
{AND_C198,{1U,7U,0U}},
{AND_C198,{2U,7U,0U}},
{AND_C198,{3U,7U,0U}},
{AND_C198,{4U,7U,0U}},
{AND_C198,{5U,7U,0U}},
{AND_C198,{6U,7U,0U}},
{AND_C198,{7U,7U,0U}},
{AND_C1A0,{0U,7U,0U}},
{AND_C1A0,{1U,7U,0U}},
{AND_C1A0,{2U,7U,0U}},
{AND_C1A0,{3U,7U,0U}},
{AND_C1A0,{4U,7U,0U}},
{AND_C1A0,{5U,7U,0U}},
{AND_C1A0,{6U,7U,0U}},
{AND_C1A0,{7U,7U,0U}},
{AND_C1A8,{0U,7U,0U}},
{AND_C1A8,{1U,7U,0U}},
{AND_C1A8,{2U,7U,0U}},
{AND_C1A8,{3U,7U,0U}},
{AND_C1A8,{4U,7U,0U}},
{AND_C1A8,{5U,7U,0U}},
{AND_C1A8,{6U,7U,0U}},
{AND_C1A8,{7U,7U,0U}},
{AND_C1B0,{0U,7U,0U}},
{AND_C1B0,{1U,7U,0U}},
{AND_C1B0,{2U,7U,0U}},
{AND_C1B0,{3U,7U,0U}},
{AND_C1B0,{4U,7U,0U}},
{AND_C1B0,{5U,7U,0U}},
{AND_C1B0,{6U,7U,0U}},
{AND_C1B0,{7U,7U,0U}},
{AND_C1B8,{0U,7U,0U}},
{AND_C1B9,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1C0,{0U,7U,0U}},
{MULS_C1C0,{1U,7U,0U}},
{MULS_C1C0,{2U,7U,0U}},
{MULS_C1C0,{3U,7U,0U}},
{MULS_C1C0,{4U,7U,0U}},
{MULS_C1C0,{5U,7U,0U}},
{MULS_C1C0,{6U,7U,0U}},
{MULS_C1C0,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{MULS_C1D0,{0U,7U,0U}},
{MULS_C1D0,{1U,7U,0U}},
{MULS_C1D0,{2U,7U,0U}},
{MULS_C1D0,{3U,7U,0U}},
{MULS_C1D0,{4U,7U,0U}},
{MULS_C1D0,{5U,7U,0U}},
{MULS_C1D0,{6U,7U,0U}},
{MULS_C1D0,{7U,7U,0U}},
{MULS_C1D8,{0U,7U,0U}},
{MULS_C1D8,{1U,7U,0U}},
{MULS_C1D8,{2U,7U,0U}},
{MULS_C1D8,{3U,7U,0U}},
{MULS_C1D8,{4U,7U,0U}},
{MULS_C1D8,{5U,7U,0U}},
{MULS_C1D8,{6U,7U,0U}},
{MULS_C1D8,{7U,7U,0U}},
{MULS_C1E0,{0U,7U,0U}},
{MULS_C1E0,{1U,7U,0U}},
{MULS_C1E0,{2U,7U,0U}},
{MULS_C1E0,{3U,7U,0U}},
{MULS_C1E0,{4U,7U,0U}},
{MULS_C1E0,{5U,7U,0U}},
{MULS_C1E0,{6U,7U,0U}},
{MULS_C1E0,{7U,7U,0U}},
{MULS_C1E8,{0U,7U,0U}},
{MULS_C1E8,{1U,7U,0U}},
{MULS_C1E8,{2U,7U,0U}},
{MULS_C1E8,{3U,7U,0U}},
{MULS_C1E8,{4U,7U,0U}},
{MULS_C1E8,{5U,7U,0U}},
{MULS_C1E8,{6U,7U,0U}},
{MULS_C1E8,{7U,7U,0U}},
{MULS_C1F0,{0U,7U,0U}},
{MULS_C1F0,{1U,7U,0U}},
{MULS_C1F0,{2U,7U,0U}},
{MULS_C1F0,{3U,7U,0U}},
{MULS_C1F0,{4U,7U,0U}},
{MULS_C1F0,{5U,7U,0U}},
{MULS_C1F0,{6U,7U,0U}},
{MULS_C1F0,{7U,7U,0U}},
{MULS_C1F8,{0U,7U,0U}},
{MULS_C1F9,{0U,7U,0U}},
{MULS_C1FA,{0U,7U,0U}},
{MULS_C1FB,{0U,7U,0U}},
{MULS_C1FC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D000,{0U,0U,0U}},
{ADD_D000,{1U,0U,0U}},
{ADD_D000,{2U,0U,0U}},
{ADD_D000,{3U,0U,0U}},
{ADD_D000,{4U,0U,0U}},
{ADD_D000,{5U,0U,0U}},
{ADD_D000,{6U,0U,0U}},
{ADD_D000,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D010,{0U,0U,0U}},
{ADD_D010,{1U,0U,0U}},
{ADD_D010,{2U,0U,0U}},
{ADD_D010,{3U,0U,0U}},
{ADD_D010,{4U,0U,0U}},
{ADD_D010,{5U,0U,0U}},
{ADD_D010,{6U,0U,0U}},
{ADD_D010,{7U,0U,0U}},
{ADD_D018,{0U,0U,0U}},
{ADD_D018,{1U,0U,0U}},
{ADD_D018,{2U,0U,0U}},
{ADD_D018,{3U,0U,0U}},
{ADD_D018,{4U,0U,0U}},
{ADD_D018,{5U,0U,0U}},
{ADD_D018,{6U,0U,0U}},
{ADD_D018,{7U,0U,0U}},
{ADD_D020,{0U,0U,0U}},
{ADD_D020,{1U,0U,0U}},
{ADD_D020,{2U,0U,0U}},
{ADD_D020,{3U,0U,0U}},
{ADD_D020,{4U,0U,0U}},
{ADD_D020,{5U,0U,0U}},
{ADD_D020,{6U,0U,0U}},
{ADD_D020,{7U,0U,0U}},
{ADD_D028,{0U,0U,0U}},
{ADD_D028,{1U,0U,0U}},
{ADD_D028,{2U,0U,0U}},
{ADD_D028,{3U,0U,0U}},
{ADD_D028,{4U,0U,0U}},
{ADD_D028,{5U,0U,0U}},
{ADD_D028,{6U,0U,0U}},
{ADD_D028,{7U,0U,0U}},
{ADD_D030,{0U,0U,0U}},
{ADD_D030,{1U,0U,0U}},
{ADD_D030,{2U,0U,0U}},
{ADD_D030,{3U,0U,0U}},
{ADD_D030,{4U,0U,0U}},
{ADD_D030,{5U,0U,0U}},
{ADD_D030,{6U,0U,0U}},
{ADD_D030,{7U,0U,0U}},
{ADD_D038,{0U,0U,0U}},
{ADD_D039,{0U,0U,0U}},
{ADD_D03A,{0U,0U,0U}},
{ADD_D03B,{0U,0U,0U}},
{ADD_D03C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D040,{0U,0U,0U}},
{ADD_D040,{1U,0U,0U}},
{ADD_D040,{2U,0U,0U}},
{ADD_D040,{3U,0U,0U}},
{ADD_D040,{4U,0U,0U}},
{ADD_D040,{5U,0U,0U}},
{ADD_D040,{6U,0U,0U}},
{ADD_D040,{7U,0U,0U}},
{ADD_D048,{0U,0U,0U}},
{ADD_D048,{1U,0U,0U}},
{ADD_D048,{2U,0U,0U}},
{ADD_D048,{3U,0U,0U}},
{ADD_D048,{4U,0U,0U}},
{ADD_D048,{5U,0U,0U}},
{ADD_D048,{6U,0U,0U}},
{ADD_D048,{7U,0U,0U}},
{ADD_D050,{0U,0U,0U}},
{ADD_D050,{1U,0U,0U}},
{ADD_D050,{2U,0U,0U}},
{ADD_D050,{3U,0U,0U}},
{ADD_D050,{4U,0U,0U}},
{ADD_D050,{5U,0U,0U}},
{ADD_D050,{6U,0U,0U}},
{ADD_D050,{7U,0U,0U}},
{ADD_D058,{0U,0U,0U}},
{ADD_D058,{1U,0U,0U}},
{ADD_D058,{2U,0U,0U}},
{ADD_D058,{3U,0U,0U}},
{ADD_D058,{4U,0U,0U}},
{ADD_D058,{5U,0U,0U}},
{ADD_D058,{6U,0U,0U}},
{ADD_D058,{7U,0U,0U}},
{ADD_D060,{0U,0U,0U}},
{ADD_D060,{1U,0U,0U}},
{ADD_D060,{2U,0U,0U}},
{ADD_D060,{3U,0U,0U}},
{ADD_D060,{4U,0U,0U}},
{ADD_D060,{5U,0U,0U}},
{ADD_D060,{6U,0U,0U}},
{ADD_D060,{7U,0U,0U}},
{ADD_D068,{0U,0U,0U}},
{ADD_D068,{1U,0U,0U}},
{ADD_D068,{2U,0U,0U}},
{ADD_D068,{3U,0U,0U}},
{ADD_D068,{4U,0U,0U}},
{ADD_D068,{5U,0U,0U}},
{ADD_D068,{6U,0U,0U}},
{ADD_D068,{7U,0U,0U}},
{ADD_D070,{0U,0U,0U}},
{ADD_D070,{1U,0U,0U}},
{ADD_D070,{2U,0U,0U}},
{ADD_D070,{3U,0U,0U}},
{ADD_D070,{4U,0U,0U}},
{ADD_D070,{5U,0U,0U}},
{ADD_D070,{6U,0U,0U}},
{ADD_D070,{7U,0U,0U}},
{ADD_D078,{0U,0U,0U}},
{ADD_D079,{0U,0U,0U}},
{ADD_D07A,{0U,0U,0U}},
{ADD_D07B,{0U,0U,0U}},
{ADD_D07C,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D080,{0U,0U,0U}},
{ADD_D080,{1U,0U,0U}},
{ADD_D080,{2U,0U,0U}},
{ADD_D080,{3U,0U,0U}},
{ADD_D080,{4U,0U,0U}},
{ADD_D080,{5U,0U,0U}},
{ADD_D080,{6U,0U,0U}},
{ADD_D080,{7U,0U,0U}},
{ADD_D088,{0U,0U,0U}},
{ADD_D088,{1U,0U,0U}},
{ADD_D088,{2U,0U,0U}},
{ADD_D088,{3U,0U,0U}},
{ADD_D088,{4U,0U,0U}},
{ADD_D088,{5U,0U,0U}},
{ADD_D088,{6U,0U,0U}},
{ADD_D088,{7U,0U,0U}},
{ADD_D090,{0U,0U,0U}},
{ADD_D090,{1U,0U,0U}},
{ADD_D090,{2U,0U,0U}},
{ADD_D090,{3U,0U,0U}},
{ADD_D090,{4U,0U,0U}},
{ADD_D090,{5U,0U,0U}},
{ADD_D090,{6U,0U,0U}},
{ADD_D090,{7U,0U,0U}},
{ADD_D098,{0U,0U,0U}},
{ADD_D098,{1U,0U,0U}},
{ADD_D098,{2U,0U,0U}},
{ADD_D098,{3U,0U,0U}},
{ADD_D098,{4U,0U,0U}},
{ADD_D098,{5U,0U,0U}},
{ADD_D098,{6U,0U,0U}},
{ADD_D098,{7U,0U,0U}},
{ADD_D0A0,{0U,0U,0U}},
{ADD_D0A0,{1U,0U,0U}},
{ADD_D0A0,{2U,0U,0U}},
{ADD_D0A0,{3U,0U,0U}},
{ADD_D0A0,{4U,0U,0U}},
{ADD_D0A0,{5U,0U,0U}},
{ADD_D0A0,{6U,0U,0U}},
{ADD_D0A0,{7U,0U,0U}},
{ADD_D0A8,{0U,0U,0U}},
{ADD_D0A8,{1U,0U,0U}},
{ADD_D0A8,{2U,0U,0U}},
{ADD_D0A8,{3U,0U,0U}},
{ADD_D0A8,{4U,0U,0U}},
{ADD_D0A8,{5U,0U,0U}},
{ADD_D0A8,{6U,0U,0U}},
{ADD_D0A8,{7U,0U,0U}},
{ADD_D0B0,{0U,0U,0U}},
{ADD_D0B0,{1U,0U,0U}},
{ADD_D0B0,{2U,0U,0U}},
{ADD_D0B0,{3U,0U,0U}},
{ADD_D0B0,{4U,0U,0U}},
{ADD_D0B0,{5U,0U,0U}},
{ADD_D0B0,{6U,0U,0U}},
{ADD_D0B0,{7U,0U,0U}},
{ADD_D0B8,{0U,0U,0U}},
{ADD_D0B9,{0U,0U,0U}},
{ADD_D0BA,{0U,0U,0U}},
{ADD_D0BB,{0U,0U,0U}},
{ADD_D0BC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D0C0,{0U,0U,0U}},
{ADDA_D0C0,{1U,0U,0U}},
{ADDA_D0C0,{2U,0U,0U}},
{ADDA_D0C0,{3U,0U,0U}},
{ADDA_D0C0,{4U,0U,0U}},
{ADDA_D0C0,{5U,0U,0U}},
{ADDA_D0C0,{6U,0U,0U}},
{ADDA_D0C0,{7U,0U,0U}},
{ADDA_D0C8,{0U,0U,0U}},
{ADDA_D0C8,{1U,0U,0U}},
{ADDA_D0C8,{2U,0U,0U}},
{ADDA_D0C8,{3U,0U,0U}},
{ADDA_D0C8,{4U,0U,0U}},
{ADDA_D0C8,{5U,0U,0U}},
{ADDA_D0C8,{6U,0U,0U}},
{ADDA_D0C8,{7U,0U,0U}},
{ADDA_D0D0,{0U,0U,0U}},
{ADDA_D0D0,{1U,0U,0U}},
{ADDA_D0D0,{2U,0U,0U}},
{ADDA_D0D0,{3U,0U,0U}},
{ADDA_D0D0,{4U,0U,0U}},
{ADDA_D0D0,{5U,0U,0U}},
{ADDA_D0D0,{6U,0U,0U}},
{ADDA_D0D0,{7U,0U,0U}},
{ADDA_D0D8,{0U,0U,0U}},
{ADDA_D0D8,{1U,0U,0U}},
{ADDA_D0D8,{2U,0U,0U}},
{ADDA_D0D8,{3U,0U,0U}},
{ADDA_D0D8,{4U,0U,0U}},
{ADDA_D0D8,{5U,0U,0U}},
{ADDA_D0D8,{6U,0U,0U}},
{ADDA_D0D8,{7U,0U,0U}},
{ADDA_D0E0,{0U,0U,0U}},
{ADDA_D0E0,{1U,0U,0U}},
{ADDA_D0E0,{2U,0U,0U}},
{ADDA_D0E0,{3U,0U,0U}},
{ADDA_D0E0,{4U,0U,0U}},
{ADDA_D0E0,{5U,0U,0U}},
{ADDA_D0E0,{6U,0U,0U}},
{ADDA_D0E0,{7U,0U,0U}},
{ADDA_D0E8,{0U,0U,0U}},
{ADDA_D0E8,{1U,0U,0U}},
{ADDA_D0E8,{2U,0U,0U}},
{ADDA_D0E8,{3U,0U,0U}},
{ADDA_D0E8,{4U,0U,0U}},
{ADDA_D0E8,{5U,0U,0U}},
{ADDA_D0E8,{6U,0U,0U}},
{ADDA_D0E8,{7U,0U,0U}},
{ADDA_D0F0,{0U,0U,0U}},
{ADDA_D0F0,{1U,0U,0U}},
{ADDA_D0F0,{2U,0U,0U}},
{ADDA_D0F0,{3U,0U,0U}},
{ADDA_D0F0,{4U,0U,0U}},
{ADDA_D0F0,{5U,0U,0U}},
{ADDA_D0F0,{6U,0U,0U}},
{ADDA_D0F0,{7U,0U,0U}},
{ADDA_D0F8,{0U,0U,0U}},
{ADDA_D0F9,{0U,0U,0U}},
{ADDA_D0FA,{0U,0U,0U}},
{ADDA_D0FB,{0U,0U,0U}},
{ADDA_D0FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D100,{0U,0U,0U}},
{ADDX_D100,{1U,0U,0U}},
{ADDX_D100,{2U,0U,0U}},
{ADDX_D100,{3U,0U,0U}},
{ADDX_D100,{4U,0U,0U}},
{ADDX_D100,{5U,0U,0U}},
{ADDX_D100,{6U,0U,0U}},
{ADDX_D100,{7U,0U,0U}},
{ADDX_D108,{0U,0U,0U}},
{ADDX_D108,{1U,0U,0U}},
{ADDX_D108,{2U,0U,0U}},
{ADDX_D108,{3U,0U,0U}},
{ADDX_D108,{4U,0U,0U}},
{ADDX_D108,{5U,0U,0U}},
{ADDX_D108,{6U,0U,0U}},
{ADDX_D108,{7U,0U,0U}},
{ADD_D110,{0U,0U,0U}},
{ADD_D110,{1U,0U,0U}},
{ADD_D110,{2U,0U,0U}},
{ADD_D110,{3U,0U,0U}},
{ADD_D110,{4U,0U,0U}},
{ADD_D110,{5U,0U,0U}},
{ADD_D110,{6U,0U,0U}},
{ADD_D110,{7U,0U,0U}},
{ADD_D118,{0U,0U,0U}},
{ADD_D118,{1U,0U,0U}},
{ADD_D118,{2U,0U,0U}},
{ADD_D118,{3U,0U,0U}},
{ADD_D118,{4U,0U,0U}},
{ADD_D118,{5U,0U,0U}},
{ADD_D118,{6U,0U,0U}},
{ADD_D118,{7U,0U,0U}},
{ADD_D120,{0U,0U,0U}},
{ADD_D120,{1U,0U,0U}},
{ADD_D120,{2U,0U,0U}},
{ADD_D120,{3U,0U,0U}},
{ADD_D120,{4U,0U,0U}},
{ADD_D120,{5U,0U,0U}},
{ADD_D120,{6U,0U,0U}},
{ADD_D120,{7U,0U,0U}},
{ADD_D128,{0U,0U,0U}},
{ADD_D128,{1U,0U,0U}},
{ADD_D128,{2U,0U,0U}},
{ADD_D128,{3U,0U,0U}},
{ADD_D128,{4U,0U,0U}},
{ADD_D128,{5U,0U,0U}},
{ADD_D128,{6U,0U,0U}},
{ADD_D128,{7U,0U,0U}},
{ADD_D130,{0U,0U,0U}},
{ADD_D130,{1U,0U,0U}},
{ADD_D130,{2U,0U,0U}},
{ADD_D130,{3U,0U,0U}},
{ADD_D130,{4U,0U,0U}},
{ADD_D130,{5U,0U,0U}},
{ADD_D130,{6U,0U,0U}},
{ADD_D130,{7U,0U,0U}},
{ADD_D138,{0U,0U,0U}},
{ADD_D139,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D140,{0U,0U,0U}},
{ADDX_D140,{1U,0U,0U}},
{ADDX_D140,{2U,0U,0U}},
{ADDX_D140,{3U,0U,0U}},
{ADDX_D140,{4U,0U,0U}},
{ADDX_D140,{5U,0U,0U}},
{ADDX_D140,{6U,0U,0U}},
{ADDX_D140,{7U,0U,0U}},
{ADDX_D148,{0U,0U,0U}},
{ADDX_D148,{1U,0U,0U}},
{ADDX_D148,{2U,0U,0U}},
{ADDX_D148,{3U,0U,0U}},
{ADDX_D148,{4U,0U,0U}},
{ADDX_D148,{5U,0U,0U}},
{ADDX_D148,{6U,0U,0U}},
{ADDX_D148,{7U,0U,0U}},
{ADD_D150,{0U,0U,0U}},
{ADD_D150,{1U,0U,0U}},
{ADD_D150,{2U,0U,0U}},
{ADD_D150,{3U,0U,0U}},
{ADD_D150,{4U,0U,0U}},
{ADD_D150,{5U,0U,0U}},
{ADD_D150,{6U,0U,0U}},
{ADD_D150,{7U,0U,0U}},
{ADD_D158,{0U,0U,0U}},
{ADD_D158,{1U,0U,0U}},
{ADD_D158,{2U,0U,0U}},
{ADD_D158,{3U,0U,0U}},
{ADD_D158,{4U,0U,0U}},
{ADD_D158,{5U,0U,0U}},
{ADD_D158,{6U,0U,0U}},
{ADD_D158,{7U,0U,0U}},
{ADD_D160,{0U,0U,0U}},
{ADD_D160,{1U,0U,0U}},
{ADD_D160,{2U,0U,0U}},
{ADD_D160,{3U,0U,0U}},
{ADD_D160,{4U,0U,0U}},
{ADD_D160,{5U,0U,0U}},
{ADD_D160,{6U,0U,0U}},
{ADD_D160,{7U,0U,0U}},
{ADD_D168,{0U,0U,0U}},
{ADD_D168,{1U,0U,0U}},
{ADD_D168,{2U,0U,0U}},
{ADD_D168,{3U,0U,0U}},
{ADD_D168,{4U,0U,0U}},
{ADD_D168,{5U,0U,0U}},
{ADD_D168,{6U,0U,0U}},
{ADD_D168,{7U,0U,0U}},
{ADD_D170,{0U,0U,0U}},
{ADD_D170,{1U,0U,0U}},
{ADD_D170,{2U,0U,0U}},
{ADD_D170,{3U,0U,0U}},
{ADD_D170,{4U,0U,0U}},
{ADD_D170,{5U,0U,0U}},
{ADD_D170,{6U,0U,0U}},
{ADD_D170,{7U,0U,0U}},
{ADD_D178,{0U,0U,0U}},
{ADD_D179,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D180,{0U,0U,0U}},
{ADDX_D180,{1U,0U,0U}},
{ADDX_D180,{2U,0U,0U}},
{ADDX_D180,{3U,0U,0U}},
{ADDX_D180,{4U,0U,0U}},
{ADDX_D180,{5U,0U,0U}},
{ADDX_D180,{6U,0U,0U}},
{ADDX_D180,{7U,0U,0U}},
{ADDX_D188,{0U,0U,0U}},
{ADDX_D188,{1U,0U,0U}},
{ADDX_D188,{2U,0U,0U}},
{ADDX_D188,{3U,0U,0U}},
{ADDX_D188,{4U,0U,0U}},
{ADDX_D188,{5U,0U,0U}},
{ADDX_D188,{6U,0U,0U}},
{ADDX_D188,{7U,0U,0U}},
{ADD_D190,{0U,0U,0U}},
{ADD_D190,{1U,0U,0U}},
{ADD_D190,{2U,0U,0U}},
{ADD_D190,{3U,0U,0U}},
{ADD_D190,{4U,0U,0U}},
{ADD_D190,{5U,0U,0U}},
{ADD_D190,{6U,0U,0U}},
{ADD_D190,{7U,0U,0U}},
{ADD_D198,{0U,0U,0U}},
{ADD_D198,{1U,0U,0U}},
{ADD_D198,{2U,0U,0U}},
{ADD_D198,{3U,0U,0U}},
{ADD_D198,{4U,0U,0U}},
{ADD_D198,{5U,0U,0U}},
{ADD_D198,{6U,0U,0U}},
{ADD_D198,{7U,0U,0U}},
{ADD_D1A0,{0U,0U,0U}},
{ADD_D1A0,{1U,0U,0U}},
{ADD_D1A0,{2U,0U,0U}},
{ADD_D1A0,{3U,0U,0U}},
{ADD_D1A0,{4U,0U,0U}},
{ADD_D1A0,{5U,0U,0U}},
{ADD_D1A0,{6U,0U,0U}},
{ADD_D1A0,{7U,0U,0U}},
{ADD_D1A8,{0U,0U,0U}},
{ADD_D1A8,{1U,0U,0U}},
{ADD_D1A8,{2U,0U,0U}},
{ADD_D1A8,{3U,0U,0U}},
{ADD_D1A8,{4U,0U,0U}},
{ADD_D1A8,{5U,0U,0U}},
{ADD_D1A8,{6U,0U,0U}},
{ADD_D1A8,{7U,0U,0U}},
{ADD_D1B0,{0U,0U,0U}},
{ADD_D1B0,{1U,0U,0U}},
{ADD_D1B0,{2U,0U,0U}},
{ADD_D1B0,{3U,0U,0U}},
{ADD_D1B0,{4U,0U,0U}},
{ADD_D1B0,{5U,0U,0U}},
{ADD_D1B0,{6U,0U,0U}},
{ADD_D1B0,{7U,0U,0U}},
{ADD_D1B8,{0U,0U,0U}},
{ADD_D1B9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D1C0,{0U,0U,0U}},
{ADDA_D1C0,{1U,0U,0U}},
{ADDA_D1C0,{2U,0U,0U}},
{ADDA_D1C0,{3U,0U,0U}},
{ADDA_D1C0,{4U,0U,0U}},
{ADDA_D1C0,{5U,0U,0U}},
{ADDA_D1C0,{6U,0U,0U}},
{ADDA_D1C0,{7U,0U,0U}},
{ADDA_D1C8,{0U,0U,0U}},
{ADDA_D1C8,{1U,0U,0U}},
{ADDA_D1C8,{2U,0U,0U}},
{ADDA_D1C8,{3U,0U,0U}},
{ADDA_D1C8,{4U,0U,0U}},
{ADDA_D1C8,{5U,0U,0U}},
{ADDA_D1C8,{6U,0U,0U}},
{ADDA_D1C8,{7U,0U,0U}},
{ADDA_D1D0,{0U,0U,0U}},
{ADDA_D1D0,{1U,0U,0U}},
{ADDA_D1D0,{2U,0U,0U}},
{ADDA_D1D0,{3U,0U,0U}},
{ADDA_D1D0,{4U,0U,0U}},
{ADDA_D1D0,{5U,0U,0U}},
{ADDA_D1D0,{6U,0U,0U}},
{ADDA_D1D0,{7U,0U,0U}},
{ADDA_D1D8,{0U,0U,0U}},
{ADDA_D1D8,{1U,0U,0U}},
{ADDA_D1D8,{2U,0U,0U}},
{ADDA_D1D8,{3U,0U,0U}},
{ADDA_D1D8,{4U,0U,0U}},
{ADDA_D1D8,{5U,0U,0U}},
{ADDA_D1D8,{6U,0U,0U}},
{ADDA_D1D8,{7U,0U,0U}},
{ADDA_D1E0,{0U,0U,0U}},
{ADDA_D1E0,{1U,0U,0U}},
{ADDA_D1E0,{2U,0U,0U}},
{ADDA_D1E0,{3U,0U,0U}},
{ADDA_D1E0,{4U,0U,0U}},
{ADDA_D1E0,{5U,0U,0U}},
{ADDA_D1E0,{6U,0U,0U}},
{ADDA_D1E0,{7U,0U,0U}},
{ADDA_D1E8,{0U,0U,0U}},
{ADDA_D1E8,{1U,0U,0U}},
{ADDA_D1E8,{2U,0U,0U}},
{ADDA_D1E8,{3U,0U,0U}},
{ADDA_D1E8,{4U,0U,0U}},
{ADDA_D1E8,{5U,0U,0U}},
{ADDA_D1E8,{6U,0U,0U}},
{ADDA_D1E8,{7U,0U,0U}},
{ADDA_D1F0,{0U,0U,0U}},
{ADDA_D1F0,{1U,0U,0U}},
{ADDA_D1F0,{2U,0U,0U}},
{ADDA_D1F0,{3U,0U,0U}},
{ADDA_D1F0,{4U,0U,0U}},
{ADDA_D1F0,{5U,0U,0U}},
{ADDA_D1F0,{6U,0U,0U}},
{ADDA_D1F0,{7U,0U,0U}},
{ADDA_D1F8,{0U,0U,0U}},
{ADDA_D1F9,{0U,0U,0U}},
{ADDA_D1FA,{0U,0U,0U}},
{ADDA_D1FB,{0U,0U,0U}},
{ADDA_D1FC,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D000,{0U,1U,0U}},
{ADD_D000,{1U,1U,0U}},
{ADD_D000,{2U,1U,0U}},
{ADD_D000,{3U,1U,0U}},
{ADD_D000,{4U,1U,0U}},
{ADD_D000,{5U,1U,0U}},
{ADD_D000,{6U,1U,0U}},
{ADD_D000,{7U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D010,{0U,1U,0U}},
{ADD_D010,{1U,1U,0U}},
{ADD_D010,{2U,1U,0U}},
{ADD_D010,{3U,1U,0U}},
{ADD_D010,{4U,1U,0U}},
{ADD_D010,{5U,1U,0U}},
{ADD_D010,{6U,1U,0U}},
{ADD_D010,{7U,1U,0U}},
{ADD_D018,{0U,1U,0U}},
{ADD_D018,{1U,1U,0U}},
{ADD_D018,{2U,1U,0U}},
{ADD_D018,{3U,1U,0U}},
{ADD_D018,{4U,1U,0U}},
{ADD_D018,{5U,1U,0U}},
{ADD_D018,{6U,1U,0U}},
{ADD_D018,{7U,1U,0U}},
{ADD_D020,{0U,1U,0U}},
{ADD_D020,{1U,1U,0U}},
{ADD_D020,{2U,1U,0U}},
{ADD_D020,{3U,1U,0U}},
{ADD_D020,{4U,1U,0U}},
{ADD_D020,{5U,1U,0U}},
{ADD_D020,{6U,1U,0U}},
{ADD_D020,{7U,1U,0U}},
{ADD_D028,{0U,1U,0U}},
{ADD_D028,{1U,1U,0U}},
{ADD_D028,{2U,1U,0U}},
{ADD_D028,{3U,1U,0U}},
{ADD_D028,{4U,1U,0U}},
{ADD_D028,{5U,1U,0U}},
{ADD_D028,{6U,1U,0U}},
{ADD_D028,{7U,1U,0U}},
{ADD_D030,{0U,1U,0U}},
{ADD_D030,{1U,1U,0U}},
{ADD_D030,{2U,1U,0U}},
{ADD_D030,{3U,1U,0U}},
{ADD_D030,{4U,1U,0U}},
{ADD_D030,{5U,1U,0U}},
{ADD_D030,{6U,1U,0U}},
{ADD_D030,{7U,1U,0U}},
{ADD_D038,{0U,1U,0U}},
{ADD_D039,{0U,1U,0U}},
{ADD_D03A,{0U,1U,0U}},
{ADD_D03B,{0U,1U,0U}},
{ADD_D03C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D040,{0U,1U,0U}},
{ADD_D040,{1U,1U,0U}},
{ADD_D040,{2U,1U,0U}},
{ADD_D040,{3U,1U,0U}},
{ADD_D040,{4U,1U,0U}},
{ADD_D040,{5U,1U,0U}},
{ADD_D040,{6U,1U,0U}},
{ADD_D040,{7U,1U,0U}},
{ADD_D048,{0U,1U,0U}},
{ADD_D048,{1U,1U,0U}},
{ADD_D048,{2U,1U,0U}},
{ADD_D048,{3U,1U,0U}},
{ADD_D048,{4U,1U,0U}},
{ADD_D048,{5U,1U,0U}},
{ADD_D048,{6U,1U,0U}},
{ADD_D048,{7U,1U,0U}},
{ADD_D050,{0U,1U,0U}},
{ADD_D050,{1U,1U,0U}},
{ADD_D050,{2U,1U,0U}},
{ADD_D050,{3U,1U,0U}},
{ADD_D050,{4U,1U,0U}},
{ADD_D050,{5U,1U,0U}},
{ADD_D050,{6U,1U,0U}},
{ADD_D050,{7U,1U,0U}},
{ADD_D058,{0U,1U,0U}},
{ADD_D058,{1U,1U,0U}},
{ADD_D058,{2U,1U,0U}},
{ADD_D058,{3U,1U,0U}},
{ADD_D058,{4U,1U,0U}},
{ADD_D058,{5U,1U,0U}},
{ADD_D058,{6U,1U,0U}},
{ADD_D058,{7U,1U,0U}},
{ADD_D060,{0U,1U,0U}},
{ADD_D060,{1U,1U,0U}},
{ADD_D060,{2U,1U,0U}},
{ADD_D060,{3U,1U,0U}},
{ADD_D060,{4U,1U,0U}},
{ADD_D060,{5U,1U,0U}},
{ADD_D060,{6U,1U,0U}},
{ADD_D060,{7U,1U,0U}},
{ADD_D068,{0U,1U,0U}},
{ADD_D068,{1U,1U,0U}},
{ADD_D068,{2U,1U,0U}},
{ADD_D068,{3U,1U,0U}},
{ADD_D068,{4U,1U,0U}},
{ADD_D068,{5U,1U,0U}},
{ADD_D068,{6U,1U,0U}},
{ADD_D068,{7U,1U,0U}},
{ADD_D070,{0U,1U,0U}},
{ADD_D070,{1U,1U,0U}},
{ADD_D070,{2U,1U,0U}},
{ADD_D070,{3U,1U,0U}},
{ADD_D070,{4U,1U,0U}},
{ADD_D070,{5U,1U,0U}},
{ADD_D070,{6U,1U,0U}},
{ADD_D070,{7U,1U,0U}},
{ADD_D078,{0U,1U,0U}},
{ADD_D079,{0U,1U,0U}},
{ADD_D07A,{0U,1U,0U}},
{ADD_D07B,{0U,1U,0U}},
{ADD_D07C,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D080,{0U,1U,0U}},
{ADD_D080,{1U,1U,0U}},
{ADD_D080,{2U,1U,0U}},
{ADD_D080,{3U,1U,0U}},
{ADD_D080,{4U,1U,0U}},
{ADD_D080,{5U,1U,0U}},
{ADD_D080,{6U,1U,0U}},
{ADD_D080,{7U,1U,0U}},
{ADD_D088,{0U,1U,0U}},
{ADD_D088,{1U,1U,0U}},
{ADD_D088,{2U,1U,0U}},
{ADD_D088,{3U,1U,0U}},
{ADD_D088,{4U,1U,0U}},
{ADD_D088,{5U,1U,0U}},
{ADD_D088,{6U,1U,0U}},
{ADD_D088,{7U,1U,0U}},
{ADD_D090,{0U,1U,0U}},
{ADD_D090,{1U,1U,0U}},
{ADD_D090,{2U,1U,0U}},
{ADD_D090,{3U,1U,0U}},
{ADD_D090,{4U,1U,0U}},
{ADD_D090,{5U,1U,0U}},
{ADD_D090,{6U,1U,0U}},
{ADD_D090,{7U,1U,0U}},
{ADD_D098,{0U,1U,0U}},
{ADD_D098,{1U,1U,0U}},
{ADD_D098,{2U,1U,0U}},
{ADD_D098,{3U,1U,0U}},
{ADD_D098,{4U,1U,0U}},
{ADD_D098,{5U,1U,0U}},
{ADD_D098,{6U,1U,0U}},
{ADD_D098,{7U,1U,0U}},
{ADD_D0A0,{0U,1U,0U}},
{ADD_D0A0,{1U,1U,0U}},
{ADD_D0A0,{2U,1U,0U}},
{ADD_D0A0,{3U,1U,0U}},
{ADD_D0A0,{4U,1U,0U}},
{ADD_D0A0,{5U,1U,0U}},
{ADD_D0A0,{6U,1U,0U}},
{ADD_D0A0,{7U,1U,0U}},
{ADD_D0A8,{0U,1U,0U}},
{ADD_D0A8,{1U,1U,0U}},
{ADD_D0A8,{2U,1U,0U}},
{ADD_D0A8,{3U,1U,0U}},
{ADD_D0A8,{4U,1U,0U}},
{ADD_D0A8,{5U,1U,0U}},
{ADD_D0A8,{6U,1U,0U}},
{ADD_D0A8,{7U,1U,0U}},
{ADD_D0B0,{0U,1U,0U}},
{ADD_D0B0,{1U,1U,0U}},
{ADD_D0B0,{2U,1U,0U}},
{ADD_D0B0,{3U,1U,0U}},
{ADD_D0B0,{4U,1U,0U}},
{ADD_D0B0,{5U,1U,0U}},
{ADD_D0B0,{6U,1U,0U}},
{ADD_D0B0,{7U,1U,0U}},
{ADD_D0B8,{0U,1U,0U}},
{ADD_D0B9,{0U,1U,0U}},
{ADD_D0BA,{0U,1U,0U}},
{ADD_D0BB,{0U,1U,0U}},
{ADD_D0BC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D0C0,{0U,1U,0U}},
{ADDA_D0C0,{1U,1U,0U}},
{ADDA_D0C0,{2U,1U,0U}},
{ADDA_D0C0,{3U,1U,0U}},
{ADDA_D0C0,{4U,1U,0U}},
{ADDA_D0C0,{5U,1U,0U}},
{ADDA_D0C0,{6U,1U,0U}},
{ADDA_D0C0,{7U,1U,0U}},
{ADDA_D0C8,{0U,1U,0U}},
{ADDA_D0C8,{1U,1U,0U}},
{ADDA_D0C8,{2U,1U,0U}},
{ADDA_D0C8,{3U,1U,0U}},
{ADDA_D0C8,{4U,1U,0U}},
{ADDA_D0C8,{5U,1U,0U}},
{ADDA_D0C8,{6U,1U,0U}},
{ADDA_D0C8,{7U,1U,0U}},
{ADDA_D0D0,{0U,1U,0U}},
{ADDA_D0D0,{1U,1U,0U}},
{ADDA_D0D0,{2U,1U,0U}},
{ADDA_D0D0,{3U,1U,0U}},
{ADDA_D0D0,{4U,1U,0U}},
{ADDA_D0D0,{5U,1U,0U}},
{ADDA_D0D0,{6U,1U,0U}},
{ADDA_D0D0,{7U,1U,0U}},
{ADDA_D0D8,{0U,1U,0U}},
{ADDA_D0D8,{1U,1U,0U}},
{ADDA_D0D8,{2U,1U,0U}},
{ADDA_D0D8,{3U,1U,0U}},
{ADDA_D0D8,{4U,1U,0U}},
{ADDA_D0D8,{5U,1U,0U}},
{ADDA_D0D8,{6U,1U,0U}},
{ADDA_D0D8,{7U,1U,0U}},
{ADDA_D0E0,{0U,1U,0U}},
{ADDA_D0E0,{1U,1U,0U}},
{ADDA_D0E0,{2U,1U,0U}},
{ADDA_D0E0,{3U,1U,0U}},
{ADDA_D0E0,{4U,1U,0U}},
{ADDA_D0E0,{5U,1U,0U}},
{ADDA_D0E0,{6U,1U,0U}},
{ADDA_D0E0,{7U,1U,0U}},
{ADDA_D0E8,{0U,1U,0U}},
{ADDA_D0E8,{1U,1U,0U}},
{ADDA_D0E8,{2U,1U,0U}},
{ADDA_D0E8,{3U,1U,0U}},
{ADDA_D0E8,{4U,1U,0U}},
{ADDA_D0E8,{5U,1U,0U}},
{ADDA_D0E8,{6U,1U,0U}},
{ADDA_D0E8,{7U,1U,0U}},
{ADDA_D0F0,{0U,1U,0U}},
{ADDA_D0F0,{1U,1U,0U}},
{ADDA_D0F0,{2U,1U,0U}},
{ADDA_D0F0,{3U,1U,0U}},
{ADDA_D0F0,{4U,1U,0U}},
{ADDA_D0F0,{5U,1U,0U}},
{ADDA_D0F0,{6U,1U,0U}},
{ADDA_D0F0,{7U,1U,0U}},
{ADDA_D0F8,{0U,1U,0U}},
{ADDA_D0F9,{0U,1U,0U}},
{ADDA_D0FA,{0U,1U,0U}},
{ADDA_D0FB,{0U,1U,0U}},
{ADDA_D0FC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D100,{0U,1U,0U}},
{ADDX_D100,{1U,1U,0U}},
{ADDX_D100,{2U,1U,0U}},
{ADDX_D100,{3U,1U,0U}},
{ADDX_D100,{4U,1U,0U}},
{ADDX_D100,{5U,1U,0U}},
{ADDX_D100,{6U,1U,0U}},
{ADDX_D100,{7U,1U,0U}},
{ADDX_D108,{0U,1U,0U}},
{ADDX_D108,{1U,1U,0U}},
{ADDX_D108,{2U,1U,0U}},
{ADDX_D108,{3U,1U,0U}},
{ADDX_D108,{4U,1U,0U}},
{ADDX_D108,{5U,1U,0U}},
{ADDX_D108,{6U,1U,0U}},
{ADDX_D108,{7U,1U,0U}},
{ADD_D110,{0U,1U,0U}},
{ADD_D110,{1U,1U,0U}},
{ADD_D110,{2U,1U,0U}},
{ADD_D110,{3U,1U,0U}},
{ADD_D110,{4U,1U,0U}},
{ADD_D110,{5U,1U,0U}},
{ADD_D110,{6U,1U,0U}},
{ADD_D110,{7U,1U,0U}},
{ADD_D118,{0U,1U,0U}},
{ADD_D118,{1U,1U,0U}},
{ADD_D118,{2U,1U,0U}},
{ADD_D118,{3U,1U,0U}},
{ADD_D118,{4U,1U,0U}},
{ADD_D118,{5U,1U,0U}},
{ADD_D118,{6U,1U,0U}},
{ADD_D118,{7U,1U,0U}},
{ADD_D120,{0U,1U,0U}},
{ADD_D120,{1U,1U,0U}},
{ADD_D120,{2U,1U,0U}},
{ADD_D120,{3U,1U,0U}},
{ADD_D120,{4U,1U,0U}},
{ADD_D120,{5U,1U,0U}},
{ADD_D120,{6U,1U,0U}},
{ADD_D120,{7U,1U,0U}},
{ADD_D128,{0U,1U,0U}},
{ADD_D128,{1U,1U,0U}},
{ADD_D128,{2U,1U,0U}},
{ADD_D128,{3U,1U,0U}},
{ADD_D128,{4U,1U,0U}},
{ADD_D128,{5U,1U,0U}},
{ADD_D128,{6U,1U,0U}},
{ADD_D128,{7U,1U,0U}},
{ADD_D130,{0U,1U,0U}},
{ADD_D130,{1U,1U,0U}},
{ADD_D130,{2U,1U,0U}},
{ADD_D130,{3U,1U,0U}},
{ADD_D130,{4U,1U,0U}},
{ADD_D130,{5U,1U,0U}},
{ADD_D130,{6U,1U,0U}},
{ADD_D130,{7U,1U,0U}},
{ADD_D138,{0U,1U,0U}},
{ADD_D139,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D140,{0U,1U,0U}},
{ADDX_D140,{1U,1U,0U}},
{ADDX_D140,{2U,1U,0U}},
{ADDX_D140,{3U,1U,0U}},
{ADDX_D140,{4U,1U,0U}},
{ADDX_D140,{5U,1U,0U}},
{ADDX_D140,{6U,1U,0U}},
{ADDX_D140,{7U,1U,0U}},
{ADDX_D148,{0U,1U,0U}},
{ADDX_D148,{1U,1U,0U}},
{ADDX_D148,{2U,1U,0U}},
{ADDX_D148,{3U,1U,0U}},
{ADDX_D148,{4U,1U,0U}},
{ADDX_D148,{5U,1U,0U}},
{ADDX_D148,{6U,1U,0U}},
{ADDX_D148,{7U,1U,0U}},
{ADD_D150,{0U,1U,0U}},
{ADD_D150,{1U,1U,0U}},
{ADD_D150,{2U,1U,0U}},
{ADD_D150,{3U,1U,0U}},
{ADD_D150,{4U,1U,0U}},
{ADD_D150,{5U,1U,0U}},
{ADD_D150,{6U,1U,0U}},
{ADD_D150,{7U,1U,0U}},
{ADD_D158,{0U,1U,0U}},
{ADD_D158,{1U,1U,0U}},
{ADD_D158,{2U,1U,0U}},
{ADD_D158,{3U,1U,0U}},
{ADD_D158,{4U,1U,0U}},
{ADD_D158,{5U,1U,0U}},
{ADD_D158,{6U,1U,0U}},
{ADD_D158,{7U,1U,0U}},
{ADD_D160,{0U,1U,0U}},
{ADD_D160,{1U,1U,0U}},
{ADD_D160,{2U,1U,0U}},
{ADD_D160,{3U,1U,0U}},
{ADD_D160,{4U,1U,0U}},
{ADD_D160,{5U,1U,0U}},
{ADD_D160,{6U,1U,0U}},
{ADD_D160,{7U,1U,0U}},
{ADD_D168,{0U,1U,0U}},
{ADD_D168,{1U,1U,0U}},
{ADD_D168,{2U,1U,0U}},
{ADD_D168,{3U,1U,0U}},
{ADD_D168,{4U,1U,0U}},
{ADD_D168,{5U,1U,0U}},
{ADD_D168,{6U,1U,0U}},
{ADD_D168,{7U,1U,0U}},
{ADD_D170,{0U,1U,0U}},
{ADD_D170,{1U,1U,0U}},
{ADD_D170,{2U,1U,0U}},
{ADD_D170,{3U,1U,0U}},
{ADD_D170,{4U,1U,0U}},
{ADD_D170,{5U,1U,0U}},
{ADD_D170,{6U,1U,0U}},
{ADD_D170,{7U,1U,0U}},
{ADD_D178,{0U,1U,0U}},
{ADD_D179,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D180,{0U,1U,0U}},
{ADDX_D180,{1U,1U,0U}},
{ADDX_D180,{2U,1U,0U}},
{ADDX_D180,{3U,1U,0U}},
{ADDX_D180,{4U,1U,0U}},
{ADDX_D180,{5U,1U,0U}},
{ADDX_D180,{6U,1U,0U}},
{ADDX_D180,{7U,1U,0U}},
{ADDX_D188,{0U,1U,0U}},
{ADDX_D188,{1U,1U,0U}},
{ADDX_D188,{2U,1U,0U}},
{ADDX_D188,{3U,1U,0U}},
{ADDX_D188,{4U,1U,0U}},
{ADDX_D188,{5U,1U,0U}},
{ADDX_D188,{6U,1U,0U}},
{ADDX_D188,{7U,1U,0U}},
{ADD_D190,{0U,1U,0U}},
{ADD_D190,{1U,1U,0U}},
{ADD_D190,{2U,1U,0U}},
{ADD_D190,{3U,1U,0U}},
{ADD_D190,{4U,1U,0U}},
{ADD_D190,{5U,1U,0U}},
{ADD_D190,{6U,1U,0U}},
{ADD_D190,{7U,1U,0U}},
{ADD_D198,{0U,1U,0U}},
{ADD_D198,{1U,1U,0U}},
{ADD_D198,{2U,1U,0U}},
{ADD_D198,{3U,1U,0U}},
{ADD_D198,{4U,1U,0U}},
{ADD_D198,{5U,1U,0U}},
{ADD_D198,{6U,1U,0U}},
{ADD_D198,{7U,1U,0U}},
{ADD_D1A0,{0U,1U,0U}},
{ADD_D1A0,{1U,1U,0U}},
{ADD_D1A0,{2U,1U,0U}},
{ADD_D1A0,{3U,1U,0U}},
{ADD_D1A0,{4U,1U,0U}},
{ADD_D1A0,{5U,1U,0U}},
{ADD_D1A0,{6U,1U,0U}},
{ADD_D1A0,{7U,1U,0U}},
{ADD_D1A8,{0U,1U,0U}},
{ADD_D1A8,{1U,1U,0U}},
{ADD_D1A8,{2U,1U,0U}},
{ADD_D1A8,{3U,1U,0U}},
{ADD_D1A8,{4U,1U,0U}},
{ADD_D1A8,{5U,1U,0U}},
{ADD_D1A8,{6U,1U,0U}},
{ADD_D1A8,{7U,1U,0U}},
{ADD_D1B0,{0U,1U,0U}},
{ADD_D1B0,{1U,1U,0U}},
{ADD_D1B0,{2U,1U,0U}},
{ADD_D1B0,{3U,1U,0U}},
{ADD_D1B0,{4U,1U,0U}},
{ADD_D1B0,{5U,1U,0U}},
{ADD_D1B0,{6U,1U,0U}},
{ADD_D1B0,{7U,1U,0U}},
{ADD_D1B8,{0U,1U,0U}},
{ADD_D1B9,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D1C0,{0U,1U,0U}},
{ADDA_D1C0,{1U,1U,0U}},
{ADDA_D1C0,{2U,1U,0U}},
{ADDA_D1C0,{3U,1U,0U}},
{ADDA_D1C0,{4U,1U,0U}},
{ADDA_D1C0,{5U,1U,0U}},
{ADDA_D1C0,{6U,1U,0U}},
{ADDA_D1C0,{7U,1U,0U}},
{ADDA_D1C8,{0U,1U,0U}},
{ADDA_D1C8,{1U,1U,0U}},
{ADDA_D1C8,{2U,1U,0U}},
{ADDA_D1C8,{3U,1U,0U}},
{ADDA_D1C8,{4U,1U,0U}},
{ADDA_D1C8,{5U,1U,0U}},
{ADDA_D1C8,{6U,1U,0U}},
{ADDA_D1C8,{7U,1U,0U}},
{ADDA_D1D0,{0U,1U,0U}},
{ADDA_D1D0,{1U,1U,0U}},
{ADDA_D1D0,{2U,1U,0U}},
{ADDA_D1D0,{3U,1U,0U}},
{ADDA_D1D0,{4U,1U,0U}},
{ADDA_D1D0,{5U,1U,0U}},
{ADDA_D1D0,{6U,1U,0U}},
{ADDA_D1D0,{7U,1U,0U}},
{ADDA_D1D8,{0U,1U,0U}},
{ADDA_D1D8,{1U,1U,0U}},
{ADDA_D1D8,{2U,1U,0U}},
{ADDA_D1D8,{3U,1U,0U}},
{ADDA_D1D8,{4U,1U,0U}},
{ADDA_D1D8,{5U,1U,0U}},
{ADDA_D1D8,{6U,1U,0U}},
{ADDA_D1D8,{7U,1U,0U}},
{ADDA_D1E0,{0U,1U,0U}},
{ADDA_D1E0,{1U,1U,0U}},
{ADDA_D1E0,{2U,1U,0U}},
{ADDA_D1E0,{3U,1U,0U}},
{ADDA_D1E0,{4U,1U,0U}},
{ADDA_D1E0,{5U,1U,0U}},
{ADDA_D1E0,{6U,1U,0U}},
{ADDA_D1E0,{7U,1U,0U}},
{ADDA_D1E8,{0U,1U,0U}},
{ADDA_D1E8,{1U,1U,0U}},
{ADDA_D1E8,{2U,1U,0U}},
{ADDA_D1E8,{3U,1U,0U}},
{ADDA_D1E8,{4U,1U,0U}},
{ADDA_D1E8,{5U,1U,0U}},
{ADDA_D1E8,{6U,1U,0U}},
{ADDA_D1E8,{7U,1U,0U}},
{ADDA_D1F0,{0U,1U,0U}},
{ADDA_D1F0,{1U,1U,0U}},
{ADDA_D1F0,{2U,1U,0U}},
{ADDA_D1F0,{3U,1U,0U}},
{ADDA_D1F0,{4U,1U,0U}},
{ADDA_D1F0,{5U,1U,0U}},
{ADDA_D1F0,{6U,1U,0U}},
{ADDA_D1F0,{7U,1U,0U}},
{ADDA_D1F8,{0U,1U,0U}},
{ADDA_D1F9,{0U,1U,0U}},
{ADDA_D1FA,{0U,1U,0U}},
{ADDA_D1FB,{0U,1U,0U}},
{ADDA_D1FC,{0U,1U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D000,{0U,2U,0U}},
{ADD_D000,{1U,2U,0U}},
{ADD_D000,{2U,2U,0U}},
{ADD_D000,{3U,2U,0U}},
{ADD_D000,{4U,2U,0U}},
{ADD_D000,{5U,2U,0U}},
{ADD_D000,{6U,2U,0U}},
{ADD_D000,{7U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D010,{0U,2U,0U}},
{ADD_D010,{1U,2U,0U}},
{ADD_D010,{2U,2U,0U}},
{ADD_D010,{3U,2U,0U}},
{ADD_D010,{4U,2U,0U}},
{ADD_D010,{5U,2U,0U}},
{ADD_D010,{6U,2U,0U}},
{ADD_D010,{7U,2U,0U}},
{ADD_D018,{0U,2U,0U}},
{ADD_D018,{1U,2U,0U}},
{ADD_D018,{2U,2U,0U}},
{ADD_D018,{3U,2U,0U}},
{ADD_D018,{4U,2U,0U}},
{ADD_D018,{5U,2U,0U}},
{ADD_D018,{6U,2U,0U}},
{ADD_D018,{7U,2U,0U}},
{ADD_D020,{0U,2U,0U}},
{ADD_D020,{1U,2U,0U}},
{ADD_D020,{2U,2U,0U}},
{ADD_D020,{3U,2U,0U}},
{ADD_D020,{4U,2U,0U}},
{ADD_D020,{5U,2U,0U}},
{ADD_D020,{6U,2U,0U}},
{ADD_D020,{7U,2U,0U}},
{ADD_D028,{0U,2U,0U}},
{ADD_D028,{1U,2U,0U}},
{ADD_D028,{2U,2U,0U}},
{ADD_D028,{3U,2U,0U}},
{ADD_D028,{4U,2U,0U}},
{ADD_D028,{5U,2U,0U}},
{ADD_D028,{6U,2U,0U}},
{ADD_D028,{7U,2U,0U}},
{ADD_D030,{0U,2U,0U}},
{ADD_D030,{1U,2U,0U}},
{ADD_D030,{2U,2U,0U}},
{ADD_D030,{3U,2U,0U}},
{ADD_D030,{4U,2U,0U}},
{ADD_D030,{5U,2U,0U}},
{ADD_D030,{6U,2U,0U}},
{ADD_D030,{7U,2U,0U}},
{ADD_D038,{0U,2U,0U}},
{ADD_D039,{0U,2U,0U}},
{ADD_D03A,{0U,2U,0U}},
{ADD_D03B,{0U,2U,0U}},
{ADD_D03C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D040,{0U,2U,0U}},
{ADD_D040,{1U,2U,0U}},
{ADD_D040,{2U,2U,0U}},
{ADD_D040,{3U,2U,0U}},
{ADD_D040,{4U,2U,0U}},
{ADD_D040,{5U,2U,0U}},
{ADD_D040,{6U,2U,0U}},
{ADD_D040,{7U,2U,0U}},
{ADD_D048,{0U,2U,0U}},
{ADD_D048,{1U,2U,0U}},
{ADD_D048,{2U,2U,0U}},
{ADD_D048,{3U,2U,0U}},
{ADD_D048,{4U,2U,0U}},
{ADD_D048,{5U,2U,0U}},
{ADD_D048,{6U,2U,0U}},
{ADD_D048,{7U,2U,0U}},
{ADD_D050,{0U,2U,0U}},
{ADD_D050,{1U,2U,0U}},
{ADD_D050,{2U,2U,0U}},
{ADD_D050,{3U,2U,0U}},
{ADD_D050,{4U,2U,0U}},
{ADD_D050,{5U,2U,0U}},
{ADD_D050,{6U,2U,0U}},
{ADD_D050,{7U,2U,0U}},
{ADD_D058,{0U,2U,0U}},
{ADD_D058,{1U,2U,0U}},
{ADD_D058,{2U,2U,0U}},
{ADD_D058,{3U,2U,0U}},
{ADD_D058,{4U,2U,0U}},
{ADD_D058,{5U,2U,0U}},
{ADD_D058,{6U,2U,0U}},
{ADD_D058,{7U,2U,0U}},
{ADD_D060,{0U,2U,0U}},
{ADD_D060,{1U,2U,0U}},
{ADD_D060,{2U,2U,0U}},
{ADD_D060,{3U,2U,0U}},
{ADD_D060,{4U,2U,0U}},
{ADD_D060,{5U,2U,0U}},
{ADD_D060,{6U,2U,0U}},
{ADD_D060,{7U,2U,0U}},
{ADD_D068,{0U,2U,0U}},
{ADD_D068,{1U,2U,0U}},
{ADD_D068,{2U,2U,0U}},
{ADD_D068,{3U,2U,0U}},
{ADD_D068,{4U,2U,0U}},
{ADD_D068,{5U,2U,0U}},
{ADD_D068,{6U,2U,0U}},
{ADD_D068,{7U,2U,0U}},
{ADD_D070,{0U,2U,0U}},
{ADD_D070,{1U,2U,0U}},
{ADD_D070,{2U,2U,0U}},
{ADD_D070,{3U,2U,0U}},
{ADD_D070,{4U,2U,0U}},
{ADD_D070,{5U,2U,0U}},
{ADD_D070,{6U,2U,0U}},
{ADD_D070,{7U,2U,0U}},
{ADD_D078,{0U,2U,0U}},
{ADD_D079,{0U,2U,0U}},
{ADD_D07A,{0U,2U,0U}},
{ADD_D07B,{0U,2U,0U}},
{ADD_D07C,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D080,{0U,2U,0U}},
{ADD_D080,{1U,2U,0U}},
{ADD_D080,{2U,2U,0U}},
{ADD_D080,{3U,2U,0U}},
{ADD_D080,{4U,2U,0U}},
{ADD_D080,{5U,2U,0U}},
{ADD_D080,{6U,2U,0U}},
{ADD_D080,{7U,2U,0U}},
{ADD_D088,{0U,2U,0U}},
{ADD_D088,{1U,2U,0U}},
{ADD_D088,{2U,2U,0U}},
{ADD_D088,{3U,2U,0U}},
{ADD_D088,{4U,2U,0U}},
{ADD_D088,{5U,2U,0U}},
{ADD_D088,{6U,2U,0U}},
{ADD_D088,{7U,2U,0U}},
{ADD_D090,{0U,2U,0U}},
{ADD_D090,{1U,2U,0U}},
{ADD_D090,{2U,2U,0U}},
{ADD_D090,{3U,2U,0U}},
{ADD_D090,{4U,2U,0U}},
{ADD_D090,{5U,2U,0U}},
{ADD_D090,{6U,2U,0U}},
{ADD_D090,{7U,2U,0U}},
{ADD_D098,{0U,2U,0U}},
{ADD_D098,{1U,2U,0U}},
{ADD_D098,{2U,2U,0U}},
{ADD_D098,{3U,2U,0U}},
{ADD_D098,{4U,2U,0U}},
{ADD_D098,{5U,2U,0U}},
{ADD_D098,{6U,2U,0U}},
{ADD_D098,{7U,2U,0U}},
{ADD_D0A0,{0U,2U,0U}},
{ADD_D0A0,{1U,2U,0U}},
{ADD_D0A0,{2U,2U,0U}},
{ADD_D0A0,{3U,2U,0U}},
{ADD_D0A0,{4U,2U,0U}},
{ADD_D0A0,{5U,2U,0U}},
{ADD_D0A0,{6U,2U,0U}},
{ADD_D0A0,{7U,2U,0U}},
{ADD_D0A8,{0U,2U,0U}},
{ADD_D0A8,{1U,2U,0U}},
{ADD_D0A8,{2U,2U,0U}},
{ADD_D0A8,{3U,2U,0U}},
{ADD_D0A8,{4U,2U,0U}},
{ADD_D0A8,{5U,2U,0U}},
{ADD_D0A8,{6U,2U,0U}},
{ADD_D0A8,{7U,2U,0U}},
{ADD_D0B0,{0U,2U,0U}},
{ADD_D0B0,{1U,2U,0U}},
{ADD_D0B0,{2U,2U,0U}},
{ADD_D0B0,{3U,2U,0U}},
{ADD_D0B0,{4U,2U,0U}},
{ADD_D0B0,{5U,2U,0U}},
{ADD_D0B0,{6U,2U,0U}},
{ADD_D0B0,{7U,2U,0U}},
{ADD_D0B8,{0U,2U,0U}},
{ADD_D0B9,{0U,2U,0U}},
{ADD_D0BA,{0U,2U,0U}},
{ADD_D0BB,{0U,2U,0U}},
{ADD_D0BC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D0C0,{0U,2U,0U}},
{ADDA_D0C0,{1U,2U,0U}},
{ADDA_D0C0,{2U,2U,0U}},
{ADDA_D0C0,{3U,2U,0U}},
{ADDA_D0C0,{4U,2U,0U}},
{ADDA_D0C0,{5U,2U,0U}},
{ADDA_D0C0,{6U,2U,0U}},
{ADDA_D0C0,{7U,2U,0U}},
{ADDA_D0C8,{0U,2U,0U}},
{ADDA_D0C8,{1U,2U,0U}},
{ADDA_D0C8,{2U,2U,0U}},
{ADDA_D0C8,{3U,2U,0U}},
{ADDA_D0C8,{4U,2U,0U}},
{ADDA_D0C8,{5U,2U,0U}},
{ADDA_D0C8,{6U,2U,0U}},
{ADDA_D0C8,{7U,2U,0U}},
{ADDA_D0D0,{0U,2U,0U}},
{ADDA_D0D0,{1U,2U,0U}},
{ADDA_D0D0,{2U,2U,0U}},
{ADDA_D0D0,{3U,2U,0U}},
{ADDA_D0D0,{4U,2U,0U}},
{ADDA_D0D0,{5U,2U,0U}},
{ADDA_D0D0,{6U,2U,0U}},
{ADDA_D0D0,{7U,2U,0U}},
{ADDA_D0D8,{0U,2U,0U}},
{ADDA_D0D8,{1U,2U,0U}},
{ADDA_D0D8,{2U,2U,0U}},
{ADDA_D0D8,{3U,2U,0U}},
{ADDA_D0D8,{4U,2U,0U}},
{ADDA_D0D8,{5U,2U,0U}},
{ADDA_D0D8,{6U,2U,0U}},
{ADDA_D0D8,{7U,2U,0U}},
{ADDA_D0E0,{0U,2U,0U}},
{ADDA_D0E0,{1U,2U,0U}},
{ADDA_D0E0,{2U,2U,0U}},
{ADDA_D0E0,{3U,2U,0U}},
{ADDA_D0E0,{4U,2U,0U}},
{ADDA_D0E0,{5U,2U,0U}},
{ADDA_D0E0,{6U,2U,0U}},
{ADDA_D0E0,{7U,2U,0U}},
{ADDA_D0E8,{0U,2U,0U}},
{ADDA_D0E8,{1U,2U,0U}},
{ADDA_D0E8,{2U,2U,0U}},
{ADDA_D0E8,{3U,2U,0U}},
{ADDA_D0E8,{4U,2U,0U}},
{ADDA_D0E8,{5U,2U,0U}},
{ADDA_D0E8,{6U,2U,0U}},
{ADDA_D0E8,{7U,2U,0U}},
{ADDA_D0F0,{0U,2U,0U}},
{ADDA_D0F0,{1U,2U,0U}},
{ADDA_D0F0,{2U,2U,0U}},
{ADDA_D0F0,{3U,2U,0U}},
{ADDA_D0F0,{4U,2U,0U}},
{ADDA_D0F0,{5U,2U,0U}},
{ADDA_D0F0,{6U,2U,0U}},
{ADDA_D0F0,{7U,2U,0U}},
{ADDA_D0F8,{0U,2U,0U}},
{ADDA_D0F9,{0U,2U,0U}},
{ADDA_D0FA,{0U,2U,0U}},
{ADDA_D0FB,{0U,2U,0U}},
{ADDA_D0FC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D100,{0U,2U,0U}},
{ADDX_D100,{1U,2U,0U}},
{ADDX_D100,{2U,2U,0U}},
{ADDX_D100,{3U,2U,0U}},
{ADDX_D100,{4U,2U,0U}},
{ADDX_D100,{5U,2U,0U}},
{ADDX_D100,{6U,2U,0U}},
{ADDX_D100,{7U,2U,0U}},
{ADDX_D108,{0U,2U,0U}},
{ADDX_D108,{1U,2U,0U}},
{ADDX_D108,{2U,2U,0U}},
{ADDX_D108,{3U,2U,0U}},
{ADDX_D108,{4U,2U,0U}},
{ADDX_D108,{5U,2U,0U}},
{ADDX_D108,{6U,2U,0U}},
{ADDX_D108,{7U,2U,0U}},
{ADD_D110,{0U,2U,0U}},
{ADD_D110,{1U,2U,0U}},
{ADD_D110,{2U,2U,0U}},
{ADD_D110,{3U,2U,0U}},
{ADD_D110,{4U,2U,0U}},
{ADD_D110,{5U,2U,0U}},
{ADD_D110,{6U,2U,0U}},
{ADD_D110,{7U,2U,0U}},
{ADD_D118,{0U,2U,0U}},
{ADD_D118,{1U,2U,0U}},
{ADD_D118,{2U,2U,0U}},
{ADD_D118,{3U,2U,0U}},
{ADD_D118,{4U,2U,0U}},
{ADD_D118,{5U,2U,0U}},
{ADD_D118,{6U,2U,0U}},
{ADD_D118,{7U,2U,0U}},
{ADD_D120,{0U,2U,0U}},
{ADD_D120,{1U,2U,0U}},
{ADD_D120,{2U,2U,0U}},
{ADD_D120,{3U,2U,0U}},
{ADD_D120,{4U,2U,0U}},
{ADD_D120,{5U,2U,0U}},
{ADD_D120,{6U,2U,0U}},
{ADD_D120,{7U,2U,0U}},
{ADD_D128,{0U,2U,0U}},
{ADD_D128,{1U,2U,0U}},
{ADD_D128,{2U,2U,0U}},
{ADD_D128,{3U,2U,0U}},
{ADD_D128,{4U,2U,0U}},
{ADD_D128,{5U,2U,0U}},
{ADD_D128,{6U,2U,0U}},
{ADD_D128,{7U,2U,0U}},
{ADD_D130,{0U,2U,0U}},
{ADD_D130,{1U,2U,0U}},
{ADD_D130,{2U,2U,0U}},
{ADD_D130,{3U,2U,0U}},
{ADD_D130,{4U,2U,0U}},
{ADD_D130,{5U,2U,0U}},
{ADD_D130,{6U,2U,0U}},
{ADD_D130,{7U,2U,0U}},
{ADD_D138,{0U,2U,0U}},
{ADD_D139,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D140,{0U,2U,0U}},
{ADDX_D140,{1U,2U,0U}},
{ADDX_D140,{2U,2U,0U}},
{ADDX_D140,{3U,2U,0U}},
{ADDX_D140,{4U,2U,0U}},
{ADDX_D140,{5U,2U,0U}},
{ADDX_D140,{6U,2U,0U}},
{ADDX_D140,{7U,2U,0U}},
{ADDX_D148,{0U,2U,0U}},
{ADDX_D148,{1U,2U,0U}},
{ADDX_D148,{2U,2U,0U}},
{ADDX_D148,{3U,2U,0U}},
{ADDX_D148,{4U,2U,0U}},
{ADDX_D148,{5U,2U,0U}},
{ADDX_D148,{6U,2U,0U}},
{ADDX_D148,{7U,2U,0U}},
{ADD_D150,{0U,2U,0U}},
{ADD_D150,{1U,2U,0U}},
{ADD_D150,{2U,2U,0U}},
{ADD_D150,{3U,2U,0U}},
{ADD_D150,{4U,2U,0U}},
{ADD_D150,{5U,2U,0U}},
{ADD_D150,{6U,2U,0U}},
{ADD_D150,{7U,2U,0U}},
{ADD_D158,{0U,2U,0U}},
{ADD_D158,{1U,2U,0U}},
{ADD_D158,{2U,2U,0U}},
{ADD_D158,{3U,2U,0U}},
{ADD_D158,{4U,2U,0U}},
{ADD_D158,{5U,2U,0U}},
{ADD_D158,{6U,2U,0U}},
{ADD_D158,{7U,2U,0U}},
{ADD_D160,{0U,2U,0U}},
{ADD_D160,{1U,2U,0U}},
{ADD_D160,{2U,2U,0U}},
{ADD_D160,{3U,2U,0U}},
{ADD_D160,{4U,2U,0U}},
{ADD_D160,{5U,2U,0U}},
{ADD_D160,{6U,2U,0U}},
{ADD_D160,{7U,2U,0U}},
{ADD_D168,{0U,2U,0U}},
{ADD_D168,{1U,2U,0U}},
{ADD_D168,{2U,2U,0U}},
{ADD_D168,{3U,2U,0U}},
{ADD_D168,{4U,2U,0U}},
{ADD_D168,{5U,2U,0U}},
{ADD_D168,{6U,2U,0U}},
{ADD_D168,{7U,2U,0U}},
{ADD_D170,{0U,2U,0U}},
{ADD_D170,{1U,2U,0U}},
{ADD_D170,{2U,2U,0U}},
{ADD_D170,{3U,2U,0U}},
{ADD_D170,{4U,2U,0U}},
{ADD_D170,{5U,2U,0U}},
{ADD_D170,{6U,2U,0U}},
{ADD_D170,{7U,2U,0U}},
{ADD_D178,{0U,2U,0U}},
{ADD_D179,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D180,{0U,2U,0U}},
{ADDX_D180,{1U,2U,0U}},
{ADDX_D180,{2U,2U,0U}},
{ADDX_D180,{3U,2U,0U}},
{ADDX_D180,{4U,2U,0U}},
{ADDX_D180,{5U,2U,0U}},
{ADDX_D180,{6U,2U,0U}},
{ADDX_D180,{7U,2U,0U}},
{ADDX_D188,{0U,2U,0U}},
{ADDX_D188,{1U,2U,0U}},
{ADDX_D188,{2U,2U,0U}},
{ADDX_D188,{3U,2U,0U}},
{ADDX_D188,{4U,2U,0U}},
{ADDX_D188,{5U,2U,0U}},
{ADDX_D188,{6U,2U,0U}},
{ADDX_D188,{7U,2U,0U}},
{ADD_D190,{0U,2U,0U}},
{ADD_D190,{1U,2U,0U}},
{ADD_D190,{2U,2U,0U}},
{ADD_D190,{3U,2U,0U}},
{ADD_D190,{4U,2U,0U}},
{ADD_D190,{5U,2U,0U}},
{ADD_D190,{6U,2U,0U}},
{ADD_D190,{7U,2U,0U}},
{ADD_D198,{0U,2U,0U}},
{ADD_D198,{1U,2U,0U}},
{ADD_D198,{2U,2U,0U}},
{ADD_D198,{3U,2U,0U}},
{ADD_D198,{4U,2U,0U}},
{ADD_D198,{5U,2U,0U}},
{ADD_D198,{6U,2U,0U}},
{ADD_D198,{7U,2U,0U}},
{ADD_D1A0,{0U,2U,0U}},
{ADD_D1A0,{1U,2U,0U}},
{ADD_D1A0,{2U,2U,0U}},
{ADD_D1A0,{3U,2U,0U}},
{ADD_D1A0,{4U,2U,0U}},
{ADD_D1A0,{5U,2U,0U}},
{ADD_D1A0,{6U,2U,0U}},
{ADD_D1A0,{7U,2U,0U}},
{ADD_D1A8,{0U,2U,0U}},
{ADD_D1A8,{1U,2U,0U}},
{ADD_D1A8,{2U,2U,0U}},
{ADD_D1A8,{3U,2U,0U}},
{ADD_D1A8,{4U,2U,0U}},
{ADD_D1A8,{5U,2U,0U}},
{ADD_D1A8,{6U,2U,0U}},
{ADD_D1A8,{7U,2U,0U}},
{ADD_D1B0,{0U,2U,0U}},
{ADD_D1B0,{1U,2U,0U}},
{ADD_D1B0,{2U,2U,0U}},
{ADD_D1B0,{3U,2U,0U}},
{ADD_D1B0,{4U,2U,0U}},
{ADD_D1B0,{5U,2U,0U}},
{ADD_D1B0,{6U,2U,0U}},
{ADD_D1B0,{7U,2U,0U}},
{ADD_D1B8,{0U,2U,0U}},
{ADD_D1B9,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D1C0,{0U,2U,0U}},
{ADDA_D1C0,{1U,2U,0U}},
{ADDA_D1C0,{2U,2U,0U}},
{ADDA_D1C0,{3U,2U,0U}},
{ADDA_D1C0,{4U,2U,0U}},
{ADDA_D1C0,{5U,2U,0U}},
{ADDA_D1C0,{6U,2U,0U}},
{ADDA_D1C0,{7U,2U,0U}},
{ADDA_D1C8,{0U,2U,0U}},
{ADDA_D1C8,{1U,2U,0U}},
{ADDA_D1C8,{2U,2U,0U}},
{ADDA_D1C8,{3U,2U,0U}},
{ADDA_D1C8,{4U,2U,0U}},
{ADDA_D1C8,{5U,2U,0U}},
{ADDA_D1C8,{6U,2U,0U}},
{ADDA_D1C8,{7U,2U,0U}},
{ADDA_D1D0,{0U,2U,0U}},
{ADDA_D1D0,{1U,2U,0U}},
{ADDA_D1D0,{2U,2U,0U}},
{ADDA_D1D0,{3U,2U,0U}},
{ADDA_D1D0,{4U,2U,0U}},
{ADDA_D1D0,{5U,2U,0U}},
{ADDA_D1D0,{6U,2U,0U}},
{ADDA_D1D0,{7U,2U,0U}},
{ADDA_D1D8,{0U,2U,0U}},
{ADDA_D1D8,{1U,2U,0U}},
{ADDA_D1D8,{2U,2U,0U}},
{ADDA_D1D8,{3U,2U,0U}},
{ADDA_D1D8,{4U,2U,0U}},
{ADDA_D1D8,{5U,2U,0U}},
{ADDA_D1D8,{6U,2U,0U}},
{ADDA_D1D8,{7U,2U,0U}},
{ADDA_D1E0,{0U,2U,0U}},
{ADDA_D1E0,{1U,2U,0U}},
{ADDA_D1E0,{2U,2U,0U}},
{ADDA_D1E0,{3U,2U,0U}},
{ADDA_D1E0,{4U,2U,0U}},
{ADDA_D1E0,{5U,2U,0U}},
{ADDA_D1E0,{6U,2U,0U}},
{ADDA_D1E0,{7U,2U,0U}},
{ADDA_D1E8,{0U,2U,0U}},
{ADDA_D1E8,{1U,2U,0U}},
{ADDA_D1E8,{2U,2U,0U}},
{ADDA_D1E8,{3U,2U,0U}},
{ADDA_D1E8,{4U,2U,0U}},
{ADDA_D1E8,{5U,2U,0U}},
{ADDA_D1E8,{6U,2U,0U}},
{ADDA_D1E8,{7U,2U,0U}},
{ADDA_D1F0,{0U,2U,0U}},
{ADDA_D1F0,{1U,2U,0U}},
{ADDA_D1F0,{2U,2U,0U}},
{ADDA_D1F0,{3U,2U,0U}},
{ADDA_D1F0,{4U,2U,0U}},
{ADDA_D1F0,{5U,2U,0U}},
{ADDA_D1F0,{6U,2U,0U}},
{ADDA_D1F0,{7U,2U,0U}},
{ADDA_D1F8,{0U,2U,0U}},
{ADDA_D1F9,{0U,2U,0U}},
{ADDA_D1FA,{0U,2U,0U}},
{ADDA_D1FB,{0U,2U,0U}},
{ADDA_D1FC,{0U,2U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D000,{0U,3U,0U}},
{ADD_D000,{1U,3U,0U}},
{ADD_D000,{2U,3U,0U}},
{ADD_D000,{3U,3U,0U}},
{ADD_D000,{4U,3U,0U}},
{ADD_D000,{5U,3U,0U}},
{ADD_D000,{6U,3U,0U}},
{ADD_D000,{7U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D010,{0U,3U,0U}},
{ADD_D010,{1U,3U,0U}},
{ADD_D010,{2U,3U,0U}},
{ADD_D010,{3U,3U,0U}},
{ADD_D010,{4U,3U,0U}},
{ADD_D010,{5U,3U,0U}},
{ADD_D010,{6U,3U,0U}},
{ADD_D010,{7U,3U,0U}},
{ADD_D018,{0U,3U,0U}},
{ADD_D018,{1U,3U,0U}},
{ADD_D018,{2U,3U,0U}},
{ADD_D018,{3U,3U,0U}},
{ADD_D018,{4U,3U,0U}},
{ADD_D018,{5U,3U,0U}},
{ADD_D018,{6U,3U,0U}},
{ADD_D018,{7U,3U,0U}},
{ADD_D020,{0U,3U,0U}},
{ADD_D020,{1U,3U,0U}},
{ADD_D020,{2U,3U,0U}},
{ADD_D020,{3U,3U,0U}},
{ADD_D020,{4U,3U,0U}},
{ADD_D020,{5U,3U,0U}},
{ADD_D020,{6U,3U,0U}},
{ADD_D020,{7U,3U,0U}},
{ADD_D028,{0U,3U,0U}},
{ADD_D028,{1U,3U,0U}},
{ADD_D028,{2U,3U,0U}},
{ADD_D028,{3U,3U,0U}},
{ADD_D028,{4U,3U,0U}},
{ADD_D028,{5U,3U,0U}},
{ADD_D028,{6U,3U,0U}},
{ADD_D028,{7U,3U,0U}},
{ADD_D030,{0U,3U,0U}},
{ADD_D030,{1U,3U,0U}},
{ADD_D030,{2U,3U,0U}},
{ADD_D030,{3U,3U,0U}},
{ADD_D030,{4U,3U,0U}},
{ADD_D030,{5U,3U,0U}},
{ADD_D030,{6U,3U,0U}},
{ADD_D030,{7U,3U,0U}},
{ADD_D038,{0U,3U,0U}},
{ADD_D039,{0U,3U,0U}},
{ADD_D03A,{0U,3U,0U}},
{ADD_D03B,{0U,3U,0U}},
{ADD_D03C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D040,{0U,3U,0U}},
{ADD_D040,{1U,3U,0U}},
{ADD_D040,{2U,3U,0U}},
{ADD_D040,{3U,3U,0U}},
{ADD_D040,{4U,3U,0U}},
{ADD_D040,{5U,3U,0U}},
{ADD_D040,{6U,3U,0U}},
{ADD_D040,{7U,3U,0U}},
{ADD_D048,{0U,3U,0U}},
{ADD_D048,{1U,3U,0U}},
{ADD_D048,{2U,3U,0U}},
{ADD_D048,{3U,3U,0U}},
{ADD_D048,{4U,3U,0U}},
{ADD_D048,{5U,3U,0U}},
{ADD_D048,{6U,3U,0U}},
{ADD_D048,{7U,3U,0U}},
{ADD_D050,{0U,3U,0U}},
{ADD_D050,{1U,3U,0U}},
{ADD_D050,{2U,3U,0U}},
{ADD_D050,{3U,3U,0U}},
{ADD_D050,{4U,3U,0U}},
{ADD_D050,{5U,3U,0U}},
{ADD_D050,{6U,3U,0U}},
{ADD_D050,{7U,3U,0U}},
{ADD_D058,{0U,3U,0U}},
{ADD_D058,{1U,3U,0U}},
{ADD_D058,{2U,3U,0U}},
{ADD_D058,{3U,3U,0U}},
{ADD_D058,{4U,3U,0U}},
{ADD_D058,{5U,3U,0U}},
{ADD_D058,{6U,3U,0U}},
{ADD_D058,{7U,3U,0U}},
{ADD_D060,{0U,3U,0U}},
{ADD_D060,{1U,3U,0U}},
{ADD_D060,{2U,3U,0U}},
{ADD_D060,{3U,3U,0U}},
{ADD_D060,{4U,3U,0U}},
{ADD_D060,{5U,3U,0U}},
{ADD_D060,{6U,3U,0U}},
{ADD_D060,{7U,3U,0U}},
{ADD_D068,{0U,3U,0U}},
{ADD_D068,{1U,3U,0U}},
{ADD_D068,{2U,3U,0U}},
{ADD_D068,{3U,3U,0U}},
{ADD_D068,{4U,3U,0U}},
{ADD_D068,{5U,3U,0U}},
{ADD_D068,{6U,3U,0U}},
{ADD_D068,{7U,3U,0U}},
{ADD_D070,{0U,3U,0U}},
{ADD_D070,{1U,3U,0U}},
{ADD_D070,{2U,3U,0U}},
{ADD_D070,{3U,3U,0U}},
{ADD_D070,{4U,3U,0U}},
{ADD_D070,{5U,3U,0U}},
{ADD_D070,{6U,3U,0U}},
{ADD_D070,{7U,3U,0U}},
{ADD_D078,{0U,3U,0U}},
{ADD_D079,{0U,3U,0U}},
{ADD_D07A,{0U,3U,0U}},
{ADD_D07B,{0U,3U,0U}},
{ADD_D07C,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D080,{0U,3U,0U}},
{ADD_D080,{1U,3U,0U}},
{ADD_D080,{2U,3U,0U}},
{ADD_D080,{3U,3U,0U}},
{ADD_D080,{4U,3U,0U}},
{ADD_D080,{5U,3U,0U}},
{ADD_D080,{6U,3U,0U}},
{ADD_D080,{7U,3U,0U}},
{ADD_D088,{0U,3U,0U}},
{ADD_D088,{1U,3U,0U}},
{ADD_D088,{2U,3U,0U}},
{ADD_D088,{3U,3U,0U}},
{ADD_D088,{4U,3U,0U}},
{ADD_D088,{5U,3U,0U}},
{ADD_D088,{6U,3U,0U}},
{ADD_D088,{7U,3U,0U}},
{ADD_D090,{0U,3U,0U}},
{ADD_D090,{1U,3U,0U}},
{ADD_D090,{2U,3U,0U}},
{ADD_D090,{3U,3U,0U}},
{ADD_D090,{4U,3U,0U}},
{ADD_D090,{5U,3U,0U}},
{ADD_D090,{6U,3U,0U}},
{ADD_D090,{7U,3U,0U}},
{ADD_D098,{0U,3U,0U}},
{ADD_D098,{1U,3U,0U}},
{ADD_D098,{2U,3U,0U}},
{ADD_D098,{3U,3U,0U}},
{ADD_D098,{4U,3U,0U}},
{ADD_D098,{5U,3U,0U}},
{ADD_D098,{6U,3U,0U}},
{ADD_D098,{7U,3U,0U}},
{ADD_D0A0,{0U,3U,0U}},
{ADD_D0A0,{1U,3U,0U}},
{ADD_D0A0,{2U,3U,0U}},
{ADD_D0A0,{3U,3U,0U}},
{ADD_D0A0,{4U,3U,0U}},
{ADD_D0A0,{5U,3U,0U}},
{ADD_D0A0,{6U,3U,0U}},
{ADD_D0A0,{7U,3U,0U}},
{ADD_D0A8,{0U,3U,0U}},
{ADD_D0A8,{1U,3U,0U}},
{ADD_D0A8,{2U,3U,0U}},
{ADD_D0A8,{3U,3U,0U}},
{ADD_D0A8,{4U,3U,0U}},
{ADD_D0A8,{5U,3U,0U}},
{ADD_D0A8,{6U,3U,0U}},
{ADD_D0A8,{7U,3U,0U}},
{ADD_D0B0,{0U,3U,0U}},
{ADD_D0B0,{1U,3U,0U}},
{ADD_D0B0,{2U,3U,0U}},
{ADD_D0B0,{3U,3U,0U}},
{ADD_D0B0,{4U,3U,0U}},
{ADD_D0B0,{5U,3U,0U}},
{ADD_D0B0,{6U,3U,0U}},
{ADD_D0B0,{7U,3U,0U}},
{ADD_D0B8,{0U,3U,0U}},
{ADD_D0B9,{0U,3U,0U}},
{ADD_D0BA,{0U,3U,0U}},
{ADD_D0BB,{0U,3U,0U}},
{ADD_D0BC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D0C0,{0U,3U,0U}},
{ADDA_D0C0,{1U,3U,0U}},
{ADDA_D0C0,{2U,3U,0U}},
{ADDA_D0C0,{3U,3U,0U}},
{ADDA_D0C0,{4U,3U,0U}},
{ADDA_D0C0,{5U,3U,0U}},
{ADDA_D0C0,{6U,3U,0U}},
{ADDA_D0C0,{7U,3U,0U}},
{ADDA_D0C8,{0U,3U,0U}},
{ADDA_D0C8,{1U,3U,0U}},
{ADDA_D0C8,{2U,3U,0U}},
{ADDA_D0C8,{3U,3U,0U}},
{ADDA_D0C8,{4U,3U,0U}},
{ADDA_D0C8,{5U,3U,0U}},
{ADDA_D0C8,{6U,3U,0U}},
{ADDA_D0C8,{7U,3U,0U}},
{ADDA_D0D0,{0U,3U,0U}},
{ADDA_D0D0,{1U,3U,0U}},
{ADDA_D0D0,{2U,3U,0U}},
{ADDA_D0D0,{3U,3U,0U}},
{ADDA_D0D0,{4U,3U,0U}},
{ADDA_D0D0,{5U,3U,0U}},
{ADDA_D0D0,{6U,3U,0U}},
{ADDA_D0D0,{7U,3U,0U}},
{ADDA_D0D8,{0U,3U,0U}},
{ADDA_D0D8,{1U,3U,0U}},
{ADDA_D0D8,{2U,3U,0U}},
{ADDA_D0D8,{3U,3U,0U}},
{ADDA_D0D8,{4U,3U,0U}},
{ADDA_D0D8,{5U,3U,0U}},
{ADDA_D0D8,{6U,3U,0U}},
{ADDA_D0D8,{7U,3U,0U}},
{ADDA_D0E0,{0U,3U,0U}},
{ADDA_D0E0,{1U,3U,0U}},
{ADDA_D0E0,{2U,3U,0U}},
{ADDA_D0E0,{3U,3U,0U}},
{ADDA_D0E0,{4U,3U,0U}},
{ADDA_D0E0,{5U,3U,0U}},
{ADDA_D0E0,{6U,3U,0U}},
{ADDA_D0E0,{7U,3U,0U}},
{ADDA_D0E8,{0U,3U,0U}},
{ADDA_D0E8,{1U,3U,0U}},
{ADDA_D0E8,{2U,3U,0U}},
{ADDA_D0E8,{3U,3U,0U}},
{ADDA_D0E8,{4U,3U,0U}},
{ADDA_D0E8,{5U,3U,0U}},
{ADDA_D0E8,{6U,3U,0U}},
{ADDA_D0E8,{7U,3U,0U}},
{ADDA_D0F0,{0U,3U,0U}},
{ADDA_D0F0,{1U,3U,0U}},
{ADDA_D0F0,{2U,3U,0U}},
{ADDA_D0F0,{3U,3U,0U}},
{ADDA_D0F0,{4U,3U,0U}},
{ADDA_D0F0,{5U,3U,0U}},
{ADDA_D0F0,{6U,3U,0U}},
{ADDA_D0F0,{7U,3U,0U}},
{ADDA_D0F8,{0U,3U,0U}},
{ADDA_D0F9,{0U,3U,0U}},
{ADDA_D0FA,{0U,3U,0U}},
{ADDA_D0FB,{0U,3U,0U}},
{ADDA_D0FC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D100,{0U,3U,0U}},
{ADDX_D100,{1U,3U,0U}},
{ADDX_D100,{2U,3U,0U}},
{ADDX_D100,{3U,3U,0U}},
{ADDX_D100,{4U,3U,0U}},
{ADDX_D100,{5U,3U,0U}},
{ADDX_D100,{6U,3U,0U}},
{ADDX_D100,{7U,3U,0U}},
{ADDX_D108,{0U,3U,0U}},
{ADDX_D108,{1U,3U,0U}},
{ADDX_D108,{2U,3U,0U}},
{ADDX_D108,{3U,3U,0U}},
{ADDX_D108,{4U,3U,0U}},
{ADDX_D108,{5U,3U,0U}},
{ADDX_D108,{6U,3U,0U}},
{ADDX_D108,{7U,3U,0U}},
{ADD_D110,{0U,3U,0U}},
{ADD_D110,{1U,3U,0U}},
{ADD_D110,{2U,3U,0U}},
{ADD_D110,{3U,3U,0U}},
{ADD_D110,{4U,3U,0U}},
{ADD_D110,{5U,3U,0U}},
{ADD_D110,{6U,3U,0U}},
{ADD_D110,{7U,3U,0U}},
{ADD_D118,{0U,3U,0U}},
{ADD_D118,{1U,3U,0U}},
{ADD_D118,{2U,3U,0U}},
{ADD_D118,{3U,3U,0U}},
{ADD_D118,{4U,3U,0U}},
{ADD_D118,{5U,3U,0U}},
{ADD_D118,{6U,3U,0U}},
{ADD_D118,{7U,3U,0U}},
{ADD_D120,{0U,3U,0U}},
{ADD_D120,{1U,3U,0U}},
{ADD_D120,{2U,3U,0U}},
{ADD_D120,{3U,3U,0U}},
{ADD_D120,{4U,3U,0U}},
{ADD_D120,{5U,3U,0U}},
{ADD_D120,{6U,3U,0U}},
{ADD_D120,{7U,3U,0U}},
{ADD_D128,{0U,3U,0U}},
{ADD_D128,{1U,3U,0U}},
{ADD_D128,{2U,3U,0U}},
{ADD_D128,{3U,3U,0U}},
{ADD_D128,{4U,3U,0U}},
{ADD_D128,{5U,3U,0U}},
{ADD_D128,{6U,3U,0U}},
{ADD_D128,{7U,3U,0U}},
{ADD_D130,{0U,3U,0U}},
{ADD_D130,{1U,3U,0U}},
{ADD_D130,{2U,3U,0U}},
{ADD_D130,{3U,3U,0U}},
{ADD_D130,{4U,3U,0U}},
{ADD_D130,{5U,3U,0U}},
{ADD_D130,{6U,3U,0U}},
{ADD_D130,{7U,3U,0U}},
{ADD_D138,{0U,3U,0U}},
{ADD_D139,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D140,{0U,3U,0U}},
{ADDX_D140,{1U,3U,0U}},
{ADDX_D140,{2U,3U,0U}},
{ADDX_D140,{3U,3U,0U}},
{ADDX_D140,{4U,3U,0U}},
{ADDX_D140,{5U,3U,0U}},
{ADDX_D140,{6U,3U,0U}},
{ADDX_D140,{7U,3U,0U}},
{ADDX_D148,{0U,3U,0U}},
{ADDX_D148,{1U,3U,0U}},
{ADDX_D148,{2U,3U,0U}},
{ADDX_D148,{3U,3U,0U}},
{ADDX_D148,{4U,3U,0U}},
{ADDX_D148,{5U,3U,0U}},
{ADDX_D148,{6U,3U,0U}},
{ADDX_D148,{7U,3U,0U}},
{ADD_D150,{0U,3U,0U}},
{ADD_D150,{1U,3U,0U}},
{ADD_D150,{2U,3U,0U}},
{ADD_D150,{3U,3U,0U}},
{ADD_D150,{4U,3U,0U}},
{ADD_D150,{5U,3U,0U}},
{ADD_D150,{6U,3U,0U}},
{ADD_D150,{7U,3U,0U}},
{ADD_D158,{0U,3U,0U}},
{ADD_D158,{1U,3U,0U}},
{ADD_D158,{2U,3U,0U}},
{ADD_D158,{3U,3U,0U}},
{ADD_D158,{4U,3U,0U}},
{ADD_D158,{5U,3U,0U}},
{ADD_D158,{6U,3U,0U}},
{ADD_D158,{7U,3U,0U}},
{ADD_D160,{0U,3U,0U}},
{ADD_D160,{1U,3U,0U}},
{ADD_D160,{2U,3U,0U}},
{ADD_D160,{3U,3U,0U}},
{ADD_D160,{4U,3U,0U}},
{ADD_D160,{5U,3U,0U}},
{ADD_D160,{6U,3U,0U}},
{ADD_D160,{7U,3U,0U}},
{ADD_D168,{0U,3U,0U}},
{ADD_D168,{1U,3U,0U}},
{ADD_D168,{2U,3U,0U}},
{ADD_D168,{3U,3U,0U}},
{ADD_D168,{4U,3U,0U}},
{ADD_D168,{5U,3U,0U}},
{ADD_D168,{6U,3U,0U}},
{ADD_D168,{7U,3U,0U}},
{ADD_D170,{0U,3U,0U}},
{ADD_D170,{1U,3U,0U}},
{ADD_D170,{2U,3U,0U}},
{ADD_D170,{3U,3U,0U}},
{ADD_D170,{4U,3U,0U}},
{ADD_D170,{5U,3U,0U}},
{ADD_D170,{6U,3U,0U}},
{ADD_D170,{7U,3U,0U}},
{ADD_D178,{0U,3U,0U}},
{ADD_D179,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D180,{0U,3U,0U}},
{ADDX_D180,{1U,3U,0U}},
{ADDX_D180,{2U,3U,0U}},
{ADDX_D180,{3U,3U,0U}},
{ADDX_D180,{4U,3U,0U}},
{ADDX_D180,{5U,3U,0U}},
{ADDX_D180,{6U,3U,0U}},
{ADDX_D180,{7U,3U,0U}},
{ADDX_D188,{0U,3U,0U}},
{ADDX_D188,{1U,3U,0U}},
{ADDX_D188,{2U,3U,0U}},
{ADDX_D188,{3U,3U,0U}},
{ADDX_D188,{4U,3U,0U}},
{ADDX_D188,{5U,3U,0U}},
{ADDX_D188,{6U,3U,0U}},
{ADDX_D188,{7U,3U,0U}},
{ADD_D190,{0U,3U,0U}},
{ADD_D190,{1U,3U,0U}},
{ADD_D190,{2U,3U,0U}},
{ADD_D190,{3U,3U,0U}},
{ADD_D190,{4U,3U,0U}},
{ADD_D190,{5U,3U,0U}},
{ADD_D190,{6U,3U,0U}},
{ADD_D190,{7U,3U,0U}},
{ADD_D198,{0U,3U,0U}},
{ADD_D198,{1U,3U,0U}},
{ADD_D198,{2U,3U,0U}},
{ADD_D198,{3U,3U,0U}},
{ADD_D198,{4U,3U,0U}},
{ADD_D198,{5U,3U,0U}},
{ADD_D198,{6U,3U,0U}},
{ADD_D198,{7U,3U,0U}},
{ADD_D1A0,{0U,3U,0U}},
{ADD_D1A0,{1U,3U,0U}},
{ADD_D1A0,{2U,3U,0U}},
{ADD_D1A0,{3U,3U,0U}},
{ADD_D1A0,{4U,3U,0U}},
{ADD_D1A0,{5U,3U,0U}},
{ADD_D1A0,{6U,3U,0U}},
{ADD_D1A0,{7U,3U,0U}},
{ADD_D1A8,{0U,3U,0U}},
{ADD_D1A8,{1U,3U,0U}},
{ADD_D1A8,{2U,3U,0U}},
{ADD_D1A8,{3U,3U,0U}},
{ADD_D1A8,{4U,3U,0U}},
{ADD_D1A8,{5U,3U,0U}},
{ADD_D1A8,{6U,3U,0U}},
{ADD_D1A8,{7U,3U,0U}},
{ADD_D1B0,{0U,3U,0U}},
{ADD_D1B0,{1U,3U,0U}},
{ADD_D1B0,{2U,3U,0U}},
{ADD_D1B0,{3U,3U,0U}},
{ADD_D1B0,{4U,3U,0U}},
{ADD_D1B0,{5U,3U,0U}},
{ADD_D1B0,{6U,3U,0U}},
{ADD_D1B0,{7U,3U,0U}},
{ADD_D1B8,{0U,3U,0U}},
{ADD_D1B9,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D1C0,{0U,3U,0U}},
{ADDA_D1C0,{1U,3U,0U}},
{ADDA_D1C0,{2U,3U,0U}},
{ADDA_D1C0,{3U,3U,0U}},
{ADDA_D1C0,{4U,3U,0U}},
{ADDA_D1C0,{5U,3U,0U}},
{ADDA_D1C0,{6U,3U,0U}},
{ADDA_D1C0,{7U,3U,0U}},
{ADDA_D1C8,{0U,3U,0U}},
{ADDA_D1C8,{1U,3U,0U}},
{ADDA_D1C8,{2U,3U,0U}},
{ADDA_D1C8,{3U,3U,0U}},
{ADDA_D1C8,{4U,3U,0U}},
{ADDA_D1C8,{5U,3U,0U}},
{ADDA_D1C8,{6U,3U,0U}},
{ADDA_D1C8,{7U,3U,0U}},
{ADDA_D1D0,{0U,3U,0U}},
{ADDA_D1D0,{1U,3U,0U}},
{ADDA_D1D0,{2U,3U,0U}},
{ADDA_D1D0,{3U,3U,0U}},
{ADDA_D1D0,{4U,3U,0U}},
{ADDA_D1D0,{5U,3U,0U}},
{ADDA_D1D0,{6U,3U,0U}},
{ADDA_D1D0,{7U,3U,0U}},
{ADDA_D1D8,{0U,3U,0U}},
{ADDA_D1D8,{1U,3U,0U}},
{ADDA_D1D8,{2U,3U,0U}},
{ADDA_D1D8,{3U,3U,0U}},
{ADDA_D1D8,{4U,3U,0U}},
{ADDA_D1D8,{5U,3U,0U}},
{ADDA_D1D8,{6U,3U,0U}},
{ADDA_D1D8,{7U,3U,0U}},
{ADDA_D1E0,{0U,3U,0U}},
{ADDA_D1E0,{1U,3U,0U}},
{ADDA_D1E0,{2U,3U,0U}},
{ADDA_D1E0,{3U,3U,0U}},
{ADDA_D1E0,{4U,3U,0U}},
{ADDA_D1E0,{5U,3U,0U}},
{ADDA_D1E0,{6U,3U,0U}},
{ADDA_D1E0,{7U,3U,0U}},
{ADDA_D1E8,{0U,3U,0U}},
{ADDA_D1E8,{1U,3U,0U}},
{ADDA_D1E8,{2U,3U,0U}},
{ADDA_D1E8,{3U,3U,0U}},
{ADDA_D1E8,{4U,3U,0U}},
{ADDA_D1E8,{5U,3U,0U}},
{ADDA_D1E8,{6U,3U,0U}},
{ADDA_D1E8,{7U,3U,0U}},
{ADDA_D1F0,{0U,3U,0U}},
{ADDA_D1F0,{1U,3U,0U}},
{ADDA_D1F0,{2U,3U,0U}},
{ADDA_D1F0,{3U,3U,0U}},
{ADDA_D1F0,{4U,3U,0U}},
{ADDA_D1F0,{5U,3U,0U}},
{ADDA_D1F0,{6U,3U,0U}},
{ADDA_D1F0,{7U,3U,0U}},
{ADDA_D1F8,{0U,3U,0U}},
{ADDA_D1F9,{0U,3U,0U}},
{ADDA_D1FA,{0U,3U,0U}},
{ADDA_D1FB,{0U,3U,0U}},
{ADDA_D1FC,{0U,3U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D000,{0U,4U,0U}},
{ADD_D000,{1U,4U,0U}},
{ADD_D000,{2U,4U,0U}},
{ADD_D000,{3U,4U,0U}},
{ADD_D000,{4U,4U,0U}},
{ADD_D000,{5U,4U,0U}},
{ADD_D000,{6U,4U,0U}},
{ADD_D000,{7U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D010,{0U,4U,0U}},
{ADD_D010,{1U,4U,0U}},
{ADD_D010,{2U,4U,0U}},
{ADD_D010,{3U,4U,0U}},
{ADD_D010,{4U,4U,0U}},
{ADD_D010,{5U,4U,0U}},
{ADD_D010,{6U,4U,0U}},
{ADD_D010,{7U,4U,0U}},
{ADD_D018,{0U,4U,0U}},
{ADD_D018,{1U,4U,0U}},
{ADD_D018,{2U,4U,0U}},
{ADD_D018,{3U,4U,0U}},
{ADD_D018,{4U,4U,0U}},
{ADD_D018,{5U,4U,0U}},
{ADD_D018,{6U,4U,0U}},
{ADD_D018,{7U,4U,0U}},
{ADD_D020,{0U,4U,0U}},
{ADD_D020,{1U,4U,0U}},
{ADD_D020,{2U,4U,0U}},
{ADD_D020,{3U,4U,0U}},
{ADD_D020,{4U,4U,0U}},
{ADD_D020,{5U,4U,0U}},
{ADD_D020,{6U,4U,0U}},
{ADD_D020,{7U,4U,0U}},
{ADD_D028,{0U,4U,0U}},
{ADD_D028,{1U,4U,0U}},
{ADD_D028,{2U,4U,0U}},
{ADD_D028,{3U,4U,0U}},
{ADD_D028,{4U,4U,0U}},
{ADD_D028,{5U,4U,0U}},
{ADD_D028,{6U,4U,0U}},
{ADD_D028,{7U,4U,0U}},
{ADD_D030,{0U,4U,0U}},
{ADD_D030,{1U,4U,0U}},
{ADD_D030,{2U,4U,0U}},
{ADD_D030,{3U,4U,0U}},
{ADD_D030,{4U,4U,0U}},
{ADD_D030,{5U,4U,0U}},
{ADD_D030,{6U,4U,0U}},
{ADD_D030,{7U,4U,0U}},
{ADD_D038,{0U,4U,0U}},
{ADD_D039,{0U,4U,0U}},
{ADD_D03A,{0U,4U,0U}},
{ADD_D03B,{0U,4U,0U}},
{ADD_D03C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D040,{0U,4U,0U}},
{ADD_D040,{1U,4U,0U}},
{ADD_D040,{2U,4U,0U}},
{ADD_D040,{3U,4U,0U}},
{ADD_D040,{4U,4U,0U}},
{ADD_D040,{5U,4U,0U}},
{ADD_D040,{6U,4U,0U}},
{ADD_D040,{7U,4U,0U}},
{ADD_D048,{0U,4U,0U}},
{ADD_D048,{1U,4U,0U}},
{ADD_D048,{2U,4U,0U}},
{ADD_D048,{3U,4U,0U}},
{ADD_D048,{4U,4U,0U}},
{ADD_D048,{5U,4U,0U}},
{ADD_D048,{6U,4U,0U}},
{ADD_D048,{7U,4U,0U}},
{ADD_D050,{0U,4U,0U}},
{ADD_D050,{1U,4U,0U}},
{ADD_D050,{2U,4U,0U}},
{ADD_D050,{3U,4U,0U}},
{ADD_D050,{4U,4U,0U}},
{ADD_D050,{5U,4U,0U}},
{ADD_D050,{6U,4U,0U}},
{ADD_D050,{7U,4U,0U}},
{ADD_D058,{0U,4U,0U}},
{ADD_D058,{1U,4U,0U}},
{ADD_D058,{2U,4U,0U}},
{ADD_D058,{3U,4U,0U}},
{ADD_D058,{4U,4U,0U}},
{ADD_D058,{5U,4U,0U}},
{ADD_D058,{6U,4U,0U}},
{ADD_D058,{7U,4U,0U}},
{ADD_D060,{0U,4U,0U}},
{ADD_D060,{1U,4U,0U}},
{ADD_D060,{2U,4U,0U}},
{ADD_D060,{3U,4U,0U}},
{ADD_D060,{4U,4U,0U}},
{ADD_D060,{5U,4U,0U}},
{ADD_D060,{6U,4U,0U}},
{ADD_D060,{7U,4U,0U}},
{ADD_D068,{0U,4U,0U}},
{ADD_D068,{1U,4U,0U}},
{ADD_D068,{2U,4U,0U}},
{ADD_D068,{3U,4U,0U}},
{ADD_D068,{4U,4U,0U}},
{ADD_D068,{5U,4U,0U}},
{ADD_D068,{6U,4U,0U}},
{ADD_D068,{7U,4U,0U}},
{ADD_D070,{0U,4U,0U}},
{ADD_D070,{1U,4U,0U}},
{ADD_D070,{2U,4U,0U}},
{ADD_D070,{3U,4U,0U}},
{ADD_D070,{4U,4U,0U}},
{ADD_D070,{5U,4U,0U}},
{ADD_D070,{6U,4U,0U}},
{ADD_D070,{7U,4U,0U}},
{ADD_D078,{0U,4U,0U}},
{ADD_D079,{0U,4U,0U}},
{ADD_D07A,{0U,4U,0U}},
{ADD_D07B,{0U,4U,0U}},
{ADD_D07C,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D080,{0U,4U,0U}},
{ADD_D080,{1U,4U,0U}},
{ADD_D080,{2U,4U,0U}},
{ADD_D080,{3U,4U,0U}},
{ADD_D080,{4U,4U,0U}},
{ADD_D080,{5U,4U,0U}},
{ADD_D080,{6U,4U,0U}},
{ADD_D080,{7U,4U,0U}},
{ADD_D088,{0U,4U,0U}},
{ADD_D088,{1U,4U,0U}},
{ADD_D088,{2U,4U,0U}},
{ADD_D088,{3U,4U,0U}},
{ADD_D088,{4U,4U,0U}},
{ADD_D088,{5U,4U,0U}},
{ADD_D088,{6U,4U,0U}},
{ADD_D088,{7U,4U,0U}},
{ADD_D090,{0U,4U,0U}},
{ADD_D090,{1U,4U,0U}},
{ADD_D090,{2U,4U,0U}},
{ADD_D090,{3U,4U,0U}},
{ADD_D090,{4U,4U,0U}},
{ADD_D090,{5U,4U,0U}},
{ADD_D090,{6U,4U,0U}},
{ADD_D090,{7U,4U,0U}},
{ADD_D098,{0U,4U,0U}},
{ADD_D098,{1U,4U,0U}},
{ADD_D098,{2U,4U,0U}},
{ADD_D098,{3U,4U,0U}},
{ADD_D098,{4U,4U,0U}},
{ADD_D098,{5U,4U,0U}},
{ADD_D098,{6U,4U,0U}},
{ADD_D098,{7U,4U,0U}},
{ADD_D0A0,{0U,4U,0U}},
{ADD_D0A0,{1U,4U,0U}},
{ADD_D0A0,{2U,4U,0U}},
{ADD_D0A0,{3U,4U,0U}},
{ADD_D0A0,{4U,4U,0U}},
{ADD_D0A0,{5U,4U,0U}},
{ADD_D0A0,{6U,4U,0U}},
{ADD_D0A0,{7U,4U,0U}},
{ADD_D0A8,{0U,4U,0U}},
{ADD_D0A8,{1U,4U,0U}},
{ADD_D0A8,{2U,4U,0U}},
{ADD_D0A8,{3U,4U,0U}},
{ADD_D0A8,{4U,4U,0U}},
{ADD_D0A8,{5U,4U,0U}},
{ADD_D0A8,{6U,4U,0U}},
{ADD_D0A8,{7U,4U,0U}},
{ADD_D0B0,{0U,4U,0U}},
{ADD_D0B0,{1U,4U,0U}},
{ADD_D0B0,{2U,4U,0U}},
{ADD_D0B0,{3U,4U,0U}},
{ADD_D0B0,{4U,4U,0U}},
{ADD_D0B0,{5U,4U,0U}},
{ADD_D0B0,{6U,4U,0U}},
{ADD_D0B0,{7U,4U,0U}},
{ADD_D0B8,{0U,4U,0U}},
{ADD_D0B9,{0U,4U,0U}},
{ADD_D0BA,{0U,4U,0U}},
{ADD_D0BB,{0U,4U,0U}},
{ADD_D0BC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D0C0,{0U,4U,0U}},
{ADDA_D0C0,{1U,4U,0U}},
{ADDA_D0C0,{2U,4U,0U}},
{ADDA_D0C0,{3U,4U,0U}},
{ADDA_D0C0,{4U,4U,0U}},
{ADDA_D0C0,{5U,4U,0U}},
{ADDA_D0C0,{6U,4U,0U}},
{ADDA_D0C0,{7U,4U,0U}},
{ADDA_D0C8,{0U,4U,0U}},
{ADDA_D0C8,{1U,4U,0U}},
{ADDA_D0C8,{2U,4U,0U}},
{ADDA_D0C8,{3U,4U,0U}},
{ADDA_D0C8,{4U,4U,0U}},
{ADDA_D0C8,{5U,4U,0U}},
{ADDA_D0C8,{6U,4U,0U}},
{ADDA_D0C8,{7U,4U,0U}},
{ADDA_D0D0,{0U,4U,0U}},
{ADDA_D0D0,{1U,4U,0U}},
{ADDA_D0D0,{2U,4U,0U}},
{ADDA_D0D0,{3U,4U,0U}},
{ADDA_D0D0,{4U,4U,0U}},
{ADDA_D0D0,{5U,4U,0U}},
{ADDA_D0D0,{6U,4U,0U}},
{ADDA_D0D0,{7U,4U,0U}},
{ADDA_D0D8,{0U,4U,0U}},
{ADDA_D0D8,{1U,4U,0U}},
{ADDA_D0D8,{2U,4U,0U}},
{ADDA_D0D8,{3U,4U,0U}},
{ADDA_D0D8,{4U,4U,0U}},
{ADDA_D0D8,{5U,4U,0U}},
{ADDA_D0D8,{6U,4U,0U}},
{ADDA_D0D8,{7U,4U,0U}},
{ADDA_D0E0,{0U,4U,0U}},
{ADDA_D0E0,{1U,4U,0U}},
{ADDA_D0E0,{2U,4U,0U}},
{ADDA_D0E0,{3U,4U,0U}},
{ADDA_D0E0,{4U,4U,0U}},
{ADDA_D0E0,{5U,4U,0U}},
{ADDA_D0E0,{6U,4U,0U}},
{ADDA_D0E0,{7U,4U,0U}},
{ADDA_D0E8,{0U,4U,0U}},
{ADDA_D0E8,{1U,4U,0U}},
{ADDA_D0E8,{2U,4U,0U}},
{ADDA_D0E8,{3U,4U,0U}},
{ADDA_D0E8,{4U,4U,0U}},
{ADDA_D0E8,{5U,4U,0U}},
{ADDA_D0E8,{6U,4U,0U}},
{ADDA_D0E8,{7U,4U,0U}},
{ADDA_D0F0,{0U,4U,0U}},
{ADDA_D0F0,{1U,4U,0U}},
{ADDA_D0F0,{2U,4U,0U}},
{ADDA_D0F0,{3U,4U,0U}},
{ADDA_D0F0,{4U,4U,0U}},
{ADDA_D0F0,{5U,4U,0U}},
{ADDA_D0F0,{6U,4U,0U}},
{ADDA_D0F0,{7U,4U,0U}},
{ADDA_D0F8,{0U,4U,0U}},
{ADDA_D0F9,{0U,4U,0U}},
{ADDA_D0FA,{0U,4U,0U}},
{ADDA_D0FB,{0U,4U,0U}},
{ADDA_D0FC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D100,{0U,4U,0U}},
{ADDX_D100,{1U,4U,0U}},
{ADDX_D100,{2U,4U,0U}},
{ADDX_D100,{3U,4U,0U}},
{ADDX_D100,{4U,4U,0U}},
{ADDX_D100,{5U,4U,0U}},
{ADDX_D100,{6U,4U,0U}},
{ADDX_D100,{7U,4U,0U}},
{ADDX_D108,{0U,4U,0U}},
{ADDX_D108,{1U,4U,0U}},
{ADDX_D108,{2U,4U,0U}},
{ADDX_D108,{3U,4U,0U}},
{ADDX_D108,{4U,4U,0U}},
{ADDX_D108,{5U,4U,0U}},
{ADDX_D108,{6U,4U,0U}},
{ADDX_D108,{7U,4U,0U}},
{ADD_D110,{0U,4U,0U}},
{ADD_D110,{1U,4U,0U}},
{ADD_D110,{2U,4U,0U}},
{ADD_D110,{3U,4U,0U}},
{ADD_D110,{4U,4U,0U}},
{ADD_D110,{5U,4U,0U}},
{ADD_D110,{6U,4U,0U}},
{ADD_D110,{7U,4U,0U}},
{ADD_D118,{0U,4U,0U}},
{ADD_D118,{1U,4U,0U}},
{ADD_D118,{2U,4U,0U}},
{ADD_D118,{3U,4U,0U}},
{ADD_D118,{4U,4U,0U}},
{ADD_D118,{5U,4U,0U}},
{ADD_D118,{6U,4U,0U}},
{ADD_D118,{7U,4U,0U}},
{ADD_D120,{0U,4U,0U}},
{ADD_D120,{1U,4U,0U}},
{ADD_D120,{2U,4U,0U}},
{ADD_D120,{3U,4U,0U}},
{ADD_D120,{4U,4U,0U}},
{ADD_D120,{5U,4U,0U}},
{ADD_D120,{6U,4U,0U}},
{ADD_D120,{7U,4U,0U}},
{ADD_D128,{0U,4U,0U}},
{ADD_D128,{1U,4U,0U}},
{ADD_D128,{2U,4U,0U}},
{ADD_D128,{3U,4U,0U}},
{ADD_D128,{4U,4U,0U}},
{ADD_D128,{5U,4U,0U}},
{ADD_D128,{6U,4U,0U}},
{ADD_D128,{7U,4U,0U}},
{ADD_D130,{0U,4U,0U}},
{ADD_D130,{1U,4U,0U}},
{ADD_D130,{2U,4U,0U}},
{ADD_D130,{3U,4U,0U}},
{ADD_D130,{4U,4U,0U}},
{ADD_D130,{5U,4U,0U}},
{ADD_D130,{6U,4U,0U}},
{ADD_D130,{7U,4U,0U}},
{ADD_D138,{0U,4U,0U}},
{ADD_D139,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D140,{0U,4U,0U}},
{ADDX_D140,{1U,4U,0U}},
{ADDX_D140,{2U,4U,0U}},
{ADDX_D140,{3U,4U,0U}},
{ADDX_D140,{4U,4U,0U}},
{ADDX_D140,{5U,4U,0U}},
{ADDX_D140,{6U,4U,0U}},
{ADDX_D140,{7U,4U,0U}},
{ADDX_D148,{0U,4U,0U}},
{ADDX_D148,{1U,4U,0U}},
{ADDX_D148,{2U,4U,0U}},
{ADDX_D148,{3U,4U,0U}},
{ADDX_D148,{4U,4U,0U}},
{ADDX_D148,{5U,4U,0U}},
{ADDX_D148,{6U,4U,0U}},
{ADDX_D148,{7U,4U,0U}},
{ADD_D150,{0U,4U,0U}},
{ADD_D150,{1U,4U,0U}},
{ADD_D150,{2U,4U,0U}},
{ADD_D150,{3U,4U,0U}},
{ADD_D150,{4U,4U,0U}},
{ADD_D150,{5U,4U,0U}},
{ADD_D150,{6U,4U,0U}},
{ADD_D150,{7U,4U,0U}},
{ADD_D158,{0U,4U,0U}},
{ADD_D158,{1U,4U,0U}},
{ADD_D158,{2U,4U,0U}},
{ADD_D158,{3U,4U,0U}},
{ADD_D158,{4U,4U,0U}},
{ADD_D158,{5U,4U,0U}},
{ADD_D158,{6U,4U,0U}},
{ADD_D158,{7U,4U,0U}},
{ADD_D160,{0U,4U,0U}},
{ADD_D160,{1U,4U,0U}},
{ADD_D160,{2U,4U,0U}},
{ADD_D160,{3U,4U,0U}},
{ADD_D160,{4U,4U,0U}},
{ADD_D160,{5U,4U,0U}},
{ADD_D160,{6U,4U,0U}},
{ADD_D160,{7U,4U,0U}},
{ADD_D168,{0U,4U,0U}},
{ADD_D168,{1U,4U,0U}},
{ADD_D168,{2U,4U,0U}},
{ADD_D168,{3U,4U,0U}},
{ADD_D168,{4U,4U,0U}},
{ADD_D168,{5U,4U,0U}},
{ADD_D168,{6U,4U,0U}},
{ADD_D168,{7U,4U,0U}},
{ADD_D170,{0U,4U,0U}},
{ADD_D170,{1U,4U,0U}},
{ADD_D170,{2U,4U,0U}},
{ADD_D170,{3U,4U,0U}},
{ADD_D170,{4U,4U,0U}},
{ADD_D170,{5U,4U,0U}},
{ADD_D170,{6U,4U,0U}},
{ADD_D170,{7U,4U,0U}},
{ADD_D178,{0U,4U,0U}},
{ADD_D179,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D180,{0U,4U,0U}},
{ADDX_D180,{1U,4U,0U}},
{ADDX_D180,{2U,4U,0U}},
{ADDX_D180,{3U,4U,0U}},
{ADDX_D180,{4U,4U,0U}},
{ADDX_D180,{5U,4U,0U}},
{ADDX_D180,{6U,4U,0U}},
{ADDX_D180,{7U,4U,0U}},
{ADDX_D188,{0U,4U,0U}},
{ADDX_D188,{1U,4U,0U}},
{ADDX_D188,{2U,4U,0U}},
{ADDX_D188,{3U,4U,0U}},
{ADDX_D188,{4U,4U,0U}},
{ADDX_D188,{5U,4U,0U}},
{ADDX_D188,{6U,4U,0U}},
{ADDX_D188,{7U,4U,0U}},
{ADD_D190,{0U,4U,0U}},
{ADD_D190,{1U,4U,0U}},
{ADD_D190,{2U,4U,0U}},
{ADD_D190,{3U,4U,0U}},
{ADD_D190,{4U,4U,0U}},
{ADD_D190,{5U,4U,0U}},
{ADD_D190,{6U,4U,0U}},
{ADD_D190,{7U,4U,0U}},
{ADD_D198,{0U,4U,0U}},
{ADD_D198,{1U,4U,0U}},
{ADD_D198,{2U,4U,0U}},
{ADD_D198,{3U,4U,0U}},
{ADD_D198,{4U,4U,0U}},
{ADD_D198,{5U,4U,0U}},
{ADD_D198,{6U,4U,0U}},
{ADD_D198,{7U,4U,0U}},
{ADD_D1A0,{0U,4U,0U}},
{ADD_D1A0,{1U,4U,0U}},
{ADD_D1A0,{2U,4U,0U}},
{ADD_D1A0,{3U,4U,0U}},
{ADD_D1A0,{4U,4U,0U}},
{ADD_D1A0,{5U,4U,0U}},
{ADD_D1A0,{6U,4U,0U}},
{ADD_D1A0,{7U,4U,0U}},
{ADD_D1A8,{0U,4U,0U}},
{ADD_D1A8,{1U,4U,0U}},
{ADD_D1A8,{2U,4U,0U}},
{ADD_D1A8,{3U,4U,0U}},
{ADD_D1A8,{4U,4U,0U}},
{ADD_D1A8,{5U,4U,0U}},
{ADD_D1A8,{6U,4U,0U}},
{ADD_D1A8,{7U,4U,0U}},
{ADD_D1B0,{0U,4U,0U}},
{ADD_D1B0,{1U,4U,0U}},
{ADD_D1B0,{2U,4U,0U}},
{ADD_D1B0,{3U,4U,0U}},
{ADD_D1B0,{4U,4U,0U}},
{ADD_D1B0,{5U,4U,0U}},
{ADD_D1B0,{6U,4U,0U}},
{ADD_D1B0,{7U,4U,0U}},
{ADD_D1B8,{0U,4U,0U}},
{ADD_D1B9,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D1C0,{0U,4U,0U}},
{ADDA_D1C0,{1U,4U,0U}},
{ADDA_D1C0,{2U,4U,0U}},
{ADDA_D1C0,{3U,4U,0U}},
{ADDA_D1C0,{4U,4U,0U}},
{ADDA_D1C0,{5U,4U,0U}},
{ADDA_D1C0,{6U,4U,0U}},
{ADDA_D1C0,{7U,4U,0U}},
{ADDA_D1C8,{0U,4U,0U}},
{ADDA_D1C8,{1U,4U,0U}},
{ADDA_D1C8,{2U,4U,0U}},
{ADDA_D1C8,{3U,4U,0U}},
{ADDA_D1C8,{4U,4U,0U}},
{ADDA_D1C8,{5U,4U,0U}},
{ADDA_D1C8,{6U,4U,0U}},
{ADDA_D1C8,{7U,4U,0U}},
{ADDA_D1D0,{0U,4U,0U}},
{ADDA_D1D0,{1U,4U,0U}},
{ADDA_D1D0,{2U,4U,0U}},
{ADDA_D1D0,{3U,4U,0U}},
{ADDA_D1D0,{4U,4U,0U}},
{ADDA_D1D0,{5U,4U,0U}},
{ADDA_D1D0,{6U,4U,0U}},
{ADDA_D1D0,{7U,4U,0U}},
{ADDA_D1D8,{0U,4U,0U}},
{ADDA_D1D8,{1U,4U,0U}},
{ADDA_D1D8,{2U,4U,0U}},
{ADDA_D1D8,{3U,4U,0U}},
{ADDA_D1D8,{4U,4U,0U}},
{ADDA_D1D8,{5U,4U,0U}},
{ADDA_D1D8,{6U,4U,0U}},
{ADDA_D1D8,{7U,4U,0U}},
{ADDA_D1E0,{0U,4U,0U}},
{ADDA_D1E0,{1U,4U,0U}},
{ADDA_D1E0,{2U,4U,0U}},
{ADDA_D1E0,{3U,4U,0U}},
{ADDA_D1E0,{4U,4U,0U}},
{ADDA_D1E0,{5U,4U,0U}},
{ADDA_D1E0,{6U,4U,0U}},
{ADDA_D1E0,{7U,4U,0U}},
{ADDA_D1E8,{0U,4U,0U}},
{ADDA_D1E8,{1U,4U,0U}},
{ADDA_D1E8,{2U,4U,0U}},
{ADDA_D1E8,{3U,4U,0U}},
{ADDA_D1E8,{4U,4U,0U}},
{ADDA_D1E8,{5U,4U,0U}},
{ADDA_D1E8,{6U,4U,0U}},
{ADDA_D1E8,{7U,4U,0U}},
{ADDA_D1F0,{0U,4U,0U}},
{ADDA_D1F0,{1U,4U,0U}},
{ADDA_D1F0,{2U,4U,0U}},
{ADDA_D1F0,{3U,4U,0U}},
{ADDA_D1F0,{4U,4U,0U}},
{ADDA_D1F0,{5U,4U,0U}},
{ADDA_D1F0,{6U,4U,0U}},
{ADDA_D1F0,{7U,4U,0U}},
{ADDA_D1F8,{0U,4U,0U}},
{ADDA_D1F9,{0U,4U,0U}},
{ADDA_D1FA,{0U,4U,0U}},
{ADDA_D1FB,{0U,4U,0U}},
{ADDA_D1FC,{0U,4U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D000,{0U,5U,0U}},
{ADD_D000,{1U,5U,0U}},
{ADD_D000,{2U,5U,0U}},
{ADD_D000,{3U,5U,0U}},
{ADD_D000,{4U,5U,0U}},
{ADD_D000,{5U,5U,0U}},
{ADD_D000,{6U,5U,0U}},
{ADD_D000,{7U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D010,{0U,5U,0U}},
{ADD_D010,{1U,5U,0U}},
{ADD_D010,{2U,5U,0U}},
{ADD_D010,{3U,5U,0U}},
{ADD_D010,{4U,5U,0U}},
{ADD_D010,{5U,5U,0U}},
{ADD_D010,{6U,5U,0U}},
{ADD_D010,{7U,5U,0U}},
{ADD_D018,{0U,5U,0U}},
{ADD_D018,{1U,5U,0U}},
{ADD_D018,{2U,5U,0U}},
{ADD_D018,{3U,5U,0U}},
{ADD_D018,{4U,5U,0U}},
{ADD_D018,{5U,5U,0U}},
{ADD_D018,{6U,5U,0U}},
{ADD_D018,{7U,5U,0U}},
{ADD_D020,{0U,5U,0U}},
{ADD_D020,{1U,5U,0U}},
{ADD_D020,{2U,5U,0U}},
{ADD_D020,{3U,5U,0U}},
{ADD_D020,{4U,5U,0U}},
{ADD_D020,{5U,5U,0U}},
{ADD_D020,{6U,5U,0U}},
{ADD_D020,{7U,5U,0U}},
{ADD_D028,{0U,5U,0U}},
{ADD_D028,{1U,5U,0U}},
{ADD_D028,{2U,5U,0U}},
{ADD_D028,{3U,5U,0U}},
{ADD_D028,{4U,5U,0U}},
{ADD_D028,{5U,5U,0U}},
{ADD_D028,{6U,5U,0U}},
{ADD_D028,{7U,5U,0U}},
{ADD_D030,{0U,5U,0U}},
{ADD_D030,{1U,5U,0U}},
{ADD_D030,{2U,5U,0U}},
{ADD_D030,{3U,5U,0U}},
{ADD_D030,{4U,5U,0U}},
{ADD_D030,{5U,5U,0U}},
{ADD_D030,{6U,5U,0U}},
{ADD_D030,{7U,5U,0U}},
{ADD_D038,{0U,5U,0U}},
{ADD_D039,{0U,5U,0U}},
{ADD_D03A,{0U,5U,0U}},
{ADD_D03B,{0U,5U,0U}},
{ADD_D03C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D040,{0U,5U,0U}},
{ADD_D040,{1U,5U,0U}},
{ADD_D040,{2U,5U,0U}},
{ADD_D040,{3U,5U,0U}},
{ADD_D040,{4U,5U,0U}},
{ADD_D040,{5U,5U,0U}},
{ADD_D040,{6U,5U,0U}},
{ADD_D040,{7U,5U,0U}},
{ADD_D048,{0U,5U,0U}},
{ADD_D048,{1U,5U,0U}},
{ADD_D048,{2U,5U,0U}},
{ADD_D048,{3U,5U,0U}},
{ADD_D048,{4U,5U,0U}},
{ADD_D048,{5U,5U,0U}},
{ADD_D048,{6U,5U,0U}},
{ADD_D048,{7U,5U,0U}},
{ADD_D050,{0U,5U,0U}},
{ADD_D050,{1U,5U,0U}},
{ADD_D050,{2U,5U,0U}},
{ADD_D050,{3U,5U,0U}},
{ADD_D050,{4U,5U,0U}},
{ADD_D050,{5U,5U,0U}},
{ADD_D050,{6U,5U,0U}},
{ADD_D050,{7U,5U,0U}},
{ADD_D058,{0U,5U,0U}},
{ADD_D058,{1U,5U,0U}},
{ADD_D058,{2U,5U,0U}},
{ADD_D058,{3U,5U,0U}},
{ADD_D058,{4U,5U,0U}},
{ADD_D058,{5U,5U,0U}},
{ADD_D058,{6U,5U,0U}},
{ADD_D058,{7U,5U,0U}},
{ADD_D060,{0U,5U,0U}},
{ADD_D060,{1U,5U,0U}},
{ADD_D060,{2U,5U,0U}},
{ADD_D060,{3U,5U,0U}},
{ADD_D060,{4U,5U,0U}},
{ADD_D060,{5U,5U,0U}},
{ADD_D060,{6U,5U,0U}},
{ADD_D060,{7U,5U,0U}},
{ADD_D068,{0U,5U,0U}},
{ADD_D068,{1U,5U,0U}},
{ADD_D068,{2U,5U,0U}},
{ADD_D068,{3U,5U,0U}},
{ADD_D068,{4U,5U,0U}},
{ADD_D068,{5U,5U,0U}},
{ADD_D068,{6U,5U,0U}},
{ADD_D068,{7U,5U,0U}},
{ADD_D070,{0U,5U,0U}},
{ADD_D070,{1U,5U,0U}},
{ADD_D070,{2U,5U,0U}},
{ADD_D070,{3U,5U,0U}},
{ADD_D070,{4U,5U,0U}},
{ADD_D070,{5U,5U,0U}},
{ADD_D070,{6U,5U,0U}},
{ADD_D070,{7U,5U,0U}},
{ADD_D078,{0U,5U,0U}},
{ADD_D079,{0U,5U,0U}},
{ADD_D07A,{0U,5U,0U}},
{ADD_D07B,{0U,5U,0U}},
{ADD_D07C,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D080,{0U,5U,0U}},
{ADD_D080,{1U,5U,0U}},
{ADD_D080,{2U,5U,0U}},
{ADD_D080,{3U,5U,0U}},
{ADD_D080,{4U,5U,0U}},
{ADD_D080,{5U,5U,0U}},
{ADD_D080,{6U,5U,0U}},
{ADD_D080,{7U,5U,0U}},
{ADD_D088,{0U,5U,0U}},
{ADD_D088,{1U,5U,0U}},
{ADD_D088,{2U,5U,0U}},
{ADD_D088,{3U,5U,0U}},
{ADD_D088,{4U,5U,0U}},
{ADD_D088,{5U,5U,0U}},
{ADD_D088,{6U,5U,0U}},
{ADD_D088,{7U,5U,0U}},
{ADD_D090,{0U,5U,0U}},
{ADD_D090,{1U,5U,0U}},
{ADD_D090,{2U,5U,0U}},
{ADD_D090,{3U,5U,0U}},
{ADD_D090,{4U,5U,0U}},
{ADD_D090,{5U,5U,0U}},
{ADD_D090,{6U,5U,0U}},
{ADD_D090,{7U,5U,0U}},
{ADD_D098,{0U,5U,0U}},
{ADD_D098,{1U,5U,0U}},
{ADD_D098,{2U,5U,0U}},
{ADD_D098,{3U,5U,0U}},
{ADD_D098,{4U,5U,0U}},
{ADD_D098,{5U,5U,0U}},
{ADD_D098,{6U,5U,0U}},
{ADD_D098,{7U,5U,0U}},
{ADD_D0A0,{0U,5U,0U}},
{ADD_D0A0,{1U,5U,0U}},
{ADD_D0A0,{2U,5U,0U}},
{ADD_D0A0,{3U,5U,0U}},
{ADD_D0A0,{4U,5U,0U}},
{ADD_D0A0,{5U,5U,0U}},
{ADD_D0A0,{6U,5U,0U}},
{ADD_D0A0,{7U,5U,0U}},
{ADD_D0A8,{0U,5U,0U}},
{ADD_D0A8,{1U,5U,0U}},
{ADD_D0A8,{2U,5U,0U}},
{ADD_D0A8,{3U,5U,0U}},
{ADD_D0A8,{4U,5U,0U}},
{ADD_D0A8,{5U,5U,0U}},
{ADD_D0A8,{6U,5U,0U}},
{ADD_D0A8,{7U,5U,0U}},
{ADD_D0B0,{0U,5U,0U}},
{ADD_D0B0,{1U,5U,0U}},
{ADD_D0B0,{2U,5U,0U}},
{ADD_D0B0,{3U,5U,0U}},
{ADD_D0B0,{4U,5U,0U}},
{ADD_D0B0,{5U,5U,0U}},
{ADD_D0B0,{6U,5U,0U}},
{ADD_D0B0,{7U,5U,0U}},
{ADD_D0B8,{0U,5U,0U}},
{ADD_D0B9,{0U,5U,0U}},
{ADD_D0BA,{0U,5U,0U}},
{ADD_D0BB,{0U,5U,0U}},
{ADD_D0BC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D0C0,{0U,5U,0U}},
{ADDA_D0C0,{1U,5U,0U}},
{ADDA_D0C0,{2U,5U,0U}},
{ADDA_D0C0,{3U,5U,0U}},
{ADDA_D0C0,{4U,5U,0U}},
{ADDA_D0C0,{5U,5U,0U}},
{ADDA_D0C0,{6U,5U,0U}},
{ADDA_D0C0,{7U,5U,0U}},
{ADDA_D0C8,{0U,5U,0U}},
{ADDA_D0C8,{1U,5U,0U}},
{ADDA_D0C8,{2U,5U,0U}},
{ADDA_D0C8,{3U,5U,0U}},
{ADDA_D0C8,{4U,5U,0U}},
{ADDA_D0C8,{5U,5U,0U}},
{ADDA_D0C8,{6U,5U,0U}},
{ADDA_D0C8,{7U,5U,0U}},
{ADDA_D0D0,{0U,5U,0U}},
{ADDA_D0D0,{1U,5U,0U}},
{ADDA_D0D0,{2U,5U,0U}},
{ADDA_D0D0,{3U,5U,0U}},
{ADDA_D0D0,{4U,5U,0U}},
{ADDA_D0D0,{5U,5U,0U}},
{ADDA_D0D0,{6U,5U,0U}},
{ADDA_D0D0,{7U,5U,0U}},
{ADDA_D0D8,{0U,5U,0U}},
{ADDA_D0D8,{1U,5U,0U}},
{ADDA_D0D8,{2U,5U,0U}},
{ADDA_D0D8,{3U,5U,0U}},
{ADDA_D0D8,{4U,5U,0U}},
{ADDA_D0D8,{5U,5U,0U}},
{ADDA_D0D8,{6U,5U,0U}},
{ADDA_D0D8,{7U,5U,0U}},
{ADDA_D0E0,{0U,5U,0U}},
{ADDA_D0E0,{1U,5U,0U}},
{ADDA_D0E0,{2U,5U,0U}},
{ADDA_D0E0,{3U,5U,0U}},
{ADDA_D0E0,{4U,5U,0U}},
{ADDA_D0E0,{5U,5U,0U}},
{ADDA_D0E0,{6U,5U,0U}},
{ADDA_D0E0,{7U,5U,0U}},
{ADDA_D0E8,{0U,5U,0U}},
{ADDA_D0E8,{1U,5U,0U}},
{ADDA_D0E8,{2U,5U,0U}},
{ADDA_D0E8,{3U,5U,0U}},
{ADDA_D0E8,{4U,5U,0U}},
{ADDA_D0E8,{5U,5U,0U}},
{ADDA_D0E8,{6U,5U,0U}},
{ADDA_D0E8,{7U,5U,0U}},
{ADDA_D0F0,{0U,5U,0U}},
{ADDA_D0F0,{1U,5U,0U}},
{ADDA_D0F0,{2U,5U,0U}},
{ADDA_D0F0,{3U,5U,0U}},
{ADDA_D0F0,{4U,5U,0U}},
{ADDA_D0F0,{5U,5U,0U}},
{ADDA_D0F0,{6U,5U,0U}},
{ADDA_D0F0,{7U,5U,0U}},
{ADDA_D0F8,{0U,5U,0U}},
{ADDA_D0F9,{0U,5U,0U}},
{ADDA_D0FA,{0U,5U,0U}},
{ADDA_D0FB,{0U,5U,0U}},
{ADDA_D0FC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D100,{0U,5U,0U}},
{ADDX_D100,{1U,5U,0U}},
{ADDX_D100,{2U,5U,0U}},
{ADDX_D100,{3U,5U,0U}},
{ADDX_D100,{4U,5U,0U}},
{ADDX_D100,{5U,5U,0U}},
{ADDX_D100,{6U,5U,0U}},
{ADDX_D100,{7U,5U,0U}},
{ADDX_D108,{0U,5U,0U}},
{ADDX_D108,{1U,5U,0U}},
{ADDX_D108,{2U,5U,0U}},
{ADDX_D108,{3U,5U,0U}},
{ADDX_D108,{4U,5U,0U}},
{ADDX_D108,{5U,5U,0U}},
{ADDX_D108,{6U,5U,0U}},
{ADDX_D108,{7U,5U,0U}},
{ADD_D110,{0U,5U,0U}},
{ADD_D110,{1U,5U,0U}},
{ADD_D110,{2U,5U,0U}},
{ADD_D110,{3U,5U,0U}},
{ADD_D110,{4U,5U,0U}},
{ADD_D110,{5U,5U,0U}},
{ADD_D110,{6U,5U,0U}},
{ADD_D110,{7U,5U,0U}},
{ADD_D118,{0U,5U,0U}},
{ADD_D118,{1U,5U,0U}},
{ADD_D118,{2U,5U,0U}},
{ADD_D118,{3U,5U,0U}},
{ADD_D118,{4U,5U,0U}},
{ADD_D118,{5U,5U,0U}},
{ADD_D118,{6U,5U,0U}},
{ADD_D118,{7U,5U,0U}},
{ADD_D120,{0U,5U,0U}},
{ADD_D120,{1U,5U,0U}},
{ADD_D120,{2U,5U,0U}},
{ADD_D120,{3U,5U,0U}},
{ADD_D120,{4U,5U,0U}},
{ADD_D120,{5U,5U,0U}},
{ADD_D120,{6U,5U,0U}},
{ADD_D120,{7U,5U,0U}},
{ADD_D128,{0U,5U,0U}},
{ADD_D128,{1U,5U,0U}},
{ADD_D128,{2U,5U,0U}},
{ADD_D128,{3U,5U,0U}},
{ADD_D128,{4U,5U,0U}},
{ADD_D128,{5U,5U,0U}},
{ADD_D128,{6U,5U,0U}},
{ADD_D128,{7U,5U,0U}},
{ADD_D130,{0U,5U,0U}},
{ADD_D130,{1U,5U,0U}},
{ADD_D130,{2U,5U,0U}},
{ADD_D130,{3U,5U,0U}},
{ADD_D130,{4U,5U,0U}},
{ADD_D130,{5U,5U,0U}},
{ADD_D130,{6U,5U,0U}},
{ADD_D130,{7U,5U,0U}},
{ADD_D138,{0U,5U,0U}},
{ADD_D139,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D140,{0U,5U,0U}},
{ADDX_D140,{1U,5U,0U}},
{ADDX_D140,{2U,5U,0U}},
{ADDX_D140,{3U,5U,0U}},
{ADDX_D140,{4U,5U,0U}},
{ADDX_D140,{5U,5U,0U}},
{ADDX_D140,{6U,5U,0U}},
{ADDX_D140,{7U,5U,0U}},
{ADDX_D148,{0U,5U,0U}},
{ADDX_D148,{1U,5U,0U}},
{ADDX_D148,{2U,5U,0U}},
{ADDX_D148,{3U,5U,0U}},
{ADDX_D148,{4U,5U,0U}},
{ADDX_D148,{5U,5U,0U}},
{ADDX_D148,{6U,5U,0U}},
{ADDX_D148,{7U,5U,0U}},
{ADD_D150,{0U,5U,0U}},
{ADD_D150,{1U,5U,0U}},
{ADD_D150,{2U,5U,0U}},
{ADD_D150,{3U,5U,0U}},
{ADD_D150,{4U,5U,0U}},
{ADD_D150,{5U,5U,0U}},
{ADD_D150,{6U,5U,0U}},
{ADD_D150,{7U,5U,0U}},
{ADD_D158,{0U,5U,0U}},
{ADD_D158,{1U,5U,0U}},
{ADD_D158,{2U,5U,0U}},
{ADD_D158,{3U,5U,0U}},
{ADD_D158,{4U,5U,0U}},
{ADD_D158,{5U,5U,0U}},
{ADD_D158,{6U,5U,0U}},
{ADD_D158,{7U,5U,0U}},
{ADD_D160,{0U,5U,0U}},
{ADD_D160,{1U,5U,0U}},
{ADD_D160,{2U,5U,0U}},
{ADD_D160,{3U,5U,0U}},
{ADD_D160,{4U,5U,0U}},
{ADD_D160,{5U,5U,0U}},
{ADD_D160,{6U,5U,0U}},
{ADD_D160,{7U,5U,0U}},
{ADD_D168,{0U,5U,0U}},
{ADD_D168,{1U,5U,0U}},
{ADD_D168,{2U,5U,0U}},
{ADD_D168,{3U,5U,0U}},
{ADD_D168,{4U,5U,0U}},
{ADD_D168,{5U,5U,0U}},
{ADD_D168,{6U,5U,0U}},
{ADD_D168,{7U,5U,0U}},
{ADD_D170,{0U,5U,0U}},
{ADD_D170,{1U,5U,0U}},
{ADD_D170,{2U,5U,0U}},
{ADD_D170,{3U,5U,0U}},
{ADD_D170,{4U,5U,0U}},
{ADD_D170,{5U,5U,0U}},
{ADD_D170,{6U,5U,0U}},
{ADD_D170,{7U,5U,0U}},
{ADD_D178,{0U,5U,0U}},
{ADD_D179,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D180,{0U,5U,0U}},
{ADDX_D180,{1U,5U,0U}},
{ADDX_D180,{2U,5U,0U}},
{ADDX_D180,{3U,5U,0U}},
{ADDX_D180,{4U,5U,0U}},
{ADDX_D180,{5U,5U,0U}},
{ADDX_D180,{6U,5U,0U}},
{ADDX_D180,{7U,5U,0U}},
{ADDX_D188,{0U,5U,0U}},
{ADDX_D188,{1U,5U,0U}},
{ADDX_D188,{2U,5U,0U}},
{ADDX_D188,{3U,5U,0U}},
{ADDX_D188,{4U,5U,0U}},
{ADDX_D188,{5U,5U,0U}},
{ADDX_D188,{6U,5U,0U}},
{ADDX_D188,{7U,5U,0U}},
{ADD_D190,{0U,5U,0U}},
{ADD_D190,{1U,5U,0U}},
{ADD_D190,{2U,5U,0U}},
{ADD_D190,{3U,5U,0U}},
{ADD_D190,{4U,5U,0U}},
{ADD_D190,{5U,5U,0U}},
{ADD_D190,{6U,5U,0U}},
{ADD_D190,{7U,5U,0U}},
{ADD_D198,{0U,5U,0U}},
{ADD_D198,{1U,5U,0U}},
{ADD_D198,{2U,5U,0U}},
{ADD_D198,{3U,5U,0U}},
{ADD_D198,{4U,5U,0U}},
{ADD_D198,{5U,5U,0U}},
{ADD_D198,{6U,5U,0U}},
{ADD_D198,{7U,5U,0U}},
{ADD_D1A0,{0U,5U,0U}},
{ADD_D1A0,{1U,5U,0U}},
{ADD_D1A0,{2U,5U,0U}},
{ADD_D1A0,{3U,5U,0U}},
{ADD_D1A0,{4U,5U,0U}},
{ADD_D1A0,{5U,5U,0U}},
{ADD_D1A0,{6U,5U,0U}},
{ADD_D1A0,{7U,5U,0U}},
{ADD_D1A8,{0U,5U,0U}},
{ADD_D1A8,{1U,5U,0U}},
{ADD_D1A8,{2U,5U,0U}},
{ADD_D1A8,{3U,5U,0U}},
{ADD_D1A8,{4U,5U,0U}},
{ADD_D1A8,{5U,5U,0U}},
{ADD_D1A8,{6U,5U,0U}},
{ADD_D1A8,{7U,5U,0U}},
{ADD_D1B0,{0U,5U,0U}},
{ADD_D1B0,{1U,5U,0U}},
{ADD_D1B0,{2U,5U,0U}},
{ADD_D1B0,{3U,5U,0U}},
{ADD_D1B0,{4U,5U,0U}},
{ADD_D1B0,{5U,5U,0U}},
{ADD_D1B0,{6U,5U,0U}},
{ADD_D1B0,{7U,5U,0U}},
{ADD_D1B8,{0U,5U,0U}},
{ADD_D1B9,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D1C0,{0U,5U,0U}},
{ADDA_D1C0,{1U,5U,0U}},
{ADDA_D1C0,{2U,5U,0U}},
{ADDA_D1C0,{3U,5U,0U}},
{ADDA_D1C0,{4U,5U,0U}},
{ADDA_D1C0,{5U,5U,0U}},
{ADDA_D1C0,{6U,5U,0U}},
{ADDA_D1C0,{7U,5U,0U}},
{ADDA_D1C8,{0U,5U,0U}},
{ADDA_D1C8,{1U,5U,0U}},
{ADDA_D1C8,{2U,5U,0U}},
{ADDA_D1C8,{3U,5U,0U}},
{ADDA_D1C8,{4U,5U,0U}},
{ADDA_D1C8,{5U,5U,0U}},
{ADDA_D1C8,{6U,5U,0U}},
{ADDA_D1C8,{7U,5U,0U}},
{ADDA_D1D0,{0U,5U,0U}},
{ADDA_D1D0,{1U,5U,0U}},
{ADDA_D1D0,{2U,5U,0U}},
{ADDA_D1D0,{3U,5U,0U}},
{ADDA_D1D0,{4U,5U,0U}},
{ADDA_D1D0,{5U,5U,0U}},
{ADDA_D1D0,{6U,5U,0U}},
{ADDA_D1D0,{7U,5U,0U}},
{ADDA_D1D8,{0U,5U,0U}},
{ADDA_D1D8,{1U,5U,0U}},
{ADDA_D1D8,{2U,5U,0U}},
{ADDA_D1D8,{3U,5U,0U}},
{ADDA_D1D8,{4U,5U,0U}},
{ADDA_D1D8,{5U,5U,0U}},
{ADDA_D1D8,{6U,5U,0U}},
{ADDA_D1D8,{7U,5U,0U}},
{ADDA_D1E0,{0U,5U,0U}},
{ADDA_D1E0,{1U,5U,0U}},
{ADDA_D1E0,{2U,5U,0U}},
{ADDA_D1E0,{3U,5U,0U}},
{ADDA_D1E0,{4U,5U,0U}},
{ADDA_D1E0,{5U,5U,0U}},
{ADDA_D1E0,{6U,5U,0U}},
{ADDA_D1E0,{7U,5U,0U}},
{ADDA_D1E8,{0U,5U,0U}},
{ADDA_D1E8,{1U,5U,0U}},
{ADDA_D1E8,{2U,5U,0U}},
{ADDA_D1E8,{3U,5U,0U}},
{ADDA_D1E8,{4U,5U,0U}},
{ADDA_D1E8,{5U,5U,0U}},
{ADDA_D1E8,{6U,5U,0U}},
{ADDA_D1E8,{7U,5U,0U}},
{ADDA_D1F0,{0U,5U,0U}},
{ADDA_D1F0,{1U,5U,0U}},
{ADDA_D1F0,{2U,5U,0U}},
{ADDA_D1F0,{3U,5U,0U}},
{ADDA_D1F0,{4U,5U,0U}},
{ADDA_D1F0,{5U,5U,0U}},
{ADDA_D1F0,{6U,5U,0U}},
{ADDA_D1F0,{7U,5U,0U}},
{ADDA_D1F8,{0U,5U,0U}},
{ADDA_D1F9,{0U,5U,0U}},
{ADDA_D1FA,{0U,5U,0U}},
{ADDA_D1FB,{0U,5U,0U}},
{ADDA_D1FC,{0U,5U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D000,{0U,6U,0U}},
{ADD_D000,{1U,6U,0U}},
{ADD_D000,{2U,6U,0U}},
{ADD_D000,{3U,6U,0U}},
{ADD_D000,{4U,6U,0U}},
{ADD_D000,{5U,6U,0U}},
{ADD_D000,{6U,6U,0U}},
{ADD_D000,{7U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D010,{0U,6U,0U}},
{ADD_D010,{1U,6U,0U}},
{ADD_D010,{2U,6U,0U}},
{ADD_D010,{3U,6U,0U}},
{ADD_D010,{4U,6U,0U}},
{ADD_D010,{5U,6U,0U}},
{ADD_D010,{6U,6U,0U}},
{ADD_D010,{7U,6U,0U}},
{ADD_D018,{0U,6U,0U}},
{ADD_D018,{1U,6U,0U}},
{ADD_D018,{2U,6U,0U}},
{ADD_D018,{3U,6U,0U}},
{ADD_D018,{4U,6U,0U}},
{ADD_D018,{5U,6U,0U}},
{ADD_D018,{6U,6U,0U}},
{ADD_D018,{7U,6U,0U}},
{ADD_D020,{0U,6U,0U}},
{ADD_D020,{1U,6U,0U}},
{ADD_D020,{2U,6U,0U}},
{ADD_D020,{3U,6U,0U}},
{ADD_D020,{4U,6U,0U}},
{ADD_D020,{5U,6U,0U}},
{ADD_D020,{6U,6U,0U}},
{ADD_D020,{7U,6U,0U}},
{ADD_D028,{0U,6U,0U}},
{ADD_D028,{1U,6U,0U}},
{ADD_D028,{2U,6U,0U}},
{ADD_D028,{3U,6U,0U}},
{ADD_D028,{4U,6U,0U}},
{ADD_D028,{5U,6U,0U}},
{ADD_D028,{6U,6U,0U}},
{ADD_D028,{7U,6U,0U}},
{ADD_D030,{0U,6U,0U}},
{ADD_D030,{1U,6U,0U}},
{ADD_D030,{2U,6U,0U}},
{ADD_D030,{3U,6U,0U}},
{ADD_D030,{4U,6U,0U}},
{ADD_D030,{5U,6U,0U}},
{ADD_D030,{6U,6U,0U}},
{ADD_D030,{7U,6U,0U}},
{ADD_D038,{0U,6U,0U}},
{ADD_D039,{0U,6U,0U}},
{ADD_D03A,{0U,6U,0U}},
{ADD_D03B,{0U,6U,0U}},
{ADD_D03C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D040,{0U,6U,0U}},
{ADD_D040,{1U,6U,0U}},
{ADD_D040,{2U,6U,0U}},
{ADD_D040,{3U,6U,0U}},
{ADD_D040,{4U,6U,0U}},
{ADD_D040,{5U,6U,0U}},
{ADD_D040,{6U,6U,0U}},
{ADD_D040,{7U,6U,0U}},
{ADD_D048,{0U,6U,0U}},
{ADD_D048,{1U,6U,0U}},
{ADD_D048,{2U,6U,0U}},
{ADD_D048,{3U,6U,0U}},
{ADD_D048,{4U,6U,0U}},
{ADD_D048,{5U,6U,0U}},
{ADD_D048,{6U,6U,0U}},
{ADD_D048,{7U,6U,0U}},
{ADD_D050,{0U,6U,0U}},
{ADD_D050,{1U,6U,0U}},
{ADD_D050,{2U,6U,0U}},
{ADD_D050,{3U,6U,0U}},
{ADD_D050,{4U,6U,0U}},
{ADD_D050,{5U,6U,0U}},
{ADD_D050,{6U,6U,0U}},
{ADD_D050,{7U,6U,0U}},
{ADD_D058,{0U,6U,0U}},
{ADD_D058,{1U,6U,0U}},
{ADD_D058,{2U,6U,0U}},
{ADD_D058,{3U,6U,0U}},
{ADD_D058,{4U,6U,0U}},
{ADD_D058,{5U,6U,0U}},
{ADD_D058,{6U,6U,0U}},
{ADD_D058,{7U,6U,0U}},
{ADD_D060,{0U,6U,0U}},
{ADD_D060,{1U,6U,0U}},
{ADD_D060,{2U,6U,0U}},
{ADD_D060,{3U,6U,0U}},
{ADD_D060,{4U,6U,0U}},
{ADD_D060,{5U,6U,0U}},
{ADD_D060,{6U,6U,0U}},
{ADD_D060,{7U,6U,0U}},
{ADD_D068,{0U,6U,0U}},
{ADD_D068,{1U,6U,0U}},
{ADD_D068,{2U,6U,0U}},
{ADD_D068,{3U,6U,0U}},
{ADD_D068,{4U,6U,0U}},
{ADD_D068,{5U,6U,0U}},
{ADD_D068,{6U,6U,0U}},
{ADD_D068,{7U,6U,0U}},
{ADD_D070,{0U,6U,0U}},
{ADD_D070,{1U,6U,0U}},
{ADD_D070,{2U,6U,0U}},
{ADD_D070,{3U,6U,0U}},
{ADD_D070,{4U,6U,0U}},
{ADD_D070,{5U,6U,0U}},
{ADD_D070,{6U,6U,0U}},
{ADD_D070,{7U,6U,0U}},
{ADD_D078,{0U,6U,0U}},
{ADD_D079,{0U,6U,0U}},
{ADD_D07A,{0U,6U,0U}},
{ADD_D07B,{0U,6U,0U}},
{ADD_D07C,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D080,{0U,6U,0U}},
{ADD_D080,{1U,6U,0U}},
{ADD_D080,{2U,6U,0U}},
{ADD_D080,{3U,6U,0U}},
{ADD_D080,{4U,6U,0U}},
{ADD_D080,{5U,6U,0U}},
{ADD_D080,{6U,6U,0U}},
{ADD_D080,{7U,6U,0U}},
{ADD_D088,{0U,6U,0U}},
{ADD_D088,{1U,6U,0U}},
{ADD_D088,{2U,6U,0U}},
{ADD_D088,{3U,6U,0U}},
{ADD_D088,{4U,6U,0U}},
{ADD_D088,{5U,6U,0U}},
{ADD_D088,{6U,6U,0U}},
{ADD_D088,{7U,6U,0U}},
{ADD_D090,{0U,6U,0U}},
{ADD_D090,{1U,6U,0U}},
{ADD_D090,{2U,6U,0U}},
{ADD_D090,{3U,6U,0U}},
{ADD_D090,{4U,6U,0U}},
{ADD_D090,{5U,6U,0U}},
{ADD_D090,{6U,6U,0U}},
{ADD_D090,{7U,6U,0U}},
{ADD_D098,{0U,6U,0U}},
{ADD_D098,{1U,6U,0U}},
{ADD_D098,{2U,6U,0U}},
{ADD_D098,{3U,6U,0U}},
{ADD_D098,{4U,6U,0U}},
{ADD_D098,{5U,6U,0U}},
{ADD_D098,{6U,6U,0U}},
{ADD_D098,{7U,6U,0U}},
{ADD_D0A0,{0U,6U,0U}},
{ADD_D0A0,{1U,6U,0U}},
{ADD_D0A0,{2U,6U,0U}},
{ADD_D0A0,{3U,6U,0U}},
{ADD_D0A0,{4U,6U,0U}},
{ADD_D0A0,{5U,6U,0U}},
{ADD_D0A0,{6U,6U,0U}},
{ADD_D0A0,{7U,6U,0U}},
{ADD_D0A8,{0U,6U,0U}},
{ADD_D0A8,{1U,6U,0U}},
{ADD_D0A8,{2U,6U,0U}},
{ADD_D0A8,{3U,6U,0U}},
{ADD_D0A8,{4U,6U,0U}},
{ADD_D0A8,{5U,6U,0U}},
{ADD_D0A8,{6U,6U,0U}},
{ADD_D0A8,{7U,6U,0U}},
{ADD_D0B0,{0U,6U,0U}},
{ADD_D0B0,{1U,6U,0U}},
{ADD_D0B0,{2U,6U,0U}},
{ADD_D0B0,{3U,6U,0U}},
{ADD_D0B0,{4U,6U,0U}},
{ADD_D0B0,{5U,6U,0U}},
{ADD_D0B0,{6U,6U,0U}},
{ADD_D0B0,{7U,6U,0U}},
{ADD_D0B8,{0U,6U,0U}},
{ADD_D0B9,{0U,6U,0U}},
{ADD_D0BA,{0U,6U,0U}},
{ADD_D0BB,{0U,6U,0U}},
{ADD_D0BC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D0C0,{0U,6U,0U}},
{ADDA_D0C0,{1U,6U,0U}},
{ADDA_D0C0,{2U,6U,0U}},
{ADDA_D0C0,{3U,6U,0U}},
{ADDA_D0C0,{4U,6U,0U}},
{ADDA_D0C0,{5U,6U,0U}},
{ADDA_D0C0,{6U,6U,0U}},
{ADDA_D0C0,{7U,6U,0U}},
{ADDA_D0C8,{0U,6U,0U}},
{ADDA_D0C8,{1U,6U,0U}},
{ADDA_D0C8,{2U,6U,0U}},
{ADDA_D0C8,{3U,6U,0U}},
{ADDA_D0C8,{4U,6U,0U}},
{ADDA_D0C8,{5U,6U,0U}},
{ADDA_D0C8,{6U,6U,0U}},
{ADDA_D0C8,{7U,6U,0U}},
{ADDA_D0D0,{0U,6U,0U}},
{ADDA_D0D0,{1U,6U,0U}},
{ADDA_D0D0,{2U,6U,0U}},
{ADDA_D0D0,{3U,6U,0U}},
{ADDA_D0D0,{4U,6U,0U}},
{ADDA_D0D0,{5U,6U,0U}},
{ADDA_D0D0,{6U,6U,0U}},
{ADDA_D0D0,{7U,6U,0U}},
{ADDA_D0D8,{0U,6U,0U}},
{ADDA_D0D8,{1U,6U,0U}},
{ADDA_D0D8,{2U,6U,0U}},
{ADDA_D0D8,{3U,6U,0U}},
{ADDA_D0D8,{4U,6U,0U}},
{ADDA_D0D8,{5U,6U,0U}},
{ADDA_D0D8,{6U,6U,0U}},
{ADDA_D0D8,{7U,6U,0U}},
{ADDA_D0E0,{0U,6U,0U}},
{ADDA_D0E0,{1U,6U,0U}},
{ADDA_D0E0,{2U,6U,0U}},
{ADDA_D0E0,{3U,6U,0U}},
{ADDA_D0E0,{4U,6U,0U}},
{ADDA_D0E0,{5U,6U,0U}},
{ADDA_D0E0,{6U,6U,0U}},
{ADDA_D0E0,{7U,6U,0U}},
{ADDA_D0E8,{0U,6U,0U}},
{ADDA_D0E8,{1U,6U,0U}},
{ADDA_D0E8,{2U,6U,0U}},
{ADDA_D0E8,{3U,6U,0U}},
{ADDA_D0E8,{4U,6U,0U}},
{ADDA_D0E8,{5U,6U,0U}},
{ADDA_D0E8,{6U,6U,0U}},
{ADDA_D0E8,{7U,6U,0U}},
{ADDA_D0F0,{0U,6U,0U}},
{ADDA_D0F0,{1U,6U,0U}},
{ADDA_D0F0,{2U,6U,0U}},
{ADDA_D0F0,{3U,6U,0U}},
{ADDA_D0F0,{4U,6U,0U}},
{ADDA_D0F0,{5U,6U,0U}},
{ADDA_D0F0,{6U,6U,0U}},
{ADDA_D0F0,{7U,6U,0U}},
{ADDA_D0F8,{0U,6U,0U}},
{ADDA_D0F9,{0U,6U,0U}},
{ADDA_D0FA,{0U,6U,0U}},
{ADDA_D0FB,{0U,6U,0U}},
{ADDA_D0FC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D100,{0U,6U,0U}},
{ADDX_D100,{1U,6U,0U}},
{ADDX_D100,{2U,6U,0U}},
{ADDX_D100,{3U,6U,0U}},
{ADDX_D100,{4U,6U,0U}},
{ADDX_D100,{5U,6U,0U}},
{ADDX_D100,{6U,6U,0U}},
{ADDX_D100,{7U,6U,0U}},
{ADDX_D108,{0U,6U,0U}},
{ADDX_D108,{1U,6U,0U}},
{ADDX_D108,{2U,6U,0U}},
{ADDX_D108,{3U,6U,0U}},
{ADDX_D108,{4U,6U,0U}},
{ADDX_D108,{5U,6U,0U}},
{ADDX_D108,{6U,6U,0U}},
{ADDX_D108,{7U,6U,0U}},
{ADD_D110,{0U,6U,0U}},
{ADD_D110,{1U,6U,0U}},
{ADD_D110,{2U,6U,0U}},
{ADD_D110,{3U,6U,0U}},
{ADD_D110,{4U,6U,0U}},
{ADD_D110,{5U,6U,0U}},
{ADD_D110,{6U,6U,0U}},
{ADD_D110,{7U,6U,0U}},
{ADD_D118,{0U,6U,0U}},
{ADD_D118,{1U,6U,0U}},
{ADD_D118,{2U,6U,0U}},
{ADD_D118,{3U,6U,0U}},
{ADD_D118,{4U,6U,0U}},
{ADD_D118,{5U,6U,0U}},
{ADD_D118,{6U,6U,0U}},
{ADD_D118,{7U,6U,0U}},
{ADD_D120,{0U,6U,0U}},
{ADD_D120,{1U,6U,0U}},
{ADD_D120,{2U,6U,0U}},
{ADD_D120,{3U,6U,0U}},
{ADD_D120,{4U,6U,0U}},
{ADD_D120,{5U,6U,0U}},
{ADD_D120,{6U,6U,0U}},
{ADD_D120,{7U,6U,0U}},
{ADD_D128,{0U,6U,0U}},
{ADD_D128,{1U,6U,0U}},
{ADD_D128,{2U,6U,0U}},
{ADD_D128,{3U,6U,0U}},
{ADD_D128,{4U,6U,0U}},
{ADD_D128,{5U,6U,0U}},
{ADD_D128,{6U,6U,0U}},
{ADD_D128,{7U,6U,0U}},
{ADD_D130,{0U,6U,0U}},
{ADD_D130,{1U,6U,0U}},
{ADD_D130,{2U,6U,0U}},
{ADD_D130,{3U,6U,0U}},
{ADD_D130,{4U,6U,0U}},
{ADD_D130,{5U,6U,0U}},
{ADD_D130,{6U,6U,0U}},
{ADD_D130,{7U,6U,0U}},
{ADD_D138,{0U,6U,0U}},
{ADD_D139,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D140,{0U,6U,0U}},
{ADDX_D140,{1U,6U,0U}},
{ADDX_D140,{2U,6U,0U}},
{ADDX_D140,{3U,6U,0U}},
{ADDX_D140,{4U,6U,0U}},
{ADDX_D140,{5U,6U,0U}},
{ADDX_D140,{6U,6U,0U}},
{ADDX_D140,{7U,6U,0U}},
{ADDX_D148,{0U,6U,0U}},
{ADDX_D148,{1U,6U,0U}},
{ADDX_D148,{2U,6U,0U}},
{ADDX_D148,{3U,6U,0U}},
{ADDX_D148,{4U,6U,0U}},
{ADDX_D148,{5U,6U,0U}},
{ADDX_D148,{6U,6U,0U}},
{ADDX_D148,{7U,6U,0U}},
{ADD_D150,{0U,6U,0U}},
{ADD_D150,{1U,6U,0U}},
{ADD_D150,{2U,6U,0U}},
{ADD_D150,{3U,6U,0U}},
{ADD_D150,{4U,6U,0U}},
{ADD_D150,{5U,6U,0U}},
{ADD_D150,{6U,6U,0U}},
{ADD_D150,{7U,6U,0U}},
{ADD_D158,{0U,6U,0U}},
{ADD_D158,{1U,6U,0U}},
{ADD_D158,{2U,6U,0U}},
{ADD_D158,{3U,6U,0U}},
{ADD_D158,{4U,6U,0U}},
{ADD_D158,{5U,6U,0U}},
{ADD_D158,{6U,6U,0U}},
{ADD_D158,{7U,6U,0U}},
{ADD_D160,{0U,6U,0U}},
{ADD_D160,{1U,6U,0U}},
{ADD_D160,{2U,6U,0U}},
{ADD_D160,{3U,6U,0U}},
{ADD_D160,{4U,6U,0U}},
{ADD_D160,{5U,6U,0U}},
{ADD_D160,{6U,6U,0U}},
{ADD_D160,{7U,6U,0U}},
{ADD_D168,{0U,6U,0U}},
{ADD_D168,{1U,6U,0U}},
{ADD_D168,{2U,6U,0U}},
{ADD_D168,{3U,6U,0U}},
{ADD_D168,{4U,6U,0U}},
{ADD_D168,{5U,6U,0U}},
{ADD_D168,{6U,6U,0U}},
{ADD_D168,{7U,6U,0U}},
{ADD_D170,{0U,6U,0U}},
{ADD_D170,{1U,6U,0U}},
{ADD_D170,{2U,6U,0U}},
{ADD_D170,{3U,6U,0U}},
{ADD_D170,{4U,6U,0U}},
{ADD_D170,{5U,6U,0U}},
{ADD_D170,{6U,6U,0U}},
{ADD_D170,{7U,6U,0U}},
{ADD_D178,{0U,6U,0U}},
{ADD_D179,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D180,{0U,6U,0U}},
{ADDX_D180,{1U,6U,0U}},
{ADDX_D180,{2U,6U,0U}},
{ADDX_D180,{3U,6U,0U}},
{ADDX_D180,{4U,6U,0U}},
{ADDX_D180,{5U,6U,0U}},
{ADDX_D180,{6U,6U,0U}},
{ADDX_D180,{7U,6U,0U}},
{ADDX_D188,{0U,6U,0U}},
{ADDX_D188,{1U,6U,0U}},
{ADDX_D188,{2U,6U,0U}},
{ADDX_D188,{3U,6U,0U}},
{ADDX_D188,{4U,6U,0U}},
{ADDX_D188,{5U,6U,0U}},
{ADDX_D188,{6U,6U,0U}},
{ADDX_D188,{7U,6U,0U}},
{ADD_D190,{0U,6U,0U}},
{ADD_D190,{1U,6U,0U}},
{ADD_D190,{2U,6U,0U}},
{ADD_D190,{3U,6U,0U}},
{ADD_D190,{4U,6U,0U}},
{ADD_D190,{5U,6U,0U}},
{ADD_D190,{6U,6U,0U}},
{ADD_D190,{7U,6U,0U}},
{ADD_D198,{0U,6U,0U}},
{ADD_D198,{1U,6U,0U}},
{ADD_D198,{2U,6U,0U}},
{ADD_D198,{3U,6U,0U}},
{ADD_D198,{4U,6U,0U}},
{ADD_D198,{5U,6U,0U}},
{ADD_D198,{6U,6U,0U}},
{ADD_D198,{7U,6U,0U}},
{ADD_D1A0,{0U,6U,0U}},
{ADD_D1A0,{1U,6U,0U}},
{ADD_D1A0,{2U,6U,0U}},
{ADD_D1A0,{3U,6U,0U}},
{ADD_D1A0,{4U,6U,0U}},
{ADD_D1A0,{5U,6U,0U}},
{ADD_D1A0,{6U,6U,0U}},
{ADD_D1A0,{7U,6U,0U}},
{ADD_D1A8,{0U,6U,0U}},
{ADD_D1A8,{1U,6U,0U}},
{ADD_D1A8,{2U,6U,0U}},
{ADD_D1A8,{3U,6U,0U}},
{ADD_D1A8,{4U,6U,0U}},
{ADD_D1A8,{5U,6U,0U}},
{ADD_D1A8,{6U,6U,0U}},
{ADD_D1A8,{7U,6U,0U}},
{ADD_D1B0,{0U,6U,0U}},
{ADD_D1B0,{1U,6U,0U}},
{ADD_D1B0,{2U,6U,0U}},
{ADD_D1B0,{3U,6U,0U}},
{ADD_D1B0,{4U,6U,0U}},
{ADD_D1B0,{5U,6U,0U}},
{ADD_D1B0,{6U,6U,0U}},
{ADD_D1B0,{7U,6U,0U}},
{ADD_D1B8,{0U,6U,0U}},
{ADD_D1B9,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D1C0,{0U,6U,0U}},
{ADDA_D1C0,{1U,6U,0U}},
{ADDA_D1C0,{2U,6U,0U}},
{ADDA_D1C0,{3U,6U,0U}},
{ADDA_D1C0,{4U,6U,0U}},
{ADDA_D1C0,{5U,6U,0U}},
{ADDA_D1C0,{6U,6U,0U}},
{ADDA_D1C0,{7U,6U,0U}},
{ADDA_D1C8,{0U,6U,0U}},
{ADDA_D1C8,{1U,6U,0U}},
{ADDA_D1C8,{2U,6U,0U}},
{ADDA_D1C8,{3U,6U,0U}},
{ADDA_D1C8,{4U,6U,0U}},
{ADDA_D1C8,{5U,6U,0U}},
{ADDA_D1C8,{6U,6U,0U}},
{ADDA_D1C8,{7U,6U,0U}},
{ADDA_D1D0,{0U,6U,0U}},
{ADDA_D1D0,{1U,6U,0U}},
{ADDA_D1D0,{2U,6U,0U}},
{ADDA_D1D0,{3U,6U,0U}},
{ADDA_D1D0,{4U,6U,0U}},
{ADDA_D1D0,{5U,6U,0U}},
{ADDA_D1D0,{6U,6U,0U}},
{ADDA_D1D0,{7U,6U,0U}},
{ADDA_D1D8,{0U,6U,0U}},
{ADDA_D1D8,{1U,6U,0U}},
{ADDA_D1D8,{2U,6U,0U}},
{ADDA_D1D8,{3U,6U,0U}},
{ADDA_D1D8,{4U,6U,0U}},
{ADDA_D1D8,{5U,6U,0U}},
{ADDA_D1D8,{6U,6U,0U}},
{ADDA_D1D8,{7U,6U,0U}},
{ADDA_D1E0,{0U,6U,0U}},
{ADDA_D1E0,{1U,6U,0U}},
{ADDA_D1E0,{2U,6U,0U}},
{ADDA_D1E0,{3U,6U,0U}},
{ADDA_D1E0,{4U,6U,0U}},
{ADDA_D1E0,{5U,6U,0U}},
{ADDA_D1E0,{6U,6U,0U}},
{ADDA_D1E0,{7U,6U,0U}},
{ADDA_D1E8,{0U,6U,0U}},
{ADDA_D1E8,{1U,6U,0U}},
{ADDA_D1E8,{2U,6U,0U}},
{ADDA_D1E8,{3U,6U,0U}},
{ADDA_D1E8,{4U,6U,0U}},
{ADDA_D1E8,{5U,6U,0U}},
{ADDA_D1E8,{6U,6U,0U}},
{ADDA_D1E8,{7U,6U,0U}},
{ADDA_D1F0,{0U,6U,0U}},
{ADDA_D1F0,{1U,6U,0U}},
{ADDA_D1F0,{2U,6U,0U}},
{ADDA_D1F0,{3U,6U,0U}},
{ADDA_D1F0,{4U,6U,0U}},
{ADDA_D1F0,{5U,6U,0U}},
{ADDA_D1F0,{6U,6U,0U}},
{ADDA_D1F0,{7U,6U,0U}},
{ADDA_D1F8,{0U,6U,0U}},
{ADDA_D1F9,{0U,6U,0U}},
{ADDA_D1FA,{0U,6U,0U}},
{ADDA_D1FB,{0U,6U,0U}},
{ADDA_D1FC,{0U,6U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D000,{0U,7U,0U}},
{ADD_D000,{1U,7U,0U}},
{ADD_D000,{2U,7U,0U}},
{ADD_D000,{3U,7U,0U}},
{ADD_D000,{4U,7U,0U}},
{ADD_D000,{5U,7U,0U}},
{ADD_D000,{6U,7U,0U}},
{ADD_D000,{7U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D010,{0U,7U,0U}},
{ADD_D010,{1U,7U,0U}},
{ADD_D010,{2U,7U,0U}},
{ADD_D010,{3U,7U,0U}},
{ADD_D010,{4U,7U,0U}},
{ADD_D010,{5U,7U,0U}},
{ADD_D010,{6U,7U,0U}},
{ADD_D010,{7U,7U,0U}},
{ADD_D018,{0U,7U,0U}},
{ADD_D018,{1U,7U,0U}},
{ADD_D018,{2U,7U,0U}},
{ADD_D018,{3U,7U,0U}},
{ADD_D018,{4U,7U,0U}},
{ADD_D018,{5U,7U,0U}},
{ADD_D018,{6U,7U,0U}},
{ADD_D018,{7U,7U,0U}},
{ADD_D020,{0U,7U,0U}},
{ADD_D020,{1U,7U,0U}},
{ADD_D020,{2U,7U,0U}},
{ADD_D020,{3U,7U,0U}},
{ADD_D020,{4U,7U,0U}},
{ADD_D020,{5U,7U,0U}},
{ADD_D020,{6U,7U,0U}},
{ADD_D020,{7U,7U,0U}},
{ADD_D028,{0U,7U,0U}},
{ADD_D028,{1U,7U,0U}},
{ADD_D028,{2U,7U,0U}},
{ADD_D028,{3U,7U,0U}},
{ADD_D028,{4U,7U,0U}},
{ADD_D028,{5U,7U,0U}},
{ADD_D028,{6U,7U,0U}},
{ADD_D028,{7U,7U,0U}},
{ADD_D030,{0U,7U,0U}},
{ADD_D030,{1U,7U,0U}},
{ADD_D030,{2U,7U,0U}},
{ADD_D030,{3U,7U,0U}},
{ADD_D030,{4U,7U,0U}},
{ADD_D030,{5U,7U,0U}},
{ADD_D030,{6U,7U,0U}},
{ADD_D030,{7U,7U,0U}},
{ADD_D038,{0U,7U,0U}},
{ADD_D039,{0U,7U,0U}},
{ADD_D03A,{0U,7U,0U}},
{ADD_D03B,{0U,7U,0U}},
{ADD_D03C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D040,{0U,7U,0U}},
{ADD_D040,{1U,7U,0U}},
{ADD_D040,{2U,7U,0U}},
{ADD_D040,{3U,7U,0U}},
{ADD_D040,{4U,7U,0U}},
{ADD_D040,{5U,7U,0U}},
{ADD_D040,{6U,7U,0U}},
{ADD_D040,{7U,7U,0U}},
{ADD_D048,{0U,7U,0U}},
{ADD_D048,{1U,7U,0U}},
{ADD_D048,{2U,7U,0U}},
{ADD_D048,{3U,7U,0U}},
{ADD_D048,{4U,7U,0U}},
{ADD_D048,{5U,7U,0U}},
{ADD_D048,{6U,7U,0U}},
{ADD_D048,{7U,7U,0U}},
{ADD_D050,{0U,7U,0U}},
{ADD_D050,{1U,7U,0U}},
{ADD_D050,{2U,7U,0U}},
{ADD_D050,{3U,7U,0U}},
{ADD_D050,{4U,7U,0U}},
{ADD_D050,{5U,7U,0U}},
{ADD_D050,{6U,7U,0U}},
{ADD_D050,{7U,7U,0U}},
{ADD_D058,{0U,7U,0U}},
{ADD_D058,{1U,7U,0U}},
{ADD_D058,{2U,7U,0U}},
{ADD_D058,{3U,7U,0U}},
{ADD_D058,{4U,7U,0U}},
{ADD_D058,{5U,7U,0U}},
{ADD_D058,{6U,7U,0U}},
{ADD_D058,{7U,7U,0U}},
{ADD_D060,{0U,7U,0U}},
{ADD_D060,{1U,7U,0U}},
{ADD_D060,{2U,7U,0U}},
{ADD_D060,{3U,7U,0U}},
{ADD_D060,{4U,7U,0U}},
{ADD_D060,{5U,7U,0U}},
{ADD_D060,{6U,7U,0U}},
{ADD_D060,{7U,7U,0U}},
{ADD_D068,{0U,7U,0U}},
{ADD_D068,{1U,7U,0U}},
{ADD_D068,{2U,7U,0U}},
{ADD_D068,{3U,7U,0U}},
{ADD_D068,{4U,7U,0U}},
{ADD_D068,{5U,7U,0U}},
{ADD_D068,{6U,7U,0U}},
{ADD_D068,{7U,7U,0U}},
{ADD_D070,{0U,7U,0U}},
{ADD_D070,{1U,7U,0U}},
{ADD_D070,{2U,7U,0U}},
{ADD_D070,{3U,7U,0U}},
{ADD_D070,{4U,7U,0U}},
{ADD_D070,{5U,7U,0U}},
{ADD_D070,{6U,7U,0U}},
{ADD_D070,{7U,7U,0U}},
{ADD_D078,{0U,7U,0U}},
{ADD_D079,{0U,7U,0U}},
{ADD_D07A,{0U,7U,0U}},
{ADD_D07B,{0U,7U,0U}},
{ADD_D07C,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADD_D080,{0U,7U,0U}},
{ADD_D080,{1U,7U,0U}},
{ADD_D080,{2U,7U,0U}},
{ADD_D080,{3U,7U,0U}},
{ADD_D080,{4U,7U,0U}},
{ADD_D080,{5U,7U,0U}},
{ADD_D080,{6U,7U,0U}},
{ADD_D080,{7U,7U,0U}},
{ADD_D088,{0U,7U,0U}},
{ADD_D088,{1U,7U,0U}},
{ADD_D088,{2U,7U,0U}},
{ADD_D088,{3U,7U,0U}},
{ADD_D088,{4U,7U,0U}},
{ADD_D088,{5U,7U,0U}},
{ADD_D088,{6U,7U,0U}},
{ADD_D088,{7U,7U,0U}},
{ADD_D090,{0U,7U,0U}},
{ADD_D090,{1U,7U,0U}},
{ADD_D090,{2U,7U,0U}},
{ADD_D090,{3U,7U,0U}},
{ADD_D090,{4U,7U,0U}},
{ADD_D090,{5U,7U,0U}},
{ADD_D090,{6U,7U,0U}},
{ADD_D090,{7U,7U,0U}},
{ADD_D098,{0U,7U,0U}},
{ADD_D098,{1U,7U,0U}},
{ADD_D098,{2U,7U,0U}},
{ADD_D098,{3U,7U,0U}},
{ADD_D098,{4U,7U,0U}},
{ADD_D098,{5U,7U,0U}},
{ADD_D098,{6U,7U,0U}},
{ADD_D098,{7U,7U,0U}},
{ADD_D0A0,{0U,7U,0U}},
{ADD_D0A0,{1U,7U,0U}},
{ADD_D0A0,{2U,7U,0U}},
{ADD_D0A0,{3U,7U,0U}},
{ADD_D0A0,{4U,7U,0U}},
{ADD_D0A0,{5U,7U,0U}},
{ADD_D0A0,{6U,7U,0U}},
{ADD_D0A0,{7U,7U,0U}},
{ADD_D0A8,{0U,7U,0U}},
{ADD_D0A8,{1U,7U,0U}},
{ADD_D0A8,{2U,7U,0U}},
{ADD_D0A8,{3U,7U,0U}},
{ADD_D0A8,{4U,7U,0U}},
{ADD_D0A8,{5U,7U,0U}},
{ADD_D0A8,{6U,7U,0U}},
{ADD_D0A8,{7U,7U,0U}},
{ADD_D0B0,{0U,7U,0U}},
{ADD_D0B0,{1U,7U,0U}},
{ADD_D0B0,{2U,7U,0U}},
{ADD_D0B0,{3U,7U,0U}},
{ADD_D0B0,{4U,7U,0U}},
{ADD_D0B0,{5U,7U,0U}},
{ADD_D0B0,{6U,7U,0U}},
{ADD_D0B0,{7U,7U,0U}},
{ADD_D0B8,{0U,7U,0U}},
{ADD_D0B9,{0U,7U,0U}},
{ADD_D0BA,{0U,7U,0U}},
{ADD_D0BB,{0U,7U,0U}},
{ADD_D0BC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D0C0,{0U,7U,0U}},
{ADDA_D0C0,{1U,7U,0U}},
{ADDA_D0C0,{2U,7U,0U}},
{ADDA_D0C0,{3U,7U,0U}},
{ADDA_D0C0,{4U,7U,0U}},
{ADDA_D0C0,{5U,7U,0U}},
{ADDA_D0C0,{6U,7U,0U}},
{ADDA_D0C0,{7U,7U,0U}},
{ADDA_D0C8,{0U,7U,0U}},
{ADDA_D0C8,{1U,7U,0U}},
{ADDA_D0C8,{2U,7U,0U}},
{ADDA_D0C8,{3U,7U,0U}},
{ADDA_D0C8,{4U,7U,0U}},
{ADDA_D0C8,{5U,7U,0U}},
{ADDA_D0C8,{6U,7U,0U}},
{ADDA_D0C8,{7U,7U,0U}},
{ADDA_D0D0,{0U,7U,0U}},
{ADDA_D0D0,{1U,7U,0U}},
{ADDA_D0D0,{2U,7U,0U}},
{ADDA_D0D0,{3U,7U,0U}},
{ADDA_D0D0,{4U,7U,0U}},
{ADDA_D0D0,{5U,7U,0U}},
{ADDA_D0D0,{6U,7U,0U}},
{ADDA_D0D0,{7U,7U,0U}},
{ADDA_D0D8,{0U,7U,0U}},
{ADDA_D0D8,{1U,7U,0U}},
{ADDA_D0D8,{2U,7U,0U}},
{ADDA_D0D8,{3U,7U,0U}},
{ADDA_D0D8,{4U,7U,0U}},
{ADDA_D0D8,{5U,7U,0U}},
{ADDA_D0D8,{6U,7U,0U}},
{ADDA_D0D8,{7U,7U,0U}},
{ADDA_D0E0,{0U,7U,0U}},
{ADDA_D0E0,{1U,7U,0U}},
{ADDA_D0E0,{2U,7U,0U}},
{ADDA_D0E0,{3U,7U,0U}},
{ADDA_D0E0,{4U,7U,0U}},
{ADDA_D0E0,{5U,7U,0U}},
{ADDA_D0E0,{6U,7U,0U}},
{ADDA_D0E0,{7U,7U,0U}},
{ADDA_D0E8,{0U,7U,0U}},
{ADDA_D0E8,{1U,7U,0U}},
{ADDA_D0E8,{2U,7U,0U}},
{ADDA_D0E8,{3U,7U,0U}},
{ADDA_D0E8,{4U,7U,0U}},
{ADDA_D0E8,{5U,7U,0U}},
{ADDA_D0E8,{6U,7U,0U}},
{ADDA_D0E8,{7U,7U,0U}},
{ADDA_D0F0,{0U,7U,0U}},
{ADDA_D0F0,{1U,7U,0U}},
{ADDA_D0F0,{2U,7U,0U}},
{ADDA_D0F0,{3U,7U,0U}},
{ADDA_D0F0,{4U,7U,0U}},
{ADDA_D0F0,{5U,7U,0U}},
{ADDA_D0F0,{6U,7U,0U}},
{ADDA_D0F0,{7U,7U,0U}},
{ADDA_D0F8,{0U,7U,0U}},
{ADDA_D0F9,{0U,7U,0U}},
{ADDA_D0FA,{0U,7U,0U}},
{ADDA_D0FB,{0U,7U,0U}},
{ADDA_D0FC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D100,{0U,7U,0U}},
{ADDX_D100,{1U,7U,0U}},
{ADDX_D100,{2U,7U,0U}},
{ADDX_D100,{3U,7U,0U}},
{ADDX_D100,{4U,7U,0U}},
{ADDX_D100,{5U,7U,0U}},
{ADDX_D100,{6U,7U,0U}},
{ADDX_D100,{7U,7U,0U}},
{ADDX_D108,{0U,7U,0U}},
{ADDX_D108,{1U,7U,0U}},
{ADDX_D108,{2U,7U,0U}},
{ADDX_D108,{3U,7U,0U}},
{ADDX_D108,{4U,7U,0U}},
{ADDX_D108,{5U,7U,0U}},
{ADDX_D108,{6U,7U,0U}},
{ADDX_D108,{7U,7U,0U}},
{ADD_D110,{0U,7U,0U}},
{ADD_D110,{1U,7U,0U}},
{ADD_D110,{2U,7U,0U}},
{ADD_D110,{3U,7U,0U}},
{ADD_D110,{4U,7U,0U}},
{ADD_D110,{5U,7U,0U}},
{ADD_D110,{6U,7U,0U}},
{ADD_D110,{7U,7U,0U}},
{ADD_D118,{0U,7U,0U}},
{ADD_D118,{1U,7U,0U}},
{ADD_D118,{2U,7U,0U}},
{ADD_D118,{3U,7U,0U}},
{ADD_D118,{4U,7U,0U}},
{ADD_D118,{5U,7U,0U}},
{ADD_D118,{6U,7U,0U}},
{ADD_D118,{7U,7U,0U}},
{ADD_D120,{0U,7U,0U}},
{ADD_D120,{1U,7U,0U}},
{ADD_D120,{2U,7U,0U}},
{ADD_D120,{3U,7U,0U}},
{ADD_D120,{4U,7U,0U}},
{ADD_D120,{5U,7U,0U}},
{ADD_D120,{6U,7U,0U}},
{ADD_D120,{7U,7U,0U}},
{ADD_D128,{0U,7U,0U}},
{ADD_D128,{1U,7U,0U}},
{ADD_D128,{2U,7U,0U}},
{ADD_D128,{3U,7U,0U}},
{ADD_D128,{4U,7U,0U}},
{ADD_D128,{5U,7U,0U}},
{ADD_D128,{6U,7U,0U}},
{ADD_D128,{7U,7U,0U}},
{ADD_D130,{0U,7U,0U}},
{ADD_D130,{1U,7U,0U}},
{ADD_D130,{2U,7U,0U}},
{ADD_D130,{3U,7U,0U}},
{ADD_D130,{4U,7U,0U}},
{ADD_D130,{5U,7U,0U}},
{ADD_D130,{6U,7U,0U}},
{ADD_D130,{7U,7U,0U}},
{ADD_D138,{0U,7U,0U}},
{ADD_D139,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D140,{0U,7U,0U}},
{ADDX_D140,{1U,7U,0U}},
{ADDX_D140,{2U,7U,0U}},
{ADDX_D140,{3U,7U,0U}},
{ADDX_D140,{4U,7U,0U}},
{ADDX_D140,{5U,7U,0U}},
{ADDX_D140,{6U,7U,0U}},
{ADDX_D140,{7U,7U,0U}},
{ADDX_D148,{0U,7U,0U}},
{ADDX_D148,{1U,7U,0U}},
{ADDX_D148,{2U,7U,0U}},
{ADDX_D148,{3U,7U,0U}},
{ADDX_D148,{4U,7U,0U}},
{ADDX_D148,{5U,7U,0U}},
{ADDX_D148,{6U,7U,0U}},
{ADDX_D148,{7U,7U,0U}},
{ADD_D150,{0U,7U,0U}},
{ADD_D150,{1U,7U,0U}},
{ADD_D150,{2U,7U,0U}},
{ADD_D150,{3U,7U,0U}},
{ADD_D150,{4U,7U,0U}},
{ADD_D150,{5U,7U,0U}},
{ADD_D150,{6U,7U,0U}},
{ADD_D150,{7U,7U,0U}},
{ADD_D158,{0U,7U,0U}},
{ADD_D158,{1U,7U,0U}},
{ADD_D158,{2U,7U,0U}},
{ADD_D158,{3U,7U,0U}},
{ADD_D158,{4U,7U,0U}},
{ADD_D158,{5U,7U,0U}},
{ADD_D158,{6U,7U,0U}},
{ADD_D158,{7U,7U,0U}},
{ADD_D160,{0U,7U,0U}},
{ADD_D160,{1U,7U,0U}},
{ADD_D160,{2U,7U,0U}},
{ADD_D160,{3U,7U,0U}},
{ADD_D160,{4U,7U,0U}},
{ADD_D160,{5U,7U,0U}},
{ADD_D160,{6U,7U,0U}},
{ADD_D160,{7U,7U,0U}},
{ADD_D168,{0U,7U,0U}},
{ADD_D168,{1U,7U,0U}},
{ADD_D168,{2U,7U,0U}},
{ADD_D168,{3U,7U,0U}},
{ADD_D168,{4U,7U,0U}},
{ADD_D168,{5U,7U,0U}},
{ADD_D168,{6U,7U,0U}},
{ADD_D168,{7U,7U,0U}},
{ADD_D170,{0U,7U,0U}},
{ADD_D170,{1U,7U,0U}},
{ADD_D170,{2U,7U,0U}},
{ADD_D170,{3U,7U,0U}},
{ADD_D170,{4U,7U,0U}},
{ADD_D170,{5U,7U,0U}},
{ADD_D170,{6U,7U,0U}},
{ADD_D170,{7U,7U,0U}},
{ADD_D178,{0U,7U,0U}},
{ADD_D179,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDX_D180,{0U,7U,0U}},
{ADDX_D180,{1U,7U,0U}},
{ADDX_D180,{2U,7U,0U}},
{ADDX_D180,{3U,7U,0U}},
{ADDX_D180,{4U,7U,0U}},
{ADDX_D180,{5U,7U,0U}},
{ADDX_D180,{6U,7U,0U}},
{ADDX_D180,{7U,7U,0U}},
{ADDX_D188,{0U,7U,0U}},
{ADDX_D188,{1U,7U,0U}},
{ADDX_D188,{2U,7U,0U}},
{ADDX_D188,{3U,7U,0U}},
{ADDX_D188,{4U,7U,0U}},
{ADDX_D188,{5U,7U,0U}},
{ADDX_D188,{6U,7U,0U}},
{ADDX_D188,{7U,7U,0U}},
{ADD_D190,{0U,7U,0U}},
{ADD_D190,{1U,7U,0U}},
{ADD_D190,{2U,7U,0U}},
{ADD_D190,{3U,7U,0U}},
{ADD_D190,{4U,7U,0U}},
{ADD_D190,{5U,7U,0U}},
{ADD_D190,{6U,7U,0U}},
{ADD_D190,{7U,7U,0U}},
{ADD_D198,{0U,7U,0U}},
{ADD_D198,{1U,7U,0U}},
{ADD_D198,{2U,7U,0U}},
{ADD_D198,{3U,7U,0U}},
{ADD_D198,{4U,7U,0U}},
{ADD_D198,{5U,7U,0U}},
{ADD_D198,{6U,7U,0U}},
{ADD_D198,{7U,7U,0U}},
{ADD_D1A0,{0U,7U,0U}},
{ADD_D1A0,{1U,7U,0U}},
{ADD_D1A0,{2U,7U,0U}},
{ADD_D1A0,{3U,7U,0U}},
{ADD_D1A0,{4U,7U,0U}},
{ADD_D1A0,{5U,7U,0U}},
{ADD_D1A0,{6U,7U,0U}},
{ADD_D1A0,{7U,7U,0U}},
{ADD_D1A8,{0U,7U,0U}},
{ADD_D1A8,{1U,7U,0U}},
{ADD_D1A8,{2U,7U,0U}},
{ADD_D1A8,{3U,7U,0U}},
{ADD_D1A8,{4U,7U,0U}},
{ADD_D1A8,{5U,7U,0U}},
{ADD_D1A8,{6U,7U,0U}},
{ADD_D1A8,{7U,7U,0U}},
{ADD_D1B0,{0U,7U,0U}},
{ADD_D1B0,{1U,7U,0U}},
{ADD_D1B0,{2U,7U,0U}},
{ADD_D1B0,{3U,7U,0U}},
{ADD_D1B0,{4U,7U,0U}},
{ADD_D1B0,{5U,7U,0U}},
{ADD_D1B0,{6U,7U,0U}},
{ADD_D1B0,{7U,7U,0U}},
{ADD_D1B8,{0U,7U,0U}},
{ADD_D1B9,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ADDA_D1C0,{0U,7U,0U}},
{ADDA_D1C0,{1U,7U,0U}},
{ADDA_D1C0,{2U,7U,0U}},
{ADDA_D1C0,{3U,7U,0U}},
{ADDA_D1C0,{4U,7U,0U}},
{ADDA_D1C0,{5U,7U,0U}},
{ADDA_D1C0,{6U,7U,0U}},
{ADDA_D1C0,{7U,7U,0U}},
{ADDA_D1C8,{0U,7U,0U}},
{ADDA_D1C8,{1U,7U,0U}},
{ADDA_D1C8,{2U,7U,0U}},
{ADDA_D1C8,{3U,7U,0U}},
{ADDA_D1C8,{4U,7U,0U}},
{ADDA_D1C8,{5U,7U,0U}},
{ADDA_D1C8,{6U,7U,0U}},
{ADDA_D1C8,{7U,7U,0U}},
{ADDA_D1D0,{0U,7U,0U}},
{ADDA_D1D0,{1U,7U,0U}},
{ADDA_D1D0,{2U,7U,0U}},
{ADDA_D1D0,{3U,7U,0U}},
{ADDA_D1D0,{4U,7U,0U}},
{ADDA_D1D0,{5U,7U,0U}},
{ADDA_D1D0,{6U,7U,0U}},
{ADDA_D1D0,{7U,7U,0U}},
{ADDA_D1D8,{0U,7U,0U}},
{ADDA_D1D8,{1U,7U,0U}},
{ADDA_D1D8,{2U,7U,0U}},
{ADDA_D1D8,{3U,7U,0U}},
{ADDA_D1D8,{4U,7U,0U}},
{ADDA_D1D8,{5U,7U,0U}},
{ADDA_D1D8,{6U,7U,0U}},
{ADDA_D1D8,{7U,7U,0U}},
{ADDA_D1E0,{0U,7U,0U}},
{ADDA_D1E0,{1U,7U,0U}},
{ADDA_D1E0,{2U,7U,0U}},
{ADDA_D1E0,{3U,7U,0U}},
{ADDA_D1E0,{4U,7U,0U}},
{ADDA_D1E0,{5U,7U,0U}},
{ADDA_D1E0,{6U,7U,0U}},
{ADDA_D1E0,{7U,7U,0U}},
{ADDA_D1E8,{0U,7U,0U}},
{ADDA_D1E8,{1U,7U,0U}},
{ADDA_D1E8,{2U,7U,0U}},
{ADDA_D1E8,{3U,7U,0U}},
{ADDA_D1E8,{4U,7U,0U}},
{ADDA_D1E8,{5U,7U,0U}},
{ADDA_D1E8,{6U,7U,0U}},
{ADDA_D1E8,{7U,7U,0U}},
{ADDA_D1F0,{0U,7U,0U}},
{ADDA_D1F0,{1U,7U,0U}},
{ADDA_D1F0,{2U,7U,0U}},
{ADDA_D1F0,{3U,7U,0U}},
{ADDA_D1F0,{4U,7U,0U}},
{ADDA_D1F0,{5U,7U,0U}},
{ADDA_D1F0,{6U,7U,0U}},
{ADDA_D1F0,{7U,7U,0U}},
{ADDA_D1F8,{0U,7U,0U}},
{ADDA_D1F9,{0U,7U,0U}},
{ADDA_D1FA,{0U,7U,0U}},
{ADDA_D1FB,{0U,7U,0U}},
{ADDA_D1FC,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASR_E000,{0U,8U,6U}},
{ASR_E000,{1U,8U,6U}},
{ASR_E000,{2U,8U,6U}},
{ASR_E000,{3U,8U,6U}},
{ASR_E000,{4U,8U,6U}},
{ASR_E000,{5U,8U,6U}},
{ASR_E000,{6U,8U,6U}},
{ASR_E000,{7U,8U,6U}},
{LSR_E008,{0U,8U,6U}},
{LSR_E008,{1U,8U,6U}},
{LSR_E008,{2U,8U,6U}},
{LSR_E008,{3U,8U,6U}},
{LSR_E008,{4U,8U,6U}},
{LSR_E008,{5U,8U,6U}},
{LSR_E008,{6U,8U,6U}},
{LSR_E008,{7U,8U,6U}},
{ROXR_E010,{0U,8U,6U}},
{ROXR_E010,{1U,8U,6U}},
{ROXR_E010,{2U,8U,6U}},
{ROXR_E010,{3U,8U,6U}},
{ROXR_E010,{4U,8U,6U}},
{ROXR_E010,{5U,8U,6U}},
{ROXR_E010,{6U,8U,6U}},
{ROXR_E010,{7U,8U,6U}},
{ROR_E018,{0U,8U,6U}},
{ROR_E018,{1U,8U,6U}},
{ROR_E018,{2U,8U,6U}},
{ROR_E018,{3U,8U,6U}},
{ROR_E018,{4U,8U,6U}},
{ROR_E018,{5U,8U,6U}},
{ROR_E018,{6U,8U,6U}},
{ROR_E018,{7U,8U,6U}},
{ASR_E020,{0U,0U,6U}},
{ASR_E020,{1U,0U,6U}},
{ASR_E020,{2U,0U,6U}},
{ASR_E020,{3U,0U,6U}},
{ASR_E020,{4U,0U,6U}},
{ASR_E020,{5U,0U,6U}},
{ASR_E020,{6U,0U,6U}},
{ASR_E020,{7U,0U,6U}},
{LSR_E028,{0U,0U,6U}},
{LSR_E028,{1U,0U,6U}},
{LSR_E028,{2U,0U,6U}},
{LSR_E028,{3U,0U,6U}},
{LSR_E028,{4U,0U,6U}},
{LSR_E028,{5U,0U,6U}},
{LSR_E028,{6U,0U,6U}},
{LSR_E028,{7U,0U,6U}},
{ROXR_E030,{0U,0U,6U}},
{ROXR_E030,{1U,0U,6U}},
{ROXR_E030,{2U,0U,6U}},
{ROXR_E030,{3U,0U,6U}},
{ROXR_E030,{4U,0U,6U}},
{ROXR_E030,{5U,0U,6U}},
{ROXR_E030,{6U,0U,6U}},
{ROXR_E030,{7U,0U,6U}},
{ROR_E038,{0U,0U,6U}},
{ROR_E038,{1U,0U,6U}},
{ROR_E038,{2U,0U,6U}},
{ROR_E038,{3U,0U,6U}},
{ROR_E038,{4U,0U,6U}},
{ROR_E038,{5U,0U,6U}},
{ROR_E038,{6U,0U,6U}},
{ROR_E038,{7U,0U,6U}},
{ASR_E040,{0U,8U,6U}},
{ASR_E040,{1U,8U,6U}},
{ASR_E040,{2U,8U,6U}},
{ASR_E040,{3U,8U,6U}},
{ASR_E040,{4U,8U,6U}},
{ASR_E040,{5U,8U,6U}},
{ASR_E040,{6U,8U,6U}},
{ASR_E040,{7U,8U,6U}},
{LSR_E048,{0U,8U,6U}},
{LSR_E048,{1U,8U,6U}},
{LSR_E048,{2U,8U,6U}},
{LSR_E048,{3U,8U,6U}},
{LSR_E048,{4U,8U,6U}},
{LSR_E048,{5U,8U,6U}},
{LSR_E048,{6U,8U,6U}},
{LSR_E048,{7U,8U,6U}},
{ROXR_E050,{0U,8U,6U}},
{ROXR_E050,{1U,8U,6U}},
{ROXR_E050,{2U,8U,6U}},
{ROXR_E050,{3U,8U,6U}},
{ROXR_E050,{4U,8U,6U}},
{ROXR_E050,{5U,8U,6U}},
{ROXR_E050,{6U,8U,6U}},
{ROXR_E050,{7U,8U,6U}},
{ROR_E058,{0U,8U,6U}},
{ROR_E058,{1U,8U,6U}},
{ROR_E058,{2U,8U,6U}},
{ROR_E058,{3U,8U,6U}},
{ROR_E058,{4U,8U,6U}},
{ROR_E058,{5U,8U,6U}},
{ROR_E058,{6U,8U,6U}},
{ROR_E058,{7U,8U,6U}},
{ASR_E060,{0U,0U,6U}},
{ASR_E060,{1U,0U,6U}},
{ASR_E060,{2U,0U,6U}},
{ASR_E060,{3U,0U,6U}},
{ASR_E060,{4U,0U,6U}},
{ASR_E060,{5U,0U,6U}},
{ASR_E060,{6U,0U,6U}},
{ASR_E060,{7U,0U,6U}},
{LSR_E068,{0U,0U,6U}},
{LSR_E068,{1U,0U,6U}},
{LSR_E068,{2U,0U,6U}},
{LSR_E068,{3U,0U,6U}},
{LSR_E068,{4U,0U,6U}},
{LSR_E068,{5U,0U,6U}},
{LSR_E068,{6U,0U,6U}},
{LSR_E068,{7U,0U,6U}},
{ROXR_E070,{0U,0U,6U}},
{ROXR_E070,{1U,0U,6U}},
{ROXR_E070,{2U,0U,6U}},
{ROXR_E070,{3U,0U,6U}},
{ROXR_E070,{4U,0U,6U}},
{ROXR_E070,{5U,0U,6U}},
{ROXR_E070,{6U,0U,6U}},
{ROXR_E070,{7U,0U,6U}},
{ROR_E078,{0U,0U,6U}},
{ROR_E078,{1U,0U,6U}},
{ROR_E078,{2U,0U,6U}},
{ROR_E078,{3U,0U,6U}},
{ROR_E078,{4U,0U,6U}},
{ROR_E078,{5U,0U,6U}},
{ROR_E078,{6U,0U,6U}},
{ROR_E078,{7U,0U,6U}},
{ASR_E080,{0U,8U,8U}},
{ASR_E080,{1U,8U,8U}},
{ASR_E080,{2U,8U,8U}},
{ASR_E080,{3U,8U,8U}},
{ASR_E080,{4U,8U,8U}},
{ASR_E080,{5U,8U,8U}},
{ASR_E080,{6U,8U,8U}},
{ASR_E080,{7U,8U,8U}},
{LSR_E088,{0U,8U,8U}},
{LSR_E088,{1U,8U,8U}},
{LSR_E088,{2U,8U,8U}},
{LSR_E088,{3U,8U,8U}},
{LSR_E088,{4U,8U,8U}},
{LSR_E088,{5U,8U,8U}},
{LSR_E088,{6U,8U,8U}},
{LSR_E088,{7U,8U,8U}},
{ROXR_E090,{0U,8U,8U}},
{ROXR_E090,{1U,8U,8U}},
{ROXR_E090,{2U,8U,8U}},
{ROXR_E090,{3U,8U,8U}},
{ROXR_E090,{4U,8U,8U}},
{ROXR_E090,{5U,8U,8U}},
{ROXR_E090,{6U,8U,8U}},
{ROXR_E090,{7U,8U,8U}},
{ROR_E098,{0U,8U,8U}},
{ROR_E098,{1U,8U,8U}},
{ROR_E098,{2U,8U,8U}},
{ROR_E098,{3U,8U,8U}},
{ROR_E098,{4U,8U,8U}},
{ROR_E098,{5U,8U,8U}},
{ROR_E098,{6U,8U,8U}},
{ROR_E098,{7U,8U,8U}},
{ASR_E0A0,{0U,0U,8U}},
{ASR_E0A0,{1U,0U,8U}},
{ASR_E0A0,{2U,0U,8U}},
{ASR_E0A0,{3U,0U,8U}},
{ASR_E0A0,{4U,0U,8U}},
{ASR_E0A0,{5U,0U,8U}},
{ASR_E0A0,{6U,0U,8U}},
{ASR_E0A0,{7U,0U,8U}},
{LSR_E0A8,{0U,0U,8U}},
{LSR_E0A8,{1U,0U,8U}},
{LSR_E0A8,{2U,0U,8U}},
{LSR_E0A8,{3U,0U,8U}},
{LSR_E0A8,{4U,0U,8U}},
{LSR_E0A8,{5U,0U,8U}},
{LSR_E0A8,{6U,0U,8U}},
{LSR_E0A8,{7U,0U,8U}},
{ROXR_E0B0,{0U,0U,8U}},
{ROXR_E0B0,{1U,0U,8U}},
{ROXR_E0B0,{2U,0U,8U}},
{ROXR_E0B0,{3U,0U,8U}},
{ROXR_E0B0,{4U,0U,8U}},
{ROXR_E0B0,{5U,0U,8U}},
{ROXR_E0B0,{6U,0U,8U}},
{ROXR_E0B0,{7U,0U,8U}},
{ROR_E0B8,{0U,0U,8U}},
{ROR_E0B8,{1U,0U,8U}},
{ROR_E0B8,{2U,0U,8U}},
{ROR_E0B8,{3U,0U,8U}},
{ROR_E0B8,{4U,0U,8U}},
{ROR_E0B8,{5U,0U,8U}},
{ROR_E0B8,{6U,0U,8U}},
{ROR_E0B8,{7U,0U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASR_E0D0,{0U,0U,10U}},
{ASR_E0D0,{1U,0U,10U}},
{ASR_E0D0,{2U,0U,10U}},
{ASR_E0D0,{3U,0U,10U}},
{ASR_E0D0,{4U,0U,10U}},
{ASR_E0D0,{5U,0U,10U}},
{ASR_E0D0,{6U,0U,10U}},
{ASR_E0D0,{7U,0U,10U}},
{ASR_E0D8,{0U,0U,10U}},
{ASR_E0D8,{1U,0U,10U}},
{ASR_E0D8,{2U,0U,10U}},
{ASR_E0D8,{3U,0U,10U}},
{ASR_E0D8,{4U,0U,10U}},
{ASR_E0D8,{5U,0U,10U}},
{ASR_E0D8,{6U,0U,10U}},
{ASR_E0D8,{7U,0U,10U}},
{ASR_E0E0,{0U,0U,12U}},
{ASR_E0E0,{1U,0U,12U}},
{ASR_E0E0,{2U,0U,12U}},
{ASR_E0E0,{3U,0U,12U}},
{ASR_E0E0,{4U,0U,12U}},
{ASR_E0E0,{5U,0U,12U}},
{ASR_E0E0,{6U,0U,12U}},
{ASR_E0E0,{7U,0U,12U}},
{ASR_E0E8,{0U,0U,14U}},
{ASR_E0E8,{1U,0U,14U}},
{ASR_E0E8,{2U,0U,14U}},
{ASR_E0E8,{3U,0U,14U}},
{ASR_E0E8,{4U,0U,14U}},
{ASR_E0E8,{5U,0U,14U}},
{ASR_E0E8,{6U,0U,14U}},
{ASR_E0E8,{7U,0U,14U}},
{ASR_E0F0,{0U,0U,16U}},
{ASR_E0F0,{1U,0U,16U}},
{ASR_E0F0,{2U,0U,16U}},
{ASR_E0F0,{3U,0U,16U}},
{ASR_E0F0,{4U,0U,16U}},
{ASR_E0F0,{5U,0U,16U}},
{ASR_E0F0,{6U,0U,16U}},
{ASR_E0F0,{7U,0U,16U}},
{ASR_E0F8,{0U,0U,14U}},
{ASR_E0F9,{0U,0U,18U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASL_E100,{0U,8U,6U}},
{ASL_E100,{1U,8U,6U}},
{ASL_E100,{2U,8U,6U}},
{ASL_E100,{3U,8U,6U}},
{ASL_E100,{4U,8U,6U}},
{ASL_E100,{5U,8U,6U}},
{ASL_E100,{6U,8U,6U}},
{ASL_E100,{7U,8U,6U}},
{LSL_E108,{0U,8U,6U}},
{LSL_E108,{1U,8U,6U}},
{LSL_E108,{2U,8U,6U}},
{LSL_E108,{3U,8U,6U}},
{LSL_E108,{4U,8U,6U}},
{LSL_E108,{5U,8U,6U}},
{LSL_E108,{6U,8U,6U}},
{LSL_E108,{7U,8U,6U}},
{ROXL_E110,{0U,8U,6U}},
{ROXL_E110,{1U,8U,6U}},
{ROXL_E110,{2U,8U,6U}},
{ROXL_E110,{3U,8U,6U}},
{ROXL_E110,{4U,8U,6U}},
{ROXL_E110,{5U,8U,6U}},
{ROXL_E110,{6U,8U,6U}},
{ROXL_E110,{7U,8U,6U}},
{ROL_E118,{0U,8U,6U}},
{ROL_E118,{1U,8U,6U}},
{ROL_E118,{2U,8U,6U}},
{ROL_E118,{3U,8U,6U}},
{ROL_E118,{4U,8U,6U}},
{ROL_E118,{5U,8U,6U}},
{ROL_E118,{6U,8U,6U}},
{ROL_E118,{7U,8U,6U}},
{ASL_E120,{0U,0U,6U}},
{ASL_E120,{1U,0U,6U}},
{ASL_E120,{2U,0U,6U}},
{ASL_E120,{3U,0U,6U}},
{ASL_E120,{4U,0U,6U}},
{ASL_E120,{5U,0U,6U}},
{ASL_E120,{6U,0U,6U}},
{ASL_E120,{7U,0U,6U}},
{LSL_E128,{0U,0U,6U}},
{LSL_E128,{1U,0U,6U}},
{LSL_E128,{2U,0U,6U}},
{LSL_E128,{3U,0U,6U}},
{LSL_E128,{4U,0U,6U}},
{LSL_E128,{5U,0U,6U}},
{LSL_E128,{6U,0U,6U}},
{LSL_E128,{7U,0U,6U}},
{ROXL_E130,{0U,0U,6U}},
{ROXL_E130,{1U,0U,6U}},
{ROXL_E130,{2U,0U,6U}},
{ROXL_E130,{3U,0U,6U}},
{ROXL_E130,{4U,0U,6U}},
{ROXL_E130,{5U,0U,6U}},
{ROXL_E130,{6U,0U,6U}},
{ROXL_E130,{7U,0U,6U}},
{ROL_E138,{0U,0U,6U}},
{ROL_E138,{1U,0U,6U}},
{ROL_E138,{2U,0U,6U}},
{ROL_E138,{3U,0U,6U}},
{ROL_E138,{4U,0U,6U}},
{ROL_E138,{5U,0U,6U}},
{ROL_E138,{6U,0U,6U}},
{ROL_E138,{7U,0U,6U}},
{ASL_E140,{0U,8U,6U}},
{ASL_E140,{1U,8U,6U}},
{ASL_E140,{2U,8U,6U}},
{ASL_E140,{3U,8U,6U}},
{ASL_E140,{4U,8U,6U}},
{ASL_E140,{5U,8U,6U}},
{ASL_E140,{6U,8U,6U}},
{ASL_E140,{7U,8U,6U}},
{LSL_E148,{0U,8U,6U}},
{LSL_E148,{1U,8U,6U}},
{LSL_E148,{2U,8U,6U}},
{LSL_E148,{3U,8U,6U}},
{LSL_E148,{4U,8U,6U}},
{LSL_E148,{5U,8U,6U}},
{LSL_E148,{6U,8U,6U}},
{LSL_E148,{7U,8U,6U}},
{ROXL_E150,{0U,8U,6U}},
{ROXL_E150,{1U,8U,6U}},
{ROXL_E150,{2U,8U,6U}},
{ROXL_E150,{3U,8U,6U}},
{ROXL_E150,{4U,8U,6U}},
{ROXL_E150,{5U,8U,6U}},
{ROXL_E150,{6U,8U,6U}},
{ROXL_E150,{7U,8U,6U}},
{ROL_E158,{0U,8U,6U}},
{ROL_E158,{1U,8U,6U}},
{ROL_E158,{2U,8U,6U}},
{ROL_E158,{3U,8U,6U}},
{ROL_E158,{4U,8U,6U}},
{ROL_E158,{5U,8U,6U}},
{ROL_E158,{6U,8U,6U}},
{ROL_E158,{7U,8U,6U}},
{ASL_E160,{0U,0U,6U}},
{ASL_E160,{1U,0U,6U}},
{ASL_E160,{2U,0U,6U}},
{ASL_E160,{3U,0U,6U}},
{ASL_E160,{4U,0U,6U}},
{ASL_E160,{5U,0U,6U}},
{ASL_E160,{6U,0U,6U}},
{ASL_E160,{7U,0U,6U}},
{LSL_E168,{0U,0U,6U}},
{LSL_E168,{1U,0U,6U}},
{LSL_E168,{2U,0U,6U}},
{LSL_E168,{3U,0U,6U}},
{LSL_E168,{4U,0U,6U}},
{LSL_E168,{5U,0U,6U}},
{LSL_E168,{6U,0U,6U}},
{LSL_E168,{7U,0U,6U}},
{ROXL_E170,{0U,0U,6U}},
{ROXL_E170,{1U,0U,6U}},
{ROXL_E170,{2U,0U,6U}},
{ROXL_E170,{3U,0U,6U}},
{ROXL_E170,{4U,0U,6U}},
{ROXL_E170,{5U,0U,6U}},
{ROXL_E170,{6U,0U,6U}},
{ROXL_E170,{7U,0U,6U}},
{ROL_E178,{0U,0U,6U}},
{ROL_E178,{1U,0U,6U}},
{ROL_E178,{2U,0U,6U}},
{ROL_E178,{3U,0U,6U}},
{ROL_E178,{4U,0U,6U}},
{ROL_E178,{5U,0U,6U}},
{ROL_E178,{6U,0U,6U}},
{ROL_E178,{7U,0U,6U}},
{ASL_E180,{0U,8U,8U}},
{ASL_E180,{1U,8U,8U}},
{ASL_E180,{2U,8U,8U}},
{ASL_E180,{3U,8U,8U}},
{ASL_E180,{4U,8U,8U}},
{ASL_E180,{5U,8U,8U}},
{ASL_E180,{6U,8U,8U}},
{ASL_E180,{7U,8U,8U}},
{LSL_E188,{0U,8U,8U}},
{LSL_E188,{1U,8U,8U}},
{LSL_E188,{2U,8U,8U}},
{LSL_E188,{3U,8U,8U}},
{LSL_E188,{4U,8U,8U}},
{LSL_E188,{5U,8U,8U}},
{LSL_E188,{6U,8U,8U}},
{LSL_E188,{7U,8U,8U}},
{ROXL_E190,{0U,8U,8U}},
{ROXL_E190,{1U,8U,8U}},
{ROXL_E190,{2U,8U,8U}},
{ROXL_E190,{3U,8U,8U}},
{ROXL_E190,{4U,8U,8U}},
{ROXL_E190,{5U,8U,8U}},
{ROXL_E190,{6U,8U,8U}},
{ROXL_E190,{7U,8U,8U}},
{ROL_E198,{0U,8U,8U}},
{ROL_E198,{1U,8U,8U}},
{ROL_E198,{2U,8U,8U}},
{ROL_E198,{3U,8U,8U}},
{ROL_E198,{4U,8U,8U}},
{ROL_E198,{5U,8U,8U}},
{ROL_E198,{6U,8U,8U}},
{ROL_E198,{7U,8U,8U}},
{ASL_E1A0,{0U,0U,8U}},
{ASL_E1A0,{1U,0U,8U}},
{ASL_E1A0,{2U,0U,8U}},
{ASL_E1A0,{3U,0U,8U}},
{ASL_E1A0,{4U,0U,8U}},
{ASL_E1A0,{5U,0U,8U}},
{ASL_E1A0,{6U,0U,8U}},
{ASL_E1A0,{7U,0U,8U}},
{LSL_E1A8,{0U,0U,8U}},
{LSL_E1A8,{1U,0U,8U}},
{LSL_E1A8,{2U,0U,8U}},
{LSL_E1A8,{3U,0U,8U}},
{LSL_E1A8,{4U,0U,8U}},
{LSL_E1A8,{5U,0U,8U}},
{LSL_E1A8,{6U,0U,8U}},
{LSL_E1A8,{7U,0U,8U}},
{ROXL_E1B0,{0U,0U,8U}},
{ROXL_E1B0,{1U,0U,8U}},
{ROXL_E1B0,{2U,0U,8U}},
{ROXL_E1B0,{3U,0U,8U}},
{ROXL_E1B0,{4U,0U,8U}},
{ROXL_E1B0,{5U,0U,8U}},
{ROXL_E1B0,{6U,0U,8U}},
{ROXL_E1B0,{7U,0U,8U}},
{ROL_E1B8,{0U,0U,8U}},
{ROL_E1B8,{1U,0U,8U}},
{ROL_E1B8,{2U,0U,8U}},
{ROL_E1B8,{3U,0U,8U}},
{ROL_E1B8,{4U,0U,8U}},
{ROL_E1B8,{5U,0U,8U}},
{ROL_E1B8,{6U,0U,8U}},
{ROL_E1B8,{7U,0U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASL_E1D0,{0U,0U,10U}},
{ASL_E1D0,{1U,0U,10U}},
{ASL_E1D0,{2U,0U,10U}},
{ASL_E1D0,{3U,0U,10U}},
{ASL_E1D0,{4U,0U,10U}},
{ASL_E1D0,{5U,0U,10U}},
{ASL_E1D0,{6U,0U,10U}},
{ASL_E1D0,{7U,0U,10U}},
{ASL_E1D8,{0U,0U,10U}},
{ASL_E1D8,{1U,0U,10U}},
{ASL_E1D8,{2U,0U,10U}},
{ASL_E1D8,{3U,0U,10U}},
{ASL_E1D8,{4U,0U,10U}},
{ASL_E1D8,{5U,0U,10U}},
{ASL_E1D8,{6U,0U,10U}},
{ASL_E1D8,{7U,0U,10U}},
{ASL_E1E0,{0U,0U,12U}},
{ASL_E1E0,{1U,0U,12U}},
{ASL_E1E0,{2U,0U,12U}},
{ASL_E1E0,{3U,0U,12U}},
{ASL_E1E0,{4U,0U,12U}},
{ASL_E1E0,{5U,0U,12U}},
{ASL_E1E0,{6U,0U,12U}},
{ASL_E1E0,{7U,0U,12U}},
{ASL_E1E8,{0U,0U,14U}},
{ASL_E1E8,{1U,0U,14U}},
{ASL_E1E8,{2U,0U,14U}},
{ASL_E1E8,{3U,0U,14U}},
{ASL_E1E8,{4U,0U,14U}},
{ASL_E1E8,{5U,0U,14U}},
{ASL_E1E8,{6U,0U,14U}},
{ASL_E1E8,{7U,0U,14U}},
{ASL_E1F0,{0U,0U,16U}},
{ASL_E1F0,{1U,0U,16U}},
{ASL_E1F0,{2U,0U,16U}},
{ASL_E1F0,{3U,0U,16U}},
{ASL_E1F0,{4U,0U,16U}},
{ASL_E1F0,{5U,0U,16U}},
{ASL_E1F0,{6U,0U,16U}},
{ASL_E1F0,{7U,0U,16U}},
{ASL_E1F8,{0U,0U,14U}},
{ASL_E1F9,{0U,0U,18U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASR_E000,{0U,1U,6U}},
{ASR_E000,{1U,1U,6U}},
{ASR_E000,{2U,1U,6U}},
{ASR_E000,{3U,1U,6U}},
{ASR_E000,{4U,1U,6U}},
{ASR_E000,{5U,1U,6U}},
{ASR_E000,{6U,1U,6U}},
{ASR_E000,{7U,1U,6U}},
{LSR_E008,{0U,1U,6U}},
{LSR_E008,{1U,1U,6U}},
{LSR_E008,{2U,1U,6U}},
{LSR_E008,{3U,1U,6U}},
{LSR_E008,{4U,1U,6U}},
{LSR_E008,{5U,1U,6U}},
{LSR_E008,{6U,1U,6U}},
{LSR_E008,{7U,1U,6U}},
{ROXR_E010,{0U,1U,6U}},
{ROXR_E010,{1U,1U,6U}},
{ROXR_E010,{2U,1U,6U}},
{ROXR_E010,{3U,1U,6U}},
{ROXR_E010,{4U,1U,6U}},
{ROXR_E010,{5U,1U,6U}},
{ROXR_E010,{6U,1U,6U}},
{ROXR_E010,{7U,1U,6U}},
{ROR_E018,{0U,1U,6U}},
{ROR_E018,{1U,1U,6U}},
{ROR_E018,{2U,1U,6U}},
{ROR_E018,{3U,1U,6U}},
{ROR_E018,{4U,1U,6U}},
{ROR_E018,{5U,1U,6U}},
{ROR_E018,{6U,1U,6U}},
{ROR_E018,{7U,1U,6U}},
{ASR_E020,{0U,1U,6U}},
{ASR_E020,{1U,1U,6U}},
{ASR_E020,{2U,1U,6U}},
{ASR_E020,{3U,1U,6U}},
{ASR_E020,{4U,1U,6U}},
{ASR_E020,{5U,1U,6U}},
{ASR_E020,{6U,1U,6U}},
{ASR_E020,{7U,1U,6U}},
{LSR_E028,{0U,1U,6U}},
{LSR_E028,{1U,1U,6U}},
{LSR_E028,{2U,1U,6U}},
{LSR_E028,{3U,1U,6U}},
{LSR_E028,{4U,1U,6U}},
{LSR_E028,{5U,1U,6U}},
{LSR_E028,{6U,1U,6U}},
{LSR_E028,{7U,1U,6U}},
{ROXR_E030,{0U,1U,6U}},
{ROXR_E030,{1U,1U,6U}},
{ROXR_E030,{2U,1U,6U}},
{ROXR_E030,{3U,1U,6U}},
{ROXR_E030,{4U,1U,6U}},
{ROXR_E030,{5U,1U,6U}},
{ROXR_E030,{6U,1U,6U}},
{ROXR_E030,{7U,1U,6U}},
{ROR_E038,{0U,1U,6U}},
{ROR_E038,{1U,1U,6U}},
{ROR_E038,{2U,1U,6U}},
{ROR_E038,{3U,1U,6U}},
{ROR_E038,{4U,1U,6U}},
{ROR_E038,{5U,1U,6U}},
{ROR_E038,{6U,1U,6U}},
{ROR_E038,{7U,1U,6U}},
{ASR_E040,{0U,1U,6U}},
{ASR_E040,{1U,1U,6U}},
{ASR_E040,{2U,1U,6U}},
{ASR_E040,{3U,1U,6U}},
{ASR_E040,{4U,1U,6U}},
{ASR_E040,{5U,1U,6U}},
{ASR_E040,{6U,1U,6U}},
{ASR_E040,{7U,1U,6U}},
{LSR_E048,{0U,1U,6U}},
{LSR_E048,{1U,1U,6U}},
{LSR_E048,{2U,1U,6U}},
{LSR_E048,{3U,1U,6U}},
{LSR_E048,{4U,1U,6U}},
{LSR_E048,{5U,1U,6U}},
{LSR_E048,{6U,1U,6U}},
{LSR_E048,{7U,1U,6U}},
{ROXR_E050,{0U,1U,6U}},
{ROXR_E050,{1U,1U,6U}},
{ROXR_E050,{2U,1U,6U}},
{ROXR_E050,{3U,1U,6U}},
{ROXR_E050,{4U,1U,6U}},
{ROXR_E050,{5U,1U,6U}},
{ROXR_E050,{6U,1U,6U}},
{ROXR_E050,{7U,1U,6U}},
{ROR_E058,{0U,1U,6U}},
{ROR_E058,{1U,1U,6U}},
{ROR_E058,{2U,1U,6U}},
{ROR_E058,{3U,1U,6U}},
{ROR_E058,{4U,1U,6U}},
{ROR_E058,{5U,1U,6U}},
{ROR_E058,{6U,1U,6U}},
{ROR_E058,{7U,1U,6U}},
{ASR_E060,{0U,1U,6U}},
{ASR_E060,{1U,1U,6U}},
{ASR_E060,{2U,1U,6U}},
{ASR_E060,{3U,1U,6U}},
{ASR_E060,{4U,1U,6U}},
{ASR_E060,{5U,1U,6U}},
{ASR_E060,{6U,1U,6U}},
{ASR_E060,{7U,1U,6U}},
{LSR_E068,{0U,1U,6U}},
{LSR_E068,{1U,1U,6U}},
{LSR_E068,{2U,1U,6U}},
{LSR_E068,{3U,1U,6U}},
{LSR_E068,{4U,1U,6U}},
{LSR_E068,{5U,1U,6U}},
{LSR_E068,{6U,1U,6U}},
{LSR_E068,{7U,1U,6U}},
{ROXR_E070,{0U,1U,6U}},
{ROXR_E070,{1U,1U,6U}},
{ROXR_E070,{2U,1U,6U}},
{ROXR_E070,{3U,1U,6U}},
{ROXR_E070,{4U,1U,6U}},
{ROXR_E070,{5U,1U,6U}},
{ROXR_E070,{6U,1U,6U}},
{ROXR_E070,{7U,1U,6U}},
{ROR_E078,{0U,1U,6U}},
{ROR_E078,{1U,1U,6U}},
{ROR_E078,{2U,1U,6U}},
{ROR_E078,{3U,1U,6U}},
{ROR_E078,{4U,1U,6U}},
{ROR_E078,{5U,1U,6U}},
{ROR_E078,{6U,1U,6U}},
{ROR_E078,{7U,1U,6U}},
{ASR_E080,{0U,1U,8U}},
{ASR_E080,{1U,1U,8U}},
{ASR_E080,{2U,1U,8U}},
{ASR_E080,{3U,1U,8U}},
{ASR_E080,{4U,1U,8U}},
{ASR_E080,{5U,1U,8U}},
{ASR_E080,{6U,1U,8U}},
{ASR_E080,{7U,1U,8U}},
{LSR_E088,{0U,1U,8U}},
{LSR_E088,{1U,1U,8U}},
{LSR_E088,{2U,1U,8U}},
{LSR_E088,{3U,1U,8U}},
{LSR_E088,{4U,1U,8U}},
{LSR_E088,{5U,1U,8U}},
{LSR_E088,{6U,1U,8U}},
{LSR_E088,{7U,1U,8U}},
{ROXR_E090,{0U,1U,8U}},
{ROXR_E090,{1U,1U,8U}},
{ROXR_E090,{2U,1U,8U}},
{ROXR_E090,{3U,1U,8U}},
{ROXR_E090,{4U,1U,8U}},
{ROXR_E090,{5U,1U,8U}},
{ROXR_E090,{6U,1U,8U}},
{ROXR_E090,{7U,1U,8U}},
{ROR_E098,{0U,1U,8U}},
{ROR_E098,{1U,1U,8U}},
{ROR_E098,{2U,1U,8U}},
{ROR_E098,{3U,1U,8U}},
{ROR_E098,{4U,1U,8U}},
{ROR_E098,{5U,1U,8U}},
{ROR_E098,{6U,1U,8U}},
{ROR_E098,{7U,1U,8U}},
{ASR_E0A0,{0U,1U,8U}},
{ASR_E0A0,{1U,1U,8U}},
{ASR_E0A0,{2U,1U,8U}},
{ASR_E0A0,{3U,1U,8U}},
{ASR_E0A0,{4U,1U,8U}},
{ASR_E0A0,{5U,1U,8U}},
{ASR_E0A0,{6U,1U,8U}},
{ASR_E0A0,{7U,1U,8U}},
{LSR_E0A8,{0U,1U,8U}},
{LSR_E0A8,{1U,1U,8U}},
{LSR_E0A8,{2U,1U,8U}},
{LSR_E0A8,{3U,1U,8U}},
{LSR_E0A8,{4U,1U,8U}},
{LSR_E0A8,{5U,1U,8U}},
{LSR_E0A8,{6U,1U,8U}},
{LSR_E0A8,{7U,1U,8U}},
{ROXR_E0B0,{0U,1U,8U}},
{ROXR_E0B0,{1U,1U,8U}},
{ROXR_E0B0,{2U,1U,8U}},
{ROXR_E0B0,{3U,1U,8U}},
{ROXR_E0B0,{4U,1U,8U}},
{ROXR_E0B0,{5U,1U,8U}},
{ROXR_E0B0,{6U,1U,8U}},
{ROXR_E0B0,{7U,1U,8U}},
{ROR_E0B8,{0U,1U,8U}},
{ROR_E0B8,{1U,1U,8U}},
{ROR_E0B8,{2U,1U,8U}},
{ROR_E0B8,{3U,1U,8U}},
{ROR_E0B8,{4U,1U,8U}},
{ROR_E0B8,{5U,1U,8U}},
{ROR_E0B8,{6U,1U,8U}},
{ROR_E0B8,{7U,1U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LSR_E2D0,{0U,0U,10U}},
{LSR_E2D0,{1U,0U,10U}},
{LSR_E2D0,{2U,0U,10U}},
{LSR_E2D0,{3U,0U,10U}},
{LSR_E2D0,{4U,0U,10U}},
{LSR_E2D0,{5U,0U,10U}},
{LSR_E2D0,{6U,0U,10U}},
{LSR_E2D0,{7U,0U,10U}},
{LSR_E2D8,{0U,0U,10U}},
{LSR_E2D8,{1U,0U,10U}},
{LSR_E2D8,{2U,0U,10U}},
{LSR_E2D8,{3U,0U,10U}},
{LSR_E2D8,{4U,0U,10U}},
{LSR_E2D8,{5U,0U,10U}},
{LSR_E2D8,{6U,0U,10U}},
{LSR_E2D8,{7U,0U,10U}},
{LSR_E2E0,{0U,0U,12U}},
{LSR_E2E0,{1U,0U,12U}},
{LSR_E2E0,{2U,0U,12U}},
{LSR_E2E0,{3U,0U,12U}},
{LSR_E2E0,{4U,0U,12U}},
{LSR_E2E0,{5U,0U,12U}},
{LSR_E2E0,{6U,0U,12U}},
{LSR_E2E0,{7U,0U,12U}},
{LSR_E2E8,{0U,0U,14U}},
{LSR_E2E8,{1U,0U,14U}},
{LSR_E2E8,{2U,0U,14U}},
{LSR_E2E8,{3U,0U,14U}},
{LSR_E2E8,{4U,0U,14U}},
{LSR_E2E8,{5U,0U,14U}},
{LSR_E2E8,{6U,0U,14U}},
{LSR_E2E8,{7U,0U,14U}},
{LSR_E2F0,{0U,0U,16U}},
{LSR_E2F0,{1U,0U,16U}},
{LSR_E2F0,{2U,0U,16U}},
{LSR_E2F0,{3U,0U,16U}},
{LSR_E2F0,{4U,0U,16U}},
{LSR_E2F0,{5U,0U,16U}},
{LSR_E2F0,{6U,0U,16U}},
{LSR_E2F0,{7U,0U,16U}},
{LSR_E2F8,{0U,0U,14U}},
{LSR_E2F9,{0U,0U,18U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASL_E100,{0U,1U,6U}},
{ASL_E100,{1U,1U,6U}},
{ASL_E100,{2U,1U,6U}},
{ASL_E100,{3U,1U,6U}},
{ASL_E100,{4U,1U,6U}},
{ASL_E100,{5U,1U,6U}},
{ASL_E100,{6U,1U,6U}},
{ASL_E100,{7U,1U,6U}},
{LSL_E108,{0U,1U,6U}},
{LSL_E108,{1U,1U,6U}},
{LSL_E108,{2U,1U,6U}},
{LSL_E108,{3U,1U,6U}},
{LSL_E108,{4U,1U,6U}},
{LSL_E108,{5U,1U,6U}},
{LSL_E108,{6U,1U,6U}},
{LSL_E108,{7U,1U,6U}},
{ROXL_E110,{0U,1U,6U}},
{ROXL_E110,{1U,1U,6U}},
{ROXL_E110,{2U,1U,6U}},
{ROXL_E110,{3U,1U,6U}},
{ROXL_E110,{4U,1U,6U}},
{ROXL_E110,{5U,1U,6U}},
{ROXL_E110,{6U,1U,6U}},
{ROXL_E110,{7U,1U,6U}},
{ROL_E118,{0U,1U,6U}},
{ROL_E118,{1U,1U,6U}},
{ROL_E118,{2U,1U,6U}},
{ROL_E118,{3U,1U,6U}},
{ROL_E118,{4U,1U,6U}},
{ROL_E118,{5U,1U,6U}},
{ROL_E118,{6U,1U,6U}},
{ROL_E118,{7U,1U,6U}},
{ASL_E120,{0U,1U,6U}},
{ASL_E120,{1U,1U,6U}},
{ASL_E120,{2U,1U,6U}},
{ASL_E120,{3U,1U,6U}},
{ASL_E120,{4U,1U,6U}},
{ASL_E120,{5U,1U,6U}},
{ASL_E120,{6U,1U,6U}},
{ASL_E120,{7U,1U,6U}},
{LSL_E128,{0U,1U,6U}},
{LSL_E128,{1U,1U,6U}},
{LSL_E128,{2U,1U,6U}},
{LSL_E128,{3U,1U,6U}},
{LSL_E128,{4U,1U,6U}},
{LSL_E128,{5U,1U,6U}},
{LSL_E128,{6U,1U,6U}},
{LSL_E128,{7U,1U,6U}},
{ROXL_E130,{0U,1U,6U}},
{ROXL_E130,{1U,1U,6U}},
{ROXL_E130,{2U,1U,6U}},
{ROXL_E130,{3U,1U,6U}},
{ROXL_E130,{4U,1U,6U}},
{ROXL_E130,{5U,1U,6U}},
{ROXL_E130,{6U,1U,6U}},
{ROXL_E130,{7U,1U,6U}},
{ROL_E138,{0U,1U,6U}},
{ROL_E138,{1U,1U,6U}},
{ROL_E138,{2U,1U,6U}},
{ROL_E138,{3U,1U,6U}},
{ROL_E138,{4U,1U,6U}},
{ROL_E138,{5U,1U,6U}},
{ROL_E138,{6U,1U,6U}},
{ROL_E138,{7U,1U,6U}},
{ASL_E140,{0U,1U,6U}},
{ASL_E140,{1U,1U,6U}},
{ASL_E140,{2U,1U,6U}},
{ASL_E140,{3U,1U,6U}},
{ASL_E140,{4U,1U,6U}},
{ASL_E140,{5U,1U,6U}},
{ASL_E140,{6U,1U,6U}},
{ASL_E140,{7U,1U,6U}},
{LSL_E148,{0U,1U,6U}},
{LSL_E148,{1U,1U,6U}},
{LSL_E148,{2U,1U,6U}},
{LSL_E148,{3U,1U,6U}},
{LSL_E148,{4U,1U,6U}},
{LSL_E148,{5U,1U,6U}},
{LSL_E148,{6U,1U,6U}},
{LSL_E148,{7U,1U,6U}},
{ROXL_E150,{0U,1U,6U}},
{ROXL_E150,{1U,1U,6U}},
{ROXL_E150,{2U,1U,6U}},
{ROXL_E150,{3U,1U,6U}},
{ROXL_E150,{4U,1U,6U}},
{ROXL_E150,{5U,1U,6U}},
{ROXL_E150,{6U,1U,6U}},
{ROXL_E150,{7U,1U,6U}},
{ROL_E158,{0U,1U,6U}},
{ROL_E158,{1U,1U,6U}},
{ROL_E158,{2U,1U,6U}},
{ROL_E158,{3U,1U,6U}},
{ROL_E158,{4U,1U,6U}},
{ROL_E158,{5U,1U,6U}},
{ROL_E158,{6U,1U,6U}},
{ROL_E158,{7U,1U,6U}},
{ASL_E160,{0U,1U,6U}},
{ASL_E160,{1U,1U,6U}},
{ASL_E160,{2U,1U,6U}},
{ASL_E160,{3U,1U,6U}},
{ASL_E160,{4U,1U,6U}},
{ASL_E160,{5U,1U,6U}},
{ASL_E160,{6U,1U,6U}},
{ASL_E160,{7U,1U,6U}},
{LSL_E168,{0U,1U,6U}},
{LSL_E168,{1U,1U,6U}},
{LSL_E168,{2U,1U,6U}},
{LSL_E168,{3U,1U,6U}},
{LSL_E168,{4U,1U,6U}},
{LSL_E168,{5U,1U,6U}},
{LSL_E168,{6U,1U,6U}},
{LSL_E168,{7U,1U,6U}},
{ROXL_E170,{0U,1U,6U}},
{ROXL_E170,{1U,1U,6U}},
{ROXL_E170,{2U,1U,6U}},
{ROXL_E170,{3U,1U,6U}},
{ROXL_E170,{4U,1U,6U}},
{ROXL_E170,{5U,1U,6U}},
{ROXL_E170,{6U,1U,6U}},
{ROXL_E170,{7U,1U,6U}},
{ROL_E178,{0U,1U,6U}},
{ROL_E178,{1U,1U,6U}},
{ROL_E178,{2U,1U,6U}},
{ROL_E178,{3U,1U,6U}},
{ROL_E178,{4U,1U,6U}},
{ROL_E178,{5U,1U,6U}},
{ROL_E178,{6U,1U,6U}},
{ROL_E178,{7U,1U,6U}},
{ASL_E180,{0U,1U,8U}},
{ASL_E180,{1U,1U,8U}},
{ASL_E180,{2U,1U,8U}},
{ASL_E180,{3U,1U,8U}},
{ASL_E180,{4U,1U,8U}},
{ASL_E180,{5U,1U,8U}},
{ASL_E180,{6U,1U,8U}},
{ASL_E180,{7U,1U,8U}},
{LSL_E188,{0U,1U,8U}},
{LSL_E188,{1U,1U,8U}},
{LSL_E188,{2U,1U,8U}},
{LSL_E188,{3U,1U,8U}},
{LSL_E188,{4U,1U,8U}},
{LSL_E188,{5U,1U,8U}},
{LSL_E188,{6U,1U,8U}},
{LSL_E188,{7U,1U,8U}},
{ROXL_E190,{0U,1U,8U}},
{ROXL_E190,{1U,1U,8U}},
{ROXL_E190,{2U,1U,8U}},
{ROXL_E190,{3U,1U,8U}},
{ROXL_E190,{4U,1U,8U}},
{ROXL_E190,{5U,1U,8U}},
{ROXL_E190,{6U,1U,8U}},
{ROXL_E190,{7U,1U,8U}},
{ROL_E198,{0U,1U,8U}},
{ROL_E198,{1U,1U,8U}},
{ROL_E198,{2U,1U,8U}},
{ROL_E198,{3U,1U,8U}},
{ROL_E198,{4U,1U,8U}},
{ROL_E198,{5U,1U,8U}},
{ROL_E198,{6U,1U,8U}},
{ROL_E198,{7U,1U,8U}},
{ASL_E1A0,{0U,1U,8U}},
{ASL_E1A0,{1U,1U,8U}},
{ASL_E1A0,{2U,1U,8U}},
{ASL_E1A0,{3U,1U,8U}},
{ASL_E1A0,{4U,1U,8U}},
{ASL_E1A0,{5U,1U,8U}},
{ASL_E1A0,{6U,1U,8U}},
{ASL_E1A0,{7U,1U,8U}},
{LSL_E1A8,{0U,1U,8U}},
{LSL_E1A8,{1U,1U,8U}},
{LSL_E1A8,{2U,1U,8U}},
{LSL_E1A8,{3U,1U,8U}},
{LSL_E1A8,{4U,1U,8U}},
{LSL_E1A8,{5U,1U,8U}},
{LSL_E1A8,{6U,1U,8U}},
{LSL_E1A8,{7U,1U,8U}},
{ROXL_E1B0,{0U,1U,8U}},
{ROXL_E1B0,{1U,1U,8U}},
{ROXL_E1B0,{2U,1U,8U}},
{ROXL_E1B0,{3U,1U,8U}},
{ROXL_E1B0,{4U,1U,8U}},
{ROXL_E1B0,{5U,1U,8U}},
{ROXL_E1B0,{6U,1U,8U}},
{ROXL_E1B0,{7U,1U,8U}},
{ROL_E1B8,{0U,1U,8U}},
{ROL_E1B8,{1U,1U,8U}},
{ROL_E1B8,{2U,1U,8U}},
{ROL_E1B8,{3U,1U,8U}},
{ROL_E1B8,{4U,1U,8U}},
{ROL_E1B8,{5U,1U,8U}},
{ROL_E1B8,{6U,1U,8U}},
{ROL_E1B8,{7U,1U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{LSL_E3D0,{0U,0U,10U}},
{LSL_E3D0,{1U,0U,10U}},
{LSL_E3D0,{2U,0U,10U}},
{LSL_E3D0,{3U,0U,10U}},
{LSL_E3D0,{4U,0U,10U}},
{LSL_E3D0,{5U,0U,10U}},
{LSL_E3D0,{6U,0U,10U}},
{LSL_E3D0,{7U,0U,10U}},
{LSL_E3D8,{0U,0U,10U}},
{LSL_E3D8,{1U,0U,10U}},
{LSL_E3D8,{2U,0U,10U}},
{LSL_E3D8,{3U,0U,10U}},
{LSL_E3D8,{4U,0U,10U}},
{LSL_E3D8,{5U,0U,10U}},
{LSL_E3D8,{6U,0U,10U}},
{LSL_E3D8,{7U,0U,10U}},
{LSL_E3E0,{0U,0U,12U}},
{LSL_E3E0,{1U,0U,12U}},
{LSL_E3E0,{2U,0U,12U}},
{LSL_E3E0,{3U,0U,12U}},
{LSL_E3E0,{4U,0U,12U}},
{LSL_E3E0,{5U,0U,12U}},
{LSL_E3E0,{6U,0U,12U}},
{LSL_E3E0,{7U,0U,12U}},
{LSL_E3E8,{0U,0U,14U}},
{LSL_E3E8,{1U,0U,14U}},
{LSL_E3E8,{2U,0U,14U}},
{LSL_E3E8,{3U,0U,14U}},
{LSL_E3E8,{4U,0U,14U}},
{LSL_E3E8,{5U,0U,14U}},
{LSL_E3E8,{6U,0U,14U}},
{LSL_E3E8,{7U,0U,14U}},
{LSL_E3F0,{0U,0U,16U}},
{LSL_E3F0,{1U,0U,16U}},
{LSL_E3F0,{2U,0U,16U}},
{LSL_E3F0,{3U,0U,16U}},
{LSL_E3F0,{4U,0U,16U}},
{LSL_E3F0,{5U,0U,16U}},
{LSL_E3F0,{6U,0U,16U}},
{LSL_E3F0,{7U,0U,16U}},
{LSL_E3F8,{0U,0U,14U}},
{LSL_E3F9,{0U,0U,18U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASR_E000,{0U,2U,6U}},
{ASR_E000,{1U,2U,6U}},
{ASR_E000,{2U,2U,6U}},
{ASR_E000,{3U,2U,6U}},
{ASR_E000,{4U,2U,6U}},
{ASR_E000,{5U,2U,6U}},
{ASR_E000,{6U,2U,6U}},
{ASR_E000,{7U,2U,6U}},
{LSR_E008,{0U,2U,6U}},
{LSR_E008,{1U,2U,6U}},
{LSR_E008,{2U,2U,6U}},
{LSR_E008,{3U,2U,6U}},
{LSR_E008,{4U,2U,6U}},
{LSR_E008,{5U,2U,6U}},
{LSR_E008,{6U,2U,6U}},
{LSR_E008,{7U,2U,6U}},
{ROXR_E010,{0U,2U,6U}},
{ROXR_E010,{1U,2U,6U}},
{ROXR_E010,{2U,2U,6U}},
{ROXR_E010,{3U,2U,6U}},
{ROXR_E010,{4U,2U,6U}},
{ROXR_E010,{5U,2U,6U}},
{ROXR_E010,{6U,2U,6U}},
{ROXR_E010,{7U,2U,6U}},
{ROR_E018,{0U,2U,6U}},
{ROR_E018,{1U,2U,6U}},
{ROR_E018,{2U,2U,6U}},
{ROR_E018,{3U,2U,6U}},
{ROR_E018,{4U,2U,6U}},
{ROR_E018,{5U,2U,6U}},
{ROR_E018,{6U,2U,6U}},
{ROR_E018,{7U,2U,6U}},
{ASR_E020,{0U,2U,6U}},
{ASR_E020,{1U,2U,6U}},
{ASR_E020,{2U,2U,6U}},
{ASR_E020,{3U,2U,6U}},
{ASR_E020,{4U,2U,6U}},
{ASR_E020,{5U,2U,6U}},
{ASR_E020,{6U,2U,6U}},
{ASR_E020,{7U,2U,6U}},
{LSR_E028,{0U,2U,6U}},
{LSR_E028,{1U,2U,6U}},
{LSR_E028,{2U,2U,6U}},
{LSR_E028,{3U,2U,6U}},
{LSR_E028,{4U,2U,6U}},
{LSR_E028,{5U,2U,6U}},
{LSR_E028,{6U,2U,6U}},
{LSR_E028,{7U,2U,6U}},
{ROXR_E030,{0U,2U,6U}},
{ROXR_E030,{1U,2U,6U}},
{ROXR_E030,{2U,2U,6U}},
{ROXR_E030,{3U,2U,6U}},
{ROXR_E030,{4U,2U,6U}},
{ROXR_E030,{5U,2U,6U}},
{ROXR_E030,{6U,2U,6U}},
{ROXR_E030,{7U,2U,6U}},
{ROR_E038,{0U,2U,6U}},
{ROR_E038,{1U,2U,6U}},
{ROR_E038,{2U,2U,6U}},
{ROR_E038,{3U,2U,6U}},
{ROR_E038,{4U,2U,6U}},
{ROR_E038,{5U,2U,6U}},
{ROR_E038,{6U,2U,6U}},
{ROR_E038,{7U,2U,6U}},
{ASR_E040,{0U,2U,6U}},
{ASR_E040,{1U,2U,6U}},
{ASR_E040,{2U,2U,6U}},
{ASR_E040,{3U,2U,6U}},
{ASR_E040,{4U,2U,6U}},
{ASR_E040,{5U,2U,6U}},
{ASR_E040,{6U,2U,6U}},
{ASR_E040,{7U,2U,6U}},
{LSR_E048,{0U,2U,6U}},
{LSR_E048,{1U,2U,6U}},
{LSR_E048,{2U,2U,6U}},
{LSR_E048,{3U,2U,6U}},
{LSR_E048,{4U,2U,6U}},
{LSR_E048,{5U,2U,6U}},
{LSR_E048,{6U,2U,6U}},
{LSR_E048,{7U,2U,6U}},
{ROXR_E050,{0U,2U,6U}},
{ROXR_E050,{1U,2U,6U}},
{ROXR_E050,{2U,2U,6U}},
{ROXR_E050,{3U,2U,6U}},
{ROXR_E050,{4U,2U,6U}},
{ROXR_E050,{5U,2U,6U}},
{ROXR_E050,{6U,2U,6U}},
{ROXR_E050,{7U,2U,6U}},
{ROR_E058,{0U,2U,6U}},
{ROR_E058,{1U,2U,6U}},
{ROR_E058,{2U,2U,6U}},
{ROR_E058,{3U,2U,6U}},
{ROR_E058,{4U,2U,6U}},
{ROR_E058,{5U,2U,6U}},
{ROR_E058,{6U,2U,6U}},
{ROR_E058,{7U,2U,6U}},
{ASR_E060,{0U,2U,6U}},
{ASR_E060,{1U,2U,6U}},
{ASR_E060,{2U,2U,6U}},
{ASR_E060,{3U,2U,6U}},
{ASR_E060,{4U,2U,6U}},
{ASR_E060,{5U,2U,6U}},
{ASR_E060,{6U,2U,6U}},
{ASR_E060,{7U,2U,6U}},
{LSR_E068,{0U,2U,6U}},
{LSR_E068,{1U,2U,6U}},
{LSR_E068,{2U,2U,6U}},
{LSR_E068,{3U,2U,6U}},
{LSR_E068,{4U,2U,6U}},
{LSR_E068,{5U,2U,6U}},
{LSR_E068,{6U,2U,6U}},
{LSR_E068,{7U,2U,6U}},
{ROXR_E070,{0U,2U,6U}},
{ROXR_E070,{1U,2U,6U}},
{ROXR_E070,{2U,2U,6U}},
{ROXR_E070,{3U,2U,6U}},
{ROXR_E070,{4U,2U,6U}},
{ROXR_E070,{5U,2U,6U}},
{ROXR_E070,{6U,2U,6U}},
{ROXR_E070,{7U,2U,6U}},
{ROR_E078,{0U,2U,6U}},
{ROR_E078,{1U,2U,6U}},
{ROR_E078,{2U,2U,6U}},
{ROR_E078,{3U,2U,6U}},
{ROR_E078,{4U,2U,6U}},
{ROR_E078,{5U,2U,6U}},
{ROR_E078,{6U,2U,6U}},
{ROR_E078,{7U,2U,6U}},
{ASR_E080,{0U,2U,8U}},
{ASR_E080,{1U,2U,8U}},
{ASR_E080,{2U,2U,8U}},
{ASR_E080,{3U,2U,8U}},
{ASR_E080,{4U,2U,8U}},
{ASR_E080,{5U,2U,8U}},
{ASR_E080,{6U,2U,8U}},
{ASR_E080,{7U,2U,8U}},
{LSR_E088,{0U,2U,8U}},
{LSR_E088,{1U,2U,8U}},
{LSR_E088,{2U,2U,8U}},
{LSR_E088,{3U,2U,8U}},
{LSR_E088,{4U,2U,8U}},
{LSR_E088,{5U,2U,8U}},
{LSR_E088,{6U,2U,8U}},
{LSR_E088,{7U,2U,8U}},
{ROXR_E090,{0U,2U,8U}},
{ROXR_E090,{1U,2U,8U}},
{ROXR_E090,{2U,2U,8U}},
{ROXR_E090,{3U,2U,8U}},
{ROXR_E090,{4U,2U,8U}},
{ROXR_E090,{5U,2U,8U}},
{ROXR_E090,{6U,2U,8U}},
{ROXR_E090,{7U,2U,8U}},
{ROR_E098,{0U,2U,8U}},
{ROR_E098,{1U,2U,8U}},
{ROR_E098,{2U,2U,8U}},
{ROR_E098,{3U,2U,8U}},
{ROR_E098,{4U,2U,8U}},
{ROR_E098,{5U,2U,8U}},
{ROR_E098,{6U,2U,8U}},
{ROR_E098,{7U,2U,8U}},
{ASR_E0A0,{0U,2U,8U}},
{ASR_E0A0,{1U,2U,8U}},
{ASR_E0A0,{2U,2U,8U}},
{ASR_E0A0,{3U,2U,8U}},
{ASR_E0A0,{4U,2U,8U}},
{ASR_E0A0,{5U,2U,8U}},
{ASR_E0A0,{6U,2U,8U}},
{ASR_E0A0,{7U,2U,8U}},
{LSR_E0A8,{0U,2U,8U}},
{LSR_E0A8,{1U,2U,8U}},
{LSR_E0A8,{2U,2U,8U}},
{LSR_E0A8,{3U,2U,8U}},
{LSR_E0A8,{4U,2U,8U}},
{LSR_E0A8,{5U,2U,8U}},
{LSR_E0A8,{6U,2U,8U}},
{LSR_E0A8,{7U,2U,8U}},
{ROXR_E0B0,{0U,2U,8U}},
{ROXR_E0B0,{1U,2U,8U}},
{ROXR_E0B0,{2U,2U,8U}},
{ROXR_E0B0,{3U,2U,8U}},
{ROXR_E0B0,{4U,2U,8U}},
{ROXR_E0B0,{5U,2U,8U}},
{ROXR_E0B0,{6U,2U,8U}},
{ROXR_E0B0,{7U,2U,8U}},
{ROR_E0B8,{0U,2U,8U}},
{ROR_E0B8,{1U,2U,8U}},
{ROR_E0B8,{2U,2U,8U}},
{ROR_E0B8,{3U,2U,8U}},
{ROR_E0B8,{4U,2U,8U}},
{ROR_E0B8,{5U,2U,8U}},
{ROR_E0B8,{6U,2U,8U}},
{ROR_E0B8,{7U,2U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ROXR_E4D0,{0U,0U,10U}},
{ROXR_E4D0,{1U,0U,10U}},
{ROXR_E4D0,{2U,0U,10U}},
{ROXR_E4D0,{3U,0U,10U}},
{ROXR_E4D0,{4U,0U,10U}},
{ROXR_E4D0,{5U,0U,10U}},
{ROXR_E4D0,{6U,0U,10U}},
{ROXR_E4D0,{7U,0U,10U}},
{ROXR_E4D8,{0U,0U,10U}},
{ROXR_E4D8,{1U,0U,10U}},
{ROXR_E4D8,{2U,0U,10U}},
{ROXR_E4D8,{3U,0U,10U}},
{ROXR_E4D8,{4U,0U,10U}},
{ROXR_E4D8,{5U,0U,10U}},
{ROXR_E4D8,{6U,0U,10U}},
{ROXR_E4D8,{7U,0U,10U}},
{ROXR_E4E0,{0U,0U,12U}},
{ROXR_E4E0,{1U,0U,12U}},
{ROXR_E4E0,{2U,0U,12U}},
{ROXR_E4E0,{3U,0U,12U}},
{ROXR_E4E0,{4U,0U,12U}},
{ROXR_E4E0,{5U,0U,12U}},
{ROXR_E4E0,{6U,0U,12U}},
{ROXR_E4E0,{7U,0U,12U}},
{ROXR_E4E8,{0U,0U,14U}},
{ROXR_E4E8,{1U,0U,14U}},
{ROXR_E4E8,{2U,0U,14U}},
{ROXR_E4E8,{3U,0U,14U}},
{ROXR_E4E8,{4U,0U,14U}},
{ROXR_E4E8,{5U,0U,14U}},
{ROXR_E4E8,{6U,0U,14U}},
{ROXR_E4E8,{7U,0U,14U}},
{ROXR_E4F0,{0U,0U,16U}},
{ROXR_E4F0,{1U,0U,16U}},
{ROXR_E4F0,{2U,0U,16U}},
{ROXR_E4F0,{3U,0U,16U}},
{ROXR_E4F0,{4U,0U,16U}},
{ROXR_E4F0,{5U,0U,16U}},
{ROXR_E4F0,{6U,0U,16U}},
{ROXR_E4F0,{7U,0U,16U}},
{ROXR_E4F8,{0U,0U,14U}},
{ROXR_E4F9,{0U,0U,18U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASL_E100,{0U,2U,6U}},
{ASL_E100,{1U,2U,6U}},
{ASL_E100,{2U,2U,6U}},
{ASL_E100,{3U,2U,6U}},
{ASL_E100,{4U,2U,6U}},
{ASL_E100,{5U,2U,6U}},
{ASL_E100,{6U,2U,6U}},
{ASL_E100,{7U,2U,6U}},
{LSL_E108,{0U,2U,6U}},
{LSL_E108,{1U,2U,6U}},
{LSL_E108,{2U,2U,6U}},
{LSL_E108,{3U,2U,6U}},
{LSL_E108,{4U,2U,6U}},
{LSL_E108,{5U,2U,6U}},
{LSL_E108,{6U,2U,6U}},
{LSL_E108,{7U,2U,6U}},
{ROXL_E110,{0U,2U,6U}},
{ROXL_E110,{1U,2U,6U}},
{ROXL_E110,{2U,2U,6U}},
{ROXL_E110,{3U,2U,6U}},
{ROXL_E110,{4U,2U,6U}},
{ROXL_E110,{5U,2U,6U}},
{ROXL_E110,{6U,2U,6U}},
{ROXL_E110,{7U,2U,6U}},
{ROL_E118,{0U,2U,6U}},
{ROL_E118,{1U,2U,6U}},
{ROL_E118,{2U,2U,6U}},
{ROL_E118,{3U,2U,6U}},
{ROL_E118,{4U,2U,6U}},
{ROL_E118,{5U,2U,6U}},
{ROL_E118,{6U,2U,6U}},
{ROL_E118,{7U,2U,6U}},
{ASL_E120,{0U,2U,6U}},
{ASL_E120,{1U,2U,6U}},
{ASL_E120,{2U,2U,6U}},
{ASL_E120,{3U,2U,6U}},
{ASL_E120,{4U,2U,6U}},
{ASL_E120,{5U,2U,6U}},
{ASL_E120,{6U,2U,6U}},
{ASL_E120,{7U,2U,6U}},
{LSL_E128,{0U,2U,6U}},
{LSL_E128,{1U,2U,6U}},
{LSL_E128,{2U,2U,6U}},
{LSL_E128,{3U,2U,6U}},
{LSL_E128,{4U,2U,6U}},
{LSL_E128,{5U,2U,6U}},
{LSL_E128,{6U,2U,6U}},
{LSL_E128,{7U,2U,6U}},
{ROXL_E130,{0U,2U,6U}},
{ROXL_E130,{1U,2U,6U}},
{ROXL_E130,{2U,2U,6U}},
{ROXL_E130,{3U,2U,6U}},
{ROXL_E130,{4U,2U,6U}},
{ROXL_E130,{5U,2U,6U}},
{ROXL_E130,{6U,2U,6U}},
{ROXL_E130,{7U,2U,6U}},
{ROL_E138,{0U,2U,6U}},
{ROL_E138,{1U,2U,6U}},
{ROL_E138,{2U,2U,6U}},
{ROL_E138,{3U,2U,6U}},
{ROL_E138,{4U,2U,6U}},
{ROL_E138,{5U,2U,6U}},
{ROL_E138,{6U,2U,6U}},
{ROL_E138,{7U,2U,6U}},
{ASL_E140,{0U,2U,6U}},
{ASL_E140,{1U,2U,6U}},
{ASL_E140,{2U,2U,6U}},
{ASL_E140,{3U,2U,6U}},
{ASL_E140,{4U,2U,6U}},
{ASL_E140,{5U,2U,6U}},
{ASL_E140,{6U,2U,6U}},
{ASL_E140,{7U,2U,6U}},
{LSL_E148,{0U,2U,6U}},
{LSL_E148,{1U,2U,6U}},
{LSL_E148,{2U,2U,6U}},
{LSL_E148,{3U,2U,6U}},
{LSL_E148,{4U,2U,6U}},
{LSL_E148,{5U,2U,6U}},
{LSL_E148,{6U,2U,6U}},
{LSL_E148,{7U,2U,6U}},
{ROXL_E150,{0U,2U,6U}},
{ROXL_E150,{1U,2U,6U}},
{ROXL_E150,{2U,2U,6U}},
{ROXL_E150,{3U,2U,6U}},
{ROXL_E150,{4U,2U,6U}},
{ROXL_E150,{5U,2U,6U}},
{ROXL_E150,{6U,2U,6U}},
{ROXL_E150,{7U,2U,6U}},
{ROL_E158,{0U,2U,6U}},
{ROL_E158,{1U,2U,6U}},
{ROL_E158,{2U,2U,6U}},
{ROL_E158,{3U,2U,6U}},
{ROL_E158,{4U,2U,6U}},
{ROL_E158,{5U,2U,6U}},
{ROL_E158,{6U,2U,6U}},
{ROL_E158,{7U,2U,6U}},
{ASL_E160,{0U,2U,6U}},
{ASL_E160,{1U,2U,6U}},
{ASL_E160,{2U,2U,6U}},
{ASL_E160,{3U,2U,6U}},
{ASL_E160,{4U,2U,6U}},
{ASL_E160,{5U,2U,6U}},
{ASL_E160,{6U,2U,6U}},
{ASL_E160,{7U,2U,6U}},
{LSL_E168,{0U,2U,6U}},
{LSL_E168,{1U,2U,6U}},
{LSL_E168,{2U,2U,6U}},
{LSL_E168,{3U,2U,6U}},
{LSL_E168,{4U,2U,6U}},
{LSL_E168,{5U,2U,6U}},
{LSL_E168,{6U,2U,6U}},
{LSL_E168,{7U,2U,6U}},
{ROXL_E170,{0U,2U,6U}},
{ROXL_E170,{1U,2U,6U}},
{ROXL_E170,{2U,2U,6U}},
{ROXL_E170,{3U,2U,6U}},
{ROXL_E170,{4U,2U,6U}},
{ROXL_E170,{5U,2U,6U}},
{ROXL_E170,{6U,2U,6U}},
{ROXL_E170,{7U,2U,6U}},
{ROL_E178,{0U,2U,6U}},
{ROL_E178,{1U,2U,6U}},
{ROL_E178,{2U,2U,6U}},
{ROL_E178,{3U,2U,6U}},
{ROL_E178,{4U,2U,6U}},
{ROL_E178,{5U,2U,6U}},
{ROL_E178,{6U,2U,6U}},
{ROL_E178,{7U,2U,6U}},
{ASL_E180,{0U,2U,8U}},
{ASL_E180,{1U,2U,8U}},
{ASL_E180,{2U,2U,8U}},
{ASL_E180,{3U,2U,8U}},
{ASL_E180,{4U,2U,8U}},
{ASL_E180,{5U,2U,8U}},
{ASL_E180,{6U,2U,8U}},
{ASL_E180,{7U,2U,8U}},
{LSL_E188,{0U,2U,8U}},
{LSL_E188,{1U,2U,8U}},
{LSL_E188,{2U,2U,8U}},
{LSL_E188,{3U,2U,8U}},
{LSL_E188,{4U,2U,8U}},
{LSL_E188,{5U,2U,8U}},
{LSL_E188,{6U,2U,8U}},
{LSL_E188,{7U,2U,8U}},
{ROXL_E190,{0U,2U,8U}},
{ROXL_E190,{1U,2U,8U}},
{ROXL_E190,{2U,2U,8U}},
{ROXL_E190,{3U,2U,8U}},
{ROXL_E190,{4U,2U,8U}},
{ROXL_E190,{5U,2U,8U}},
{ROXL_E190,{6U,2U,8U}},
{ROXL_E190,{7U,2U,8U}},
{ROL_E198,{0U,2U,8U}},
{ROL_E198,{1U,2U,8U}},
{ROL_E198,{2U,2U,8U}},
{ROL_E198,{3U,2U,8U}},
{ROL_E198,{4U,2U,8U}},
{ROL_E198,{5U,2U,8U}},
{ROL_E198,{6U,2U,8U}},
{ROL_E198,{7U,2U,8U}},
{ASL_E1A0,{0U,2U,8U}},
{ASL_E1A0,{1U,2U,8U}},
{ASL_E1A0,{2U,2U,8U}},
{ASL_E1A0,{3U,2U,8U}},
{ASL_E1A0,{4U,2U,8U}},
{ASL_E1A0,{5U,2U,8U}},
{ASL_E1A0,{6U,2U,8U}},
{ASL_E1A0,{7U,2U,8U}},
{LSL_E1A8,{0U,2U,8U}},
{LSL_E1A8,{1U,2U,8U}},
{LSL_E1A8,{2U,2U,8U}},
{LSL_E1A8,{3U,2U,8U}},
{LSL_E1A8,{4U,2U,8U}},
{LSL_E1A8,{5U,2U,8U}},
{LSL_E1A8,{6U,2U,8U}},
{LSL_E1A8,{7U,2U,8U}},
{ROXL_E1B0,{0U,2U,8U}},
{ROXL_E1B0,{1U,2U,8U}},
{ROXL_E1B0,{2U,2U,8U}},
{ROXL_E1B0,{3U,2U,8U}},
{ROXL_E1B0,{4U,2U,8U}},
{ROXL_E1B0,{5U,2U,8U}},
{ROXL_E1B0,{6U,2U,8U}},
{ROXL_E1B0,{7U,2U,8U}},
{ROL_E1B8,{0U,2U,8U}},
{ROL_E1B8,{1U,2U,8U}},
{ROL_E1B8,{2U,2U,8U}},
{ROL_E1B8,{3U,2U,8U}},
{ROL_E1B8,{4U,2U,8U}},
{ROL_E1B8,{5U,2U,8U}},
{ROL_E1B8,{6U,2U,8U}},
{ROL_E1B8,{7U,2U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ROXL_E5D0,{0U,0U,10U}},
{ROXL_E5D0,{1U,0U,10U}},
{ROXL_E5D0,{2U,0U,10U}},
{ROXL_E5D0,{3U,0U,10U}},
{ROXL_E5D0,{4U,0U,10U}},
{ROXL_E5D0,{5U,0U,10U}},
{ROXL_E5D0,{6U,0U,10U}},
{ROXL_E5D0,{7U,0U,10U}},
{ROXL_E5D8,{0U,0U,10U}},
{ROXL_E5D8,{1U,0U,10U}},
{ROXL_E5D8,{2U,0U,10U}},
{ROXL_E5D8,{3U,0U,10U}},
{ROXL_E5D8,{4U,0U,10U}},
{ROXL_E5D8,{5U,0U,10U}},
{ROXL_E5D8,{6U,0U,10U}},
{ROXL_E5D8,{7U,0U,10U}},
{ROXL_E5E0,{0U,0U,12U}},
{ROXL_E5E0,{1U,0U,12U}},
{ROXL_E5E0,{2U,0U,12U}},
{ROXL_E5E0,{3U,0U,12U}},
{ROXL_E5E0,{4U,0U,12U}},
{ROXL_E5E0,{5U,0U,12U}},
{ROXL_E5E0,{6U,0U,12U}},
{ROXL_E5E0,{7U,0U,12U}},
{ROXL_E5E8,{0U,0U,14U}},
{ROXL_E5E8,{1U,0U,14U}},
{ROXL_E5E8,{2U,0U,14U}},
{ROXL_E5E8,{3U,0U,14U}},
{ROXL_E5E8,{4U,0U,14U}},
{ROXL_E5E8,{5U,0U,14U}},
{ROXL_E5E8,{6U,0U,14U}},
{ROXL_E5E8,{7U,0U,14U}},
{ROXL_E5F0,{0U,0U,16U}},
{ROXL_E5F0,{1U,0U,16U}},
{ROXL_E5F0,{2U,0U,16U}},
{ROXL_E5F0,{3U,0U,16U}},
{ROXL_E5F0,{4U,0U,16U}},
{ROXL_E5F0,{5U,0U,16U}},
{ROXL_E5F0,{6U,0U,16U}},
{ROXL_E5F0,{7U,0U,16U}},
{ROXL_E5F8,{0U,0U,14U}},
{ROXL_E5F9,{0U,0U,18U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASR_E000,{0U,3U,6U}},
{ASR_E000,{1U,3U,6U}},
{ASR_E000,{2U,3U,6U}},
{ASR_E000,{3U,3U,6U}},
{ASR_E000,{4U,3U,6U}},
{ASR_E000,{5U,3U,6U}},
{ASR_E000,{6U,3U,6U}},
{ASR_E000,{7U,3U,6U}},
{LSR_E008,{0U,3U,6U}},
{LSR_E008,{1U,3U,6U}},
{LSR_E008,{2U,3U,6U}},
{LSR_E008,{3U,3U,6U}},
{LSR_E008,{4U,3U,6U}},
{LSR_E008,{5U,3U,6U}},
{LSR_E008,{6U,3U,6U}},
{LSR_E008,{7U,3U,6U}},
{ROXR_E010,{0U,3U,6U}},
{ROXR_E010,{1U,3U,6U}},
{ROXR_E010,{2U,3U,6U}},
{ROXR_E010,{3U,3U,6U}},
{ROXR_E010,{4U,3U,6U}},
{ROXR_E010,{5U,3U,6U}},
{ROXR_E010,{6U,3U,6U}},
{ROXR_E010,{7U,3U,6U}},
{ROR_E018,{0U,3U,6U}},
{ROR_E018,{1U,3U,6U}},
{ROR_E018,{2U,3U,6U}},
{ROR_E018,{3U,3U,6U}},
{ROR_E018,{4U,3U,6U}},
{ROR_E018,{5U,3U,6U}},
{ROR_E018,{6U,3U,6U}},
{ROR_E018,{7U,3U,6U}},
{ASR_E020,{0U,3U,6U}},
{ASR_E020,{1U,3U,6U}},
{ASR_E020,{2U,3U,6U}},
{ASR_E020,{3U,3U,6U}},
{ASR_E020,{4U,3U,6U}},
{ASR_E020,{5U,3U,6U}},
{ASR_E020,{6U,3U,6U}},
{ASR_E020,{7U,3U,6U}},
{LSR_E028,{0U,3U,6U}},
{LSR_E028,{1U,3U,6U}},
{LSR_E028,{2U,3U,6U}},
{LSR_E028,{3U,3U,6U}},
{LSR_E028,{4U,3U,6U}},
{LSR_E028,{5U,3U,6U}},
{LSR_E028,{6U,3U,6U}},
{LSR_E028,{7U,3U,6U}},
{ROXR_E030,{0U,3U,6U}},
{ROXR_E030,{1U,3U,6U}},
{ROXR_E030,{2U,3U,6U}},
{ROXR_E030,{3U,3U,6U}},
{ROXR_E030,{4U,3U,6U}},
{ROXR_E030,{5U,3U,6U}},
{ROXR_E030,{6U,3U,6U}},
{ROXR_E030,{7U,3U,6U}},
{ROR_E038,{0U,3U,6U}},
{ROR_E038,{1U,3U,6U}},
{ROR_E038,{2U,3U,6U}},
{ROR_E038,{3U,3U,6U}},
{ROR_E038,{4U,3U,6U}},
{ROR_E038,{5U,3U,6U}},
{ROR_E038,{6U,3U,6U}},
{ROR_E038,{7U,3U,6U}},
{ASR_E040,{0U,3U,6U}},
{ASR_E040,{1U,3U,6U}},
{ASR_E040,{2U,3U,6U}},
{ASR_E040,{3U,3U,6U}},
{ASR_E040,{4U,3U,6U}},
{ASR_E040,{5U,3U,6U}},
{ASR_E040,{6U,3U,6U}},
{ASR_E040,{7U,3U,6U}},
{LSR_E048,{0U,3U,6U}},
{LSR_E048,{1U,3U,6U}},
{LSR_E048,{2U,3U,6U}},
{LSR_E048,{3U,3U,6U}},
{LSR_E048,{4U,3U,6U}},
{LSR_E048,{5U,3U,6U}},
{LSR_E048,{6U,3U,6U}},
{LSR_E048,{7U,3U,6U}},
{ROXR_E050,{0U,3U,6U}},
{ROXR_E050,{1U,3U,6U}},
{ROXR_E050,{2U,3U,6U}},
{ROXR_E050,{3U,3U,6U}},
{ROXR_E050,{4U,3U,6U}},
{ROXR_E050,{5U,3U,6U}},
{ROXR_E050,{6U,3U,6U}},
{ROXR_E050,{7U,3U,6U}},
{ROR_E058,{0U,3U,6U}},
{ROR_E058,{1U,3U,6U}},
{ROR_E058,{2U,3U,6U}},
{ROR_E058,{3U,3U,6U}},
{ROR_E058,{4U,3U,6U}},
{ROR_E058,{5U,3U,6U}},
{ROR_E058,{6U,3U,6U}},
{ROR_E058,{7U,3U,6U}},
{ASR_E060,{0U,3U,6U}},
{ASR_E060,{1U,3U,6U}},
{ASR_E060,{2U,3U,6U}},
{ASR_E060,{3U,3U,6U}},
{ASR_E060,{4U,3U,6U}},
{ASR_E060,{5U,3U,6U}},
{ASR_E060,{6U,3U,6U}},
{ASR_E060,{7U,3U,6U}},
{LSR_E068,{0U,3U,6U}},
{LSR_E068,{1U,3U,6U}},
{LSR_E068,{2U,3U,6U}},
{LSR_E068,{3U,3U,6U}},
{LSR_E068,{4U,3U,6U}},
{LSR_E068,{5U,3U,6U}},
{LSR_E068,{6U,3U,6U}},
{LSR_E068,{7U,3U,6U}},
{ROXR_E070,{0U,3U,6U}},
{ROXR_E070,{1U,3U,6U}},
{ROXR_E070,{2U,3U,6U}},
{ROXR_E070,{3U,3U,6U}},
{ROXR_E070,{4U,3U,6U}},
{ROXR_E070,{5U,3U,6U}},
{ROXR_E070,{6U,3U,6U}},
{ROXR_E070,{7U,3U,6U}},
{ROR_E078,{0U,3U,6U}},
{ROR_E078,{1U,3U,6U}},
{ROR_E078,{2U,3U,6U}},
{ROR_E078,{3U,3U,6U}},
{ROR_E078,{4U,3U,6U}},
{ROR_E078,{5U,3U,6U}},
{ROR_E078,{6U,3U,6U}},
{ROR_E078,{7U,3U,6U}},
{ASR_E080,{0U,3U,8U}},
{ASR_E080,{1U,3U,8U}},
{ASR_E080,{2U,3U,8U}},
{ASR_E080,{3U,3U,8U}},
{ASR_E080,{4U,3U,8U}},
{ASR_E080,{5U,3U,8U}},
{ASR_E080,{6U,3U,8U}},
{ASR_E080,{7U,3U,8U}},
{LSR_E088,{0U,3U,8U}},
{LSR_E088,{1U,3U,8U}},
{LSR_E088,{2U,3U,8U}},
{LSR_E088,{3U,3U,8U}},
{LSR_E088,{4U,3U,8U}},
{LSR_E088,{5U,3U,8U}},
{LSR_E088,{6U,3U,8U}},
{LSR_E088,{7U,3U,8U}},
{ROXR_E090,{0U,3U,8U}},
{ROXR_E090,{1U,3U,8U}},
{ROXR_E090,{2U,3U,8U}},
{ROXR_E090,{3U,3U,8U}},
{ROXR_E090,{4U,3U,8U}},
{ROXR_E090,{5U,3U,8U}},
{ROXR_E090,{6U,3U,8U}},
{ROXR_E090,{7U,3U,8U}},
{ROR_E098,{0U,3U,8U}},
{ROR_E098,{1U,3U,8U}},
{ROR_E098,{2U,3U,8U}},
{ROR_E098,{3U,3U,8U}},
{ROR_E098,{4U,3U,8U}},
{ROR_E098,{5U,3U,8U}},
{ROR_E098,{6U,3U,8U}},
{ROR_E098,{7U,3U,8U}},
{ASR_E0A0,{0U,3U,8U}},
{ASR_E0A0,{1U,3U,8U}},
{ASR_E0A0,{2U,3U,8U}},
{ASR_E0A0,{3U,3U,8U}},
{ASR_E0A0,{4U,3U,8U}},
{ASR_E0A0,{5U,3U,8U}},
{ASR_E0A0,{6U,3U,8U}},
{ASR_E0A0,{7U,3U,8U}},
{LSR_E0A8,{0U,3U,8U}},
{LSR_E0A8,{1U,3U,8U}},
{LSR_E0A8,{2U,3U,8U}},
{LSR_E0A8,{3U,3U,8U}},
{LSR_E0A8,{4U,3U,8U}},
{LSR_E0A8,{5U,3U,8U}},
{LSR_E0A8,{6U,3U,8U}},
{LSR_E0A8,{7U,3U,8U}},
{ROXR_E0B0,{0U,3U,8U}},
{ROXR_E0B0,{1U,3U,8U}},
{ROXR_E0B0,{2U,3U,8U}},
{ROXR_E0B0,{3U,3U,8U}},
{ROXR_E0B0,{4U,3U,8U}},
{ROXR_E0B0,{5U,3U,8U}},
{ROXR_E0B0,{6U,3U,8U}},
{ROXR_E0B0,{7U,3U,8U}},
{ROR_E0B8,{0U,3U,8U}},
{ROR_E0B8,{1U,3U,8U}},
{ROR_E0B8,{2U,3U,8U}},
{ROR_E0B8,{3U,3U,8U}},
{ROR_E0B8,{4U,3U,8U}},
{ROR_E0B8,{5U,3U,8U}},
{ROR_E0B8,{6U,3U,8U}},
{ROR_E0B8,{7U,3U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ROR_E6D0,{0U,0U,10U}},
{ROR_E6D0,{1U,0U,10U}},
{ROR_E6D0,{2U,0U,10U}},
{ROR_E6D0,{3U,0U,10U}},
{ROR_E6D0,{4U,0U,10U}},
{ROR_E6D0,{5U,0U,10U}},
{ROR_E6D0,{6U,0U,10U}},
{ROR_E6D0,{7U,0U,10U}},
{ROR_E6D8,{0U,0U,10U}},
{ROR_E6D8,{1U,0U,10U}},
{ROR_E6D8,{2U,0U,10U}},
{ROR_E6D8,{3U,0U,10U}},
{ROR_E6D8,{4U,0U,10U}},
{ROR_E6D8,{5U,0U,10U}},
{ROR_E6D8,{6U,0U,10U}},
{ROR_E6D8,{7U,0U,10U}},
{ROR_E6E0,{0U,0U,12U}},
{ROR_E6E0,{1U,0U,12U}},
{ROR_E6E0,{2U,0U,12U}},
{ROR_E6E0,{3U,0U,12U}},
{ROR_E6E0,{4U,0U,12U}},
{ROR_E6E0,{5U,0U,12U}},
{ROR_E6E0,{6U,0U,12U}},
{ROR_E6E0,{7U,0U,12U}},
{ROR_E6E8,{0U,0U,14U}},
{ROR_E6E8,{1U,0U,14U}},
{ROR_E6E8,{2U,0U,14U}},
{ROR_E6E8,{3U,0U,14U}},
{ROR_E6E8,{4U,0U,14U}},
{ROR_E6E8,{5U,0U,14U}},
{ROR_E6E8,{6U,0U,14U}},
{ROR_E6E8,{7U,0U,14U}},
{ROR_E6F0,{0U,0U,16U}},
{ROR_E6F0,{1U,0U,16U}},
{ROR_E6F0,{2U,0U,16U}},
{ROR_E6F0,{3U,0U,16U}},
{ROR_E6F0,{4U,0U,16U}},
{ROR_E6F0,{5U,0U,16U}},
{ROR_E6F0,{6U,0U,16U}},
{ROR_E6F0,{7U,0U,16U}},
{ROR_E6F8,{0U,0U,14U}},
{ROR_E6F9,{0U,0U,18U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASL_E100,{0U,3U,6U}},
{ASL_E100,{1U,3U,6U}},
{ASL_E100,{2U,3U,6U}},
{ASL_E100,{3U,3U,6U}},
{ASL_E100,{4U,3U,6U}},
{ASL_E100,{5U,3U,6U}},
{ASL_E100,{6U,3U,6U}},
{ASL_E100,{7U,3U,6U}},
{LSL_E108,{0U,3U,6U}},
{LSL_E108,{1U,3U,6U}},
{LSL_E108,{2U,3U,6U}},
{LSL_E108,{3U,3U,6U}},
{LSL_E108,{4U,3U,6U}},
{LSL_E108,{5U,3U,6U}},
{LSL_E108,{6U,3U,6U}},
{LSL_E108,{7U,3U,6U}},
{ROXL_E110,{0U,3U,6U}},
{ROXL_E110,{1U,3U,6U}},
{ROXL_E110,{2U,3U,6U}},
{ROXL_E110,{3U,3U,6U}},
{ROXL_E110,{4U,3U,6U}},
{ROXL_E110,{5U,3U,6U}},
{ROXL_E110,{6U,3U,6U}},
{ROXL_E110,{7U,3U,6U}},
{ROL_E118,{0U,3U,6U}},
{ROL_E118,{1U,3U,6U}},
{ROL_E118,{2U,3U,6U}},
{ROL_E118,{3U,3U,6U}},
{ROL_E118,{4U,3U,6U}},
{ROL_E118,{5U,3U,6U}},
{ROL_E118,{6U,3U,6U}},
{ROL_E118,{7U,3U,6U}},
{ASL_E120,{0U,3U,6U}},
{ASL_E120,{1U,3U,6U}},
{ASL_E120,{2U,3U,6U}},
{ASL_E120,{3U,3U,6U}},
{ASL_E120,{4U,3U,6U}},
{ASL_E120,{5U,3U,6U}},
{ASL_E120,{6U,3U,6U}},
{ASL_E120,{7U,3U,6U}},
{LSL_E128,{0U,3U,6U}},
{LSL_E128,{1U,3U,6U}},
{LSL_E128,{2U,3U,6U}},
{LSL_E128,{3U,3U,6U}},
{LSL_E128,{4U,3U,6U}},
{LSL_E128,{5U,3U,6U}},
{LSL_E128,{6U,3U,6U}},
{LSL_E128,{7U,3U,6U}},
{ROXL_E130,{0U,3U,6U}},
{ROXL_E130,{1U,3U,6U}},
{ROXL_E130,{2U,3U,6U}},
{ROXL_E130,{3U,3U,6U}},
{ROXL_E130,{4U,3U,6U}},
{ROXL_E130,{5U,3U,6U}},
{ROXL_E130,{6U,3U,6U}},
{ROXL_E130,{7U,3U,6U}},
{ROL_E138,{0U,3U,6U}},
{ROL_E138,{1U,3U,6U}},
{ROL_E138,{2U,3U,6U}},
{ROL_E138,{3U,3U,6U}},
{ROL_E138,{4U,3U,6U}},
{ROL_E138,{5U,3U,6U}},
{ROL_E138,{6U,3U,6U}},
{ROL_E138,{7U,3U,6U}},
{ASL_E140,{0U,3U,6U}},
{ASL_E140,{1U,3U,6U}},
{ASL_E140,{2U,3U,6U}},
{ASL_E140,{3U,3U,6U}},
{ASL_E140,{4U,3U,6U}},
{ASL_E140,{5U,3U,6U}},
{ASL_E140,{6U,3U,6U}},
{ASL_E140,{7U,3U,6U}},
{LSL_E148,{0U,3U,6U}},
{LSL_E148,{1U,3U,6U}},
{LSL_E148,{2U,3U,6U}},
{LSL_E148,{3U,3U,6U}},
{LSL_E148,{4U,3U,6U}},
{LSL_E148,{5U,3U,6U}},
{LSL_E148,{6U,3U,6U}},
{LSL_E148,{7U,3U,6U}},
{ROXL_E150,{0U,3U,6U}},
{ROXL_E150,{1U,3U,6U}},
{ROXL_E150,{2U,3U,6U}},
{ROXL_E150,{3U,3U,6U}},
{ROXL_E150,{4U,3U,6U}},
{ROXL_E150,{5U,3U,6U}},
{ROXL_E150,{6U,3U,6U}},
{ROXL_E150,{7U,3U,6U}},
{ROL_E158,{0U,3U,6U}},
{ROL_E158,{1U,3U,6U}},
{ROL_E158,{2U,3U,6U}},
{ROL_E158,{3U,3U,6U}},
{ROL_E158,{4U,3U,6U}},
{ROL_E158,{5U,3U,6U}},
{ROL_E158,{6U,3U,6U}},
{ROL_E158,{7U,3U,6U}},
{ASL_E160,{0U,3U,6U}},
{ASL_E160,{1U,3U,6U}},
{ASL_E160,{2U,3U,6U}},
{ASL_E160,{3U,3U,6U}},
{ASL_E160,{4U,3U,6U}},
{ASL_E160,{5U,3U,6U}},
{ASL_E160,{6U,3U,6U}},
{ASL_E160,{7U,3U,6U}},
{LSL_E168,{0U,3U,6U}},
{LSL_E168,{1U,3U,6U}},
{LSL_E168,{2U,3U,6U}},
{LSL_E168,{3U,3U,6U}},
{LSL_E168,{4U,3U,6U}},
{LSL_E168,{5U,3U,6U}},
{LSL_E168,{6U,3U,6U}},
{LSL_E168,{7U,3U,6U}},
{ROXL_E170,{0U,3U,6U}},
{ROXL_E170,{1U,3U,6U}},
{ROXL_E170,{2U,3U,6U}},
{ROXL_E170,{3U,3U,6U}},
{ROXL_E170,{4U,3U,6U}},
{ROXL_E170,{5U,3U,6U}},
{ROXL_E170,{6U,3U,6U}},
{ROXL_E170,{7U,3U,6U}},
{ROL_E178,{0U,3U,6U}},
{ROL_E178,{1U,3U,6U}},
{ROL_E178,{2U,3U,6U}},
{ROL_E178,{3U,3U,6U}},
{ROL_E178,{4U,3U,6U}},
{ROL_E178,{5U,3U,6U}},
{ROL_E178,{6U,3U,6U}},
{ROL_E178,{7U,3U,6U}},
{ASL_E180,{0U,3U,8U}},
{ASL_E180,{1U,3U,8U}},
{ASL_E180,{2U,3U,8U}},
{ASL_E180,{3U,3U,8U}},
{ASL_E180,{4U,3U,8U}},
{ASL_E180,{5U,3U,8U}},
{ASL_E180,{6U,3U,8U}},
{ASL_E180,{7U,3U,8U}},
{LSL_E188,{0U,3U,8U}},
{LSL_E188,{1U,3U,8U}},
{LSL_E188,{2U,3U,8U}},
{LSL_E188,{3U,3U,8U}},
{LSL_E188,{4U,3U,8U}},
{LSL_E188,{5U,3U,8U}},
{LSL_E188,{6U,3U,8U}},
{LSL_E188,{7U,3U,8U}},
{ROXL_E190,{0U,3U,8U}},
{ROXL_E190,{1U,3U,8U}},
{ROXL_E190,{2U,3U,8U}},
{ROXL_E190,{3U,3U,8U}},
{ROXL_E190,{4U,3U,8U}},
{ROXL_E190,{5U,3U,8U}},
{ROXL_E190,{6U,3U,8U}},
{ROXL_E190,{7U,3U,8U}},
{ROL_E198,{0U,3U,8U}},
{ROL_E198,{1U,3U,8U}},
{ROL_E198,{2U,3U,8U}},
{ROL_E198,{3U,3U,8U}},
{ROL_E198,{4U,3U,8U}},
{ROL_E198,{5U,3U,8U}},
{ROL_E198,{6U,3U,8U}},
{ROL_E198,{7U,3U,8U}},
{ASL_E1A0,{0U,3U,8U}},
{ASL_E1A0,{1U,3U,8U}},
{ASL_E1A0,{2U,3U,8U}},
{ASL_E1A0,{3U,3U,8U}},
{ASL_E1A0,{4U,3U,8U}},
{ASL_E1A0,{5U,3U,8U}},
{ASL_E1A0,{6U,3U,8U}},
{ASL_E1A0,{7U,3U,8U}},
{LSL_E1A8,{0U,3U,8U}},
{LSL_E1A8,{1U,3U,8U}},
{LSL_E1A8,{2U,3U,8U}},
{LSL_E1A8,{3U,3U,8U}},
{LSL_E1A8,{4U,3U,8U}},
{LSL_E1A8,{5U,3U,8U}},
{LSL_E1A8,{6U,3U,8U}},
{LSL_E1A8,{7U,3U,8U}},
{ROXL_E1B0,{0U,3U,8U}},
{ROXL_E1B0,{1U,3U,8U}},
{ROXL_E1B0,{2U,3U,8U}},
{ROXL_E1B0,{3U,3U,8U}},
{ROXL_E1B0,{4U,3U,8U}},
{ROXL_E1B0,{5U,3U,8U}},
{ROXL_E1B0,{6U,3U,8U}},
{ROXL_E1B0,{7U,3U,8U}},
{ROL_E1B8,{0U,3U,8U}},
{ROL_E1B8,{1U,3U,8U}},
{ROL_E1B8,{2U,3U,8U}},
{ROL_E1B8,{3U,3U,8U}},
{ROL_E1B8,{4U,3U,8U}},
{ROL_E1B8,{5U,3U,8U}},
{ROL_E1B8,{6U,3U,8U}},
{ROL_E1B8,{7U,3U,8U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ROL_E7D0,{0U,0U,10U}},
{ROL_E7D0,{1U,0U,10U}},
{ROL_E7D0,{2U,0U,10U}},
{ROL_E7D0,{3U,0U,10U}},
{ROL_E7D0,{4U,0U,10U}},
{ROL_E7D0,{5U,0U,10U}},
{ROL_E7D0,{6U,0U,10U}},
{ROL_E7D0,{7U,0U,10U}},
{ROL_E7D8,{0U,0U,10U}},
{ROL_E7D8,{1U,0U,10U}},
{ROL_E7D8,{2U,0U,10U}},
{ROL_E7D8,{3U,0U,10U}},
{ROL_E7D8,{4U,0U,10U}},
{ROL_E7D8,{5U,0U,10U}},
{ROL_E7D8,{6U,0U,10U}},
{ROL_E7D8,{7U,0U,10U}},
{ROL_E7E0,{0U,0U,12U}},
{ROL_E7E0,{1U,0U,12U}},
{ROL_E7E0,{2U,0U,12U}},
{ROL_E7E0,{3U,0U,12U}},
{ROL_E7E0,{4U,0U,12U}},
{ROL_E7E0,{5U,0U,12U}},
{ROL_E7E0,{6U,0U,12U}},
{ROL_E7E0,{7U,0U,12U}},
{ROL_E7E8,{0U,0U,14U}},
{ROL_E7E8,{1U,0U,14U}},
{ROL_E7E8,{2U,0U,14U}},
{ROL_E7E8,{3U,0U,14U}},
{ROL_E7E8,{4U,0U,14U}},
{ROL_E7E8,{5U,0U,14U}},
{ROL_E7E8,{6U,0U,14U}},
{ROL_E7E8,{7U,0U,14U}},
{ROL_E7F0,{0U,0U,16U}},
{ROL_E7F0,{1U,0U,16U}},
{ROL_E7F0,{2U,0U,16U}},
{ROL_E7F0,{3U,0U,16U}},
{ROL_E7F0,{4U,0U,16U}},
{ROL_E7F0,{5U,0U,16U}},
{ROL_E7F0,{6U,0U,16U}},
{ROL_E7F0,{7U,0U,16U}},
{ROL_E7F8,{0U,0U,14U}},
{ROL_E7F9,{0U,0U,18U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASR_E000,{0U,4U,6U}},
{ASR_E000,{1U,4U,6U}},
{ASR_E000,{2U,4U,6U}},
{ASR_E000,{3U,4U,6U}},
{ASR_E000,{4U,4U,6U}},
{ASR_E000,{5U,4U,6U}},
{ASR_E000,{6U,4U,6U}},
{ASR_E000,{7U,4U,6U}},
{LSR_E008,{0U,4U,6U}},
{LSR_E008,{1U,4U,6U}},
{LSR_E008,{2U,4U,6U}},
{LSR_E008,{3U,4U,6U}},
{LSR_E008,{4U,4U,6U}},
{LSR_E008,{5U,4U,6U}},
{LSR_E008,{6U,4U,6U}},
{LSR_E008,{7U,4U,6U}},
{ROXR_E010,{0U,4U,6U}},
{ROXR_E010,{1U,4U,6U}},
{ROXR_E010,{2U,4U,6U}},
{ROXR_E010,{3U,4U,6U}},
{ROXR_E010,{4U,4U,6U}},
{ROXR_E010,{5U,4U,6U}},
{ROXR_E010,{6U,4U,6U}},
{ROXR_E010,{7U,4U,6U}},
{ROR_E018,{0U,4U,6U}},
{ROR_E018,{1U,4U,6U}},
{ROR_E018,{2U,4U,6U}},
{ROR_E018,{3U,4U,6U}},
{ROR_E018,{4U,4U,6U}},
{ROR_E018,{5U,4U,6U}},
{ROR_E018,{6U,4U,6U}},
{ROR_E018,{7U,4U,6U}},
{ASR_E020,{0U,4U,6U}},
{ASR_E020,{1U,4U,6U}},
{ASR_E020,{2U,4U,6U}},
{ASR_E020,{3U,4U,6U}},
{ASR_E020,{4U,4U,6U}},
{ASR_E020,{5U,4U,6U}},
{ASR_E020,{6U,4U,6U}},
{ASR_E020,{7U,4U,6U}},
{LSR_E028,{0U,4U,6U}},
{LSR_E028,{1U,4U,6U}},
{LSR_E028,{2U,4U,6U}},
{LSR_E028,{3U,4U,6U}},
{LSR_E028,{4U,4U,6U}},
{LSR_E028,{5U,4U,6U}},
{LSR_E028,{6U,4U,6U}},
{LSR_E028,{7U,4U,6U}},
{ROXR_E030,{0U,4U,6U}},
{ROXR_E030,{1U,4U,6U}},
{ROXR_E030,{2U,4U,6U}},
{ROXR_E030,{3U,4U,6U}},
{ROXR_E030,{4U,4U,6U}},
{ROXR_E030,{5U,4U,6U}},
{ROXR_E030,{6U,4U,6U}},
{ROXR_E030,{7U,4U,6U}},
{ROR_E038,{0U,4U,6U}},
{ROR_E038,{1U,4U,6U}},
{ROR_E038,{2U,4U,6U}},
{ROR_E038,{3U,4U,6U}},
{ROR_E038,{4U,4U,6U}},
{ROR_E038,{5U,4U,6U}},
{ROR_E038,{6U,4U,6U}},
{ROR_E038,{7U,4U,6U}},
{ASR_E040,{0U,4U,6U}},
{ASR_E040,{1U,4U,6U}},
{ASR_E040,{2U,4U,6U}},
{ASR_E040,{3U,4U,6U}},
{ASR_E040,{4U,4U,6U}},
{ASR_E040,{5U,4U,6U}},
{ASR_E040,{6U,4U,6U}},
{ASR_E040,{7U,4U,6U}},
{LSR_E048,{0U,4U,6U}},
{LSR_E048,{1U,4U,6U}},
{LSR_E048,{2U,4U,6U}},
{LSR_E048,{3U,4U,6U}},
{LSR_E048,{4U,4U,6U}},
{LSR_E048,{5U,4U,6U}},
{LSR_E048,{6U,4U,6U}},
{LSR_E048,{7U,4U,6U}},
{ROXR_E050,{0U,4U,6U}},
{ROXR_E050,{1U,4U,6U}},
{ROXR_E050,{2U,4U,6U}},
{ROXR_E050,{3U,4U,6U}},
{ROXR_E050,{4U,4U,6U}},
{ROXR_E050,{5U,4U,6U}},
{ROXR_E050,{6U,4U,6U}},
{ROXR_E050,{7U,4U,6U}},
{ROR_E058,{0U,4U,6U}},
{ROR_E058,{1U,4U,6U}},
{ROR_E058,{2U,4U,6U}},
{ROR_E058,{3U,4U,6U}},
{ROR_E058,{4U,4U,6U}},
{ROR_E058,{5U,4U,6U}},
{ROR_E058,{6U,4U,6U}},
{ROR_E058,{7U,4U,6U}},
{ASR_E060,{0U,4U,6U}},
{ASR_E060,{1U,4U,6U}},
{ASR_E060,{2U,4U,6U}},
{ASR_E060,{3U,4U,6U}},
{ASR_E060,{4U,4U,6U}},
{ASR_E060,{5U,4U,6U}},
{ASR_E060,{6U,4U,6U}},
{ASR_E060,{7U,4U,6U}},
{LSR_E068,{0U,4U,6U}},
{LSR_E068,{1U,4U,6U}},
{LSR_E068,{2U,4U,6U}},
{LSR_E068,{3U,4U,6U}},
{LSR_E068,{4U,4U,6U}},
{LSR_E068,{5U,4U,6U}},
{LSR_E068,{6U,4U,6U}},
{LSR_E068,{7U,4U,6U}},
{ROXR_E070,{0U,4U,6U}},
{ROXR_E070,{1U,4U,6U}},
{ROXR_E070,{2U,4U,6U}},
{ROXR_E070,{3U,4U,6U}},
{ROXR_E070,{4U,4U,6U}},
{ROXR_E070,{5U,4U,6U}},
{ROXR_E070,{6U,4U,6U}},
{ROXR_E070,{7U,4U,6U}},
{ROR_E078,{0U,4U,6U}},
{ROR_E078,{1U,4U,6U}},
{ROR_E078,{2U,4U,6U}},
{ROR_E078,{3U,4U,6U}},
{ROR_E078,{4U,4U,6U}},
{ROR_E078,{5U,4U,6U}},
{ROR_E078,{6U,4U,6U}},
{ROR_E078,{7U,4U,6U}},
{ASR_E080,{0U,4U,8U}},
{ASR_E080,{1U,4U,8U}},
{ASR_E080,{2U,4U,8U}},
{ASR_E080,{3U,4U,8U}},
{ASR_E080,{4U,4U,8U}},
{ASR_E080,{5U,4U,8U}},
{ASR_E080,{6U,4U,8U}},
{ASR_E080,{7U,4U,8U}},
{LSR_E088,{0U,4U,8U}},
{LSR_E088,{1U,4U,8U}},
{LSR_E088,{2U,4U,8U}},
{LSR_E088,{3U,4U,8U}},
{LSR_E088,{4U,4U,8U}},
{LSR_E088,{5U,4U,8U}},
{LSR_E088,{6U,4U,8U}},
{LSR_E088,{7U,4U,8U}},
{ROXR_E090,{0U,4U,8U}},
{ROXR_E090,{1U,4U,8U}},
{ROXR_E090,{2U,4U,8U}},
{ROXR_E090,{3U,4U,8U}},
{ROXR_E090,{4U,4U,8U}},
{ROXR_E090,{5U,4U,8U}},
{ROXR_E090,{6U,4U,8U}},
{ROXR_E090,{7U,4U,8U}},
{ROR_E098,{0U,4U,8U}},
{ROR_E098,{1U,4U,8U}},
{ROR_E098,{2U,4U,8U}},
{ROR_E098,{3U,4U,8U}},
{ROR_E098,{4U,4U,8U}},
{ROR_E098,{5U,4U,8U}},
{ROR_E098,{6U,4U,8U}},
{ROR_E098,{7U,4U,8U}},
{ASR_E0A0,{0U,4U,8U}},
{ASR_E0A0,{1U,4U,8U}},
{ASR_E0A0,{2U,4U,8U}},
{ASR_E0A0,{3U,4U,8U}},
{ASR_E0A0,{4U,4U,8U}},
{ASR_E0A0,{5U,4U,8U}},
{ASR_E0A0,{6U,4U,8U}},
{ASR_E0A0,{7U,4U,8U}},
{LSR_E0A8,{0U,4U,8U}},
{LSR_E0A8,{1U,4U,8U}},
{LSR_E0A8,{2U,4U,8U}},
{LSR_E0A8,{3U,4U,8U}},
{LSR_E0A8,{4U,4U,8U}},
{LSR_E0A8,{5U,4U,8U}},
{LSR_E0A8,{6U,4U,8U}},
{LSR_E0A8,{7U,4U,8U}},
{ROXR_E0B0,{0U,4U,8U}},
{ROXR_E0B0,{1U,4U,8U}},
{ROXR_E0B0,{2U,4U,8U}},
{ROXR_E0B0,{3U,4U,8U}},
{ROXR_E0B0,{4U,4U,8U}},
{ROXR_E0B0,{5U,4U,8U}},
{ROXR_E0B0,{6U,4U,8U}},
{ROXR_E0B0,{7U,4U,8U}},
{ROR_E0B8,{0U,4U,8U}},
{ROR_E0B8,{1U,4U,8U}},
{ROR_E0B8,{2U,4U,8U}},
{ROR_E0B8,{3U,4U,8U}},
{ROR_E0B8,{4U,4U,8U}},
{ROR_E0B8,{5U,4U,8U}},
{ROR_E0B8,{6U,4U,8U}},
{ROR_E0B8,{7U,4U,8U}},
{BFTST_E8C0,{0U,0U,0U}},
{BFTST_E8C0,{1U,0U,0U}},
{BFTST_E8C0,{2U,0U,0U}},
{BFTST_E8C0,{3U,0U,0U}},
{BFTST_E8C0,{4U,0U,0U}},
{BFTST_E8C0,{5U,0U,0U}},
{BFTST_E8C0,{6U,0U,0U}},
{BFTST_E8C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFTST_E8D0,{0U,0U,0U}},
{BFTST_E8D0,{1U,0U,0U}},
{BFTST_E8D0,{2U,0U,0U}},
{BFTST_E8D0,{3U,0U,0U}},
{BFTST_E8D0,{4U,0U,0U}},
{BFTST_E8D0,{5U,0U,0U}},
{BFTST_E8D0,{6U,0U,0U}},
{BFTST_E8D0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFTST_E8E8,{0U,0U,0U}},
{BFTST_E8E8,{1U,0U,0U}},
{BFTST_E8E8,{2U,0U,0U}},
{BFTST_E8E8,{3U,0U,0U}},
{BFTST_E8E8,{4U,0U,0U}},
{BFTST_E8E8,{5U,0U,0U}},
{BFTST_E8E8,{6U,0U,0U}},
{BFTST_E8E8,{7U,0U,0U}},
{BFTST_E8F0,{0U,0U,0U}},
{BFTST_E8F0,{1U,0U,0U}},
{BFTST_E8F0,{2U,0U,0U}},
{BFTST_E8F0,{3U,0U,0U}},
{BFTST_E8F0,{4U,0U,0U}},
{BFTST_E8F0,{5U,0U,0U}},
{BFTST_E8F0,{6U,0U,0U}},
{BFTST_E8F0,{7U,0U,0U}},
{BFTST_E8F8,{0U,0U,0U}},
{BFTST_E8F9,{0U,0U,0U}},
{BFTST_E8FA,{0U,0U,0U}},
{BFTST_E8FB,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASL_E100,{0U,4U,6U}},
{ASL_E100,{1U,4U,6U}},
{ASL_E100,{2U,4U,6U}},
{ASL_E100,{3U,4U,6U}},
{ASL_E100,{4U,4U,6U}},
{ASL_E100,{5U,4U,6U}},
{ASL_E100,{6U,4U,6U}},
{ASL_E100,{7U,4U,6U}},
{LSL_E108,{0U,4U,6U}},
{LSL_E108,{1U,4U,6U}},
{LSL_E108,{2U,4U,6U}},
{LSL_E108,{3U,4U,6U}},
{LSL_E108,{4U,4U,6U}},
{LSL_E108,{5U,4U,6U}},
{LSL_E108,{6U,4U,6U}},
{LSL_E108,{7U,4U,6U}},
{ROXL_E110,{0U,4U,6U}},
{ROXL_E110,{1U,4U,6U}},
{ROXL_E110,{2U,4U,6U}},
{ROXL_E110,{3U,4U,6U}},
{ROXL_E110,{4U,4U,6U}},
{ROXL_E110,{5U,4U,6U}},
{ROXL_E110,{6U,4U,6U}},
{ROXL_E110,{7U,4U,6U}},
{ROL_E118,{0U,4U,6U}},
{ROL_E118,{1U,4U,6U}},
{ROL_E118,{2U,4U,6U}},
{ROL_E118,{3U,4U,6U}},
{ROL_E118,{4U,4U,6U}},
{ROL_E118,{5U,4U,6U}},
{ROL_E118,{6U,4U,6U}},
{ROL_E118,{7U,4U,6U}},
{ASL_E120,{0U,4U,6U}},
{ASL_E120,{1U,4U,6U}},
{ASL_E120,{2U,4U,6U}},
{ASL_E120,{3U,4U,6U}},
{ASL_E120,{4U,4U,6U}},
{ASL_E120,{5U,4U,6U}},
{ASL_E120,{6U,4U,6U}},
{ASL_E120,{7U,4U,6U}},
{LSL_E128,{0U,4U,6U}},
{LSL_E128,{1U,4U,6U}},
{LSL_E128,{2U,4U,6U}},
{LSL_E128,{3U,4U,6U}},
{LSL_E128,{4U,4U,6U}},
{LSL_E128,{5U,4U,6U}},
{LSL_E128,{6U,4U,6U}},
{LSL_E128,{7U,4U,6U}},
{ROXL_E130,{0U,4U,6U}},
{ROXL_E130,{1U,4U,6U}},
{ROXL_E130,{2U,4U,6U}},
{ROXL_E130,{3U,4U,6U}},
{ROXL_E130,{4U,4U,6U}},
{ROXL_E130,{5U,4U,6U}},
{ROXL_E130,{6U,4U,6U}},
{ROXL_E130,{7U,4U,6U}},
{ROL_E138,{0U,4U,6U}},
{ROL_E138,{1U,4U,6U}},
{ROL_E138,{2U,4U,6U}},
{ROL_E138,{3U,4U,6U}},
{ROL_E138,{4U,4U,6U}},
{ROL_E138,{5U,4U,6U}},
{ROL_E138,{6U,4U,6U}},
{ROL_E138,{7U,4U,6U}},
{ASL_E140,{0U,4U,6U}},
{ASL_E140,{1U,4U,6U}},
{ASL_E140,{2U,4U,6U}},
{ASL_E140,{3U,4U,6U}},
{ASL_E140,{4U,4U,6U}},
{ASL_E140,{5U,4U,6U}},
{ASL_E140,{6U,4U,6U}},
{ASL_E140,{7U,4U,6U}},
{LSL_E148,{0U,4U,6U}},
{LSL_E148,{1U,4U,6U}},
{LSL_E148,{2U,4U,6U}},
{LSL_E148,{3U,4U,6U}},
{LSL_E148,{4U,4U,6U}},
{LSL_E148,{5U,4U,6U}},
{LSL_E148,{6U,4U,6U}},
{LSL_E148,{7U,4U,6U}},
{ROXL_E150,{0U,4U,6U}},
{ROXL_E150,{1U,4U,6U}},
{ROXL_E150,{2U,4U,6U}},
{ROXL_E150,{3U,4U,6U}},
{ROXL_E150,{4U,4U,6U}},
{ROXL_E150,{5U,4U,6U}},
{ROXL_E150,{6U,4U,6U}},
{ROXL_E150,{7U,4U,6U}},
{ROL_E158,{0U,4U,6U}},
{ROL_E158,{1U,4U,6U}},
{ROL_E158,{2U,4U,6U}},
{ROL_E158,{3U,4U,6U}},
{ROL_E158,{4U,4U,6U}},
{ROL_E158,{5U,4U,6U}},
{ROL_E158,{6U,4U,6U}},
{ROL_E158,{7U,4U,6U}},
{ASL_E160,{0U,4U,6U}},
{ASL_E160,{1U,4U,6U}},
{ASL_E160,{2U,4U,6U}},
{ASL_E160,{3U,4U,6U}},
{ASL_E160,{4U,4U,6U}},
{ASL_E160,{5U,4U,6U}},
{ASL_E160,{6U,4U,6U}},
{ASL_E160,{7U,4U,6U}},
{LSL_E168,{0U,4U,6U}},
{LSL_E168,{1U,4U,6U}},
{LSL_E168,{2U,4U,6U}},
{LSL_E168,{3U,4U,6U}},
{LSL_E168,{4U,4U,6U}},
{LSL_E168,{5U,4U,6U}},
{LSL_E168,{6U,4U,6U}},
{LSL_E168,{7U,4U,6U}},
{ROXL_E170,{0U,4U,6U}},
{ROXL_E170,{1U,4U,6U}},
{ROXL_E170,{2U,4U,6U}},
{ROXL_E170,{3U,4U,6U}},
{ROXL_E170,{4U,4U,6U}},
{ROXL_E170,{5U,4U,6U}},
{ROXL_E170,{6U,4U,6U}},
{ROXL_E170,{7U,4U,6U}},
{ROL_E178,{0U,4U,6U}},
{ROL_E178,{1U,4U,6U}},
{ROL_E178,{2U,4U,6U}},
{ROL_E178,{3U,4U,6U}},
{ROL_E178,{4U,4U,6U}},
{ROL_E178,{5U,4U,6U}},
{ROL_E178,{6U,4U,6U}},
{ROL_E178,{7U,4U,6U}},
{ASL_E180,{0U,4U,8U}},
{ASL_E180,{1U,4U,8U}},
{ASL_E180,{2U,4U,8U}},
{ASL_E180,{3U,4U,8U}},
{ASL_E180,{4U,4U,8U}},
{ASL_E180,{5U,4U,8U}},
{ASL_E180,{6U,4U,8U}},
{ASL_E180,{7U,4U,8U}},
{LSL_E188,{0U,4U,8U}},
{LSL_E188,{1U,4U,8U}},
{LSL_E188,{2U,4U,8U}},
{LSL_E188,{3U,4U,8U}},
{LSL_E188,{4U,4U,8U}},
{LSL_E188,{5U,4U,8U}},
{LSL_E188,{6U,4U,8U}},
{LSL_E188,{7U,4U,8U}},
{ROXL_E190,{0U,4U,8U}},
{ROXL_E190,{1U,4U,8U}},
{ROXL_E190,{2U,4U,8U}},
{ROXL_E190,{3U,4U,8U}},
{ROXL_E190,{4U,4U,8U}},
{ROXL_E190,{5U,4U,8U}},
{ROXL_E190,{6U,4U,8U}},
{ROXL_E190,{7U,4U,8U}},
{ROL_E198,{0U,4U,8U}},
{ROL_E198,{1U,4U,8U}},
{ROL_E198,{2U,4U,8U}},
{ROL_E198,{3U,4U,8U}},
{ROL_E198,{4U,4U,8U}},
{ROL_E198,{5U,4U,8U}},
{ROL_E198,{6U,4U,8U}},
{ROL_E198,{7U,4U,8U}},
{ASL_E1A0,{0U,4U,8U}},
{ASL_E1A0,{1U,4U,8U}},
{ASL_E1A0,{2U,4U,8U}},
{ASL_E1A0,{3U,4U,8U}},
{ASL_E1A0,{4U,4U,8U}},
{ASL_E1A0,{5U,4U,8U}},
{ASL_E1A0,{6U,4U,8U}},
{ASL_E1A0,{7U,4U,8U}},
{LSL_E1A8,{0U,4U,8U}},
{LSL_E1A8,{1U,4U,8U}},
{LSL_E1A8,{2U,4U,8U}},
{LSL_E1A8,{3U,4U,8U}},
{LSL_E1A8,{4U,4U,8U}},
{LSL_E1A8,{5U,4U,8U}},
{LSL_E1A8,{6U,4U,8U}},
{LSL_E1A8,{7U,4U,8U}},
{ROXL_E1B0,{0U,4U,8U}},
{ROXL_E1B0,{1U,4U,8U}},
{ROXL_E1B0,{2U,4U,8U}},
{ROXL_E1B0,{3U,4U,8U}},
{ROXL_E1B0,{4U,4U,8U}},
{ROXL_E1B0,{5U,4U,8U}},
{ROXL_E1B0,{6U,4U,8U}},
{ROXL_E1B0,{7U,4U,8U}},
{ROL_E1B8,{0U,4U,8U}},
{ROL_E1B8,{1U,4U,8U}},
{ROL_E1B8,{2U,4U,8U}},
{ROL_E1B8,{3U,4U,8U}},
{ROL_E1B8,{4U,4U,8U}},
{ROL_E1B8,{5U,4U,8U}},
{ROL_E1B8,{6U,4U,8U}},
{ROL_E1B8,{7U,4U,8U}},
{BFEXTU_E9C0,{0U,0U,0U}},
{BFEXTU_E9C0,{1U,0U,0U}},
{BFEXTU_E9C0,{2U,0U,0U}},
{BFEXTU_E9C0,{3U,0U,0U}},
{BFEXTU_E9C0,{4U,0U,0U}},
{BFEXTU_E9C0,{5U,0U,0U}},
{BFEXTU_E9C0,{6U,0U,0U}},
{BFEXTU_E9C0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFEXTU_E9D0,{0U,0U,0U}},
{BFEXTU_E9D0,{1U,0U,0U}},
{BFEXTU_E9D0,{2U,0U,0U}},
{BFEXTU_E9D0,{3U,0U,0U}},
{BFEXTU_E9D0,{4U,0U,0U}},
{BFEXTU_E9D0,{5U,0U,0U}},
{BFEXTU_E9D0,{6U,0U,0U}},
{BFEXTU_E9D0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFEXTU_E9E8,{0U,0U,0U}},
{BFEXTU_E9E8,{1U,0U,0U}},
{BFEXTU_E9E8,{2U,0U,0U}},
{BFEXTU_E9E8,{3U,0U,0U}},
{BFEXTU_E9E8,{4U,0U,0U}},
{BFEXTU_E9E8,{5U,0U,0U}},
{BFEXTU_E9E8,{6U,0U,0U}},
{BFEXTU_E9E8,{7U,0U,0U}},
{BFEXTU_E9F0,{0U,0U,0U}},
{BFEXTU_E9F0,{1U,0U,0U}},
{BFEXTU_E9F0,{2U,0U,0U}},
{BFEXTU_E9F0,{3U,0U,0U}},
{BFEXTU_E9F0,{4U,0U,0U}},
{BFEXTU_E9F0,{5U,0U,0U}},
{BFEXTU_E9F0,{6U,0U,0U}},
{BFEXTU_E9F0,{7U,0U,0U}},
{BFEXTU_E9F8,{0U,0U,0U}},
{BFEXTU_E9F9,{0U,0U,0U}},
{BFEXTU_E9FA,{0U,0U,0U}},
{BFEXTU_E9FB,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASR_E000,{0U,5U,6U}},
{ASR_E000,{1U,5U,6U}},
{ASR_E000,{2U,5U,6U}},
{ASR_E000,{3U,5U,6U}},
{ASR_E000,{4U,5U,6U}},
{ASR_E000,{5U,5U,6U}},
{ASR_E000,{6U,5U,6U}},
{ASR_E000,{7U,5U,6U}},
{LSR_E008,{0U,5U,6U}},
{LSR_E008,{1U,5U,6U}},
{LSR_E008,{2U,5U,6U}},
{LSR_E008,{3U,5U,6U}},
{LSR_E008,{4U,5U,6U}},
{LSR_E008,{5U,5U,6U}},
{LSR_E008,{6U,5U,6U}},
{LSR_E008,{7U,5U,6U}},
{ROXR_E010,{0U,5U,6U}},
{ROXR_E010,{1U,5U,6U}},
{ROXR_E010,{2U,5U,6U}},
{ROXR_E010,{3U,5U,6U}},
{ROXR_E010,{4U,5U,6U}},
{ROXR_E010,{5U,5U,6U}},
{ROXR_E010,{6U,5U,6U}},
{ROXR_E010,{7U,5U,6U}},
{ROR_E018,{0U,5U,6U}},
{ROR_E018,{1U,5U,6U}},
{ROR_E018,{2U,5U,6U}},
{ROR_E018,{3U,5U,6U}},
{ROR_E018,{4U,5U,6U}},
{ROR_E018,{5U,5U,6U}},
{ROR_E018,{6U,5U,6U}},
{ROR_E018,{7U,5U,6U}},
{ASR_E020,{0U,5U,6U}},
{ASR_E020,{1U,5U,6U}},
{ASR_E020,{2U,5U,6U}},
{ASR_E020,{3U,5U,6U}},
{ASR_E020,{4U,5U,6U}},
{ASR_E020,{5U,5U,6U}},
{ASR_E020,{6U,5U,6U}},
{ASR_E020,{7U,5U,6U}},
{LSR_E028,{0U,5U,6U}},
{LSR_E028,{1U,5U,6U}},
{LSR_E028,{2U,5U,6U}},
{LSR_E028,{3U,5U,6U}},
{LSR_E028,{4U,5U,6U}},
{LSR_E028,{5U,5U,6U}},
{LSR_E028,{6U,5U,6U}},
{LSR_E028,{7U,5U,6U}},
{ROXR_E030,{0U,5U,6U}},
{ROXR_E030,{1U,5U,6U}},
{ROXR_E030,{2U,5U,6U}},
{ROXR_E030,{3U,5U,6U}},
{ROXR_E030,{4U,5U,6U}},
{ROXR_E030,{5U,5U,6U}},
{ROXR_E030,{6U,5U,6U}},
{ROXR_E030,{7U,5U,6U}},
{ROR_E038,{0U,5U,6U}},
{ROR_E038,{1U,5U,6U}},
{ROR_E038,{2U,5U,6U}},
{ROR_E038,{3U,5U,6U}},
{ROR_E038,{4U,5U,6U}},
{ROR_E038,{5U,5U,6U}},
{ROR_E038,{6U,5U,6U}},
{ROR_E038,{7U,5U,6U}},
{ASR_E040,{0U,5U,6U}},
{ASR_E040,{1U,5U,6U}},
{ASR_E040,{2U,5U,6U}},
{ASR_E040,{3U,5U,6U}},
{ASR_E040,{4U,5U,6U}},
{ASR_E040,{5U,5U,6U}},
{ASR_E040,{6U,5U,6U}},
{ASR_E040,{7U,5U,6U}},
{LSR_E048,{0U,5U,6U}},
{LSR_E048,{1U,5U,6U}},
{LSR_E048,{2U,5U,6U}},
{LSR_E048,{3U,5U,6U}},
{LSR_E048,{4U,5U,6U}},
{LSR_E048,{5U,5U,6U}},
{LSR_E048,{6U,5U,6U}},
{LSR_E048,{7U,5U,6U}},
{ROXR_E050,{0U,5U,6U}},
{ROXR_E050,{1U,5U,6U}},
{ROXR_E050,{2U,5U,6U}},
{ROXR_E050,{3U,5U,6U}},
{ROXR_E050,{4U,5U,6U}},
{ROXR_E050,{5U,5U,6U}},
{ROXR_E050,{6U,5U,6U}},
{ROXR_E050,{7U,5U,6U}},
{ROR_E058,{0U,5U,6U}},
{ROR_E058,{1U,5U,6U}},
{ROR_E058,{2U,5U,6U}},
{ROR_E058,{3U,5U,6U}},
{ROR_E058,{4U,5U,6U}},
{ROR_E058,{5U,5U,6U}},
{ROR_E058,{6U,5U,6U}},
{ROR_E058,{7U,5U,6U}},
{ASR_E060,{0U,5U,6U}},
{ASR_E060,{1U,5U,6U}},
{ASR_E060,{2U,5U,6U}},
{ASR_E060,{3U,5U,6U}},
{ASR_E060,{4U,5U,6U}},
{ASR_E060,{5U,5U,6U}},
{ASR_E060,{6U,5U,6U}},
{ASR_E060,{7U,5U,6U}},
{LSR_E068,{0U,5U,6U}},
{LSR_E068,{1U,5U,6U}},
{LSR_E068,{2U,5U,6U}},
{LSR_E068,{3U,5U,6U}},
{LSR_E068,{4U,5U,6U}},
{LSR_E068,{5U,5U,6U}},
{LSR_E068,{6U,5U,6U}},
{LSR_E068,{7U,5U,6U}},
{ROXR_E070,{0U,5U,6U}},
{ROXR_E070,{1U,5U,6U}},
{ROXR_E070,{2U,5U,6U}},
{ROXR_E070,{3U,5U,6U}},
{ROXR_E070,{4U,5U,6U}},
{ROXR_E070,{5U,5U,6U}},
{ROXR_E070,{6U,5U,6U}},
{ROXR_E070,{7U,5U,6U}},
{ROR_E078,{0U,5U,6U}},
{ROR_E078,{1U,5U,6U}},
{ROR_E078,{2U,5U,6U}},
{ROR_E078,{3U,5U,6U}},
{ROR_E078,{4U,5U,6U}},
{ROR_E078,{5U,5U,6U}},
{ROR_E078,{6U,5U,6U}},
{ROR_E078,{7U,5U,6U}},
{ASR_E080,{0U,5U,8U}},
{ASR_E080,{1U,5U,8U}},
{ASR_E080,{2U,5U,8U}},
{ASR_E080,{3U,5U,8U}},
{ASR_E080,{4U,5U,8U}},
{ASR_E080,{5U,5U,8U}},
{ASR_E080,{6U,5U,8U}},
{ASR_E080,{7U,5U,8U}},
{LSR_E088,{0U,5U,8U}},
{LSR_E088,{1U,5U,8U}},
{LSR_E088,{2U,5U,8U}},
{LSR_E088,{3U,5U,8U}},
{LSR_E088,{4U,5U,8U}},
{LSR_E088,{5U,5U,8U}},
{LSR_E088,{6U,5U,8U}},
{LSR_E088,{7U,5U,8U}},
{ROXR_E090,{0U,5U,8U}},
{ROXR_E090,{1U,5U,8U}},
{ROXR_E090,{2U,5U,8U}},
{ROXR_E090,{3U,5U,8U}},
{ROXR_E090,{4U,5U,8U}},
{ROXR_E090,{5U,5U,8U}},
{ROXR_E090,{6U,5U,8U}},
{ROXR_E090,{7U,5U,8U}},
{ROR_E098,{0U,5U,8U}},
{ROR_E098,{1U,5U,8U}},
{ROR_E098,{2U,5U,8U}},
{ROR_E098,{3U,5U,8U}},
{ROR_E098,{4U,5U,8U}},
{ROR_E098,{5U,5U,8U}},
{ROR_E098,{6U,5U,8U}},
{ROR_E098,{7U,5U,8U}},
{ASR_E0A0,{0U,5U,8U}},
{ASR_E0A0,{1U,5U,8U}},
{ASR_E0A0,{2U,5U,8U}},
{ASR_E0A0,{3U,5U,8U}},
{ASR_E0A0,{4U,5U,8U}},
{ASR_E0A0,{5U,5U,8U}},
{ASR_E0A0,{6U,5U,8U}},
{ASR_E0A0,{7U,5U,8U}},
{LSR_E0A8,{0U,5U,8U}},
{LSR_E0A8,{1U,5U,8U}},
{LSR_E0A8,{2U,5U,8U}},
{LSR_E0A8,{3U,5U,8U}},
{LSR_E0A8,{4U,5U,8U}},
{LSR_E0A8,{5U,5U,8U}},
{LSR_E0A8,{6U,5U,8U}},
{LSR_E0A8,{7U,5U,8U}},
{ROXR_E0B0,{0U,5U,8U}},
{ROXR_E0B0,{1U,5U,8U}},
{ROXR_E0B0,{2U,5U,8U}},
{ROXR_E0B0,{3U,5U,8U}},
{ROXR_E0B0,{4U,5U,8U}},
{ROXR_E0B0,{5U,5U,8U}},
{ROXR_E0B0,{6U,5U,8U}},
{ROXR_E0B0,{7U,5U,8U}},
{ROR_E0B8,{0U,5U,8U}},
{ROR_E0B8,{1U,5U,8U}},
{ROR_E0B8,{2U,5U,8U}},
{ROR_E0B8,{3U,5U,8U}},
{ROR_E0B8,{4U,5U,8U}},
{ROR_E0B8,{5U,5U,8U}},
{ROR_E0B8,{6U,5U,8U}},
{ROR_E0B8,{7U,5U,8U}},
{BFCHG_EAC0,{0U,0U,0U}},
{BFCHG_EAC0,{1U,0U,0U}},
{BFCHG_EAC0,{2U,0U,0U}},
{BFCHG_EAC0,{3U,0U,0U}},
{BFCHG_EAC0,{4U,0U,0U}},
{BFCHG_EAC0,{5U,0U,0U}},
{BFCHG_EAC0,{6U,0U,0U}},
{BFCHG_EAC0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFCHG_EAD0,{0U,0U,0U}},
{BFCHG_EAD0,{1U,0U,0U}},
{BFCHG_EAD0,{2U,0U,0U}},
{BFCHG_EAD0,{3U,0U,0U}},
{BFCHG_EAD0,{4U,0U,0U}},
{BFCHG_EAD0,{5U,0U,0U}},
{BFCHG_EAD0,{6U,0U,0U}},
{BFCHG_EAD0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFCHG_EAE8,{0U,0U,0U}},
{BFCHG_EAE8,{1U,0U,0U}},
{BFCHG_EAE8,{2U,0U,0U}},
{BFCHG_EAE8,{3U,0U,0U}},
{BFCHG_EAE8,{4U,0U,0U}},
{BFCHG_EAE8,{5U,0U,0U}},
{BFCHG_EAE8,{6U,0U,0U}},
{BFCHG_EAE8,{7U,0U,0U}},
{BFCHG_EAF0,{0U,0U,0U}},
{BFCHG_EAF0,{1U,0U,0U}},
{BFCHG_EAF0,{2U,0U,0U}},
{BFCHG_EAF0,{3U,0U,0U}},
{BFCHG_EAF0,{4U,0U,0U}},
{BFCHG_EAF0,{5U,0U,0U}},
{BFCHG_EAF0,{6U,0U,0U}},
{BFCHG_EAF0,{7U,0U,0U}},
{BFCHG_EAF8,{0U,0U,0U}},
{BFCHG_EAF9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASL_E100,{0U,5U,6U}},
{ASL_E100,{1U,5U,6U}},
{ASL_E100,{2U,5U,6U}},
{ASL_E100,{3U,5U,6U}},
{ASL_E100,{4U,5U,6U}},
{ASL_E100,{5U,5U,6U}},
{ASL_E100,{6U,5U,6U}},
{ASL_E100,{7U,5U,6U}},
{LSL_E108,{0U,5U,6U}},
{LSL_E108,{1U,5U,6U}},
{LSL_E108,{2U,5U,6U}},
{LSL_E108,{3U,5U,6U}},
{LSL_E108,{4U,5U,6U}},
{LSL_E108,{5U,5U,6U}},
{LSL_E108,{6U,5U,6U}},
{LSL_E108,{7U,5U,6U}},
{ROXL_E110,{0U,5U,6U}},
{ROXL_E110,{1U,5U,6U}},
{ROXL_E110,{2U,5U,6U}},
{ROXL_E110,{3U,5U,6U}},
{ROXL_E110,{4U,5U,6U}},
{ROXL_E110,{5U,5U,6U}},
{ROXL_E110,{6U,5U,6U}},
{ROXL_E110,{7U,5U,6U}},
{ROL_E118,{0U,5U,6U}},
{ROL_E118,{1U,5U,6U}},
{ROL_E118,{2U,5U,6U}},
{ROL_E118,{3U,5U,6U}},
{ROL_E118,{4U,5U,6U}},
{ROL_E118,{5U,5U,6U}},
{ROL_E118,{6U,5U,6U}},
{ROL_E118,{7U,5U,6U}},
{ASL_E120,{0U,5U,6U}},
{ASL_E120,{1U,5U,6U}},
{ASL_E120,{2U,5U,6U}},
{ASL_E120,{3U,5U,6U}},
{ASL_E120,{4U,5U,6U}},
{ASL_E120,{5U,5U,6U}},
{ASL_E120,{6U,5U,6U}},
{ASL_E120,{7U,5U,6U}},
{LSL_E128,{0U,5U,6U}},
{LSL_E128,{1U,5U,6U}},
{LSL_E128,{2U,5U,6U}},
{LSL_E128,{3U,5U,6U}},
{LSL_E128,{4U,5U,6U}},
{LSL_E128,{5U,5U,6U}},
{LSL_E128,{6U,5U,6U}},
{LSL_E128,{7U,5U,6U}},
{ROXL_E130,{0U,5U,6U}},
{ROXL_E130,{1U,5U,6U}},
{ROXL_E130,{2U,5U,6U}},
{ROXL_E130,{3U,5U,6U}},
{ROXL_E130,{4U,5U,6U}},
{ROXL_E130,{5U,5U,6U}},
{ROXL_E130,{6U,5U,6U}},
{ROXL_E130,{7U,5U,6U}},
{ROL_E138,{0U,5U,6U}},
{ROL_E138,{1U,5U,6U}},
{ROL_E138,{2U,5U,6U}},
{ROL_E138,{3U,5U,6U}},
{ROL_E138,{4U,5U,6U}},
{ROL_E138,{5U,5U,6U}},
{ROL_E138,{6U,5U,6U}},
{ROL_E138,{7U,5U,6U}},
{ASL_E140,{0U,5U,6U}},
{ASL_E140,{1U,5U,6U}},
{ASL_E140,{2U,5U,6U}},
{ASL_E140,{3U,5U,6U}},
{ASL_E140,{4U,5U,6U}},
{ASL_E140,{5U,5U,6U}},
{ASL_E140,{6U,5U,6U}},
{ASL_E140,{7U,5U,6U}},
{LSL_E148,{0U,5U,6U}},
{LSL_E148,{1U,5U,6U}},
{LSL_E148,{2U,5U,6U}},
{LSL_E148,{3U,5U,6U}},
{LSL_E148,{4U,5U,6U}},
{LSL_E148,{5U,5U,6U}},
{LSL_E148,{6U,5U,6U}},
{LSL_E148,{7U,5U,6U}},
{ROXL_E150,{0U,5U,6U}},
{ROXL_E150,{1U,5U,6U}},
{ROXL_E150,{2U,5U,6U}},
{ROXL_E150,{3U,5U,6U}},
{ROXL_E150,{4U,5U,6U}},
{ROXL_E150,{5U,5U,6U}},
{ROXL_E150,{6U,5U,6U}},
{ROXL_E150,{7U,5U,6U}},
{ROL_E158,{0U,5U,6U}},
{ROL_E158,{1U,5U,6U}},
{ROL_E158,{2U,5U,6U}},
{ROL_E158,{3U,5U,6U}},
{ROL_E158,{4U,5U,6U}},
{ROL_E158,{5U,5U,6U}},
{ROL_E158,{6U,5U,6U}},
{ROL_E158,{7U,5U,6U}},
{ASL_E160,{0U,5U,6U}},
{ASL_E160,{1U,5U,6U}},
{ASL_E160,{2U,5U,6U}},
{ASL_E160,{3U,5U,6U}},
{ASL_E160,{4U,5U,6U}},
{ASL_E160,{5U,5U,6U}},
{ASL_E160,{6U,5U,6U}},
{ASL_E160,{7U,5U,6U}},
{LSL_E168,{0U,5U,6U}},
{LSL_E168,{1U,5U,6U}},
{LSL_E168,{2U,5U,6U}},
{LSL_E168,{3U,5U,6U}},
{LSL_E168,{4U,5U,6U}},
{LSL_E168,{5U,5U,6U}},
{LSL_E168,{6U,5U,6U}},
{LSL_E168,{7U,5U,6U}},
{ROXL_E170,{0U,5U,6U}},
{ROXL_E170,{1U,5U,6U}},
{ROXL_E170,{2U,5U,6U}},
{ROXL_E170,{3U,5U,6U}},
{ROXL_E170,{4U,5U,6U}},
{ROXL_E170,{5U,5U,6U}},
{ROXL_E170,{6U,5U,6U}},
{ROXL_E170,{7U,5U,6U}},
{ROL_E178,{0U,5U,6U}},
{ROL_E178,{1U,5U,6U}},
{ROL_E178,{2U,5U,6U}},
{ROL_E178,{3U,5U,6U}},
{ROL_E178,{4U,5U,6U}},
{ROL_E178,{5U,5U,6U}},
{ROL_E178,{6U,5U,6U}},
{ROL_E178,{7U,5U,6U}},
{ASL_E180,{0U,5U,8U}},
{ASL_E180,{1U,5U,8U}},
{ASL_E180,{2U,5U,8U}},
{ASL_E180,{3U,5U,8U}},
{ASL_E180,{4U,5U,8U}},
{ASL_E180,{5U,5U,8U}},
{ASL_E180,{6U,5U,8U}},
{ASL_E180,{7U,5U,8U}},
{LSL_E188,{0U,5U,8U}},
{LSL_E188,{1U,5U,8U}},
{LSL_E188,{2U,5U,8U}},
{LSL_E188,{3U,5U,8U}},
{LSL_E188,{4U,5U,8U}},
{LSL_E188,{5U,5U,8U}},
{LSL_E188,{6U,5U,8U}},
{LSL_E188,{7U,5U,8U}},
{ROXL_E190,{0U,5U,8U}},
{ROXL_E190,{1U,5U,8U}},
{ROXL_E190,{2U,5U,8U}},
{ROXL_E190,{3U,5U,8U}},
{ROXL_E190,{4U,5U,8U}},
{ROXL_E190,{5U,5U,8U}},
{ROXL_E190,{6U,5U,8U}},
{ROXL_E190,{7U,5U,8U}},
{ROL_E198,{0U,5U,8U}},
{ROL_E198,{1U,5U,8U}},
{ROL_E198,{2U,5U,8U}},
{ROL_E198,{3U,5U,8U}},
{ROL_E198,{4U,5U,8U}},
{ROL_E198,{5U,5U,8U}},
{ROL_E198,{6U,5U,8U}},
{ROL_E198,{7U,5U,8U}},
{ASL_E1A0,{0U,5U,8U}},
{ASL_E1A0,{1U,5U,8U}},
{ASL_E1A0,{2U,5U,8U}},
{ASL_E1A0,{3U,5U,8U}},
{ASL_E1A0,{4U,5U,8U}},
{ASL_E1A0,{5U,5U,8U}},
{ASL_E1A0,{6U,5U,8U}},
{ASL_E1A0,{7U,5U,8U}},
{LSL_E1A8,{0U,5U,8U}},
{LSL_E1A8,{1U,5U,8U}},
{LSL_E1A8,{2U,5U,8U}},
{LSL_E1A8,{3U,5U,8U}},
{LSL_E1A8,{4U,5U,8U}},
{LSL_E1A8,{5U,5U,8U}},
{LSL_E1A8,{6U,5U,8U}},
{LSL_E1A8,{7U,5U,8U}},
{ROXL_E1B0,{0U,5U,8U}},
{ROXL_E1B0,{1U,5U,8U}},
{ROXL_E1B0,{2U,5U,8U}},
{ROXL_E1B0,{3U,5U,8U}},
{ROXL_E1B0,{4U,5U,8U}},
{ROXL_E1B0,{5U,5U,8U}},
{ROXL_E1B0,{6U,5U,8U}},
{ROXL_E1B0,{7U,5U,8U}},
{ROL_E1B8,{0U,5U,8U}},
{ROL_E1B8,{1U,5U,8U}},
{ROL_E1B8,{2U,5U,8U}},
{ROL_E1B8,{3U,5U,8U}},
{ROL_E1B8,{4U,5U,8U}},
{ROL_E1B8,{5U,5U,8U}},
{ROL_E1B8,{6U,5U,8U}},
{ROL_E1B8,{7U,5U,8U}},
{BFEXTS_EBC0,{0U,0U,0U}},
{BFEXTS_EBC0,{1U,0U,0U}},
{BFEXTS_EBC0,{2U,0U,0U}},
{BFEXTS_EBC0,{3U,0U,0U}},
{BFEXTS_EBC0,{4U,0U,0U}},
{BFEXTS_EBC0,{5U,0U,0U}},
{BFEXTS_EBC0,{6U,0U,0U}},
{BFEXTS_EBC0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFEXTS_EBD0,{0U,0U,0U}},
{BFEXTS_EBD0,{1U,0U,0U}},
{BFEXTS_EBD0,{2U,0U,0U}},
{BFEXTS_EBD0,{3U,0U,0U}},
{BFEXTS_EBD0,{4U,0U,0U}},
{BFEXTS_EBD0,{5U,0U,0U}},
{BFEXTS_EBD0,{6U,0U,0U}},
{BFEXTS_EBD0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFEXTS_EBE8,{0U,0U,0U}},
{BFEXTS_EBE8,{1U,0U,0U}},
{BFEXTS_EBE8,{2U,0U,0U}},
{BFEXTS_EBE8,{3U,0U,0U}},
{BFEXTS_EBE8,{4U,0U,0U}},
{BFEXTS_EBE8,{5U,0U,0U}},
{BFEXTS_EBE8,{6U,0U,0U}},
{BFEXTS_EBE8,{7U,0U,0U}},
{BFEXTS_EBF0,{0U,0U,0U}},
{BFEXTS_EBF0,{1U,0U,0U}},
{BFEXTS_EBF0,{2U,0U,0U}},
{BFEXTS_EBF0,{3U,0U,0U}},
{BFEXTS_EBF0,{4U,0U,0U}},
{BFEXTS_EBF0,{5U,0U,0U}},
{BFEXTS_EBF0,{6U,0U,0U}},
{BFEXTS_EBF0,{7U,0U,0U}},
{BFEXTS_EBF8,{0U,0U,0U}},
{BFEXTS_EBF9,{0U,0U,0U}},
{BFEXTS_EBFA,{0U,0U,0U}},
{BFEXTS_EBFB,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASR_E000,{0U,6U,6U}},
{ASR_E000,{1U,6U,6U}},
{ASR_E000,{2U,6U,6U}},
{ASR_E000,{3U,6U,6U}},
{ASR_E000,{4U,6U,6U}},
{ASR_E000,{5U,6U,6U}},
{ASR_E000,{6U,6U,6U}},
{ASR_E000,{7U,6U,6U}},
{LSR_E008,{0U,6U,6U}},
{LSR_E008,{1U,6U,6U}},
{LSR_E008,{2U,6U,6U}},
{LSR_E008,{3U,6U,6U}},
{LSR_E008,{4U,6U,6U}},
{LSR_E008,{5U,6U,6U}},
{LSR_E008,{6U,6U,6U}},
{LSR_E008,{7U,6U,6U}},
{ROXR_E010,{0U,6U,6U}},
{ROXR_E010,{1U,6U,6U}},
{ROXR_E010,{2U,6U,6U}},
{ROXR_E010,{3U,6U,6U}},
{ROXR_E010,{4U,6U,6U}},
{ROXR_E010,{5U,6U,6U}},
{ROXR_E010,{6U,6U,6U}},
{ROXR_E010,{7U,6U,6U}},
{ROR_E018,{0U,6U,6U}},
{ROR_E018,{1U,6U,6U}},
{ROR_E018,{2U,6U,6U}},
{ROR_E018,{3U,6U,6U}},
{ROR_E018,{4U,6U,6U}},
{ROR_E018,{5U,6U,6U}},
{ROR_E018,{6U,6U,6U}},
{ROR_E018,{7U,6U,6U}},
{ASR_E020,{0U,6U,6U}},
{ASR_E020,{1U,6U,6U}},
{ASR_E020,{2U,6U,6U}},
{ASR_E020,{3U,6U,6U}},
{ASR_E020,{4U,6U,6U}},
{ASR_E020,{5U,6U,6U}},
{ASR_E020,{6U,6U,6U}},
{ASR_E020,{7U,6U,6U}},
{LSR_E028,{0U,6U,6U}},
{LSR_E028,{1U,6U,6U}},
{LSR_E028,{2U,6U,6U}},
{LSR_E028,{3U,6U,6U}},
{LSR_E028,{4U,6U,6U}},
{LSR_E028,{5U,6U,6U}},
{LSR_E028,{6U,6U,6U}},
{LSR_E028,{7U,6U,6U}},
{ROXR_E030,{0U,6U,6U}},
{ROXR_E030,{1U,6U,6U}},
{ROXR_E030,{2U,6U,6U}},
{ROXR_E030,{3U,6U,6U}},
{ROXR_E030,{4U,6U,6U}},
{ROXR_E030,{5U,6U,6U}},
{ROXR_E030,{6U,6U,6U}},
{ROXR_E030,{7U,6U,6U}},
{ROR_E038,{0U,6U,6U}},
{ROR_E038,{1U,6U,6U}},
{ROR_E038,{2U,6U,6U}},
{ROR_E038,{3U,6U,6U}},
{ROR_E038,{4U,6U,6U}},
{ROR_E038,{5U,6U,6U}},
{ROR_E038,{6U,6U,6U}},
{ROR_E038,{7U,6U,6U}},
{ASR_E040,{0U,6U,6U}},
{ASR_E040,{1U,6U,6U}},
{ASR_E040,{2U,6U,6U}},
{ASR_E040,{3U,6U,6U}},
{ASR_E040,{4U,6U,6U}},
{ASR_E040,{5U,6U,6U}},
{ASR_E040,{6U,6U,6U}},
{ASR_E040,{7U,6U,6U}},
{LSR_E048,{0U,6U,6U}},
{LSR_E048,{1U,6U,6U}},
{LSR_E048,{2U,6U,6U}},
{LSR_E048,{3U,6U,6U}},
{LSR_E048,{4U,6U,6U}},
{LSR_E048,{5U,6U,6U}},
{LSR_E048,{6U,6U,6U}},
{LSR_E048,{7U,6U,6U}},
{ROXR_E050,{0U,6U,6U}},
{ROXR_E050,{1U,6U,6U}},
{ROXR_E050,{2U,6U,6U}},
{ROXR_E050,{3U,6U,6U}},
{ROXR_E050,{4U,6U,6U}},
{ROXR_E050,{5U,6U,6U}},
{ROXR_E050,{6U,6U,6U}},
{ROXR_E050,{7U,6U,6U}},
{ROR_E058,{0U,6U,6U}},
{ROR_E058,{1U,6U,6U}},
{ROR_E058,{2U,6U,6U}},
{ROR_E058,{3U,6U,6U}},
{ROR_E058,{4U,6U,6U}},
{ROR_E058,{5U,6U,6U}},
{ROR_E058,{6U,6U,6U}},
{ROR_E058,{7U,6U,6U}},
{ASR_E060,{0U,6U,6U}},
{ASR_E060,{1U,6U,6U}},
{ASR_E060,{2U,6U,6U}},
{ASR_E060,{3U,6U,6U}},
{ASR_E060,{4U,6U,6U}},
{ASR_E060,{5U,6U,6U}},
{ASR_E060,{6U,6U,6U}},
{ASR_E060,{7U,6U,6U}},
{LSR_E068,{0U,6U,6U}},
{LSR_E068,{1U,6U,6U}},
{LSR_E068,{2U,6U,6U}},
{LSR_E068,{3U,6U,6U}},
{LSR_E068,{4U,6U,6U}},
{LSR_E068,{5U,6U,6U}},
{LSR_E068,{6U,6U,6U}},
{LSR_E068,{7U,6U,6U}},
{ROXR_E070,{0U,6U,6U}},
{ROXR_E070,{1U,6U,6U}},
{ROXR_E070,{2U,6U,6U}},
{ROXR_E070,{3U,6U,6U}},
{ROXR_E070,{4U,6U,6U}},
{ROXR_E070,{5U,6U,6U}},
{ROXR_E070,{6U,6U,6U}},
{ROXR_E070,{7U,6U,6U}},
{ROR_E078,{0U,6U,6U}},
{ROR_E078,{1U,6U,6U}},
{ROR_E078,{2U,6U,6U}},
{ROR_E078,{3U,6U,6U}},
{ROR_E078,{4U,6U,6U}},
{ROR_E078,{5U,6U,6U}},
{ROR_E078,{6U,6U,6U}},
{ROR_E078,{7U,6U,6U}},
{ASR_E080,{0U,6U,8U}},
{ASR_E080,{1U,6U,8U}},
{ASR_E080,{2U,6U,8U}},
{ASR_E080,{3U,6U,8U}},
{ASR_E080,{4U,6U,8U}},
{ASR_E080,{5U,6U,8U}},
{ASR_E080,{6U,6U,8U}},
{ASR_E080,{7U,6U,8U}},
{LSR_E088,{0U,6U,8U}},
{LSR_E088,{1U,6U,8U}},
{LSR_E088,{2U,6U,8U}},
{LSR_E088,{3U,6U,8U}},
{LSR_E088,{4U,6U,8U}},
{LSR_E088,{5U,6U,8U}},
{LSR_E088,{6U,6U,8U}},
{LSR_E088,{7U,6U,8U}},
{ROXR_E090,{0U,6U,8U}},
{ROXR_E090,{1U,6U,8U}},
{ROXR_E090,{2U,6U,8U}},
{ROXR_E090,{3U,6U,8U}},
{ROXR_E090,{4U,6U,8U}},
{ROXR_E090,{5U,6U,8U}},
{ROXR_E090,{6U,6U,8U}},
{ROXR_E090,{7U,6U,8U}},
{ROR_E098,{0U,6U,8U}},
{ROR_E098,{1U,6U,8U}},
{ROR_E098,{2U,6U,8U}},
{ROR_E098,{3U,6U,8U}},
{ROR_E098,{4U,6U,8U}},
{ROR_E098,{5U,6U,8U}},
{ROR_E098,{6U,6U,8U}},
{ROR_E098,{7U,6U,8U}},
{ASR_E0A0,{0U,6U,8U}},
{ASR_E0A0,{1U,6U,8U}},
{ASR_E0A0,{2U,6U,8U}},
{ASR_E0A0,{3U,6U,8U}},
{ASR_E0A0,{4U,6U,8U}},
{ASR_E0A0,{5U,6U,8U}},
{ASR_E0A0,{6U,6U,8U}},
{ASR_E0A0,{7U,6U,8U}},
{LSR_E0A8,{0U,6U,8U}},
{LSR_E0A8,{1U,6U,8U}},
{LSR_E0A8,{2U,6U,8U}},
{LSR_E0A8,{3U,6U,8U}},
{LSR_E0A8,{4U,6U,8U}},
{LSR_E0A8,{5U,6U,8U}},
{LSR_E0A8,{6U,6U,8U}},
{LSR_E0A8,{7U,6U,8U}},
{ROXR_E0B0,{0U,6U,8U}},
{ROXR_E0B0,{1U,6U,8U}},
{ROXR_E0B0,{2U,6U,8U}},
{ROXR_E0B0,{3U,6U,8U}},
{ROXR_E0B0,{4U,6U,8U}},
{ROXR_E0B0,{5U,6U,8U}},
{ROXR_E0B0,{6U,6U,8U}},
{ROXR_E0B0,{7U,6U,8U}},
{ROR_E0B8,{0U,6U,8U}},
{ROR_E0B8,{1U,6U,8U}},
{ROR_E0B8,{2U,6U,8U}},
{ROR_E0B8,{3U,6U,8U}},
{ROR_E0B8,{4U,6U,8U}},
{ROR_E0B8,{5U,6U,8U}},
{ROR_E0B8,{6U,6U,8U}},
{ROR_E0B8,{7U,6U,8U}},
{BFCLR_ECC0,{0U,0U,0U}},
{BFCLR_ECC0,{1U,0U,0U}},
{BFCLR_ECC0,{2U,0U,0U}},
{BFCLR_ECC0,{3U,0U,0U}},
{BFCLR_ECC0,{4U,0U,0U}},
{BFCLR_ECC0,{5U,0U,0U}},
{BFCLR_ECC0,{6U,0U,0U}},
{BFCLR_ECC0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFCLR_ECD0,{0U,0U,0U}},
{BFCLR_ECD0,{1U,0U,0U}},
{BFCLR_ECD0,{2U,0U,0U}},
{BFCLR_ECD0,{3U,0U,0U}},
{BFCLR_ECD0,{4U,0U,0U}},
{BFCLR_ECD0,{5U,0U,0U}},
{BFCLR_ECD0,{6U,0U,0U}},
{BFCLR_ECD0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFCLR_ECE8,{0U,0U,0U}},
{BFCLR_ECE8,{1U,0U,0U}},
{BFCLR_ECE8,{2U,0U,0U}},
{BFCLR_ECE8,{3U,0U,0U}},
{BFCLR_ECE8,{4U,0U,0U}},
{BFCLR_ECE8,{5U,0U,0U}},
{BFCLR_ECE8,{6U,0U,0U}},
{BFCLR_ECE8,{7U,0U,0U}},
{BFCLR_ECF0,{0U,0U,0U}},
{BFCLR_ECF0,{1U,0U,0U}},
{BFCLR_ECF0,{2U,0U,0U}},
{BFCLR_ECF0,{3U,0U,0U}},
{BFCLR_ECF0,{4U,0U,0U}},
{BFCLR_ECF0,{5U,0U,0U}},
{BFCLR_ECF0,{6U,0U,0U}},
{BFCLR_ECF0,{7U,0U,0U}},
{BFCLR_ECF8,{0U,0U,0U}},
{BFCLR_ECF9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASL_E100,{0U,6U,6U}},
{ASL_E100,{1U,6U,6U}},
{ASL_E100,{2U,6U,6U}},
{ASL_E100,{3U,6U,6U}},
{ASL_E100,{4U,6U,6U}},
{ASL_E100,{5U,6U,6U}},
{ASL_E100,{6U,6U,6U}},
{ASL_E100,{7U,6U,6U}},
{LSL_E108,{0U,6U,6U}},
{LSL_E108,{1U,6U,6U}},
{LSL_E108,{2U,6U,6U}},
{LSL_E108,{3U,6U,6U}},
{LSL_E108,{4U,6U,6U}},
{LSL_E108,{5U,6U,6U}},
{LSL_E108,{6U,6U,6U}},
{LSL_E108,{7U,6U,6U}},
{ROXL_E110,{0U,6U,6U}},
{ROXL_E110,{1U,6U,6U}},
{ROXL_E110,{2U,6U,6U}},
{ROXL_E110,{3U,6U,6U}},
{ROXL_E110,{4U,6U,6U}},
{ROXL_E110,{5U,6U,6U}},
{ROXL_E110,{6U,6U,6U}},
{ROXL_E110,{7U,6U,6U}},
{ROL_E118,{0U,6U,6U}},
{ROL_E118,{1U,6U,6U}},
{ROL_E118,{2U,6U,6U}},
{ROL_E118,{3U,6U,6U}},
{ROL_E118,{4U,6U,6U}},
{ROL_E118,{5U,6U,6U}},
{ROL_E118,{6U,6U,6U}},
{ROL_E118,{7U,6U,6U}},
{ASL_E120,{0U,6U,6U}},
{ASL_E120,{1U,6U,6U}},
{ASL_E120,{2U,6U,6U}},
{ASL_E120,{3U,6U,6U}},
{ASL_E120,{4U,6U,6U}},
{ASL_E120,{5U,6U,6U}},
{ASL_E120,{6U,6U,6U}},
{ASL_E120,{7U,6U,6U}},
{LSL_E128,{0U,6U,6U}},
{LSL_E128,{1U,6U,6U}},
{LSL_E128,{2U,6U,6U}},
{LSL_E128,{3U,6U,6U}},
{LSL_E128,{4U,6U,6U}},
{LSL_E128,{5U,6U,6U}},
{LSL_E128,{6U,6U,6U}},
{LSL_E128,{7U,6U,6U}},
{ROXL_E130,{0U,6U,6U}},
{ROXL_E130,{1U,6U,6U}},
{ROXL_E130,{2U,6U,6U}},
{ROXL_E130,{3U,6U,6U}},
{ROXL_E130,{4U,6U,6U}},
{ROXL_E130,{5U,6U,6U}},
{ROXL_E130,{6U,6U,6U}},
{ROXL_E130,{7U,6U,6U}},
{ROL_E138,{0U,6U,6U}},
{ROL_E138,{1U,6U,6U}},
{ROL_E138,{2U,6U,6U}},
{ROL_E138,{3U,6U,6U}},
{ROL_E138,{4U,6U,6U}},
{ROL_E138,{5U,6U,6U}},
{ROL_E138,{6U,6U,6U}},
{ROL_E138,{7U,6U,6U}},
{ASL_E140,{0U,6U,6U}},
{ASL_E140,{1U,6U,6U}},
{ASL_E140,{2U,6U,6U}},
{ASL_E140,{3U,6U,6U}},
{ASL_E140,{4U,6U,6U}},
{ASL_E140,{5U,6U,6U}},
{ASL_E140,{6U,6U,6U}},
{ASL_E140,{7U,6U,6U}},
{LSL_E148,{0U,6U,6U}},
{LSL_E148,{1U,6U,6U}},
{LSL_E148,{2U,6U,6U}},
{LSL_E148,{3U,6U,6U}},
{LSL_E148,{4U,6U,6U}},
{LSL_E148,{5U,6U,6U}},
{LSL_E148,{6U,6U,6U}},
{LSL_E148,{7U,6U,6U}},
{ROXL_E150,{0U,6U,6U}},
{ROXL_E150,{1U,6U,6U}},
{ROXL_E150,{2U,6U,6U}},
{ROXL_E150,{3U,6U,6U}},
{ROXL_E150,{4U,6U,6U}},
{ROXL_E150,{5U,6U,6U}},
{ROXL_E150,{6U,6U,6U}},
{ROXL_E150,{7U,6U,6U}},
{ROL_E158,{0U,6U,6U}},
{ROL_E158,{1U,6U,6U}},
{ROL_E158,{2U,6U,6U}},
{ROL_E158,{3U,6U,6U}},
{ROL_E158,{4U,6U,6U}},
{ROL_E158,{5U,6U,6U}},
{ROL_E158,{6U,6U,6U}},
{ROL_E158,{7U,6U,6U}},
{ASL_E160,{0U,6U,6U}},
{ASL_E160,{1U,6U,6U}},
{ASL_E160,{2U,6U,6U}},
{ASL_E160,{3U,6U,6U}},
{ASL_E160,{4U,6U,6U}},
{ASL_E160,{5U,6U,6U}},
{ASL_E160,{6U,6U,6U}},
{ASL_E160,{7U,6U,6U}},
{LSL_E168,{0U,6U,6U}},
{LSL_E168,{1U,6U,6U}},
{LSL_E168,{2U,6U,6U}},
{LSL_E168,{3U,6U,6U}},
{LSL_E168,{4U,6U,6U}},
{LSL_E168,{5U,6U,6U}},
{LSL_E168,{6U,6U,6U}},
{LSL_E168,{7U,6U,6U}},
{ROXL_E170,{0U,6U,6U}},
{ROXL_E170,{1U,6U,6U}},
{ROXL_E170,{2U,6U,6U}},
{ROXL_E170,{3U,6U,6U}},
{ROXL_E170,{4U,6U,6U}},
{ROXL_E170,{5U,6U,6U}},
{ROXL_E170,{6U,6U,6U}},
{ROXL_E170,{7U,6U,6U}},
{ROL_E178,{0U,6U,6U}},
{ROL_E178,{1U,6U,6U}},
{ROL_E178,{2U,6U,6U}},
{ROL_E178,{3U,6U,6U}},
{ROL_E178,{4U,6U,6U}},
{ROL_E178,{5U,6U,6U}},
{ROL_E178,{6U,6U,6U}},
{ROL_E178,{7U,6U,6U}},
{ASL_E180,{0U,6U,8U}},
{ASL_E180,{1U,6U,8U}},
{ASL_E180,{2U,6U,8U}},
{ASL_E180,{3U,6U,8U}},
{ASL_E180,{4U,6U,8U}},
{ASL_E180,{5U,6U,8U}},
{ASL_E180,{6U,6U,8U}},
{ASL_E180,{7U,6U,8U}},
{LSL_E188,{0U,6U,8U}},
{LSL_E188,{1U,6U,8U}},
{LSL_E188,{2U,6U,8U}},
{LSL_E188,{3U,6U,8U}},
{LSL_E188,{4U,6U,8U}},
{LSL_E188,{5U,6U,8U}},
{LSL_E188,{6U,6U,8U}},
{LSL_E188,{7U,6U,8U}},
{ROXL_E190,{0U,6U,8U}},
{ROXL_E190,{1U,6U,8U}},
{ROXL_E190,{2U,6U,8U}},
{ROXL_E190,{3U,6U,8U}},
{ROXL_E190,{4U,6U,8U}},
{ROXL_E190,{5U,6U,8U}},
{ROXL_E190,{6U,6U,8U}},
{ROXL_E190,{7U,6U,8U}},
{ROL_E198,{0U,6U,8U}},
{ROL_E198,{1U,6U,8U}},
{ROL_E198,{2U,6U,8U}},
{ROL_E198,{3U,6U,8U}},
{ROL_E198,{4U,6U,8U}},
{ROL_E198,{5U,6U,8U}},
{ROL_E198,{6U,6U,8U}},
{ROL_E198,{7U,6U,8U}},
{ASL_E1A0,{0U,6U,8U}},
{ASL_E1A0,{1U,6U,8U}},
{ASL_E1A0,{2U,6U,8U}},
{ASL_E1A0,{3U,6U,8U}},
{ASL_E1A0,{4U,6U,8U}},
{ASL_E1A0,{5U,6U,8U}},
{ASL_E1A0,{6U,6U,8U}},
{ASL_E1A0,{7U,6U,8U}},
{LSL_E1A8,{0U,6U,8U}},
{LSL_E1A8,{1U,6U,8U}},
{LSL_E1A8,{2U,6U,8U}},
{LSL_E1A8,{3U,6U,8U}},
{LSL_E1A8,{4U,6U,8U}},
{LSL_E1A8,{5U,6U,8U}},
{LSL_E1A8,{6U,6U,8U}},
{LSL_E1A8,{7U,6U,8U}},
{ROXL_E1B0,{0U,6U,8U}},
{ROXL_E1B0,{1U,6U,8U}},
{ROXL_E1B0,{2U,6U,8U}},
{ROXL_E1B0,{3U,6U,8U}},
{ROXL_E1B0,{4U,6U,8U}},
{ROXL_E1B0,{5U,6U,8U}},
{ROXL_E1B0,{6U,6U,8U}},
{ROXL_E1B0,{7U,6U,8U}},
{ROL_E1B8,{0U,6U,8U}},
{ROL_E1B8,{1U,6U,8U}},
{ROL_E1B8,{2U,6U,8U}},
{ROL_E1B8,{3U,6U,8U}},
{ROL_E1B8,{4U,6U,8U}},
{ROL_E1B8,{5U,6U,8U}},
{ROL_E1B8,{6U,6U,8U}},
{ROL_E1B8,{7U,6U,8U}},
{BFFFO_EDC0,{0U,0U,0U}},
{BFFFO_EDC0,{1U,0U,0U}},
{BFFFO_EDC0,{2U,0U,0U}},
{BFFFO_EDC0,{3U,0U,0U}},
{BFFFO_EDC0,{4U,0U,0U}},
{BFFFO_EDC0,{5U,0U,0U}},
{BFFFO_EDC0,{6U,0U,0U}},
{BFFFO_EDC0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFFFO_EDD0,{0U,0U,0U}},
{BFFFO_EDD0,{1U,0U,0U}},
{BFFFO_EDD0,{2U,0U,0U}},
{BFFFO_EDD0,{3U,0U,0U}},
{BFFFO_EDD0,{4U,0U,0U}},
{BFFFO_EDD0,{5U,0U,0U}},
{BFFFO_EDD0,{6U,0U,0U}},
{BFFFO_EDD0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFFFO_EDE8,{0U,0U,0U}},
{BFFFO_EDE8,{1U,0U,0U}},
{BFFFO_EDE8,{2U,0U,0U}},
{BFFFO_EDE8,{3U,0U,0U}},
{BFFFO_EDE8,{4U,0U,0U}},
{BFFFO_EDE8,{5U,0U,0U}},
{BFFFO_EDE8,{6U,0U,0U}},
{BFFFO_EDE8,{7U,0U,0U}},
{BFFFO_EDF0,{0U,0U,0U}},
{BFFFO_EDF0,{1U,0U,0U}},
{BFFFO_EDF0,{2U,0U,0U}},
{BFFFO_EDF0,{3U,0U,0U}},
{BFFFO_EDF0,{4U,0U,0U}},
{BFFFO_EDF0,{5U,0U,0U}},
{BFFFO_EDF0,{6U,0U,0U}},
{BFFFO_EDF0,{7U,0U,0U}},
{BFFFO_EDF8,{0U,0U,0U}},
{BFFFO_EDF9,{0U,0U,0U}},
{BFFFO_EDFA,{0U,0U,0U}},
{BFFFO_EDFB,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASR_E000,{0U,7U,6U}},
{ASR_E000,{1U,7U,6U}},
{ASR_E000,{2U,7U,6U}},
{ASR_E000,{3U,7U,6U}},
{ASR_E000,{4U,7U,6U}},
{ASR_E000,{5U,7U,6U}},
{ASR_E000,{6U,7U,6U}},
{ASR_E000,{7U,7U,6U}},
{LSR_E008,{0U,7U,6U}},
{LSR_E008,{1U,7U,6U}},
{LSR_E008,{2U,7U,6U}},
{LSR_E008,{3U,7U,6U}},
{LSR_E008,{4U,7U,6U}},
{LSR_E008,{5U,7U,6U}},
{LSR_E008,{6U,7U,6U}},
{LSR_E008,{7U,7U,6U}},
{ROXR_E010,{0U,7U,6U}},
{ROXR_E010,{1U,7U,6U}},
{ROXR_E010,{2U,7U,6U}},
{ROXR_E010,{3U,7U,6U}},
{ROXR_E010,{4U,7U,6U}},
{ROXR_E010,{5U,7U,6U}},
{ROXR_E010,{6U,7U,6U}},
{ROXR_E010,{7U,7U,6U}},
{ROR_E018,{0U,7U,6U}},
{ROR_E018,{1U,7U,6U}},
{ROR_E018,{2U,7U,6U}},
{ROR_E018,{3U,7U,6U}},
{ROR_E018,{4U,7U,6U}},
{ROR_E018,{5U,7U,6U}},
{ROR_E018,{6U,7U,6U}},
{ROR_E018,{7U,7U,6U}},
{ASR_E020,{0U,7U,6U}},
{ASR_E020,{1U,7U,6U}},
{ASR_E020,{2U,7U,6U}},
{ASR_E020,{3U,7U,6U}},
{ASR_E020,{4U,7U,6U}},
{ASR_E020,{5U,7U,6U}},
{ASR_E020,{6U,7U,6U}},
{ASR_E020,{7U,7U,6U}},
{LSR_E028,{0U,7U,6U}},
{LSR_E028,{1U,7U,6U}},
{LSR_E028,{2U,7U,6U}},
{LSR_E028,{3U,7U,6U}},
{LSR_E028,{4U,7U,6U}},
{LSR_E028,{5U,7U,6U}},
{LSR_E028,{6U,7U,6U}},
{LSR_E028,{7U,7U,6U}},
{ROXR_E030,{0U,7U,6U}},
{ROXR_E030,{1U,7U,6U}},
{ROXR_E030,{2U,7U,6U}},
{ROXR_E030,{3U,7U,6U}},
{ROXR_E030,{4U,7U,6U}},
{ROXR_E030,{5U,7U,6U}},
{ROXR_E030,{6U,7U,6U}},
{ROXR_E030,{7U,7U,6U}},
{ROR_E038,{0U,7U,6U}},
{ROR_E038,{1U,7U,6U}},
{ROR_E038,{2U,7U,6U}},
{ROR_E038,{3U,7U,6U}},
{ROR_E038,{4U,7U,6U}},
{ROR_E038,{5U,7U,6U}},
{ROR_E038,{6U,7U,6U}},
{ROR_E038,{7U,7U,6U}},
{ASR_E040,{0U,7U,6U}},
{ASR_E040,{1U,7U,6U}},
{ASR_E040,{2U,7U,6U}},
{ASR_E040,{3U,7U,6U}},
{ASR_E040,{4U,7U,6U}},
{ASR_E040,{5U,7U,6U}},
{ASR_E040,{6U,7U,6U}},
{ASR_E040,{7U,7U,6U}},
{LSR_E048,{0U,7U,6U}},
{LSR_E048,{1U,7U,6U}},
{LSR_E048,{2U,7U,6U}},
{LSR_E048,{3U,7U,6U}},
{LSR_E048,{4U,7U,6U}},
{LSR_E048,{5U,7U,6U}},
{LSR_E048,{6U,7U,6U}},
{LSR_E048,{7U,7U,6U}},
{ROXR_E050,{0U,7U,6U}},
{ROXR_E050,{1U,7U,6U}},
{ROXR_E050,{2U,7U,6U}},
{ROXR_E050,{3U,7U,6U}},
{ROXR_E050,{4U,7U,6U}},
{ROXR_E050,{5U,7U,6U}},
{ROXR_E050,{6U,7U,6U}},
{ROXR_E050,{7U,7U,6U}},
{ROR_E058,{0U,7U,6U}},
{ROR_E058,{1U,7U,6U}},
{ROR_E058,{2U,7U,6U}},
{ROR_E058,{3U,7U,6U}},
{ROR_E058,{4U,7U,6U}},
{ROR_E058,{5U,7U,6U}},
{ROR_E058,{6U,7U,6U}},
{ROR_E058,{7U,7U,6U}},
{ASR_E060,{0U,7U,6U}},
{ASR_E060,{1U,7U,6U}},
{ASR_E060,{2U,7U,6U}},
{ASR_E060,{3U,7U,6U}},
{ASR_E060,{4U,7U,6U}},
{ASR_E060,{5U,7U,6U}},
{ASR_E060,{6U,7U,6U}},
{ASR_E060,{7U,7U,6U}},
{LSR_E068,{0U,7U,6U}},
{LSR_E068,{1U,7U,6U}},
{LSR_E068,{2U,7U,6U}},
{LSR_E068,{3U,7U,6U}},
{LSR_E068,{4U,7U,6U}},
{LSR_E068,{5U,7U,6U}},
{LSR_E068,{6U,7U,6U}},
{LSR_E068,{7U,7U,6U}},
{ROXR_E070,{0U,7U,6U}},
{ROXR_E070,{1U,7U,6U}},
{ROXR_E070,{2U,7U,6U}},
{ROXR_E070,{3U,7U,6U}},
{ROXR_E070,{4U,7U,6U}},
{ROXR_E070,{5U,7U,6U}},
{ROXR_E070,{6U,7U,6U}},
{ROXR_E070,{7U,7U,6U}},
{ROR_E078,{0U,7U,6U}},
{ROR_E078,{1U,7U,6U}},
{ROR_E078,{2U,7U,6U}},
{ROR_E078,{3U,7U,6U}},
{ROR_E078,{4U,7U,6U}},
{ROR_E078,{5U,7U,6U}},
{ROR_E078,{6U,7U,6U}},
{ROR_E078,{7U,7U,6U}},
{ASR_E080,{0U,7U,8U}},
{ASR_E080,{1U,7U,8U}},
{ASR_E080,{2U,7U,8U}},
{ASR_E080,{3U,7U,8U}},
{ASR_E080,{4U,7U,8U}},
{ASR_E080,{5U,7U,8U}},
{ASR_E080,{6U,7U,8U}},
{ASR_E080,{7U,7U,8U}},
{LSR_E088,{0U,7U,8U}},
{LSR_E088,{1U,7U,8U}},
{LSR_E088,{2U,7U,8U}},
{LSR_E088,{3U,7U,8U}},
{LSR_E088,{4U,7U,8U}},
{LSR_E088,{5U,7U,8U}},
{LSR_E088,{6U,7U,8U}},
{LSR_E088,{7U,7U,8U}},
{ROXR_E090,{0U,7U,8U}},
{ROXR_E090,{1U,7U,8U}},
{ROXR_E090,{2U,7U,8U}},
{ROXR_E090,{3U,7U,8U}},
{ROXR_E090,{4U,7U,8U}},
{ROXR_E090,{5U,7U,8U}},
{ROXR_E090,{6U,7U,8U}},
{ROXR_E090,{7U,7U,8U}},
{ROR_E098,{0U,7U,8U}},
{ROR_E098,{1U,7U,8U}},
{ROR_E098,{2U,7U,8U}},
{ROR_E098,{3U,7U,8U}},
{ROR_E098,{4U,7U,8U}},
{ROR_E098,{5U,7U,8U}},
{ROR_E098,{6U,7U,8U}},
{ROR_E098,{7U,7U,8U}},
{ASR_E0A0,{0U,7U,8U}},
{ASR_E0A0,{1U,7U,8U}},
{ASR_E0A0,{2U,7U,8U}},
{ASR_E0A0,{3U,7U,8U}},
{ASR_E0A0,{4U,7U,8U}},
{ASR_E0A0,{5U,7U,8U}},
{ASR_E0A0,{6U,7U,8U}},
{ASR_E0A0,{7U,7U,8U}},
{LSR_E0A8,{0U,7U,8U}},
{LSR_E0A8,{1U,7U,8U}},
{LSR_E0A8,{2U,7U,8U}},
{LSR_E0A8,{3U,7U,8U}},
{LSR_E0A8,{4U,7U,8U}},
{LSR_E0A8,{5U,7U,8U}},
{LSR_E0A8,{6U,7U,8U}},
{LSR_E0A8,{7U,7U,8U}},
{ROXR_E0B0,{0U,7U,8U}},
{ROXR_E0B0,{1U,7U,8U}},
{ROXR_E0B0,{2U,7U,8U}},
{ROXR_E0B0,{3U,7U,8U}},
{ROXR_E0B0,{4U,7U,8U}},
{ROXR_E0B0,{5U,7U,8U}},
{ROXR_E0B0,{6U,7U,8U}},
{ROXR_E0B0,{7U,7U,8U}},
{ROR_E0B8,{0U,7U,8U}},
{ROR_E0B8,{1U,7U,8U}},
{ROR_E0B8,{2U,7U,8U}},
{ROR_E0B8,{3U,7U,8U}},
{ROR_E0B8,{4U,7U,8U}},
{ROR_E0B8,{5U,7U,8U}},
{ROR_E0B8,{6U,7U,8U}},
{ROR_E0B8,{7U,7U,8U}},
{BFSET_EEC0,{0U,0U,0U}},
{BFSET_EEC0,{1U,0U,0U}},
{BFSET_EEC0,{2U,0U,0U}},
{BFSET_EEC0,{3U,0U,0U}},
{BFSET_EEC0,{4U,0U,0U}},
{BFSET_EEC0,{5U,0U,0U}},
{BFSET_EEC0,{6U,0U,0U}},
{BFSET_EEC0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFSET_EED0,{0U,0U,0U}},
{BFSET_EED0,{1U,0U,0U}},
{BFSET_EED0,{2U,0U,0U}},
{BFSET_EED0,{3U,0U,0U}},
{BFSET_EED0,{4U,0U,0U}},
{BFSET_EED0,{5U,0U,0U}},
{BFSET_EED0,{6U,0U,0U}},
{BFSET_EED0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFSET_EEE8,{0U,0U,0U}},
{BFSET_EEE8,{1U,0U,0U}},
{BFSET_EEE8,{2U,0U,0U}},
{BFSET_EEE8,{3U,0U,0U}},
{BFSET_EEE8,{4U,0U,0U}},
{BFSET_EEE8,{5U,0U,0U}},
{BFSET_EEE8,{6U,0U,0U}},
{BFSET_EEE8,{7U,0U,0U}},
{BFSET_EEF0,{0U,0U,0U}},
{BFSET_EEF0,{1U,0U,0U}},
{BFSET_EEF0,{2U,0U,0U}},
{BFSET_EEF0,{3U,0U,0U}},
{BFSET_EEF0,{4U,0U,0U}},
{BFSET_EEF0,{5U,0U,0U}},
{BFSET_EEF0,{6U,0U,0U}},
{BFSET_EEF0,{7U,0U,0U}},
{BFSET_EEF8,{0U,0U,0U}},
{BFSET_EEF9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{ASL_E100,{0U,7U,6U}},
{ASL_E100,{1U,7U,6U}},
{ASL_E100,{2U,7U,6U}},
{ASL_E100,{3U,7U,6U}},
{ASL_E100,{4U,7U,6U}},
{ASL_E100,{5U,7U,6U}},
{ASL_E100,{6U,7U,6U}},
{ASL_E100,{7U,7U,6U}},
{LSL_E108,{0U,7U,6U}},
{LSL_E108,{1U,7U,6U}},
{LSL_E108,{2U,7U,6U}},
{LSL_E108,{3U,7U,6U}},
{LSL_E108,{4U,7U,6U}},
{LSL_E108,{5U,7U,6U}},
{LSL_E108,{6U,7U,6U}},
{LSL_E108,{7U,7U,6U}},
{ROXL_E110,{0U,7U,6U}},
{ROXL_E110,{1U,7U,6U}},
{ROXL_E110,{2U,7U,6U}},
{ROXL_E110,{3U,7U,6U}},
{ROXL_E110,{4U,7U,6U}},
{ROXL_E110,{5U,7U,6U}},
{ROXL_E110,{6U,7U,6U}},
{ROXL_E110,{7U,7U,6U}},
{ROL_E118,{0U,7U,6U}},
{ROL_E118,{1U,7U,6U}},
{ROL_E118,{2U,7U,6U}},
{ROL_E118,{3U,7U,6U}},
{ROL_E118,{4U,7U,6U}},
{ROL_E118,{5U,7U,6U}},
{ROL_E118,{6U,7U,6U}},
{ROL_E118,{7U,7U,6U}},
{ASL_E120,{0U,7U,6U}},
{ASL_E120,{1U,7U,6U}},
{ASL_E120,{2U,7U,6U}},
{ASL_E120,{3U,7U,6U}},
{ASL_E120,{4U,7U,6U}},
{ASL_E120,{5U,7U,6U}},
{ASL_E120,{6U,7U,6U}},
{ASL_E120,{7U,7U,6U}},
{LSL_E128,{0U,7U,6U}},
{LSL_E128,{1U,7U,6U}},
{LSL_E128,{2U,7U,6U}},
{LSL_E128,{3U,7U,6U}},
{LSL_E128,{4U,7U,6U}},
{LSL_E128,{5U,7U,6U}},
{LSL_E128,{6U,7U,6U}},
{LSL_E128,{7U,7U,6U}},
{ROXL_E130,{0U,7U,6U}},
{ROXL_E130,{1U,7U,6U}},
{ROXL_E130,{2U,7U,6U}},
{ROXL_E130,{3U,7U,6U}},
{ROXL_E130,{4U,7U,6U}},
{ROXL_E130,{5U,7U,6U}},
{ROXL_E130,{6U,7U,6U}},
{ROXL_E130,{7U,7U,6U}},
{ROL_E138,{0U,7U,6U}},
{ROL_E138,{1U,7U,6U}},
{ROL_E138,{2U,7U,6U}},
{ROL_E138,{3U,7U,6U}},
{ROL_E138,{4U,7U,6U}},
{ROL_E138,{5U,7U,6U}},
{ROL_E138,{6U,7U,6U}},
{ROL_E138,{7U,7U,6U}},
{ASL_E140,{0U,7U,6U}},
{ASL_E140,{1U,7U,6U}},
{ASL_E140,{2U,7U,6U}},
{ASL_E140,{3U,7U,6U}},
{ASL_E140,{4U,7U,6U}},
{ASL_E140,{5U,7U,6U}},
{ASL_E140,{6U,7U,6U}},
{ASL_E140,{7U,7U,6U}},
{LSL_E148,{0U,7U,6U}},
{LSL_E148,{1U,7U,6U}},
{LSL_E148,{2U,7U,6U}},
{LSL_E148,{3U,7U,6U}},
{LSL_E148,{4U,7U,6U}},
{LSL_E148,{5U,7U,6U}},
{LSL_E148,{6U,7U,6U}},
{LSL_E148,{7U,7U,6U}},
{ROXL_E150,{0U,7U,6U}},
{ROXL_E150,{1U,7U,6U}},
{ROXL_E150,{2U,7U,6U}},
{ROXL_E150,{3U,7U,6U}},
{ROXL_E150,{4U,7U,6U}},
{ROXL_E150,{5U,7U,6U}},
{ROXL_E150,{6U,7U,6U}},
{ROXL_E150,{7U,7U,6U}},
{ROL_E158,{0U,7U,6U}},
{ROL_E158,{1U,7U,6U}},
{ROL_E158,{2U,7U,6U}},
{ROL_E158,{3U,7U,6U}},
{ROL_E158,{4U,7U,6U}},
{ROL_E158,{5U,7U,6U}},
{ROL_E158,{6U,7U,6U}},
{ROL_E158,{7U,7U,6U}},
{ASL_E160,{0U,7U,6U}},
{ASL_E160,{1U,7U,6U}},
{ASL_E160,{2U,7U,6U}},
{ASL_E160,{3U,7U,6U}},
{ASL_E160,{4U,7U,6U}},
{ASL_E160,{5U,7U,6U}},
{ASL_E160,{6U,7U,6U}},
{ASL_E160,{7U,7U,6U}},
{LSL_E168,{0U,7U,6U}},
{LSL_E168,{1U,7U,6U}},
{LSL_E168,{2U,7U,6U}},
{LSL_E168,{3U,7U,6U}},
{LSL_E168,{4U,7U,6U}},
{LSL_E168,{5U,7U,6U}},
{LSL_E168,{6U,7U,6U}},
{LSL_E168,{7U,7U,6U}},
{ROXL_E170,{0U,7U,6U}},
{ROXL_E170,{1U,7U,6U}},
{ROXL_E170,{2U,7U,6U}},
{ROXL_E170,{3U,7U,6U}},
{ROXL_E170,{4U,7U,6U}},
{ROXL_E170,{5U,7U,6U}},
{ROXL_E170,{6U,7U,6U}},
{ROXL_E170,{7U,7U,6U}},
{ROL_E178,{0U,7U,6U}},
{ROL_E178,{1U,7U,6U}},
{ROL_E178,{2U,7U,6U}},
{ROL_E178,{3U,7U,6U}},
{ROL_E178,{4U,7U,6U}},
{ROL_E178,{5U,7U,6U}},
{ROL_E178,{6U,7U,6U}},
{ROL_E178,{7U,7U,6U}},
{ASL_E180,{0U,7U,8U}},
{ASL_E180,{1U,7U,8U}},
{ASL_E180,{2U,7U,8U}},
{ASL_E180,{3U,7U,8U}},
{ASL_E180,{4U,7U,8U}},
{ASL_E180,{5U,7U,8U}},
{ASL_E180,{6U,7U,8U}},
{ASL_E180,{7U,7U,8U}},
{LSL_E188,{0U,7U,8U}},
{LSL_E188,{1U,7U,8U}},
{LSL_E188,{2U,7U,8U}},
{LSL_E188,{3U,7U,8U}},
{LSL_E188,{4U,7U,8U}},
{LSL_E188,{5U,7U,8U}},
{LSL_E188,{6U,7U,8U}},
{LSL_E188,{7U,7U,8U}},
{ROXL_E190,{0U,7U,8U}},
{ROXL_E190,{1U,7U,8U}},
{ROXL_E190,{2U,7U,8U}},
{ROXL_E190,{3U,7U,8U}},
{ROXL_E190,{4U,7U,8U}},
{ROXL_E190,{5U,7U,8U}},
{ROXL_E190,{6U,7U,8U}},
{ROXL_E190,{7U,7U,8U}},
{ROL_E198,{0U,7U,8U}},
{ROL_E198,{1U,7U,8U}},
{ROL_E198,{2U,7U,8U}},
{ROL_E198,{3U,7U,8U}},
{ROL_E198,{4U,7U,8U}},
{ROL_E198,{5U,7U,8U}},
{ROL_E198,{6U,7U,8U}},
{ROL_E198,{7U,7U,8U}},
{ASL_E1A0,{0U,7U,8U}},
{ASL_E1A0,{1U,7U,8U}},
{ASL_E1A0,{2U,7U,8U}},
{ASL_E1A0,{3U,7U,8U}},
{ASL_E1A0,{4U,7U,8U}},
{ASL_E1A0,{5U,7U,8U}},
{ASL_E1A0,{6U,7U,8U}},
{ASL_E1A0,{7U,7U,8U}},
{LSL_E1A8,{0U,7U,8U}},
{LSL_E1A8,{1U,7U,8U}},
{LSL_E1A8,{2U,7U,8U}},
{LSL_E1A8,{3U,7U,8U}},
{LSL_E1A8,{4U,7U,8U}},
{LSL_E1A8,{5U,7U,8U}},
{LSL_E1A8,{6U,7U,8U}},
{LSL_E1A8,{7U,7U,8U}},
{ROXL_E1B0,{0U,7U,8U}},
{ROXL_E1B0,{1U,7U,8U}},
{ROXL_E1B0,{2U,7U,8U}},
{ROXL_E1B0,{3U,7U,8U}},
{ROXL_E1B0,{4U,7U,8U}},
{ROXL_E1B0,{5U,7U,8U}},
{ROXL_E1B0,{6U,7U,8U}},
{ROXL_E1B0,{7U,7U,8U}},
{ROL_E1B8,{0U,7U,8U}},
{ROL_E1B8,{1U,7U,8U}},
{ROL_E1B8,{2U,7U,8U}},
{ROL_E1B8,{3U,7U,8U}},
{ROL_E1B8,{4U,7U,8U}},
{ROL_E1B8,{5U,7U,8U}},
{ROL_E1B8,{6U,7U,8U}},
{ROL_E1B8,{7U,7U,8U}},
{BFINS_EFC0,{0U,0U,0U}},
{BFINS_EFC0,{1U,0U,0U}},
{BFINS_EFC0,{2U,0U,0U}},
{BFINS_EFC0,{3U,0U,0U}},
{BFINS_EFC0,{4U,0U,0U}},
{BFINS_EFC0,{5U,0U,0U}},
{BFINS_EFC0,{6U,0U,0U}},
{BFINS_EFC0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFINS_EFD0,{0U,0U,0U}},
{BFINS_EFD0,{1U,0U,0U}},
{BFINS_EFD0,{2U,0U,0U}},
{BFINS_EFD0,{3U,0U,0U}},
{BFINS_EFD0,{4U,0U,0U}},
{BFINS_EFD0,{5U,0U,0U}},
{BFINS_EFD0,{6U,0U,0U}},
{BFINS_EFD0,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{BFINS_EFE8,{0U,0U,0U}},
{BFINS_EFE8,{1U,0U,0U}},
{BFINS_EFE8,{2U,0U,0U}},
{BFINS_EFE8,{3U,0U,0U}},
{BFINS_EFE8,{4U,0U,0U}},
{BFINS_EFE8,{5U,0U,0U}},
{BFINS_EFE8,{6U,0U,0U}},
{BFINS_EFE8,{7U,0U,0U}},
{BFINS_EFF0,{0U,0U,0U}},
{BFINS_EFF0,{1U,0U,0U}},
{BFINS_EFF0,{2U,0U,0U}},
{BFINS_EFF0,{3U,0U,0U}},
{BFINS_EFF0,{4U,0U,0U}},
{BFINS_EFF0,{5U,0U,0U}},
{BFINS_EFF0,{6U,0U,0U}},
{BFINS_EFF0,{7U,0U,0U}},
{BFINS_EFF8,{0U,0U,0U}},
{BFINS_EFF9,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PFLUSH030_F010,{0U,0U,0U}},
{PFLUSH030_F010,{1U,0U,0U}},
{PFLUSH030_F010,{2U,0U,0U}},
{PFLUSH030_F010,{3U,0U,0U}},
{PFLUSH030_F010,{4U,0U,0U}},
{PFLUSH030_F010,{5U,0U,0U}},
{PFLUSH030_F010,{6U,0U,0U}},
{PFLUSH030_F010,{7U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PFLUSH030_F028,{0U,0U,0U}},
{PFLUSH030_F028,{1U,0U,0U}},
{PFLUSH030_F028,{2U,0U,0U}},
{PFLUSH030_F028,{3U,0U,0U}},
{PFLUSH030_F028,{4U,0U,0U}},
{PFLUSH030_F028,{5U,0U,0U}},
{PFLUSH030_F028,{6U,0U,0U}},
{PFLUSH030_F028,{7U,0U,0U}},
{PFLUSH030_F030,{0U,0U,0U}},
{PFLUSH030_F030,{1U,0U,0U}},
{PFLUSH030_F030,{2U,0U,0U}},
{PFLUSH030_F030,{3U,0U,0U}},
{PFLUSH030_F030,{4U,0U,0U}},
{PFLUSH030_F030,{5U,0U,0U}},
{PFLUSH030_F030,{6U,0U,0U}},
{PFLUSH030_F030,{7U,0U,0U}},
{PFLUSH030_F038,{0U,0U,0U}},
{PFLUSH030_F039,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PFLUSH040_F500,{0U,0U,0U}},
{PFLUSH040_F500,{0U,1U,0U}},
{PFLUSH040_F500,{0U,2U,0U}},
{PFLUSH040_F500,{0U,3U,0U}},
{PFLUSH040_F500,{0U,4U,0U}},
{PFLUSH040_F500,{0U,5U,0U}},
{PFLUSH040_F500,{0U,6U,0U}},
{PFLUSH040_F500,{0U,7U,0U}},
{PFLUSH040_F500,{1U,0U,0U}},
{PFLUSH040_F500,{1U,1U,0U}},
{PFLUSH040_F500,{1U,2U,0U}},
{PFLUSH040_F500,{1U,3U,0U}},
{PFLUSH040_F500,{1U,4U,0U}},
{PFLUSH040_F500,{1U,5U,0U}},
{PFLUSH040_F500,{1U,6U,0U}},
{PFLUSH040_F500,{1U,7U,0U}},
{PFLUSH040_F500,{2U,0U,0U}},
{PFLUSH040_F500,{2U,1U,0U}},
{PFLUSH040_F500,{2U,2U,0U}},
{PFLUSH040_F500,{2U,3U,0U}},
{PFLUSH040_F500,{2U,4U,0U}},
{PFLUSH040_F500,{2U,5U,0U}},
{PFLUSH040_F500,{2U,6U,0U}},
{PFLUSH040_F500,{2U,7U,0U}},
{PFLUSH040_F500,{3U,0U,0U}},
{PFLUSH040_F500,{3U,1U,0U}},
{PFLUSH040_F500,{3U,2U,0U}},
{PFLUSH040_F500,{3U,3U,0U}},
{PFLUSH040_F500,{3U,4U,0U}},
{PFLUSH040_F500,{3U,5U,0U}},
{PFLUSH040_F500,{3U,6U,0U}},
{PFLUSH040_F500,{3U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PTEST040_F548,{0U,0U,0U}},
{PTEST040_F548,{0U,1U,0U}},
{PTEST040_F548,{0U,2U,0U}},
{PTEST040_F548,{0U,3U,0U}},
{PTEST040_F548,{0U,4U,0U}},
{PTEST040_F548,{0U,5U,0U}},
{PTEST040_F548,{0U,6U,0U}},
{PTEST040_F548,{0U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{PTEST040_F548,{1U,0U,0U}},
{PTEST040_F548,{1U,1U,0U}},
{PTEST040_F548,{1U,2U,0U}},
{PTEST040_F548,{1U,3U,0U}},
{PTEST040_F548,{1U,4U,0U}},
{PTEST040_F548,{1U,5U,0U}},
{PTEST040_F548,{1U,6U,0U}},
{PTEST040_F548,{1U,7U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
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{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}},
{cpuIllegalInstruction,{0U,0U,0U}}
};
uint8_t cpu_opcode_model_mask[65536] = {
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x1F,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x1F,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x1F,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x1F,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1C,0x1C,0x1C,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1C,0x1C,0x1C,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,
0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x1C,0x00,0x00,0x00,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
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0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,
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