mirror of https://github.com/ksherlock/mpw.git
374 lines
11 KiB
C
374 lines
11 KiB
C
/*=========================================================================*/
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/* Fellow */
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/* CPU 68k exception handling functions */
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/* */
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/* Author: Petter Schau */
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/* */
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/* */
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/* Copyright (C) 1991, 1992, 1996 Free Software Foundation, Inc. */
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/* */
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/* This program is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU General Public License as published by */
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/* the Free Software Foundation; either version 2, or (at your option) */
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/* any later version. */
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/* */
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/* This program is distributed in the hope that it will be useful, */
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/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
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/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
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/* GNU General Public License for more details. */
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/* */
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/* You should have received a copy of the GNU General Public License */
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/* along with this program; if not, write to the Free Software Foundation, */
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/* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/*=========================================================================*/
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#include "defs.h"
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#include "CpuModule_Memory.h"
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#include "CpuModule.h"
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#include "CpuModule_Internal.h"
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// MPW
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static cpuLineExceptionFunc cpu_a_line_exception_func = NULL;
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static cpuLineExceptionFunc cpu_f_line_exception_func = NULL;
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void cpuSetALineExceptionFunc(cpuLineExceptionFunc func)
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{
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cpu_a_line_exception_func = func;
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}
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void cpuSetFLineExceptionFunc(cpuLineExceptionFunc func)
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{
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cpu_f_line_exception_func = func;
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}
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/* Function for exiting from mid-instruction exceptions */
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static cpuMidInstructionExceptionFunc cpu_mid_instruction_exception_func;
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static void cpuCallMidInstructionExceptionFunc(void)
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{
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cpu_mid_instruction_exception_func();
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}
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void cpuSetMidInstructionExceptionFunc(cpuMidInstructionExceptionFunc func)
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{
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cpu_mid_instruction_exception_func = func;
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}
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/* Function for notifying the emulator about a reset */
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static cpuResetExceptionFunc cpu_reset_exception_func;
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void cpuCallResetExceptionFunc(void)
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{
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cpu_reset_exception_func();
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}
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void cpuSetResetExceptionFunc(cpuResetExceptionFunc func)
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{
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cpu_reset_exception_func = func;
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}
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static char *cpuGetExceptionName(uint32_t vector_offset)
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{
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char *name;
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if (vector_offset == 0x8)
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name = "Exception: 2 - Bus error";
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else if (vector_offset == 0xc)
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name = "Exception: 3 - Address error";
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else if (vector_offset == 0x10)
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name = "Exception: 4 - Illegal Instruction";
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else if (vector_offset == 0x14)
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name = "Exception: 5 - Integer division by zero";
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else if (vector_offset == 0x18)
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name = "Exception: 6 - CHK, CHK2";
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else if (vector_offset == 0x1c)
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name = "Exception: 7 - FTRAPcc, TRAPcc, TRAPV";
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else if (vector_offset == 0x20)
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name = "Exception: 8 - Privilege Violation";
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else if (vector_offset == 0x24)
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name = "Exception: 9 - Trace";
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else if (vector_offset == 0x28)
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name = "Exception: 10 - A-Line";
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else if (vector_offset == 0x2c)
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name = "Exception: 11 - F-Line";
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else if (vector_offset == 0x38)
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name = "Exception: 14 - Format error";
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else if (vector_offset >= 0x80 && vector_offset <= 0xbc)
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name = "Exception: TRAP";
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else
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name = "Exception: Unknown";
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return name;
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}
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/*===============================================
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Sets up an exception
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===============================================*/
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void cpuExceptionFail(BOOLE executejmp)
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{
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// Avoid endless loop that will crash the emulator.
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// The (odd) address error exception vector contained an odd address.
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cpuCallResetExceptionFunc();
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cpuHardReset();
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cpuSetInstructionTime(132);
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if (executejmp)
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{
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cpuCallMidInstructionExceptionFunc(); // Supposed to be doing setjmp/longjmp back to machine emulator code
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}
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}
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void cpuThrowException(uint32_t vector_offset, uint32_t pc, BOOLE executejmp)
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{
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uint32_t vector_address;
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BOOLE is_address_error_on_sub_020 = (cpuGetModelMajor() < 2 && vector_offset == 0xc);
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BOOLE stack_is_even = !(cpuGetAReg(7) & 1);
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BOOLE vbr_is_even = !(cpuGetVbr() & 1);
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if ((is_address_error_on_sub_020 && !stack_is_even) || !vbr_is_even)
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{
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cpuExceptionFail(executejmp);
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return;
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}
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#ifdef CPU_INSTRUCTION_LOGGING
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cpuCallExceptionLoggingFunc(cpuGetExceptionName(vector_offset), cpuGetOriginalPC(), cpuGetCurrentOpcode());
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#endif
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cpuActivateSSP();
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stack_is_even = !(cpuGetAReg(7) & 1);
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if (is_address_error_on_sub_020 && !stack_is_even)
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{
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cpuExceptionFail(executejmp);
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return;
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}
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cpuStackFrameGenerate((uint16_t) vector_offset, pc);
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// read a memory position
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vector_address = memoryReadLong(cpuGetVbr() + vector_offset);
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if (is_address_error_on_sub_020 && vector_address & 1)
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{
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cpuExceptionFail(executejmp);
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return;
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}
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else
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{
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// set supervisor modus
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cpuSetSR(cpuGetSR() | 0x2000);
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cpuSetSR(cpuGetSR() & 0x3fff);
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// restart cpu, if needed
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cpuSetStop(FALSE);
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cpuInitializeFromNewPC(vector_address);
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uint32_t exceptionCycles = 0;
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switch (vector_offset)
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{
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case 0x08: exceptionCycles = 50; break; // Bus
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case 0x0c: exceptionCycles = 50; break; // Address
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case 0x10: exceptionCycles = 34; break; // Illegal
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case 0x14: exceptionCycles = 42; break; // Division by zero
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case 0x18: exceptionCycles = 28; break; // Chk
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case 0x1c: exceptionCycles = 34; break; // Trapcc/trapv
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case 0x20: exceptionCycles = 34; break; // Privilege
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case 0x24: exceptionCycles = 34; break; // Trace
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case 0x28: exceptionCycles = 34; break; // Line A
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case 0x2c: exceptionCycles = 34; break; // Line F
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case 0x80:
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case 0x84:
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case 0x88:
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case 0x8c:
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case 0x90:
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case 0x94:
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case 0x98:
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case 0x9c:
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case 0xa0:
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case 0xa4:
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case 0xa8:
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case 0xac:
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case 0xb0:
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case 0xb4:
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case 0xb8:
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case 0xbc: exceptionCycles = 34; break; // TRAP
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default: exceptionCycles = 4; break; // Should not come here
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}
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cpuSetInstructionTime(exceptionCycles);
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}
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// If the exception happened mid-instruction...
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if (executejmp)
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{
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cpuCallMidInstructionExceptionFunc(); // Supposed to be doing setjmp/longjmp back to machine emulator code
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}
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}
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void cpuThrowPrivilegeViolationException(void)
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{
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cpuSetInstructionAborted(true);
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// The saved pc points to the instruction causing the violation
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// (And the kickstart excpects pc in the stack frame to be the opcode PC.)
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cpuThrowException(0x20, cpuGetOriginalPC(), FALSE);
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}
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void cpuThrowIllegalInstructionException(BOOLE executejmp)
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{
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cpuSetInstructionAborted(true);
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// The saved pc points to the illegal instruction
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cpuThrowException(0x10, cpuGetOriginalPC(), executejmp);
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}
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void cpuThrowIllegalInstructionExceptionFromBreakpoint(void)
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{
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cpuSetInstructionAborted(true);
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// The saved pc points to the illegal instruction
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cpuThrowException(0x10, cpuGetPC(), FALSE);
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}
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void cpuThrowALineException(void)
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{
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// MPW
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if (cpu_a_line_exception_func)
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{
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uint16_t opcode = memoryReadWord(cpuGetPC() - 2);
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cpu_a_line_exception_func(opcode);
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cpuInitializeFromNewPC(cpuGetPC());
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cpuSetInstructionTime(512);
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return;
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}
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cpuSetInstructionAborted(true);
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// The saved pc points to the a-line instruction
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cpuThrowException(0x28, cpuGetOriginalPC(), FALSE);
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}
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void cpuThrowFLineException(void)
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{
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// MPW
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if (cpu_f_line_exception_func)
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{
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uint16_t opcode = memoryReadWord(cpuGetPC() - 2);
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cpu_f_line_exception_func(opcode);
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cpuInitializeFromNewPC(cpuGetPC());
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cpuSetInstructionTime(512);
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return;
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}
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cpuSetInstructionAborted(true);
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// The saved pc points to the f-line instruction
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cpuThrowException(0x2c, cpuGetOriginalPC(), FALSE);
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}
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void cpuThrowTrapVException(void)
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{
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// The saved pc points to the next instruction, which is now in pc
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cpuThrowException(0x1c, cpuGetPC(), FALSE);
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}
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void cpuThrowDivisionByZeroException(void)
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{
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// The saved pc points to the next instruction, which is now in pc
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cpuThrowException(0x14, cpuGetPC(), FALSE);
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}
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void cpuThrowTrapException(uint32_t vector_no)
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{
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// The saved pc points to the next instruction, which is now in pc
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cpuThrowException(0x80 + vector_no*4, cpuGetPC(), FALSE);
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}
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void cpuThrowChkException(void)
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{
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// The saved pc points to the next instruction, which is now in pc
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cpuThrowException(0x18, cpuGetPC(), FALSE);
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}
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void cpuThrowTraceException(void)
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{
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// The saved pc points to the next instruction, which is now in pc
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cpuThrowException(0x24, cpuGetPC(), FALSE);
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}
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void cpuThrowAddressErrorException(void)
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{
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cpuSetInstructionAborted(true);
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cpuThrowException(0xc, cpuGetPC() - 2, TRUE);
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}
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/*=================*/
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/* Reset exception */
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/*=================*/
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static void cpuThrowResetException000(void)
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{
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cpuSetSR(cpuGetSR() & 0x271f); /* T = 0 */
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cpuSetSR(cpuGetSR() | 0x2700); /* S = 1, ilvl = 7 */
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cpuSetVbr(0);
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cpuSetSspDirect(cpuGetInitialSP()); /* ssp = fake vector 0 */
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cpuInitializeFromNewPC(cpuGetInitialPC()); /* pc = fake vector 1 */
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}
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static void cpuThrowResetException010(void)
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{
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cpuSetSR(cpuGetSR() & 0x271f); /* T = 0 */
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cpuSetSR(cpuGetSR() | 0x2700); /* S = 1, ilvl = 7 */
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cpuSetVbr(0);
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cpuSetSspDirect(cpuGetInitialSP()); /* ssp = fake vector 0 */
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cpuInitializeFromNewPC(cpuGetInitialPC()); /* pc = fake vector 1 */
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}
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static void cpuThrowResetException020(void)
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{
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cpuSetSR(cpuGetSR() & 0x271f); /* T1T0 = 0, M = 0 */
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cpuSetSR(cpuGetSR() | 0x2700); /* S = 1, ilvl = 7 */
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cpuSetVbr(0);
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cpuSetCacr(0); /* E = 0, F = 0 */
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cpuSetCaar(0);
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/* Invalidate cache, we don't have one */
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cpuSetSspDirect(cpuGetInitialSP()); /* ssp = fake vector 0 */
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cpuInitializeFromNewPC(cpuGetInitialPC()); /* pc = fake vector 1 */
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}
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static void cpuThrowResetException030(void)
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{
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cpuSetSR(cpuGetSR() & 0x271f); /* T1T0 = 0, M = 0 */
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cpuSetSR(cpuGetSR() | 0x2700); /* S = 1, ilvl = 7 */
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cpuSetVbr(0);
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cpuSetCacr(0); /* E = 0, F = 0 */
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cpuSetCaar(0);
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/* Invalidate cache, we don't have one */
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cpuSetSspDirect(cpuGetInitialSP()); /* ssp = fake vector 0 */
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cpuInitializeFromNewPC(cpuGetInitialPC()); /* pc = fake vector 1 */
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}
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/*============================*/
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/* Performs a Reset exception */
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/*============================*/
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void cpuThrowResetException(void)
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{
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cpuSetStop(FALSE);
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switch (cpuGetModelMajor())
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{
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case 0:
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cpuThrowResetException000();
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break;
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case 1:
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cpuThrowResetException010();
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break;
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case 2:
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cpuThrowResetException020();
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break;
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case 3:
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cpuThrowResetException030();
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break;
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}
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}
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