mirror of https://github.com/ksherlock/mpw.git
117 lines
4.4 KiB
C
117 lines
4.4 KiB
C
/*=========================================================================*/
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/* Fellow */
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/* 68000 interrupt handling */
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/* */
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/* Author: Petter Schau */
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/* */
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/* Copyright (C) 1991, 1992, 1996 Free Software Foundation, Inc. */
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/* */
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/* This program is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU General Public License as published by */
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/* the Free Software Foundation; either version 2, or (at your option) */
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/* any later version. */
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/* */
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/* This program is distributed in the hope that it will be useful, */
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/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
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/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
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/* GNU General Public License for more details. */
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/* */
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/* You should have received a copy of the GNU General Public License */
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/* along with this program; if not, write to the Free Software Foundation, */
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/* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/*=========================================================================*/
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#include "defs.h"
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#include "CpuModule_Memory.h"
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#include "CpuModule.h"
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#include "CpuModule_Internal.h"
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/* Function for checking pending interrupts */
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cpuCheckPendingInterruptsFunc cpu_check_pending_interrupts_func;
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void cpuCheckPendingInterrupts(void)
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{
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if (cpuGetRaiseInterrupt()) return;
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cpu_check_pending_interrupts_func();
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}
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void cpuSetCheckPendingInterruptsFunc(cpuCheckPendingInterruptsFunc func)
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{
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cpu_check_pending_interrupts_func = func;
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}
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uint32_t cpuActivateSSP(void)
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{
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uint32_t currentSP = cpuGetAReg(7);
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// check supervisor bit number (bit 13) within the system byte of the status register
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if (!cpuGetFlagSupervisor())
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{
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// we are in user mode, thus save user stack pointer (USP)
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cpuSetUspDirect(currentSP);
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currentSP = cpuGetSspDirect();
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if (cpuGetModelMajor() >= 2)
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{
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if (cpuGetFlagMaster())
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{
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currentSP = cpuGetMspDirect();
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}
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}
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cpuSetAReg(7, currentSP);
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}
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return currentSP;
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}
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// Retrns TRUE if the CPU is in the stopped state,
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// this allows our scheduling queue to start
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// scheduling CPU events again.
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BOOLE cpuSetIrqLevel(uint32_t new_interrupt_level)
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{
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cpuSetRaiseInterrupt(TRUE);
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cpuSetRaiseInterruptLevel(new_interrupt_level);
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if (cpuGetStop())
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{
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cpuSetStop(FALSE);
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return TRUE;
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}
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return FALSE;
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}
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/*============================================================
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Transfers control to an interrupt routine
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============================================================*/
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void cpuSetUpInterrupt(uint32_t new_interrupt_level)
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{
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uint16_t vector_offset = (uint16_t) (0x60 + new_interrupt_level*4);
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uint32_t vector_address = memoryReadLong(cpuGetVbr() + vector_offset);
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cpuActivateSSP(); // Switch to using ssp or msp. Loads a7 and preserves usp if we came from user-mode.
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cpuStackFrameGenerate(vector_offset, cpuGetPC()); // This will end up on msp if master is enabled, or on the ssp/isp if not.
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cpuSetSR(cpuGetSR() & 0x38ff); // Clear interrupt level
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cpuSetSR(cpuGetSR() | 0x2000); // Set supervisor mode
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cpuSetSR(cpuGetSR() | (uint16_t)(new_interrupt_level << 8)); // Set interrupt level
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#ifdef CPU_INSTRUCTION_LOGGING
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cpuCallInterruptLoggingFunc(new_interrupt_level, vector_address);
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#endif
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if (cpuGetModelMajor() >= 2 && cpuGetModelMajor() < 6)
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{
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if (cpuGetFlagMaster())
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{ // If the cpu was in master mode, preserve msp, and switch to using ssp (isp) in a7.
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uint32_t oldA7 = cpuGetAReg(7);
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cpuSetMspDirect(oldA7);
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cpuSetAReg(7, cpuGetSspDirect());
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cpuFrame1(vector_offset, cpuGetPC()); // Make the throwaway frame on ssp/isp
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cpuSetSR(cpuGetSR() & 0xefff); // Clear master bit
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}
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}
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cpuInitializeFromNewPC(vector_address);
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cpuSetStop(FALSE);
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cpuSetRaiseInterrupt(FALSE);
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}
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