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powermac-rom/NanoKernel/NKPowerCalls.s

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Auto-generate per-file function lists
2018-06-30 08:00:35 +00:00
; AUTO-GENERATED SYMBOL LIST
; IMPORTS:
; NKCache
; FlushCaches
; NKInterrupts
; IntReturn
; wordfill
; NKThud
; panic
; EXPORTS:
; InitIdleVecTable (=> NKInit)
; kcPowerDispatch (=> NKInit)
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
#### ## ## #### ######## ## ## ######## ###### ######## ######## ##
## ### ## ## ## ## ## ## ## ## ## ## ## ##
## #### ## ## ## ## ## ## ## ## ## ## ##
## ## ## ## ## ## ## ## ###### ## ## ######## ##
## ## #### ## ## ## ## ## ## ## ## ## ##
## ## ### ## ## ## ## ## ## ## ## ## ## ##
#### ## ## #### ## ### ######## ###### ## ######## ########
; When we are asked via a PowerDispatch call to put a CPU into a non-full-
; on pwrmgt state, we will point its SPRG3 to this table. Any of these
; three interrupts will return the CPU to full-on mode, and we will return
; from the PowerDispatch call. Called at NK init time.
Initial commit
2017-11-19 04:11:07 +00:00
align kIntAlign
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
InitIdleVecTable
Initial commit
2017-11-19 04:11:07 +00:00
mflr r9
llabel r23, panic
add r23, r23, r25
Clarify exceptions
2018-05-13 14:17:07 +00:00
addi r8, r1, PSA.VecBaseIdle
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
li r22, VecTable.Size
Initial commit
2017-11-19 04:11:07 +00:00
bl wordfill
mtlr r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
llabel r23, IntReturnToFullOn
Initial commit
2017-11-19 04:11:07 +00:00
add r23, r23, r25
stw r23, VecTable.SystemResetVector(r8)
stw r23, VecTable.ExternalIntVector(r8)
stw r23, VecTable.DecrementerVector(r8)
blr
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
######## #### ###### ######## ### ######## ###### ## ##
## ## ## ## ## ## ## ## ## ## ## ## ## ##
## ## ## ## ## ## ## ## ## ## ## ##
## ## ## ###### ######## ## ## ## ## #########
## ## ## ## ## ######### ## ## ## ##
## ## ## ## ## ## ## ## ## ## ## ## ##
######## #### ###### ## ## ## ## ###### ## ##
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Called using 68k `$FE0F` or PPC `twi ... 5`
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; ARG selector r3 (0-11), ...
Initial commit
2017-11-19 04:11:07 +00:00
align kIntAlign
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
kcPowerDispatch
Initial commit
2017-11-19 04:11:07 +00:00
mtcr r7
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r4, KDP.TestIntMaskInit(r1)
cmplwi cr7, r3, 11
Initial commit
2017-11-19 04:11:07 +00:00
mr r9, r13
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
bc BO_IF, 8, @use_provided_mcr
lwz r9, PSA.MCR(r1)
@use_provided_mcr
Initial commit
2017-11-19 04:11:07 +00:00
and. r8, r4, r9
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bgt cr7, PowerEarlyReturnError ; invalid selector
bne PowerEarlyReturnSuccess
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
cmplwi cr7, r3, 11
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq cr7, PwrInfiniteLoop
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
cmplwi cr7, r3, 8
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq cr7, PwrSuspendSystem
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
cmplwi cr7, r3, 9
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq cr7, PwrSetICTC
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Fall through to 0-7: PwrIdle
##### ######## #### ######## ## ########
## ## ## ## ## ## ## ## ##
## ## ## ## ## ## ## ##
## ## ####### ## ## ## ## ## ######
## ## ## ## ## ## ## ##
## ## ## ## ## ## ## ##
##### ## #### ######## ######## ########
; Selector 0-7
; Set the CPU static pwrmgt state to doze, idle or sleep, then return to
; full-on when we get an interrupt.
; ARG r3 & 1: which of the two pre-programmed pwrmgt states to invoke (see NKProcFlagsTbl.s)
; r3 & 4: whether to flush L1 and L2 caches
; Different 603+ chips have static power management states named "doze",
; "nap" and "sleep". A state is selected by setting the corresponding bit
; in HID0. The state is then invoked by setting MSR[POW]. The state is
; ended by a decrementer interrupt (doze/nap only) or external interrupt.
; This is a short term CPU-specific state, *not* system-wide "sleep".
; Because the NK timer code sets the decrementer, we can be sure that we
; will not miss a timer firing.
PwrIdle
; Get us some breathing room
_RegRangeToContextBlock r26, r31
; Activate the interrupt table that will rouse the CPU
mfsprg r31, 3 ; will restore r31 => SPRG3 after state exited
Clarify exceptions
2018-05-13 14:17:07 +00:00
addi r8, r1, PSA.VecBaseIdle
Initial commit
2017-11-19 04:11:07 +00:00
mtsprg 3, r8
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Save argument & 4 (run-cache-code flag)
rlwinm r26, r3, 0, 29, 29
; Choose from the NK's two pre-programmed pwrmgt states for this CPU.
; Fail if we find zero (e.g. on the 601).
; arg pwrmgt state selector => r3
; r3 & 1 0=fail 1=DOZE 2=NAP 3=SLEEP
; ------ ---------------------------
; 0 (CpuSpecificByte1 >> 6) & 3
; 1 (CpuSpecificByte1 >> 4) & 3
clrlwi r3, r3, 30
lbz r8, KDP.CpuSpecificByte1(r1)
slwi r3, r3, 1
addi r3, r3, 26
rlwnm r3, r8, r3, 30, 31
cmpwi r3, 0
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq PowerEarlyRestoreReturnError
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Depending on pre-programmed flags, set:
; HID0[NHR] ("not hard reset" flag)
; HID0[ptrmgt state selected above]
lbz r9, KDP.CpuSpecificByte2(r1)
cmpwi r9, 0
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq @set_neither
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
mfspr r27, hid0 ; will restore r27 => HID0 when system wakes below
Initial commit
2017-11-19 04:11:07 +00:00
mr r8, r27
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
cmpwi r9, 1
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq @set_only_nhr
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
oris r9, r3, 0x0100 ; set bit 7
srw r9, r9, r9 ; shift right by 0-3
rlwimi r8, r9, 0, 8, 10 ; keep bits 8/9/10
@set_only_nhr
oris r8, r8, 1 ; also set NHR
Initial commit
2017-11-19 04:11:07 +00:00
mtspr hid0, r8
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
@set_neither
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Flush L1 and L2 caches if argument & 4
cmplwi r26, 4
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beql FlushCaches
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Set MSR bits to enter the selected pwrmgt state
mfmsr r8
ori r8, r8, 0x8002 ; Always set MSR[EE] and MSR[RI] so we can wake!
cmplwi r3, 0 ; If using HID0[pwrmgt state], set MSR[POW] so it takes effect
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq @no_pow
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
oris r8, r8, 4
@no_pow
sync ; Apply MSR!
Initial commit
2017-11-19 04:11:07 +00:00
mtmsr r8
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Loop while the state takes effect, then jump 4 bytes forward when we cop an interrupt
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
b *
IntReturnToFullOn
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Restore HID0 from r27, assuming that we mangled it
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lbz r8, KDP.CpuSpecificByte2(r1)
cmpwi r8, 0
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq @hid_was_not_changed
Initial commit
2017-11-19 04:11:07 +00:00
mtspr hid0, r27
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
@hid_was_not_changed
; Restore registers and return successfully to caller.
; Not sure about the decrementer stuff.
Initial commit
2017-11-19 04:11:07 +00:00
mfsprg r1, 2
mtlr r1
mfsprg r1, 1
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lis r9, 0x7fff
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r8, dec
mtspr dec, r9
mtspr dec, r8
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
li r3, 0
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
PowerCallRestoreReturn
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
mtsprg 3, r31 ; saved SPRG3 above
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
_RegRangeFromContextBlock r26, r31
Initial commit
2017-11-19 04:11:07 +00:00
Reverse userspace sync primitives Namely queues, semaphores, critical regions, event groups and "notifications". The MP calls implementing these services have been named after their MPLibrary wrapper functions. This convention will be followed in the future (no more NKCreateEvent).
2018-02-17 16:57:01 +00:00
b IntReturn
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Return islands for other calls
PowerEarlyRestoreReturnError
Initial commit
2017-11-19 04:11:07 +00:00
li r3, -0x7267
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
b PowerCallRestoreReturn
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
PowerEarlyReturnSuccess
li r3, 0
Reverse userspace sync primitives Namely queues, semaphores, critical regions, event groups and "notifications". The MP calls implementing these services have been named after their MPLibrary wrapper functions. This convention will be followed in the future (no more NKCreateEvent).
2018-02-17 16:57:01 +00:00
b IntReturn
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
PowerEarlyReturnError
li r3, -1
Reverse userspace sync primitives Namely queues, semaphores, critical regions, event groups and "notifications". The MP calls implementing these services have been named after their MPLibrary wrapper functions. This convention will be followed in the future (no more NKCreateEvent).
2018-02-17 16:57:01 +00:00
b IntReturn
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
####### ###### ## ## ###### ######## ######## ## ## ########
## ## ## ## ## ## ## ## ## ## ## ### ## ## ##
## ## ## ## ## ## ## ## ## #### ## ## ##
####### ###### ## ## ###### ######## ###### ## ## ## ## ##
## ## ## ## ## ## ## ## ## #### ## ##
## ## ## ## ## ## ## ## ## ## ## ### ## ##
####### ###### ####### ###### ## ######## ## ## ########
; Selector 8
; Put this, the last scheduled CPU, into SLEEP mode.
; Save state. Call ActuallySuspend. Restore state. Return.
PwrSuspendSystem
; Cannot sleep if multiple CPUs are scheduled
Initial commit
2017-11-19 04:11:07 +00:00
mfsprg r9, 0
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r8, EWA.CPUBase + CPU.LLL + LLL.Freeform(r9)
lwz r9, CoherenceGroup.ScheduledCpuCount(r8)
cmpwi r9, 1
Initial commit
2017-11-19 04:11:07 +00:00
li r3, -0x7267
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bgt IntReturn
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Some breathing room
_RegRangeToContextBlock r26, r31
bl FlushCaches
; Disable both L1 caches (via HID0)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, hid0
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
rlwinm r9, r9, 0, 18, 16 ; unset HID0[DCE] (data cache enable)
rlwinm r9, r9, 0, 17, 15 ; unset HID0[ICE] (inst cache enable)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr hid0, r9
sync
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Disable L2 cache (via L2CR, if present)
lwz r26, KDP.ProcessorInfo + NKProcessorInfo.ProcessorFlags(r1)
andi. r26, r26, 1 << NKProcessorInfo.hasL2CR
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq @no_need_to_deactivate_l2
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, l2cr
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
clrlwi r9, r9, 1 ; unset L2CR[L2E]
Initial commit
2017-11-19 04:11:07 +00:00
mtspr l2cr, r9
sync
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
addi r8, r1, PSA.ProcessorState
stw r9, NKProcessorState.saveL2CR(r8)
@no_need_to_deactivate_l2
; Save some GPRs
stw r7, ContextBlock.Flags(r6)
_RegRangeToContextBlock r2, r5
_RegRangeToContextBlock r14, r25
stw r13, ContextBlock.CR(r6)
; Save floats
andi. r8, r11, 0x2000 ; MSR[FP]
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq @no_save_float
Initial commit
2017-11-19 04:11:07 +00:00
mfmsr r8
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
ori r8, r8, 0x2000 ; ensure that MSR bit is set?
Initial commit
2017-11-19 04:11:07 +00:00
mtmsr r8
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
_FloatRangeToContextBlock f0, f16
Initial commit
2017-11-19 04:11:07 +00:00
mffs f0
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
_FloatRangeToContextBlock f17, f31
stfd f0, ContextBlock.PageInSystemHeap(r6) ; ???
@no_save_float
; Save misc SPRs
Initial commit
2017-11-19 04:11:07 +00:00
mfxer r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
addi r16, r1, PSA.ProcessorState
stw r9, ContextBlock.XER(r6)
Initial commit
2017-11-19 04:11:07 +00:00
mfctr r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, ContextBlock.CTR(r6)
stw r12, ContextBlock.FE000000(r6)
stw r10, NKProcessorState.saveSRR0(r16)
stw r11, NKProcessorState.saveSRR1(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, hid0
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveHID0(r16)
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Save timebase
@tb_retry
Initial commit
2017-11-19 04:11:07 +00:00
mftbu r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveTBU(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mftb r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveTBL(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mftbu r8
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveTBU(r16)
Initial commit
2017-11-19 04:11:07 +00:00
cmpw r8, r9
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne @tb_retry
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Save MSR
Initial commit
2017-11-19 04:11:07 +00:00
mfmsr r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveMSR(r16)
; Save SDR1
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, sdr1
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveSDR1(r16)
; Save BAT registers
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, dbat0u
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveDBAT0u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, dbat0l
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveDBAT0l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, dbat1u
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveDBAT1u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, dbat1l
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveDBAT1l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, dbat2u
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveDBAT2u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, dbat2l
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveDBAT2l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, dbat3u
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveDBAT3u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, dbat3l
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveDBAT3l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, ibat0u
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveIBAT0u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, ibat0l
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveIBAT0l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, ibat1u
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveIBAT1u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, ibat1l
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveIBAT1l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, ibat2u
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveIBAT2u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, ibat2l
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveIBAT2l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, ibat3u
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveIBAT3u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, ibat3l
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveIBAT3l(r16)
; Save SPRGs
Initial commit
2017-11-19 04:11:07 +00:00
mfsprg r9, 0
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveSPRG0(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfsprg r9, 1
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveSPRG1(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfsprg r9, 2
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveSPRG2(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mfsprg r9, 3
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveSPRG3(r16)
; Save ContextBlock ptr
stw r6, NKProcessorState.saveContextPtr(r16)
; Do the thing. The BL gives us a useful restore address.
bl ActuallySuspend
lwz r1, EWA.r1(r1)
addi r16, r1, PSA.ProcessorState
; Do something evil to the segment registers?
lisori r8, 0x1000000
lis r9, 0
@srin_loop
subis r9, r9, 0x1000
Initial commit
2017-11-19 04:11:07 +00:00
addis r8, r8, -0x10
mr. r9, r9
mtsrin r8, r9
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne @srin_loop
Initial commit
2017-11-19 04:11:07 +00:00
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Reactivate L1 cache
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, hid0
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
li r8, 0x800 ; HID0[ICFI] invalidate icache
ori r8, r8, 0x200 ; HID0[SPD] disable spec cache accesses
Initial commit
2017-11-19 04:11:07 +00:00
or r9, r9, r8
mtspr hid0, r9
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
andc r9, r9, r8 ; now undo that?
Initial commit
2017-11-19 04:11:07 +00:00
mtspr hid0, r9
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
ori r9, r9, 0x8000 ; set HID0[ICE]
ori r9, r9, 0x4000 ; set HID0[DCE]
Initial commit
2017-11-19 04:11:07 +00:00
mtspr hid0, r9
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Reactivate L2 cache
lwz r26, KDP.ProcessorInfo + NKProcessorInfo.ProcessorFlags(r1)
andi. r26, r26, 1 << NKProcessorInfo.hasL2CR
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq @no_need_to_reactivate_l2
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r8, KDP.ProcessorInfo + NKProcessorInfo.ProcessorL2DSize(r1)
Initial commit
2017-11-19 04:11:07 +00:00
mr. r8, r8
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq @no_need_to_reactivate_l2
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, hid0
rlwinm r9, r9, 0, 12, 10
mtspr hid0, r9
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveL2CR(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr l2cr, r9
sync
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lis r8, 0x20 ; set L2CR[L2I] to invalidate L2 cache
Initial commit
2017-11-19 04:11:07 +00:00
or r8, r9, r8
mtspr l2cr, r8
sync
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; spin while bottom bit (reserved) is set???
@l2_reactivate_loop
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r8, l2cr
rlwinm. r8, r8, 31, 0, 0
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne @l2_reactivate_loop
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r8, l2cr
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lisori r9, 0xffdfffff ; unset bit 6 (reserved?)
Initial commit
2017-11-19 04:11:07 +00:00
and r8, r8, r9
mtspr l2cr, r8
sync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r8, hid0
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
oris r8, r8, 0x0010 ; set HID0[HIGH_BAT_EN] (was HID0[DOZE])
Initial commit
2017-11-19 04:11:07 +00:00
mtspr hid0, r8
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r8, l2cr
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
oris r8, r8, 0x8000 ; set L2CR[L2E]
Initial commit
2017-11-19 04:11:07 +00:00
mtspr l2cr, r8
sync
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
@no_need_to_reactivate_l2
; Still working on this...
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r6, NKProcessorState.saveContextPtr(r16)
lwz r7, ContextBlock.Flags(r6)
lwz r13, ContextBlock.CR(r6)
lwz r9, ContextBlock.CTR(r6)
Initial commit
2017-11-19 04:11:07 +00:00
mtctr r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r12, ContextBlock.FE000000(r6)
lwz r9, ContextBlock.XER(r6)
Initial commit
2017-11-19 04:11:07 +00:00
mtxer r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r10, NKProcessorState.saveSRR0(r16)
lwz r11, NKProcessorState.saveSRR1(r16)
; Load some GPRs
_RegRangeFromContextBlock r2, r5
_RegRangeFromContextBlock r14, r15
_RegRangeFromContextBlock r17, r31
; Load floats
andi. r8, r11, 0x2000 ; MSR[FP]
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq @no_restore_float
Initial commit
2017-11-19 04:11:07 +00:00
mfmsr r8
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
ori r8, r8, 0x2000 ; ensure that MSR bit is set?
Initial commit
2017-11-19 04:11:07 +00:00
mtmsr r8
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lfd f31, ContextBlock.PageInSystemHeap(r6) ; bit odd
_FloatRangeFromContextBlock f0, f8
mtfsf 0xff, f31
_FloatRangeFromContextBlock f9, f31
@no_restore_float
; Load HID0, plus ICE and DCE bits
lwz r9, NKProcessorState.saveHID0(r16)
Initial commit
2017-11-19 04:11:07 +00:00
ori r9, r9, 0x8000
ori r9, r9, 0x4000
mtspr hid0, r9
sync
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Load timebase
lwz r9, NKProcessorState.saveTBU(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr tbu, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveTBL(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr tbl, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Set decrementer quite low?
li r9, 1
Initial commit
2017-11-19 04:11:07 +00:00
mtspr dec, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Load MSR
lwz r9, NKProcessorState.saveMSR(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtmsr r9
sync
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Load SDR1
lwz r9, NKProcessorState.saveSDR1(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr sdr1, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Load SPRGs
lwz r9, NKProcessorState.saveSPRG0(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtsprg 0, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveSPRG1(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtsprg 1, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveSPRG2(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtsprg 2, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveSPRG3(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtsprg 3, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Load BAT registers
lwz r9, NKProcessorState.saveDBAT0u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr dbat0u, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveDBAT0l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr dbat0l, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveDBAT1u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr dbat1u, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveDBAT1l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr dbat1l, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveDBAT2u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr dbat2u, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveDBAT2l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr dbat2l, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveDBAT3u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr dbat3u, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveDBAT3l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr dbat3l, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveIBAT0u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr ibat0u, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveIBAT0l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr ibat0l, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveIBAT1u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr ibat1u, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveIBAT1l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr ibat1l, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveIBAT2u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr ibat2u, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveIBAT2l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr ibat2l, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveIBAT3u(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr ibat3u, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r9, NKProcessorState.saveIBAT3l(r16)
Initial commit
2017-11-19 04:11:07 +00:00
mtspr ibat3l, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; And reclaim the register we were using for ProcessorState
_RegRangeFromContextBlock r16, r16
; Hooray! We're back!
li r3, 0
Reverse userspace sync primitives Namely queues, semaphores, critical regions, event groups and "notifications". The MP calls implementing these services have been named after their MPLibrary wrapper functions. This convention will be followed in the future (no more NKCreateEvent).
2018-02-17 16:57:01 +00:00
b IntReturn
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
### ###### ## ## ###### ######## ######## ## ## ######## ###
## ## ## ## ## ## ## ## ## ## ### ## ## ## ##
## ## ## ## ## ## ## ## #### ## ## ## ##
## ###### ## ## ###### ######## ###### ## ## ## ## ## ##
## ## ## ## ## ## ## ## #### ## ## ##
## ## ## ## ## ## ## ## ## ## ### ## ## ##
### ###### ####### ###### ## ######## ## ## ######## ###
ActuallySuspend
Initial commit
2017-11-19 04:11:07 +00:00
mflr r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
stw r9, NKProcessorState.saveReturnAddr(r16)
stw r1, NKProcessorState.saveKernelDataPtr(r16)
addi r9, r16, NKProcessorState.saveKernelDataPtr - 4 ; so that 4(r9) goes to r1?
li r0, 0
stw r9, 0(0)
lisori r9, 'Lars'
stw r9, 4(0)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, hid0
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
andis. r9, r9, 0x0020 ; mask: only HID0[SLEEP]
Initial commit
2017-11-19 04:11:07 +00:00
mtspr hid0, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
mfmsr r8
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
oris r8, r8, 0x0004 ; set MSR[POW] (but not yet)
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r9, hid0
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
ori r9, r9, 0x8000 ; set HID0[ICE]
Initial commit
2017-11-19 04:11:07 +00:00
mtspr hid0, r9
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Get address of this table => r9
bl @l
@l mflr r9
addi r9, r9, @table_of_sixteen_zeros - @l
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lisori r1, 0xcafebabe
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
b @evil_aligned_sleep_loop
align 8
@evil_aligned_sleep_loop
Initial commit
2017-11-19 04:11:07 +00:00
sync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
mtmsr r8 ; sleep now
Initial commit
2017-11-19 04:11:07 +00:00
isync
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
cmpwi r1, 0
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq @evil_aligned_sleep_loop ; re-sleep until the world is sane?
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
lwz r0, 0(r9)
andi. r1, r1, 0
b @evil_aligned_sleep_loop ; actually, there is no escape
Initial commit
2017-11-19 04:11:07 +00:00
align 8
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
@table_of_sixteen_zeros
dcb.b 16, 0
####### ###### ######## ######## #### ###### ######## ######
## ## ## ## ## ## ## ## ## ## ## ##
## ## ## ## ## ## ## ## ##
######## ###### ###### ## ## ## ## ##
## ## ## ## ## ## ## ##
## ## ## ## ## ## ## ## ## ## ## ##
####### ###### ######## ## #### ###### ## ######
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Selector 9
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; Set ICTC (Instruction Cache Throttling Control) register
; (used to reduce temp without adjusting clock)
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
; ARG value r5
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
PwrSetICTC
Initial commit
2017-11-19 04:11:07 +00:00
mtspr 1019, r5
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
li r3, 0
Reverse userspace sync primitives Namely queues, semaphores, critical regions, event groups and "notifications". The MP calls implementing these services have been named after their MPLibrary wrapper functions. This convention will be followed in the future (no more NKCreateEvent).
2018-02-17 16:57:01 +00:00
b IntReturn
Initial commit
2017-11-19 04:11:07 +00:00
Reverse power management functions This is part of the work to get the mini running well. The kcPowerDispatch and kcCacheDispatch entry points were explored. The dead code implementing a Timer "Heartbeat" was also used to label some structures better.
2018-03-09 11:46:39 +00:00
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; Selector 11
PwrInfiniteLoop
b *
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