2020-02-28 16:04:28 +00:00
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/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-20 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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2019-08-23 21:30:33 +00:00
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#ifndef PCI_DEVICE_H
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#define PCI_DEVICE_H
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2021-10-23 18:17:47 +00:00
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#include <devices/common/mmiodevice.h>
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#include <devices/common/pci/pcihost.h>
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2020-05-12 18:55:45 +00:00
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#include <cinttypes>
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#include <string>
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2019-08-23 21:30:33 +00:00
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/* convert little-endian DWORD to big-endian DWORD */
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#define LE2BE(x) (x >> 24) | ((x & 0x00FF0000) >> 8) | ((x & 0x0000FF00) << 8) | (x << 24)
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2020-03-31 19:12:06 +00:00
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/** PCI configuration space registers offsets */
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2019-08-23 21:30:33 +00:00
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enum {
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2020-05-12 18:55:45 +00:00
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CFG_REG_CMD = 0x04, // command/status register
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CFG_REG_BAR0 = 0x10, // base address register 0
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CFG_REG_BAR1 = 0x14, // base address register 1
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CFG_REG_BAR2 = 0x18, // base address register 2
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CFG_REG_BAR3 = 0x1C, // base address register 3
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CFG_REG_BAR4 = 0x20, // base address register 4
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CFG_REG_BAR5 = 0x24, // base address register 5
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CFG_EXP_BASE = 0x30, // expansion ROM base
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2019-08-23 21:30:33 +00:00
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};
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class PCIDevice : public MMIODevice {
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public:
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2020-05-12 18:55:45 +00:00
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PCIDevice(std::string name) {
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this->pci_name = name;
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};
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2019-08-23 21:30:33 +00:00
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virtual ~PCIDevice() = default;
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2020-03-31 19:12:06 +00:00
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virtual bool supports_io_space(void) = 0;
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/* I/O space access methods */
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2020-05-12 18:55:45 +00:00
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virtual bool pci_io_read(uint32_t offset, uint32_t size, uint32_t* res) {
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return false;
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};
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2020-03-31 19:12:06 +00:00
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2020-05-12 18:55:45 +00:00
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virtual bool pci_io_write(uint32_t offset, uint32_t value, uint32_t size) {
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return false;
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};
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2020-03-31 19:12:06 +00:00
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2019-08-23 21:30:33 +00:00
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/* configuration space access methods */
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2020-05-12 18:55:45 +00:00
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virtual uint32_t pci_cfg_read(uint32_t reg_offs, uint32_t size) = 0;
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virtual void pci_cfg_write(uint32_t reg_offs, uint32_t value, uint32_t size) = 0;
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2019-08-23 21:30:33 +00:00
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2020-05-12 18:55:45 +00:00
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virtual void set_host(PCIHost* host_instance) {
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this->host_instance = host_instance;
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};
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2019-08-23 21:30:33 +00:00
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protected:
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2020-05-12 18:55:45 +00:00
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std::string pci_name; // human-readable device name
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PCIHost* host_instance; // host bridge instance to call back
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uint32_t base_addr; // base address register 0
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2019-08-23 21:30:33 +00:00
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};
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#endif /* PCI_DEVICE_H */
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