clang-format everything

This commit is contained in:
Waqar Ahmed 2020-05-12 23:55:45 +05:00
parent a5c63c1b09
commit 0ab9380be3
49 changed files with 2718 additions and 3104 deletions

78
.clang-format Normal file
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@ -0,0 +1,78 @@
Language: Cpp
AccessModifierOffset: -4
AlignAfterOpenBracket: AlwaysBreak
AlignConsecutiveAssignments: true
AlignConsecutiveDeclarations: false
#AlignConsecutiveMacros: false
AlignEscapedNewlines: Right
AlignOperands: false
AlignTrailingComments: true
AllowAllArgumentsOnNextLine: true
AllowAllConstructorInitializersOnNextLine: true
AllowAllParametersOfDeclarationOnNextLine: true
AllowShortBlocksOnASingleLine: false
AllowShortCaseLabelsOnASingleLine: false
AllowShortFunctionsOnASingleLine: Empty
AllowShortIfStatementsOnASingleLine: Never
#AllowShortLambdasOnASingleLine: All
AllowShortLoopsOnASingleLine: false
AlwaysBreakAfterDefinitionReturnType: None
AlwaysBreakAfterReturnType: None
AlwaysBreakBeforeMultilineStrings: true
AlwaysBreakTemplateDeclarations: Yes
BinPackArguments: false
BinPackParameters: false
BreakBeforeBinaryOperators: None
BreakBeforeBraces: Attach
BreakBeforeTernaryOperators: true
BreakConstructorInitializers: BeforeComma
#BreakInheritanceList: BeforeComma
BreakStringLiterals: true
ColumnLimit: 100
CompactNamespaces: true
ConstructorInitializerAllOnOneLineOrOnePerLine: true
ConstructorInitializerIndentWidth: 4
ContinuationIndentWidth: 4
Cpp11BracedListStyle: true
DerivePointerAlignment: false
FixNamespaceComments: true
IncludeBlocks: Preserve
IndentCaseLabels: false
IndentPPDirectives: AfterHash
IndentWidth: 4
IndentWrappedFunctionNames: true
KeepEmptyLinesAtTheStartOfBlocks: false
MaxEmptyLinesToKeep: 2
NamespaceIndentation: None
PenaltyBreakAssignment: 50
PenaltyBreakBeforeFirstCallParameter: 0
PenaltyBreakComment: 100
PenaltyBreakFirstLessLess: 200
PenaltyBreakString: 100
#PenaltyBreakTemplateDeclaration: 0
PenaltyExcessCharacter: 10
PenaltyReturnTypeOnItsOwnLine: 1000
PointerAlignment: Left
ReflowComments: true
SortIncludes: true
SpaceAfterCStyleCast: false
#SpaceAfterLogicalNot: false
SpaceAfterTemplateKeyword: true
SpaceBeforeAssignmentOperators: true
#SpaceBeforeCpp11BracedList: true
#SpaceBeforeCtorInitializerColon: false
#SpaceBeforeInheritanceColon: false
SpaceBeforeParens: ControlStatements
#SpaceBeforeRangeBasedForLoopColon: false
#SpaceInEmptyBlock: false
SpaceInEmptyParentheses: false
SpacesBeforeTrailingComments: 4
SpacesInAngles: false
SpacesInCStyleCastParentheses: false
SpacesInContainerLiterals: false
SpacesInParentheses: false
SpacesInSquareBrackets: false
#Standard: c++17
TabWidth: 4
UseTab: Never

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@ -22,23 +22,22 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
// The Power-specific opcodes for the processor - ppcopcodes.cpp
// Any shared opcodes are in ppcopcodes.cpp
#include <thirdparty/loguru/loguru.hpp>
#include <iostream>
#include <array>
#include <stdio.h>
#include <stdexcept>
#include "ppcemu.h"
#include "ppcmmu.h"
#include <array>
#include <cmath>
#include <iostream>
#include <limits>
#include <stdexcept>
#include <stdio.h>
#include <thirdparty/loguru/loguru.hpp>
void power_abs() {
ppc_grab_regsda();
if (ppc_result_a == 0x80000000) {
ppc_result_d = ppc_result_a;
}
else {
} else {
ppc_result_d = ppc_result_a & 0x7FFFFFFF;
}
ppc_store_result_regd();
@ -50,8 +49,7 @@ void power_absdot() {
if (ppc_result_a == 0x80000000) {
ppc_result_d = ppc_result_a;
}
else {
} else {
ppc_result_d = ppc_result_a & 0x7FFFFFFF;
}
ppc_changecrf0(ppc_result_d);
@ -64,8 +62,7 @@ void power_abso() {
ppc_result_d = ppc_result_a;
ppc_state.spr[SPR::XER] |= 0x40000000;
}
else {
} else {
ppc_result_d = ppc_result_a & 0x7FFFFFFF;
}
ppc_store_result_regd();
@ -77,8 +74,7 @@ void power_absodot() {
ppc_result_d = ppc_result_a;
ppc_state.spr[SPR::XER] |= 0x40000000;
}
else {
} else {
ppc_result_d = ppc_result_a & 0x7FFFFFFF;
}
ppc_changecrf0(ppc_result_d);
@ -118,45 +114,45 @@ void power_clcsdot() {
void power_div() {
ppc_grab_regsdab();
ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
ppc_state.spr[SPR::MQ] = (ppc_result_a | ppc_state.spr[SPR::MQ]) % ppc_result_b;
ppc_store_result_regd();
}
void power_divdot() {
ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
ppc_state.spr[SPR::MQ] = (ppc_result_a | ppc_state.spr[SPR::MQ]) % ppc_result_b;
}
void power_divo() {
ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
ppc_state.spr[SPR::MQ] = (ppc_result_a | ppc_state.spr[SPR::MQ]) % ppc_result_b;
}
void power_divodot() {
ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
ppc_result_d = (ppc_result_a | ppc_state.spr[SPR::MQ]) / ppc_result_b;
ppc_state.spr[SPR::MQ] = (ppc_result_a | ppc_state.spr[SPR::MQ]) % ppc_result_b;
}
void power_divs() {
ppc_grab_regsdab();
ppc_result_d = ppc_result_a / ppc_result_b;
ppc_result_d = ppc_result_a / ppc_result_b;
ppc_state.spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
ppc_store_result_regd();
}
void power_divsdot() {
ppc_result_d = ppc_result_a / ppc_result_b;
ppc_result_d = ppc_result_a / ppc_result_b;
ppc_state.spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
}
void power_divso() {
ppc_result_d = ppc_result_a / ppc_result_b;
ppc_result_d = ppc_result_a / ppc_result_b;
ppc_state.spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
}
void power_divsodot() {
ppc_result_d = ppc_result_a / ppc_result_b;
ppc_result_d = ppc_result_a / ppc_result_b;
ppc_state.spr[SPR::MQ] = (ppc_result_a % ppc_result_b);
}
@ -164,8 +160,7 @@ void power_doz() {
ppc_grab_regsdab();
if (((int32_t)ppc_result_a) > ((int32_t)ppc_result_b)) {
ppc_result_d = 0;
}
else {
} else {
ppc_result_d = ~ppc_result_a + ppc_result_b + 1;
}
ppc_store_result_rega();
@ -175,8 +170,7 @@ void power_dozdot() {
ppc_grab_regsdab();
if (((int32_t)ppc_result_a) > ((int32_t)ppc_result_b)) {
ppc_result_d = 0;
}
else {
} else {
ppc_result_d = ~ppc_result_a + ppc_result_b + 1;
}
ppc_changecrf0(ppc_result_d);
@ -186,8 +180,7 @@ void power_dozdot() {
void power_dozo() {
if (((int32_t)ppc_result_a) > ((int32_t)ppc_result_b)) {
ppc_result_d = 0;
}
else {
} else {
ppc_result_d = ~ppc_result_a + ppc_result_b + 1;
}
}
@ -195,8 +188,7 @@ void power_dozo() {
void power_dozodot() {
if (((int32_t)ppc_result_a) > ((int32_t)ppc_result_b)) {
ppc_result_d = 0;
}
else {
} else {
ppc_result_d = ~ppc_result_a + ppc_result_b + 1;
}
}
@ -205,8 +197,7 @@ void power_dozi() {
ppc_grab_regsdab();
if (((int32_t)ppc_result_a) > simm) {
ppc_result_d = 0;
}
else {
} else {
ppc_result_d = ~ppc_result_a + simm + 1;
}
ppc_store_result_rega();
@ -215,7 +206,7 @@ void power_dozi() {
void power_lscbx() {
ppc_grab_regsdab();
uint32_t bytes_copied = 0;
bool match_found = false;
bool match_found = false;
uint32_t shift_amount = 0;
uint8_t return_value;
uint8_t byte_compared = (uint8_t)((ppc_state.spr[SPR::XER] & 0xFF00) >> 8);
@ -223,7 +214,7 @@ void power_lscbx() {
return;
}
uint32_t bytes_to_load = (ppc_state.spr[SPR::XER] & 0x7f) + 1;
ppc_effective_address = (reg_a == 0) ? ppc_result_b : ppc_result_a + ppc_result_b;
ppc_effective_address = (reg_a == 0) ? ppc_result_b : ppc_result_a + ppc_result_b;
do {
ppc_effective_address++;
bytes_to_load--;
@ -259,9 +250,8 @@ void power_lscbx() {
if (shift_amount == 3) {
shift_amount = 0;
reg_d = (reg_d + 1) & 0x1F;
}
else {
reg_d = (reg_d + 1) & 0x1F;
} else {
shift_amount++;
}
} while (bytes_to_load > 0);
@ -275,19 +265,17 @@ void power_lscbxdot() {
void power_maskg() {
ppc_grab_regssab();
uint32_t mask_start = ppc_result_d & 31;
uint32_t mask_end = ppc_result_b & 31;
uint32_t mask_start = ppc_result_d & 31;
uint32_t mask_end = ppc_result_b & 31;
uint32_t insert_mask = 0;
if (mask_start < (mask_end + 1)) {
for (uint32_t i = mask_start; i < mask_end; i++) {
insert_mask |= (0x80000000 >> i);
}
}
else if (mask_start == (mask_end + 1)) {
} else if (mask_start == (mask_end + 1)) {
insert_mask = 0xFFFFFFFF;
}
else {
} else {
insert_mask = 0xFFFFFFFF;
for (uint32_t i = (mask_end + 1); i < (mask_start - 1); i++) {
insert_mask &= (~(0x80000000 >> i));
@ -300,19 +288,17 @@ void power_maskg() {
void power_maskgdot() {
ppc_grab_regssab();
uint32_t mask_start = ppc_result_d & 31;
uint32_t mask_end = ppc_result_b & 31;
uint32_t mask_start = ppc_result_d & 31;
uint32_t mask_end = ppc_result_b & 31;
uint32_t insert_mask = 0;
if (mask_start < (mask_end + 1)) {
for (uint32_t i = mask_start; i < mask_end; i++) {
insert_mask |= (0x80000000 >> i);
}
}
else if (mask_start == (mask_end + 1)) {
} else if (mask_start == (mask_end + 1)) {
insert_mask = 0xFFFFFFFF;
}
else {
} else {
insert_mask = 0xFFFFFFFF;
for (uint32_t i = (mask_end + 1); i < (mask_start - 1); i++) {
insert_mask &= (~(0x80000000 >> i));
@ -326,7 +312,7 @@ void power_maskgdot() {
void power_maskir() {
ppc_grab_regssab();
uint32_t mask_insert = ppc_result_a;
uint32_t insert_rot = 0x80000000;
uint32_t insert_rot = 0x80000000;
do {
if (ppc_result_b & insert_rot) {
mask_insert &= ~insert_rot;
@ -342,7 +328,7 @@ void power_maskir() {
void power_maskirdot() {
ppc_grab_regssab();
uint32_t mask_insert = ppc_result_a;
uint32_t insert_rot = 0x80000000;
uint32_t insert_rot = 0x80000000;
do {
if (ppc_result_b & insert_rot) {
mask_insert &= ~insert_rot;
@ -360,41 +346,37 @@ void power_mul() {
ppc_grab_regsdab();
uint64_t product;
product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
ppc_result_d = ((uint32_t)(product >> 32));
product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
ppc_result_d = ((uint32_t)(product >> 32));
ppc_state.spr[SPR::MQ] = ((uint32_t)(product));
ppc_store_result_regd();
}
void power_muldot() {
ppc_grab_regsdab();
uint64_t product;
product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
ppc_result_d = ((uint32_t)(product >> 32));
product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
ppc_result_d = ((uint32_t)(product >> 32));
ppc_state.spr[SPR::MQ] = ((uint32_t)(product));
ppc_changecrf0(ppc_result_d);
ppc_store_result_regd();
}
void power_mulo() {
uint64_t product;
product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
ppc_result_d = ((uint32_t)(product >> 32));
product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
ppc_result_d = ((uint32_t)(product >> 32));
ppc_state.spr[SPR::MQ] = ((uint32_t)(product));
}
void power_mulodot() {
uint64_t product;
product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
ppc_result_d = ((uint32_t)(product >> 32));
product = ((uint64_t)ppc_result_a) * ((uint64_t)ppc_result_b);
ppc_result_d = ((uint32_t)(product >> 32));
ppc_state.spr[SPR::MQ] = ((uint32_t)(product));
}
void power_nabs() {
@ -417,20 +399,18 @@ void power_nabsodot() {
void power_rlmi() {
ppc_grab_regssab();
unsigned rot_mb = (ppc_cur_instruction >> 6) & 31;
unsigned rot_me = (ppc_cur_instruction >> 1) & 31;
uint32_t rot_amt = ppc_result_b & 31;
unsigned rot_mb = (ppc_cur_instruction >> 6) & 31;
unsigned rot_me = (ppc_cur_instruction >> 1) & 31;
uint32_t rot_amt = ppc_result_b & 31;
uint32_t insert_mask = 0;
if (rot_mb < (rot_me + 1)) {
for (uint32_t i = rot_mb; i < rot_me; i++) {
insert_mask |= (0x80000000 >> i);
}
}
else if (rot_mb == (rot_me + 1)) {
} else if (rot_mb == (rot_me + 1)) {
insert_mask = 0xFFFFFFFF;
}
else {
} else {
insert_mask = 0xFFFFFFFF;
for (uint32_t i = (rot_me + 1); i < (rot_mb - 1); i++) {
insert_mask &= (~(0x80000000 >> i));
@ -438,7 +418,7 @@ void power_rlmi() {
}
uint32_t step2 = (ppc_result_d << rot_amt) | (ppc_result_d >> rot_amt);
ppc_result_a = step2 & insert_mask;
ppc_result_a = step2 & insert_mask;
ppc_store_result_rega();
}
@ -446,8 +426,7 @@ void power_rrib() {
ppc_grab_regssab();
if (ppc_result_d & 0x80000000) {
ppc_result_a |= (0x80000000 >> ppc_result_b);
}
else {
} else {
ppc_result_a &= ~(0x80000000 >> ppc_result_b);
}
ppc_store_result_rega();
@ -457,8 +436,7 @@ void power_rribdot() {
ppc_grab_regssab();
if (ppc_result_d & 0x80000000) {
ppc_result_a |= (0x80000000 >> ppc_result_b);
}
else {
} else {
ppc_result_a &= ~(0x80000000 >> ppc_result_b);
}
ppc_changecrf0(ppc_result_a);
@ -468,26 +446,26 @@ void power_rribdot() {
void power_sle() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
uint32_t rot_amt = ppc_result_b & 31;
uint32_t rot_amt = ppc_result_b & 31;
for (uint32_t i = 31; i > rot_amt; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_final = ((ppc_result_d << rot_amt) | (ppc_result_d >> (32 - rot_amt)));
uint32_t insert_final = ((ppc_result_d << rot_amt) | (ppc_result_d >> (32 - rot_amt)));
ppc_state.spr[SPR::MQ] = insert_final & insert_mask;
ppc_result_a = insert_final & insert_mask;
ppc_result_a = insert_final & insert_mask;
ppc_store_result_rega();
}
void power_sledot() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
uint32_t rot_amt = ppc_result_b & 31;
uint32_t rot_amt = ppc_result_b & 31;
for (uint32_t i = 31; i > rot_amt; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_final = ((ppc_result_d << rot_amt) | (ppc_result_d >> (32 - rot_amt)));
uint32_t insert_final = ((ppc_result_d << rot_amt) | (ppc_result_d >> (32 - rot_amt)));
ppc_state.spr[SPR::MQ] = insert_final & insert_mask;
ppc_result_a = insert_final & insert_mask;
ppc_result_a = insert_final & insert_mask;
ppc_changecrf0(ppc_result_a);
ppc_store_result_rega();
}
@ -495,12 +473,12 @@ void power_sledot() {
void power_sleq() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
uint32_t rot_amt = ppc_result_b & 31;
uint32_t rot_amt = ppc_result_b & 31;
for (uint32_t i = 31; i > rot_amt; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_start = ((ppc_result_d << rot_amt) | (ppc_result_d >> (rot_amt - 31)));
uint32_t insert_end = ppc_state.spr[SPR::MQ];
uint32_t insert_end = ppc_state.spr[SPR::MQ];
for (int i = 0; i < 32; i++) {
if (insert_mask & (1 << i)) {
@ -509,7 +487,7 @@ void power_sleq() {
}
}
ppc_result_a = insert_end;
ppc_result_a = insert_end;
ppc_state.spr[SPR::MQ] = insert_start;
ppc_store_result_rega();
}
@ -517,12 +495,12 @@ void power_sleq() {
void power_sleqdot() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
uint32_t rot_amt = ppc_result_b & 31;
uint32_t rot_amt = ppc_result_b & 31;
for (uint32_t i = 31; i > rot_amt; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_start = ((ppc_result_d << rot_amt) | (ppc_result_d >> (rot_amt - 31)));
uint32_t insert_end = ppc_state.spr[SPR::MQ];
uint32_t insert_end = ppc_state.spr[SPR::MQ];
for (int i = 0; i < 32; i++) {
if (insert_mask & (1 << i)) {
@ -531,7 +509,7 @@ void power_sleqdot() {
}
}
ppc_result_a = insert_end;
ppc_result_a = insert_end;
ppc_state.spr[SPR::MQ] = insert_start;
ppc_changecrf0(ppc_result_a);
ppc_store_result_rega();
@ -540,12 +518,12 @@ void power_sleqdot() {
void power_sliq() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
for (uint32_t i = 31; i > rot_sh; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_start = ((ppc_result_d << rot_sh) | (ppc_result_d >> (rot_sh - 31)));
uint32_t insert_end = ppc_state.spr[SPR::MQ];
uint32_t insert_end = ppc_state.spr[SPR::MQ];
for (int i = 0; i < 32; i++) {
if (insert_mask & (1 << i)) {
@ -554,7 +532,7 @@ void power_sliq() {
}
}
ppc_result_a = insert_end & insert_mask;
ppc_result_a = insert_end & insert_mask;
ppc_state.spr[SPR::MQ] = insert_start;
ppc_store_result_rega();
}
@ -562,12 +540,12 @@ void power_sliq() {
void power_sliqdot() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
for (uint32_t i = 31; i > rot_sh; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_start = ((ppc_result_d << rot_sh) | (ppc_result_d >> (rot_sh - 31)));
uint32_t insert_end = ppc_state.spr[SPR::MQ];
uint32_t insert_end = ppc_state.spr[SPR::MQ];
for (int i = 0; i < 32; i++) {
if (insert_mask & (1 << i)) {
@ -576,7 +554,7 @@ void power_sliqdot() {
}
}
ppc_result_a = insert_end & insert_mask;
ppc_result_a = insert_end & insert_mask;
ppc_state.spr[SPR::MQ] = insert_start;
ppc_changecrf0(ppc_result_a);
ppc_store_result_rega();
@ -585,12 +563,12 @@ void power_sliqdot() {
void power_slliq() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
for (uint32_t i = 31; i > rot_sh; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_start = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
uint32_t insert_end = ppc_state.spr[SPR::MQ];
uint32_t insert_end = ppc_state.spr[SPR::MQ];
for (int i = 0; i < 32; i++) {
if (insert_mask & (1 << i)) {
@ -599,7 +577,7 @@ void power_slliq() {
}
}
ppc_result_a = insert_end;
ppc_result_a = insert_end;
ppc_state.spr[SPR::MQ] = insert_start;
ppc_store_result_rega();
}
@ -607,12 +585,12 @@ void power_slliq() {
void power_slliqdot() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
for (uint32_t i = 31; i > rot_sh; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_start = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
uint32_t insert_end = ppc_state.spr[SPR::MQ];
uint32_t insert_end = ppc_state.spr[SPR::MQ];
for (int i = 0; i < 32; i++) {
if (insert_mask & (1 << i)) {
@ -621,7 +599,7 @@ void power_slliqdot() {
}
}
ppc_result_a = insert_end;
ppc_result_a = insert_end;
ppc_state.spr[SPR::MQ] = insert_start;
ppc_changecrf0(ppc_result_a);
ppc_store_result_rega();
@ -662,26 +640,26 @@ void power_sraqdot() {
void power_sre() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
uint32_t rot_amt = ppc_result_b & 31;
uint32_t rot_amt = ppc_result_b & 31;
for (uint32_t i = 31; i > rot_amt; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_final = ((ppc_result_d >> rot_amt) | (ppc_result_d << (32 - rot_amt)));
uint32_t insert_final = ((ppc_result_d >> rot_amt) | (ppc_result_d << (32 - rot_amt)));
ppc_state.spr[SPR::MQ] = insert_final & insert_mask;
ppc_result_a = insert_final;
ppc_result_a = insert_final;
ppc_store_result_rega();
}
void power_sredot() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
uint32_t rot_amt = ppc_result_b & 31;
uint32_t rot_amt = ppc_result_b & 31;
for (uint32_t i = 31; i > rot_amt; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_final = ((ppc_result_d >> rot_amt) | (ppc_result_d << (32 - rot_amt)));
uint32_t insert_final = ((ppc_result_d >> rot_amt) | (ppc_result_d << (32 - rot_amt)));
ppc_state.spr[SPR::MQ] = insert_final & insert_mask;
ppc_result_a = insert_final;
ppc_result_a = insert_final;
ppc_changecrf0(ppc_result_a);
ppc_store_result_rega();
}
@ -697,12 +675,12 @@ void power_sreadot() {
void power_sreq() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
unsigned rot_sh = ppc_result_b & 31;
unsigned rot_sh = ppc_result_b & 31;
for (uint32_t i = 31; i > rot_sh; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_start = ((ppc_result_d >> rot_sh) | (ppc_result_d << (32 - rot_sh)));
uint32_t insert_end = ppc_state.spr[SPR::MQ];
uint32_t insert_end = ppc_state.spr[SPR::MQ];
for (int i = 0; i < 32; i++) {
if (insert_mask & (1 << i)) {
@ -711,7 +689,7 @@ void power_sreq() {
}
}
ppc_result_a = insert_end;
ppc_result_a = insert_end;
ppc_state.spr[SPR::MQ] = insert_start;
ppc_store_result_rega();
}
@ -719,12 +697,12 @@ void power_sreq() {
void power_sreqdot() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
unsigned rot_sh = ppc_result_b & 31;
unsigned rot_sh = ppc_result_b & 31;
for (uint32_t i = 31; i > rot_sh; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_start = ((ppc_result_d >> rot_sh) | (ppc_result_d << (32 - rot_sh)));
uint32_t insert_end = ppc_state.spr[SPR::MQ];
uint32_t insert_end = ppc_state.spr[SPR::MQ];
for (int i = 0; i < 32; i++) {
if (insert_mask & (1 << i)) {
@ -733,7 +711,7 @@ void power_sreqdot() {
}
}
ppc_result_a = insert_end;
ppc_result_a = insert_end;
ppc_state.spr[SPR::MQ] = insert_start;
ppc_changecrf0(ppc_result_a);
ppc_store_result_rega();
@ -742,12 +720,12 @@ void power_sreqdot() {
void power_sriq() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
for (uint32_t i = 31; i > rot_sh; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_start = ((ppc_result_d >> rot_sh) | (ppc_result_d << (32 - rot_sh)));
uint32_t insert_end = ppc_state.spr[SPR::MQ];
uint32_t insert_end = ppc_state.spr[SPR::MQ];
for (int i = 0; i < 32; i++) {
if (insert_mask & (1 << i)) {
@ -756,7 +734,7 @@ void power_sriq() {
}
}
ppc_result_a = insert_end;
ppc_result_a = insert_end;
ppc_state.spr[SPR::MQ] = insert_start;
ppc_store_result_rega();
}
@ -764,12 +742,12 @@ void power_sriq() {
void power_sriqdot() {
ppc_grab_regssa();
uint32_t insert_mask = 0;
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
unsigned rot_sh = (ppc_cur_instruction >> 11) & 31;
for (uint32_t i = 31; i > rot_sh; i--) {
insert_mask |= (1 << i);
}
uint32_t insert_start = ((ppc_result_d >> rot_sh) | (ppc_result_d << (32 - rot_sh)));
uint32_t insert_end = ppc_state.spr[SPR::MQ];
uint32_t insert_end = ppc_state.spr[SPR::MQ];
for (int i = 0; i < 32; i++) {
if (insert_mask & (1 << i)) {
@ -778,7 +756,7 @@ void power_sriqdot() {
}
}
ppc_result_a = insert_end;
ppc_result_a = insert_end;
ppc_state.spr[SPR::MQ] = insert_start;
ppc_changecrf0(ppc_result_a);
ppc_store_result_rega();

File diff suppressed because it is too large Load Diff

View File

@ -26,17 +26,17 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
#include <string>
typedef struct PPCDisasmContext {
uint32_t instr_addr;
uint32_t instr_code;
uint32_t instr_addr;
uint32_t instr_code;
std::string instr_str;
bool simplified; /* true if we should output simplified mnemonics */
bool simplified; /* true if we should output simplified mnemonics */
} PPCDisasmContext;
std::string disassemble_single(PPCDisasmContext *ctx);
std::string disassemble_single(PPCDisasmContext* ctx);
int test_ppc_disasm(void);
/** sign-extend an integer. */
#define SIGNEXT(x, sb) ((x) | (((x) & (1 << (sb))) ? ~((1 << (sb))-1) : 0))
#define SIGNEXT(x, sb) ((x) | (((x) & (1 << (sb))) ? ~((1 << (sb)) - 1) : 0))
#endif /* PPCDISASM_H */

View File

@ -22,22 +22,22 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
#ifndef PPCEMU_H
#define PPCEMU_H
#include <cinttypes>
#include <string>
#include <setjmp.h>
#include "endianswap.h"
#include "devices/memctrlbase.h"
#include "endianswap.h"
#include <cinttypes>
#include <setjmp.h>
#include <string>
//Uncomment this to help debug the emulator further
// Uncomment this to help debug the emulator further
//#define EXHAUSTIVE_DEBUG 1
//Uncomment this to have a more graceful approach to illegal opcodes
// Uncomment this to have a more graceful approach to illegal opcodes
//#define ILLEGAL_OP_SAFE 1
//Uncomment this to use GCC built-in functions.
// Uncomment this to use GCC built-in functions.
//#define USE_GCC_BUILTINS 1
//Uncomment this to use Visual Studio built-in functions.
// Uncomment this to use Visual Studio built-in functions.
//#define USE_VS_BUILTINS 1
enum endian_switch { big_end = 0, little_end = 1 };
@ -45,8 +45,8 @@ enum endian_switch { big_end = 0, little_end = 1 };
typedef void (*PPCOpcode)(void);
union FPR_storage {
double dbl64_r; // double floating-point representation
uint64_t int64_r; // double integer representation
double dbl64_r; // double floating-point representation
uint64_t int64_r; // double integer representation
};
/**
@ -65,7 +65,7 @@ fpscr = FP Status and Condition Register
typedef struct struct_ppc_state {
FPR_storage fpr[32];
uint32_t pc; //Referred as the CIA in the PPC manual
uint32_t pc; // Referred as the CIA in the PPC manual
uint32_t gpr[32];
uint32_t cr;
uint32_t fpscr;
@ -73,7 +73,7 @@ typedef struct struct_ppc_state {
uint32_t spr[1024];
uint32_t msr;
uint32_t sr[16];
bool reserve; //reserve bit used for lwarx and stcwx
bool reserve; // reserve bit used for lwarx and stcwx
} SetPRS;
extern SetPRS ppc_state;
@ -94,10 +94,7 @@ enum SPR : int {
};
/** symbolic names for frequently used SPRs */
enum TBR : int {
TBL = 0,
TBU = 1
};
enum TBR : int { TBL = 0, TBU = 1 };
/** symbolic names for common PPC processors */
enum PPC_VER : uint32_t {
@ -147,10 +144,10 @@ SUPERVISOR MODEL
536 - 543 are the Data BAT registers
**/
extern uint32_t opcode_value; //used for interpreting opcodes
extern uint64_t timebase_counter; //used for storing time base value
extern uint32_t opcode_value; // used for interpreting opcodes
extern uint64_t timebase_counter; // used for storing time base value
//Additional steps to prevent overflow?
// Additional steps to prevent overflow?
extern int32_t add_result;
extern int32_t simult_result;
extern uint32_t uiadd_result;
@ -176,19 +173,19 @@ extern uint32_t rot_mb;
extern uint32_t rot_me;
extern uint32_t uimm;
extern uint32_t grab_sr;
extern uint32_t grab_inb; //This is for grabbing the number of immediate bytes for loading and storing
extern uint32_t grab_inb; // This is for grabbing the number of immediate bytes for loading and storing
extern uint32_t ppc_to;
extern int32_t simm;
extern int32_t adr_li;
extern int32_t br_bd;
//Used for GP calcs
// Used for GP calcs
extern uint32_t ppc_result_a;
extern uint32_t ppc_result_b;
extern uint32_t ppc_result_c;
extern uint32_t ppc_result_d;
//Used for FP calcs
// Used for FP calcs
extern uint64_t ppc_result64_a;
extern uint64_t ppc_result64_b;
extern uint64_t ppc_result64_c;
@ -197,7 +194,7 @@ extern uint64_t ppc_result64_d;
/* The precise end of a basic block. */
enum class BB_end_kind {
BB_NONE = 0, /* no basic block end is reached */
BB_NONE = 0, /* no basic block end is reached */
BB_BRANCH = 1, /* a branch instruction is encountered */
BB_EXCEPTION, /* an exception is occured */
BB_RFI /* the rfi instruction is encountered */
@ -215,10 +212,10 @@ enum class Except_Type {
EXC_NO_FPU,
EXC_DECR,
EXC_SYSCALL = 12,
EXC_TRACE = 13
EXC_TRACE = 13
};
//extern bool bb_end;
// extern bool bb_end;
extern BB_end_kind bb_kind;
extern jmp_buf exc_env;
@ -229,23 +226,23 @@ extern bool grab_return;
extern bool power_on;
extern bool is_601; //For PowerPC 601 Emulation
extern bool is_gekko; //For GameCube Emulation
extern bool is_altivec; //For Altivec Emulation
extern bool is_64bit; //For PowerPC G5 Emulation
extern bool is_601; // For PowerPC 601 Emulation
extern bool is_gekko; // For GameCube Emulation
extern bool is_altivec; // For Altivec Emulation
extern bool is_64bit; // For PowerPC G5 Emulation
//Important Addressing Integers
// Important Addressing Integers
extern uint32_t ppc_cur_instruction;
extern uint32_t ppc_effective_address;
extern uint32_t ppc_next_instruction_address;
//Profiling Stats
// Profiling Stats
extern uint32_t mmu_translations_num;
extern uint32_t exceptions_performed;
extern uint32_t supervisor_inst_num;
//Function prototypes
extern void ppc_cpu_init(MemCtrlBase *mem_ctrl, uint32_t proc_version);
// Function prototypes
extern void ppc_cpu_init(MemCtrlBase* mem_ctrl, uint32_t proc_version);
extern void ppc_mmu_init();
void ppc_illegalop();
@ -293,15 +290,13 @@ void ppc_fp_changecrf1();
void ppc_tbr_update();
/* Exception handlers. */
[[noreturn]] void ppc_exception_handler(Except_Type exception_type,
uint32_t srr1_bits);
[[noreturn]] void dbg_exception_handler(Except_Type exception_type,
uint32_t srr1_bits);
[[noreturn]] void ppc_exception_handler(Except_Type exception_type, uint32_t srr1_bits);
[[noreturn]] void dbg_exception_handler(Except_Type exception_type, uint32_t srr1_bits);
//MEMORY DECLARATIONS
// MEMORY DECLARATIONS
extern MemCtrlBase* mem_ctrl_instance;
//The functions used by the PowerPC processor
// The functions used by the PowerPC processor
extern void ppc_bcctr();
extern void ppc_bcctrl();
extern void ppc_bclr();
@ -599,7 +594,7 @@ extern void ppc_fsqrtsdot();
extern void ppc_fcmpo();
extern void ppc_fcmpu();
//Power-specific instructions
// Power-specific instructions
extern void power_abs();
extern void power_absdot();
extern void power_abso();
@ -667,17 +662,17 @@ extern void power_srlqdot();
extern void power_srq();
extern void power_srqdot();
//Gekko instructions
// Gekko instructions
extern void ppc_psq_l();
extern void ppc_psq_lu();
extern void ppc_psq_st();
extern void ppc_psq_stu();
//AltiVec instructions
// AltiVec instructions
//64-bit instructions
// 64-bit instructions
//G5+ instructions
// G5+ instructions
extern void ppc_main_opcode(void);
extern void ppc_exec(void);
@ -685,9 +680,9 @@ extern void ppc_exec_single(void);
extern void ppc_exec_until(uint32_t goal_addr);
/* debugging support API */
void print_gprs(void); /* print content of the general purpose registers */
void print_fprs(void); /* print content of the floating-point registers */
uint64_t get_reg(std::string &reg_name); /* get content of the register reg_name */
void set_reg(std::string &reg_name, uint64_t val); /* set reg_name to val */
void print_gprs(void); /* print content of the general purpose registers */
void print_fprs(void); /* print content of the floating-point registers */
uint64_t get_reg(std::string& reg_name); /* get content of the register reg_name */
void set_reg(std::string& reg_name, uint64_t val); /* set reg_name to val */
#endif /* PPCEMU_H */

View File

@ -21,92 +21,89 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
/** @file Handling of low-level PPC exceptions. */
#include <setjmp.h>
#include <string>
#include <stdexcept>
#include "ppcemu.h"
#include <setjmp.h>
#include <stdexcept>
#include <string>
jmp_buf exc_env; /* Global exception environment. */
[[noreturn]] void ppc_exception_handler(Except_Type exception_type,
uint32_t srr1_bits)
{
[[noreturn]] void ppc_exception_handler(Except_Type exception_type, uint32_t srr1_bits) {
grab_exception = true;
#ifdef PROFILER
#ifdef PROFILER
exceptions_performed++;
#endif
#endif
bb_kind = BB_end_kind::BB_EXCEPTION;
switch(exception_type) {
case Except_Type::EXC_SYSTEM_RESET:
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0100;
break;
switch (exception_type) {
case Except_Type::EXC_SYSTEM_RESET:
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0100;
break;
case Except_Type::EXC_MACHINE_CHECK:
if (!(ppc_state.msr & 0x1000)) {
/* TODO: handle internal checkstop */
}
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0200;
break;
case Except_Type::EXC_MACHINE_CHECK:
if (!(ppc_state.msr & 0x1000)) {
/* TODO: handle internal checkstop */
}
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0200;
break;
case Except_Type::EXC_DSI:
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0300;
break;
case Except_Type::EXC_DSI:
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0300;
break;
case Except_Type::EXC_ISI:
ppc_state.spr[SPR::SRR0] = ppc_next_instruction_address;
ppc_next_instruction_address = 0x0400;
break;
case Except_Type::EXC_ISI:
ppc_state.spr[SPR::SRR0] = ppc_next_instruction_address;
ppc_next_instruction_address = 0x0400;
break;
case Except_Type::EXC_EXT_INT:
ppc_state.spr[SPR::SRR0] = ppc_next_instruction_address;
ppc_next_instruction_address = 0x0500;
break;
case Except_Type::EXC_EXT_INT:
ppc_state.spr[SPR::SRR0] = ppc_next_instruction_address;
ppc_next_instruction_address = 0x0500;
break;
case Except_Type::EXC_ALIGNMENT:
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0600;
break;
case Except_Type::EXC_ALIGNMENT:
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0600;
break;
case Except_Type::EXC_PROGRAM:
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0700;
break;
case Except_Type::EXC_PROGRAM:
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0700;
break;
case Except_Type::EXC_NO_FPU:
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0800;
break;
case Except_Type::EXC_NO_FPU:
ppc_state.spr[SPR::SRR0] = ppc_state.pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0800;
break;
case Except_Type::EXC_DECR:
ppc_state.spr[SPR::SRR0] = (ppc_state.pc & 0xFFFFFFFC) + 4;
ppc_next_instruction_address = 0x0900;
break;
case Except_Type::EXC_DECR:
ppc_state.spr[SPR::SRR0] = (ppc_state.pc & 0xFFFFFFFC) + 4;
ppc_next_instruction_address = 0x0900;
break;
case Except_Type::EXC_SYSCALL:
ppc_state.spr[SPR::SRR0] = (ppc_state.pc & 0xFFFFFFFC) + 4;
ppc_next_instruction_address = 0x0C00;
break;
case Except_Type::EXC_SYSCALL:
ppc_state.spr[SPR::SRR0] = (ppc_state.pc & 0xFFFFFFFC) + 4;
ppc_next_instruction_address = 0x0C00;
break;
case Except_Type::EXC_TRACE:
ppc_state.spr[SPR::SRR0] = (ppc_state.pc & 0xFFFFFFFC) + 4;
ppc_next_instruction_address = 0x0D00;
break;
case Except_Type::EXC_TRACE:
ppc_state.spr[SPR::SRR0] = (ppc_state.pc & 0xFFFFFFFC) + 4;
ppc_next_instruction_address = 0x0D00;
break;
default:
//printf("Unknown exception occured: %X\n", exception_type);
//exit(-1);
break;
default:
// printf("Unknown exception occured: %X\n", exception_type);
// exit(-1);
break;
}
ppc_state.spr[SPR::SRR1] = (ppc_state.msr & 0x0000FF73) | srr1_bits;
ppc_state.msr &= 0xFFFB1041;
/* copy MSR[ILE] to MSR[LE] */
ppc_state.msr = (ppc_state.msr & 0xFFFFFFFE) |
((ppc_state.msr >> 16) & 1);
ppc_state.msr = (ppc_state.msr & 0xFFFFFFFE) | ((ppc_state.msr >> 16) & 1);
if (ppc_state.msr & 0x40) {
ppc_next_instruction_address |= 0xFFF00000;
@ -116,61 +113,59 @@ jmp_buf exc_env; /* Global exception environment. */
}
[[noreturn]] void dbg_exception_handler(Except_Type exception_type,
uint32_t srr1_bits)
{
[[noreturn]] void dbg_exception_handler(Except_Type exception_type, uint32_t srr1_bits) {
std::string exc_descriptor;
switch(exception_type) {
case Except_Type::EXC_SYSTEM_RESET:
exc_descriptor = "System reset exception occured";
break;
switch (exception_type) {
case Except_Type::EXC_SYSTEM_RESET:
exc_descriptor = "System reset exception occured";
break;
case Except_Type::EXC_MACHINE_CHECK:
exc_descriptor = "Machine check exception occured";
break;
case Except_Type::EXC_MACHINE_CHECK:
exc_descriptor = "Machine check exception occured";
break;
case Except_Type::EXC_DSI:
case Except_Type::EXC_ISI:
if (ppc_state.spr[SPR::DSISR] & 0x40000000)
exc_descriptor = "DSI/ISI exception: unmapped memory access";
else if (ppc_state.spr[SPR::DSISR] & 0x08000000)
exc_descriptor = "DSI/ISI exception: access protection violation";
else {
if (exception_type == Except_Type::EXC_DSI)
exc_descriptor = "DSI exception";
else
exc_descriptor = "ISI exception";
}
break;
case Except_Type::EXC_DSI:
case Except_Type::EXC_ISI:
if (ppc_state.spr[SPR::DSISR] & 0x40000000)
exc_descriptor = "DSI/ISI exception: unmapped memory access";
else if (ppc_state.spr[SPR::DSISR] & 0x08000000)
exc_descriptor = "DSI/ISI exception: access protection violation";
else {
if (exception_type == Except_Type::EXC_DSI)
exc_descriptor = "DSI exception";
else
exc_descriptor = "ISI exception";
}
break;
case Except_Type::EXC_EXT_INT:
exc_descriptor = "External interrupt exception occured";
break;
case Except_Type::EXC_EXT_INT:
exc_descriptor = "External interrupt exception occured";
break;
case Except_Type::EXC_ALIGNMENT:
exc_descriptor = "Alignment exception occured";
break;
case Except_Type::EXC_ALIGNMENT:
exc_descriptor = "Alignment exception occured";
break;
case Except_Type::EXC_PROGRAM:
exc_descriptor = "Program exception occured";
break;
case Except_Type::EXC_PROGRAM:
exc_descriptor = "Program exception occured";
break;
case Except_Type::EXC_NO_FPU:
exc_descriptor = "Floating-Point unavailable exception occured";
break;
case Except_Type::EXC_NO_FPU:
exc_descriptor = "Floating-Point unavailable exception occured";
break;
case Except_Type::EXC_DECR:
exc_descriptor = "Decrementer exception occured";
break;
case Except_Type::EXC_DECR:
exc_descriptor = "Decrementer exception occured";
break;
case Except_Type::EXC_SYSCALL:
exc_descriptor = "Syscall exception occured";
break;
case Except_Type::EXC_SYSCALL:
exc_descriptor = "Syscall exception occured";
break;
case Except_Type::EXC_TRACE:
exc_descriptor = "Trace exception occured";
break;
case Except_Type::EXC_TRACE:
exc_descriptor = "Trace exception occured";
break;
}
throw std::invalid_argument(exc_descriptor);

File diff suppressed because it is too large Load Diff

View File

@ -21,20 +21,20 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
// The opcodes for the processor - ppcopcodes.cpp
#include <iostream>
#include <map>
#include <unordered_map>
#include <cinttypes>
#include <array>
#include <stdio.h>
#include <stdexcept>
#include "ppcemu.h"
#include "ppcmmu.h"
#include <array>
#include <cfenv>
#include <cinttypes>
#include <cmath>
#include <iostream>
#include <limits>
#include <map>
#include <stdexcept>
#include <stdio.h>
#include <unordered_map>
//Used for FP calcs
// Used for FP calcs
uint64_t ppc_result64_a;
uint64_t ppc_result64_b;
uint64_t ppc_result64_c;
@ -48,7 +48,7 @@ double ppc_dblresult64_d;
double snan = std::numeric_limits<double>::signaling_NaN();
double qnan = std::numeric_limits<double>::quiet_NaN();
//Storage and register retrieval functions for the floating point functions.
// Storage and register retrieval functions for the floating point functions.
double fp_return_double(uint32_t reg) {
return ppc_state.fpr[reg].dbl64_r;
@ -62,8 +62,7 @@ void ppc_store_sfpresult(bool int_rep) {
if (int_rep) {
ppc_state.fpr[reg_d].int64_r = ppc_result64_d;
ppc_state.fpr[reg_d].dbl64_r = *(double*)&ppc_result64_d;
}
else {
} else {
ppc_state.fpr[reg_d].dbl64_r = ppc_dblresult64_d;
ppc_state.fpr[reg_d].int64_r = *(uint64_t*)&ppc_dblresult64_d;
}
@ -73,8 +72,7 @@ void ppc_store_dfpresult(bool int_rep) {
if (int_rep) {
ppc_state.fpr[reg_d].int64_r = ppc_result64_d;
ppc_state.fpr[reg_d].dbl64_r = *(double*)&ppc_result64_d;
}
else {
} else {
ppc_state.fpr[reg_d].dbl64_r = ppc_dblresult64_d;
ppc_state.fpr[reg_d].int64_r = *(uint64_t*)&ppc_dblresult64_d;
}
@ -85,8 +83,7 @@ void ppc_grab_regsfpdb(bool int_rep) {
reg_b = (ppc_cur_instruction >> 11)