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escc: implement reset commands.
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c946693450
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@ -1,6 +1,6 @@
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/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-21 divingkatae and maximum
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Copyright (C) 2018-22 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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@ -35,16 +35,27 @@ EsccController::EsccController()
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this->reg_ptr = 0;
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}
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void EsccController::reset()
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{
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this->master_int_cntrl &= 0xFC;
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this->master_int_cntrl |= 0xC0;
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this->ch_a->reset(true);
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this->ch_b->reset(true);
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}
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uint8_t EsccController::read(uint8_t reg_offset)
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{
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switch(reg_offset) {
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case EsccReg::Port_B_Cmd:
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LOG_F(9, "ESCC: reading Port B register RR%d", this->reg_ptr);
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this->reg_ptr = 0;
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return this->ch_b->read_reg(reg_offset);
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break;
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case EsccReg::Port_A_Cmd:
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LOG_F(9, "ESCC: reading Port A register RR%d", this->reg_ptr);
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this->reg_ptr = 0;
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return this->ch_a->read_reg(reg_offset);
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break;
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default:
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LOG_F(INFO, "ESCC: reading register %d", reg_offset);
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@ -70,7 +81,29 @@ void EsccController::write(uint8_t reg_offset, uint8_t value)
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void EsccController::write_internal(EsccChannel *ch, uint8_t value)
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{
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if (this->reg_ptr) {
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ch->write_reg(this->reg_ptr, value);
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// chip-specific registers
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if (this->reg_ptr == 9) {
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// see if some reset is requested
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switch(value & 0xC0) {
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case RESET_CH_B:
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this->master_int_cntrl &= 0xDF;
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this->ch_b->reset(false);
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break;
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case RESET_CH_A:
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this->master_int_cntrl &= 0xDF;
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this->ch_a->reset(false);
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break;
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case RESET_ESCC:
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this->reset();
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break;
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}
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this->master_int_cntrl = value & 0x3F;
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} else if (this->reg_ptr == 2) {
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this->int_vec = value;
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} else { // channel-specific registers
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ch->write_reg(this->reg_ptr, value);
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}
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this->reg_ptr = 0;
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} else {
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this->reg_ptr = value & 7;
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@ -82,9 +115,44 @@ void EsccController::write_internal(EsccChannel *ch, uint8_t value)
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}
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}
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// ======================== ESCC Channel methods ==============================
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void EsccChannel::reset(bool hw_reset)
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{
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this->write_regs[1] &= 0x24;
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this->write_regs[3] &= 0xFE;
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this->write_regs[4] |= 0x04;
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this->write_regs[5] &= 0x61;
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this->write_regs[15] = 0xF8;
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this->read_regs[0] &= 0x3C;
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this->read_regs[0] |= 0x44;
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this->read_regs[1] = 0x06;
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this->read_regs[3] = 0x00;
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this->read_regs[10] = 0x00;
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if (hw_reset) {
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this->write_regs[10] = 0;
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this->write_regs[11] = 8;
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this->write_regs[14] &= 0xC0;
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this->write_regs[14] |= 0x20;
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} else {
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this->write_regs[10] &= 0x60;
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this->write_regs[14] &= 0xC3;
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this->write_regs[14] |= 0x20;
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}
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}
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void EsccChannel::write_reg(int reg_num, uint8_t value)
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{
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this->write_regs[reg_num] = value;
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LOG_F(9, "ESCC: writing 0x%X to Channel %s WR%d", value, this->name.c_str(),
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reg_num);
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}
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uint8_t EsccChannel::read_reg(int reg_num)
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{
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return 0;
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}
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@ -50,16 +50,26 @@ enum WR0Cmd : uint8_t {
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Point_High = 1,
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};
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/** ESCC reset commands. */
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enum {
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RESET_ESCC = 0xC0,
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RESET_CH_A = 0x80,
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RESET_CH_B = 0x40
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};
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/** ESCC Channel class. */
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class EsccChannel {
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public:
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EsccChannel(std::string name) { this->name = name; };
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~EsccChannel() = default;
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void reset(bool hw_reset);
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uint8_t read_reg(int reg_num);
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void write_reg(int reg_num, uint8_t value);
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private:
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std::string name;
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uint8_t read_regs[16];
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uint8_t write_regs[16];
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};
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@ -74,12 +84,15 @@ public:
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void write(uint8_t reg_offset, uint8_t value);
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private:
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void reset();
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void write_internal(EsccChannel* ch, uint8_t value);
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std::unique_ptr<EsccChannel> ch_a;
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std::unique_ptr<EsccChannel> ch_b;
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int reg_ptr; // register pointer for reading/writing (same for both channels)
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uint8_t master_int_cntrl;
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uint8_t int_vec;
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};
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#endif // ESCC_H
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