mirror of
https://github.com/dingusdev/dingusppc.git
synced 2026-04-20 18:17:02 +00:00
Break long lines.
Make them 130 characters or less.
This commit is contained in:
+4
-2
@@ -1,6 +1,6 @@
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/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-23 divingkatae and maximum
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Copyright (C) 2018-25 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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@@ -146,7 +146,9 @@ private:
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std::function<void()> notify_timer_changes;
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std::atomic<uint32_t> id{0};
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bool cb_active = false; // true if a timer callback is executing // FIXME: Do we need this? It gets written in main thread and read in audio thread.
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// FIXME: Do we need this? It gets written in main thread and read in audio thread.
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bool cb_active = false; // true if a timer callback is executing
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};
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#endif // TIMER_MANAGER_H
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+2
-1
@@ -327,7 +327,8 @@ extern bool int_pin;
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extern bool dec_exception_pending;
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extern bool is_601; // For PowerPC 601 Emulation
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extern bool include_601; // For non-PowerPC 601 emulation with 601 extras (matches Mac OS 9 environment which can emulate MPC 601 instructions)
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extern bool include_601; // For non-PowerPC 601 emulation with 601 extras
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// (matches Mac OS 9 environment which can emulate MPC 601 instructions)
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extern bool is_altivec; // For Altivec Emulation
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extern bool is_64bit; // For PowerPC G5 Emulation
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+6
-3
@@ -153,9 +153,12 @@ public:
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op_name_counts.emplace_back(op_name, pair.second);
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}
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size_t top_ops_size = std::min(op_name_counts.size(), size_t(20));
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std::partial_sort(op_name_counts.begin(), op_name_counts.begin() + top_ops_size, op_name_counts.end(), [](const auto& a, const auto& b) {
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return b.second < a.second;
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});
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std::partial_sort(
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op_name_counts.begin(), op_name_counts.begin() + top_ops_size, op_name_counts.end(),
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[](const auto& a, const auto& b) {
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return b.second < a.second;
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}
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);
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op_name_counts.resize(top_ops_size);
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for (const auto& pair : op_name_counts) {
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vars.push_back({.name = "Instruction " + pair.first,
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@@ -302,10 +302,11 @@ static void read_test_float_data() {
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if ((tokens[0].rfind("FCMP") && (ppc_state.fpr[3].int64_r != dest_64)) ||
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(ppc_state.fpscr != check_fpscr) ||
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(ppc_state.cr != check_cr)) {
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cout << "Mismatch: instr=" << tokens[0] << ", src1=" << scientific << dfp_src1 << ", src2=" << scientific << dfp_src2 << ", src3=" << scientific << dfp_src3 << endl;
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cout << "Mismatch: instr=" << tokens[0] << ", src1=" << scientific << dfp_src1
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<< ", src2=" << scientific << dfp_src2 << ", src3=" << scientific << dfp_src3 << endl;
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cout << "expected: dest=0x" << hex << dest_64 << ", FPSCR=0x" << hex << check_fpscr
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<< ", CR=0x"
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<< hex << check_cr << endl;
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<< hex << check_cr << endl;
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cout << "got: dest=0x" << hex << ppc_state.fpr[3].int64_r << ", FPSCR=0x" << hex
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<< ppc_state.fpscr << ", CR=0x" << hex << ppc_state.cr << endl;
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cout << "Test file line #: " << dec << lineno << endl << endl;
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@@ -29,7 +29,9 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
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#include <loguru.hpp>
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AdbMouse::AdbMouse(
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std::string name, uint8_t device_class, int num_buttons, int num_bits, uint16_t resolution) : AdbDevice(name), device_class(device_class), num_buttons(num_buttons), num_bits(num_bits), resolution(resolution) {
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std::string name, uint8_t device_class, int num_buttons, int num_bits, uint16_t resolution
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) : AdbDevice(name), device_class(device_class), num_buttons(num_buttons), num_bits(num_bits), resolution(resolution)
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{
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EventManager::get_instance()->add_mouse_handler(this, &AdbMouse::event_handler);
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this->reset();
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@@ -241,7 +241,8 @@ void AtapiCdrom::perform_packet_command() {
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else {
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disk_image_byte_count = (this->r_byte_count / bytes_per_block) * this->block_size; // whole blocks
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if ((this->r_byte_count % bytes_per_block) > bytes_prolog) { // partial block
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int disk_image_byte_count_partial_block = (this->r_byte_count % bytes_per_block) - bytes_prolog; // remove prolog from partial block
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int disk_image_byte_count_partial_block =
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(this->r_byte_count % bytes_per_block) - bytes_prolog; // remove prolog from partial block
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if (disk_image_byte_count_partial_block > this->block_size) { // partial block includes some epilog?
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disk_image_byte_count_partial_block = this->block_size; // // remove epilog from partial block
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}
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@@ -252,7 +253,8 @@ void AtapiCdrom::perform_packet_command() {
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int disk_image_bytes_received = this->read_begin(xfer_len, disk_image_byte_count);
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int bytes_received = (disk_image_bytes_received / this->block_size) * bytes_per_block + bytes_prolog + (disk_image_bytes_received % this->block_size); // whole blocks + prolog + partial block
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int bytes_received = (disk_image_bytes_received / this->block_size) * bytes_per_block + bytes_prolog +
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(disk_image_bytes_received % this->block_size); // whole blocks + prolog + partial block
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if (bytes_received > this->r_byte_count) { // if partial epilog or partial prolog
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bytes_received = this->r_byte_count; // confine to r_byte_count
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}
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@@ -191,7 +191,8 @@ void PCIBase::set_bar_value(int bar_num, uint32_t value)
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case PCIBarType::Io_32_Bit:
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this->bars[bar_num] = (value & bar_cfg & ~3) | (bar_cfg & 3);
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if (value != 0xFFFFFFFFUL && (value & ~3) != (value & bar_cfg & ~3)) {
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LOG_F(ERROR, "%s: BAR %d cannot be 0x%08x (set to 0x%08x)", this->get_name().c_str(), bar_num, (value & ~3), (value & bar_cfg & ~3));
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LOG_F(ERROR, "%s: BAR %d cannot be 0x%08x (set to 0x%08x)",
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this->get_name().c_str(), bar_num, (value & ~3), (value & bar_cfg & ~3));
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}
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break;
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@@ -200,7 +201,8 @@ void PCIBase::set_bar_value(int bar_num, uint32_t value)
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case PCIBarType::Mem_64_Bit_Lo:
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this->bars[bar_num] = (value & bar_cfg & ~0xF) | (bar_cfg & 0xF);
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if (value != 0xFFFFFFFFUL && (value & ~0xF) != (value & bar_cfg & ~0xF)) {
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LOG_F(ERROR, "%s: BAR %d cannot be 0x%08x (set to 0x%08x)", this->get_name().c_str(), bar_num, (value & ~0xF), (value & bar_cfg & ~0xF));
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LOG_F(ERROR, "%s: BAR %d cannot be 0x%08x (set to 0x%08x)",
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this->get_name().c_str(), bar_num, (value & ~0xF), (value & bar_cfg & ~0xF));
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}
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break;
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@@ -47,7 +47,9 @@ enum {
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PCI_CFG_BAR0 = 0x10, // base address register 0 (type 0, 1, and 2)
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PCI_CFG_BAR1 = 0x14, // base address register 1 (type 0 and 1)
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PCI_CFG_DWORD_13 = 0x34, // capabilities pointer (type 0 and 1)
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PCI_CFG_DWORD_15 = 0x3C, // Max_Lat, Min_Gnt (Type 0); Bridge Control (Type 1 and 2); Int_Pin and Int_Line registers (type 0, 1, and 2)
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PCI_CFG_DWORD_15 = 0x3C, // Max_Lat, Min_Gnt (Type 0)
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// Bridge Control (Type 1 and 2)
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// Int_Pin and Int_Line registers (type 0, 1, and 2)
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};
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/** PCI Vendor IDs for devices used in Power Macintosh computers. */
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@@ -81,7 +81,8 @@ void PCIHost::pci_unregister_device(int dev_fun_num)
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HWComponent *hwc = dynamic_cast<HWComponent*>(this);
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LOG_F(
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// FIXME: need destructors to remove memory regions and downstream devices.
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ERROR, "%s: pci_unregister_device(%s) not supported yet (every PCI device needs a working destructor to unregister memory and downstream devices etc.)",
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ERROR, "%s: pci_unregister_device(%s) not supported yet (every PCI device needs "
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"a working destructor to unregister memory and downstream devices etc.)",
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hwc ? hwc->get_name().c_str() : "PCIHost", dev_instance->get_name().c_str()
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);
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@@ -223,7 +223,8 @@ void ScsiHardDisk::inquiry() {
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int lun;
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if (this->last_selection_has_atention) {
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LOG_F(INFO, "%s: INQUIRY (%d bytes) with ATN LUN = %02x & 7", this->name.c_str(), alloc_len, this->last_selection_message);
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LOG_F(INFO, "%s: INQUIRY (%d bytes) with ATN LUN = %02x & 7",
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this->name.c_str(), alloc_len, this->last_selection_message);
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lun = this->last_selection_message & 7;
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}
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else {
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@@ -462,7 +463,8 @@ void ScsiHardDisk::read(uint32_t lba, uint16_t transfer_len, uint8_t cmd_len) {
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size_t data_buf_size = sizeof(this->data_buf);
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if (transfer_size > data_buf_size) {
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ABORT_F("%s: cannot read %d bytes (%d sectors * %d bytes/sector), maximum size is %lu bytes", this->name.c_str(), transfer_size, transfer_len, this->sector_size, data_buf_size);
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ABORT_F("%s: cannot read %d bytes (%d sectors * %d bytes/sector), maximum size is %lu bytes",
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this->name.c_str(), transfer_size, transfer_len, this->sector_size, data_buf_size);
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}
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std::memset(this->data_buf, 0, data_buf_size);
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@@ -484,7 +486,8 @@ void ScsiHardDisk::write(uint32_t lba, uint16_t transfer_len, uint8_t cmd_len) {
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size_t data_buf_size = sizeof(this->data_buf);
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if (transfer_size > data_buf_size) {
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ABORT_F("%s: cannot write %d bytes (%d sectors * %d bytes/sector), maximum size is %lu bytes", this->name.c_str(), transfer_size, transfer_len, this->sector_size, data_buf_size);
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ABORT_F("%s: cannot write %d bytes (%d sectors * %d bytes/sector), maximum size is %lu bytes",
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this->name.c_str(), transfer_size, transfer_len, this->sector_size, data_buf_size);
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}
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uint64_t device_offset = (uint64_t)lba * this->sector_size;
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@@ -67,7 +67,8 @@ void MacSuperDrive::command(uint8_t addr, uint8_t value)
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if (this->cur_track < 0)
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this->cur_track = 0;
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else if (this->cur_track >= this->num_tracks) {
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LOG_F(ERROR, "%s: track:%d is greater than max track:%d", this->get_name().c_str(), this->cur_track, this->num_tracks - 1);
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LOG_F(ERROR, "%s: track:%d is greater than max track:%d",
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this->get_name().c_str(), this->cur_track, this->num_tracks - 1);
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this->cur_track = this->num_tracks - 1;
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}
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this->track_zero = this->cur_track == 0;
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@@ -252,7 +252,10 @@ uint32_t GrandCentral::read(uint32_t rgn_start, uint32_t offset, int size)
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case MIO_GC_DMA_AUDIO_OUT:
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return this->snd_out_dma->reg_read(offset & 0xFF, size);
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case MIO_GC_DMA_AUDIO_IN:
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//LOG_F(WARNING, "%s: Unsupported DMA channel DMA_AUDIO_IN read @%02x.%c", this->name.c_str(), offset & 0xFF, SIZE_ARG(size));
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#if 0
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LOG_F(WARNING, "%s: Unsupported DMA channel DMA_AUDIO_IN read @%02x.%c",
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this->name.c_str(), offset & 0xFF, SIZE_ARG(size));
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#endif
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return 0; // this->snd_in_dma->reg_read(offset & 0xFF, size);
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case MIO_GC_DMA_SCSI_MESH:
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if (this->mesh_dma) {
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@@ -390,8 +390,10 @@ void HeathrowIC::feature_control(const uint32_t value)
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}
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}
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#define FIRST_INT1_BIT 12 // The first ten are DMA, the next 2 appear to be unused. We'll map 1:1 the INT1 bits 31..12 (0x1F..0x0C) as IRQ_ID bits.
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#define FIRST_INT2_BIT 2 // Skip the first two which are Ethernet DMA. We'll map INT2 bits 13..2 (interrupts 45..34 or 0x2D..0x22) as IRQ_ID bits 11..0.
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#define FIRST_INT1_BIT 12 // The first ten are DMA, the next 2 appear to be unused.
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// We'll map 1:1 the INT1 bits 31..12 (0x1F..0x0C) as IRQ_ID bits.
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#define FIRST_INT2_BIT 2 // Skip the first two which are Ethernet DMA.
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// We'll map INT2 bits 13..2 (interrupts 45..34 or 0x2D..0x22) as IRQ_ID bits 11..0.
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#define FIRST_INT1_IRQ_ID_BIT 12 // Same as INT1_BIT so there won't be any shifting required.
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#define FIRST_INT2_IRQ_ID_BIT 0
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@@ -481,7 +483,8 @@ void HeathrowIC::ack_int(uint32_t irq_id, uint8_t irq_line_state)
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IRQ_ID_TO_INT2_MASK(irq_id);
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#if 0
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LOG_F(INFO, "%s: native interrupt events:%08x.%08x levels:%08x.%08x change2:%08x state:%d",
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this->name.c_str(), this->int_events1 + 0, this->int_events2 + 0, this->int_levels1 + 0, this->int_levels2 + 0, irq_id, irq_line_state
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this->name.c_str(), this->int_events1 + 0, this->int_events2 + 0,
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this->int_levels1 + 0, this->int_levels2 + 0, irq_id, irq_line_state
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);
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#endif
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// native mode: set IRQ bits in int_events2 on a 0-to-1 transition
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@@ -504,7 +507,8 @@ void HeathrowIC::ack_int(uint32_t irq_id, uint8_t irq_line_state)
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// emulated mode: set IRQ bits in int_events1 on all transitions
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#if 0
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LOG_F(INFO, "%s: native interrupt events:%08x.%08x levels:%08x.%08x change1:%08x state:%d",
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this->name.c_str(), this->int_events1 + 0, this->int_events2 + 0, this->int_levels1 + 0, this->int_levels2 + 0, irq_id, irq_line_state);
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this->name.c_str(), this->int_events1 + 0, this->int_events2 + 0,
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this->int_levels1 + 0, this->int_levels2 + 0, irq_id, irq_line_state);
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#endif
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if ((this->int_mask1 & MACIO_INT_MODE) ||
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(irq_line_state && !(this->int_levels1 & irq_id))) {
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@@ -394,7 +394,10 @@ bool CharIoSocket::rcv_char_available_now()
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int received = (int)recv(this->sockfd, &c, 1, 0);
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if (received == -1) {
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if (this->acceptfd == -1) {
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//LOG_F(INFO, "socket sock read (not accepted yet) err: %s", strerror(errno)); // this happens once before accept
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#if 0
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LOG_F(INFO, "socket sock read (not accepted yet) err: %s",
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strerror(errno)); // this happens once before accept
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#endif
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}
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else {
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LOG_F(INFO, "socket sock read err: %s", strerror(errno)); // should never happen
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@@ -275,7 +275,9 @@ void EsccChannel::write_reg(int reg_num, uint8_t value)
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this->read_regs[RR0] |= RR0_SYNC_HUNT;
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}
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}
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this->write_regs[WR3] = (this->write_regs[WR3] & (WR3_RX_ENABLE | WR3_ENTER_HUNT_MODE)) | (value & ~(WR3_RX_ENABLE | WR3_ENTER_HUNT_MODE));
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this->write_regs[WR3] =
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(this->write_regs[WR3] & (WR3_RX_ENABLE | WR3_ENTER_HUNT_MODE)) |
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(value & ~(WR3_RX_ENABLE | WR3_ENTER_HUNT_MODE));
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return;
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case WR7:
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if (this->write_regs[WR15] & WR15_SDLC_HDLC_ENHANCEMENT_ENABLE) {
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+11
-6
@@ -1,6 +1,6 @@
|
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/*
|
||||
DingusPPC - The Experimental PowerPC Macintosh emulator
|
||||
Copyright (C) 2018-24 divingkatae and maximum
|
||||
Copyright (C) 2018-25 divingkatae and maximum
|
||||
(theweirdo) spatium
|
||||
|
||||
(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
|
||||
@@ -215,7 +215,8 @@ enum
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WR3_SYNC_CHARACTER_LOAD_INHIBIT = 1 << 1,
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WR3_RX_ENABLE = 1 << 0,
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// WR4 - Transmit/Receiver Miscellaneous Parameters and Modes // Transmit/Receive miscellaneous parameters and codes, clock rate, number of sync characters, stop bits, parity
|
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// WR4 - Transmit/Receiver Miscellaneous Parameters and Modes
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// Transmit/Receive miscellaneous parameters and codes, clock rate, number of sync characters, stop bits, parity
|
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|
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WR4_CLOCK_RATE = 3 << 6,
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WR4_X1_CLOCK_MODE = 0 << 6,
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@@ -257,7 +258,8 @@ enum
|
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// WR8 - Transmit buffer
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// WR9 - Master Interrupt Control // Master interrupt control and reset (accessed through either channel), reset bits, control interrupt daisy chain
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// WR9 - Master Interrupt Control
|
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// Master interrupt control and reset (accessed through either channel), reset bits, control interrupt daisy chain
|
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|
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WR9_RESET_COMMAND_BITS = 3 << 6,
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WR9_NO_RESET = 0 << 6,
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@@ -272,7 +274,8 @@ enum
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WR9_NO_VECTOR = 1 << 1,
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WR9_VECTOR_INCLUDES_STATUS = 1 << 0,
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// WR10 - Miscellaneous Transmitter/Receiver Control Bits // Miscellaneous transmitter/receiver control bits, NRZI, NRZ, FM encoding, CRC reset
|
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// WR10 - Miscellaneous Transmitter/Receiver Control Bits
|
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// Miscellaneous transmitter/receiver control bits, NRZI, NRZ, FM encoding, CRC reset
|
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|
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WR10_CRC_PRESET = 1 << 7,
|
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WR10_DATA_ENCODING = 3 << 5,
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@@ -318,7 +321,8 @@ enum
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|
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// WR13 - Upper Byte of Baud Rate Generator Time Constant
|
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|
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// WR14 - Miscellaneous Control Bits // Miscellaneous control bits: baud rate generator, Phase-Locked Loop control, auto echo, local loopback
|
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// WR14 - Miscellaneous Control Bits
|
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// Miscellaneous control bits: baud rate generator, Phase-Locked Loop control, auto echo, local loopback
|
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|
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WR14_DPLL_COMMAND_BITS = 7 << 5,
|
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WR14_DPLL_NULL_COMMAND = 0 << 5,
|
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@@ -335,7 +339,8 @@ enum
|
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WR14_BR_GENERATOR_SOURCE = 1 << 1,
|
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WR14_BR_GENERATOR_ENABLE = 1 << 0,
|
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|
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// WR15 - External/Status Interrupt Control // External/Status interrupt control information-control external conditions causing interrupts
|
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// WR15 - External/Status Interrupt Control
|
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// External/Status interrupt control information-control external conditions causing interrupts
|
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|
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WR15_SDLC_HDLC_ENHANCEMENT_ENABLE = 1 << 0,
|
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WR15_ZERO_COUNT_IE = 1 << 1,
|
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@@ -223,7 +223,8 @@ int SoundServer::start_out_stream()
|
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{
|
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if (is_deterministic) {
|
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LOG_F(9, "Starting sound output deterministic polling.");
|
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impl->deterministic_poll_timer = TimerManager::get_instance()->add_cyclic_timer(MSECS_TO_NSECS(10), impl->deterministic_poll_cb);
|
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impl->deterministic_poll_timer =
|
||||
TimerManager::get_instance()->add_cyclic_timer(MSECS_TO_NSECS(10), impl->deterministic_poll_cb);
|
||||
return 0;
|
||||
}
|
||||
return cubeb_stream_start(impl->out_stream);
|
||||
|
||||
@@ -70,7 +70,9 @@ enum RamdacRegs : uint8_t {
|
||||
CURSOR_POS_HI = 0x10, // cursor position, high-order byte
|
||||
CURSOR_POS_LO = 0x11, // cursor position, low-order byte
|
||||
MISC_CTRL = 0x20, // miscellaneus control bits ; Dacula: read ; when 1MB VRAM then write (mode&15) else write (mode)
|
||||
DBL_BUF_CTRL = 0x21, // double buffer control bits ; Dacula: write 4; Radical: set to 0 if using optional bank (bankb) in Open Firmware or for 2nd page in ndrv
|
||||
DBL_BUF_CTRL = 0x21, // double buffer control bits ;
|
||||
// - Dacula: write 4;
|
||||
// - Radical: set to 0 if using optional bank (bankb) in Open Firmware or for 2nd page in ndrv
|
||||
TEST_CTRL = 0x22, // enable/disable DAC tests ; Dacula: write 0
|
||||
|
||||
// multipurpose section registers (DACula only)
|
||||
|
||||
@@ -398,7 +398,8 @@ void ATIRage::write_reg(uint32_t reg_offset, uint32_t value, uint32_t size) {
|
||||
|
||||
|
||||
if (bit_changed(old_value, new_value, ATI_CRTC_ENABLE)
|
||||
|| extract_bits(old_value, ATI_CRTC_PIX_WIDTH, ATI_CRTC_PIX_WIDTH_size) != extract_bits(new_value, ATI_CRTC_PIX_WIDTH, ATI_CRTC_PIX_WIDTH_size)
|
||||
|| extract_bits(old_value, ATI_CRTC_PIX_WIDTH, ATI_CRTC_PIX_WIDTH_size) !=
|
||||
extract_bits(new_value, ATI_CRTC_PIX_WIDTH, ATI_CRTC_PIX_WIDTH_size)
|
||||
) {
|
||||
draw_fb = true;
|
||||
if (bit_set(new_value, ATI_CRTC_ENABLE) &&
|
||||
|
||||
@@ -93,22 +93,26 @@ uint16_t Sixty6Video::iodev_read(uint32_t address)
|
||||
last_control_1_count++;
|
||||
} else {
|
||||
if (last_control_1_count) {
|
||||
LOG_F(SIXTY6_INTERRUPT, "Sixty6: read %d:CONTROL_1 = %02x x %d", address, last_control_1_value, last_control_1_count);
|
||||
LOG_F(SIXTY6_INTERRUPT, "Sixty6: read %d:CONTROL_1 = %02x x %d",
|
||||
address, last_control_1_value, last_control_1_count);
|
||||
}
|
||||
last_control_1_value = value;
|
||||
last_control_1_count = 0;
|
||||
LOG_F(SIXTY6_INTERRUPT, "Sixty6: read %d:CONTROL_1 = %02x x %d", address, last_control_1_value, last_control_1_count);
|
||||
LOG_F(SIXTY6_INTERRUPT, "Sixty6: read %d:CONTROL_1 = %02x x %d",
|
||||
address, last_control_1_value, last_control_1_count);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
value = 0;
|
||||
LOG_F(ERROR, "Sixty6: read %d:CONTROL_DATA 0x%02x = %02x", address, this->control_addr, value);
|
||||
LOG_F(ERROR, "Sixty6: read %d:CONTROL_DATA 0x%02x = %02x",
|
||||
address, this->control_addr, value);
|
||||
}
|
||||
break;
|
||||
|
||||
case Sixty6BaseReg::CONTROL_ADDR:
|
||||
value = this->control_addr;
|
||||
LOG_F(SIXTY6_INTERRUPT, "Sixty6: read %d:CONTROL_ADDR = %02x", address, value);
|
||||
LOG_F(SIXTY6_INTERRUPT, "Sixty6: read %d:CONTROL_ADDR = %02x",
|
||||
address, value);
|
||||
break;
|
||||
}
|
||||
return value;
|
||||
@@ -412,7 +416,8 @@ int Sixty6Video::device_postinit()
|
||||
this->control_1 |= 0x80;
|
||||
else
|
||||
this->control_1 &= ~0x80;
|
||||
LOG_F(SIXTY6_INTERRUPT, "Sixty6: interrupt state:%d doit:%d", irq_line_state, ((this->control_1 & 0x40) && this->crtc_on));
|
||||
LOG_F(SIXTY6_INTERRUPT, "Sixty6: interrupt state:%d doit:%d",
|
||||
irq_line_state, ((this->control_1 & 0x40) && this->crtc_on));
|
||||
|
||||
if (this->interrupt_enabled && this->crtc_on) {
|
||||
//this->pci_interrupt(irq_line_state);
|
||||
|
||||
@@ -60,7 +60,7 @@ typedef struct {
|
||||
uint32_t ow_expected_checksum;
|
||||
uint32_t nw_product_id;
|
||||
uint32_t nw_subconfig_expected_checksum; // checksum of the system config section but without the firmware version and date
|
||||
const char *id_str; // Bootstrap string located at offset 0x30D064 (PCI Macs) or 0x30C064 (Nubus Macs) to machine name and description.
|
||||
const char *id_str; // Bootstrap string located at offset 0x30D064 (PCI Macs) or 0x30C064 (Nubus Macs)
|
||||
const char *nw_firmware_updater_name;
|
||||
const char *nw_openfirmware_name;
|
||||
const char *dppc_machine;
|
||||
@@ -788,10 +788,13 @@ string MachineFactory::machine_name_from_rom(char *rom_data, size_t rom_size) {
|
||||
(info->nw_product_id && info->nw_product_id == nw_product_id )
|
||||
) {
|
||||
int match_count = 1
|
||||
+ (info->ow_expected_checksum && info->ow_expected_checksum == ow_checksum_stored )
|
||||
+ (info->ow_expected_checksum && info->ow_expected_checksum == ow_checksum_calculated )
|
||||
+ (info->nw_subconfig_expected_checksum && info->nw_subconfig_expected_checksum == nw_subconfig_checksum_calculated )
|
||||
+ (info->id_str && strcmp(rom_id_str, info->id_str) == 0)
|
||||
+ (info->ow_expected_checksum
|
||||
&& info->ow_expected_checksum == ow_checksum_stored)
|
||||
+ (info->ow_expected_checksum
|
||||
&& info->ow_expected_checksum == ow_checksum_calculated)
|
||||
+ (info->nw_subconfig_expected_checksum
|
||||
&& info->nw_subconfig_expected_checksum == nw_subconfig_checksum_calculated)
|
||||
+ (info->id_str && strcmp(rom_id_str, info->id_str) == 0)
|
||||
;
|
||||
|
||||
if (!match_pass) {
|
||||
@@ -870,7 +873,8 @@ string MachineFactory::machine_name_from_rom(char *rom_data, size_t rom_size) {
|
||||
if (firmware_version < 0xffff)
|
||||
LOG_F(INFO, " ROM Version: %x.%03x", (firmware_version >> 12) & 15, firmware_version & 0xfff);
|
||||
else
|
||||
LOG_F(INFO, " ROM Version: %x.%x.%03x", firmware_version >> 16, (firmware_version >> 12) & 15, firmware_version & 0xfff);
|
||||
LOG_F(INFO, " ROM Version: %x.%x.%03x",
|
||||
firmware_version >> 16, (firmware_version >> 12) & 15, firmware_version & 0xfff);
|
||||
if (has_nw_config) {
|
||||
LOG_F(INFO, " Product ID: 0x%04x.%02x 0x%08x = %s%d,%d",
|
||||
nw_product_id >> 8, nw_product_id & 0xff,
|
||||
|
||||
@@ -90,7 +90,10 @@ public:
|
||||
|
||||
const WorkingDirectoryValidator WorkingDirectory;
|
||||
|
||||
void run_machine(std::string machine_str, char *rom_data, size_t rom_size, uint32_t execution_mode, uint32_t profiling_interval_ms);
|
||||
void run_machine(
|
||||
std::string machine_str, char *rom_data, size_t rom_size, uint32_t execution_mode,
|
||||
uint32_t profiling_interval_ms
|
||||
);
|
||||
|
||||
int main(int argc, char** argv) {
|
||||
|
||||
|
||||
Reference in New Issue
Block a user