mirror of
https://github.com/dingusdev/dingusppc.git
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platinum: implement video emulation.
This commit is contained in:
Maxim Poliakovski
parent
7d06c5b37a
commit
8d30fea63b
@ -1,6 +1,6 @@
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/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-22 divingkatae and maximum
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Copyright (C) 2018-24 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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@ -21,41 +21,101 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
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/** Platinum Memory/Display Controller emulation. */
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#include <core/timermanager.h>
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#include <devices/deviceregistry.h>
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#include <devices/ioctrl/macio.h>
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#include <devices/memctrl/platinum.h>
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#include <devices/video/displayid.h>
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#include <loguru.hpp>
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#include <machines/machinebase.h>
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#include <memaccess.h>
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#include <cinttypes>
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using namespace Platinum;
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PlatinumCtrl::PlatinumCtrl() : MemCtrlBase()
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{
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this->name = "Platinum Memory Controller";
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PlatinumCtrl::PlatinumCtrl() : MemCtrlBase(), VideoCtrlBase(640, 480) {
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set_name("Platinum");
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supports_types(HWCompType::MEM_CTRL | HWCompType::MMIO_DEV);
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// add MMIO region for VRAM
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add_mmio_region(VRAM_REGION_BASE, 0x01000000, this);
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// add MMIO region for the configuration and status registers
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add_mmio_region(0xF8000000, 0x500, this);
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add_mmio_region(PLATINUM_IOREG_BASE, 0x500, this);
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// determine actual VRAM size (min. 1MB, max. 4MB)
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this->vram_size = 1 << 20;
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// get VRAM size
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this->vram_megs = GET_INT_PROP("gfxmem_size");
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this->vram_size = this->vram_megs << 20;
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// insert video memory region into the main memory map
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this->add_ram_region(0xF1000000UL, this->vram_size);
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// enable half bank access if 1MB VRAM + FB_CONFIG_1[CFG1_FULL_BANKS] = 1
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this->half_bank = !!(this->vram_megs == 1);
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this->half_access = 0;
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// allocate VRAM
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this->vram_ptr = std::unique_ptr<uint8_t[]> (new uint8_t[this->vram_size]);
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// initialize the CPUID register with the following CPU:
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// PowerPC 601 @ 75 MHz, bus frequency: 37,5 MHz
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this->cpu_id = (0x3001 << 16) | ClkSrc3 | (CpuSpeed3::CPU_75_BUS_38 << 8);
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// PowerPC 601 @ 90 MHz, bus frequency: 45 MHz
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this->cpu_id = (0x3001 << 16) | ClkSrc2 | (CpuSpeed2::CPU_90_BUS_45 << 8);
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this->display_id = std::unique_ptr<DisplayID> (new DisplayID());
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// attach DACula RAMDAC
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this->dacula = std::unique_ptr<AppleRamdac>(new AppleRamdac(DacFlavour::DACULA));
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this->dacula->set_clut_entry_cb = [this](uint8_t index, uint8_t *colors) {
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this->set_palette_color(index, colors[0], colors[1], colors[2], 0xFF);
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};
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this->dacula->cursor_ctrl_cb = [this](bool cursor_on) {
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if (cursor_on) {
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this->dacula->measure_hw_cursor(&this->vram_ptr[this->fb_offset]);
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this->cursor_ovl_cb = [this](uint8_t *dst_buf, int dst_pitch) {
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this->dacula->draw_hw_cursor(&this->vram_ptr[this->fb_offset],
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dst_buf, dst_pitch);
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};
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} else {
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this->cursor_ovl_cb = nullptr;
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}
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};
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}
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uint32_t PlatinumCtrl::read(uint32_t rgn_start, uint32_t offset, int size)
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{
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int PlatinumCtrl::device_postinit() {
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// register DACula with the I/O controller as IOBus Device #2
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GrandCentral* gc_obj = dynamic_cast<GrandCentral*>(gMachineObj->get_comp_by_name("GrandCentral"));
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gc_obj->attach_iodevice(1, this->dacula.get());
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this->int_ctrl = dynamic_cast<InterruptCtrl*>(
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gMachineObj->get_comp_by_type(HWCompType::INT_CTRL));
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this->irq_id = 1UL << 30; // FIXME: hardcoded IRQ ID
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this->vbl_cb = [this](uint8_t irq_line_state) {
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this->update_irq(irq_line_state, SWATCH_INT_VBL);
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};
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return 0;
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}
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uint32_t PlatinumCtrl::read(uint32_t rgn_start, uint32_t offset, int size) {
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if (rgn_start == VRAM_REGION_BASE) {
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if (offset < this->vram_size) {
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// HACK: half bank configurations should return invalid data
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// for the lower DWORD (in the PPC order!) to be recognized.
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// The simplest way to achieve that is to redirect access
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// to the upper DWORD by setting bit 2 of the address.
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if (this->half_access)
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offset |= 4;
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return read_mem(&this->vram_ptr[offset], size);
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} else {
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LOG_F(WARNING, "%s: read from unmapped aperture address 0x%X",
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this->name.c_str(), this->fb_addr + offset);
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return (uint32_t)-1;
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}
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}
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if (size != 4) {
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LOG_F(WARNING, "Platinum: unsupported register access size %d!", size);
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LOG_F(WARNING, "%s: unsupported register access size %d!", this->name.c_str(),
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size);
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return 0;
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}
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@ -78,10 +138,21 @@ uint32_t PlatinumCtrl::read(uint32_t rgn_start, uint32_t offset, int size)
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case PlatinumReg::FB_BASE_ADDR:
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return this->fb_addr;
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case PlatinumReg::MON_ID_SENSE:
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LOG_F(INFO, "Platinum: display sense read");
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return (this->cur_mon_id ^ 7);
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return (this->mon_sense ^ 7);
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case PlatinumReg::SWATCH_CONFIG:
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return this->swatch_config;
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case PlatinumReg::SWATCH_INT_STAT:
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return this->swatch_int_stat;
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case PlatinumReg::CLR_CURSOR_INT:
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this->update_irq(0, SWATCH_INT_CURSOR);
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return 0;
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case PlatinumReg::TIMING_ADJUST:
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return this->timing_adjust;
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case PlatinumReg::IRIDIUM_CONFIG:
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return this->iridium_cfg;
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default:
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LOG_F(WARNING, "Platinum: unknown register read at offset 0x%X", offset);
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LOG_F(WARNING, "%s: unknown register read at offset 0x%X", this->name.c_str(),
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offset);
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}
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return 0;
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@ -89,6 +160,15 @@ uint32_t PlatinumCtrl::read(uint32_t rgn_start, uint32_t offset, int size)
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void PlatinumCtrl::write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size)
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{
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if (rgn_start == VRAM_REGION_BASE) {
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if (offset < this->vram_size)
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write_mem(&this->vram_ptr[offset], value, size);
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else
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LOG_F(WARNING, "%s: write to unmapped aperture address 0x%X",
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this->name.c_str(), this->fb_addr + offset);
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return;
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}
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switch (offset) {
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case PlatinumReg::ROM_TIMING:
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this->rom_timing = value;
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@ -110,11 +190,18 @@ void PlatinumCtrl::write(uint32_t rgn_start, uint32_t offset, uint32_t value, in
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this->bank_base[(offset - PlatinumReg::BANK_0_BASE) >> 4] = value;
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break;
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case PlatinumReg::FB_BASE_ADDR:
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this->fb_addr = value;
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LOG_F(INFO, "Platinum: Framebuffer address set to 0x%X", value);
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this->fb_addr = value;
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this->fb_offset = value & 0x3FFFFF;
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break;
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case PlatinumReg::ROW_WORDS:
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this->row_words = value & ~7;
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break;
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case PlatinumReg::CLOCK_DIVISOR:
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this->clock_divisor = value;
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break;
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case PlatinumReg::FB_CONFIG_1:
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this->fb_config_1 = value;
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this->half_bank = !!(this->vram_megs == 1 && (value & CFG1_FULL_BANKS));
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break;
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case PlatinumReg::FB_CONFIG_2:
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this->fb_config_2 = value;
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@ -123,11 +210,30 @@ void PlatinumCtrl::write(uint32_t rgn_start, uint32_t offset, uint32_t value, in
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this->vmem_fp_mode = value;
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break;
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case PlatinumReg::MON_ID_SENSE:
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LOG_F(INFO, "Platinum: display sense written with 0x%X", value);
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this->cur_mon_id = this->display_id->read_monitor_sense(value & 7, value ^ 7);
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value &= 7;
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this->mon_sense = this->display_id->read_monitor_sense(value, value ^ 7)
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<< (value ^ 7);
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break;
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case PlatinumReg::FB_RESET:
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static uint8_t vid_enable_seq[] = {3, 2, 0};
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if (value == 7 && this->crtc_on) {
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LOG_F(INFO, "%s: video disabled", this->name.c_str());
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this->reset_step = 0;
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} else if (value == vid_enable_seq[this->reset_step]) {
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if (++this->reset_step >= 3) {
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if (this->fb_config_1 & CFG1_VID_ENABLE) {
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LOG_F(INFO, "%s: video enabled", this->name.c_str());
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this->enable_display();
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} else {
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this->blank_display();
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}
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this->reset_step = 0;
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}
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} else
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this->reset_step = 0;
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this->fb_reset = value;
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this->half_access = !!(this->half_bank && value == 6);
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break;
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case PlatinumReg::VRAM_REFRESH:
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this->vram_refresh = value;
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@ -137,31 +243,50 @@ void PlatinumCtrl::write(uint32_t rgn_start, uint32_t offset, uint32_t value, in
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break;
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case PlatinumReg::SWATCH_INT_MASK:
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this->swatch_int_mask = value;
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if (this->swatch_int_mask & SWATCH_INT_VBL)
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LOG_F(INFO, "%s: VBL interrupt enabled", this->name.c_str());
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break;
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case PlatinumReg::CURSOR_LINE:
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this->cursor_line = value;
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if (this->swatch_int_mask & SWATCH_INT_CURSOR)
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this->enable_cursor_int();
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break;
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case PlatinumReg::SWATCH_HSERR:
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case PlatinumReg::SWATCH_HLFLN:
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case PlatinumReg::SWATCH_HEQ:
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case PlatinumReg::SWATCH_HSP:
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case PlatinumReg::SWATCH_HBWAY:
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case PlatinumReg::SWATCH_HBRST:
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case PlatinumReg::SWATCH_HBP:
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case PlatinumReg::SWATCH_HAL:
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LOG_F(INFO, "Swatch HAL set to 0x%X", value);
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break;
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case PlatinumReg::SWATCH_HFP:
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LOG_F(INFO, "Swatch HFP set to 0x%X", value);
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break;
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case PlatinumReg::SWATCH_HPIX:
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LOG_F(INFO, "Swatch HPIX set to 0x%X", value);
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break;
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case PlatinumReg::SWATCH_VHLINE:
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case PlatinumReg::SWATCH_VSYNC:
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case PlatinumReg::SWATCH_VBPEQ:
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case PlatinumReg::SWATCH_VBP:
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case PlatinumReg::SWATCH_VAL:
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LOG_F(INFO, "Swatch VAL set to 0x%X", value);
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break;
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case PlatinumReg::SWATCH_VFP:
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LOG_F(INFO, "Swatch VFP set to 0x%X", value);
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case PlatinumReg::SWATCH_VFPEQ:
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this->swatch_params[REG_TO_INDEX(offset)] = value;
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break;
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case PlatinumReg::TIMING_ADJUST:
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this->timing_adjust = value;
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break;
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case PlatinumReg::IRIDIUM_CONFIG:
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if (!(value & 1))
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ABORT_F("%s: little-endian system bus is not implemented", this->name.c_str());
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this->iridium_cfg = (this->iridium_cfg & ~7) | (value & 7);
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break;
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default:
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LOG_F(WARNING, "Platinum: unknown register write at offset 0x%X", offset);
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LOG_F(WARNING, "%s: unknown register write at offset 0x%X", this->name.c_str(),
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offset);
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}
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}
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void PlatinumCtrl::insert_ram_dimm(int slot_num, uint32_t capacity)
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{
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void PlatinumCtrl::insert_ram_dimm(int slot_num, uint32_t capacity) {
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if (slot_num < 0 || slot_num >= 4) {
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ABORT_F("Platinum: invalid DIMM slot %d", slot_num);
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ABORT_F("%s: invalid DIMM slot %d", this->name.c_str(), slot_num);
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}
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switch (capacity) {
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@ -178,12 +303,11 @@ void PlatinumCtrl::insert_ram_dimm(int slot_num, uint32_t capacity)
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this->bank_size[slot_num * 2 + 1] = DRAM_CAP_64MB;
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break;
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default:
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ABORT_F("Platinum: unsupported DRAM capacity %d", capacity);
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ABORT_F("%s: unsupported DRAM capacity %d", this->name.c_str(), capacity);
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}
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}
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void PlatinumCtrl::map_phys_ram()
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{
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void PlatinumCtrl::map_phys_ram() {
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uint32_t total_ram = 0;
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for (int i = 0; i < 8; i++) {
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@ -191,16 +315,133 @@ void PlatinumCtrl::map_phys_ram()
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}
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if (total_ram > DRAM_CAP_64MB) {
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ABORT_F("Platinum: RAM bigger than 64MB not supported yet");
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ABORT_F("%s: RAM bigger than 64MB not supported yet", this->name.c_str());
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}
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if (!add_ram_region(0x00000000, total_ram)) {
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ABORT_F("Platinum: could not allocate RAM storage");
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ABORT_F("%s: could not allocate RAM storage", this->name.c_str());
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}
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}
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// ====================== Framebuffer controller stuff =======================
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void PlatinumCtrl::enable_display() {
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int clock_divisor = this->dacula->get_clock_div();
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this->pixel_clock = this->dacula->get_dot_freq();
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// calculate active_width and active_height from Swatch parameters
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int new_width = swatch_params[REG_TO_INDEX(PlatinumReg::SWATCH_HFP)] -
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swatch_params[REG_TO_INDEX(PlatinumReg::SWATCH_HAL)];
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int new_height = swatch_params[REG_TO_INDEX(PlatinumReg::SWATCH_VFP)] -
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swatch_params[REG_TO_INDEX(PlatinumReg::SWATCH_VAL)];
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this->hori_blank = swatch_params[REG_TO_INDEX(PlatinumReg::SWATCH_HAL)] +
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(swatch_params[REG_TO_INDEX(PlatinumReg::SWATCH_HSP)] -
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swatch_params[REG_TO_INDEX(PlatinumReg::SWATCH_HFP)]);
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new_width *= clock_divisor;
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this->hori_blank *= clock_divisor;
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this->vert_blank = swatch_params[REG_TO_INDEX(PlatinumReg::SWATCH_VAL)] +
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(swatch_params[REG_TO_INDEX(PlatinumReg::SWATCH_VSYNC)] -
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swatch_params[REG_TO_INDEX(PlatinumReg::SWATCH_VFP)]);
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if (!(this->fb_config_1 & CFG1_INTERLACE)) {
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new_height >>= 1;
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this->vert_blank >>= 1;
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}
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this->active_width = new_width;
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this->active_height = new_height;
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this->hori_total = this->hori_blank + new_width;
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this->vert_total = this->vert_blank + new_height;
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// set framebuffer parameters
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this->fb_ptr = &this->vram_ptr[this->fb_offset];
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this->fb_pitch = this->row_words;
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this->pixel_depth = this->dacula->get_pix_width();
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if (pixel_depth > 8)
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this->fb_ptr += 16;
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// attach framebuffer conversion routine
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switch (this->pixel_depth) {
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case 8:
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this->convert_fb_cb = [this](uint8_t *dst_buf, int dst_pitch) {
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this->convert_frame_8bpp_indexed(dst_buf, dst_pitch);
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};
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break;
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case 16:
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this->convert_fb_cb = [this](uint8_t *dst_buf, int dst_pitch) {
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this->convert_frame_15bpp_BE(dst_buf, dst_pitch);
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};
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break;
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case 32:
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this->convert_fb_cb = [this](uint8_t *dst_buf, int dst_pitch) {
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this->convert_frame_32bpp_BE(dst_buf, dst_pitch);
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};
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break;
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default:
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ABORT_F("%s: invalid pixel width %d", this->name.c_str(), this->pixel_depth);
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}
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this->dacula->set_fb_parameters(this->active_width, this->active_height, this->fb_pitch);
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this->stop_refresh_task();
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this->refresh_rate = (double)(this->pixel_clock) / (this->hori_total * this->vert_total);
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this->start_refresh_task();
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LOG_F(INFO, "%s: video width=%d, height=%d", this->name.c_str(), new_width, new_height);
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LOG_F(INFO, "%s: refresh rate set to %f Hz", this->name.c_str(), this->refresh_rate);
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this->blank_on = false;
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this->crtc_on = true;
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}
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void PlatinumCtrl::enable_cursor_int() {
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if (!(this->swatch_int_mask & SWATCH_INT_CURSOR))
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return;
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uint64_t cursor_int_freq = static_cast<uint64_t>((1.0f / (double)this->pixel_clock) *
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this->hori_total * this->cursor_line * NS_PER_SEC + 0.5f);
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LOG_F(INFO, "%s: cursor interrupt frequency %lld ns", this->name.c_str(),
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cursor_int_freq);
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if (this->cursor_task_id)
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TimerManager::get_instance()->cancel_timer(this->cursor_task_id);
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this->cursor_task_id = TimerManager::get_instance()->add_cyclic_timer(
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cursor_int_freq,
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[this]() {
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this->update_irq(1, SWATCH_INT_CURSOR); // generate cursor interrupt
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}
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);
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}
|
||||
|
||||
void PlatinumCtrl::update_irq(uint8_t irq_line_state, uint8_t irq_mask) {
|
||||
if (irq_line_state != !!(this->swatch_int_stat & irq_mask)) {
|
||||
if (irq_line_state)
|
||||
this->swatch_int_stat |= irq_mask;
|
||||
else
|
||||
this->swatch_int_stat &= ~irq_mask;
|
||||
|
||||
if (this->swatch_int_mask & irq_mask)
|
||||
this->int_ctrl->ack_int(this->irq_id, irq_line_state);
|
||||
}
|
||||
}
|
||||
|
||||
// ========================== Device registry stuff ==========================
|
||||
static const PropMap Platinum_Properties = {
|
||||
{"gfxmem_size",
|
||||
new IntProperty(1, vector<uint32_t>({1, 2, 4}))},
|
||||
{"mon_id",
|
||||
new StrProperty("HiRes12-14in")},
|
||||
};
|
||||
|
||||
static const DeviceDescription Platinum_Descriptor = {
|
||||
PlatinumCtrl::create, {}, {}
|
||||
PlatinumCtrl::create, {}, Platinum_Properties
|
||||
};
|
||||
|
||||
REGISTER_DEVICE(Platinum, Platinum_Descriptor);
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
DingusPPC - The Experimental PowerPC Macintosh emulator
|
||||
Copyright (C) 2018-22 divingkatae and maximum
|
||||
Copyright (C) 2018-24 divingkatae and maximum
|
||||
(theweirdo) spatium
|
||||
|
||||
(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
|
||||
@ -23,7 +23,7 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
|
||||
|
||||
Author: Max Poliakovski
|
||||
|
||||
Platinum is a single chip memory and video subsystem controller designed
|
||||
Platinum is a single-chip memory and video subsystem controller designed
|
||||
especially for the Power Macintosh 7200 computer, code name Catalyst.
|
||||
*/
|
||||
|
||||
@ -33,7 +33,9 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
|
||||
#include <devices/common/hwcomponent.h>
|
||||
#include <devices/common/mmiodevice.h>
|
||||
#include <devices/memctrl/memctrlbase.h>
|
||||
#include <devices/video/appleramdac.h>
|
||||
#include <devices/video/displayid.h>
|
||||
#include <devices/video/videoctrl.h>
|
||||
|
||||
#include <cinttypes>
|
||||
#include <memory>
|
||||
@ -120,22 +122,58 @@ enum PlatinumReg : uint32_t {
|
||||
GP_SW_SCRATCH = 0x0E0,
|
||||
PCI_ADDR_MASK = 0x0F0,
|
||||
FB_BASE_ADDR = 0x100,
|
||||
ROW_WORDS = 0x120,
|
||||
CLOCK_DIVISOR = 0x130,
|
||||
FB_CONFIG_1 = 0x140,
|
||||
FB_CONFIG_2 = 0x150,
|
||||
VMEM_PAGE_MODE = 0x160,
|
||||
MON_ID_SENSE = 0x170,
|
||||
FB_RESET = 0x180,
|
||||
VRAM_REFRESH = 0x1B0,
|
||||
|
||||
// Swatch timing generator registers
|
||||
SWATCH_CONFIG = 0x200,
|
||||
SWATCH_INT_MASK = 0x210,
|
||||
SWATCH_INT_STAT = 0x220,
|
||||
CLR_CURSOR_INT = 0x230,
|
||||
CLR_ANIM_INT = 0x240,
|
||||
CLR_VBL_INT = 0x250,
|
||||
CURSOR_LINE = 0x260,
|
||||
ANIMATE_LINE = 0x270,
|
||||
COUNTER_TEST = 0x280,
|
||||
SWATCH_HSERR = 0x290,
|
||||
SWATCH_HLFLN = 0x2A0,
|
||||
SWATCH_HEQ = 0x2B0,
|
||||
SWATCH_HSP = 0x2C0,
|
||||
SWATCH_HBWAY = 0x2D0,
|
||||
SWATCH_HBRST = 0x2E0,
|
||||
SWATCH_HBP = 0x2F0,
|
||||
SWATCH_HAL = 0x300,
|
||||
SWATCH_HFP = 0x310,
|
||||
SWATCH_HPIX = 0x320,
|
||||
SWATCH_VHLINE = 0x330,
|
||||
SWATCH_VSYNC = 0x340,
|
||||
SWATCH_VBPEQ = 0x350,
|
||||
SWATCH_VBP = 0x360,
|
||||
SWATCH_VAL = 0x370,
|
||||
SWATCH_VFP = 0x380,
|
||||
SWATCH_VFPEQ = 0x390,
|
||||
TIMING_ADJUST = 0x3A0,
|
||||
CURRENT_LINE = 0x3B0,
|
||||
|
||||
// Iridium datapath registers
|
||||
IRIDIUM_CONFIG = 0x4A0,
|
||||
};
|
||||
|
||||
#define REG_TO_INDEX(reg) ((((reg) - SWATCH_HSERR) >> 4) & 0xF)
|
||||
|
||||
// FB_CONFIG_1 register bits.
|
||||
enum {
|
||||
CFG1_INTERLACE = (1 << 2), // 1 - interlaced video enabled
|
||||
CFG1_VID_ENABLE = (1 << 4), // 1 - display refresh enabled
|
||||
CFG1_FULL_BANKS = (1 << 12), // full VRAM banks (64-bit) access enable
|
||||
};
|
||||
|
||||
// FB_RESET register bits.
|
||||
enum {
|
||||
VRAM_SM_RESET = (1 << 0), // VRAM state machine reset
|
||||
@ -143,9 +181,22 @@ enum {
|
||||
SWATCH_RESET = (1 << 2), // Swatch reset
|
||||
};
|
||||
|
||||
// SWATCH_INT_MASK register bits.
|
||||
enum {
|
||||
SWATCH_INT_VBL = (1 << 0),
|
||||
SWATCH_INT_ANIM = (1 << 1),
|
||||
SWATCH_INT_CURSOR = (1 << 2)
|
||||
};
|
||||
|
||||
#define DAMFB_VERSION_PLATINUM 6 // DAMFB cell version in the Platinum ASIC
|
||||
#define IRIDIUM_VENDOR_VLSI 0 // Vendor ID for the Iridium ASIC => VLSI
|
||||
|
||||
constexpr auto VRAM_REGION_BASE = 0xF1000000UL;
|
||||
constexpr auto PLATINUM_IOREG_BASE = 0xF8000000UL;
|
||||
|
||||
}; // namespace Platinum
|
||||
|
||||
class PlatinumCtrl : public MemCtrlBase, public MMIODevice {
|
||||
class PlatinumCtrl : public MemCtrlBase, public VideoCtrlBase, public MMIODevice {
|
||||
public:
|
||||
PlatinumCtrl();
|
||||
~PlatinumCtrl() = default;
|
||||
@ -154,13 +205,21 @@ public:
|
||||
return std::unique_ptr<PlatinumCtrl>(new PlatinumCtrl());
|
||||
}
|
||||
|
||||
/* MMIODevice methods */
|
||||
// HWComponent methods
|
||||
int device_postinit();
|
||||
|
||||
// MMIODevice methods
|
||||
uint32_t read(uint32_t rgn_start, uint32_t offset, int size);
|
||||
void write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size);
|
||||
|
||||
void insert_ram_dimm(int slot_num, uint32_t capacity);
|
||||
void map_phys_ram();
|
||||
|
||||
protected:
|
||||
void enable_display();
|
||||
void enable_cursor_int();
|
||||
void update_irq(uint8_t irq_line_state, uint8_t irq_mask);
|
||||
|
||||
private:
|
||||
uint32_t cpu_id;
|
||||
uint8_t cpu_type; // 0 - MPC601, 1 - 603/604 CPU
|
||||
@ -170,23 +229,41 @@ private:
|
||||
uint32_t dram_timing = 0xEFF;
|
||||
uint32_t dram_refresh = 0x1F4;
|
||||
uint32_t bank_base[8];
|
||||
uint32_t bank_size[8] = { 0 };
|
||||
uint32_t bank_size[8] = {};
|
||||
|
||||
// display controller state
|
||||
uint32_t fb_addr = 0xF1000000;
|
||||
// frame buffer controller state
|
||||
uint32_t fb_addr = Platinum::VRAM_REGION_BASE;
|
||||
uint32_t fb_offset = 0;
|
||||
uint32_t fb_config_1 = 0x1F00;
|
||||
uint32_t fb_config_2 = 0x1FFF;
|
||||
uint32_t clock_divisor = 0;
|
||||
uint32_t row_words = 0;
|
||||
uint32_t fb_reset = 7;
|
||||
int reset_step = 0;
|
||||
uint32_t fb_test = DAMFB_VERSION_PLATINUM << 9;
|
||||
uint32_t vram_refresh = 0x1F4;
|
||||
uint32_t vram_size = 0;
|
||||
uint32_t iridium_cfg = (IRIDIUM_VENDOR_VLSI << 24) | 1; // big-endian bus
|
||||
uint8_t vram_megs = 0;
|
||||
uint8_t half_bank = 0;
|
||||
uint8_t half_access = 0;
|
||||
uint8_t vmem_fp_mode = 0;
|
||||
uint8_t cur_mon_id = 0;
|
||||
uint8_t mon_sense = 0;
|
||||
|
||||
// video timing generator (Swatch) state
|
||||
uint32_t swatch_config = 0xFFD;
|
||||
uint32_t swatch_int_mask = 0;
|
||||
uint32_t swatch_config = 0xFFD;
|
||||
uint32_t swatch_params[17] = {};
|
||||
uint32_t timing_adjust = 0;
|
||||
|
||||
std::unique_ptr<DisplayID> display_id;
|
||||
// interrupt related state
|
||||
uint32_t swatch_int_mask = 0;
|
||||
uint32_t swatch_int_stat = 0;
|
||||
uint32_t cursor_line = 0;
|
||||
uint32_t cursor_task_id = 0;
|
||||
|
||||
std::unique_ptr<uint8_t[]> vram_ptr = nullptr;
|
||||
std::unique_ptr<DisplayID> display_id = nullptr;
|
||||
std::unique_ptr<AppleRamdac> dacula = nullptr;
|
||||
};
|
||||
|
||||
#endif // PLATINUM_MEMCTRL_H
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user