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ppcopcodes: fix mask generation for rotation instructions.
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@ -1272,7 +1272,7 @@ void ppc_rlwimi(){
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rot_sh = (ppc_cur_instruction >> 11) & 31;
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rot_mb = (ppc_cur_instruction >> 6) & 31;
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rot_me = (ppc_cur_instruction >> 1) & 31;
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uint32_t step1 = (0xFFFFFFFF >> (rot_me + 1)) ^ (0xFFFFFFFF >> rot_mb);
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uint32_t step1 = (0xFFFFFFFFUL << (rot_me + 1)) ^ (0xFFFFFFFFUL >> rot_mb);
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uint32_t step2 = (rot_me < rot_mb)? ~step1 : step1;
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uint32_t step3 = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32-rot_sh)));
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ppc_result_a = (ppc_result_a & ~step2) | (step3 & step2);
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@ -1287,7 +1287,7 @@ void ppc_rlwinm(){
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rot_sh = (ppc_cur_instruction >> 11) & 31;
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rot_mb = (ppc_cur_instruction >> 6) & 31;
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rot_me = (ppc_cur_instruction >> 1) & 31;
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uint32_t step1 = (0xFFFFFFFF >> (rot_me + 1)) ^ (0xFFFFFFFF >> rot_mb);
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uint32_t step1 = (0xFFFFFFFFUL << (rot_me + 1)) ^ (0xFFFFFFFFUL >> rot_mb);
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uint32_t step2 = (rot_me < rot_mb)? ~step1 : step1;
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uint32_t step3 = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32-rot_sh)));
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ppc_result_a = step2 & step3;
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@ -1301,7 +1301,7 @@ void ppc_rlwnm(){
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ppc_grab_regssab();
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rot_mb = (ppc_cur_instruction >> 6) & 31;
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rot_me = (ppc_cur_instruction >> 1) & 31;
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uint32_t step1 = (0xFFFFFFFF >> (rot_me + 1)) ^ (0xFFFFFFFF >> rot_mb);
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uint32_t step1 = (0xFFFFFFFFUL << (rot_me + 1)) ^ (0xFFFFFFFFUL >> rot_mb);
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uint32_t step2 = (rot_me < rot_mb)? ~step1 : step1;
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uint32_t step3 = ((ppc_result_d << ppc_result_b) | (ppc_result_d >> (32-ppc_result_b)));
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ppc_result_a = step2 & step3;
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