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Merge pull request #10 from maximumspatium/master

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Machine-specific address maps and generic MMIO devices.

This now allows the start-up chime to play on a PowerMac 6100 setup.
This commit is contained in:
dingusdev 2019-08-07 18:27:30 -07:00 committed by GitHub
commit a57b9c597c
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10 changed files with 382 additions and 51 deletions
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36
addressmap.cpp Normal file
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@ -0,0 +1,36 @@
#include <iostream>
#include "addressmap.h"
AddressMap::AddressMap()
{
this->address_map.clear();
}
AddressMap::~AddressMap()
{
for (auto &entry : address_map) {
if (entry.devobj)
delete(entry.devobj);
}
this->address_map.clear();
}
void AddressMap::add(AddressMapEntry &entry)
{
if (entry.type & RT_ROM) {
printf("ROM entry added.\n");
printf("entry.mem_ptr = %llx\n", (uint64_t)entry.mem_ptr);
}
address_map.push_back(entry);
}
AddressMapEntry *AddressMap::get_range(uint32_t addr)
{
for (auto &entry : address_map) {
if (addr >= entry.start && addr <= entry.end)
return &entry;
}
return 0;
}

39
addressmap.h Normal file
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@ -0,0 +1,39 @@
#ifndef ADDRESS_MAP_H
#define ADDRESS_MAP_H
#include <cinttypes>
#include <vector>
#include "mmiodevice.h"
typedef uint32_t (*DevRead) (uint32_t offset, int size);
typedef void (*DevWrite)(uint32_t offset, uint32_t value, int size);
enum RangeType {
RT_ROM = 1,
RT_RAM = 2,
RT_MMIO = 4, /* memory mapped I/O */
RT_MIRROR = 8
};
typedef struct AddressMapEntry {
uint32_t start; /* first address of the corresponding range */
uint32_t end; /* last address of the corresponding range */
uint32_t mirror; /* mirror address for RT_MIRROR */
uint32_t type; /* range type */
MMIODevice *devobj; /* pointer to device object */
unsigned char *mem_ptr; /* direct pointer to data for memory objects */
} AddressMapEntry;
class AddressMap {
public:
AddressMap();
~AddressMap();
void add(AddressMapEntry &entry);
AddressMapEntry *get_range(uint32_t addr);
private:
std::vector<AddressMapEntry> address_map;
};
#endif /* ADDRESS_MAP_H_ */

6
main.cpp
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@ -26,6 +26,7 @@
#include "mpc106.h"
#include "openpic.h"
#include "debugger.h"
#include "pmac6100hw.h"
//#include <vector>
#define max_16b_int 65535
@ -596,6 +597,8 @@ int main(int argc, char **argv)
//Copy the contents of the IO data and the ROM to memory appropriate locations.
romFile.read ((char *)machine_sysrom_mem,grab_sysrom_size);
if (is_nubus)
pmac6100_init();
/*
//Open the Disk File.
@ -867,6 +870,9 @@ int main(int argc, char **argv)
romFile.close();
//Free memory after the emulation is completed.
if (machine_phys_map)
delete(machine_phys_map);
free(machine_sysram_mem);
free(machine_upperiocontrol_mem);
free(machine_iocontrolcdma_mem);

39
makefile
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@ -1,6 +1,11 @@
OBJS = main.o macioserial.o macscsi.o macswim3.o mpc106.o openpic.o poweropcodes.o ppcfpopcodes.o ppcgekkoopcodes.o ppcmemory.o ppcopcodes.o viacuda.o davbus.o debugger.o
SOURCE = main.cpp macioserial.cpp macscsi.cpp macswim3.cpp mpc106.cpp openpic.cpp poweropcodes.cpp ppcfpopcodes.cpp ppcgekkoopcodes.cpp ppcmemory.cpp ppcopcodes.cpp viacuda.cpp davbus.cpp debugger.cpp
HEADER = macioserial.h macscsi.h macswim3.h mpc106.h openpic.h ppcemumain.h ppcmemory.h viacuda.h debugger.h
OBJS = main.o macioserial.o macscsi.o macswim3.o mpc106.o openpic.o poweropcodes.o \
ppcfpopcodes.o ppcgekkoopcodes.o ppcmemory.o ppcopcodes.o viacuda.o davbus.o \
debugger.o addressmap.o pmac6100hw.o
SOURCE = main.cpp macioserial.cpp macscsi.cpp macswim3.cpp mpc106.cpp openpic.cpp \
poweropcodes.cpp ppcfpopcodes.cpp ppcgekkoopcodes.cpp ppcmemory.cpp \
ppcopcodes.cpp viacuda.cpp davbus.cpp debugger.cpp addressmap.cpp pmac6100hw.cpp
HEADER = macioserial.h macscsi.h macswim3.h mpc106.h openpic.h ppcemumain.h ppcmemory.h \
viacuda.h debugger.h addressmap.h pmac6100hw.h
OUT = dingusppc
CC = g++
FLAGS = -g -c -Wall -std=c++11
@ -13,37 +18,37 @@ main.o: main.cpp
$(CC) $(FLAGS) main.cpp
macioserial.o: macioserial.cpp
$(CC) $(FLAGS) macioserial.cpp
$(CC) $(FLAGS) macioserial.cpp
macscsi.o: macscsi.cpp
$(CC) $(FLAGS) macscsi.cpp
$(CC) $(FLAGS) macscsi.cpp
macswim3.o: macswim3.cpp
$(CC) $(FLAGS) macswim3.cpp
$(CC) $(FLAGS) macswim3.cpp
mpc106.o: mpc106.cpp
$(CC) $(FLAGS) mpc106.cpp
$(CC) $(FLAGS) mpc106.cpp
openpic.o: openpic.cpp
$(CC) $(FLAGS) openpic.cpp
$(CC) $(FLAGS) openpic.cpp
poweropcodes.o: poweropcodes.cpp
$(CC) $(FLAGS) poweropcodes.cpp
$(CC) $(FLAGS) poweropcodes.cpp
ppcfpopcodes.o: ppcfpopcodes.cpp
$(CC) $(FLAGS) ppcfpopcodes.cpp
$(CC) $(FLAGS) ppcfpopcodes.cpp
ppcgekkoopcodes.o: ppcgekkoopcodes.cpp
$(CC) $(FLAGS) ppcgekkoopcodes.cpp
$(CC) $(FLAGS) ppcgekkoopcodes.cpp
ppcmemory.o: ppcmemory.cpp
$(CC) $(FLAGS) ppcmemory.cpp
$(CC) $(FLAGS) ppcmemory.cpp
ppcopcodes.o: ppcopcodes.cpp
$(CC) $(FLAGS) ppcopcodes.cpp
$(CC) $(FLAGS) ppcopcodes.cpp
viacuda.o: viacuda.cpp
$(CC) $(FLAGS) viacuda.cpp
$(CC) $(FLAGS) viacuda.cpp
davbus.o: davbus.cpp
$(CC) $(FLAGS) davbus.cpp
@ -51,5 +56,11 @@ davbus.o: davbus.cpp
debugger.o: debugger.cpp
$(CC) $(FLAGS) debugger.cpp
addressmap.o: addressmap.cpp
$(CC) $(FLAGS) addressmap.cpp
pmac6100hw.o: pmac6100hw.cpp
$(CC) $(FLAGS) pmac6100hw.cpp
clean:
rm -f $(OBJS) $(OUT)

14
mmiodevice.h Normal file
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@ -0,0 +1,14 @@
#ifndef MMIO_DEVICE_H
#define MMIO_DEVICE_H
#include <cinttypes>
/** Abstract class representing a simple, memory-mapped I/O device */
class MMIODevice {
public:
virtual uint32_t read(uint32_t offset, int size) = 0;
virtual void write(uint32_t offset, uint32_t value, int size) = 0;
virtual ~MMIODevice() = default;
};
#endif /* MMIO_DEVICE_H */

71
pmac6100hw.cpp Normal file
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@ -0,0 +1,71 @@
#include <iostream>
#include "ppcemumain.h"
#include "pmac6100hw.h"
#include "addressmap.h"
/** ======== High-speed memory controller (HMC) implementation ======== */
HMC::HMC()
{
this->config_reg = 0ULL;
this->bit_pos = 0;
}
uint32_t HMC::read(uint32_t offset, int size)
{
if (!offset)
return !!(this->config_reg & (1ULL << this->bit_pos++));
else
return 0; /* FIXME: what should be returned for invalid offsets? */
}
void HMC::write(uint32_t offset, uint32_t value, int size)
{
uint64_t bit;
switch(offset) {
case 0:
bit = 1ULL << this->bit_pos++;
this->config_reg = (value & 1) ? this->config_reg | bit :
this->config_reg & ~bit;
break;
case 8: /* writing to HMCBase + 8 resets internal bit position */
this->bit_pos = 0;
break;
}
}
/** Initialize Power Macintosh 6100 hardware. */
void pmac6100_init()
{
AddressMapEntry entry;
machine_phys_map = new AddressMap();
/* add ROM and its mirror */
entry = {0xFFC00000, 0xFFFFFFFF, 0, RT_ROM, 0, machine_sysrom_mem};
machine_phys_map->add(entry);
entry = {0x40000000, 0x403FFFFF, 0, RT_MIRROR | RT_ROM, 0, machine_sysrom_mem};
machine_phys_map->add(entry);
/* add soldered on-board RAM. FIXME: do it properly using memory objects */
entry = {0x00000000, 0x007FFFFF, 0, RT_RAM, 0, machine_sysram_mem};
machine_phys_map->add(entry);
/* this machine has two SIMM slots, each of them can hold max. 128 MB RAM */
/* SIMM slot 2 physical range: 0x08000000 - 0x0FFFFFFF */
/* SIMM slot 1 physical range: 0x10000000 - 0x17FFFFFF */
/* TODO: make those SIMM slots end-user configurable */
/* add high-speed memory controller I/O space */
entry = {0x50F40000, 0x50F4FFFF, 0, RT_MMIO, new HMC()};
machine_phys_map->add(entry);
/* add read-only machine identification register */
entry = {0x5FFFFFFC, 0x5FFFFFFF, 0, RT_MMIO, new CPUID(PM6100)};
machine_phys_map->add(entry);
printf("Machine initialization completed.\n");
}

45
pmac6100hw.h Normal file
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@ -0,0 +1,45 @@
#ifndef PMAC_6100_HW_H
#define PMAC_6100_HW_H
#include <cinttypes>
#include "mmiodevice.h"
/** Some Power macintosh IDs stored in the CPUID register */
enum PMACID {
PM6100 = 0x3010, /* PowerMac 6100 */
PM7100 = 0x3012, /* PowerMac 7100 */
PM8100 = 0x3013, /* PowerMac 8100 */
};
/** ======== High-speed memory controller (HMC) ======== */
class HMC : public MMIODevice {
public:
HMC();
~HMC() = default;
uint32_t read(uint32_t offset, int size);
void write(uint32_t offset, uint32_t value, int size);
private:
int bit_pos;
uint64_t config_reg;
};
/** CPUID is a read-only register containing machine identification (see PMACID) */
class CPUID : public MMIODevice {
public:
CPUID(const uint32_t id) {
this->cpuid = (0xA55A << 16) | (id & 0xFFFF); };
~CPUID() = default;
uint32_t read(uint32_t offset, int size) {
return (cpuid >> (3 - (offset & 3)) * 8) & 0xFF; };
void write(uint32_t offset, uint32_t value, int size) {}; /* not writable */
private:
uint32_t cpuid;
};
void pmac6100_init(void);
#endif /* PMAC_6100_HW_H */

3
ppcemumain.h
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@ -9,6 +9,7 @@
#define PPCEMUMAIN_H_
#include <map>
#include "addressmap.h"
//Uncomment this to help debug the emulator further
//#define EXHAUSTIVE_DEBUG 1
@ -88,6 +89,8 @@ SUPERVISOR MODEL
536 - 543 are the Data BAT registers
**/
extern AddressMap *machine_phys_map;
extern uint32_t return_value; //used for loading from memory
extern uint32_t opcode_value; //used for interpreting opcodes

175
ppcmemory.cpp
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@ -22,6 +22,7 @@
#include "openpic.h"
#include "mpc106.h"
#include "davbus.h"
#include "addressmap.h"
std::vector<uint32_t> pte_storage;
@ -56,6 +57,8 @@ unsigned char * grab_macmem_ptr;
unsigned char * grab_pteg1_ptr;
unsigned char * grab_pteg2_ptr;
AddressMap *machine_phys_map = 0;
std::atomic<bool> hash_found (false);
/** PowerPC-style MMU BAT arrays (NULL initialization isn't prescribed). */
@ -94,76 +97,70 @@ void msr_status_update(){
msr_dr_test = (ppc_state.ppc_msr >> 4) & 1;
}
inline void ppc_set_cur_instruction(uint32_t mem_index)
static inline void ppc_set_cur_instruction(unsigned char *ptr, uint32_t offset)
{
ppc_cur_instruction = (grab_macmem_ptr[mem_index] << 24) |
(grab_macmem_ptr[mem_index+1] << 16) |
(grab_macmem_ptr[mem_index+2] << 8) |
grab_macmem_ptr[mem_index+3];
ppc_cur_instruction = (ptr[offset] << 24) | (ptr[offset+1] << 16) |
(ptr[offset+2] << 8) | ptr[offset+3];
}
void ppc_set_return_val(uint32_t mem_index, int num_size)
static inline void ppc_set_return_val(unsigned char *ptr, uint32_t offset,
int num_size)
{
//Put the final result in return_value here
//This is what gets put back into the register
if (ppc_state.ppc_msr & 1) { /* little-endian byte ordering */
if (num_size == 1) { // BYTE
return_value = grab_macmem_ptr[mem_index];
return_value = ptr[offset];
}
else if (num_size == 2) { // WORD
return_value = grab_macmem_ptr[mem_index] |
(grab_macmem_ptr[mem_index+1] << 8);
return_value = ptr[offset] | (ptr[offset+1] << 8);
}
else if (num_size == 4) { // DWORD
return_value = grab_macmem_ptr[mem_index] |
(grab_macmem_ptr[mem_index+1] << 8) |
(grab_macmem_ptr[mem_index+2] << 16) |
(grab_macmem_ptr[mem_index+3] << 24);
return_value = ptr[offset] | (ptr[offset+1] << 8) |
(ptr[offset+2] << 16) | (ptr[offset+3] << 24);
}
} else { /* big-endian byte ordering */
if (num_size == 1) { // BYTE
return_value = grab_macmem_ptr[mem_index];
return_value = ptr[offset];
}
else if (num_size == 2) { // WORD
return_value = (grab_macmem_ptr[mem_index] << 8) |
grab_macmem_ptr[mem_index+1];
return_value = (ptr[offset] << 8) | ptr[offset+1];
}
else if (num_size == 4) { // DWORD
return_value = (grab_macmem_ptr[mem_index] << 24) |
(grab_macmem_ptr[mem_index+1] << 16) |
(grab_macmem_ptr[mem_index+2] << 8) |
grab_macmem_ptr[mem_index+3];
return_value = (ptr[offset] << 24) | (ptr[offset+1] << 16) |
(ptr[offset+2] << 8) | ptr[offset+3];
}
}
}
void ppc_memstore_value(uint32_t value_insert, uint32_t mem_index, int num_size)
static inline void ppc_memstore_value(unsigned char *ptr, uint32_t value,
uint32_t offset, int num_size)
{
if (ppc_state.ppc_msr & 1) { /* little-endian byte ordering */
if (num_size >= 1) { // BYTE
grab_macmem_ptr[mem_index] = value_insert & 0xFF;
ptr[offset] = value & 0xFF;
}
if (num_size >= 2) { // WORD
grab_macmem_ptr[mem_index+1] = (value_insert >> 8) & 0xFF;
ptr[offset+1] = (value >> 8) & 0xFF;
}
if (num_size == 4) { // DWORD
grab_macmem_ptr[mem_index+2] = (value_insert >> 16) & 0xFF;
grab_macmem_ptr[mem_index+3] = (value_insert >> 24) & 0xFF;
ptr[offset+2] = (value >> 16) & 0xFF;
ptr[offset+3] = (value >> 24) & 0xFF;
}
} else { /* big-endian byte ordering */
if (num_size == 1) { // BYTE
grab_macmem_ptr[mem_index] = value_insert & 0xFF;
ptr[offset] = value & 0xFF;
}
else if (num_size == 2) { // WORD
grab_macmem_ptr[mem_index] = (value_insert >> 8) & 0xFF;
grab_macmem_ptr[mem_index+1] = value_insert & 0xFF;
ptr[offset] = (value >> 8) & 0xFF;
ptr[offset+1] = value & 0xFF;
}
else if (num_size == 4) { // DWORD
grab_macmem_ptr[mem_index] = (value_insert >> 24) & 0xFF;
grab_macmem_ptr[mem_index+1] = (value_insert >> 16) & 0xFF;
grab_macmem_ptr[mem_index+2] = (value_insert >> 8) & 0xFF;
grab_macmem_ptr[mem_index+3] = value_insert & 0xFF;
ptr[offset] = (value >> 24) & 0xFF;
ptr[offset+1] = (value >> 16) & 0xFF;
ptr[offset+2] = (value >> 8) & 0xFF;
ptr[offset+3] = value & 0xFF;
}
}
}
@ -560,7 +557,7 @@ uint32_t ppc_mmu_addr_translate(uint32_t la, uint32_t access_type)
return pa;
}
#if 0
/** Insert a value into memory from a register. */
void address_quickinsert_translate(uint32_t value_insert, uint32_t address_grab,
uint8_t num_bytes)
@ -745,7 +742,45 @@ void address_quickinsert_translate(uint32_t value_insert, uint32_t address_grab,
ppc_memstore_value(value_insert, storage_area, num_bytes);
}
#endif
#if 1
uint32_t write_last_pa_start = 0;
uint32_t write_last_pa_end = 0;
unsigned char *write_last_ptr = 0;
void address_quickinsert_translate(uint32_t value, uint32_t addr, uint8_t num_bytes)
{
/* data address translation if enabled */
if (ppc_state.ppc_msr & 0x10) {
//printf("DATA RELOCATION GO! - INSERTING \n");
addr = ppc_mmu_addr_translate(addr, 0);
}
if (addr >= write_last_pa_start && addr <= write_last_pa_end) {
ppc_memstore_value(write_last_ptr, value, addr - write_last_pa_start, num_bytes);
} else {
AddressMapEntry *entry = machine_phys_map->get_range(addr);
if (entry) {
if (entry->type & RT_RAM) {
write_last_pa_start = entry->start;
write_last_pa_end = entry->end;
write_last_ptr = entry->mem_ptr;
ppc_memstore_value(write_last_ptr, value, addr - entry->start, num_bytes);
} else if (entry->type & RT_MMIO) {
entry->devobj->write(addr - entry->start, value, num_bytes);
} else {
printf("Please check your address map!\n");
}
} else {
printf("WARNING: write attempt to unmapped memory at 0x%08X!\n", addr);
}
}
}
#endif
#if 0
/** Grab a value from memory into a register */
void address_quickgrab_translate(uint32_t address_grab, uint8_t num_bytes)
{
@ -915,7 +950,50 @@ void address_quickgrab_translate(uint32_t address_grab, uint8_t num_bytes)
ppc_set_return_val(storage_area, num_bytes);
}
#endif
#if 1
uint32_t read_last_pa_start = 0;
uint32_t read_last_pa_end = 0;
unsigned char *read_last_ptr = 0;
/** Grab a value from memory into a register */
void address_quickgrab_translate(uint32_t addr, uint8_t num_bytes)
{
/* data address translation if enabled */
if (ppc_state.ppc_msr & 0x10) {
//printf("DATA RELOCATION GO! - GRABBING \n");
addr = ppc_mmu_addr_translate(addr, 0);
}
if (addr >= read_last_pa_start && addr <= read_last_pa_end) {
ppc_set_return_val(read_last_ptr, addr - read_last_pa_start, num_bytes);
} else {
AddressMapEntry *entry = machine_phys_map->get_range(addr);
if (entry) {
if (entry->type & (RT_ROM | RT_RAM)) {
read_last_pa_start = entry->start;
read_last_pa_end = entry->end;
read_last_ptr = entry->mem_ptr;
ppc_set_return_val(read_last_ptr, addr - entry->start, num_bytes);
} else if (entry->type & RT_MMIO) {
return_value = entry->devobj->read(addr - entry->start, num_bytes);
} else {
printf("Please check your address map!\n");
}
} else {
printf("WARNING: read attempt from unmapped memory at 0x%08X!\n", addr);
/* reading from unmapped memory will return unmapped value */
for (return_value = 0xFF; --num_bytes > 0;)
return_value = (return_value << 8) | 0xFF;
}
}
}
#endif
#if 0
void quickinstruction_translate(uint32_t address_grab)
{
uint32_t storage_area = 0;
@ -1023,3 +1101,34 @@ void quickinstruction_translate(uint32_t address_grab)
ppc_set_cur_instruction(storage_area);
}
#endif
#if 1
uint32_t exec_last_pa_start = 0;
uint32_t exec_last_pa_end = 0;
unsigned char *exec_last_ptr = 0;
void quickinstruction_translate(uint32_t addr)
{
/* instruction address translation if enabled */
if (ppc_state.ppc_msr & 0x20) {
printf("INSTRUCTION RELOCATION GO! \n");
addr = ppc_mmu_instr_translate(addr);
}
if (addr >= exec_last_pa_start && addr <= exec_last_pa_end) {
ppc_set_cur_instruction(exec_last_ptr, addr - exec_last_pa_start);
} else {
AddressMapEntry *entry = machine_phys_map->get_range(addr);
if (entry && entry->type & (RT_ROM | RT_RAM)) {
exec_last_pa_start = entry->start;
exec_last_pa_end = entry->end;
exec_last_ptr = entry->mem_ptr;
ppc_set_cur_instruction(exec_last_ptr, addr - exec_last_pa_start);
} else {
printf("WARNING: attempt to execute code at %08X!\n", addr);
}
}
}
#endif

5
ppcopcodes.cpp
View File

@ -841,7 +841,6 @@ void ppc_nanddot(){
void ppc_or(){
ppc_grab_regssab();
ppc_result_a = ppc_result_d | ppc_result_b;
printf("OR Result: %x in Reg %d from Regs %d and %d \n", ppc_result_a, reg_a, reg_s, reg_b);
ppc_store_result_rega();
}
@ -1442,7 +1441,6 @@ void ppc_mtspr(){
case 534:
case 535:
ibat_update(ref_spr);
std::cout << "IBAT CHANGED!" <<std::endl;
break;
case 536:
case 537:
@ -1453,7 +1451,6 @@ void ppc_mtspr(){
case 542:
case 543:
dbat_update(ref_spr);
std::cout << "DBAT CHANGED!" <<std::endl;
}
}
@ -1886,7 +1883,7 @@ void ppc_twi(){
}
void ppc_eieio(){
std::cout << "Oops. Placeholder for eieio." << std::endl;
//std::cout << "Oops. Placeholder for eieio." << std::endl;
}
void ppc_isync(){