Macintosh-Tools/dingusppc
1
0
Fork 0
mirror of https://github.com/dingusdev/dingusppc.git synced 2025-01-11 05:29:43 +00:00
Code Issues Projects Releases Wiki Activity

Allow setting PCI capabilities pointer

Browse Source 
The capabilities pointer is usually a constant, but whatever the capabilities pointer points to has to be handled by the derived class.
This commit is contained in:
joevt 2022-08-22 02:39:07 -07:00
parent 6fad095730
commit d843091a4d
2 changed files with 6 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
devices/common/pci/pcidevice.cpp
View File

@ -83,6 +83,9 @@ uint32_t PCIDevice::pci_cfg_read(uint32_t reg_offs, uint32_t size)
case PCI_CFG_DWORD_15:
result = (max_lat << 24) | (min_gnt << 16) | (irq_pin << 8) | irq_line;
break;
case PCI_CFG_CAP_PTR:
result = cap_ptr;
break;
default:
LOG_F(
WARNING, "%s: attempt to read from reserved/unimplemented register @%02x.%c",

3
devices/common/pci/pcidevice.h
View File

@ -45,6 +45,8 @@ enum {
PCI_CFG_CIS_PTR = 0x28, // Cardbus CIS Pointer
PCI_CFG_SUBSYS_ID = 0x2C, // Subsysten IDs
PCI_CFG_ROM_BAR = 0x30, // expansion ROM base address
PCI_CFG_CAP_PTR = 0x34, // capabilities pointer
PCI_CFG_DWORD_14 = 0x38, // reserved
PCI_CFG_DWORD_15 = 0x3C, // Max_Lat, Min_Gnt, Int_Pin and Int_Line registers
};
@ -117,6 +119,7 @@ protected:
uint8_t cache_ln_sz = 0; // cache line size
uint16_t subsys_id = 0;
uint16_t subsys_vndr = 0;
uint8_t cap_ptr = 0;
uint8_t max_lat = 0;
uint8_t min_gnt = 0;
uint8_t irq_pin = 0;