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Some more minor fixes to the opcodes

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Reduces the warnings for the Floating point opcodes
This commit is contained in:
dingusdev 2019-07-20 16:00:15 -07:00 committed by GitHub
parent 8560a540c9
commit de937651ed
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 24 additions and 24 deletions
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32
ppcfpopcodes.cpp
View File

@ -1016,14 +1016,14 @@ void ppc_mffsdot(){
void ppc_mtfsf(){
reg_b = (ppc_cur_instruction >> 11) & 31;
uint32_t fm_mask = (ppc_cur_instruction >> 17) & 255;
crm += ((fm_mask & 1) == 1)? 0xF0000000 : 0x00000000;
crm += ((fm_mask & 2) == 1)? 0x0F000000 : 0x00000000;
crm += ((fm_mask & 4) == 1)? 0x00F00000 : 0x00000000;
crm += ((fm_mask & 8) == 1)? 0x000F0000 : 0x00000000;
crm += ((fm_mask & 16) == 1)? 0x0000F000 : 0x00000000;
crm += ((fm_mask & 32) == 1)? 0x00000F00 : 0x00000000;
crm += ((fm_mask & 64) == 1)? 0x000000F0 : 0x00000000;
crm += ((fm_mask & 128) == 1)? 0x0000000F : 0x00000000;
crm += ((fm_mask && 1) == 1)? 0xF0000000 : 0x00000000;
crm += ((fm_mask && 2) == 1)? 0x0F000000 : 0x00000000;
crm += ((fm_mask && 4) == 1)? 0x00F00000 : 0x00000000;
crm += ((fm_mask && 8) == 1)? 0x000F0000 : 0x00000000;
crm += ((fm_mask && 16) == 1)? 0x0000F000 : 0x00000000;
crm += ((fm_mask && 32) == 1)? 0x00000F00 : 0x00000000;
crm += ((fm_mask && 64) == 1)? 0x000000F0 : 0x00000000;
crm += ((fm_mask && 128) == 1)? 0x0000000F : 0x00000000;
uint32_t quickfprval = (uint32_t)ppc_state.ppc_fpr[reg_b];
ppc_state.ppc_fpscr = (quickfprval & crm) | (quickfprval & ~(crm));
}
@ -1031,14 +1031,14 @@ void ppc_mtfsf(){
void ppc_mtfsfdot(){
reg_b = (ppc_cur_instruction >> 11) & 31;
uint32_t fm_mask = (ppc_cur_instruction >> 17) & 255;
crm += ((fm_mask & 1) == 1)? 0xF0000000 : 0x00000000;
crm += ((fm_mask & 2) == 1)? 0x0F000000 : 0x00000000;
crm += ((fm_mask & 4) == 1)? 0x00F00000 : 0x00000000;
crm += ((fm_mask & 8) == 1)? 0x000F0000 : 0x00000000;
crm += ((fm_mask & 16) == 1)? 0x0000F000 : 0x00000000;
crm += ((fm_mask & 32) == 1)? 0x00000F00 : 0x00000000;
crm += ((fm_mask & 64) == 1)? 0x000000F0 : 0x00000000;
crm += ((fm_mask & 128) == 1)? 0x0000000F : 0x00000000;
crm += ((fm_mask && 1) == 1)? 0xF0000000 : 0x00000000;
crm += ((fm_mask && 2) == 1)? 0x0F000000 : 0x00000000;
crm += ((fm_mask && 4) == 1)? 0x00F00000 : 0x00000000;
crm += ((fm_mask && 8) == 1)? 0x000F0000 : 0x00000000;
crm += ((fm_mask && 16) == 1)? 0x0000F000 : 0x00000000;
crm += ((fm_mask && 32) == 1)? 0x00000F00 : 0x00000000;
crm += ((fm_mask && 64) == 1)? 0x000000F0 : 0x00000000;
crm += ((fm_mask && 128) == 1)? 0x0000000F : 0x00000000;
uint32_t quickfprval = (uint32_t)ppc_state.ppc_fpr[reg_b];
ppc_state.ppc_fpscr = (quickfprval & crm) | (quickfprval & ~(crm));
}

16
ppcopcodes.cpp
View File

@ -1396,17 +1396,17 @@ void ppc_mtmsr(){
void ppc_mfspr(){
uint32_t ref_spr = (((ppc_cur_instruction >> 11) & 31) << 5) | ((ppc_cur_instruction >> 16) & 31);
printf("MFSPR SPR REF: %d \n", ref_spr);
//printf("MFSPR SPR REF: %d \n", ref_spr);
reg_d = (ppc_cur_instruction >> 21) & 31;
ppc_state.ppc_gpr[reg_d] = ppc_state.ppc_spr[ref_spr];
printf("Contained inside Reg %d: %x \n", reg_d, ppc_state.ppc_gpr[reg_d]);
//printf("Contained inside Reg %d: %x \n", reg_d, ppc_state.ppc_gpr[reg_d]);
}
void ppc_mtspr(){
uint32_t ref_spr = (((ppc_cur_instruction >> 11) & 31) << 5) | ((ppc_cur_instruction >> 16) & 31);
printf("MTSPR SPR REF: %d \n", ref_spr);
//printf("MTSPR SPR REF: %d \n", ref_spr);
reg_s = (ppc_cur_instruction >> 21) & 31;
printf("Contained inside Reg %d: %x \n", reg_s, ppc_state.ppc_gpr[reg_s]);
//printf("Contained inside Reg %d: %x \n", reg_s, ppc_state.ppc_gpr[reg_s]);
if (ref_spr != 287){
ppc_state.ppc_spr[ref_spr] = ppc_state.ppc_gpr[reg_s];
@ -1766,7 +1766,7 @@ void ppc_crand(){
}
void ppc_crandc(){
ppc_grab_regsdab();
if ((ppc_state.ppc_cr && (0x80000000 >> reg_a)) & ~(ppc_state.ppc_cr && (0x80000000 >> reg_b))){
if ((ppc_state.ppc_cr && (0x80000000 >> reg_a)) & !(ppc_state.ppc_cr && (0x80000000 >> reg_b))){
ppc_state.ppc_cr |= (0x80000000 >> reg_d);
}
else{
@ -1775,7 +1775,7 @@ void ppc_crandc(){
}
void ppc_creqv(){
ppc_grab_regsdab();
if (!((ppc_state.ppc_cr && (0x80000000 >> reg_a)) ^ !(ppc_state.ppc_cr && (0x80000000 >> reg_b)))){
if (!((ppc_state.ppc_cr && (0x80000000 >> reg_a)) ^ (ppc_state.ppc_cr && (0x80000000 >> reg_b)))){
ppc_state.ppc_cr |= (0x80000000 >> reg_d);
}
else{
@ -1793,7 +1793,7 @@ void ppc_crnand(){
}
void ppc_crnor(){
ppc_grab_regsdab();
if (!((ppc_state.ppc_cr && (0x80000000 >> reg_a)) | ~(ppc_state.ppc_cr && (0x80000000 >> reg_b)))){
if (!((ppc_state.ppc_cr && (0x80000000 >> reg_a)) | (ppc_state.ppc_cr && (0x80000000 >> reg_b)))){
ppc_state.ppc_cr |= (0x80000000 >> reg_d);
}
else{
@ -1812,7 +1812,7 @@ void ppc_cror(){
}
void ppc_crorc(){
ppc_grab_regsdab();
if ((ppc_state.ppc_cr && (0x80000000 >> reg_a)) | ~(ppc_state.ppc_cr && (0x80000000 >> reg_b))){
if ((ppc_state.ppc_cr && (0x80000000 >> reg_a)) | !(ppc_state.ppc_cr && (0x80000000 >> reg_b))){
ppc_state.ppc_cr |= (0x80000000 >> reg_d);
}
else{