Commit Graph

5 Commits

Author SHA1 Message Date
joevt
6fad095730 Allow setting PCI status register
Don't always return 0 when reading it. The status register contains some bits that Open Firmware uses to set some properties.
A PCI device can set a default status register value to set those bits.
	this->status = 0x02B0; // 0000  0 01 0  1 0 1 1  0000 Capabilities List, 66 MHz, Fast Back-to-Back, DevSel Speed: Medium
2022-08-22 17:16:22 -07:00
joevt
6af8b52376 changes to pci logging
For invalid or unsupported PCI accesses, do the following:
- log a device's full pci address using pciutils setpci command format bb:dd.f @rr.s (bus:device:function @register+offset.size).
- report as read or write access.
- log value for writes.
- bus, device, function, and register values cannot be determined from Invalid IDSEL values so they will output as ??.
- for invalid IDSEL values, report the entire value of the config_addr.
- for valid IDSEL values, the bus number cannot be determined since IDSEL only specifies device number. It's probably bus 00 but we'll show ?? to indicate an IDSEL type access.

Add missing config type read access logging for chaos.
2022-08-22 17:16:17 -07:00
Maxim Poliakovski
32b8c8ed43 pcidevice: fix expansion ROM mapping. 2022-08-20 12:51:08 +02:00
Maxim Poliakovski
ed02a06bb8 pcidevice: loading of expansion ROMs from files. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
1f67a57d7b Common code for handling PCI config space. 2022-05-21 14:51:26 +02:00