Commit Graph
85 Commits
Author SHA1 Message Date
joevt c8a9fb91c5 grandcentral: Apply mask when reading int events.
The event is still pending even if masked. It will cause an interrupt
when it is unmasked unless it is cleared. Tested on real Power Mac 8600.
2026-09-03 07:36:39 -07:00
joevt b670fab0f3 grandcentral: Always set DMA interrupt 11.
This interrupt is reserved and is therefore always set.
Tested on a real Power Mac 8600.
2026-09-03 07:36:30 -07:00
Maxim Poliakovski 9561edcea2 sc53c94: remove obsolete DMA code. 2026-07-01 19:56:15 +02:00
Maxim Poliakovski ba34d78a7c grandcentral: fix interrupt clearing.
Fix an issue introduced in 4d9f6f33ee
2026-07-01 19:56:15 +02:00
joevt a3c6d25cc5 grandcentral: Improve IOBus device 3/5 comments. 2026-06-17 07:02:12 -07:00
Maxim Poliakovski 0e2ffa7863 Move endianswap.h to core/* 2026-06-07 21:10:51 +02:00
Maxim Poliakovski a68bd5b07e escc: switch to new DMA API. 2026-05-29 23:36:24 +02:00
Maxim Poliakovski 41f4af948f grandcentral: implement DMA interrupt clearing. 2026-05-29 21:22:56 +02:00
joevt a8dfc8d15c grandcentral: Decode entire DMA range.
Only DMA channels 0..0xA actually exist, but the range extends to 0x7F.
2026-05-27 06:43:40 -07:00
joevt 16117e6c60 escc: Add channel and direction enums.
Also fix dma_ch index in dma_out_tx, dma_flush_tx.
2026-03-08 10:54:09 -07:00
dingusdev 213dd4c16e Update copyright info further 2026-01-30 08:12:04 -07:00
Maxim Poliakovski e75ee8d32a Update copyright year. 2026-01-30 12:15:00 +01:00
joevt 678b51ddfb grandcentral: Add comment. 2025-11-28 18:18:00 +01:00
joevt c7fbd5ed4a grandcentral: Fix DEVSEL. 2025-11-10 07:40:34 -07:00
dingusdev fb5f1ed915 Stub out serial
Allows Mac OS 8.x and 9.x to boot from HD on older PCI Power Macs
2025-08-24 13:52:09 -07:00
joevt d789935a6d grandcentral: Supports IOBUS_HOST comp type. 2025-08-24 13:46:03 -07:00
joevt fbfbfb4b33 grandcentral: Fix grammar. 2025-06-20 07:02:55 -07:00
Maxim Poliakovski af25d41375 grandcentral: move simple methods to macio.h 2025-06-18 22:59:13 +02:00
Maxim Poliakovski 5b1c832a05 Remove duplications of INT_TO_IRQ_ID macro. 2025-06-17 15:27:48 +02:00
joevt 35f2ce14f1 Add type and description to device descriptors.
Add supports_types to device descriptors so that we can determine
supported types without having to create the hardware device.
Add description so that each device can have an optional description.
2025-05-28 17:58:08 +02:00
joevt 6f00113554 Move MeshTnt to GrandCentralTnt.
Also create GrandCentralCatalyst which doesn't include Mesh.
2025-05-27 07:57:16 -07:00
joevt a8b6a16e1a Move ScsiCurio to Sc53C94. 2025-05-27 07:56:26 -07:00
joevt 20e7dfb0e1 macio: Log unsupported DMA channels once.
For debugging. No need to spam the log.
2025-03-25 21:39:49 -07:00
joevt 637c20e3cf grandcentral: Handle bit-flipping of MAC address.
If the ENET ROM begins with 0x10, then the bits of each byte are flipped 7..0 -> 0..7 which means the MAC address will begin with 0x08.
A MAC address beginning with 0x08 can be bit-flipped or not bit-flipped.
A MAC address cannot begin with 0x10.
I have a `dump-device-tree` output for a Power Mac 9500 with MAC address beginning with 08-00-07 (OUI for "Apple, Inc."). I don't know if it's using the bit-flipped ROM (starting with 10) or not bit-flipped ROM (starting with 08).
Most of the other `dump-device-tree` outputs I've seen have a MAC address beginning with an OUI for "Apple, Inc." that begins with 00.
2025-03-24 06:39:55 -07:00
Maxim Poliakovski bcb453e7ea Named constants for PCI IDs for MacIO ASICs. 2025-02-26 19:31:22 +01:00
joevt 101bb826f1 Make irq_id 64 bits.
- So that DMA and other interrupts can fit without overlap.
- To simplify conversion to interrupt mask.
- To reduce variables, defines, and code.
2025-02-10 06:49:39 -07:00
joevt 2f30395d00 Break long lines.
Make them 130 characters or less.
2025-01-30 06:30:51 -07:00
joevt 1bf4073fa7 macio: Range check scc compatible register index.
Also, non-compatible registers don't begin until 0x60 for SCC compatible addressing.
2024-12-04 21:03:09 -07:00
Maxim Poliakovski 85d5b10f61 sc53c94: switch to the new DMA API. 2024-12-03 11:37:18 +01:00
Mihai Parparita 4479387580 Remove using namespace std from remaining header files
It's somewhat of an anti-pattern, and can lead to conflicts with
other symbols (e.g. the Windows build failure in https://github.com/dingusdev/dingusppc/actions/runs/11762906342/job/32766290288,
I removed `using namespace std` from timermanager.h to fix that one).
2024-11-30 20:01:09 -08:00
joevt e7eb1c8a66 Fix PCI interrupts and add devices.
- Use interrupt source instead of IRQ ID in the IrqMap.
- Add a get_interrupt_controller method to mirror the set_interrupt_controller method.
- Have PCI hosts use pcihost_device_postinit to add PCI devices. This was moved from bandit's device_postinit and allows for duplicate devices by appending the slot to the registered device name.
- Fix interrupts of Pippin.

Fix interrupts of cmd646
- Make it work like other PCI devices.
- IntDetails is built into the pcibase base class.
- IntDetails is initialized by calling pci_interrupt.
- pci_interrupt checks the "enable interrupts" flag before doing an interrupt.
2024-11-12 07:04:55 -07:00
joevt e707d1f27a Remove slashes from PCI device names.
So they are not mistaken for path separators.
2024-11-11 21:28:51 -07:00
joevt 9a2303c495 pci: Replace pci_name with get_name.
It's redundant to have two names.
2024-11-11 21:28:23 -07:00
Maxim Poliakovski c6116fcc88 grandcentral: pass Curio DREQ state to its DMA channel.
Bit 5 of the channel status register of the SCSI0 DMA channel
reflects the DREQ signal from Curio.
The old SCSI API still used in some Macintosh applications
- most notably HD SC Setup and Drive Setup - relies on this API
and that signal to be implemented.
2024-11-03 15:10:33 +01:00
Maxim Poliakovski a649a688e7 grandcentral: fix interrupt masking.
Use int_mask directly without changing int_events.
That permits interrupt generation on int_mask changes.
2024-09-28 23:17:14 +02:00
Maxim Poliakovski 211f8adc0e Improve MACE stub. 2024-07-23 01:39:15 +02:00
Maxim Poliakovski 3fe6e3c09e grandcentral: more elegant MeshStub with less checks. 2024-07-19 01:31:36 +02:00
Maxim Poliakovski ba9fcd100d mesh: extend stub to a full implementation. 2024-07-15 03:34:43 +02:00
Maxim Poliakovski f13f4e0023 grandcentral: break long lines. 2024-07-15 02:56:24 +02:00
joevt be27ceed00 machinetnt: Remove sixty6 and mesh properties.
Use the presence of the devices in the MachineDescription to determine these.
2024-04-10 20:19:43 -07:00
dingusdev 475f894582 Comment out log message 2024-04-02 19:21:56 -07:00
joevt 7007e002e6 macio: Make interrupt flags atomic.
So they can be modified by other threads.
2024-04-02 19:05:57 -07:00
joevt 2c097da12d grandcentral: Add escc DMA. 2024-03-30 14:55:24 -07:00
joevt 5f316dc7a4 grandcentral: Adjust audio in DMA logging. 2024-03-30 12:49:33 -07:00
joevt 31036b8dee grandcentral: Add sound in DMA. 2024-03-09 06:03:33 -07:00
joevt 6f231f3367 grandcentral: IOBus changes.
- Add IOBusDevice (nvram_addr_hi_dev) for NVRAM addr hi.
- Add IOBusDevice (nvram_dev) for NVRAM data.
- Make all IOBusDevices use the same code.
- Log error if 4 least significant bits of offset are not zero.
- Correctly byte swap the value before passing it to the IOBusDevice.
- When reading, duplicate the bytes in a word or dword like a real Power Mac does.
2024-03-09 06:02:23 -07:00
joevt 04526012f9 grandcentral: Add Ethernet ROM. 2024-03-07 07:59:13 -07:00
joevt 052a47734f macio: Add DMA interrupts. 2024-03-06 21:19:04 -07:00
joevt 54767bf97d More interrupts.
- Add all the interrupts including DMA.
- Modify the Interrupt to IRQ_ID translation so the interrupts belonging to the first set of 32 interrupts don't need to be shifted.
2024-03-06 19:17:16 -07:00
joevt 1e78512c95 Rename Curio and Mesh. 2024-03-02 11:12:45 -07:00