dingusppc/cpu/ppc/test/ppcdisasmtest.csv

1	# Test data for PowerPC disassembler supplied as comma-separated values
2	# Data format:
3	# instruction address (hex), instruction code (hex), expected disassembly: opcode, [operands...]
4	# unconditional branches
5	0xFFF03008,0x48000355,bl,0xFFF0335C
6	0xFFF03000,0x4280035C,b,0xFFF0335C
7	# conditional branches with simplified mnemonics, primary opcode 0x10
8	0xFFF0011C,0x409E2EE4,bne,cr7,0xFFF03000
9	0xFFF00100,0x40A60098,bne+,cr1,0xFFF00198
10	0xFFF00100,0x41820018,beq,0xFFF00118
11	0xFFF03004,0x41200054,bdnzt+,lt,0xFFF03058
12	0xFFF03004,0x40000054,bdnzf,lt,0xFFF03058
13	0xFFF03000,0x4106FFF4,bdnzt,4*cr1+eq,0xFFF02FF4
14	# indexed load/store instructions, primary opcode 0x1F
15	0xFFF00100,0x7D49F02E,lwzx,r10,r9,r30
16	0xFFF00100,0x7FAB806E,lwzux,r29,r11,r16
17	0xFFF00100,0x7C0820AE,lbzx,r0,r8,r4
18	0xFFF00100,0x7F47E8EE,lbzux,r26,r7,r29
19	0xFFF00100,0x7C01612E,stwx,r0,r1,r12
20	0xFFF00100,0x7FC3996E,stwux,r30,r3,r19
21	0xFFF00100,0x7D2C09AE,stbx,r9,r12,r1
22	0xFFF00100,0x7C8531EE,stbux,r4,r5,r6
23	0xFFF00100,0x7C94DA2E,lhzx,r4,r20,r27
24	0xFFF00100,0x7C833A6E,lhzux,r4,r3,r7
25	0xFFF00100,0x7D8F62AE,lhax,r12,r15,r12
26	0xFFF00100,0x7C98DAEE,lhaux,r4,r24,r27
27	0xFFF00100,0x7C0C0B2E,sthx,r0,r12,r1
28	0xFFF00100,0x7C032B6E,sthux,r0,r3,r5
29	0xFFF00100,0x7C43242E,lfsx,fp2,r3,r4
30	0xFFF00100,0x7C43246E,lfsux,fp2,r3,r4
31	0xFFF00100,0x7D491CAE,lfdx,fp10,r9,r3
32	0xFFF00100,0x7C4324EE,lfdux,fp2,r3,r4
33	0xFFF00100,0x7C43252E,stfsx,fp2,r3,r4
34	0xFFF00100,0x7C43256E,stfsux,fp2,r3,r4
35	0xFFF00100,0x7C4325AE,stfdx,fp2,r3,r4
36	0xFFF00100,0x7C4325EE,stfdux,fp2,r3,r4
37	# arithmetic instructions with immediate operand
38	0xFFF00100,0x1F00A81A,mulli,r24,r0,-0x57E6
39	0xFFF00100,0x1D8A4CCC,mulli,r12,r10,0x4CCC
40	0xFFF00100,0x207CFEE0,subfic,r3,r28,-0x120
41	0xFFF00100,0x20894E75,subfic,r4,r9,0x4E75
42	0xFFF00100,0x38BE0000,addi,r5,r30,0x0
43	0xFFF00100,0x3A2EFFF0,addi,r17,r14,-0x10
44	0xFFF00100,0x307F005E,addic,r3,r31,0x5E
45	0xFFF00100,0x30C4FFFF,addic,r6,r4,-0x1
46	0xFFF00100,0x34803012,addic.,r4,r0,0x3012
47	0xFFF00100,0x3E1F4A47,addis,r16,r31,0x4A47
48	0xFFF00100,0x3F3CFFF6,addis,r25,r28,-0xA
49	# subtracts and friends, primary opcode 0x1F
50	0xFFF00100,0x7C03E810,subfc,r0,r3,r29
51	0xFFF00100,0x7CE03011,subfc.,r7,r0,r6
52	0xFFF00100,0x7CC47C10,subfco,r6,r4,r15
53	0xFFF00100,0x7CC46C11,subfco.,r6,r4,r13
54	0xFFF00100,0x7D800850,subf,r12,r0,r1
55	0xFFF00100,0x7C966851,subf.,r4,r22,r13
56	0xFFF00100,0x7C7B8C50,subfo,r3,r27,r17
57	0xFFF00100,0x7D283C51,subfo.,r9,r8,r7
58	0xFFF00100,0x7CE400D0,neg,r7,r4
59	0xFFF00100,0x7CC900D1,neg.,r6,r9
60	0xFFF00100,0x7C6B04D0,nego,r3,r11
61	0xFFF00100,0x7FC004D1,nego.,r30,r0
62	0xFFF00100,0x7D266110,subfe,r9,r6,r12
63	0xFFF00100,0x7C693111,subfe.,r3,r9,r6
64	0xFFF00100,0x7C642D10,subfeo,r3,r4,r5
65	0xFFF00100,0x7C843511,subfeo.,r4,r4,r6
66	0xFFF00100,0x7D6B0190,subfze,r11,r11
67	0xFFF00100,0x7C430191,subfze.,r2,r3
68	0xFFF00100,0x7C640590,subfzeo,r3,r4
69	0xFFF00100,0x7C850591,subfzeo.,r4,r5
70	0xFFF00100,0x7C4301D0,subfme,r2,r3
71	0xFFF00100,0x7C4301D1,subfme.,r2,r3
72	0xFFF00100,0x7D2A1A10,doz,r9,r10,r3
73	0xFFF00100,0x7C642A11,doz.,r3,r4,r5
74	0xFFF00100,0x7C851E10,dozo,r4,r5,r3
75	0xFFF00100,0x7CA41E11,dozo.,r5,r4,r3
76	0xFFF00100,0x7C1E02D0,abs,r0,r30
77	0xFFF00100,0x7C3E02D1,abs.,r1,r30
78	0xFFF00100,0x7FC306D0,abso,r30,r3
79	0xFFF00100,0x7FC706D1,abso.,r30,r7
80	0xFFF00100,0x7CE703D0,nabs,r7,r7
81	0xFFF00100,0x7D0703D1,nabs.,r8,r7
82	0xFFF00100,0x7D0907D0,nabso,r8,r9
83	0xFFF00100,0x7D0A07D1,nabso.,r8,r10
84	# additions, primary opcode 0x1F
85	0xFFF00100,0x7C830014,addc,r4,r3,r0
86	0xFFF00100,0x7FB8F015,addc.,r29,r24,r30
87	0xFFF00100,0x7CDB0414,addco,r6,r27,r0
88	0xFFF00100,0x7C880415,addco.,r4,r8,r0
89	0xFFF00100,0x7D6BC914,adde,r11,r11,r25
90	0xFFF00100,0x7D296115,adde.,r9,r9,r12
91	0xFFF00100,0x7C842514,addeo,r4,r4,r4
92	0xFFF00100,0x7C843515,addeo.,r4,r4,r6
93	0xFFF00100,0x7CE80194,addze,r7,r8
94	0xFFF00100,0x7C800195,addze.,r4,r0
95	# FIXME addzeo
96	# FIXME addzeo.
97	# FIXME addme
98	# FIXME addme.
99	# FIXME addmeo
100	# FIXME addmeo.
101	0xFFF00100,0x7F03EA14,add,r24,r3,r29
102	0xFFF00100,0x7ED6E215,add.,r22,r22,r28
103	0xFFF00100,0x7D040614,addo,r8,r4,r0
104	0xFFF00100,0x7DE40615,addo.,r15,r4,r0
105	# integer multiplications & divisions, primary opcode 0x1F
106	0xFFF00100,0x7C8C5016,mulhwu,r4,r12,r10
107	0xFFF00100,0x7CA72017,mulhwu.,r5,r7,r4
108	0xFFF00100,0x7CA72096,mulhw,r5,r7,r4
109	0xFFF00100,0x7CA72097,mulhw.,r5,r7,r4
110	0xFFF00100,0x7C9000D6,mul,r4,r16,r0
111	0xFFF00100,0x7CA428D7,mul.,r5,r4,r5
112	# FIXME mulo
113	# FIXME mulo.
114	0xFFF00100,0x7D0039D6,mullw,r8,r0,r7
115	0xFFF00100,0x7C1DF1D7,mullw.,r0,r29,r30
116	0xFFF00100,0x7CE725D6,mullwo,r7,r7,r4
117	0xFFF00100,0x7CE725D7,mullwo.,r7,r7,r4
118	0xFFF00100,0x7FEB2296,div,r31,r11,r4
119	0xFFF00100,0x7C064297,div.,r0,r6,r8
120	# FIXME divo
121	# FIXME divo.
122	0xFFF00100,0x7CA03AD6,divs,r5,r0,r7
123	0xFFF00100,0x7C642AD7,divs.,r3,r4,r5
124	# FIXME divso
125	# FIXME divso.
126	0xFFF00100,0x7F7C1B96,divwu,r27,r28,r3
127	0xFFF00100,0x7C7B1B97,divwu.,r3,r27,r3
128	0xFFF00100,0x7CE62796,divwuo,r7,r6,r4
129	0xFFF00100,0x7CE62797,divwuo.,r7,r6,r4
130	0xFFF00100,0x7C042BD6,divw,r0,r4,r5
131	0xFFF00100,0x7C042BD7,divw.,r0,r4,r5
132	0xFFF00100,0x7CA627D6,divwo,r5,r6,r4
133	0xFFF00100,0x7CA627D7,divwo.,r5,r6,r4
134	# move to condition register, primary opcode 0x1F
135	0xFFF00100,0x7D818120,mtcrf,0x18,r12
136	0xFFF00100,0x7D838120,mtcrf,0x38,r12
137	0xFFF00100,0x7D080120,mtcrf,0x80,r8
138	0xFFF00100,0x7E007120,mtcrf,0x07,r16
139	# logical instructions, primary opcode 0x1F
140	0xFFF00100,0x7FC32838,and,r3,r30,r5
141	0xFFF00100,0x7C672039,and.,r7,r3,r4
142	0xFFF00100,0x7D281878,andc,r8,r9,r3
143	0xFFF00100,0x7DCE0079,andc.,r14,r14,r0
144	0xFFF00100,0x7C8328F8,nor,r3,r4,r5
145	0xFFF00100,0x7D4948F9,nor.,r9,r10,r9
146	0xFFF00100,0x7ED53A38,eqv,r21,r22,r7
147	0xFFF00100,0x7C622239,eqv.,r2,r3,r4
148	0xFFF00100,0x7D645278,xor,r4,r11,r10
149	0xFFF00100,0x7C600279,xor.,r0,r3,r0
150	0xFFF00100,0x7C841B38,orc,r4,r4,r3
151	0xFFF00100,0x7C841B39,orc.,r4,r4,r3
152	0xFFF00100,0x7DE42378,or,r4,r15,r4
153	0xFFF00100,0x7C632379,or.,r3,r3,r4
154	0xFFF00100,0x7C6023B8,nand,r0,r3,r4
155	0xFFF00100,0x7F8B63B9,nand.,r11,r28,r12
156	# trap instructions
157	0xFFF00100,0x7F800008,tw,28,r0,r0
158	# integer load and stores
159	0xFFF00100,0x80BF0808,lwz,r5,0x808(r31)
160	0xFFF00100,0x80A2FFB8,lwz,r5,-0x48(r2)
161	0xFFF00100,0x80002F3C,lwz,r0,0x2F3C
162	0xFFF00100,0x8506003C,lwzu,r8,0x3C(r6)
163	0xFFF00100,0x8403FFF8,lwzu,r0,-0x8(r3)
164	0xFFF00100,0x88FD00FA,lbz,r7,0xFA(r29)
165	0xFFF00100,0x889EFFF4,lbz,r4,-0xC(r30)
166	0xFFF00100,0x8D480001,lbzu,r10,0x1(r8)
167	0xFFF00100,0x8FC3FFFF,lbzu,r30,-0x1(r3)
168	0xFFF00100,0x90600AFC,stw,r3,0xAFC
169	0xFFF00100,0x9000F620,stw,r0,-0x9E0
170	0xFFF00100,0x9146696E,stw,r10,0x696E(r6)
171	0xFFF00100,0x9317FFF0,stw,r24,-0x10(r23)
172	0xFFF00100,0x94050020,stwu,r0,0x20(r5)
173	0xFFF00100,0x9421FFA0,stwu,r1,-0x60(r1)
174	0xFFF00100,0x981F00FA,stb,r0,0xFA(r31)
175	0xFFF00100,0x98829882,stb,r4,-0x677E(r2)
176	0xFFF00100,0x9EFC000A,stbu,r23,0xA(r28)
177	0xFFF00100,0x9FAEFFFC,stbu,r29,-0x4(r14)
178	0xFFF00100,0xA22E6010,lhz,r17,0x6010(r14)
179	0xFFF00100,0xA0C6FFF8,lhz,r6,-0x8(r6)
180	0xFFF00100,0xA43C6010,lhzu,r1,0x6010(r28)
181	0xFFF00100,0xA7BFFFFE,lhzu,r29,-0x2(r31)
182	0xFFF00100,0xA820265F,lha,r1,0x265F
183	0xFFF00100,0xA8B5201F,lha,r5,0x201F(r21)
184	0xFFF00100,0xAAFEFE82,lha,r23,-0x17E(r30)
185	0xFFF00100,0xAC08003C,lhau,r0,0x3C(r8)
186	0xFFF00100,0xAC90FFFE,lhau,r4,-0x2(r16)
187	0xFFF00100,0xB3E40012,sth,r31,0x12(r4)
188	0xFFF00100,0xB02EFFFB,sth,r1,-0x5(r14)
189	0xFFF00100,0xB4B81EF4,sthu,r5,0x1EF4(r24)
190	0xFFF00100,0xB774FFFE,sthu,r27,-0x2(r20)
191	0xFFF00100,0xBB61006C,lmw,r27,0x6C(r1)
192	0xFFF00100,0xBB41FFE8,lmw,r26,-0x18(r1)
193	0xFFF00100,0xBC410008,stmw,r2,0x8(r1)
194	0xFFF00100,0xBFC1FFF8,stmw,r30,-0x8(r1)
195	# various simplified (extended) mnemonics
196	0xFFF00100,0x60000000,nop
197	0xFFF00100,0x7C7C1B78,mr,r28,r3
198	0xFFF00100,0x7C7C1B78,mr,r28,r3
199	0xFFF00100,0x7DAA6B79,mr.,r10,r13
200	0xFFF00100,0x38000000,li,r0,0x0
201	0xFFF00100,0x3860FFCE,li,r3,-0x32
202	# invalid opcodes/instruction forms
203	0xFFF00100,0x7D49F02F,dc.l,0x7D49F02F
204	0xFFF00100,0x7F800009,dc.l,0x7F800009
205	0xFFF00100,0x7C6B0CD0,dc.l,0x7C6B0CD0
206	0xFFF00100,0x7C642D90,dc.l,0x7C642D90
207	# POWER/PPC601 specific instructions
208	#0xFFF00100,0x7E3EE43A,maskir,r30,r17,r28