80MHz-ify everything, move active display area down a bit

This commit is contained in:
Jeroen Domburg 2017-11-07 14:54:28 -08:00
parent ea1ed9972a
commit fc7e934111
11 changed files with 81 additions and 27 deletions

View File

@ -29,8 +29,8 @@ Thing to emulate single-lane MIPI using a flipflop and a bunch of resistors.
#define HOST VSPI_HOST #define HOST HSPI_HOST
#define IRQSRC ETS_SPI3_DMA_INTR_SOURCE #define IRQSRC ETS_SPI2_DMA_INTR_SOURCE
#define DMACH 2 #define DMACH 2
#define DESCCNT 8 #define DESCCNT 8

View File

@ -16,18 +16,29 @@
#include <stdlib.h> #include <stdlib.h>
#include "esp_err.h" #include "esp_err.h"
#include "nvs_flash.h" #include "nvs_flash.h"
#include "nvs.h"
#include "esp_partition.h" #include "esp_partition.h"
#include "emu.h" #include "emu.h"
#include "tmeconfig.h" #include "tmeconfig.h"
#include "rtc.h"
unsigned char *romdata; unsigned char *romdata;
nvs_handle nvs;
void emuTask(void *pvParameters) void emuTask(void *pvParameters)
{ {
tmeStartEmu(romdata); tmeStartEmu(romdata);
} }
void saveRtcMem(char *data) {
esp_err_t err;
err=nvs_set_blob(nvs, "pram", data, 32);
if (err!=ESP_OK) {
printf("NVS: Saving to PRAM failed!");
}
}
void app_main() void app_main()
{ {
@ -35,6 +46,23 @@ void app_main()
const esp_partition_t* part; const esp_partition_t* part;
spi_flash_mmap_handle_t hrom; spi_flash_mmap_handle_t hrom;
esp_err_t err; esp_err_t err;
uint8_t pram[32];
nvs_flash_init();
err=nvs_open("pram", NVS_READWRITE, &nvs);
if (err!=ESP_OK) {
printf("NVS: Try erase\n");
nvs_flash_erase();
err=nvs_open("pram", NVS_READWRITE, &nvs);
}
unsigned int sz=32;
err = nvs_get_blob(nvs, "pram", pram, &sz);
if (err == ESP_OK) {
rtcInit((char*)pram);
} else {
printf("NVS: Cannot load pram!\n");
}
part=esp_partition_find_first(0x40, 0x1, NULL); part=esp_partition_find_first(0x40, 0x1, NULL);
if (part==0) printf("Couldn't find bootrom part!\n"); if (part==0) printf("Couldn't find bootrom part!\n");

View File

@ -203,6 +203,9 @@ static inline void setRowRange(int ystart, int yend) {
mipiDsiSendLong(0x39, cmd, 5); mipiDsiSendLong(0x39, cmd, 5);
} }
//Use this to move the display area down.
#define YOFFSET 8
static void IRAM_ATTR displayTask(void *arg) { static void IRAM_ATTR displayTask(void *arg) {
uint8_t *img=malloc((LINESPERBUF*320*2)+1); uint8_t *img=malloc((LINESPERBUF*320*2)+1);
assert(img); assert(img);
@ -246,7 +249,7 @@ static void IRAM_ATTR displayTask(void *arg) {
memcpy(oldImg, myData, 512*342/8); memcpy(oldImg, myData, 512*342/8);
if (ystart!=yend) { if (ystart!=yend) {
setRowRange(ystart, 319); setRowRange(ystart+YOFFSET, 319);
img[0]=0x2c; img[0]=0x2c;
uint8_t *p=&img[1]; uint8_t *p=&img[1];
for (int j=ystart; j<yend; j++) { for (int j=ystart; j<yend; j++) {

View File

@ -527,8 +527,8 @@ void tmeStartEmu(void *rom) {
viaControlWrite(VIA_CA2, ca2); viaControlWrite(VIA_CA2, ca2);
rtcTick(); rtcTick();
frame=0; frame=0;
// printFps(); printFps();
// printf("%d Hz\n", cyclesPerSec); printf("%d Hz\n", cyclesPerSec);
cyclesPerSec=0; cyclesPerSec=0;
} }
} }
@ -548,7 +548,7 @@ void sccIrq(int req) {
void viaCbPortAWrite(unsigned int val) { void viaCbPortAWrite(unsigned int val) {
static int writes=0; static int writes=0;
if ((writes++)==0) val=0x67; if ((writes++)==0) val=0x67;
printf("VIA PORTA WRITE %x\n", val); // printf("VIA PORTA WRITE %x\n", val);
video_remap=(val&(1<<6))?1:0; video_remap=(val&(1<<6))?1:0;
rom_remap=(val&(1<<4))?1:0; rom_remap=(val&(1<<4))?1:0;
audio_remap=(val&(1<<3))?1:0; audio_remap=(val&(1<<3))?1:0;
@ -558,7 +558,7 @@ void viaCbPortAWrite(unsigned int val) {
} }
void viaCbPortBWrite(unsigned int val) { void viaCbPortBWrite(unsigned int val) {
printf("VIA PORTB WRITE %x\n", val); // printf("VIA PORTB WRITE %x\n", val);
int b; int b;
b=rtcCom(val&4, val&1, val&2); b=rtcCom(val&4, val&1, val&2);
if (b) viaSet(VIA_PORTB, 1); else viaClear(VIA_PORTB, 1); if (b) viaSet(VIA_PORTB, 1); else viaClear(VIA_PORTB, 1);

View File

@ -168,7 +168,7 @@ unsigned int ncrRead(unsigned int addr, unsigned int dack) {
ret=ncr.din; ret=ncr.din;
// printf("READ BYTE (NCR addr6) %02X dack=%d\n", ret, dack); // printf("READ BYTE (NCR addr6) %02X dack=%d\n", ret, dack);
} else if (addr==7) { } else if (addr==7) {
printf("!UNIMPLEMENTED!\n"); printf("Scsi: !UNIMPLEMENTED! (addr 7)\n");
} }
// printf("%08X SCSI: (dack %d), cur st %s read %s (reg %d) = %x \n", // printf("%08X SCSI: (dack %d), cur st %s read %s (reg %d) = %x \n",
// pc, dack, stateNames[ncr.state], regNamesR[addr], addr, ret); // pc, dack, stateNames[ncr.state], regNamesR[addr], addr, ret);

View File

@ -1,11 +1,11 @@
#include <stdint.h> #include <stdint.h>
#include <stdio.h> #include <stdio.h>
#include <string.h>
typedef struct { typedef struct {
int lastClkVal; int lastClkVal;
int pos; int pos;
uint8_t cmd; uint16_t cmd;
uint8_t mem[32]; uint8_t mem[32];
} Rtc; } Rtc;
@ -28,20 +28,22 @@ int rtcCom(int en, int dat, int clk) {
rtc.pos=0; rtc.pos=0;
rtc.cmd=0; rtc.cmd=0;
} else { } else {
if (clk!=rtc.lastClkVal && !clk) { if (clk!=rtc.lastClkVal && clk) {
if (rtc.pos<8 || (rtc.pos<16 && ((rtc.cmd&0x8000)==0)) ) { if (rtc.pos<8 || (rtc.pos<16 && ((rtc.cmd&0x8000)==0)) ) {
//First 8 bits, or all 16 bits if write: accumulate data
if (dat) rtc.cmd|=(1<<(15-rtc.pos)); if (dat) rtc.cmd|=(1<<(15-rtc.pos));
} else if (rtc.cmd&0x8000) { }
// printf("RTC: clocktick %d, dataline %d, cmd %x\n", rtc.pos, dat, rtc.cmd);
if (rtc.cmd&0x8000) { //read
if (rtc.pos==8) { if (rtc.pos==8) {
printf("RTC: Read cmd %x\n", rtc.cmd>>8);
rtc.cmd|=rtc.mem[(rtc.cmd&0x7C00)>>10]; rtc.cmd|=rtc.mem[(rtc.cmd&0x7C00)>>10];
} }
ret=((rtc.cmd&(1<<(15-rtc.pos)))?1:0); ret=((rtc.cmd&(1<<(15-rtc.pos)))?1:0);
} else if (rtc.pos==15) { } else if (rtc.pos==15) {
if ((rtc.cmd&0x8000)==0) { printf("RTC: Write cmd %x\n", rtc.cmd>>8);
rtc.mem[(rtc.cmd&0x7C00)>>10]=rtc.cmd&0xff; rtc.mem[(rtc.cmd&0x7C00)>>10]=rtc.cmd&0xff;
saveRtcMem(rtc.mem); saveRtcMem((char*)rtc.mem);
}
printf("RTC/PRAM CMD %x\n", rtc.cmd);
} }
rtc.pos++; rtc.pos++;
} }

View File

@ -1,2 +1,3 @@
void rtcTick(); void rtcTick();
int rtcCom(int en, int dat, int clk); int rtcCom(int en, int dat, int clk);
void rtcInit(char *mem);

View File

@ -23,6 +23,7 @@ static void *loadRom(char *file) {
} }
void saveRtcMem(char *data) { void saveRtcMem(char *data) {
printf("Saving RTC mem...\n");
FILE *f=fopen("pram.dat", "wb"); FILE *f=fopen("pram.dat", "wb");
if (f!=NULL) { if (f!=NULL) {
fwrite(data, 32, 1, f); fwrite(data, 32, 1, f);
@ -38,6 +39,7 @@ int main(int argc, char **argv) {
fread(data, 32, 1, f); fread(data, 32, 1, f);
rtcInit(data); rtcInit(data);
fclose(f); fclose(f);
printf("Loaded RTC data from pram.dat\n");
} }
sdlDispAudioInit(); sdlDispAudioInit();
tmeStartEmu(rom); tmeStartEmu(rom);

View File

@ -117,6 +117,7 @@ void viaControlWrite(int no, int val) {
} }
void viaWrite(unsigned int addr, unsigned int val) { void viaWrite(unsigned int addr, unsigned int val) {
unsigned int pc=m68k_get_reg(NULL, M68K_REG_PC);
if (addr==0x0) { if (addr==0x0) {
//ORB //ORB
viaCbPortBWrite(val); viaCbPortBWrite(val);
@ -185,7 +186,7 @@ void viaWrite(unsigned int addr, unsigned int val) {
viaCbPortAWrite(val); viaCbPortAWrite(val);
via.ina=(via.ina&~via.ddra)|(val&via.ddra); via.ina=(via.ina&~via.ddra)|(val&via.ddra);
} }
// printf("VIA write %s val %x\n", viaRegNames[addr], val); printf("PC %x VIA write %s val %x\n", pc, viaRegNames[addr], val);
} }
@ -247,6 +248,6 @@ unsigned int viaRead(unsigned int addr) {
//ORA //ORA
val=via.ina; val=via.ina;
} }
// printf("PC %x VIA read %s val %x\n", pc, viaRegNames[addr], val); printf("PC %x VIA read %s val %x\n", pc, viaRegNames[addr], val);
return val; return val;
} }

View File

@ -1,6 +1,6 @@
# Espressif ESP32 Partition Table # Espressif ESP32 Partition Table
# Name, Type, SubType, Offset, Size # Name, Type, SubType, Offset, Size
factory, app, factory, 0x10000, 928k factory, app, factory, 0x10000, 928k
wifidata,data, nvs, 0xFC000, 16K nvs, data, nvs, 0xFC000, 16K
rom, 0x40, 0x01, 0x100000, 128K rom, 0x40, 0x01, 0x100000, 128K
hd, 0x40, 0x02, 0x120000, 0x2e0000 hd, 0x40, 0x02, 0x120000, 0x2e0000

1 # Espressif ESP32 Partition Table
2 # Name, Type, SubType, Offset, Size
3 factory, app, factory, 0x10000, 928k
4 wifidata,data, nvs, 0xFC000, 16K nvs, data, nvs, 0xFC000, 16K
5 rom, 0x40, 0x01, 0x100000, 128K
6 hd, 0x40, 0x02, 0x120000, 0x2e0000

View File

@ -20,6 +20,8 @@ CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y
CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG= CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG=
CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE= CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE=
CONFIG_LOG_BOOTLOADER_LEVEL=3 CONFIG_LOG_BOOTLOADER_LEVEL=3
CONFIG_BOOTLOADER_SPI_WP_PIN=7
CONFIG_BOOTLOADER_VDDSDIO_BOOST=y
# #
# Security features # Security features
@ -39,16 +41,16 @@ CONFIG_ESPTOOLPY_BAUD_OTHER=
CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200 CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200
CONFIG_ESPTOOLPY_BAUD=921600 CONFIG_ESPTOOLPY_BAUD=921600
CONFIG_ESPTOOLPY_COMPRESSED=y CONFIG_ESPTOOLPY_COMPRESSED=y
CONFIG_FLASHMODE_QIO= CONFIG_FLASHMODE_QIO=y
CONFIG_FLASHMODE_QOUT= CONFIG_FLASHMODE_QOUT=
CONFIG_FLASHMODE_DIO=y CONFIG_FLASHMODE_DIO=
CONFIG_FLASHMODE_DOUT= CONFIG_FLASHMODE_DOUT=
CONFIG_ESPTOOLPY_FLASHMODE="dio" CONFIG_ESPTOOLPY_FLASHMODE="dio"
CONFIG_ESPTOOLPY_FLASHFREQ_80M= CONFIG_ESPTOOLPY_FLASHFREQ_80M=y
CONFIG_ESPTOOLPY_FLASHFREQ_40M=y CONFIG_ESPTOOLPY_FLASHFREQ_40M=
CONFIG_ESPTOOLPY_FLASHFREQ_26M= CONFIG_ESPTOOLPY_FLASHFREQ_26M=
CONFIG_ESPTOOLPY_FLASHFREQ_20M= CONFIG_ESPTOOLPY_FLASHFREQ_20M=
CONFIG_ESPTOOLPY_FLASHFREQ="40m" CONFIG_ESPTOOLPY_FLASHFREQ="80m"
CONFIG_ESPTOOLPY_FLASHSIZE_1MB= CONFIG_ESPTOOLPY_FLASHSIZE_1MB=
CONFIG_ESPTOOLPY_FLASHSIZE_2MB= CONFIG_ESPTOOLPY_FLASHSIZE_2MB=
CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
@ -91,6 +93,7 @@ CONFIG_OPTIMIZATION_LEVEL_RELEASE=y
CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y
CONFIG_OPTIMIZATION_ASSERTIONS_SILENT= CONFIG_OPTIMIZATION_ASSERTIONS_SILENT=
CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED= CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED=
CONFIG_CXX_EXCEPTIONS=
# #
# Component config # Component config
@ -108,7 +111,12 @@ CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y
# FreeRTOS SystemView Tracing # FreeRTOS SystemView Tracing
# #
CONFIG_AWS_IOT_SDK= CONFIG_AWS_IOT_SDK=
#
# Bluetooth
#
CONFIG_BT_ENABLED= CONFIG_BT_ENABLED=
CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE=0
CONFIG_BT_RESERVE_DRAM=0 CONFIG_BT_RESERVE_DRAM=0
# #
@ -130,7 +138,8 @@ CONFIG_SPIRAM_USE_CAPS_ALLOC=
CONFIG_SPIRAM_USE_MALLOC= CONFIG_SPIRAM_USE_MALLOC=
CONFIG_SPIRAM_TYPE_ESPPSRAM32=y CONFIG_SPIRAM_TYPE_ESPPSRAM32=y
CONFIG_SPIRAM_SIZE=4194304 CONFIG_SPIRAM_SIZE=4194304
CONFIG_SPIRAM_SPEED_40M=y CONFIG_SPIRAM_SPEED_40M=
CONFIG_SPIRAM_SPEED_80M=y
CONFIG_SPIRAM_MEMTEST=y CONFIG_SPIRAM_MEMTEST=y
CONFIG_SPIRAM_CACHE_WORKAROUND=y CONFIG_SPIRAM_CACHE_WORKAROUND=y
CONFIG_MEMMAP_TRACEMEM= CONFIG_MEMMAP_TRACEMEM=
@ -217,6 +226,11 @@ CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION=
CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20
CONFIG_ESP32_PHY_MAX_TX_POWER=20 CONFIG_ESP32_PHY_MAX_TX_POWER=20
#
# Power Management
#
CONFIG_PM_ENABLE=
# #
# Ethernet # Ethernet
# #
@ -278,6 +292,7 @@ CONFIG_SUPPORT_STATIC_ALLOCATION=
CONFIG_TIMER_TASK_PRIORITY=1 CONFIG_TIMER_TASK_PRIORITY=1
CONFIG_TIMER_TASK_STACK_DEPTH=2048 CONFIG_TIMER_TASK_STACK_DEPTH=2048
CONFIG_TIMER_QUEUE_LENGTH=10 CONFIG_TIMER_QUEUE_LENGTH=10
CONFIG_FREERTOS_USE_TRACE_FACILITY=
CONFIG_FREERTOS_DEBUG_INTERNALS= CONFIG_FREERTOS_DEBUG_INTERNALS=
# #
@ -310,7 +325,6 @@ CONFIG_LOG_COLORS=y
# #
CONFIG_L2_TO_L3_COPY= CONFIG_L2_TO_L3_COPY=
CONFIG_LWIP_MAX_SOCKETS=10 CONFIG_LWIP_MAX_SOCKETS=10
CONFIG_LWIP_THREAD_LOCAL_STORAGE_INDEX=0
CONFIG_LWIP_SO_REUSE= CONFIG_LWIP_SO_REUSE=
CONFIG_LWIP_SO_RCVBUF= CONFIG_LWIP_SO_RCVBUF=
CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1 CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1
@ -447,6 +461,9 @@ CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=2048
# #
CONFIG_SPI_FLASH_ENABLE_COUNTERS= CONFIG_SPI_FLASH_ENABLE_COUNTERS=
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y
CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS=
CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED=
# #
# SPIFFS Configuration # SPIFFS Configuration