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moa/tests/harte_tests/progress/2022-09-18-at-96-percent-mostly-there.txt

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Fixed tests after ClockTime and Frequency changes And also removed HostData
2023-05-08 03:42:55 +00:00
Last run on 2022-09-18 at commit 94d3e1d3894e6588ff6daa55f0ba82473b1e74c7
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
Fixed tests after ClockTime and Frequency changes And also removed HostData
2023-05-08 03:42:55 +00:00
ABCD.json completed: 7993 passed, 72 FAILED
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
ADD.b.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
ADD.l.json completed: 7736 passed, 329 FAILED
ADD.w.json completed: 7712 passed, 353 FAILED
ADDA.l.json completed, all passed!
ADDA.w.json completed, all passed!
ADDX.b.json completed, all passed!
Added test results
2022-09-12 04:52:29 +00:00
ADDX.l.json completed: 5472 passed, 2593 FAILED
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
ADDX.w.json completed, all passed!
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
AND.b.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
AND.l.json completed: 7779 passed, 286 FAILED
AND.w.json completed: 7764 passed, 301 FAILED
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
ANDItoCCR.json completed, all passed!
ANDItoSR.json completed, all passed!
Slightly improved the handling of the I/N bit in Address Error
2022-09-17 03:49:44 +00:00
ASL.b.json completed: 7238 passed, 827 FAILED
ASL.l.json completed: 6471 passed, 1594 FAILED
ASL.w.json completed: 7053 passed, 1012 FAILED
Fixed tests after ClockTime and Frequency changes And also removed HostData
2023-05-08 03:42:55 +00:00
ASR.b.json completed: 7547 passed, 518 FAILED
ASR.l.json completed: 7092 passed, 973 FAILED
ASR.w.json completed: 7513 passed, 552 FAILED
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
BCHG.json completed, all passed!
BCLR.json completed, all passed!
BSET.json completed, all passed!
Fixed tests after ClockTime and Frequency changes And also removed HostData
2023-05-08 03:42:55 +00:00
BSR.json completed, all passed!
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
BTST.json completed: 8052 passed, 13 FAILED
Fixed tests after ClockTime and Frequency changes And also removed HostData
2023-05-08 03:42:55 +00:00
Bcc.json completed, all passed!
Copied over test results
2022-09-14 05:01:54 +00:00
CHK.json completed: 7744 passed, 321 FAILED
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
CLR.b.json completed, all passed!
Fixed part of the problem in RTE test failures with Address Error The I/N bit in the special status word on the stack should be set when returning from RTE results in a PC that isn't word aligned. Every other case pretty much, it should be clear
2022-09-18 04:29:04 +00:00
CLR.l.json completed: 7472 passed, 593 FAILED
CLR.w.json completed: 7465 passed, 600 FAILED
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
CMP.b.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
CMP.l.json completed, all passed!
CMP.w.json completed, all passed!
CMPA.l.json completed, all passed!
CMPA.w.json completed, all passed!
Fixed tests after ClockTime and Frequency changes And also removed HostData
2023-05-08 03:42:55 +00:00
DBcc.json completed, all passed!
Fixed some ASR cases, and updated test results
2022-09-19 05:09:56 +00:00
DIVS.json completed, all passed!
Added test results
2022-09-19 00:10:23 +00:00
DIVU.json completed: 8064 passed, 1 FAILED
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
EOR.b.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
EOR.l.json completed: 7519 passed, 546 FAILED
EOR.w.json completed: 7525 passed, 540 FAILED
EORItoCCR.json completed, all passed!
Added test results
2022-09-12 04:52:29 +00:00
EORItoSR.json completed, all passed!
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
EXG.json completed, all passed!
EXT.l.json completed, all passed!
EXT.w.json completed, all passed!
Fixed tests after ClockTime and Frequency changes And also removed HostData
2023-05-08 03:42:55 +00:00
JMP.json completed, all passed!
JSR.json completed, all passed!
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
LEA.json completed, all passed!
Slightly improved the handling of the I/N bit in Address Error
2022-09-17 03:49:44 +00:00
LINK.json completed, all passed!
Fixed part of the problem in RTE test failures with Address Error The I/N bit in the special status word on the stack should be set when returning from RTE results in a PC that isn't word aligned. Every other case pretty much, it should be clear
2022-09-18 04:29:04 +00:00
LSL.b.json completed: 7809 passed, 256 FAILED
LSL.l.json completed: 7056 passed, 1009 FAILED
LSL.w.json completed: 7523 passed, 542 FAILED
LSR.b.json completed: 7817 passed, 248 FAILED
LSR.l.json completed: 7072 passed, 993 FAILED
LSR.w.json completed: 7541 passed, 524 FAILED
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
MOVE.b.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
MOVE.l.json completed: 5827 passed, 2238 FAILED
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
MOVE.q.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
MOVE.w.json completed: 5855 passed, 2210 FAILED
MOVEA.l.json completed, all passed!
MOVEA.w.json completed, all passed!
MOVEM.l.json completed: 6035 passed, 2030 FAILED
MOVEM.w.json completed: 6431 passed, 1634 FAILED
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
MOVEP.l.json completed: 4036 passed, 4029 FAILED
MOVEP.w.json completed: 4046 passed, 4019 FAILED
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
MOVEfromSR.json completed: 6896 passed, 1169 FAILED
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
MOVEfromUSP.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
MOVEtoCCR.json completed, all passed!
MOVEtoSR.json completed, all passed!
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
MOVEtoUSP.json completed, all passed!
Added test results
2022-09-15 05:51:48 +00:00
MULS.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
MULU.json completed, all passed!
Fixed tests after ClockTime and Frequency changes And also removed HostData
2023-05-08 03:42:55 +00:00
NBCD.json completed: 8037 passed, 28 FAILED
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
NEG.b.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
NEG.l.json completed: 7552 passed, 513 FAILED
NEG.w.json completed: 7531 passed, 534 FAILED
Copied over test results
2022-09-14 05:01:54 +00:00
NEGX.b.json completed, all passed!
NEGX.l.json completed: 7520 passed, 545 FAILED
NEGX.w.json completed: 7510 passed, 555 FAILED
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
NOP.json completed, all passed!
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
NOT.b.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
NOT.l.json completed: 7512 passed, 553 FAILED
NOT.w.json completed: 7530 passed, 535 FAILED
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
OR.b.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
OR.l.json completed: 7756 passed, 309 FAILED
OR.w.json completed: 7765 passed, 300 FAILED
Added test results
2022-09-12 04:52:29 +00:00
ORItoCCR.json completed, all passed!
ORItoSR.json completed, all passed!
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
PEA.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
RESET.json completed, all passed!
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
ROL.b.json completed, all passed!
ROL.l.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
ROL.w.json completed: 7882 passed, 183 FAILED
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
ROR.b.json completed, all passed!
ROR.l.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
ROR.w.json completed: 7907 passed, 158 FAILED
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
ROXL.b.json completed: 8039 passed, 26 FAILED
ROXL.l.json completed: 8029 passed, 36 FAILED
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
ROXL.w.json completed: 7892 passed, 173 FAILED
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
ROXR.b.json completed: 8037 passed, 28 FAILED
ROXR.l.json completed: 8022 passed, 43 FAILED
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
ROXR.w.json completed: 7880 passed, 185 FAILED
Fixed some ASR cases, and updated test results
2022-09-19 05:09:56 +00:00
RTE.json completed, all passed!
RTR.json completed, all passed!
RTS.json completed, all passed!
Fixed tests after ClockTime and Frequency changes And also removed HostData
2023-05-08 03:42:55 +00:00
SBCD.json completed: 6809 passed, 1256 FAILED
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
SUB.b.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
SUB.l.json completed: 7747 passed, 318 FAILED
SUB.w.json completed: 7716 passed, 349 FAILED
SUBA.l.json completed, all passed!
SUBA.w.json completed, all passed!
SUBX.b.json completed, all passed!
SUBX.l.json completed: 5481 passed, 2584 FAILED
SUBX.w.json completed, all passed!
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
SWAP.json completed, all passed!
Scc.json completed, all passed!
TAS.json completed, all passed!
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
TRAP.json completed, all passed!
TRAPV.json completed, all passed!
Added proper AddressError handling to m68k Also a few fixes, such as correcting a decode error in ADDX
2022-09-12 00:42:54 +00:00
TST.b.json completed, all passed!
Fixed some AddressError tests Adjusted the PC value stored when an Address Error fault occurs to use the size of the access operation. I also flipped the IN bit in the word that's written to the top of the stack on an AddressError, even though that's opposite of what the docs say. It seems to pass the tests. I probably have something else going wrong, but it shouldn't be an important bit either way.
2022-09-13 04:47:36 +00:00
TST.l.json completed, all passed!
TST.w.json completed, all passed!
Fixed some issue with m68k Some debug code was enabled that prevented illegal instructions from being handled normally with a processor exception The brief instruction word decoding could cause an illegal instruction if it didn't match the docs, but the actual implementation would not complain in those cases, so I modified it to not perform validation for <=MC68010 Increment and Decrement addressing modes, when using the stack pointer, will always inc/dec by at least 2 bytes, even if it's a byte operation, to keep the stack aligned to the nearest word boundary
2022-09-11 04:09:35 +00:00
UNLINK.json completed, all passed!
Fixed tests after ClockTime and Frequency changes And also removed HostData
2023-05-08 03:42:55 +00:00
passed: 957924, failed: 42136, total 96%
completed in 24m 47s
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