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moa
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Minor fixes

This commit is contained in:
transistor 2021-10-29 15:05:41 -07:00
parent aa9aeaf3b4
commit 250c0e83d2
5 changed files with 36 additions and 18 deletions
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2
frontends/moa-minifb/src/lib.rs
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@ -52,7 +52,7 @@ impl MiniFrontend {
window.limit_update_rate(Some(Duration::from_micros(16600)));
while window.is_open() && !window.is_key_down(Key::Escape) {
system.run_for(16_600_000);
system.run_for(16_600_000).unwrap();
match &mut *self.updater.lock().unwrap() {
Some(updater) => {

27
src/cpus/m68k/execute.rs
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@ -90,7 +90,7 @@ impl M68k {
//Err(Error { err: ErrorType::Processor, native, .. }) => {
// TODO temporary: we are passing illegal instructions upward in order to fix them
Err(Error { err: ErrorType::Processor, native, .. }) if native != Exceptions::IllegalInstruction as u32 => {
self.exception(system, native as u8, false)?;
self.exception(system, native as u8)?;
Ok(())
},
Err(err) => Err(err),
@ -130,7 +130,8 @@ impl M68k {
if (pending_ipl >= priority_mask || pending_ipl == 7) && pending_ipl >= current_ipl {
debug!("{} interrupt: {} {}", DEV_NAME, pending_ipl, priority_mask);
self.state.current_ipl = self.state.pending_ipl;
self.exception(system, self.state.ipl_ack_num, true)?;
self.exception(system, self.state.ipl_ack_num)?;
self.state.sr = (self.state.sr & !(Flags::IntMask as u16)) | ((self.state.current_ipl as u16) << 8);
return Ok(());
}
}
@ -142,17 +143,17 @@ impl M68k {
Ok(())
}
pub fn exception(&mut self, system: &System, number: u8, update_ipl: bool) -> Result<(), Error> {
pub fn exception(&mut self, system: &System, number: u8) -> Result<(), Error> {
debug!("{}: raising exception {}", DEV_NAME, number);
let offset = (number as u16) << 2;
self.push_word(system, offset)?;
if self.cputype >= M68kType::MC68010 {
self.push_word(system, offset)?;
}
self.push_long(system, self.state.pc)?;
self.push_word(system, self.state.sr)?;
self.set_flag(Flags::Supervisor, true);
self.set_flag(Flags::Tracing, false);
if update_ipl {
self.state.sr = (self.state.sr & !(Flags::IntMask as u16)) | ((self.state.current_ipl as u16) << 8);
}
self.state.pc = self.port.read_beu32((self.state.vbr + offset as u32) as Address)?;
Ok(())
}
@ -350,7 +351,7 @@ impl M68k {
Instruction::DIVW(src, dest, sign) => {
let value = self.get_target_value(system, src, Size::Word)?;
if value == 0 {
self.exception(system, Exceptions::ZeroDivide as u8, false)?;
self.exception(system, Exceptions::ZeroDivide as u8)?;
return Ok(());
}
@ -369,7 +370,7 @@ impl M68k {
Instruction::DIVL(src, dest_h, dest_l, sign) => {
let value = self.get_target_value(system, src, Size::Long)?;
if value == 0 {
self.exception(system, Exceptions::ZeroDivide as u8, false)?;
self.exception(system, Exceptions::ZeroDivide as u8)?;
return Ok(());
}
@ -606,7 +607,9 @@ impl M68k {
self.require_supervisor()?;
self.state.sr = self.pop_word(system)?;
self.state.pc = self.pop_long(system)?;
let _ = self.pop_word(system)?;
if self.cputype >= M68kType::MC68010 {
let _ = self.pop_word(system)?;
}
},
//Instruction::RTR => {
//},
@ -648,11 +651,11 @@ impl M68k {
self.set_logic_flags(value, size);
},
Instruction::TRAP(number) => {
self.exception(system, 32 + number, false)?;
self.exception(system, 32 + number)?;
},
Instruction::TRAPV => {
if self.get_flag(Flags::Overflow) {
self.exception(system, Exceptions::TrapvInstruction as u8, false)?;
self.exception(system, Exceptions::TrapvInstruction as u8)?;
}
},
Instruction::UNLK(reg) => {

6
src/peripherals/genesis/coproc_memory.rs
View File

@ -48,10 +48,10 @@ impl Addressable for CoprocessorMemory {
}
},
0x200 => {
if data[0] != 0 {
self.reset = false;
} else {
if data[0] == 0 {
self.reset = true;
} else {
self.reset = false;
}
},
_ => { warning!("{}: !!! unhandled write {:0x} to {:0x}", DEV_NAME, data[0], addr); },

2
src/peripherals/genesis/ym7101.rs
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@ -504,7 +504,7 @@ impl Steppable for Ym7101 {
self.state.set_dma_mode(DmaType::None);
}
Ok(1_000_000_000 / 13_423_294)
Ok((1_000_000_000 / 13_423_294) * 4)
}
}

17
todo.txt
View File

@ -1,6 +1,19 @@
* implement a Z80
* master system emulation?
* what about a Z280? Is it just an extension, like the 68k variants?
* separate the debugger out of m68k
* i need a better way of handling disperate reads/writes to I/O spaces, rather than having multiple devices or having a massive chunk of address space allocated, continuously
* add instruction timing to M68k
* YM7101 timing is causing it to be very slow... speeding this up increasing rendering speed a lot, even though the frame shouldn't be drawn that often
* improve the speed of the event loop somehow (replace heap?)
* modify the interrupt handling to make the interrupted device acknowledge the interrupt, probably via the interrupt controller somehow. It might need to be async
such that the cpu tells the int_controller it's acknowledged, and then the interrupting device can check the interrupt controller if it needs to see the ack
such that the cpu tells the int_controller it's acknowledged, and then the interrupting device can check the interrupt controller if it needs to see the ack.
The ym7101 could use the ack as the "off" signal, and perhaps use that for the vsync int bit
* each device that can make a bus request should have a BusPort which is used to access the bus. Not sure how it'll be created or passed to the device, since
the offset should be set by the builder or system, and the mask and data size should be sent by the CPU (although I suppose some systems could hook it up differently)
@ -14,6 +27,8 @@
* can you eventually make the system connections all configurable via a config file?
* you could modify read/write to return the number of bytes read or written for dynamic bus sizing used by the MC68020+
* maybe see about a Mac 128k or something
* make tests for each instruction