Modified genesis coprocessor banking to use a Cell instead of Signal

This commit is contained in:
transistor 2023-06-10 23:28:40 -07:00
parent 2d3463867d
commit 2552645a60
3 changed files with 17 additions and 20 deletions

View File

@ -20,7 +20,7 @@ pub use crate::devices::{Address, Addressable, Steppable, Interruptable, Debugga
pub use crate::devices::{read_beu16, read_beu32, read_leu16, read_leu32, write_beu16, write_beu32, write_leu16, write_leu32, wrap_transmutable};
pub use crate::error::Error;
pub use crate::interrupts::InterruptController;
pub use crate::memory::{MemoryBlock, AddressRightShifter, AddressRepeater, Bus, BusPort, dump_slice};
pub use crate::memory::{MemoryBlock, AddressTranslator, AddressRepeater, Bus, BusPort, dump_slice};
pub use crate::signals::{Observable, Signal, EdgeSignal, ObservableSignal, ObservableEdgeSignal};
pub use crate::system::System;

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@ -1,6 +1,6 @@
use std::rc::Rc;
use std::cell::RefCell;
use std::cell::{Cell, RefCell};
use moa_core::{warn, info};
use moa_core::{Bus, Signal, Error, ClockTime, Address, Addressable, Transmutable};
@ -62,16 +62,10 @@ impl Transmutable for CoprocessorCoordinator {
}
pub struct CoprocessorBankRegister {
base: Signal<Address>,
}
type CoprocessorRegister = Rc<Cell<Address>>;
impl CoprocessorBankRegister {
pub fn new(base: Signal<Address>) -> Self {
Self {
base,
}
}
pub struct CoprocessorBankRegister {
base: CoprocessorRegister,
}
impl Addressable for CoprocessorBankRegister {
@ -100,16 +94,19 @@ impl Transmutable for CoprocessorBankRegister {
pub struct CoprocessorBankArea {
base: Signal<Address>,
base: CoprocessorRegister,
bus: Rc<RefCell<Bus>>,
}
impl CoprocessorBankArea {
pub fn new(base: Signal<Address>, bus: Rc<RefCell<Bus>>) -> Self {
Self {
pub fn new(bus: Rc<RefCell<Bus>>) -> (Self, CoprocessorBankRegister) {
let base = Rc::new(Cell::new(0));
let register = CoprocessorBankRegister { base: base.clone() };
let bank = Self {
base,
bus,
}
};
(bank, register)
}
}

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@ -3,7 +3,7 @@ use std::mem;
use std::rc::Rc;
use std::cell::RefCell;
use moa_core::{System, Error, Frequency, Signal, MemoryBlock, Bus, Address, Addressable, Device};
use moa_core::{System, Error, Frequency, MemoryBlock, Bus, Address, Addressable, Device};
use moa_core::host::Host;
use moa_m68k::{M68k, M68kType};
@ -14,7 +14,7 @@ use moa_peripherals_yamaha::Sn76489;
use crate::utils;
use crate::peripherals::ym7101::Ym7101;
use crate::peripherals::controllers::GenesisControllers;
use crate::peripherals::coprocessor::{CoprocessorCoordinator, CoprocessorBankRegister, CoprocessorBankArea};
use crate::peripherals::coprocessor::{CoprocessorCoordinator, CoprocessorBankArea};
pub struct SegaGenesisOptions {
@ -68,12 +68,12 @@ pub fn build_genesis<H: Host>(host: &mut H, mut options: SegaGenesisOptions) ->
// Build the Coprocessor's Bus
let bank_register = Signal::new(0);
let coproc_ram = Device::new(MemoryBlock::new(vec![0; 0x00002000]));
let coproc_ym_sound = Device::new(Ym2612::new(host, Frequency::from_hz(7_670_454))?);
let coproc_sn_sound = Device::new(Sn76489::new(host, Frequency::from_hz(3_579_545))?);
let coproc_register = Device::new(CoprocessorBankRegister::new(bank_register.clone()));
let coproc_area = Device::new(CoprocessorBankArea::new(bank_register, system.bus.clone()));
let (coproc_area, coproc_register) = CoprocessorBankArea::new(system.bus.clone());
let coproc_area = Device::new(coproc_area);
let coproc_register = Device::new(coproc_register);
let coproc_bus = Rc::new(RefCell::new(Bus::default()));
coproc_bus.borrow_mut().set_ignore_unmapped(true);