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Fixed a bug in bit field instruction decode

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We were trying to decode the effective address before fetching the
second instruction word for bitfield instructions, which was causing
it to use the wrong word for the offset:width information, which was
preventing the shell from printing to the screen after boot
This commit is contained in:
transistor 2021-10-18 21:41:42 -07:00
parent 2d8e5f6359
commit 492027fa7a
1 changed files with 3 additions and 3 deletions
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6
src/cpus/m68k/decode.rs
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@ -547,10 +547,9 @@ impl M68kDecoder {
} }
}, },
None => { None => {
let target = self.decode_lower_effective_address(memory, ins, Some(Size::Word))?;
let count = Target::Immediate(1);
if (ins & 0x800) == 0 { if (ins & 0x800) == 0 {
let target = self.decode_lower_effective_address(memory, ins, Some(Size::Word))?;
let count = Target::Immediate(1);
match (ins & 0x0600) >> 9 { match (ins & 0x0600) >> 9 {
0b00 => Ok(Instruction::ASd(count, target, Size::Word, dir)), 0b00 => Ok(Instruction::ASd(count, target, Size::Word, dir)),
0b01 => Ok(Instruction::LSd(count, target, Size::Word, dir)), 0b01 => Ok(Instruction::LSd(count, target, Size::Word, dir)),
@ -573,6 +572,7 @@ impl M68kDecoder {
false => RegOrImmediate::DReg((ext & 0x0007) as u8), false => RegOrImmediate::DReg((ext & 0x0007) as u8),
}; };
let target = self.decode_lower_effective_address(memory, ins, Some(Size::Word))?;
match (ins & 0x0700) >> 8 { match (ins & 0x0700) >> 8 {
0b010 => Ok(Instruction::BFCHG(target, offset, width)), 0b010 => Ok(Instruction::BFCHG(target, offset, width)),
0b100 => Ok(Instruction::BFCLR(target, offset, width)), 0b100 => Ok(Instruction::BFCLR(target, offset, width)),