Renamed SharedData to HostData

src/host/traits.rs

@@ -50,11 +50,11 @@ pub trait BlitableSurface {
 
 
 #[derive(Clone, Debug)]
-pub struct SharedData<T>(Arc<Mutex<T>>);
+pub struct HostData<T>(Arc<Mutex<T>>);
 
-impl<T> SharedData<T> {
-    pub fn new(init: T) -> SharedData<T> {
-        SharedData(Arc::new(Mutex::new(init)))
+impl<T> HostData<T> {
+    pub fn new(init: T) -> HostData<T> {
+        HostData(Arc::new(Mutex::new(init)))
     }
 
     pub fn lock(&self) -> MutexGuard<'_, T> {
@@ -62,7 +62,7 @@ impl<T> SharedData<T> {
     }
 }
 
-impl<T: Copy> SharedData<T> {
+impl<T: Copy> HostData<T> {
     pub fn set(&mut self, value: T) {
         *(self.0.lock().unwrap()) = value;
     }

src/peripherals/genesis/controllers.rs

@@ -3,7 +3,7 @@ use crate::error::Error;
 use crate::system::System;
 use crate::devices::{Clock, ClockElapsed, Address, Addressable, Steppable, Transmutable};
 use crate::host::controllers::{ControllerDevice, ControllerEvent};
-use crate::host::traits::{Host, ControllerUpdater, SharedData};
+use crate::host::traits::{Host, ControllerUpdater, HostData};
 
 
 const REG_VERSION: Address      = 0x01;
@@ -24,7 +24,7 @@ pub struct GenesisControllerPort {
     /// Data contains bits:
     /// 11 | 10 | 9 |    8 |     7 | 6 | 5 | 4 |     3 |    2 |    1 |  0
     ///  X |  Y | Z | MODE | START | A | C | B | RIGHT | LEFT | DOWN | UP
-    pub buttons: SharedData<u16>,
+    pub buttons: HostData<u16>,
 
     pub ctrl: u8,
     pub outputs: u8,
@@ -36,7 +36,7 @@ pub struct GenesisControllerPort {
 impl GenesisControllerPort {
     pub fn new() -> Self {
         Self {
-            buttons: SharedData::new(0xffff),
+            buttons: HostData::new(0xffff),
             ctrl: 0,
             outputs: 0,
             th_count: 0,
@@ -85,7 +85,7 @@ impl GenesisControllerPort {
     }
 }
 
-pub struct GenesisControllerUpdater(SharedData<u16>, SharedData<bool>);
+pub struct GenesisControllerUpdater(HostData<u16>, HostData<bool>);
 
 impl ControllerUpdater for GenesisControllerUpdater {
     fn update_controller(&mut self, event: ControllerEvent) {
@@ -116,7 +116,7 @@ pub struct GenesisController {
     pub port_1: GenesisControllerPort,
     pub port_2: GenesisControllerPort,
     pub expansion: GenesisControllerPort,
-    pub interrupt: SharedData<bool>,
+    pub interrupt: HostData<bool>,
     pub last_clock: Clock,
     pub last_write: Clock,
 }
@@ -127,7 +127,7 @@ impl GenesisController {
             port_1: GenesisControllerPort::new(),
             port_2: GenesisControllerPort::new(),
             expansion: GenesisControllerPort::new(),
-            interrupt: SharedData::new(false),
+            interrupt: HostData::new(false),
             last_clock: 0,
             last_write: 0,
         }
@@ -144,7 +144,7 @@ impl GenesisController {
         Ok(controller)
     }
 
-    pub fn get_interrupt_signal(&self) -> SharedData<bool> {
+    pub fn get_interrupt_signal(&self) -> HostData<bool> {
         self.interrupt.clone()
     }
 }

src/peripherals/genesis/ym7101.rs

@@ -6,7 +6,7 @@ use crate::error::Error;
 use crate::system::System;
 use crate::memory::dump_slice;
 use crate::devices::{Clock, ClockElapsed, Address, Addressable, Steppable, Inspectable, Transmutable, read_beu16, read_beu32, write_beu16};
-use crate::host::traits::{Host, BlitableSurface, SharedData};
+use crate::host::traits::{Host, BlitableSurface, HostData};
 use crate::host::gfx::{Frame, FrameSwapper};
 
 
@@ -541,11 +541,11 @@ impl<'a> Iterator for PatternIterator<'a> {
 pub struct Ym7101 {
     pub swapper: Arc<Mutex<FrameSwapper>>,
     pub state: Ym7101State,
-    pub external_interrupt: SharedData<bool>,
+    pub external_interrupt: HostData<bool>,
 }
 
 impl Ym7101 {
-    pub fn new<H: Host>(host: &mut H, external_interrupt: SharedData<bool>) -> Ym7101 {
+    pub fn new<H: Host>(host: &mut H, external_interrupt: HostData<bool>) -> Ym7101 {
         let swapper = FrameSwapper::new_shared(320, 224);
 
         host.add_window(FrameSwapper::to_boxed(swapper.clone())).unwrap();

todo.txt

@@ -1,20 +1,22 @@
 
-* add command line arguments to speed up or slow down either the frame rate limiter or the simulated time per frame
-* currently you need to implement the 1.5ms reset in the genesis controllers
-* should SharedData be HostData, or something else?  I don't think the name is very informative
-* can you make the connections between things (like memory adapters), be expressed in a way that's more similar to the electrical design?
-  like specifying that address pins 10-7 should be ignored/unconnected, pin 11 will connect to "chip select", etc
-
-* movem still isn't working (for genesis)
-* fix movem tests
-
-* modify the frame swapper and frontend to avoid the extra buffer copy
-* I had to remove the mask colour from blit because it doesn't work with the mac... need a new solution
-
-* add more m68k tests and try to test against a working impl
-* maybe see about a Mac 128k or something
-
 * should you rename devices.rs traits.rs?
+* should SharedData be HostData, or something else?  I don't think the name is very informative
+* rewrite the frame swapper thing to either not use the swapper or somethnig... it's just very sloppy and needs improving
+
+* can you make the connections between things (like memory adapters), be expressed in a way that's more similar to the electrical design?
+  like specifying that address pins 10-7 should be ignored/unconnected, pin 11 will connect to "chip select", etc
+* can you make the address bus/repeating thing in the mac with the rom and ram, can you make it work for both the 128 and 512
+
+* add sound
+* should you simulate bus arbitration?
+* interrupts could be done in a better way
+
+
+* modify the frame swapper and frontend to avoid the extra buffer copy
+* add command line arguments to speed up or slow down either the frame rate limiter or the simulated time per frame
+* need to implement the 1.5ms reset in the genesis controllers
+
+
 
 
 
@@ -27,8 +29,8 @@
   So both could share the same Signal, one setting it and the other reading it, but how would you actually configure/build that?
 
 
+* add more m68k tests and try to test against a working impl
 * you could modify read()/write() in Addressable to return the number of bytes read or written for dynamic bus sizing used by the MC68020+
-* should you simulate bus arbitration?
 
 
 Genesis/Mega Drive:
@@ -37,13 +39,14 @@ Genesis/Mega Drive:
     * make the ym7101 set/reset the v_int occurred flag based on the interrupt controller
 
 
+
 68000:
     * add instruction timing to M68k
     * make tests for each instruction
     * check all instructions in the docs
 
-    * unimplemented: ABCD, ADDX, BFFFO, BFINS, BKPT, CHK, ILLEGAL, RTR, RTD, SBCD, SUBX
-    * >=MC68020 undecoded & unimplemented: CALLM, CAS, CAS2, CHK2, CMP2, RTM, PACK, TRAPcc, UNPK
+    * unimplemented:  BFFFO, BFINS, CHK, ILLEGAL, NBCD, NEGX, RTR, RTD
+    * >=MC68020 undecoded & unimplemented: BKPT, CALLM, CAS, CAS2, CHK2, CMP2, RTM, PACK, TRAPcc, UNPK
 
     * add support for MMU
     * add support for FPU
@@ -53,6 +56,8 @@ Z80:
     * add instruction timings to Z80
 
 
+* work on mac128/512
+* work on sega genesis
 
 * how can you have multiple CPUs
 * can you eventually make the system connections all configurable via a config file?